[PATCH v2 22/34] ARM: mmu32: create alloc_pte()
Ahmad Fatoum
a.fatoum at pengutronix.de
Wed May 17 06:07:51 PDT 2023
On 17.05.23 11:03, Sascha Hauer wrote:
> This is a preparation for using two level page tables in the PBL.
> To do that we need a way to allocate page tables in PBL. As malloc
> is not available in PBL, implement a function to allocate a page table
> from the area we also place the TTB.
>
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
> arch/arm/cpu/mmu_32.c | 24 ++++++++++++++++++++++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
> index 4050d96846..a82382ad1e 100644
> --- a/arch/arm/cpu/mmu_32.c
> +++ b/arch/arm/cpu/mmu_32.c
> @@ -76,6 +76,27 @@ static bool pgd_type_table(u32 pgd)
> return (pgd & PMD_TYPE_MASK) == PMD_TYPE_TABLE;
> }
>
> +#define PTE_SIZE (PTRS_PER_PTE * sizeof(u32))
> +
> +#ifdef __PBL__
> +static uint32_t *alloc_pte(void)
> +{
> + static unsigned int idx = 3;
Can you add a comment explaining the choice of initial index?
> +
> + idx++;
I know it's a quite construed example, but if one calls alloc_pte
often enough, it will start returning non-NULL pointers after
having returned NULL before.
> +
> + if (idx * PTE_SIZE >= ARM_EARLY_PAGETABLE_SIZE)
> + return NULL;
> +
> + return (void *)ttb + idx * PTE_SIZE;
To address above point, just replace idx with idx++ (and 3 with 4?).
> +}
> +#else
> +static uint32_t *alloc_pte(void)
> +{
> + return xmemalign(PTE_SIZE, PTE_SIZE);
> +}
> +#endif
> +
> static u32 *find_pte(unsigned long adr)
> {
> u32 *table;
> @@ -125,8 +146,7 @@ static u32 *arm_create_pte(unsigned long virt, uint32_t flags)
>
> virt = ALIGN_DOWN(virt, PGDIR_SIZE);
>
> - table = xmemalign(PTRS_PER_PTE * sizeof(u32),
> - PTRS_PER_PTE * sizeof(u32));
> + table = alloc_pte();
>
> if (!ttb)
> arm_mmu_not_initialized_error();
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
More information about the barebox
mailing list