[PATCH 04/19] mci: tegra: fix base address constant to be hexadecimal

Ahmad Fatoum a.fatoum at pengutronix.de
Mon Jun 12 06:02:25 PDT 2023


Tegra SoCs don't have MMC peripherals at decimal address 78000400
(hexadecimal: 0x4a63110), but they do at 0x78000400. Fix it.

Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 drivers/mci/tegra-sdmmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mci/tegra-sdmmc.c b/drivers/mci/tegra-sdmmc.c
index f8ce6c8d7ba0..a6e2b3032057 100644
--- a/drivers/mci/tegra-sdmmc.c
+++ b/drivers/mci/tegra-sdmmc.c
@@ -310,7 +310,7 @@ static int tegra_sdmmc_init(struct mci_host *mci, struct device *dev)
 	/* sdmmc1 and sdmmc3 on T30 need a bit of padctrl init */
 	if (of_device_is_compatible(mci->hw_dev->of_node,
 				    "nvidia,tegra30-sdhci") &&
-			((u32)regs == 0x78000000 || (u32)regs == 78000400)) {
+			((u32)regs == 0x78000000 || (u32)regs == 0x78000400)) {
 		val = readl(regs + TEGRA_SDMMC_SDMEMCOMPPADCTRL);
 		val &= 0xfffffff0;
 		val |= 0x7 << TEGRA_SDMMC_SDMEMCOMPPADCTRL_VREF_SEL_SHIFT;
-- 
2.39.2




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