[PATCH 07/17] MIPS: use MIPS32/MIPS64 generic instruction macros

Denis Orlov denorl2009 at gmail.com
Mon Jun 5 13:10:38 PDT 2023


Use PTR_* for various arithmetic operations on pointers, and also use
PTR_LA instead of simple 'la' instruction, as it will correctly handle
loading 64-bit addresses from non-32-bit-compatible virtual memory
segments.

This fixes "la used to load 64-bit address; recommend using dla instead"
warnings when compiling assembly code with CONFIG_64BIT.

Signed-off-by: Denis Orlov <denorl2009 at gmail.com>
---
 arch/mips/boot/start.S                   |  2 +-
 arch/mips/include/asm/asm.h              | 10 +++++-----
 arch/mips/include/asm/debug_ll_ns16550.h |  6 +++---
 arch/mips/include/asm/pbl_macros.h       | 22 +++++++++++-----------
 arch/mips/lib/genex.S                    |  8 ++++----
 5 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/arch/mips/boot/start.S b/arch/mips/boot/start.S
index c1cd2d9dd5..5f134f9ae9 100644
--- a/arch/mips/boot/start.S
+++ b/arch/mips/boot/start.S
@@ -34,7 +34,7 @@ EXPORT(_start)
 	move	a0, s0
 	move	a1, s1
 	move	a2, s2
-	la	v0, relocate_code
+	PTR_LA	v0, relocate_code
 	jal	v0
 	 nop
 
diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
index 69931662ff..c699542a55 100644
--- a/arch/mips/include/asm/asm.h
+++ b/arch/mips/include/asm/asm.h
@@ -94,10 +94,10 @@ EXPORT(symbol)
 	copy_to_link_location	symbol;			\
 	stack_setup;					\
 							\
-	la	a0, __dtb_ ## dtb##_start;		\
-	la	a1, __dtb_ ## dtb##_end;		\
-	li	a2, ram_size;				\
-	la	v0, pbl_main_entry;			\
+	PTR_LA	a0, __dtb_ ## dtb##_start;		\
+	PTR_LA	a1, __dtb_ ## dtb##_end;		\
+	PTR_LI	a2, ram_size;				\
+	PTR_LA	v0, pbl_main_entry;			\
 	jal	v0;					\
 	 nop;						\
 							\
@@ -122,7 +122,7 @@ EXPORT(symbol)
 	/* Call some code from .text section.		\
 	 * It is needed to keep same linker script for	\
 	 * all images. */				\
-	la	v0, mips_dead_end;			\
+	PTR_LA	v0, mips_dead_end;			\
 	jal	v0;					\
 	 nop;
 
diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h
index 703bfaee77..7cfd844cb6 100644
--- a/arch/mips/include/asm/debug_ll_ns16550.h
+++ b/arch/mips/include/asm/debug_ll_ns16550.h
@@ -60,7 +60,7 @@ static inline void PUTC_LL(char ch)
 
 .macro	debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR
 #ifdef CONFIG_DEBUG_LL
-	la	t0, DEBUG_LL_UART_ADDR
+	PTR_LA	t0, DEBUG_LL_UART_ADDR
 
 	li	t1, UART_LCR_DLAB		/* DLAB on */
 	sb	t1, UART_LCR(t0)		/* Write it out */
@@ -83,7 +83,7 @@ static inline void PUTC_LL(char ch)
 	.set	push
 	.set	reorder
 
-	la	t0, DEBUG_LL_UART_ADDR
+	PTR_LA	t0, DEBUG_LL_UART_ADDR
 
 201:	lbu	t1, UART_LSR(t0)	/* get line status */
 	andi	t1, t1, UART_LSR_THRE	/* check for transmitter empty */
@@ -126,7 +126,7 @@ static inline void PUTC_LL(char ch)
 	.set	push
 	.set	reorder
 
-	la      t0, DEBUG_LL_UART_ADDR
+	PTR_LA     t0, DEBUG_LL_UART_ADDR
 
 	/* get line status and check for data present */
 	lbu	t1, UART_LSR(t0)
diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index e60af38442..1fba690c8c 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -73,7 +73,7 @@
 	.macro	pbl_probe_mem ret1 ret2 addr
 	.set	push
 	.set	noreorder
-	la	\ret1, \addr
+	PTR_LA	\ret1, \addr
 	sw	zero, 0(\ret1)
 	li	\ret2, 0x12345678
 	sw	\ret2, 0(\ret1)
@@ -97,7 +97,7 @@
 	move	\temp, ra			# preserve ra beforehand
 	bal	255f
 	 nop
-255:	addiu	\rd, ra, \label - 255b		# label is assumed to be
+255:	PTR_ADDIU	\rd, ra, \label - 255b	# label is assumed to be
 	move	ra, \temp			# within pc +/- 32KB
 	.set	pop
 	.endm
@@ -110,15 +110,15 @@
 	ADR	a0, \start_addr, t1	/* a0 <- pc-relative
 					position of start_addr */
 
-	la	a1, \start_addr	/* a1 <- link (RAM) start_addr address */
+	PTR_LA	a1, \start_addr	/* a1 <- link (RAM) start_addr address */
 
 	beq	a0, a1, copy_loop_exit
 	 nop
 
-	la	t0, \start_addr
-	la	t1, __bss_start
-	subu	t2, t1, t0	/* t2 <- size of pbl */
-	addu	a2, a0, t2	/* a2 <- source end address */
+	PTR_LA	t0, \start_addr
+	PTR_LA	t1, __bss_start
+	PTR_SUBU	t2, t1, t0	/* t2 <- size of pbl */
+	PTR_ADDU	a2, a0, t2	/* a2 <- source end address */
 
 #define WSIZE	4
 copy_loop:
@@ -132,10 +132,10 @@
 	sw	ta1, WSIZE * 1(a1)
 	sw	ta2, WSIZE * 2(a1)
 	sw	ta3, WSIZE * 3(a1)
-	addi	a0, WSIZE * 4
-	subu	t3, a0, a2
+	PTR_ADDI	a0, WSIZE * 4
+	PTR_SUBU	t3, a0, a2
 	blez	t3, copy_loop
-	 addi	a1, WSIZE * 4
+	 PTR_ADDI	a1, WSIZE * 4
 
 copy_loop_exit:
 
@@ -196,7 +196,7 @@
 	.set	noreorder
 
 	/* set stack pointer; reserve four 32-bit argument slots */
-	la	sp, (TEXT_BASE - MALLOC_SIZE - 16)
+	PTR_LA	sp, (TEXT_BASE - MALLOC_SIZE - 16)
 
 	.set	pop
 	.endm
diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
index d75a652e4d..b9d18fc394 100644
--- a/arch/mips/lib/genex.S
+++ b/arch/mips/lib/genex.S
@@ -14,7 +14,7 @@
 /* Exception vector */
 NESTED(handle_reserved, 0, sp)
 	SAVE_ALL
-	la	k0, barebox_exc_handler
+	PTR_LA	k0, barebox_exc_handler
 	jal	k0
 	 move	a0, sp
 	/* will never return here */
@@ -24,10 +24,10 @@ NESTED(handle_reserved, 0, sp)
 NESTED(except_vec3_generic, 0, sp)
 	.set	noat
 	mfc0	k1, CP0_CAUSE
-	la	k0, exception_handlers
+	PTR_LA	k0, exception_handlers
 	andi	k1, k1, 0x7c
-	addu	k0, k0, k1
-	lw	k0, (k0)
+	PTR_ADDU	k0, k0, k1
+	PTR_L	k0, (k0)
 	nop
 	jr	k0
 	 nop
-- 
2.41.0




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