[PATCH RFT] ARM64: cpu: support 64-bit stack top in ENTRY_FUNCTION_WITHSTACK

Lior Weintraub liorw at pliops.com
Thu Jun 1 01:33:06 PDT 2023


Hi Ahmad,
Thanks for the patch.
I have checked it and can verify it is working correctly.
Cheers,
Lior.

> -----Original Message-----
> From: Ahmad Fatoum <a.fatoum at pengutronix.de>
> Sent: Wednesday, May 31, 2023 8:52 PM
> To: barebox at lists.infradead.org
> Cc: Lior Weintraub <liorw at pliops.com>; Ahmad Fatoum
> <a.fatoum at pengutronix.de>
> Subject: [PATCH RFT] ARM64: cpu: support 64-bit stack top in
> ENTRY_FUNCTION_WITHSTACK
> 
> CAUTION: External Sender
> 
> ENTRY_FUNCTION_WITHSTACK was written with the naive assumption that
> there will always be some memory in the first 32-bit of the address
> space to be used as early stack. There are SoCs out there though with
> sole on-chip SRAM > 4G. Accommodate this by accepting full 64-bit stack
> pointers in ENTRY_FUNCTION_WITHSTACK.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
> ---
>  arch/arm/cpu/head_64.S             | 2 +-
>  arch/arm/include/asm/barebox-arm.h | 2 +-
>  arch/arm/lib/pbl.lds.S             | 7 ++++---
>  include/asm-generic/pointer.h      | 2 ++
>  4 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/cpu/head_64.S b/arch/arm/cpu/head_64.S
> index 398c4d3471e0..546efc263a06 100644
> --- a/arch/arm/cpu/head_64.S
> +++ b/arch/arm/cpu/head_64.S
> @@ -11,7 +11,7 @@
>  ENTRY(__barebox_arm64_head)
>         nop
>         adr x9, __pbl_board_stack_top
> -       ldr w9, [x9]
> +       ldr x9, [x9]
>         cbz x9, 1f
>         mov sp, x9
>  1:
> diff --git a/arch/arm/include/asm/barebox-arm.h
> b/arch/arm/include/asm/barebox-arm.h
> index eb31ca278821..aceb7fdf74f8 100644
> --- a/arch/arm/include/asm/barebox-arm.h
> +++ b/arch/arm/include/asm/barebox-arm.h
> @@ -158,7 +158,7 @@ void __barebox_arm64_head(ulong x0, ulong x1,
> ulong x2);
>                                 (ulong r0, ulong r1, ulong r2)          \
>                 {                                                       \
>                         static __section(.pbl_board_stack_top_##name)   \
> -                               const u32 __stack_top = (stack_top);    \
> +                               const ulong __stack_top = (stack_top);  \
>                         __keep_symbolref(__barebox_arm64_head);         \
>                         __keep_symbolref(__stack_top);                  \
>                         __##name(r0, r1, r2);                           \
> diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
> index 114ec7bc8195..2b4b1d6a9513 100644
> --- a/arch/arm/lib/pbl.lds.S
> +++ b/arch/arm/lib/pbl.lds.S
> @@ -4,6 +4,7 @@
>  #include <linux/sizes.h>
>  #include <asm/barebox.lds.h>
>  #include <asm-generic/memory_layout.h>
> +#include <asm-generic/pointer.h>
> 
>  #ifdef CONFIG_PBL_RELOCATABLE
>  #define BASE   0x0
> @@ -44,14 +45,14 @@ SECTIONS
>         . = ALIGN(4);
>         .rodata : { *(.rodata*) }
> 
> -       . = ALIGN(4);
> +       . = ALIGN(ASM_SZPTR);
>         __pbl_board_stack_top = .;
>         .rodata.pbl_board_stack_top : {
>                 *(.pbl_board_stack_top_*)
>                 /* Dummy for when BootROM sets up usable stack */
> -               LONG(0x00000000);
> +               ASM_LD_PTR(0x00000000)
>         }
> -       ASSERT(. - __pbl_board_stack_top <= 8, "Only One PBL per Image
> allowed")
> +       ASSERT(. - __pbl_board_stack_top <= 2 * ASM_SZPTR, "Only One PBL per
> Image allowed")
> 
>         .barebox_imd : { BAREBOX_IMD }
> 
> diff --git a/include/asm-generic/pointer.h b/include/asm-generic/pointer.h
> index 8b9600b02939..89817ce59ebc 100644
> --- a/include/asm-generic/pointer.h
> +++ b/include/asm-generic/pointer.h
> @@ -8,6 +8,7 @@
>  #define ASM_PTR                .quad
>  #define ASM_SZPTR      8
>  #define ASM_LGPTR      3
> +#define ASM_LD_PTR(x)  QUAD(x)
>  #else
>  #define ASM_PTR                ".quad"
>  #define ASM_SZPTR      "8"
> @@ -18,6 +19,7 @@
>  #define ASM_PTR                .word
>  #define ASM_SZPTR      4
>  #define ASM_LGPTR      2
> +#define ASM_LD_PTR(x)  LONG(x)
>  #else
>  #define ASM_PTR                ".word"
>  #define ASM_SZPTR      "4"
> --
> 2.39.2




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