[PATCH 2/6] RISC-V: add riscv_vendor_id() support

[Sascha Hauer]

On Tue, Sep 13, 2022 at 02:49:50PM +0200, Marco Felsch wrote:
> +static inline long __riscv_vendor_id(u32 flags)
> +{
> +	struct sbiret ret = { .error = -1 };
> +	long id;
> +
> +	switch (__riscv_mode(flags)) {
> +	case RISCV_M_MODE:
> +		__asm__ volatile("csrr %0, mvendorid\n" : "=r"(id));
> +		return id;
> +	case RISCV_S_MODE:
> +		/*
> +		 * We need to use the sbi_ecall() since it can be that we got
> +		 * called without a working stack
> +		 */
> +		ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_MVENDORID,
> +				0, 0, 0, 0, 0, 0);
> +		if (!ret.error)
> +			return ret.value;
> +	default:
> +	}

arch/riscv/include/asm/system.h:27:2: error: label at end of compound statement

Sascha

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