[PATCH 6/6] RISC-V: add Allwinner Sun20i D1 Nezha support

[Sascha Hauer]

On Tue, Sep 13, 2022 at 02:49:54PM +0200, Marco Felsch wrote:
> Add Allwinner sun20i SoC and D1-Nezha board support.
> 
> Signed-off-by: Marco Felsch <m.felsch at pengutronix.de>
> ---
>  Documentation/boards/riscv.rst            | 102 +++++++++++++++++
>  arch/riscv/Kconfig.socs                   |  16 +++
>  arch/riscv/boards/Makefile                |   1 +
>  arch/riscv/boards/allwinner-d1/Makefile   |   3 +
>  arch/riscv/boards/allwinner-d1/lowlevel.c |  12 ++
>  arch/riscv/configs/sun20i_defconfig       | 130 ++++++++++++++++++++++
>  arch/riscv/include/asm/debug_ll.h         |   5 +
>  common/Kconfig                            |   5 +
>  images/Makefile.riscv                     |   4 +
>  9 files changed, 278 insertions(+)
>  create mode 100644 arch/riscv/boards/allwinner-d1/Makefile
>  create mode 100644 arch/riscv/boards/allwinner-d1/lowlevel.c
>  create mode 100644 arch/riscv/configs/sun20i_defconfig
> 

[...]

> diff --git a/arch/riscv/configs/sun20i_defconfig b/arch/riscv/configs/sun20i_defconfig
> new file mode 100644
> index 0000000000..157c430723
> --- /dev/null
> +++ b/arch/riscv/configs/sun20i_defconfig

I can select all machines built with sifive_defconfig, starfive_defconfig,
sun20i_defconfig and virt64_defconfig in a single config and
successfully build barebox with all these machines.

Instead of adding another defconfig we should go into the opposite
direction and consolidate the defconfigs.

Maybe a rv32i_defconfig and a rv64i_defconfig would be it.

Sascha

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