[PATCH master] ARM: i.MX7: enable caches when booted over USB

[Ahmad Fatoum]

On 04.10.22 09:54, Marco Felsch wrote:
> Hi,
> 
> On 22-09-30, Johannes Zink wrote:
>> From: Ahmad Fatoum <a.fatoum at pengutronix.de>
>>
>> BootROM on the i.MX7 doesn't set the SMP bit when booted
>> over serial download. This leads to vastly worse performance
>> when doing memory-heavy operations in a USB-booted system,
>> as the caches are not utilized. Example running md5sum over
>> a 25M image in ramfs:
>>
>>   without patch: 10796ms
>>   with    patch: 457ms
>>
>> This issue isn't unique to the i.MX7, but exists for the i.MX6UL as
>> well, which also has the Cortex-A7 as CPU. Like with
>> imx6ul_cpu_lowlevel_init(), adapt imx7_cpu_lowlevel_init() to avoid this
>> slow down.
>>
>> Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
>> Signed-off-by: Johannes Zink <j.zink at pengutronix.de>
>> ---
>>  arch/arm/mach-imx/cpu_init.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
>> index ea36215419..ede2076102 100644
>> --- a/arch/arm/mach-imx/cpu_init.c
>> +++ b/arch/arm/mach-imx/cpu_init.c
>> @@ -49,7 +49,7 @@ void imx6ul_cpu_lowlevel_init(void)
>>  
>>  void imx7_cpu_lowlevel_init(void)
>>  {
>> -	arm_cpu_lowlevel_init();
>> +	cortex_a7_lowlevel_init();
> 
> Out of curiosity, arm_cpu_lowlevel_init() does a lot more than
> cortex_a7_lowlevel_init() e.g. cache invalidation. Is it save to only
> call cortex_a7_lowlevel_init() here?

It's not and this was an oversight. Thanks for catching.

> 
> Regards,
>   Marco
> 
>>  	imx_cpu_timer_init(IOMEM(MX7_SYSCNT_CTRL_BASE_ADDR));
>>  }
>>  
>> -- 
>> 2.30.2
>>
>>
>>
> 
> 


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