[PATCH 1/2] fixup! usb: dwc2: Add support for optional usb phy

Michael Grzeschik mgr at pengutronix.de
Mon Mar 21 15:17:17 PDT 2022

Hi Ahmad!

On Wed, Jan 06, 2021 at 11:05:43AM +0100, Sascha Hauer wrote:
>On Mon, Dec 21, 2020 at 01:32:50AM +0100, Ahmad Fatoum wrote:
>> Linux doesn't seem to enforce a fixed order between phy_init and
>> phy_power_on. The Linux dwc2 driver does power_on and then phy_init,
>> which is the inverse of what barebox is currently doing.
>> The PHYs normally used with dwc2 are written with this in mind.
>> For example, our stm32-usbphyc driver fails to disable:
>>   ERROR: stm32-usbphyc 5a006000.usbphyc at 5a006000.of: PLL not reset
>>   ERROR: phy1: phy exit failed --> -5
>> Because Linux does exit -> power_off, but barebox does power_off ->
>> exit.
>> Issue was raised upstream:
>> https://lore.kernel.org/lkml/6cd01e79-fdc0-3bd4-32b5-a85142533f8a@pengutronix.de/T/#t
>> Until this is settled, swap the order to follow what Linux does.
>> This is suboptimal, because it means controller drivers have different
>> order of the operations and that you can't combine arbitrary PHYs and
>> controllers, but it seems unlikely we will support combinations that
>> aren't supported by Linux in the first place anyway.
>This is valuable information and I don't want it to be lost, so instead
>of applying this as a fixup I rewrote the subject to:
>usb: dwc2: swap order of phy_init and phy_power_on to what Linux does
>and applied it as a separate patch.

With this patch applied, some stm32mp1 do seem to timeout when
addressing the core.

WARNING: dwc2 49000000.usb-otg at 49000000.of: dwc2_core_reset: Timeout! Waiting for Core Soft Reset
ERROR: dwc2 49000000.usb-otg at 49000000.of: probe failed: Connection timed out

When I revert this patch. Everything works fine again.

Is it possible that we can revert it in mainline now?
How can I reproduce the case this was fixing in the first place?


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