[PATCH v2 3/5] ARM: socfpga: achilles: use ENTRY_FUNCTION_WITHSTACK

Lucas Stach l.stach at pengutronix.de
Fri Jul 8 01:13:13 PDT 2022


Am Freitag, dem 08.07.2022 um 08:24 +0200 schrieb Steffen Trumtrar:
> From: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> 
> Use the newer function ENTRY_FUNCTION_WITHSTACK.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> ---
>  arch/arm/boards/reflex-achilles/lowlevel.c | 15 ++++++---------
>  1 file changed, 6 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c b/arch/arm/boards/reflex-achilles/lowlevel.c
> index 162cd58c58..0fc94fc2b1 100644
> --- a/arch/arm/boards/reflex-achilles/lowlevel.c
> +++ b/arch/arm/boards/reflex-achilles/lowlevel.c
> @@ -31,12 +31,16 @@
>  
>  extern char __dtb_z_socfpga_arria10_achilles_start[];
>  
> -static noinline void achilles_start(void)
> +#define ARRIA10_STACKTOP	ARRIA10_OCRAM_ADDR + SZ_256K
> +
> +ENTRY_FUNCTION_WITHSTACK(start_socfpga_achilles_xload, ARRIA10_STACKTOP, r0, r1, r2)
>  {
>  	int pbl_index = 0;
>  	int barebox = 0;
>  	int bitstream = 0;
>  
> +	arm_cpu_lowlevel_init();

Drive-by comment, as I've spotted it in the context of this patch: the
Arria10 CPU is a Cortex A9, which has quite a few known errata, some of
which need to be worked around in the bootloader. You might want to
consider adding a SoC specific cpu lowlevel init function, like the
ones for i.MX6 and Zynq, to apply the relevant workarounds.

Regards,
Lucas

> +	arm_setup_stack(ARRIA10_OCRAM_ADDR + SZ_256K);
>  
>  	relocate_to_current_adr();
>  	setup_c();
> @@ -75,13 +79,6 @@ static noinline void achilles_start(void)
>  	arria10_start_image(barebox);
>  }
>  
> -ENTRY_FUNCTION(start_socfpga_achilles_xload, r0, r1, r2)
> -{
> -	arm_cpu_lowlevel_init();
> -	arm_setup_stack(ARRIA10_OCRAM_ADDR + SZ_256K);
> -	achilles_start();
> -}
> -
>  ENTRY_FUNCTION(start_socfpga_achilles, r0, r1, r2)
>  {
>  	void *fdt;
> @@ -91,7 +88,7 @@ ENTRY_FUNCTION(start_socfpga_achilles, r0, r1, r2)
>  	barebox_arm_entry(0x0, SZ_2G + SZ_1G, fdt);
>  }
>  
> -ENTRY_FUNCTION(start_socfpga_achilles_bringup, r0, r1, r2)
> +ENTRY_FUNCTION_WITHSTACK(start_socfpga_achilles_bringup, ARRIA10_STACKTOP, r0, r1, r2)
>  {
>  	void *fdt;
>  





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