[PATCH 2/4] ARM: imx: Add imx8 support for SDRAM with two or more bank groups

[Joacim Zetterling]

Add bank group size to handle SDRAM with two or more bank groups
in one chip. The imx8mn DDR4 has one mem chip with ranks set to 1 and
the number of banks is 4 in 2 groups, total of 8 banks.

We need two add the DDRC_ADDRMAP8 and do a check DDRC_ADDRMAP8_BG_B0
and DDRC_ADDRMAP8_BG_B1 to get the number of bank groups in the chip.

Signed-off-by: Joacim Zetterling <joacim.zetterling at westermo.com>
---
 arch/arm/mach-imx/esdctl.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 8e2d9e0c115c..0e11033b81ae 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -346,6 +346,9 @@ static int vf610_ddrmc_add_mem(void *mmdcbase, struct imx_esdctl_data *data)
 #define DDRC_ADDRMAP7_ROW_B17			GENMASK(11,  8)
 #define DDRC_ADDRMAP7_ROW_B16			GENMASK( 3,  0)
 
+#define DDRC_ADDRMAP8_BG_B1			GENMASK(13,  8)
+#define DDRC_ADDRMAP8_BG_B0			GENMASK(4,  0)
+
 static unsigned int
 imx_ddrc_count_bits(unsigned int bits, const u8 config[],
 		     unsigned int config_num)
@@ -409,6 +412,13 @@ imx_ddrc_sdram_size(void __iomem *ddrc, const u32 addrmap[],
 	if (FIELD_GET(DDRC_ADDRMAP1_BANK_B2, addrmap[1]) != 0b11111)
 		banks++;
 
+	if (addrmap[8]) {
+		if (FIELD_GET(DDRC_ADDRMAP8_BG_B0, addrmap[8]) != 0b11111)
+			banks++;
+		if (FIELD_GET(DDRC_ADDRMAP8_BG_B1, addrmap[8]) != 0b111111)
+			banks++;
+	}
+
 	columns = imx_ddrc_count_bits(col_max, col_b, col_b_num);
 	rows    = imx_ddrc_count_bits(row_max, row_b, row_b_num);
 
-- 
2.25.1