[PATCH 08/24] ARM: stm32mp: ddrctrl: fix wrong register field widths

[Ahmad Fatoum]

Consulting the reference manual shows that column fields are 4
bits each, but some of them were treated as 5-bit wide. Fix it.

Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 arch/arm/mach-stm32mp/ddrctrl.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-stm32mp/ddrctrl.c b/arch/arm/mach-stm32mp/ddrctrl.c
index 7f2013c22d79..93996d0afc79 100644
--- a/arch/arm/mach-stm32mp/ddrctrl.c
+++ b/arch/arm/mach-stm32mp/ddrctrl.c
@@ -24,12 +24,12 @@
 #define ADDRMAP2_COL_B5		GENMASK(27, 24)
 
 #define ADDRMAP3_COL_B6		GENMASK( 3,  0)
-#define ADDRMAP3_COL_B7		GENMASK(12,  8)
-#define ADDRMAP3_COL_B8		GENMASK(20, 16)
-#define ADDRMAP3_COL_B9		GENMASK(28, 24)
+#define ADDRMAP3_COL_B7		GENMASK(11,  8)
+#define ADDRMAP3_COL_B8		GENMASK(19, 16)
+#define ADDRMAP3_COL_B9		GENMASK(27, 24)
 
-#define ADDRMAP4_COL_B10	GENMASK( 4,  0)
-#define ADDRMAP4_COL_B11	GENMASK(12,  8)
+#define ADDRMAP4_COL_B10	GENMASK( 3,  0)
+#define ADDRMAP4_COL_B11	GENMASK(11,  8)
 
 #define ADDRMAP5_ROW_B0		GENMASK( 3,  0)
 #define ADDRMAP5_ROW_B1		GENMASK(11,  8)
-- 
2.30.2