i.MX6Q ldb after 2019.02

[gianluca]

On 11/13/20 9:51 AM, Alexander Shiyan wrote:
> Hello All.
> 
> I am having problems updating the barebox from version 2019.02 to version 2020.10.
> The barebox i.MX6 CLK driver now uses several patches compared to the previous
> version to fix the err009219 bug, and the display no more works as before.
> I use a board based on i.MX6Q revision 1.2. With the old bootloader, the LVDS channel
> is initialized and I can display the splash screen in the barebox. After loading the kernel,
> everything works too.
> I added source selection for LVDS channels and the kernel works with these additions.
> &clks {
> 	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
> 			  <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
> 	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
> 				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
> };
> 
> The splash screen in new version is not displayed in the barebox.
> So, the question, what I do incorrect and how to fix this?
> Old clk_dump:
>      pll5_video (rate 716800008, enabled)
>          pll5_post_div (rate 179200002, enabled)
>              pll5_video_div (rate 44800001, enabled)
>                  ldb_di0_sel (rate 44800001, enabled)
>                      ldb_di0_div_3_5 (rate 12800000, enabled)
>                          ldb_di0_podf (rate 6400000, enabled)
>                              ipu1_di0_sel (rate 6400000, enabled)
>                                  ipu1_di0 (rate 6400000, enabled)
>                                      2400000.ipu at 2400000.of_di0_pixel (rate 6400000, enabled)
>                              ldb_di0 (rate 6400000, enabled)
> New:
>      pll5_video (rate 716800008, enable_count: 1, unknown)
>          pll5_post_div (rate 358400004, enable_count: 1, always enabled)

This is a div2. Should be div4

>              pll5_video_div (rate 179200002, enable_count: 1, always enabled)
>                  ldb_di0_sel (rate 179200002, enable_count: 1, always enabled)
>                      ldb_di0_div_3_5 (rate 51200000, enable_count: 1, always enabled)
>                          ldb_di0_podf (rate 25600000, enable_count: 1, always enabled)
>                              ipu1_di0_sel (rate 25600000, enable_count: 1, always enabled)
>                                  ipu1_di0 (rate 25600000, enable_count: 1, enabled)
>                                      2400000.ipu at 2400000.of_di0_pixel (rate 6400000, enable_count: 1, always enabled)
>                              ldb_di0 (rate 25600000, enable_count: 0, enabled)
> 
> Can anyone help me to resolve this?

Try to use pll5_post_div as div4 of the original pll5_video. All others 
should be adapting correctly then.

> Thanks!
> 
> ---
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> 


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