[PATCH 3/3] MIPS: ls1b200: use clk driver

[Du Huanpeng]

switch the clock source of serials to clk provider.

Signed-off-by: Du Huanpeng <u74147 at gmail.com>
---
 arch/mips/Kconfig       | 1 +
 arch/mips/dts/ls1b.dtsi | 8 ++++----
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a56c26a..d2ca779 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -177,6 +177,7 @@ config CPU_LOONGSON1B
 	select CPU_GS232
         select CLKDEV_LOOKUP
         select COMMON_CLK
+	select COMMON_CLK_OF_PROVIDER
 	help
 	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
 	  release 2 instruction set.
diff --git a/arch/mips/dts/ls1b.dtsi b/arch/mips/dts/ls1b.dtsi
index 8b772af..3b57093 100644
--- a/arch/mips/dts/ls1b.dtsi
+++ b/arch/mips/dts/ls1b.dtsi
@@ -15,7 +15,7 @@
 			compatible = "ns16550a";
 			reg = <0x1fe40000 0x8>;
 			reg-shift = <0>;
-			clock-frequency = <83000000>;
+			clocks = <&pll LS1B_CLK_APB_DIV>;
 			status = "disabled";
 		};
 
@@ -23,7 +23,7 @@
 			compatible = "ns16550a";
 			reg = <0x1fe44000 0x8>;
 			reg-shift = <0>;
-			clock-frequency = <83000000>;
+			clocks = <&pll LS1B_CLK_APB_DIV>;
 			status = "disabled";
 		};
 
@@ -31,7 +31,7 @@
 			compatible = "ns16550a";
 			reg = <0x1fe48000 0x8>;
 			reg-shift = <0>;
-			clock-frequency = <83000000>;
+			clocks = <&pll LS1B_CLK_APB_DIV>;
 			status = "disabled";
 		};
 
@@ -39,7 +39,7 @@
 			compatible = "ns16550a";
 			reg = <0x1fe4c000 0x8>;
 			reg-shift = <0>;
-			clock-frequency = <83000000>;
+			clocks = <&pll LS1B_CLK_APB_DIV>;
 			status = "disabled";
 		};
 
-- 
2.7.4