[PATCH] ARM: i.MX28: Add APBH clk support

Oleksij Rempel o.rempel at pengutronix.de
Mon Sep 17 03:31:51 PDT 2018

After this commit iMX28 filed to use DMA and NAND:
|commit 6eb2ba6f1b206bb7d688036a28c98eb4a89be781
|Author: Andrey Smirnov <andrew.smirnov at gmail.com>
|Date:   Sat Mar 31 18:13:57 2018 -0700
|dma: apbh: Enable clock as a part of probing
|Enable clock as a part of probing in order to avoid problems on SoCs
|that do not have this block ungated out of reset (e.g. i.MX7).
|Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
|Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

The reason was missing clock base for APBH.

Signed-off-by: Oleksij Rempel <o.rempel at pengutronix.de>
 drivers/clk/mxs/clk-imx28.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index ffe03c8668..dd17a74d79 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -152,6 +152,7 @@ int __init mx28_clocks_init(void __iomem *regs)
 	clkdev_add_physbase(clks[fec], IMX_FEC0_BASE, NULL);
 	clkdev_add_physbase(clks[xbus], IMX_DBGUART_BASE, NULL);
 	clkdev_add_physbase(clks[hbus], IMX_OCOTP_BASE, NULL);
+	clkdev_add_physbase(clks[hbus], MXS_APBH_BASE, NULL);
 	clkdev_add_physbase(clks[uart], IMX_UART0_BASE, NULL);
 	clkdev_add_physbase(clks[uart], IMX_UART1_BASE, NULL);
 	clkdev_add_physbase(clks[uart], IMX_UART2_BASE, NULL);

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