[PATCH 03/18] crypto: caam - fix writing to JQCR_MS when using service interface

Marcin Niestroj m.niestroj at grinn-global.com
Mon Sep 3 04:23:53 PDT 2018

Pick commit 9f587fa29f7e8ed6b8885cff51a51ace3ad85152 from Linux

    crypto: caam - fix writing to JQCR_MS when using service interface

    Most significant part of JQCR (Job Queue Control Register) contains
    bits that control endianness: ILE - Immediate Little Endian,
    DWS - Double Word Swap.
    The bits are automatically set by the Job Queue Controller HW.

    Unfortunately these bits are cleared in SW when submitting descriptors
    via the register-based service interface.
    >From LS1021A:
    JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0)
    JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0)

    This would cause problems on little endian caam for descriptors
    containing immediata data or double-word pointers.
    Currently there is no problem since the only descriptors ran through
    this interface are the ones that (un)instantiate RNG.

    Signed-off-by: Horia Geant? <horia.geanta at freescale.com>
    Signed-off-by: Herbert Xu <herbert at gondor.apana.org.au>

Signed-off-by: Marcin Niestroj <m.niestroj at grinn-global.com>
 drivers/crypto/caam/ctrl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index eafff8ef0..8ce9a859e 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -117,7 +117,7 @@ static inline int run_descriptor_deco0(struct device_d *ctrldev, u32 *desc,
 		flags |= DECO_JQCR_FOUR;
 	/* Instruct the DECO to execute it */
-	writel(flags, &deco->jr_ctl_hi);
+	setbits32(&deco->jr_ctl_hi, flags);
 	start = get_time_ns();
 	while ((deco_dbg_reg = readl(&deco->desc_dbg)) &

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