[PATCH 3/3] ARM: mmu: psci: Make use of get_ttbr()

Andrey Smirnov andrew.smirnov at gmail.com
Thu Jun 14 21:21:02 PDT 2018


Introduce a simple inline function to get TTBR and use it in mmu.c and
sm.c

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/cpu/mmu.c | 4 +---
 arch/arm/cpu/mmu.h | 9 +++++++++
 arch/arm/cpu/sm.c  | 3 +--
 3 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 7e2e5bf7e..9e765514d 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -453,10 +453,8 @@ static int mmu_init(void)
 		 * Early MMU code has already enabled the MMU. We assume a
 		 * flat 1:1 section mapping in this case.
 		 */
-		asm volatile ("mrc  p15,0,%0,c2,c0,0" : "=r"(ttb));
-
 		/* Clear unpredictable bits [13:0] */
-		ttb = (uint32_t *)((unsigned long)ttb & ~0x3fff);
+		ttb = (uint32_t *)(get_ttbr() & ~0x3fff);
 
 		if (!request_sdram_region("ttb", (unsigned long)ttb, SZ_16K))
 			/*
diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h
index e5bb37025..2e425e092 100644
--- a/arch/arm/cpu/mmu.h
+++ b/arch/arm/cpu/mmu.h
@@ -19,6 +19,15 @@ static inline void __mmu_cache_off(void) {}
 static inline void __mmu_cache_flush(void) {}
 #endif
 
+static inline unsigned long get_ttbr(void)
+{
+	unsigned long ttb;
+
+	asm volatile ("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
+
+	return ttb;
+}
+
 static inline void set_ttbr(void *ttb)
 {
 	asm volatile ("mcr  p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/);
diff --git a/arch/arm/cpu/sm.c b/arch/arm/cpu/sm.c
index b0bf16405..cb0bac106 100644
--- a/arch/arm/cpu/sm.c
+++ b/arch/arm/cpu/sm.c
@@ -187,8 +187,7 @@ int armv7_secure_monitor_install(void)
 	mmuon = get_cr() & CR_M;
 
 	vbar = get_vbar();
-
-	asm volatile ("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
+	ttb = get_ttbr();
 
 	armv7_init_nonsec();
 	__armv7_secure_monitor_install();
-- 
2.17.0




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