[PATCH v5 53/54] ARM: i.MX8: Add i.MX8mq EVK support

Andrey Smirnov andrew.smirnov at gmail.com
Wed Jun 13 05:33:38 PDT 2018


On Wed, Jun 13, 2018 at 1:49 AM Christian Hemp <c.hemp at phytec.de> wrote:
>
> Hello Andrey,
>
> ...
> On Dienstag, 12. Juni 2018 13:53:09 CEST Andrey Smirnov wrote:
> > diff --git a/Documentation/boards/imx/nxp-imx8mq-evk.rst
> > b/Documentation/boards/imx/nxp-imx8mq-evk.rst new file mode 100644
> > index 000000000..2bc94e790
> > --- /dev/null
> > +++ b/Documentation/boards/imx/nxp-imx8mq-evk.rst
> > @@ -0,0 +1,116 @@
> > +NXP i.MX8MQ EVK Evaluation Board
> > +================================
> > +
> > +Board comes with:
> > +
> > +* 3GiB of LPDDR4 RAM
> > +* 16GiB eMMC
> > +
> > +Not including booting via serial, the device can boot from either SD or
> > eMMC. +
> > +Downloading DDR PHY Firmware
> > +----------------------------
> > +
> > +As a part of DDR intialization routine NXP i.MX8MQ EVK requires and
> > +uses several binary firmware blobs that are distributed under a
> > +separate EULA and cannot be included in Barebox. In order to obtain
> > +the do the following::
> > +
> > + wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.2.bin
> > + chmod +x firmware-imx-7.2.bin
> > + ./firmware-imx-7.2.bin
> > +
> > +Executing that file should produce a EULA acceptance dialog as well as
> > +result in the following files:
> > +
> > +- lpddr4_pmu_train_1d_dmem.bin
> > +- lpddr4_pmu_train_1d_imem.bin
> > +- lpddr4_pmu_train_2d_dmem.bin
> > +- lpddr4_pmu_train_2d_imem.bin
> > +
> > +As a last step of this process those files need to be placed in
> > +"firmware/imx/"::
> > +
> > +  for f in lpddr4_pmu_train_1d_dmem.bin  \
> > +           lpddr4_pmu_train_1d_imem.bin  \
> > +          lpddr4_pmu_train_2d_dmem.bin  \
> > +          lpddr4_pmu_train_2d_imem.bin; \
> > +  do \
> > +          cp firmware-imx-7.2/firmware/ddr/synopsys/${f} \
> > +             firmware/imx/${f}; \
> > +  done
> > +
> > +DDR Configuration Code
> > +======================
> > +
> > +The following two files:
> > +
> > +  - ddr_init.c
> > +  - ddrphy_train.c
> > +
> > +were obtained by running i.MX 8M DDR Tool that can be found here:
> > +
> > +https://community.nxp.com/docs/DOC-340179
> > +
> > +Only minimal amount of necessary changes were made to those files.
> > +All of the "impedance matching" code is located in "ddr.h".
> > +
> > +Build Barebox
> > +=============
> > +
> > + make imv_v8_defconfig
>
> s/imv_v8_defconfig/imx_v8_defconfig/g
>

Will fix in v6.

Thanks,
Andrey Smirnov



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