[PATCH] drivers: clk: clk-imx6.c: Don't gate LDB and IPUs

Sascha Hauer s.hauer at pengutronix.de
Wed Mar 8 23:18:45 PST 2017


On Fri, Mar 03, 2017 at 08:33:53AM +0100, David Jander wrote:
> Depending on CONFIG_DRIVER_VIDEO_IMX_IPUV3 to decide whether to
> gate IPU clocks or not is rather fragile. Any inadvertent
> dependency on the IPU (like setting the NoC AQoS registers for
> i.MX6QP) will result in a freeze if CONFIG_DRIVER_VIDEO_IMX_IPUV3
> is disabled.
> 
> Signed-off-by: David Jander <david at protonic.nl>
> ---
>  drivers/clk/imx/clk-imx6.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c
> index 8ac43be..d0571bc 100644
> --- a/drivers/clk/imx/clk-imx6.c
> +++ b/drivers/clk/imx/clk-imx6.c
> @@ -494,10 +494,7 @@ static int imx6_ccm_probe(struct device_d *dev)
>  	writel(0xffffffff, ccm_base + CCGR0);
>  	writel(0xf0ffffff, ccm_base + CCGR1); /* gate GPU3D, GPU2D */
>  	writel(0xffffffff, ccm_base + CCGR2);
> -	if (IS_ENABLED(CONFIG_DRIVER_VIDEO_IMX_IPUV3))
> -		writel(0x3fffffff, ccm_base + CCGR3); /* gate OpenVG */
> -	else
> -		writel(0x3fff0000, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
> +	writel(0x3fffffff, ccm_base + CCGR3); /* gate OpenVG */
>  	if (IS_ENABLED(CONFIG_PCI_IMX6))
>  		writel(0xffffffff, ccm_base + CCGR4);
>  	else
> -- 
> 2.9.3
> 
> 

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