[PATCH v1 2/2] serial: ns16550: provide big-endian support

[Lucas Stach]

Am Donnerstag, den 27.07.2017, 07:00 +0200 schrieb Oleksij Rempel:
> we need it at least for QCA AR9344
> 
> Signed-off-by: Oleksij Rempel <o.rempel at pengutronix.de>
> ---
>  drivers/serial/serial_ns16550.c | 19 +++++++++++++++++--
>  1 file changed, 17 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c
> index a8953cd99d..4d73ea8b87 100644
> --- a/drivers/serial/serial_ns16550.c
> +++ b/drivers/serial/serial_ns16550.c
> @@ -94,6 +94,16 @@ static void ns16550_write_reg_mmio_32(struct ns16550_priv *priv, uint8_t val, un
>  	writel(val, priv->mmiobase + offset);
>  }
>  
> +static uint8_t ns16550_read_reg_mmio_32be(struct ns16550_priv *priv, unsigned offset)
> +{
> +	return ioread32be(priv->mmiobase + offset);
> +}
> +
> +static void ns16550_write_reg_mmio_32be(struct ns16550_priv *priv, uint8_t val, unsigned offset)
> +{
> +	iowrite32be(val, priv->mmiobase + offset);
> +}

This doesn't work on PPC and x86, as those 2 architectures are missing
the "be" variants of the iowrite/ioread functions.

> +
>  static uint8_t ns16550_read_reg_ioport_8(struct ns16550_priv *priv, unsigned offset)
>  {
>  	return inb(priv->iobase + offset);
> @@ -305,8 +315,13 @@ static void ns16550_probe_dt(struct device_d *dev, struct ns16550_priv *priv)
>  			priv->write_reg = ns16550_write_reg_mmio_16;
>  			break;
>  		case 4:
> -			priv->read_reg = ns16550_read_reg_mmio_32;
> -			priv->write_reg = ns16550_write_reg_mmio_32;
> +			if (of_device_is_big_endian(np)) {
> +				priv->read_reg = ns16550_read_reg_mmio_32be;
> +				priv->write_reg = ns16550_write_reg_mmio_32be;
> +			} else {
> +				priv->read_reg = ns16550_read_reg_mmio_32;
> +				priv->write_reg = ns16550_write_reg_mmio_32;
> +			}
>  			break;
>  		default:
>  			dev_err(dev, "unsupported reg-io-width (%d)\n",