From antonynpavlov at gmail.com  Mon Oct  3 04:56:57 2016
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Mon,  3 Oct 2016 14:56:57 +0300
Subject: [PATCH] sandbox: Makefile: drop unused SUBARCH stuff
Message-ID: <20161003115657.17953-1-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/sandbox/Makefile | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/sandbox/Makefile b/arch/sandbox/Makefile
index a539a90..8155a79 100644
--- a/arch/sandbox/Makefile
+++ b/arch/sandbox/Makefile
@@ -31,11 +31,6 @@ else
 CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
 endif
 
-SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
-				  -e s/arm.*/arm/ -e s/sa110/arm/ \
-				  -e s/s390x/s390/ -e s/parisc64/parisc/ \
-				  -e s/ppc.*/powerpc/ -e s/mips.*/mips/ )
-
 archprepare: maketools
 
 PHONY += maketools
-- 
2.9.3



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:37 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:37 -0700
Subject: [PATCH 00/20] Vybrid support in Barebox
Message-ID: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>

Hello all,

This series adds some level of support for Vybrid family of SoCs in
Barebox. The development of this code was mostly being done on VF610
Tower board with some additional verification and testing on a custom
Vyrid base board (which in its core mimics Tower board).

Here's what I belive is supported with this series (every item assumes
VF610 Tower board as target HW):
      - Booting :-)
      - DEBUG_LL
      - Clock tree
      - Serial
      - I2C
      - SD card

I am sure this is not the final version of the patchset and I'll have
iterate on this code a couple of times. Any feedback on the code is
greatly appreciated.

Thank you,
Andrey Smirnov

Andrey Smirnov (20):
  i.MX: Add primitive functions for VF610 family
  i.MX: Add DEBUG_LL hooks for VF610
  i.MX: scripts: Add "vf610" soc to imx-image
  i.MX: Add support for VF610 Tower board
  i.MX: Add pinctrl driver for VF610
  clk: Port clock dependency resolution code
  clk: Port of_clk_set_defautls()
  i.MX: clk: Port imx_clk_gate2_cgr()
  i.MX: clk: Add IMX_PLLV3_USB_VF610 support
  i.MX: clk: Port imx_check_clocks() and imx_obtain_fixed_clock()
  i.MX: Add VF610 clock tree initialization code
  vf610: Give enet_osc explicit "enet_ext" name
  i.MX: Add 'lpuart' serial driver
  i.MX: i2c-imx: Add Vybrid support
  i.MX: esdhc: Do not rely on CPU type for quirks
  i.MX: Kconfig: Enable OCOTP on Vybrid
  i.MX: ocotp: Remove unused #define
  i.MX: ocotp: Account for shadow memory gaps
  i.MX: ocotp: Add Vybrid support
  imx-esdhc: Request "per" clock explicitly

 arch/arm/boards/Makefile                           |    3 +-
 arch/arm/boards/freescale-vf610-twr/Makefile       |    4 +
 arch/arm/boards/freescale-vf610-twr/board.c        |   61 +
 .../flash-header-vf610-twr.imxcfg                  |  277 +++++
 arch/arm/boards/freescale-vf610-twr/lowlevel.c     |   45 +
 arch/arm/dts/Makefile                              |    1 +
 arch/arm/dts/vf610-twr.dts                         |   18 +
 arch/arm/mach-imx/Kconfig                          |   16 +-
 arch/arm/mach-imx/clk-gate2.c                      |   12 +-
 arch/arm/mach-imx/clk-pllv3.c                      |    9 +-
 arch/arm/mach-imx/clk.h                            |   16 +-
 arch/arm/mach-imx/cpu_init.c                       |    5 +
 arch/arm/mach-imx/imx.c                            |    4 +
 arch/arm/mach-imx/include/mach/clock-vf610.h       |  215 ++++
 arch/arm/mach-imx/include/mach/debug_ll.h          |   27 +-
 arch/arm/mach-imx/include/mach/generic.h           |   13 +
 arch/arm/mach-imx/include/mach/imx_cpu_types.h     |    1 +
 arch/arm/mach-imx/include/mach/iomux-vf610.h       |  258 +++++
 arch/arm/mach-imx/include/mach/vf610-regs.h        |  126 ++
 arch/arm/mach-imx/ocotp.c                          |   51 +-
 common/Kconfig                                     |   10 +-
 drivers/clk/Makefile                               |    3 +-
 drivers/clk/clk-conf.c                             |  144 +++
 drivers/clk/clk.c                                  |   91 +-
 drivers/clk/imx/Makefile                           |    2 +
 drivers/clk/imx/clk-vf610.c                        | 1224 ++++++++++++++++++++
 drivers/clk/imx/clk.c                              |   49 +
 drivers/i2c/busses/i2c-imx.c                       |  215 +++-
 drivers/mci/imx-esdhc.c                            |  123 +-
 drivers/pinctrl/Kconfig                            |    5 +
 drivers/pinctrl/Makefile                           |    1 +
 drivers/pinctrl/pinctrl-vf610.c                    |  118 ++
 drivers/serial/Kconfig                             |    4 +
 drivers/serial/Makefile                            |    1 +
 drivers/serial/serial_lpuart.c                     |  217 ++++
 images/Makefile.imx                                |    5 +
 include/linux/clk/clk-conf.h                       |   22 +
 include/serial/lpuart.h                            |  281 +++++
 scripts/imx/imx.c                                  |    1 +
 39 files changed, 3575 insertions(+), 103 deletions(-)
 create mode 100644 arch/arm/boards/freescale-vf610-twr/Makefile
 create mode 100644 arch/arm/boards/freescale-vf610-twr/board.c
 create mode 100644 arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
 create mode 100644 arch/arm/boards/freescale-vf610-twr/lowlevel.c
 create mode 100644 arch/arm/dts/vf610-twr.dts
 create mode 100644 arch/arm/mach-imx/include/mach/clock-vf610.h
 create mode 100644 arch/arm/mach-imx/include/mach/iomux-vf610.h
 create mode 100644 arch/arm/mach-imx/include/mach/vf610-regs.h
 create mode 100644 drivers/clk/clk-conf.c
 create mode 100644 drivers/clk/imx/Makefile
 create mode 100644 drivers/clk/imx/clk-vf610.c
 create mode 100644 drivers/clk/imx/clk.c
 create mode 100644 drivers/pinctrl/pinctrl-vf610.c
 create mode 100644 drivers/serial/serial_lpuart.c
 create mode 100644 include/linux/clk/clk-conf.h
 create mode 100644 include/serial/lpuart.h

-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:38 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:38 -0700
Subject: [PATCH 01/20] i.MX: Add primitive functions for VF610 family
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-2-git-send-email-andrew.smirnov@gmail.com>

Add very basic functions to support VF610 family.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/Kconfig                      | 10 ++++++++++
 arch/arm/mach-imx/cpu_init.c                   |  5 +++++
 arch/arm/mach-imx/imx.c                        |  4 ++++
 arch/arm/mach-imx/include/mach/generic.h       | 13 +++++++++++++
 arch/arm/mach-imx/include/mach/imx_cpu_types.h |  1 +
 5 files changed, 33 insertions(+)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index a80bc6b..71862ef 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -149,6 +149,16 @@ config ARCH_IMX6SX
 	select OFTREE
 	select COMMON_CLK_OF_PROVIDER
 
+config ARCH_VF610
+	bool
+	select ARCH_HAS_L2X0
+	select ARCH_HAS_FEC_IMX
+	select CPU_V7
+	select PINCTRL
+	select OFTREE
+	select COMMON_CLK
+	select COMMON_CLK_OF_PROVIDER
+
 config IMX_MULTI_BOARDS
 	bool "Allow multiple boards to be selected"
 	select HAVE_DEFAULT_ENVIRONMENT_NEW
diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
index 7603883..6971d89 100644
--- a/arch/arm/mach-imx/cpu_init.c
+++ b/arch/arm/mach-imx/cpu_init.c
@@ -33,3 +33,8 @@ void imx6_cpu_lowlevel_init(void)
 	enable_arm_errata_794072_war();
 	enable_arm_errata_845369_war();
 }
+
+void vf610_cpu_lowlevel_init(void)
+{
+	arm_cpu_lowlevel_init();
+}
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 5ab6afc..eb2adcd 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -63,6 +63,8 @@ static int imx_soc_from_dt(void)
 		return IMX_CPU_IMX6;
 	if (of_machine_is_compatible("fsl,imx6qp"))
 		return IMX_CPU_IMX6;
+	if (of_machine_is_compatible("fsl,vf610"))
+		return IMX_CPU_VF610;
 
 	return 0;
 }
@@ -99,6 +101,8 @@ static int imx_init(void)
 		ret = imx53_init();
 	else if (cpu_is_mx6())
 		ret = imx6_init();
+	else if (cpu_is_vf610())
+		ret = 0;
 	else
 		return -EINVAL;
 
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h
index cadc501..ec35edc 100644
--- a/arch/arm/mach-imx/include/mach/generic.h
+++ b/arch/arm/mach-imx/include/mach/generic.h
@@ -41,6 +41,7 @@ int imx6_devices_init(void);
 
 void imx5_cpu_lowlevel_init(void);
 void imx6_cpu_lowlevel_init(void);
+void vf610_cpu_lowlevel_init(void);
 
 /* There's a off-by-one betweem the gpio bank number and the gpiochip */
 /* range e.g. GPIO_1_5 is gpio 5 under linux */
@@ -169,6 +170,18 @@ extern unsigned int __imx_cpu_type;
 # define cpu_is_mx6()		(0)
 #endif
 
+#ifdef CONFIG_ARCH_VF610
+# ifdef imx_cpu_type
+#  undef imx_cpu_type
+#  define imx_cpu_type __imx_cpu_type
+# else
+#  define imx_cpu_type IMX_CPU_VF610
+# endif
+# define cpu_is_vf610()		(imx_cpu_type == IMX_CPU_VF610)
+#else
+# define cpu_is_vf610()		(0)
+#endif
+
 #define cpu_is_mx23()	(0)
 #define cpu_is_mx28()	(0)
 
diff --git a/arch/arm/mach-imx/include/mach/imx_cpu_types.h b/arch/arm/mach-imx/include/mach/imx_cpu_types.h
index 8472488..50be0b6 100644
--- a/arch/arm/mach-imx/include/mach/imx_cpu_types.h
+++ b/arch/arm/mach-imx/include/mach/imx_cpu_types.h
@@ -11,5 +11,6 @@
 #define IMX_CPU_IMX51	51
 #define IMX_CPU_IMX53	53
 #define IMX_CPU_IMX6	6
+#define IMX_CPU_VF610	610
 
 #endif /* __MACH_IMX_CPU_TYPES_H */
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:46 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:46 -0700
Subject: [PATCH 09/20] i.MX: clk: Add IMX_PLLV3_USB_VF610 support
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-10-git-send-email-andrew.smirnov@gmail.com>

Add IMX_PLLV3_USB_VF610 PLLv3 types support clk-pllv3.c

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/clk-pllv3.c | 9 ++++++---
 arch/arm/mach-imx/clk.h       | 1 +
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index e38dcdf..29c0f1c 100644
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -36,6 +36,7 @@ struct clk_pllv3 {
 	void __iomem	*base;
 	bool		powerup_set;
 	u32		div_mask;
+	u32		div_shift;
 	const char	*parent;
 };
 
@@ -92,7 +93,7 @@ static unsigned long clk_pllv3_recalc_rate(struct clk *clk,
 					   unsigned long parent_rate)
 {
 	struct clk_pllv3 *pll = to_clk_pllv3(clk);
-	u32 div = readl(pll->base)  & pll->div_mask;
+	u32 div = (readl(pll->base) >> pll->div_shift) & pll->div_mask;
 
 	return (div == 1) ? parent_rate * 22 : parent_rate * 20;
 }
@@ -120,8 +121,8 @@ static int clk_pllv3_set_rate(struct clk *clk, unsigned long rate,
 		return -EINVAL;
 
 	val = readl(pll->base);
-	val &= ~pll->div_mask;
-	val |= div;
+	val &= ~(pll->div_mask << pll->div_shift);
+	val |= div << pll->div_shift;
 	writel(val, pll->base);
 
 	return 0;
@@ -292,6 +293,8 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
 	case IMX_PLLV3_SYS:
 		ops = &clk_pllv3_sys_ops;
 		break;
+	case IMX_PLLV3_USB_VF610:
+		pll->div_shift = 1;
 	case IMX_PLLV3_USB:
 		ops = &clk_pllv3_ops;
 		pll->powerup_set = true;
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 2aeb356..35e480f 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -71,6 +71,7 @@ enum imx_pllv3_type {
 	IMX_PLLV3_GENERIC,
 	IMX_PLLV3_SYS,
 	IMX_PLLV3_USB,
+	IMX_PLLV3_USB_VF610,
 	IMX_PLLV3_AV,
 	IMX_PLLV3_ENET,
 	IMX_PLLV3_MLB,
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:45 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:45 -0700
Subject: [PATCH 08/20] i.MX: clk: Port imx_clk_gate2_cgr()
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-9-git-send-email-andrew.smirnov@gmail.com>

Update clk-gate2 code to be able to accept arbitrary 'cgr' value and
introduce imx_clk_gate2_cgr() (Used by Vybrid clock tree)

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/clk-gate2.c | 12 +++++++-----
 arch/arm/mach-imx/clk.h       | 11 +++++++++--
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index faed631..f952f3e 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -26,6 +26,7 @@ struct clk_gate2 {
 	struct clk clk;
 	void __iomem *reg;
 	int shift;
+	u8 cgr_val;
 	const char *parent;
 #define CLK_GATE_INVERTED	(1 << 0)
 	unsigned flags;
@@ -43,7 +44,7 @@ static int clk_gate2_enable(struct clk *clk)
 	if (g->flags & CLK_GATE_INVERTED)
 		val &= ~(3 << g->shift);
 	else
-		val |= 3 << g->shift;
+		val |= g->cgr_val << g->shift;
 
 	writel(val, g->reg);
 
@@ -87,12 +88,13 @@ static struct clk_ops clk_gate2_ops = {
 };
 
 struct clk *clk_gate2_alloc(const char *name, const char *parent,
-		void __iomem *reg, u8 shift)
+			    void __iomem *reg, u8 shift, u8 cgr_val)
 {
 	struct clk_gate2 *g = xzalloc(sizeof(*g));
 
 	g->parent = parent;
 	g->reg = reg;
+	g->cgr_val = cgr_val;
 	g->shift = shift;
 	g->clk.ops = &clk_gate2_ops;
 	g->clk.name = name;
@@ -111,12 +113,12 @@ void clk_gate2_free(struct clk *clk)
 }
 
 struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
-		u8 shift)
+		      u8 shift, u8 cgr_val)
 {
 	struct clk *g;
 	int ret;
 
-	g = clk_gate2_alloc(name , parent, reg, shift);
+	g = clk_gate2_alloc(name , parent, reg, shift, cgr_val);
 
 	ret = clk_register(g);
 	if (ret) {
@@ -133,7 +135,7 @@ struct clk *clk_gate2_inverted(const char *name, const char *parent,
 	struct clk *clk;
 	struct clk_gate2 *g;
 
-	clk = clk_gate2(name, parent, reg, shift);
+	clk = clk_gate2(name, parent, reg, shift, 0x3);
 	if (IS_ERR(clk))
 		return clk;
 
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index c5913e1..2aeb356 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -2,7 +2,7 @@
 #define __IMX_CLK_H
 
 struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
-		u8 shift);
+		      u8 shift, u8 cgr_val);
 
 static inline struct clk *imx_clk_divider(const char *name, const char *parent,
 		void __iomem *reg, u8 shift, u8 width)
@@ -51,9 +51,16 @@ static inline struct clk *imx_clk_gate(const char *name, const char *parent,
 static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {
-	return clk_gate2(name, parent, reg, shift);
+	return clk_gate2(name, parent, reg, shift, 0x3);
 }
 
+static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent,
+					    void __iomem *reg, u8 shift, u8 cgr_val)
+{
+	return clk_gate2(name, parent, reg, shift, cgr_val);
+}
+
+
 struct clk *imx_clk_pllv1(const char *name, const char *parent,
 		void __iomem *base);
 
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:40 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:40 -0700
Subject: [PATCH 03/20] i.MX: scripts: Add "vf610" soc to imx-image
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-4-git-send-email-andrew.smirnov@gmail.com>

Needed in order to support Vybrid SoCs.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 scripts/imx/imx.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c
index c8ee309..bd48321 100644
--- a/scripts/imx/imx.c
+++ b/scripts/imx/imx.c
@@ -223,6 +223,7 @@ static struct soc_type socs[] = {
 	{ .name = "imx51", .header_version = 1, .cpu_type = IMX_CPU_IMX51 },
 	{ .name = "imx53", .header_version = 2, .cpu_type = IMX_CPU_IMX53 },
 	{ .name = "imx6", .header_version = 2, .cpu_type = IMX_CPU_IMX6 },
+	{ .name = "vf610", .header_version = 2, .cpu_type = IMX_CPU_VF610 },
 };
 
 static int do_soc(struct config_data *data, int argc, char *argv[])
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:47 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:47 -0700
Subject: [PATCH 10/20] i.MX: clk: Port imx_check_clocks() and
 imx_obtain_fixed_clock()
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-11-git-send-email-andrew.smirnov@gmail.com>

Port imx_check_clocks() and imx_obtain_fixed_clock() from Linux kernel.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/clk.h  |  4 ++++
 drivers/clk/Makefile     |  1 +
 drivers/clk/imx/Makefile |  1 +
 drivers/clk/imx/clk.c    | 49 ++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 55 insertions(+)
 create mode 100644 drivers/clk/imx/Makefile
 create mode 100644 drivers/clk/imx/clk.c

diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 35e480f..f96e5d2 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -109,4 +109,8 @@ static inline struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg,
 struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
 		void __iomem *reg, u8 shift, u32 exclusive_mask);
 
+void imx_check_clocks(struct clk *clks[], unsigned int count);
+struct clk * __init imx_obtain_fixed_clock(const char *name, unsigned long rate);
+
+
 #endif /* __IMX_CLK_H */
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 0fe8f1e..6dc82ea 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_ARCH_ROCKCHIP)	+= rockchip/
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
 obj-$(CONFIG_CLK_SOCFPGA)	+= socfpga.o
 obj-$(CONFIG_MACH_MIPS_ATH79)	+= clk-ar933x.o
+obj-$(CONFIG_COMMON_CLK)	+= imx/
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
new file mode 100644
index 0000000..0303c0b
--- /dev/null
+++ b/drivers/clk/imx/Makefile
@@ -0,0 +1 @@
+obj-y += clk.o
diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
new file mode 100644
index 0000000..0357048
--- /dev/null
+++ b/drivers/clk/imx/clk.c
@@ -0,0 +1,49 @@
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <linux/clk.h>
+#include <io.h>
+#include <of.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+
+#include "../../../arch/arm/mach-imx/clk.h"
+
+void __init imx_check_clocks(struct clk *clks[], unsigned int count)
+{
+	unsigned i;
+
+	for (i = 0; i < count; i++)
+		if (IS_ERR(clks[i]))
+			pr_err("i.MX clk %u: register failed with %ld\n",
+			       i, PTR_ERR(clks[i]));
+}
+
+static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
+{
+	struct of_phandle_args phandle;
+	struct clk *clk = ERR_PTR(-ENODEV);
+	char *path;
+
+	path = basprintf("/clocks/%s", name);
+	if (!path)
+		return ERR_PTR(-ENOMEM);
+
+	phandle.np = of_find_node_by_path(path);
+	kfree(path);
+
+	if (phandle.np)
+		clk = of_clk_get_from_provider(&phandle);
+
+	return clk;
+}
+
+struct clk * __init imx_obtain_fixed_clock(const char *name, unsigned long rate)
+{
+	struct clk *clk;
+
+	clk = imx_obtain_fixed_clock_from_dt(name);
+	if (IS_ERR(clk))
+		clk = clk_fixed(name, rate);
+	return clk;
+}
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:49 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:49 -0700
Subject: [PATCH 12/20] vf610: Give enet_osc explicit "enet_ext" name
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-13-git-send-email-andrew.smirnov@gmail.com>

Give enet_osc explicit "enet_ext" name, since without it, Barebox
version of clk_set_parent fails when trying to re-parent "enet_sel".

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/dts/vf610-twr.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
index 54b4435..5947fdb 100644
--- a/arch/arm/dts/vf610-twr.dts
+++ b/arch/arm/dts/vf610-twr.dts
@@ -12,3 +12,7 @@
 &usbdev0 {
 	status = "disabled";
 };
+
+&enet_ext {
+	clock-output-names = "enet_ext";
+};
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:42 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:42 -0700
Subject: [PATCH 05/20] i.MX: Add pinctrl driver for VF610
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-6-git-send-email-andrew.smirnov@gmail.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/pinctrl/Kconfig         |   5 ++
 drivers/pinctrl/Makefile        |   1 +
 drivers/pinctrl/pinctrl-vf610.c | 118 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 124 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-vf610.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 5c69928..12fff4f 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -77,4 +77,9 @@ config PINCTRL_TEGRA_XUSB
 
 source drivers/pinctrl/mvebu/Kconfig
 
+config PINCTRL_VF610
+	bool
+	default y if ARCH_VF610
+	help
+	  Pinmux controller found on Vybrid VF610 family of SoCs
 endif
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index af9b30d..9450dbb 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -9,5 +9,6 @@ obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
 obj-$(CONFIG_PINCTRL_TEGRA20) += pinctrl-tegra20.o
 obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o
 obj-$(CONFIG_PINCTRL_TEGRA_XUSB) += pinctrl-tegra-xusb.o
+obj-$(CONFIG_PINCTRL_VF610) += pinctrl-vf610.o
 
 obj-$(CONFIG_ARCH_MVEBU) += mvebu/
diff --git a/drivers/pinctrl/pinctrl-vf610.c b/drivers/pinctrl/pinctrl-vf610.c
new file mode 100644
index 0000000..e1d59e9
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-vf610.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2016 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <of.h>
+#include <pinctrl.h>
+#include <malloc.h>
+
+enum {
+	PINCTRL_VF610_MUX_LINE_SIZE = 20,
+	PINCTRL_VF610_MUX_SHIFT = 20,
+};
+
+struct pinctrl_vf610 {
+	void __iomem *base;
+	struct pinctrl_device pinctrl;
+};
+
+static int pinctrl_vf610_set_state(struct pinctrl_device *pdev,
+				   struct device_node *np)
+{
+	const __be32 *list;
+	int npins, size, i;
+
+	struct pinctrl_vf610 *iomux =
+		container_of(pdev, struct pinctrl_vf610, pinctrl);
+
+	dev_dbg(pdev->dev, "%s: %s\n", __func__, np->full_name);
+
+	list = of_get_property(np, "fsl,pins", &size);
+	if (!list)
+		return -EINVAL;
+
+	if (!size || size % PINCTRL_VF610_MUX_LINE_SIZE) {
+		dev_err(pdev->dev, "Invalid fsl,pins property in %s\n",
+			np->full_name);
+		return -EINVAL;
+	}
+
+	npins = size / PINCTRL_VF610_MUX_LINE_SIZE;
+
+	for (i = 0; i < npins; i++) {
+		u32 mux_reg   = be32_to_cpu(*list++);
+		u32 input_reg = be32_to_cpu(*list++);
+		u32 mux_val   = be32_to_cpu(*list++);
+		u32 input_val = be32_to_cpu(*list++);
+		u32 conf_val  = be32_to_cpu(*list++);
+
+		writel(mux_val << PINCTRL_VF610_MUX_SHIFT | conf_val,
+		       iomux->base + mux_reg);
+
+		if (input_reg)
+			writel(input_val, iomux->base + input_reg);
+	}
+
+	return 0;
+}
+
+static struct pinctrl_ops pinctrl_vf610_ops = {
+	.set_state = pinctrl_vf610_set_state,
+};
+
+static int pinctrl_vf610_probe(struct device_d *dev)
+{
+	int ret;
+	struct resource *io;
+	struct pinctrl_vf610 *iomux;
+
+	iomux = xzalloc(sizeof(*iomux));
+
+	io = dev_request_mem_resource(dev, 0);
+	if (IS_ERR(io))
+		return PTR_ERR(io);
+
+	iomux->base = IOMEM(io->start);
+	iomux->pinctrl.dev = dev;
+	iomux->pinctrl.ops = &pinctrl_vf610_ops;
+
+	ret = pinctrl_register(&iomux->pinctrl);
+	if (ret)
+		free(iomux);
+
+	return ret;
+}
+
+static __maybe_unused struct of_device_id pinctrl_vf610_dt_ids[] = {
+	{ .compatible = "fsl,vf610-iomuxc", },
+	{ /* sentinel */ }
+};
+
+static struct driver_d pinctrl_vf610_driver = {
+	.name		= "vf610-pinctrl",
+	.probe		= pinctrl_vf610_probe,
+	.of_compatible	= DRV_OF_COMPAT(pinctrl_vf610_dt_ids),
+};
+
+static int pinctrl_vf610_init(void)
+{
+	return platform_driver_register(&pinctrl_vf610_driver);
+}
+postcore_initcall(pinctrl_vf610_init);
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:43 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:43 -0700
Subject: [PATCH 06/20] clk: Port clock dependency resolution code
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-7-git-send-email-andrew.smirnov@gmail.com>

Port the clock dependency resolution algorithm utilized by Linux
kernel's version of of_clk_init(), to allow for SoCs whose DT clock
configuration reqires such behaviour for correct initialization (Vybrid
is one such example).

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/clk/clk.c | 89 ++++++++++++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 82 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 630a84d..a38f339 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(of_clk_del_provider);
 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
 {
 	struct of_clk_provider *provider;
-	struct clk *clk = ERR_PTR(-ENOENT);
+	struct clk *clk = ERR_PTR(-EPROBE_DEFER);
 
 	/* Check if we have such a provider in our array */
 	list_for_each_entry(provider, &of_clk_providers, link) {
@@ -437,6 +437,47 @@ char *of_clk_get_parent_name(struct device_node *np, unsigned int index)
 }
 EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
 
+struct clock_provider {
+	of_clk_init_cb_t clk_init_cb;
+	struct device_node *np;
+	struct list_head node;
+};
+
+/*
+ * This function looks for a parent clock. If there is one, then it
+ * checks that the provider for this parent clock was initialized, in
+ * this case the parent clock will be ready.
+ */
+static int parent_ready(struct device_node *np)
+{
+	int i = 0;
+
+	while (true) {
+		struct clk *clk = of_clk_get(np, i);
+
+		/* this parent is ready we can check the next one */
+		if (!IS_ERR(clk)) {
+			clk_put(clk);
+			i++;
+			continue;
+		}
+
+		/* at least one parent is not ready, we exit now */
+		if (PTR_ERR(clk) == -EPROBE_DEFER)
+			return 0;
+
+		/*
+		 * Here we make assumption that the device tree is
+		 * written correctly. So an error means that there is
+		 * no more parent. As we didn't exit yet, then the
+		 * previous parent are ready. If there is no clock
+		 * parent, no need to wait for them, then we can
+		 * consider their absence as being ready
+		 */
+		return 1;
+	}
+}
+
 /**
  * of_clk_init() - Scan and init clock providers from the DT
  * @root: parent of the first level to probe or NULL for the root of the tree
@@ -449,8 +490,11 @@ EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
  */
 int of_clk_init(struct device_node *root, const struct of_device_id *matches)
 {
+	struct clock_provider *clk_provider, *next;
+	bool is_init_done;
+	bool force = false;
+	LIST_HEAD(clk_provider_list);
 	const struct of_device_id *match;
-	int rc;
 
 	if (!root)
 		root = of_find_node_by_path("/");
@@ -459,12 +503,43 @@ int of_clk_init(struct device_node *root, const struct of_device_id *matches)
 	if (!matches)
 		matches = __clk_of_table_start;
 
+	/* First prepare the list of the clocks providers */
 	for_each_matching_node_and_match(root, matches, &match) {
-		of_clk_init_cb_t clk_init_cb = (of_clk_init_cb_t)match->data;
-		rc = clk_init_cb(root);
-		if (rc)
-			pr_err("%s: failed to init clock for %s: %d\n",
-			       __func__, root->full_name, rc);
+		struct clock_provider *parent;
+
+		if (!of_device_is_available(root))
+			continue;
+
+		parent = xzalloc(sizeof(*parent));
+
+		parent->clk_init_cb = match->data;
+		parent->np = root;
+		list_add_tail(&parent->node, &clk_provider_list);
+	}
+
+	while (!list_empty(&clk_provider_list)) {
+		is_init_done = false;
+		list_for_each_entry_safe(clk_provider, next,
+					 &clk_provider_list, node) {
+
+			if (force || parent_ready(clk_provider->np)) {
+
+				clk_provider->clk_init_cb(clk_provider->np);
+
+				list_del(&clk_provider->node);
+				free(clk_provider);
+				is_init_done = true;
+			}
+		}
+
+		/*
+		 * We didn't manage to initialize any of the
+		 * remaining providers during the last loop, so now we
+		 * initialize all the remaining ones unconditionally
+		 * in case the clock parent was not mandatory
+		 */
+		if (!is_init_done)
+			force = true;
 	}
 
 	return 0;
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:44 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:44 -0700
Subject: [PATCH 07/20] clk: Port of_clk_set_defautls()
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-8-git-send-email-andrew.smirnov@gmail.com>

Port of_clk_set_defautls() from Linux kernel in order to support DT
configurations that require it (e. g. Vybrid).

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/clk/Makefile         |   2 +-
 drivers/clk/clk-conf.c       | 144 +++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/clk.c            |   2 +
 include/linux/clk/clk-conf.h |  22 +++++++
 4 files changed, 169 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/clk-conf.c
 create mode 100644 include/linux/clk/clk-conf.h

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 47ed7b1..0fe8f1e 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -1,6 +1,6 @@
 obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o \
 				clk-mux.o clk-gate.o clk-composite.o \
-				clk-fractional-divider.o
+				clk-fractional-divider.o clk-conf.o
 obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
 
 obj-$(CONFIG_ARCH_MVEBU)	+= mvebu/
diff --git a/drivers/clk/clk-conf.c b/drivers/clk/clk-conf.c
new file mode 100644
index 0000000..961fad8
--- /dev/null
+++ b/drivers/clk/clk-conf.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics Co., Ltd.
+ * Sylwester Nawrocki <s.nawrocki at samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <io.h>
+#include <malloc.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/clk/clk-conf.h>
+
+static int __set_clk_parents(struct device_node *node, bool clk_supplier)
+{
+	struct of_phandle_args clkspec;
+	int index, rc, num_parents;
+	struct clk *clk, *pclk;
+
+	num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
+						 "#clock-cells");
+	if (num_parents == -EINVAL)
+		pr_err("clk: invalid value of clock-parents property at %s\n",
+		       node->full_name);
+
+	for (index = 0; index < num_parents; index++) {
+		rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
+					"#clock-cells",	index, &clkspec);
+		if (rc < 0) {
+			/* skip empty (null) phandles */
+			if (rc == -ENOENT)
+				continue;
+			else
+				return rc;
+		}
+		if (clkspec.np == node && !clk_supplier)
+			return 0;
+		pclk = of_clk_get_from_provider(&clkspec);
+		if (IS_ERR(pclk)) {
+			pr_warn("clk: couldn't get parent clock %d for %s\n",
+				index, node->full_name);
+			return PTR_ERR(pclk);
+		}
+
+		rc = of_parse_phandle_with_args(node, "assigned-clocks",
+					"#clock-cells", index, &clkspec);
+		if (rc < 0)
+			goto err;
+		if (clkspec.np == node && !clk_supplier) {
+			rc = 0;
+			goto err;
+		}
+		clk = of_clk_get_from_provider(&clkspec);
+		if (IS_ERR(clk)) {
+			pr_warn("clk: couldn't get parent clock %d for %s\n",
+				index, node->full_name);
+			rc = PTR_ERR(clk);
+			goto err;
+		}
+
+		rc = clk_set_parent(clk, pclk);
+		if (rc < 0)
+			pr_err("clk: failed to reparent %s to %s: %d\n",
+			       __clk_get_name(clk), __clk_get_name(pclk), rc);
+		clk_put(clk);
+		clk_put(pclk);
+	}
+	return 0;
+err:
+	clk_put(pclk);
+	return rc;
+}
+
+static int __set_clk_rates(struct device_node *node, bool clk_supplier)
+{
+	struct of_phandle_args clkspec;
+	struct property	*prop;
+	const __be32 *cur;
+	int rc, index = 0;
+	struct clk *clk;
+	u32 rate;
+
+	of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
+		if (rate) {
+			rc = of_parse_phandle_with_args(node, "assigned-clocks",
+					"#clock-cells",	index, &clkspec);
+			if (rc < 0) {
+				/* skip empty (null) phandles */
+				if (rc == -ENOENT)
+					continue;
+				else
+					return rc;
+			}
+			if (clkspec.np == node && !clk_supplier)
+				return 0;
+
+			clk = of_clk_get_from_provider(&clkspec);
+			if (IS_ERR(clk)) {
+				pr_warn("clk: couldn't get clock %d for %s\n",
+					index, node->full_name);
+				return PTR_ERR(clk);
+			}
+
+			rc = clk_set_rate(clk, rate);
+			if (rc < 0)
+				pr_err("clk: couldn't set %s clk rate to %d (%d), current rate: %ld\n",
+				       __clk_get_name(clk), rate, rc,
+				       clk_get_rate(clk));
+			clk_put(clk);
+		}
+		index++;
+	}
+	return 0;
+}
+
+/**
+ * of_clk_set_defaults() - parse and set assigned clocks configuration
+ * @node: device node to apply clock settings for
+ * @clk_supplier: true if clocks supplied by @node should also be considered
+ *
+ * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
+ * and sets any specified clock parents and rates. The @clk_supplier argument
+ * should be set to true if @node may be also a clock supplier of any clock
+ * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
+ * If @clk_supplier is false the function exits returning 0 as soon as it
+ * determines the @node is also a supplier of any of the clocks.
+ */
+int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
+{
+	int rc;
+
+	if (!node)
+		return 0;
+
+	rc = __set_clk_parents(node, clk_supplier);
+	if (rc < 0)
+		return rc;
+
+	return __set_clk_rates(node, clk_supplier);
+}
+EXPORT_SYMBOL_GPL(of_clk_set_defaults);
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a38f339..28a1be5 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -19,6 +19,7 @@
 #include <malloc.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <linux/clk/clk-conf.h>
 
 static LIST_HEAD(clks);
 
@@ -525,6 +526,7 @@ int of_clk_init(struct device_node *root, const struct of_device_id *matches)
 			if (force || parent_ready(clk_provider->np)) {
 
 				clk_provider->clk_init_cb(clk_provider->np);
+				of_clk_set_defaults(clk_provider->np, true);
 
 				list_del(&clk_provider->node);
 				free(clk_provider);
diff --git a/include/linux/clk/clk-conf.h b/include/linux/clk/clk-conf.h
new file mode 100644
index 0000000..2c0a39e
--- /dev/null
+++ b/include/linux/clk/clk-conf.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics Co., Ltd.
+ * Sylwester Nawrocki <s.nawrocki at samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/types.h>
+
+struct device_node;
+
+#if defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK)
+int of_clk_set_defaults(struct device_node *node, bool clk_supplier);
+#else
+static inline int of_clk_set_defaults(struct device_node *node,
+				      bool clk_supplier)
+{
+	return 0;
+}
+#endif
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:39 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:39 -0700
Subject: [PATCH 02/20] i.MX: Add DEBUG_LL hooks for VF610
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-3-git-send-email-andrew.smirnov@gmail.com>

Add code to support DEBUG_LL functionality on VF610/Vybrid platform.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/include/mach/debug_ll.h   |  27 ++-
 arch/arm/mach-imx/include/mach/vf610-regs.h | 126 +++++++++++++
 common/Kconfig                              |  10 +-
 include/serial/lpuart.h                     | 265 ++++++++++++++++++++++++++++
 4 files changed, 426 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-imx/include/mach/vf610-regs.h
 create mode 100644 include/serial/lpuart.h

diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h b/arch/arm/mach-imx/include/mach/debug_ll.h
index 5c2db6c..a132f3c 100644
--- a/arch/arm/mach-imx/include/mach/debug_ll.h
+++ b/arch/arm/mach-imx/include/mach/debug_ll.h
@@ -14,8 +14,10 @@
 #include <mach/imx51-regs.h>
 #include <mach/imx53-regs.h>
 #include <mach/imx6-regs.h>
+#include <mach/vf610-regs.h>
 
 #include <serial/imx-uart.h>
+#include <serial/lpuart.h>
 
 #ifdef CONFIG_DEBUG_LL
 
@@ -42,6 +44,8 @@
 #define IMX_DEBUG_SOC MX53
 #elif defined CONFIG_DEBUG_IMX6Q_UART
 #define IMX_DEBUG_SOC MX6
+#elif defined CONFIG_DEBUG_VF610_UART
+#define IMX_DEBUG_SOC VF610
 #else
 #error "unknown i.MX debug uart soc type"
 #endif
@@ -74,6 +78,13 @@ static inline void imx6_uart_setup_ll(void)
 	imx6_uart_setup(base);
 }
 
+static inline void vf610_uart_setup_ll(void)
+{
+	void *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, CONFIG_DEBUG_IMX_UART_PORT));
+
+	lpuart_setup(base, 66000000);
+}
+
 static inline void PUTC_LL(int c)
 {
 	void __iomem *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC,
@@ -82,14 +93,19 @@ static inline void PUTC_LL(int c)
 	if (!base)
 		return;
 
-	imx_uart_putc(base, c);
+	if (IS_ENABLED(CONFIG_DEBUG_VF610_UART))
+		lpuart_putc(base, c);
+	else
+		imx_uart_putc(base, c);
 }
+
 #else
 
 static inline void imx50_uart_setup_ll(void) {}
 static inline void imx51_uart_setup_ll(void) {}
 static inline void imx53_uart_setup_ll(void) {}
 static inline void imx6_uart_setup_ll(void)  {}
+static inline void vf610_uart_setup_ll(void) {}
 
 #endif /* CONFIG_DEBUG_LL */
 
@@ -115,4 +131,13 @@ static inline void imx53_ungate_all_peripherals(void)
 	imx_ungate_all_peripherals(IOMEM(MX53_CCM_BASE_ADDR));
 }
 
+static inline void vf610_ungate_all_peripherals(void)
+{
+	void __iomem *ccmbase = IOMEM(VF610_CCM_BASE_ADDR);
+	int i;
+
+	for (i = 0x40; i <= 0x6c; i += 4)
+		writel(0xffffffff, ccmbase + i);
+}
+
 #endif /* __MACH_DEBUG_LL_H__ */
diff --git a/arch/arm/mach-imx/include/mach/vf610-regs.h b/arch/arm/mach-imx/include/mach/vf610-regs.h
new file mode 100644
index 0000000..a1c1a09
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/vf610-regs.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright 2013-2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_IMX_REGS_H__
+#define __ASM_ARCH_IMX_REGS_H__
+
+#define VF610_IRAM_BASE_ADDR		0x3F000000	/* internal ram */
+#define VF610_IRAM_SIZE			0x00080000	/* 512 KB */
+
+#define VF610_AIPS0_BASE_ADDR		0x40000000
+#define VF610_AIPS1_BASE_ADDR		0x40080000
+
+/* AIPS 0 */
+#define VF610_MSCM_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00001000)
+#define VF610_MSCM_IR_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00001800)
+#define VF610_CA5SCU_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00002000)
+#define VF610_CA5_INTD_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00003000)
+#define VF610_CA5_L2C_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00006000)
+#define VF610_NIC0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00008000)
+#define VF610_NIC1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00009000)
+#define VF610_NIC2_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0000A000)
+#define VF610_NIC3_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0000B000)
+#define VF610_NIC4_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0000C000)
+#define VF610_NIC5_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0000D000)
+#define VF610_NIC6_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0000E000)
+#define VF610_NIC7_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0000F000)
+#define VF610_AHBTZASC_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00010000)
+#define VF610_TZASC_SYS0_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00011000)
+#define VF610_TZASC_SYS1_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00012000)
+#define VF610_TZASC_GFX_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00013000)
+#define VF610_TZASC_DDR0_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00014000)
+#define VF610_TZASC_DDR1_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00015000)
+#define VF610_CSU_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00017000)
+#define VF610_DMA0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00018000)
+#define VF610_DMA0_TCD_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00019000)
+#define VF610_SEMA4_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0001D000)
+#define VF610_FB_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0001E000)
+#define VF610_DMA_MUX0_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00024000)
+#define VF610_UART1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00027000)
+#define VF610_UART2_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00028000)
+#define VF610_UART3_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00029000)
+#define VF610_UART4_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0002A000)
+#define VF610_SPI0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0002C000)
+#define VF610_SPI1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0002D000)
+#define VF610_SAI0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0002F000)
+#define VF610_SAI1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00030000)
+#define VF610_SAI2_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00031000)
+#define VF610_SAI3_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00032000)
+#define VF610_CRC_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00033000)
+#define VF610_USBC0_BASE_ADDR     	(VF610_AIPS0_BASE_ADDR + 0x00034000)
+#define VF610_PDB_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00036000)
+#define VF610_PIT_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00037000)
+#define VF610_FTM0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00038000)
+#define VF610_FTM1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00039000)
+#define VF610_ADC_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0003B000)
+#define VF610_TCON0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0003D000)
+#define VF610_WDOG1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0003E000)
+#define VF610_LPTMR_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00040000)
+#define VF610_RLE_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00042000)
+#define VF610_MLB_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00043000)
+#define VF610_QSPI0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00044000)
+#define VF610_IOMUXC_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00048000)
+#define VF610_ANADIG_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00050000)
+#define VF610_USB_PHY0_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00050800)
+#define VF610_USB_PHY1_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00050C00)
+#define VF610_SCSC_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00052000)
+#define VF610_ASRC_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00060000)
+#define VF610_SPDIF_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00061000)
+#define VF610_ESAI_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00062000)
+#define VF610_ESAI_FIFO_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x00063000)
+#define VF610_WDOG_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00065000)
+#define VF610_I2C1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00066000)
+#define VF610_I2C2_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x00067000)
+#define VF610_I2C3_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x000E6000)
+#define VF610_I2C4_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x000E7000)
+#define VF610_WKUP_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0006A000)
+#define VF610_CCM_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0006B000)
+#define VF610_GPC_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0006C000)
+#define VF610_VREG_DIG_BASE_ADDR	(VF610_AIPS0_BASE_ADDR + 0x0006D000)
+#define VF610_SRC_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0006E000)
+#define VF610_CMU_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x0006F000)
+#define VF610_GPIO0_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x000FF000)
+#define VF610_GPIO1_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x000FF040)
+#define VF610_GPIO2_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x000FF080)
+#define VF610_GPIO3_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x000FF0C0)
+#define VF610_GPIO4_BASE_ADDR		(VF610_AIPS0_BASE_ADDR + 0x000FF100)
+
+/* AIPS 1 */
+#define VF610_OCOTP_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x00025000)
+#define VF610_DDR_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x0002E000)
+#define VF610_ESDHC0_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x00031000)
+#define VF610_ESDHC1_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x00032000)
+#define VF610_USBC1_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x00034000)
+#define VF610_ENET_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x00050000)
+#define VF610_ENET1_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x00051000)
+#define VF610_NFC_BASE_ADDR		(VF610_AIPS1_BASE_ADDR + 0x00060000)
+
+#define VF610_QSPI0_AMBA_BASE		0x20000000
+
+
+/* MSCM interrupt rounter */
+#define VF610_MSCM_IRSPRC(n)				(0x880 + 2 * (n))
+#define VF610_MSCM_CPxTYPE					0
+#define VF610_MSCM_IRSPRC_CP0_EN				1
+#define VF610_MSCM_IRSPRC_NUM					112
+
+/* System Reset Controller (SRC) */
+#define SRC_SRSR_SW_RST					(0x1 << 18)
+#define SRC_SRSR_RESETB					(0x1 << 7)
+#define SRC_SRSR_JTAG_RST				(0x1 << 5)
+#define SRC_SRSR_WDOG_M4				(0x1 << 4)
+#define SRC_SRSR_WDOG_A5				(0x1 << 3)
+#define SRC_SRSR_POR_RST				(0x1 << 0)
+#define SRC_SBMR2_BMOD_MASK             (0x3 << 24)
+#define SRC_SBMR2_BMOD_SHIFT            24
+#define SRC_SBMR2_BMOD_FUSES            0x0
+#define SRC_SBMR2_BMOD_SERIAL           0x1
+#define SRC_SBMR2_BMOD_RCON             0x2
+
+/* Slow Clock Source Controller Module (SCSC) */
+#define SCSC_SOSC_CTR_SOSC_EN            0x1
+
+#endif	/* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/common/Kconfig b/common/Kconfig
index f2badc7..3f1583f 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -1071,6 +1071,13 @@ config DEBUG_IMX6Q_UART
 	  Say Y here if you want kernel low-level debugging support
 	  on i.MX6Q.
 
+config DEBUG_VF610_UART
+	bool "VF610 Debug UART"
+	depends on ARCH_VF610
+	help
+	  Say Y here if you want kernel low-level debugging support
+	  on VF610.
+
 config DEBUG_OMAP3_UART
 	bool "OMAP3 Debug UART"
 	depends on ARCH_OMAP3
@@ -1111,7 +1118,8 @@ config DEBUG_IMX_UART_PORT
 						DEBUG_IMX51_UART || \
 						DEBUG_IMX53_UART || \
 						DEBUG_IMX6Q_UART || \
-						DEBUG_IMX6SL_UART
+						DEBUG_IMX6SL_UART || \
+						DEBUG_VF610_UART
 	default 1
 	depends on ARCH_IMX
 	help
diff --git a/include/serial/lpuart.h b/include/serial/lpuart.h
new file mode 100644
index 0000000..13077f9
--- /dev/null
+++ b/include/serial/lpuart.h
@@ -0,0 +1,265 @@
+/*
+ * Copyright (c) 2016 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
+ *
+ * Based on code found in Linux kernel and U-Boot.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LPUART_H__
+#define __LPUART_H__
+
+
+/* All registers are 8-bit width */
+#define UARTBDH			0x00
+#define UARTBDL			0x01
+#define UARTCR1			0x02
+#define UARTCR2			0x03
+#define UARTSR1			0x04
+#define UARTCR3			0x06
+#define UARTDR			0x07
+#define UARTCR4			0x0a
+#define UARTCR5			0x0b
+#define UARTMODEM		0x0d
+#define UARTPFIFO		0x10
+#define UARTCFIFO		0x11
+#define UARTSFIFO		0x12
+#define UARTTWFIFO		0x13
+#define UARTTCFIFO		0x14
+#define UARTRWFIFO		0x15
+#define UARTRCFIFO		0x16
+
+#define UARTBDH_LBKDIE		0x80
+#define UARTBDH_RXEDGIE		0x40
+#define UARTBDH_SBR_MASK	0x1f
+
+#define UARTCR1_LOOPS		0x80
+#define UARTCR1_RSRC		0x20
+#define UARTCR1_M		0x10
+#define UARTCR1_WAKE		0x08
+#define UARTCR1_ILT		0x04
+#define UARTCR1_PE		0x02
+#define UARTCR1_PT		0x01
+
+#define UARTCR2_TIE		0x80
+#define UARTCR2_TCIE		0x40
+#define UARTCR2_RIE		0x20
+#define UARTCR2_ILIE		0x10
+#define UARTCR2_TE		0x08
+#define UARTCR2_RE		0x04
+#define UARTCR2_RWU		0x02
+#define UARTCR2_SBK		0x01
+
+#define UARTSR1_TDRE		0x80
+#define UARTSR1_TC		0x40
+#define UARTSR1_RDRF		0x20
+#define UARTSR1_IDLE		0x10
+#define UARTSR1_OR		0x08
+#define UARTSR1_NF		0x04
+#define UARTSR1_FE		0x02
+#define UARTSR1_PE		0x01
+
+#define UARTCR3_R8		0x80
+#define UARTCR3_T8		0x40
+#define UARTCR3_TXDIR		0x20
+#define UARTCR3_TXINV		0x10
+#define UARTCR3_ORIE		0x08
+#define UARTCR3_NEIE		0x04
+#define UARTCR3_FEIE		0x02
+#define UARTCR3_PEIE		0x01
+
+#define UARTCR4_MAEN1		0x80
+#define UARTCR4_MAEN2		0x40
+#define UARTCR4_M10		0x20
+#define UARTCR4_BRFA_MASK	0x1f
+#define UARTCR4_BRFA_OFF	0
+
+#define UARTCR5_TDMAS		0x80
+#define UARTCR5_RDMAS		0x20
+
+#define UARTMODEM_RXRTSE	0x08
+#define UARTMODEM_TXRTSPOL	0x04
+#define UARTMODEM_TXRTSE	0x02
+#define UARTMODEM_TXCTSE	0x01
+
+#define UARTPFIFO_TXFE		0x80
+#define UARTPFIFO_FIFOSIZE_MASK	0x7
+#define UARTPFIFO_TXSIZE_OFF	4
+#define UARTPFIFO_RXFE		0x08
+#define UARTPFIFO_RXSIZE_OFF	0
+
+#define UARTCFIFO_TXFLUSH	0x80
+#define UARTCFIFO_RXFLUSH	0x40
+#define UARTCFIFO_RXOFE		0x04
+#define UARTCFIFO_TXOFE		0x02
+#define UARTCFIFO_RXUFE		0x01
+
+#define UARTSFIFO_TXEMPT	0x80
+#define UARTSFIFO_RXEMPT	0x40
+#define UARTSFIFO_RXOF		0x04
+#define UARTSFIFO_TXOF		0x02
+#define UARTSFIFO_RXUF		0x01
+
+/* 32-bit register defination */
+#define UARTBAUD		0x00
+#define UARTSTAT		0x04
+#define UARTCTRL		0x08
+#define UARTDATA		0x0C
+#define UARTMATCH		0x10
+#define UARTMODIR		0x14
+#define UARTFIFO		0x18
+#define UARTWATER		0x1c
+
+#define UARTBAUD_MAEN1		0x80000000
+#define UARTBAUD_MAEN2		0x40000000
+#define UARTBAUD_M10		0x20000000
+#define UARTBAUD_TDMAE		0x00800000
+#define UARTBAUD_RDMAE		0x00200000
+#define UARTBAUD_MATCFG		0x00400000
+#define UARTBAUD_BOTHEDGE	0x00020000
+#define UARTBAUD_RESYNCDIS	0x00010000
+#define UARTBAUD_LBKDIE		0x00008000
+#define UARTBAUD_RXEDGIE	0x00004000
+#define UARTBAUD_SBNS		0x00002000
+#define UARTBAUD_SBR		0x00000000
+#define UARTBAUD_SBR_MASK	0x1fff
+
+#define UARTSTAT_LBKDIF		0x80000000
+#define UARTSTAT_RXEDGIF	0x40000000
+#define UARTSTAT_MSBF		0x20000000
+#define UARTSTAT_RXINV		0x10000000
+#define UARTSTAT_RWUID		0x08000000
+#define UARTSTAT_BRK13		0x04000000
+#define UARTSTAT_LBKDE		0x02000000
+#define UARTSTAT_RAF		0x01000000
+#define UARTSTAT_TDRE		0x00800000
+#define UARTSTAT_TC		0x00400000
+#define UARTSTAT_RDRF		0x00200000
+#define UARTSTAT_IDLE		0x00100000
+#define UARTSTAT_OR		0x00080000
+#define UARTSTAT_NF		0x00040000
+#define UARTSTAT_FE		0x00020000
+#define UARTSTAT_PE		0x00010000
+#define UARTSTAT_MA1F		0x00008000
+#define UARTSTAT_M21F		0x00004000
+
+#define UARTCTRL_R8T9		0x80000000
+#define UARTCTRL_R9T8		0x40000000
+#define UARTCTRL_TXDIR		0x20000000
+#define UARTCTRL_TXINV		0x10000000
+#define UARTCTRL_ORIE		0x08000000
+#define UARTCTRL_NEIE		0x04000000
+#define UARTCTRL_FEIE		0x02000000
+#define UARTCTRL_PEIE		0x01000000
+#define UARTCTRL_TIE		0x00800000
+#define UARTCTRL_TCIE		0x00400000
+#define UARTCTRL_RIE		0x00200000
+#define UARTCTRL_ILIE		0x00100000
+#define UARTCTRL_TE		0x00080000
+#define UARTCTRL_RE		0x00040000
+#define UARTCTRL_RWU		0x00020000
+#define UARTCTRL_SBK		0x00010000
+#define UARTCTRL_MA1IE		0x00008000
+#define UARTCTRL_MA2IE		0x00004000
+#define UARTCTRL_IDLECFG	0x00000100
+#define UARTCTRL_LOOPS		0x00000080
+#define UARTCTRL_DOZEEN		0x00000040
+#define UARTCTRL_RSRC		0x00000020
+#define UARTCTRL_M		0x00000010
+#define UARTCTRL_WAKE		0x00000008
+#define UARTCTRL_ILT		0x00000004
+#define UARTCTRL_PE		0x00000002
+#define UARTCTRL_PT		0x00000001
+
+#define UARTDATA_NOISY		0x00008000
+#define UARTDATA_PARITYE	0x00004000
+#define UARTDATA_FRETSC		0x00002000
+#define UARTDATA_RXEMPT		0x00001000
+#define UARTDATA_IDLINE		0x00000800
+#define UARTDATA_MASK		0x3ff
+
+#define UARTMODIR_IREN		0x00020000
+#define UARTMODIR_TXCTSSRC	0x00000020
+#define UARTMODIR_TXCTSC	0x00000010
+#define UARTMODIR_RXRTSE	0x00000008
+#define UARTMODIR_TXRTSPOL	0x00000004
+#define UARTMODIR_TXRTSE	0x00000002
+#define UARTMODIR_TXCTSE	0x00000001
+
+#define UARTFIFO_TXEMPT		0x00800000
+#define UARTFIFO_RXEMPT		0x00400000
+#define UARTFIFO_TXOF		0x00020000
+#define UARTFIFO_RXUF		0x00010000
+#define UARTFIFO_TXFLUSH	0x00008000
+#define UARTFIFO_RXFLUSH	0x00004000
+#define UARTFIFO_TXOFE		0x00000200
+#define UARTFIFO_RXUFE		0x00000100
+#define UARTFIFO_TXFE		0x00000080
+#define UARTFIFO_FIFOSIZE_MASK	0x7
+#define UARTFIFO_TXSIZE_OFF	4
+#define UARTFIFO_RXFE		0x00000008
+#define UARTFIFO_RXSIZE_OFF	0
+
+#define UARTWATER_COUNT_MASK	0xff
+#define UARTWATER_TXCNT_OFF	8
+#define UARTWATER_RXCNT_OFF	24
+#define UARTWATER_WATER_MASK	0xff
+#define UARTWATER_TXWATER_OFF	0
+#define UARTWATER_RXWATER_OFF	16
+
+#define FSL_UART_RX_DMA_BUFFER_SIZE	64
+
+static inline void lpuart_setbrg(void __iomem *base,
+				 unsigned int refclock,
+				 unsigned int baudrate)
+{
+	u16 sbr;
+	sbr = (u16) (refclock / (16 * baudrate));
+
+	writeb(sbr >> 8,   base + UARTBDH);
+	writeb(sbr & 0xff, base + UARTBDL);
+}
+
+static inline void lpuart_setup(void __iomem *base,
+				unsigned int refclock)
+{
+
+	/* Disable UART */
+	writeb(0, base + UARTCR2);
+	writeb(0, base + UARTMODEM);
+	writeb(0, base + UARTCR1);
+
+	/* Disable FIFOs */
+	writeb(0, base + UARTPFIFO);
+	writeb(0, base + UARTTWFIFO);
+	writeb(1, base + UARTRWFIFO);
+	writeb(UARTCFIFO_RXFLUSH | UARTCFIFO_TXFLUSH, base + UARTCFIFO);
+
+	lpuart_setbrg(base, refclock, CONFIG_BAUDRATE);
+
+	writeb(UARTCR2_TE | UARTCR2_RE, base + UARTCR2);
+}
+
+static inline void lpuart_putc(void __iomem *base, int c)
+{
+	if (!(readb(base + UARTCR2) & UARTCR2_TE))
+		return;
+
+	while (!(readb(base + UARTSR1) & UARTSR1_TDRE));
+
+	writeb(c, base + UARTDR);
+}
+
+#endif	/* __IMX_UART_H__ */
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:50 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:50 -0700
Subject: [PATCH 13/20] i.MX: Add 'lpuart' serial driver
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-14-git-send-email-andrew.smirnov@gmail.com>

Add 'lpuart' serial driver, based on analogous driver from U-Boot

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/serial/Kconfig         |   4 +
 drivers/serial/Makefile        |   1 +
 drivers/serial/serial_lpuart.c | 217 +++++++++++++++++++++++++++++++++++++++++
 include/serial/lpuart.h        |  28 ++++--
 4 files changed, 244 insertions(+), 6 deletions(-)
 create mode 100644 drivers/serial/serial_lpuart.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 146bf1e..02e869a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -137,4 +137,8 @@ config DRIVER_SERIAL_DIGIC
 	bool "Canon DIGIC serial driver"
 	depends on ARCH_DIGIC
 
+config DRIVER_SERIAL_LPUART
+	depends on ARCH_IMX
+	bool "LPUART serial driver"
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 189e777..7d1bae1 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_DRIVER_SERIAL_AUART)		+= serial_auart.o
 obj-$(CONFIG_DRIVER_SERIAL_CADENCE)		+= serial_cadence.o
 obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO)		+= efi-stdio.o
 obj-$(CONFIG_DRIVER_SERIAL_DIGIC)		+= serial_digic.o
+obj-$(CONFIG_DRIVER_SERIAL_LPUART)		+= serial_lpuart.o
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
new file mode 100644
index 0000000..52fb6d3
--- /dev/null
+++ b/drivers/serial/serial_lpuart.c
@@ -0,0 +1,217 @@
+/*
+ * Copyright (c) 2016 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
+ *
+ * Based on analogous driver from U-Boot
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <malloc.h>
+#include <notifier.h>
+#include <io.h>
+#include <of.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <serial/lpuart.h>
+
+struct lpuart {
+	struct console_device cdev;
+	int baudrate;
+	int dte_mode;
+	struct notifier_block notify;
+	struct resource *io;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+static struct lpuart *cdev_to_lpuart(struct console_device *cdev)
+{
+	return container_of(cdev, struct lpuart, cdev);
+}
+
+static struct lpuart *nb_to_lpuart(struct notifier_block *nb)
+{
+	return container_of(nb, struct lpuart, notify);
+}
+
+static void lpuart_enable(struct lpuart *lpuart, bool on)
+{
+	u8 ctrl;
+
+	ctrl = readb(lpuart->base + UARTCR2);
+	if (on)
+		ctrl |= UARTCR2_TE | UARTCR2_RE;
+	else
+		ctrl &= ~(UARTCR2_TE | UARTCR2_RE);
+	writeb(ctrl, lpuart->base + UARTCR2);
+}
+
+static int lpuart_serial_setbaudrate(struct console_device *cdev,
+				     int baudrate)
+{
+	struct lpuart *lpuart = cdev_to_lpuart(cdev);
+
+	lpuart_enable(lpuart, false);
+
+	lpuart_setbrg(lpuart->base,
+		      clk_get_rate(lpuart->clk),
+		      baudrate);
+
+	lpuart_enable(lpuart, true);
+
+	lpuart->baudrate = baudrate;
+
+	return 0;
+}
+
+static int lpuart_serial_getc(struct console_device *cdev)
+{
+	bool ready;
+	struct lpuart *lpuart = cdev_to_lpuart(cdev);
+
+	do {
+		const u8 sr1 = readb(lpuart->base + UARTSR1);
+		ready = !!(sr1 & (UARTSR1_OR | UARTSR1_RDRF));
+	} while (!ready);
+
+	return readb(lpuart->base + UARTDR);
+}
+
+static void lpuart_serial_putc(struct console_device *cdev, char c)
+{
+	lpuart_putc(cdev_to_lpuart(cdev)->base, c);
+}
+
+/* Test whether a character is in the RX buffer */
+static int lpuart_serial_tstc(struct console_device *cdev)
+{
+	return !!readb(cdev_to_lpuart(cdev)->base + UARTRCFIFO);
+}
+
+static void lpuart_serial_flush(struct console_device *cdev)
+{
+	bool tx_empty;
+	struct lpuart *lpuart = cdev_to_lpuart(cdev);
+
+	do {
+		const u8 sr1 = readb(lpuart->base + UARTSR1);
+		tx_empty = !!(sr1 & UARTSR1_TDRE);
+	} while (!tx_empty);
+}
+
+static int lpuart_clocksource_clock_change(struct notifier_block *nb,
+					   unsigned long event, void *data)
+{
+	struct lpuart *lpuart = nb_to_lpuart(nb);
+
+	return lpuart_serial_setbaudrate(&lpuart->cdev, lpuart->baudrate);
+}
+
+static int lpuart_serial_probe(struct device_d *dev)
+{
+	int ret;
+	struct console_device *cdev;
+	struct lpuart *lpuart;
+	const char *devname;
+
+	lpuart    = xzalloc(sizeof(*lpuart));
+	cdev      = &lpuart->cdev;
+	dev->priv = lpuart;
+
+	lpuart->io = dev_request_mem_resource(dev, 0);
+	if (IS_ERR(lpuart->io)) {
+		ret = PTR_ERR(lpuart->io);
+		goto err_free;
+	}
+	lpuart->base = IOMEM(lpuart->io->start);
+
+	lpuart->clk = clk_get(dev, NULL);
+	if (IS_ERR(lpuart->clk)) {
+		ret = PTR_ERR(lpuart->clk);
+		dev_err(dev, "Failed to get UART clock %d\n", ret);
+		goto io_release;
+	}
+
+	ret = clk_enable(lpuart->clk);
+	if (ret) {
+		dev_err(dev, "Failed to enable UART clock %d\n", ret);
+		goto io_release;
+	}
+
+	cdev->dev    = dev;
+	cdev->tstc   = lpuart_serial_tstc;
+	cdev->putc   = lpuart_serial_putc;
+	cdev->getc   = lpuart_serial_getc;
+	cdev->flush  = lpuart_serial_flush;
+	cdev->setbrg = lpuart_serial_setbaudrate;
+
+	if (dev->device_node) {
+		devname = of_alias_get(dev->device_node);
+		if (devname) {
+			cdev->devname = xstrdup(devname);
+			cdev->devid   = DEVICE_ID_SINGLE;
+		}
+	}
+
+	cdev->linux_console_name = "ttyLP";
+
+	lpuart_setup_with_fifo(lpuart->base,
+			       clk_get_rate(lpuart->clk),
+			       15);
+
+	ret = console_register(cdev);
+	if (!ret) {
+		lpuart->notify.notifier_call = lpuart_clocksource_clock_change;
+		clock_register_client(&lpuart->notify);
+
+		return 0;
+	}
+
+	clk_put(lpuart->clk);
+io_release:
+	release_region(lpuart->io);
+err_free:
+	free(lpuart);
+
+	return ret;
+}
+
+static void lpuart_serial_remove(struct device_d *dev)
+{
+	struct lpuart *lpuart = dev->priv;
+
+	lpuart_serial_flush(&lpuart->cdev);
+	console_unregister(&lpuart->cdev);
+	release_region(lpuart->io);
+	clk_put(lpuart->clk);
+
+	free(lpuart);
+}
+
+static struct of_device_id lpuart_serial_dt_ids[] = {
+	{ .compatible = "fsl,vf610-lpuart" },
+	{}
+};
+
+static struct driver_d lpuart_serial_driver = {
+	.name   = "lpuart-serial",
+	.probe  = lpuart_serial_probe,
+	.remove = lpuart_serial_remove,
+	.of_compatible = DRV_OF_COMPAT(lpuart_serial_dt_ids),
+};
+console_platform_driver(lpuart_serial_driver);
diff --git a/include/serial/lpuart.h b/include/serial/lpuart.h
index 13077f9..632e976 100644
--- a/include/serial/lpuart.h
+++ b/include/serial/lpuart.h
@@ -225,25 +225,35 @@ static inline void lpuart_setbrg(void __iomem *base,
 				 unsigned int refclock,
 				 unsigned int baudrate)
 {
+	unsigned int bfra;
 	u16 sbr;
+
 	sbr = (u16) (refclock / (16 * baudrate));
 
 	writeb(sbr >> 8,   base + UARTBDH);
 	writeb(sbr & 0xff, base + UARTBDL);
+
+	bfra  = DIV_ROUND_UP(2 * refclock, baudrate) - 32 * sbr;
+	bfra &= UARTCR4_BRFA_MASK;
+	writeb(bfra, base + UARTCR4);
 }
 
-static inline void lpuart_setup(void __iomem *base,
-				unsigned int refclock)
+static inline void lpuart_setup_with_fifo(void __iomem *base,
+					  unsigned int refclock,
+					  unsigned int twfifo)
 {
-
 	/* Disable UART */
 	writeb(0, base + UARTCR2);
 	writeb(0, base + UARTMODEM);
 	writeb(0, base + UARTCR1);
 
-	/* Disable FIFOs */
-	writeb(0, base + UARTPFIFO);
-	writeb(0, base + UARTTWFIFO);
+	if (twfifo) {
+		writeb(UARTPFIFO_TXFE | UARTPFIFO_RXFE, base + UARTPFIFO);
+		writeb((u8)twfifo, base + UARTTWFIFO);
+	} else {
+		writeb(0, base + UARTPFIFO);
+		writeb(0, base + UARTTWFIFO);
+	}
 	writeb(1, base + UARTRWFIFO);
 	writeb(UARTCFIFO_RXFLUSH | UARTCFIFO_TXFLUSH, base + UARTCFIFO);
 
@@ -252,6 +262,12 @@ static inline void lpuart_setup(void __iomem *base,
 	writeb(UARTCR2_TE | UARTCR2_RE, base + UARTCR2);
 }
 
+static inline void lpuart_setup(void __iomem *base,
+				unsigned int refclock)
+{
+	lpuart_setup_with_fifo(base, refclock, 0x00);
+}
+
 static inline void lpuart_putc(void __iomem *base, int c)
 {
 	if (!(readb(base + UARTCR2) & UARTCR2_TE))
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:52 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:52 -0700
Subject: [PATCH 15/20] i.MX: esdhc: Do not rely on CPU type for quirks
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-16-git-send-email-andrew.smirnov@gmail.com>

CPU type is not a reliable indicator of the underlying type of IP core
used, since there's no 1:1 mapping between the two. As example of one
such violation consider Vybrid SoC which contains IP block from i.MX53.

Instead port feature flags from corresponding Linux kernel driver and
use the ones that are relevant.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/mci/imx-esdhc.c | 121 +++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 100 insertions(+), 21 deletions(-)

diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 262a904..764a106 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -35,28 +35,81 @@
 #include <mach/generic.h>
 #include <mach/esdhc.h>
 #include <gpio.h>
+#include <of_device.h>
 
 #include "sdhci.h"
 #include "imx-esdhc.h"
 
+/*
+ * The CMDTYPE of the CMD register (offset 0xE) should be set to
+ * "11" when the STOP CMD12 is issued on imx53 to abort one
+ * open ended multi-blk IO. Otherwise the TC INT wouldn't
+ * be generated.
+ * In exact block transfer, the controller doesn't complete the
+ * operations automatically as required at the end of the
+ * transfer and remains on hold if the abort command is not sent.
+ * As a result, the TC flag is not asserted and SW  received timeout
+ * exeception. Bit1 of Vendor Spec registor is used to fix it.
+ */
+#define ESDHC_FLAG_MULTIBLK_NO_INT	BIT(1)
+/*
+ * The flag enables the workaround for ESDHC errata ENGcm07207 which
+ * affects i.MX25 and i.MX35.
+ */
+#define ESDHC_FLAG_ENGCM07207		BIT(2)
+/*
+ * The flag tells that the ESDHC controller is an USDHC block that is
+ * integrated on the i.MX6 series.
+ */
+#define ESDHC_FLAG_USDHC		BIT(3)
+/* The IP supports manual tuning process */
+#define ESDHC_FLAG_MAN_TUNING		BIT(4)
+/* The IP supports standard tuning process */
+#define ESDHC_FLAG_STD_TUNING		BIT(5)
+/* The IP has SDHCI_CAPABILITIES_1 register */
+#define ESDHC_FLAG_HAVE_CAP1		BIT(6)
+/*
+ * The IP has errata ERR004536
+ * uSDHC: ADMA Length Mismatch Error occurs if the AHB read access is slow,
+ * when reading data from the card
+ */
+#define ESDHC_FLAG_ERR004536		BIT(7)
+/* The IP supports HS200 mode */
+#define ESDHC_FLAG_HS200		BIT(8)
+/* The IP supports HS400 mode */
+#define ESDHC_FLAG_HS400		BIT(9)
+
+
 #define IMX_SDHCI_WML		0x44
 #define IMX_SDHCI_MIXCTRL	0x48
 #define IMX_SDHCI_DLL_CTRL	0x60
 #define IMX_SDHCI_MIX_CTRL_FBCLK_SEL	(BIT(25))
 
+struct esdhc_soc_data {
+	u32 flags;
+};
+
 struct fsl_esdhc_host {
 	struct mci_host		mci;
 	void __iomem		*regs;
 	struct device_d		*dev;
 	struct clk		*clk;
+	const struct esdhc_soc_data *socdata;
 };
 
 #define to_fsl_esdhc(mci)	container_of(mci, struct fsl_esdhc_host, mci)
 
 #define  SDHCI_CMD_ABORTCMD (0xC0 << 16)
 
+static inline int esdhc_is_usdhc(struct fsl_esdhc_host *data)
+{
+	return !!(data->socdata->flags & ESDHC_FLAG_USDHC);
+}
+
+
 /* Return the XFERTYP flags for a given command and data packet */
-static u32 esdhc_xfertyp(struct mci_cmd *cmd, struct mci_data *data)
+static u32 esdhc_xfertyp(struct fsl_esdhc_host *host,
+			 struct mci_cmd *cmd, struct mci_data *data)
 {
 	u32 xfertyp = 0;
 
@@ -85,8 +138,8 @@ static u32 esdhc_xfertyp(struct mci_cmd *cmd, struct mci_data *data)
 		xfertyp |= COMMAND_RSPTYP_48_BUSY;
 	else if (cmd->resp_type & MMC_RSP_PRESENT)
 		xfertyp |= COMMAND_RSPTYP_48;
-	if ((cpu_is_mx50() || cpu_is_mx51() || cpu_is_mx53()) &&
-			cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
+	if ((host->socdata->flags & ESDHC_FLAG_MULTIBLK_NO_INT) &&
+	    (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION))
 		xfertyp |= SDHCI_CMD_ABORTCMD;
 
 	return COMMAND_CMD(cmd->cmdidx) | xfertyp;
@@ -273,12 +326,12 @@ esdhc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
 	}
 
 	/* Figure out the transfer arguments */
-	xfertyp = esdhc_xfertyp(cmd, data);
+	xfertyp = esdhc_xfertyp(host, cmd, data);
 
 	/* Send the command */
 	esdhc_write32(regs + SDHCI_ARGUMENT, cmd->cmdarg);
 
-	if (cpu_is_mx6()) {
+	if (esdhc_is_usdhc(host)) {
 		/* write lower-half of xfertyp to mixctrl */
 		mixctrl = xfertyp & 0xFFFF;
 		/* Keep the bits 22-25 of the register as is */
@@ -525,7 +578,7 @@ static int esdhc_reset(struct fsl_esdhc_host *host)
 			SYSCTL_RSTA);
 
 	/* extra register reset for i.MX6 Solo/DualLite */
-	if (cpu_is_mx6()) {
+	if (esdhc_is_usdhc(host)) {
 		/* reset bit FBCLK_SEL */
 		val = esdhc_read32(regs + IMX_SDHCI_MIXCTRL);
 		val &= ~IMX_SDHCI_MIX_CTRL_FBCLK_SEL;
@@ -570,6 +623,10 @@ static int fsl_esdhc_probe(struct device_d *dev)
 	host = xzalloc(sizeof(*host));
 	mci = &host->mci;
 
+	host->socdata = of_device_get_match_data(dev);
+	if (!host->socdata)
+		return -EINVAL;
+
 	host->clk = clk_get(dev, NULL);
 	if (IS_ERR(host->clk))
 		return PTR_ERR(host->clk);
@@ -634,22 +691,44 @@ static int fsl_esdhc_probe(struct device_d *dev)
 	return mci_register(&host->mci);
 }
 
+static struct esdhc_soc_data esdhc_imx25_data = {
+	.flags = ESDHC_FLAG_ENGCM07207,
+};
+
+static struct esdhc_soc_data esdhc_imx50_data = {
+	.flags = ESDHC_FLAG_MULTIBLK_NO_INT,
+	/* .flags = 0, */
+};
+
+static struct esdhc_soc_data esdhc_imx51_data = {
+	.flags = ESDHC_FLAG_MULTIBLK_NO_INT,
+	/* .flags = 0, */
+};
+
+static struct esdhc_soc_data esdhc_imx53_data = {
+	.flags = ESDHC_FLAG_MULTIBLK_NO_INT,
+};
+
+static struct esdhc_soc_data usdhc_imx6q_data = {
+	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING,
+};
+
+static struct esdhc_soc_data usdhc_imx6sl_data = {
+	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
+	       | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_ERR004536
+	       | ESDHC_FLAG_HS200,
+};
+
+
 static __maybe_unused struct of_device_id fsl_esdhc_compatible[] = {
-	{
-		.compatible = "fsl,imx25-esdhc",
-	}, {
-		.compatible = "fsl,imx50-esdhc",
-	}, {
-		.compatible = "fsl,imx51-esdhc",
-	}, {
-		.compatible = "fsl,imx53-esdhc",
-	}, {
-		.compatible = "fsl,imx6q-usdhc",
-	}, {
-		.compatible = "fsl,imx6sl-usdhc",
-	}, {
-		/* sentinel */
-	}
+
+	{ .compatible = "fsl,imx25-esdhc",  .data = &esdhc_imx25_data  },
+	{ .compatible = "fsl,imx50-esdhc",  .data = &esdhc_imx50_data  },
+	{ .compatible = "fsl,imx51-esdhc",  .data = &esdhc_imx51_data  },
+	{ .compatible = "fsl,imx53-esdhc",  .data = &esdhc_imx53_data  },
+	{ .compatible = "fsl,imx6q-usdhc",  .data = &usdhc_imx6q_data  },
+	{ .compatible = "fsl,imx6sl-usdhc", .data = &usdhc_imx6sl_data },
+	{ /* sentinel */ }
 };
 
 static struct driver_d fsl_esdhc_driver = {
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:53 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:53 -0700
Subject: [PATCH 16/20] i.MX: Kconfig: Enable OCOTP on Vybrid
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-17-git-send-email-andrew.smirnov@gmail.com>

Enable OCOTP driver on Vybrid as well as i.MX6

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0284a8f..9590381 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -659,7 +659,7 @@ config IMX_IIM_FUSE_BLOW
 
 config IMX_OCOTP
 	tristate "i.MX6 On Chip OTP controller"
-	depends on ARCH_IMX6
+	depends on ARCH_IMX6 || ARCH_VF610
 	depends on OFDEVICE
 	help
 	  This adds support for the i.MX6 On-Chip OTP controller. Currently the
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:54 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:54 -0700
Subject: [PATCH 17/20] i.MX: ocotp: Remove unused #define
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-18-git-send-email-andrew.smirnov@gmail.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/ocotp.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c
index 17b944b..44ee0b7 100644
--- a/arch/arm/mach-imx/ocotp.c
+++ b/arch/arm/mach-imx/ocotp.c
@@ -66,7 +66,6 @@
 #define BF(value, field)		(((value) << field) & field##_MASK)
 
 /* Other definitions */
-#define FUSE_REGS_COUNT			(16 * 8)
 #define IMX6_OTP_DATA_ERROR_VAL		0xBADABADA
 #define DEF_RELAX			20
 #define MAC_OFFSET			(0x22 * 4)
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:56 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:56 -0700
Subject: [PATCH 19/20] i.MX: ocotp: Add Vybrid support
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-20-git-send-email-andrew.smirnov@gmail.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/ocotp.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c
index b978508..989a3cc 100644
--- a/arch/arm/mach-imx/ocotp.c
+++ b/arch/arm/mach-imx/ocotp.c
@@ -451,6 +451,14 @@ static u32 imx6q_addr_to_offset(u32 addr)
 	return imx6sl_addr_to_offset(addr) + addendum;
 }
 
+static u32 vf610_addr_to_offset(u32 addr)
+{
+	if (addr == 0x04)
+		return 0x450;
+	else
+		return imx6q_addr_to_offset(addr);
+}
+
 static struct imx_ocotp_data imx6q_ocotp_data = {
 	.num_regs = 512,
 	.addr_to_offset = imx6q_addr_to_offset,
@@ -461,6 +469,11 @@ static struct imx_ocotp_data imx6sl_ocotp_data = {
 	.addr_to_offset = imx6sl_addr_to_offset,
 };
 
+static struct imx_ocotp_data vf610_ocotp_data = {
+	.num_regs = 512,
+	.addr_to_offset = vf610_addr_to_offset,
+};
+
 static __maybe_unused struct of_device_id imx_ocotp_dt_ids[] = {
 	{
 		.compatible = "fsl,imx6q-ocotp",
@@ -472,6 +485,9 @@ static __maybe_unused struct of_device_id imx_ocotp_dt_ids[] = {
 		.compatible = "fsl,imx6sl-ocotp",
 		.data = &imx6sl_ocotp_data,
 	}, {
+		.compatible = "fsl,vf610-ocotp",
+		.data = &vf610_ocotp_data,
+	}, {
 		/* sentinel */
 	}
 };
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:57 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:57 -0700
Subject: [PATCH 20/20] imx-esdhc: Request "per" clock explicitly
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-21-git-send-email-andrew.smirnov@gmail.com>

Calling clk_get() with NULL as the second argument will give us "ipg"
clock as a result. The actual clock feeding into the peripheral is "per"
and, depending on the SoC, "ipg" and "per" may be separated by a clock
divider, so querying "ipg"'s rate may result in rate that does not
represent the actual peripheral clock rate.

Change the code to request "per" as our peripheral clock to avoid
aforementioned problem.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/mci/imx-esdhc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 764a106..d72e3f8 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -627,7 +627,7 @@ static int fsl_esdhc_probe(struct device_d *dev)
 	if (!host->socdata)
 		return -EINVAL;
 
-	host->clk = clk_get(dev, NULL);
+	host->clk = clk_get(dev, "per");
 	if (IS_ERR(host->clk))
 		return PTR_ERR(host->clk);
 
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:55 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:55 -0700
Subject: [PATCH 18/20] i.MX: ocotp: Account for shadow memory gaps
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-19-git-send-email-andrew.smirnov@gmail.com>

Shadow memory does not have a true 1:1 mapping to fuse address
space. All i.MX6 devices, with exception of i.MX6SL have a 0x100 byte
gap between banks 5 and 6 (or addresses 0x2f and 0x30), so we need to
account for that when reading data from shadow memory.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/mach-imx/ocotp.c | 34 +++++++++++++++++++++++++++++++---
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c
index 44ee0b7..b978508 100644
--- a/arch/arm/mach-imx/ocotp.c
+++ b/arch/arm/mach-imx/ocotp.c
@@ -73,6 +73,7 @@
 
 struct imx_ocotp_data {
 	int num_regs;
+	u32 (*addr_to_offset)(u32 addr);
 };
 
 struct ocotp_priv {
@@ -84,6 +85,7 @@ struct ocotp_priv {
 	int sense_enable;
 	char ethaddr[6];
 	struct regmap_config map_config;
+	const struct imx_ocotp_data *data;
 };
 
 static int imx6_ocotp_set_timing(struct ocotp_priv *priv)
@@ -192,7 +194,8 @@ static int imx_ocotp_reg_read(void *ctx, unsigned int reg, unsigned int *val)
 		if (ret)
 			return ret;
 	} else {
-		*(u32 *)val = readl(priv->base + 0x400 + index * 0x10);
+		*(u32 *)val = readl(priv->base +
+				    priv->data->addr_to_offset(index));
 	}
 
 	return 0;
@@ -272,7 +275,8 @@ static int imx_ocotp_reg_write(void *ctx, unsigned int reg, unsigned int val)
 		if (ret < 0)
 			return ret;
 	} else {
-		writel(val, priv->base + 0x400 + index * 0x10);
+		writel(val, priv->base +
+		       priv->data->addr_to_offset(index));
 	}
 
 	if (priv->permanent_write_enable)
@@ -374,7 +378,7 @@ static int imx_ocotp_probe(struct device_d *dev)
 	void __iomem *base;
 	struct ocotp_priv *priv;
 	int ret = 0;
-	struct imx_ocotp_data *data;
+	const struct imx_ocotp_data *data;
 
 	ret = dev_get_drvdata(dev, (const void **)&data);
 	if (ret)
@@ -389,6 +393,7 @@ static int imx_ocotp_probe(struct device_d *dev)
 
 	priv = xzalloc(sizeof(*priv));
 
+	priv->data      = data;
 	priv->base	= base;
 	priv->clk	= clk_get(dev, NULL);
 	if (IS_ERR(priv->clk))
@@ -425,12 +430,35 @@ static int imx_ocotp_probe(struct device_d *dev)
 	return 0;
 }
 
+static u32 imx6sl_addr_to_offset(u32 addr)
+{
+	return 0x400 + addr * 0x10;
+}
+
+static u32 imx6q_addr_to_offset(u32 addr)
+{
+	u32 addendum = 0;
+
+	if (addr > 0x2F) {
+		/*
+		 * If we are reading past Bank 5, take into account a
+		 * 0x100 bytes wide gap between Bank 5 and Bank 6
+		 */
+		addendum += 0x100;
+	}
+
+
+	return imx6sl_addr_to_offset(addr) + addendum;
+}
+
 static struct imx_ocotp_data imx6q_ocotp_data = {
 	.num_regs = 512,
+	.addr_to_offset = imx6q_addr_to_offset,
 };
 
 static struct imx_ocotp_data imx6sl_ocotp_data = {
 	.num_regs = 256,
+	.addr_to_offset = imx6sl_addr_to_offset,
 };
 
 static __maybe_unused struct of_device_id imx_ocotp_dt_ids[] = {
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:41 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:41 -0700
Subject: [PATCH 04/20] i.MX: Add support for VF610 Tower board
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-5-git-send-email-andrew.smirnov@gmail.com>

Add support for VF610 Tower board.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/boards/Makefile                           |   3 +-
 arch/arm/boards/freescale-vf610-twr/Makefile       |   4 +
 arch/arm/boards/freescale-vf610-twr/board.c        |  61 +++++
 .../flash-header-vf610-twr.imxcfg                  | 277 +++++++++++++++++++++
 arch/arm/boards/freescale-vf610-twr/lowlevel.c     |  45 ++++
 arch/arm/dts/Makefile                              |   1 +
 arch/arm/dts/vf610-twr.dts                         |  14 ++
 arch/arm/mach-imx/Kconfig                          |   4 +
 arch/arm/mach-imx/include/mach/clock-vf610.h       | 215 ++++++++++++++++
 arch/arm/mach-imx/include/mach/iomux-vf610.h       | 258 +++++++++++++++++++
 images/Makefile.imx                                |   5 +
 11 files changed, 886 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boards/freescale-vf610-twr/Makefile
 create mode 100644 arch/arm/boards/freescale-vf610-twr/board.c
 create mode 100644 arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
 create mode 100644 arch/arm/boards/freescale-vf610-twr/lowlevel.c
 create mode 100644 arch/arm/dts/vf610-twr.dts
 create mode 100644 arch/arm/mach-imx/include/mach/clock-vf610.h
 create mode 100644 arch/arm/mach-imx/include/mach/iomux-vf610.h

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 23a8dbd..c8bc565 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK)		+= at91sam9260ek/
 obj-$(CONFIG_MACH_AT91SAM9M10G45EK)		+= at91sam9m10g45ek/
 obj-$(CONFIG_MACH_AT91SAM9M10IHD)		+= at91sam9m10ihd/
 obj-$(CONFIG_MACH_AT91SAM9N12EK)		+= at91sam9n12ek/
-obj-$(CONFIG_MACH_AT91SAM9X5EK)			+= at91sam9x5ek/
+nobj-$(CONFIG_MACH_AT91SAM9X5EK)			+= at91sam9x5ek/
 obj-$(CONFIG_MACH_BEAGLE)			+= beagle/
 obj-$(CONFIG_MACH_BEAGLEBONE)			+= beaglebone/
 obj-$(CONFIG_MACH_CANON_A1100)			+= canon-a1100/
@@ -138,3 +138,4 @@ obj-$(CONFIG_MACH_ZEDBOARD)			+= avnet-zedboard/
 obj-$(CONFIG_MACH_ZYLONITE)			+= zylonite/
 obj-$(CONFIG_MACH_VARISCITE_MX6)		+= variscite-mx6/
 obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
+obj-$(CONFIG_MACH_VF610_TWR)			+= freescale-vf610-twr/
diff --git a/arch/arm/boards/freescale-vf610-twr/Makefile b/arch/arm/boards/freescale-vf610-twr/Makefile
new file mode 100644
index 0000000..32a7da5
--- /dev/null
+++ b/arch/arm/boards/freescale-vf610-twr/Makefile
@@ -0,0 +1,4 @@
+obj-y += board.o
+obj-y += flash-header-vf610-twr.dcd.o
+extra-y += flash-header-vf610-twr.dcd.S flash-header-vf610-twr.dcd
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/freescale-vf610-twr/board.c b/arch/arm/boards/freescale-vf610-twr/board.c
new file mode 100644
index 0000000..0879f74
--- /dev/null
+++ b/arch/arm/boards/freescale-vf610-twr/board.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2016 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <config.h>
+#include <common.h>
+#include <dma.h>
+#include <driver.h>
+#include <init.h>
+#include <of.h>
+#include <malloc.h>
+#include <mci.h>
+#include <clock.h>
+#include <io.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+/*
+ * Make sure that esdhc1's clock divider is 1
+ */
+static int vf610_twr_sdhc1_clock_init(void)
+{
+	int err;
+	struct clk *esdhc1_div, *esdhc1_div_parent;
+
+	if (!of_machine_is_compatible("fsl,vf610-twr"))
+		return 0;
+
+	esdhc1_div = clk_lookup("esdhc1_div");
+
+	if (IS_ERR(esdhc1_div))
+		return PTR_ERR(esdhc1_div);
+
+	esdhc1_div_parent = clk_get_parent(esdhc1_div);
+	if (IS_ERR(esdhc1_div_parent))
+		return PTR_ERR(esdhc1_div_parent);
+
+	err = clk_set_rate(esdhc1_div,
+			   clk_get_rate(esdhc1_div_parent));
+	if (err)
+		return err;
+
+	clk_put(esdhc1_div);
+
+	return 0;
+}
+coredevice_initcall(vf610_twr_sdhc1_clock_init);
diff --git a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
new file mode 100644
index 0000000..18138d2
--- /dev/null
+++ b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
@@ -0,0 +1,277 @@
+soc vf610
+loadaddr 0x80000000
+dcdofs 0x400
+
+#define VF610_DDR_PAD_CTRL	0x00000180 /* 25 Ohm drive strength */
+#define VF610_DDR_PAD_CTRL_1	0x00010180 /* 25 Ohm drive strength + differential input */
+
+#define DDRMC_PHY_DQ_TIMING	0x00002613
+#define DDRMC_PHY_DQS_TIMING	0x00002615
+#define DDRMC_PHY_CTRL		0x00210000
+#define DDRMC_PHY_MASTER_CTRL	0x0001012a
+#define DDRMC_PHY_SLAVE_CTRL	0x00002000
+#define DDRMC_PHY_OFF		0x00000000
+#define DDRMC_PHY_PROC_PAD_ODT	0x00010101
+
+#ifdef DEBUG
+#define CHECKPOINT(n) wm 32 0x3f000000 n
+#else
+#define CHECKPOINT(n)
+#endif
+
+CHECKPOINT(1)
+
+/* ======================= Clock initialization =======================*/
+
+/*
+ * Ungate all IP block clocks
+ */
+wm 32 0x4006b040 0xffffffff
+wm 32 0x4006b044 0xffffffff
+wm 32 0x4006b048 0xffffffff
+wm 32 0x4006b04c 0xffffffff
+wm 32 0x4006b050 0xffffffff
+wm 32 0x4006b058 0xffffffff
+wm 32 0x4006b05c 0xffffffff
+wm 32 0x4006b060 0xffffffff
+wm 32 0x4006b064 0xffffffff
+wm 32 0x4006b068 0xffffffff
+wm 32 0x4006b06c 0xffffffff
+
+
+/*
+ * We have to options to clock DDR controller:
+ *
+ *  - Use Core-A5 clock
+ *  - Use PLL2 PFD2 clock
+ *
+
+ * Using first option without changing PLL settings doesn't seem to be
+ * possible given that DDRMC requires minimum of 300Mhz and MaskROM
+ * configures it to be clocked at 264Mhz. Changing PLL1 settings
+ * proved to be challenging becuase MaskROM code executing this DCD
+ * will also be fetching the rest of the bootloader via some
+ * peripheral interface whose clock is derived from Cortex-A5 clock.
+ *
+ * As a result this DCD configuration code uses the second option of
+ * clocking DDR wiht PLL2 PFD2 clock output
+ *
+ * Turn PLL2 on
+ */
+wm 32 0x40050030 0x00002001 /* Fout = Fin * 22 */
+
+CHECKPOINT(2)
+
+/*
+ * Wait for PLLs to lock
+ */
+check 32 while_any_bit_clear 0x40050030 0x80000000
+
+
+CHECKPOINT(3)
+
+/*
+ * Switch DDRMC to be clocked with PLL2 PFD2 and enable PFD2 output
+ */
+clear_bits 32 0x4006b008 0x00000040
+set_bits   32 0x4006b008 0x00002000
+
+
+
+/* ======================= DDR IOMUX ======================= */
+
+CHECKPOINT(4)
+
+wm 32 0x40048220 VF610_DDR_PAD_CTRL
+wm 32 0x40048224 VF610_DDR_PAD_CTRL
+wm 32 0x40048228 VF610_DDR_PAD_CTRL
+wm 32 0x4004822c VF610_DDR_PAD_CTRL
+wm 32 0x40048230 VF610_DDR_PAD_CTRL
+wm 32 0x40048234 VF610_DDR_PAD_CTRL
+wm 32 0x40048238 VF610_DDR_PAD_CTRL
+wm 32 0x4004823c VF610_DDR_PAD_CTRL
+wm 32 0x40048240 VF610_DDR_PAD_CTRL
+wm 32 0x40048244 VF610_DDR_PAD_CTRL
+wm 32 0x40048248 VF610_DDR_PAD_CTRL
+wm 32 0x4004824c VF610_DDR_PAD_CTRL
+wm 32 0x40048250 VF610_DDR_PAD_CTRL
+wm 32 0x40048254 VF610_DDR_PAD_CTRL
+wm 32 0x40048258 VF610_DDR_PAD_CTRL
+wm 32 0x4004825c VF610_DDR_PAD_CTRL
+wm 32 0x40048260 VF610_DDR_PAD_CTRL
+wm 32 0x40048264 VF610_DDR_PAD_CTRL
+wm 32 0x40048268 VF610_DDR_PAD_CTRL
+wm 32 0x4004826c VF610_DDR_PAD_CTRL
+wm 32 0x40048270 VF610_DDR_PAD_CTRL
+wm 32 0x40048274 VF610_DDR_PAD_CTRL
+wm 32 0x40048278 VF610_DDR_PAD_CTRL
+wm 32 0x4004827c VF610_DDR_PAD_CTRL_1
+wm 32 0x40048280 VF610_DDR_PAD_CTRL_1
+wm 32 0x40048284 VF610_DDR_PAD_CTRL_1
+wm 32 0x40048288 VF610_DDR_PAD_CTRL_1
+wm 32 0x4004828c VF610_DDR_PAD_CTRL_1
+wm 32 0x40048290 VF610_DDR_PAD_CTRL_1
+wm 32 0x40048294 VF610_DDR_PAD_CTRL_1
+wm 32 0x40048298 VF610_DDR_PAD_CTRL_1
+wm 32 0x4004829c VF610_DDR_PAD_CTRL_1
+wm 32 0x400482a0 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482a4 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482a8 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482ac VF610_DDR_PAD_CTRL_1
+wm 32 0x400482b0 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482b4 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482b8 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482bc VF610_DDR_PAD_CTRL_1
+wm 32 0x400482c0 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482c4 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482c8 VF610_DDR_PAD_CTRL_1
+wm 32 0x400482cc VF610_DDR_PAD_CTRL
+wm 32 0x400482d0 VF610_DDR_PAD_CTRL
+wm 32 0x400482d4 VF610_DDR_PAD_CTRL
+wm 32 0x400482d8 VF610_DDR_PAD_CTRL
+wm 32 0x4004821c VF610_DDR_PAD_CTRL
+
+/* ======================= DDR Controller =======================*/
+
+CHECKPOINT(5)
+
+wm 32 0x400ae000 0x00000600
+wm 32 0x400ae008 0x00000020
+wm 32 0x400ae028 0x00013880
+wm 32 0x400ae02c 0x00030d40
+wm 32 0x400ae030 0x0000050c
+wm 32 0x400ae034 0x15040400
+wm 32 0x400ae038 0x1406040f
+wm 32 0x400ae040 0x04040000
+wm 32 0x400ae044 0x006db00c
+wm 32 0x400ae048 0x00000403
+wm 32 0x400ae050 0x01000000
+wm 32 0x400ae054 0x00060001
+wm 32 0x400ae058 0x000c0000
+wm 32 0x400ae05c 0x03000200
+wm 32 0x400ae060 0x00000006
+wm 32 0x400ae064 0x00010000
+wm 32 0x400ae068 0x0c30002c
+wm 32 0x400ae070 0x00000000
+wm 32 0x400ae074 0x00000003
+wm 32 0x400ae078 0x0000000a
+wm 32 0x400ae07c 0x003001d4
+wm 32 0x400ae084 0x00010000
+wm 32 0x400ae088 0x00050500
+wm 32 0x400ae098 0x00000000
+wm 32 0x400ae09c 0x04001002
+wm 32 0x400ae0a4 0x00000001
+wm 32 0x400ae0c0 0x00460420
+wm 32 0x400ae108 0x01000200
+wm 32 0x400ae10c 0x00000040
+wm 32 0x400ae114 0x00000200
+wm 32 0x400ae118 0x00000040
+wm 32 0x400ae120 0x00000000
+wm 32 0x400ae124 0x0a010300
+wm 32 0x400ae128 0x01014040
+wm 32 0x400ae12c 0x01010101
+wm 32 0x400ae130 0x03030100
+wm 32 0x400ae134 0x01000101
+wm 32 0x400ae138 0x0700000c
+wm 32 0x400ae13c 0x00000000
+wm 32 0x400ae148 0x10000000
+wm 32 0x400ae15c 0x01000000
+wm 32 0x400ae160 0x00040000
+wm 32 0x400ae164 0x00000002
+wm 32 0x400ae16c 0x00020000
+wm 32 0x400ae180 0x00002819
+wm 32 0x400ae184 0x01000000
+wm 32 0x400ae188 0x00000000
+wm 32 0x400ae18c 0x00000000
+wm 32 0x400ae198 0x00010100
+wm 32 0x400ae1a4 0x00000000
+wm 32 0x400ae1a8 0x00000004
+wm 32 0x400ae1b8 0x00040000
+wm 32 0x400ae1c8 0x00000000
+wm 32 0x400ae1cc 0x00000000
+wm 32 0x400ae1d4 0x00000000
+wm 32 0x400ae1d8 0x01010000
+wm 32 0x400ae1e0 0x02020000
+wm 32 0x400ae1e4 0x00000202
+wm 32 0x400ae1e8 0x01010064
+wm 32 0x400ae1ec 0x00010101
+wm 32 0x400ae1f0 0x00000064
+wm 32 0x400ae1f8 0x00000800
+wm 32 0x400ae210 0x00000506
+wm 32 0x400ae224 0x00020000
+wm 32 0x400ae228 0x01000000
+wm 32 0x400ae22c 0x04070303
+wm 32 0x400ae230 0x00000040
+wm 32 0x400ae23c 0x06000080
+wm 32 0x400ae240 0x04070303
+wm 32 0x400ae244 0x00000040
+wm 32 0x400ae248 0x00000040
+wm 32 0x400ae24c 0x000f0000
+wm 32 0x400ae250 0x000f0000
+wm 32 0x400ae25c 0x00000101
+wm 32 0x400ae268 0x682c4000
+wm 32 0x400ae26c 0x00000012
+wm 32 0x400ae278 0x00000006
+wm 32 0x400ae284 0x00010202
+
+/* ======================= DDR PHY =======================*/
+
+CHECKPOINT(6)
+
+wm 32 0x400ae400 DDRMC_PHY_DQ_TIMING
+wm 32 0x400ae440 DDRMC_PHY_DQ_TIMING
+wm 32 0x400ae480 DDRMC_PHY_DQ_TIMING
+wm 32 0x400ae404 DDRMC_PHY_DQS_TIMING
+wm 32 0x400ae444 DDRMC_PHY_DQS_TIMING
+wm 32 0x400ae408 DDRMC_PHY_CTRL
+wm 32 0x400ae448 DDRMC_PHY_CTRL
+wm 32 0x400ae488 DDRMC_PHY_CTRL
+wm 32 0x400ae40c DDRMC_PHY_CTRL
+wm 32 0x400ae44c DDRMC_PHY_CTRL
+wm 32 0x400ae48c DDRMC_PHY_CTRL
+wm 32 0x400ae410 DDRMC_PHY_SLAVE_CTRL
+wm 32 0x400ae450 DDRMC_PHY_SLAVE_CTRL
+wm 32 0x400ae490 DDRMC_PHY_SLAVE_CTRL
+wm 32 0x400ae4c4 DDRMC_PHY_OFF
+wm 32 0x400ae4c8 0x00001100
+wm 32 0x400ae4d0 DDRMC_PHY_PROC_PAD_ODT
+wm 32 0x400ae000 0x00000601
+
+CHECKPOINT(7)
+
+check 32 while_any_bit_clear 0x400ae140 0x100
+
+CHECKPOINT(8)
+
+/*
+ * Cargo cult DDR controller initialization here we come!
+ *
+ * Experemintation with VF610 Tower Board shows that without the
+ * following code the board would not boot off of SD card when
+ * power-cycled. It will however happily boot when reset via SW3/Reset
+ * button. For whatever reason the following actions appear to be
+ * necessary:
+ *
+ *          - Initialize DDRMC as usual
+ *	    - Issue a read to location in DDR address space
+ *	    - Disable DDRMC
+ *	    - Enable DDRMC and wait for it to finish initializing
+ *
+ * I am sure this is all going to be extrememly embarrassing to read
+ * if/when the real problem and real solution is found.
+ */
+
+/*
+ * Because there's no standalone read command what we do here instead
+ * is write a pattern to memory and then checking that memory address
+ * against that pattern
+ */
+wm 32 0x80000000 0xa5a5a5a5
+check 32 while_any_bit_clear 0x80000000 0xa5a5a5a5
+
+wm 32 0x400ae000 0x00000600
+wm 32 0x400ae000 0x00000601
+
+check 32 while_any_bit_clear 0x400ae140 0x100
+
+CHECKPOINT(9)
\ No newline at end of file
diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
new file mode 100644
index 0000000..6504273
--- /dev/null
+++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
@@ -0,0 +1,45 @@
+#include <common.h>
+#include <linux/sizes.h>
+#include <mach/generic.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/vf610-regs.h>
+#include <mach/clock-vf610.h>
+#include <mach/iomux-vf610.h>
+#include <debug_ll.h>
+
+static inline void setup_uart(void)
+{
+	void __iomem *iomuxbase = IOMEM(VF610_IOMUXC_BASE_ADDR);
+
+	vf610_ungate_all_peripherals();
+
+	/*
+	 * VF610_PAD_PTB4__UART1_TX
+	 */
+	writel(VF610_UART_PAD_CTRL | (2 << 20), iomuxbase + 0x0068);
+	writel(0, iomuxbase + 0x0380);
+
+	vf610_uart_setup_ll();
+}
+
+extern char __dtb_vf610_twr_start[];
+
+ENTRY_FUNCTION(start_vf610_twr, r0, r1, r2)
+{
+	int i;
+	void *fdt;
+	void __iomem *mscm = IOMEM(VF610_MSCM_BASE_ADDR);
+
+	vf610_cpu_lowlevel_init();
+
+	for (i = 0; i < VF610_MSCM_IRSPRC_NUM; i++)
+		writew(VF610_MSCM_IRSPRC_CP0_EN,
+		       mscm + VF610_MSCM_IRSPRC(i));
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_vf610_twr_start - get_runtime_offset();
+	barebox_arm_entry(0x80000000, SZ_128M, fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d1a3fe8..f93152c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -76,5 +76,6 @@ pbl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o
 pbl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
 pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
+pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
 
 clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
new file mode 100644
index 0000000..54b4435
--- /dev/null
+++ b/arch/arm/dts/vf610-twr.dts
@@ -0,0 +1,14 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arm/vf610-twr.dts>
+
+&usbdev0 {
+	status = "disabled";
+};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 71862ef..0284a8f 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -332,6 +332,10 @@ config MACH_CM_FX6
 	bool "CM FX6"
 	select ARCH_IMX6
 
+config MACH_VF610_TWR
+	bool "Freescale VF610 Tower Board"
+	select ARCH_VF610
+
 endif
 
 # ----------------------------------------------------------
diff --git a/arch/arm/mach-imx/include/mach/clock-vf610.h b/arch/arm/mach-imx/include/mach/clock-vf610.h
new file mode 100644
index 0000000..b75309a
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/clock-vf610.h
@@ -0,0 +1,215 @@
+/*
+ * Copyright 2013-2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_VF610_CCM_REGS_H__
+#define __ARCH_ARM_MACH_VF610_CCM_REGS_H__
+
+
+#define VF610_CCM_CCR			(VF610_CCM_BASE_ADDR + 0x00)
+#define VF610_CCM_CSR			(VF610_CCM_BASE_ADDR + 0x04)
+#define VF610_CCM_CCSR			(VF610_CCM_BASE_ADDR + 0x08)
+#define VF610_CCM_CACRR			(VF610_CCM_BASE_ADDR + 0x0c)
+#define VF610_CCM_CSCMR1		(VF610_CCM_BASE_ADDR + 0x10)
+#define VF610_CCM_CSCDR1		(VF610_CCM_BASE_ADDR + 0x14)
+#define VF610_CCM_CSCDR2		(VF610_CCM_BASE_ADDR + 0x18)
+#define VF610_CCM_CSCDR3		(VF610_CCM_BASE_ADDR + 0x1c)
+#define VF610_CCM_CSCMR2		(VF610_CCM_BASE_ADDR + 0x20)
+#define VF610_CCM_CTOR		(VF610_CCM_BASE_ADDR + 0x28)
+#define VF610_CCM_CLPCR		(VF610_CCM_BASE_ADDR + 0x2c)
+#define VF610_CCM_CISR		(VF610_CCM_BASE_ADDR + 0x30)
+#define VF610_CCM_CIMR		(VF610_CCM_BASE_ADDR + 0x34)
+#define VF610_CCM_CCOSR		(VF610_CCM_BASE_ADDR + 0x38)
+#define VF610_CCM_CGPR		(VF610_CCM_BASE_ADDR + 0x3c)
+#define VF610_CCM_CCGR0		(VF610_CCM_BASE_ADDR + 0x40)
+#define VF610_CCM_CCGR1		(VF610_CCM_BASE_ADDR + 0x44)
+#define VF610_CCM_CCGR2		(VF610_CCM_BASE_ADDR + 0x48)
+#define VF610_CCM_CCGR3		(VF610_CCM_BASE_ADDR + 0x4c)
+#define VF610_CCM_CCGR4		(VF610_CCM_BASE_ADDR + 0x50)
+#define VF610_CCM_CCGR5		(VF610_CCM_BASE_ADDR + 0x54)
+#define VF610_CCM_CCGR6		(VF610_CCM_BASE_ADDR + 0x58)
+#define VF610_CCM_CCGR7		(VF610_CCM_BASE_ADDR + 0x5c)
+#define VF610_CCM_CCGR8		(VF610_CCM_BASE_ADDR + 0x60)
+#define VF610_CCM_CCGR9		(VF610_CCM_BASE_ADDR + 0x64)
+#define VF610_CCM_CCGR10		(VF610_CCM_BASE_ADDR + 0x68)
+#define VF610_CCM_CCGR11		(VF610_CCM_BASE_ADDR + 0x6c)
+#define VF610_CCM_CMEOR0		(VF610_CCM_BASE_ADDR + 0x70)
+#define VF610_CCM_CMEOR1		(VF610_CCM_BASE_ADDR + 0x74)
+#define VF610_CCM_CMEOR2		(VF610_CCM_BASE_ADDR + 0x78)
+#define VF610_CCM_CMEOR3		(VF610_CCM_BASE_ADDR + 0x7c)
+#define VF610_CCM_CMEOR4		(VF610_CCM_BASE_ADDR + 0x80)
+#define VF610_CCM_CMEOR5		(VF610_CCM_BASE_ADDR + 0x84)
+#define VF610_CCM_CPPDSR		(VF610_CCM_BASE_ADDR + 0x88)
+#define VF610_CCM_CCOWR			(VF610_CCM_BASE_ADDR + 0x8c)
+#define VF610_CCM_CCPGR0		(VF610_CCM_BASE_ADDR + 0x90)
+#define VF610_CCM_CCPGR1		(VF610_CCM_BASE_ADDR + 0x94)
+#define VF610_CCM_CCPGR2		(VF610_CCM_BASE_ADDR + 0x98)
+#define VF610_CCM_CCPGR3		(VF610_CCM_BASE_ADDR + 0x9c)
+
+#define VF610_CCM_CCGRx_CGn(n)	((n) * 2)
+
+/* #define VF610_ANADIG_PFD_PLL1_BASE	(VF610_ANADIG_BASE_ADDR + 0x2b0) */
+/* #define VF610_ANADIG_PFD_PLL2_BASE	(VF610_ANADIG_BASE_ADDR + 0x100) */
+/* #define VF610_ANADIG_PFD_PLL3_BASE	(VF610_ANADIG_BASE_ADDR + 0xf0) */
+#define VF610_ANADIG_PLL1_CTRL		(VF610_ANADIG_BASE_ADDR + 0x270)
+#define VF610_ANADIG_PLL1_NUM		(VF610_ANADIG_BASE_ADDR + 0x290)
+#define VF610_ANADIG_PLL1_DENOM		(VF610_ANADIG_BASE_ADDR + 0x2A0)
+#define VF610_ANADIG_PLL2_CTRL		(VF610_ANADIG_BASE_ADDR + 0x30)
+#define VF610_ANADIG_PLL2_NUM		(VF610_ANADIG_BASE_ADDR + 0x50)
+#define VF610_ANADIG_PLL3_CTRL		(VF610_ANADIG_BASE_ADDR + 0x10)
+#define VF610_ANADIG_PLL4_CTRL		(VF610_ANADIG_BASE_ADDR + 0x70)
+#define VF610_ANADIG_PLL5_CTRL		(VF610_ANADIG_BASE_ADDR + 0xe0)
+#define VF610_ANADIG_PLL6_CTRL		(VF610_ANADIG_BASE_ADDR + 0xa0)
+#define VF610_ANADIG_PLL7_CTRL		(VF610_ANADIG_BASE_ADDR + 0x20)
+#define VF610_ANADIG_ANA_MISC1		(VF610_ANADIG_BASE_ADDR + 0x160)
+#define VF610_ANADIG_LOCK		(VF610_ANADIG_BASE_ADDR + 0x2C0)
+
+#define CCM_CCR_FIRC_EN				(1 << 16)
+#define CCM_CCR_OSCNT_MASK			0xff
+#define CCM_CCR_OSCNT(v)			((v) & 0xff)
+
+#define CCM_CCSR_PLL2_PFD_CLK_SEL_OFFSET	19
+#define CCM_CCSR_PLL2_PFD_CLK_SEL_MASK		(0x7 << 19)
+#define CCM_CCSR_PLL2_PFD_CLK_SEL(v)		(((v) & 0x7) << 19)
+
+#define CCM_CCSR_PLL1_PFD_CLK_SEL_OFFSET	16
+#define CCM_CCSR_PLL1_PFD_CLK_SEL_MASK		(0x7 << 16)
+#define CCM_CCSR_PLL1_PFD_CLK_SEL(v)		(((v) & 0x7) << 16)
+
+#define CCM_CCSR_PLL2_PFD4_EN			(1 << 15)
+#define CCM_CCSR_PLL2_PFD3_EN			(1 << 14)
+#define CCM_CCSR_PLL2_PFD2_EN			(1 << 13)
+#define CCM_CCSR_PLL2_PFD1_EN			(1 << 12)
+#define CCM_CCSR_PLL1_PFD4_EN			(1 << 11)
+#define CCM_CCSR_PLL1_PFD3_EN			(1 << 10)
+#define CCM_CCSR_PLL1_PFD2_EN			(1 << 9)
+#define CCM_CCSR_PLL1_PFD1_EN			(1 << 8)
+
+#define CCM_CCSR_DDRC_CLK_SEL(v)		((v) << 6)
+#define CCM_CCSR_FAST_CLK_SEL(v)		((v) << 5)
+
+#define CCM_CCSR_SYS_CLK_SEL_OFFSET		0
+#define CCM_CCSR_SYS_CLK_SEL_MASK		0x7
+#define CCM_CCSR_SYS_CLK_SEL(v)			((v) & 0x7)
+
+#define CCM_CACRR_IPG_CLK_DIV_OFFSET		11
+#define CCM_CACRR_IPG_CLK_DIV_MASK		(0x3 << 11)
+#define CCM_CACRR_IPG_CLK_DIV(v)		(((v) & 0x3) << 11)
+#define CCM_CACRR_BUS_CLK_DIV_OFFSET		3
+#define CCM_CACRR_BUS_CLK_DIV_MASK		(0x7 << 3)
+#define CCM_CACRR_BUS_CLK_DIV(v)		(((v) & 0x7) << 3)
+#define CCM_CACRR_ARM_CLK_DIV_OFFSET		0
+#define CCM_CACRR_ARM_CLK_DIV_MASK		0x7
+#define CCM_CACRR_ARM_CLK_DIV(v)		((v) & 0x7)
+
+#define CCM_CSCMR1_QSPI0_CLK_SEL_OFFSET		22
+#define CCM_CSCMR1_QSPI0_CLK_SEL_MASK		(0x3 << 22)
+#define CCM_CSCMR1_QSPI0_CLK_SEL(v)		(((v) & 0x3) << 22)
+#define CCM_CSCMR1_ESDHC1_CLK_SEL_OFFSET	18
+#define CCM_CSCMR1_ESDHC1_CLK_SEL_MASK		(0x3 << 18)
+#define CCM_CSCMR1_ESDHC1_CLK_SEL(v)		(((v) & 0x3) << 18)
+#define CCM_CSCMR1_NFC_CLK_SEL_OFFSET		12
+#define CCM_CSCMR1_NFC_CLK_SEL_MASK		(0x3 << 12)
+#define CCM_CSCMR1_NFC_CLK_SEL(v)		(((v) & 0x3) << 12)
+
+#define CCM_CSCDR1_RMII_CLK_EN			(1 << 24)
+
+#define CCM_CSCDR2_NFC_EN			(1 << 9)
+#define CCM_CSCDR2_NFC_FRAC_DIV_EN		(1 << 13)
+#define CCM_CSCDR2_NFC_CLK_INV			(1 << 14)
+#define CCM_CSCDR2_NFC_FRAC_DIV_OFFSET		4
+#define CCM_CSCDR2_NFC_FRAC_DIV_MASK		(0xf << 4)
+#define CCM_CSCDR2_NFC_FRAC_DIV(v)		(((v) & 0xf) << 4)
+
+#define CCM_CSCDR2_ESDHC1_EN			(1 << 29)
+#define CCM_CSCDR2_ESDHC1_CLK_DIV_OFFSET	20
+#define CCM_CSCDR2_ESDHC1_CLK_DIV_MASK		(0xf << 20)
+#define CCM_CSCDR2_ESDHC1_CLK_DIV(v)		(((v) & 0xf) << 20)
+
+#define CCM_CSCDR3_NFC_PRE_DIV_OFFSET		13
+#define CCM_CSCDR3_NFC_PRE_DIV_MASK		(0x7 << 13)
+#define CCM_CSCDR3_NFC_PRE_DIV(v)		(((v) & 0x7) << 13)
+#define CCM_CSCDR3_QSPI0_EN			(1 << 4)
+#define CCM_CSCDR3_QSPI0_DIV(v)			((v) << 3)
+#define CCM_CSCDR3_QSPI0_X2_DIV(v)		((v) << 2)
+#define CCM_CSCDR3_QSPI0_X4_DIV(v)		((v) & 0x3)
+
+#define CCM_CSCMR2_RMII_CLK_SEL_OFFSET		4
+#define CCM_CSCMR2_RMII_CLK_SEL_MASK		(0x3 << 4)
+#define CCM_CSCMR2_RMII_CLK_SEL(v)		(((v) & 0x3) << 4)
+
+#define CCM_REG_CTRL_MASK			0xffffffff
+#define CCM_CCGR0_UART0_CTRL_MASK               (0x3 << 14)
+#define CCM_CCGR0_UART1_CTRL_MASK		(0x3 << 16)
+#define CCM_CCGR0_DSPI0_CTRL_MASK		(0x3 << 24)
+#define CCM_CCGR0_DSPI1_CTRL_MASK		(0x3 << 26)
+#define CCM_CCGR1_USBC0_CTRL_MASK       (0x3 << 8)
+#define CCM_CCGR1_PIT_CTRL_MASK			(0x3 << 14)
+#define CCM_CCGR1_WDOGA5_CTRL_MASK		(0x3 << 28)
+#define CCM_CCGR2_QSPI0_CTRL_MASK		(0x3 << 8)
+#define CCM_CCGR2_IOMUXC_CTRL_MASK		(0x3 << 16)
+#define CCM_CCGR2_PORTA_CTRL_MASK		(0x3 << 18)
+#define CCM_CCGR2_PORTB_CTRL_MASK		(0x3 << 20)
+#define CCM_CCGR2_PORTC_CTRL_MASK		(0x3 << 22)
+#define CCM_CCGR2_PORTD_CTRL_MASK		(0x3 << 24)
+#define CCM_CCGR2_PORTE_CTRL_MASK		(0x3 << 26)
+#define CCM_CCGR3_ANADIG_CTRL_MASK		0x3
+#define CCM_CCGR3_SCSC_CTRL_MASK        (0x3 << 4)
+#define CCM_CCGR4_WKUP_CTRL_MASK		(0x3 << 20)
+#define CCM_CCGR4_CCM_CTRL_MASK			(0x3 << 22)
+#define CCM_CCGR4_GPC_CTRL_MASK			(0x3 << 24)
+#define CCM_CCGR4_I2C0_CTRL_MASK		(0x3 << 12)
+#define CCM_CCGR4_I2C1_CTRL_MASK		(0x3 << 14)
+#define CCM_CCGR6_OCOTP_CTRL_MASK		(0x3 << 10)
+#define CCM_CCGR6_DSPI2_CTRL_MASK		(0x3 << 24)
+#define CCM_CCGR6_DSPI3_CTRL_MASK		(0x3 << 26)
+#define CCM_CCGR6_DDRMC_CTRL_MASK		(0x3 << 28)
+#define CCM_CCGR7_SDHC1_CTRL_MASK		(0x3 << 4)
+#define CCM_CCGR7_USBC1_CTRL_MASK       (0x3 << 8)
+#define CCM_CCGR9_FEC0_CTRL_MASK		0x3
+#define CCM_CCGR9_FEC1_CTRL_MASK		(0x3 << 2)
+#define CCM_CCGR10_NFC_CTRL_MASK		0x3
+#define CCM_CCGR10_I2C2_CTRL_MASK		(0x3 << 12)
+#define CCM_CCGR10_I2C3_CTRL_MASK		(0x3 << 14)
+
+#define ANADIG_PLL7_CTRL_BYPASS         (1 << 16)
+#define ANADIG_PLL7_CTRL_ENABLE         (1 << 13)
+#define ANADIG_PLL7_CTRL_POWERDOWN      (1 << 12)
+#define ANADIG_PLL7_CTRL_DIV_SELECT     (1 << 1)
+#define ANADIG_PLL5_CTRL_BYPASS                 (1 << 16)
+#define ANADIG_PLL5_CTRL_ENABLE                 (1 << 13)
+#define ANADIG_PLL5_CTRL_POWERDOWN              (1 << 12)
+#define ANADIG_PLL5_CTRL_DIV_SELECT		1
+#define ANADIG_PLL3_CTRL_BYPASS         (1 << 16)
+#define ANADIG_PLL3_CTRL_ENABLE         (1 << 13)
+#define ANADIG_PLL3_CTRL_POWERDOWN      (1 << 12)
+#define ANADIG_PLL3_CTRL_DIV_SELECT     (1 << 1)
+#define ANADIG_PLL2_CTRL_ENABLE			(1 << 13)
+#define ANADIG_PLL2_CTRL_POWERDOWN		(1 << 12)
+#define ANADIG_PLL2_CTRL_DIV_SELECT		1
+#define ANADIG_PLL1_CTRL_ENABLE			(1 << 13)
+#define ANADIG_PLL1_CTRL_POWERDOWN		(1 << 12)
+#define ANADIG_PLL1_CTRL_DIV_SELECT		1
+
+#define FASE_CLK_FREQ		24000000
+#define SLOW_CLK_FREQ		32000
+#define PLL1_PFD1_FREQ		500000000
+#define PLL1_PFD2_FREQ		452000000
+#define PLL1_PFD3_FREQ		396000000
+#define PLL1_PFD4_FREQ		528000000
+#define PLL1_MAIN_FREQ		528000000
+#define PLL2_PFD1_FREQ		500000000
+#define PLL2_PFD2_FREQ		396000000
+#define PLL2_PFD3_FREQ		339000000
+#define PLL2_PFD4_FREQ		413000000
+#define PLL2_MAIN_FREQ		528000000
+#define PLL3_MAIN_FREQ		480000000
+#define PLL3_PFD3_FREQ		298000000
+#define PLL5_MAIN_FREQ		500000000
+
+#define ENET_EXTERNAL_CLK	50000000
+#define AUDIO_EXTERNAL_CLK	24576000
+
+#endif /*__ARCH_ARM_MACH_VF610_CCM_REGS_H__ */
diff --git a/arch/arm/mach-imx/include/mach/iomux-vf610.h b/arch/arm/mach-imx/include/mach/iomux-vf610.h
new file mode 100644
index 0000000..db0e59f
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/iomux-vf610.h
@@ -0,0 +1,258 @@
+/*
+ * Copyright 2013-2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __IOMUX_VF610_H__
+#define __IOMUX_VF610_H__
+
+#include <mach/iomux-v3.h>
+
+#undef PAD_CTL_ODE
+#undef PAD_CTL_PKE
+#undef PAD_CTL_PUE
+
+#define PAD_MUX_MODE_SHIFT	20
+
+#define PAD_CTL_INPUT_DIFFERENTIAL (1 << 16)
+
+#define PAD_CTL_SPEED_MED	(1 << 12)
+#define PAD_CTL_SPEED_HIGH	(3 << 12)
+
+#define PAD_CTL_SRE		(1 << 11)
+
+
+#define PAD_CTL_ODE		(1 << 10)
+
+#define PAD_CTL_DSE_150ohm	(1 << 6)
+#define PAD_CTL_DSE_50ohm	(3 << 6)
+#define PAD_CTL_DSE_25ohm	(6 << 6)
+#define PAD_CTL_DSE_20ohm	(7 << 6)
+
+#define PAD_CTL_PUS_47K_UP	(1 << 4 | PAD_CTL_PUE)
+#define PAD_CTL_PUS_100K_UP	(2 << 4 | PAD_CTL_PUE)
+#define PAD_CTL_PUS_22K_UP	(3 << 4 | PAD_CTL_PUE)
+
+#define PAD_CTL_PKE		(1 << 3)
+#define PAD_CTL_PUE		(1 << 2 | PAD_CTL_PKE)
+
+#define PAD_CTL_OBE_IBE_ENABLE	(3 << 0)
+#define PAD_CTL_OBE_ENABLE	(1 << 1)
+#define PAD_CTL_IBE_ENABLE	(1 << 0)
+
+
+/* These 2 defines are for pins that may not have a mux register, but could
+ * have a pad setting register, and vice-versa. */
+#define __NA_	0x00
+
+
+
+/* Pad control groupings */
+#define VF610_UART_PAD_CTRL	(PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_25ohm | \
+				PAD_CTL_OBE_IBE_ENABLE)
+#define VF610_SDHC_PAD_CTRL	(PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_20ohm | \
+				PAD_CTL_OBE_IBE_ENABLE)
+#define VF610_ENET_PAD_CTRL	(PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_50ohm | \
+				PAD_CTL_OBE_IBE_ENABLE)
+#define VF610_DDR_PAD_CTRL	PAD_CTL_DSE_25ohm
+#define VF610_DDR_PAD_CTRL_1	(PAD_CTL_DSE_25ohm | \
+				PAD_CTL_INPUT_DIFFERENTIAL)
+#define VF610_I2C_PAD_CTRL	(PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_50ohm | \
+				PAD_CTL_SPEED_HIGH | PAD_CTL_ODE | \
+				PAD_CTL_OBE_IBE_ENABLE)
+#define VF610_NFC_IO_PAD_CTRL	(PAD_CTL_SPEED_MED | PAD_CTL_SRE | \
+				PAD_CTL_DSE_50ohm | PAD_CTL_PUS_47K_UP | \
+				PAD_CTL_OBE_IBE_ENABLE)
+#define VF610_NFC_CN_PAD_CTRL	(PAD_CTL_SPEED_MED | PAD_CTL_SRE | \
+				PAD_CTL_DSE_25ohm | PAD_CTL_OBE_ENABLE)
+#define VF610_NFC_RB_PAD_CTRL	(PAD_CTL_SPEED_MED | PAD_CTL_SRE | \
+				PAD_CTL_PUS_22K_UP | PAD_CTL_IBE_ENABLE)
+
+#define VF610_QSPI_PAD_CTRL	(PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_150ohm | \
+				PAD_CTL_PUS_22K_UP | PAD_CTL_OBE_IBE_ENABLE)
+
+#define VF610_GPIO_PAD_CTRL	(PAD_CTL_SPEED_MED | PAD_CTL_DSE_50ohm | \
+				PAD_CTL_IBE_ENABLE)
+
+#define VF610_DSPI_PAD_CTRL	(PAD_CTL_OBE_ENABLE | PAD_CTL_DSE_20ohm | \
+				PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH)
+#define VF610_DSPI_SIN_PAD_CTRL	(PAD_CTL_IBE_ENABLE | PAD_CTL_DSE_20ohm | \
+				PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH)
+
+enum {
+	VF610_PAD_PTA6__RMII0_CLKIN		= IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTA6__RMII0_CLKOUT		= IOMUX_PAD(0x0000, 0x0000, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTA7__GPIO_134		= IOMUX_PAD(0x0218, 0x0218, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTA17__GPIO_7			= IOMUX_PAD(0x001c, 0x001c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTA20__GPIO_10		= IOMUX_PAD(0x0028, 0x0028, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTA21__GPIO_11		= IOMUX_PAD(0x002c, 0x002c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTA30__GPIO_20		= IOMUX_PAD(0x0050, 0x0050, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTA31__GPIO_21		= IOMUX_PAD(0x0054, 0x0054, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB0__GPIO_22			= IOMUX_PAD(0x0058, 0x0058, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB1__GPIO_23			= IOMUX_PAD(0x005C, 0x005C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB4__UART1_TX		= IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, VF610_UART_PAD_CTRL),
+	VF610_PAD_PTB5__UART1_RX		= IOMUX_PAD(0x006c, 0x006c, 2, 0x037c, 0, VF610_UART_PAD_CTRL),
+	VF610_PAD_PTB6__GPIO_28			= IOMUX_PAD(0x0070, 0x0070, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB7__GPIO_29			= IOMUX_PAD(0x0074, 0x0074, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB8__GPIO_30			= IOMUX_PAD(0x0078, 0x0078, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB9__GPIO_31			= IOMUX_PAD(0x007C, 0x007C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB10__UART0_TX		= IOMUX_PAD(0x0080, 0x0080, 1, __NA_, 0, VF610_UART_PAD_CTRL),
+	VF610_PAD_PTB11__UART0_RX		= IOMUX_PAD(0x0084, 0x0084, 1, __NA_, 0, VF610_UART_PAD_CTRL),
+	VF610_PAD_PTB12__GPIO_34		= IOMUX_PAD(0x0088, 0x0088, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB13__GPIO_35		= IOMUX_PAD(0x008c, 0x008c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB16__GPIO_38		= IOMUX_PAD(0x0098, 0x0098, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB17__GPIO_39		= IOMUX_PAD(0x009c, 0x009c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB18__GPIO_40		= IOMUX_PAD(0x00a0, 0x00a0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB21__GPIO_43		= IOMUX_PAD(0x00ac, 0x00ac, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB22__GPIO_44		= IOMUX_PAD(0x00b0, 0x00b0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB23__GPIO_93		= IOMUX_PAD(0x0174, 0x0174, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB26__GPIO_96		= IOMUX_PAD(0x0180, 0x0180, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTB28__GPIO_98		= IOMUX_PAD(0x0188, 0x0188, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC1__GPIO_46			= IOMUX_PAD(0x00b8, 0x00b8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC1__RMII0_MDIO		= IOMUX_PAD(0x00b8, 0x00b8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC0__GPIO_45			= IOMUX_PAD(0x00b4, 0x00b4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC0__RMII0_MDC		= IOMUX_PAD(0x00b4, 0x00b4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC2__RMII0_CRS_DV		= IOMUX_PAD(0x00bc, 0x00bc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC2__GPIO_47			= IOMUX_PAD(0x00bc, 0x00bc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC3__RMII0_RD1		= IOMUX_PAD(0x00c0, 0x00c0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC3__GPIO_48			= IOMUX_PAD(0x00c0, 0x00c0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC4__RMII0_RD0		= IOMUX_PAD(0x00c4, 0x00c4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC4__GPIO_49			= IOMUX_PAD(0x00c4, 0x00c4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC5__RMII0_RXER		= IOMUX_PAD(0x00c8, 0x00c8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC5__GPIO_50			= IOMUX_PAD(0x00c8, 0x00c8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC6__RMII0_TD1		= IOMUX_PAD(0x00cc, 0x00cc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC6__GPIO_51			= IOMUX_PAD(0x00cc, 0x00cc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC7__RMII0_TD0		= IOMUX_PAD(0x00D0, 0x00D0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC7__GPIO_52			= IOMUX_PAD(0x00D0, 0x00D0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC8__RMII0_TXEN		= IOMUX_PAD(0x00D4, 0x00D4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC8__GPIO_53			= IOMUX_PAD(0x00D4, 0x00D4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC10__RMII1_MDIO		= IOMUX_PAD(0x00dc, 0x00dc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC9__RMII1_MDC		= IOMUX_PAD(0x00d8, 0x00d8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC11__RMII1_CRS_DV		= IOMUX_PAD(0x00e0, 0x00e0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC12__RMII1_RD1		= IOMUX_PAD(0x00e4, 0x00e4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC13__RMII1_RD0		= IOMUX_PAD(0x00e8, 0x00e8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC14__RMII1_RXER		= IOMUX_PAD(0x00ec, 0x00ec, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC15__RMII1_TD1		= IOMUX_PAD(0x00f0, 0x00f0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC16__RMII1_TD0		= IOMUX_PAD(0x00f4, 0x00f4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTC17__RMII1_TXEN		= IOMUX_PAD(0x00f8, 0x00f8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+	VF610_PAD_PTD5__DSPI1_CS0		= IOMUX_PAD(0x0150, 0x0150, 3, 0x300, 1, VF610_DSPI_PAD_CTRL),
+	VF610_PAD_PTD6__DSPI1_SIN		= IOMUX_PAD(0x0154, 0x0154, 3, 0x2fc, 1, VF610_DSPI_SIN_PAD_CTRL),
+	VF610_PAD_PTD7__DSPI1_SOUT		= IOMUX_PAD(0x0158, 0x0158, 3, __NA_, 0, VF610_DSPI_PAD_CTRL),
+	VF610_PAD_PTD8__DSPI1_SCK		= IOMUX_PAD(0x015c, 0x015c, 3, 0x2f8, 1, VF610_DSPI_PAD_CTRL),
+	VF610_PAD_PTC29__GPIO_102		= IOMUX_PAD(0x0198, 0x0198, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTC30__GPIO_103		= IOMUX_PAD(0x019c, 0x019c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTA24__ESDHC1_CLK		= IOMUX_PAD(0x0038, 0x0038, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
+	VF610_PAD_PTA25__ESDHC1_CMD		= IOMUX_PAD(0x003c, 0x003c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
+	VF610_PAD_PTA26__ESDHC1_DAT0		= IOMUX_PAD(0x0040, 0x0040, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
+	VF610_PAD_PTA27__ESDHC1_DAT1		= IOMUX_PAD(0x0044, 0x0044, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
+	VF610_PAD_PTA28__ESDHC1_DAT2		= IOMUX_PAD(0x0048, 0x0048, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
+	VF610_PAD_PTA29__ESDHC1_DAT3		= IOMUX_PAD(0x004c, 0x004c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
+	VF610_PAD_PTB14__I2C0_SCL		= IOMUX_PAD(0x0090, 0x0090, 2, 0x033c, 1, VF610_I2C_PAD_CTRL),
+	VF610_PAD_PTB15__I2C0_SDA		= IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, VF610_I2C_PAD_CTRL),
+	VF610_PAD_PTA22__I2C2_SCL		= IOMUX_PAD(0x0030, 0x0030, 6, 0x034c, 0, VF610_I2C_PAD_CTRL),
+	VF610_PAD_PTA23__I2C2_SDA		= IOMUX_PAD(0x0034, 0x0034, 6, 0x0350, 0, VF610_I2C_PAD_CTRL),
+	VF610_PAD_PTD31__NF_IO15		= IOMUX_PAD(0x00fc, 0x00fc, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD31__GPIO_63		= IOMUX_PAD(0x00fc, 0x00fc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD30__NF_IO14		= IOMUX_PAD(0x0100, 0x0100, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD30__GPIO_64		= IOMUX_PAD(0x0100, 0x0100, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD29__NF_IO13		= IOMUX_PAD(0x0104, 0x0104, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD29__GPIO_65		= IOMUX_PAD(0x0104, 0x0104, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD28__NF_IO12		= IOMUX_PAD(0x0108, 0x0108, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD28__GPIO_66		= IOMUX_PAD(0x0108, 0x0108, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD27__NF_IO11		= IOMUX_PAD(0x010c, 0x010c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD27__GPIO_67		= IOMUX_PAD(0x010c, 0x010c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD26__NF_IO10		= IOMUX_PAD(0x0110, 0x0110, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD26__GPIO_68		= IOMUX_PAD(0x0110, 0x0110, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD25__NF_IO9			= IOMUX_PAD(0x0114, 0x0114, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD25__GPIO_69		= IOMUX_PAD(0x0114, 0x0114, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD24__NF_IO8			= IOMUX_PAD(0x0118, 0x0118, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD24__GPIO_70		= IOMUX_PAD(0x0118, 0x0118, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD23__NF_IO7			= IOMUX_PAD(0x011c, 0x011c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD0__QSPI0_A_QSCK		= IOMUX_PAD(0x013c, 0x013c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD1__QSPI0_A_CS0		= IOMUX_PAD(0x0140, 0x0140, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD2__QSPI0_A_DATA3		= IOMUX_PAD(0x0144, 0x0144, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD3__QSPI0_A_DATA2		= IOMUX_PAD(0x0148, 0x0148, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD4__GPIO_83         = IOMUX_PAD(0x014C, 0x014C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD4__QSPI0_A_DATA1		= IOMUX_PAD(0x014c, 0x014c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD5__QSPI0_A_DATA0		= IOMUX_PAD(0x0150, 0x0150, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD7__QSPI0_B_QSCK		= IOMUX_PAD(0x0158, 0x0158, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD8__QSPI0_B_CS0		= IOMUX_PAD(0x015c, 0x015c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD9__QSPI0_B_DATA3		= IOMUX_PAD(0x0160, 0x0160, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD9__GPIO_88			= IOMUX_PAD(0x0160, 0x0160, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD10__QSPI0_B_DATA2		= IOMUX_PAD(0x0164, 0x0164, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD10__GPIO_89		= IOMUX_PAD(0x0164, 0x0164, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD11__QSPI0_B_DATA1		= IOMUX_PAD(0x0168, 0x0168, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD11__GPIO_90		= IOMUX_PAD(0x0168, 0x0168, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD12__QSPI0_B_DATA0		= IOMUX_PAD(0x016c, 0x016c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+	VF610_PAD_PTD12__GPIO_91		= IOMUX_PAD(0x016c, 0x016c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD13__GPIO_92		= IOMUX_PAD(0x0170, 0x0170, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+	VF610_PAD_PTD22__NF_IO6			= IOMUX_PAD(0x0120, 0x0120, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD21__NF_IO5			= IOMUX_PAD(0x0124, 0x0124, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD20__NF_IO4			= IOMUX_PAD(0x0128, 0x0128, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD19__NF_IO3			= IOMUX_PAD(0x012c, 0x012c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD18__NF_IO2			= IOMUX_PAD(0x0130, 0x0130, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD17__NF_IO1			= IOMUX_PAD(0x0134, 0x0134, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTD16__NF_IO0			= IOMUX_PAD(0x0138, 0x0138, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+	VF610_PAD_PTB24__NF_WE_B		= IOMUX_PAD(0x0178, 0x0178, 5, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+	VF610_PAD_PTB25__NF_CE0_B		= IOMUX_PAD(0x017c, 0x017c, 5, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
+	VF610_PAD_PTB27__NF_RE_B 		= IOMUX_PAD(0x0184, 0x0184, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
+	VF610_PAD_PTC26__NF_RB_B 		= IOMUX_PAD(0x018C, 0x018C, 5, __NA_, 0, VF610_NFC_RB_PAD_CTRL),
+
+	VF610_PAD_PTC27__NF_ALE  		= IOMUX_PAD(0x0190, 0x0190, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
+	VF610_PAD_PTC28__NF_CLE  		= IOMUX_PAD(0x0194, 0x0194, 6, __NA_, 0, VF610_NFC_CN_PAD_CTRL),
+
+	VF610_PAD_DDR_RESETB			= IOMUX_PAD(0x021c, 0x021c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A15__DDR_A_15		= IOMUX_PAD(0x0220, 0x0220, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A14__DDR_A_14		= IOMUX_PAD(0x0224, 0x0224, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A13__DDR_A_13		= IOMUX_PAD(0x0228, 0x0228, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A12__DDR_A_12		= IOMUX_PAD(0x022c, 0x022c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A11__DDR_A_11		= IOMUX_PAD(0x0230, 0x0230, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A10__DDR_A_10		= IOMUX_PAD(0x0234, 0x0234, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A9__DDR_A_9		= IOMUX_PAD(0x0238, 0x0238, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A8__DDR_A_8		= IOMUX_PAD(0x023c, 0x023c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A7__DDR_A_7		= IOMUX_PAD(0x0240, 0x0240, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A6__DDR_A_6		= IOMUX_PAD(0x0244, 0x0244, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A5__DDR_A_5		= IOMUX_PAD(0x0248, 0x0248, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A4__DDR_A_4		= IOMUX_PAD(0x024c, 0x024c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A3__DDR_A_3		= IOMUX_PAD(0x0250, 0x0250, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A2__DDR_A_2		= IOMUX_PAD(0x0254, 0x0254, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A1__DDR_A_1		= IOMUX_PAD(0x0258, 0x0258, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_A0__DDR_A_0		= IOMUX_PAD(0x025c, 0x025c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_BA2__DDR_BA_2		= IOMUX_PAD(0x0260, 0x0260, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_BA1__DDR_BA_1		= IOMUX_PAD(0x0264, 0x0264, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_BA0__DDR_BA_0		= IOMUX_PAD(0x0268, 0x0268, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_CAS__DDR_CAS_B		= IOMUX_PAD(0x026c, 0x026c, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_CKE__DDR_CKE_0		= IOMUX_PAD(0x0270, 0x0270, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_CLK__DDR_CLK_0		= IOMUX_PAD(0x0274, 0x0274, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_CS__DDR_CS_B_0		= IOMUX_PAD(0x0278, 0x0278, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_D15__DDR_D_15		= IOMUX_PAD(0x027c, 0x027c, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D14__DDR_D_14		= IOMUX_PAD(0x0280, 0x0280, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D13__DDR_D_13		= IOMUX_PAD(0x0284, 0x0284, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D12__DDR_D_12		= IOMUX_PAD(0x0288, 0x0288, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D11__DDR_D_11		= IOMUX_PAD(0x028c, 0x028c, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D10__DDR_D_10		= IOMUX_PAD(0x0290, 0x0290, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D9__DDR_D_9		= IOMUX_PAD(0x0294, 0x0294, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D8__DDR_D_8		= IOMUX_PAD(0x0298, 0x0298, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D7__DDR_D_7		= IOMUX_PAD(0x029c, 0x029c, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D6__DDR_D_6		= IOMUX_PAD(0x02a0, 0x02a0, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D5__DDR_D_5		= IOMUX_PAD(0x02a4, 0x02a4, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D4__DDR_D_4		= IOMUX_PAD(0x02a8, 0x02a8, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D3__DDR_D_3		= IOMUX_PAD(0x02ac, 0x02ac, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D2__DDR_D_2		= IOMUX_PAD(0x02b0, 0x02b0, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D1__DDR_D_1		= IOMUX_PAD(0x02b4, 0x02b4, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_D0__DDR_D_0		= IOMUX_PAD(0x02b8, 0x02b8, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_DQM1__DDR_DQM_1		= IOMUX_PAD(0x02bc, 0x02bc, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_DQM0__DDR_DQM_0		= IOMUX_PAD(0x02c0, 0x02c0, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_DQS1__DDR_DQS_1		= IOMUX_PAD(0x02c4, 0x02c4, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_DQS0__DDR_DQS_0		= IOMUX_PAD(0x02c8, 0x02c8, 0, __NA_, 0, VF610_DDR_PAD_CTRL_1),
+	VF610_PAD_DDR_RAS__DDR_RAS_B		= IOMUX_PAD(0x02cc, 0x02cc, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_WE__DDR_WE_B		= IOMUX_PAD(0x02d0, 0x02d0, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_ODT1__DDR_ODT_0		= IOMUX_PAD(0x02d4, 0x02d4, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+	VF610_PAD_DDR_ODT0__DDR_ODT_1		= IOMUX_PAD(0x02d8, 0x02d8, 0, __NA_, 0, VF610_DDR_PAD_CTRL),
+};
+
+#endif	/* __IOMUX_VF610_H__ */
diff --git a/images/Makefile.imx b/images/Makefile.imx
index b02fdff..14241b6 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -392,3 +392,8 @@ pblx-$(CONFIG_MACH_ELTEC_HIPERCAM) += start_imx6dl_eltec_hipercam
 CFG_start_imx6dl_eltec_hipercam.pblx.imximg = $(board)/eltec-hipercam/flash-header-eltec-hipercam.imxcfg
 FILE_barebox-eltec-hipercam.img = start_imx6dl_eltec_hipercam.pblx.imximg
 image-$(CONFIG_MACH_ELTEC_HIPERCAM) += barebox-eltec-hipercam.img
+
+pblx-$(CONFIG_MACH_VF610_TWR) += start_vf610_twr
+CFG_start_vf610_twr.pblx.imximg = $(board)/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
+FILE_barebox-vf610-twr.img = start_vf610_twr.pblx.imximg
+image-$(CONFIG_MACH_VF610_TWR) += barebox-vf610-twr.img
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:51 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:51 -0700
Subject: [PATCH 14/20] i.MX: i2c-imx: Add Vybrid support
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-15-git-send-email-andrew.smirnov@gmail.com>

Vybrid flavour of the I2C controller requires some additional quirks on
part of the driver. This commit ports those quirks code from analogous
Linux kernel driver.

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/i2c/busses/i2c-imx.c | 215 ++++++++++++++++++++++++++++++++-----------
 1 file changed, 160 insertions(+), 55 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index e407896..dbc76c2 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -43,6 +43,7 @@
 #include <linux/err.h>
 #include <pinctrl.h>
 #include <of_gpio.h>
+#include <of_device.h>
 
 #include <io.h>
 #include <i2c/i2c.h>
@@ -54,14 +55,25 @@
 /* Default value */
 #define FSL_I2C_BIT_RATE	100000	/* 100kHz */
 
-/* FSL I2C registers */
+/* IMX I2C registers:
+ * the I2C register offset is different between SoCs,
+ * to provid support for all these chips, split the
+ * register offset into a fixed base address and a
+ * variable shift value, then the full register offset
+ * will be calculated by
+ * reg_off = ( reg_base_addr << reg_shift)
+ */
 #define FSL_I2C_IADR	0x00	/* i2c slave address */
-#define FSL_I2C_IFDR	0x04	/* i2c frequency divider */
-#define FSL_I2C_I2CR	0x08	/* i2c control */
-#define FSL_I2C_I2SR	0x0C	/* i2c status */
-#define FSL_I2C_I2DR	0x10	/* i2c transfer data */
+#define FSL_I2C_IFDR	0x01	/* i2c frequency divider */
+#define FSL_I2C_I2CR	0x02	/* i2c control */
+#define FSL_I2C_I2SR	0x03	/* i2c status */
+#define FSL_I2C_I2DR	0x04	/* i2c transfer data */
 #define FSL_I2C_DFSRR	0x14	/* i2c digital filter sampling rate */
 
+#define IMX_I2C_REGSHIFT	2
+#define VF610_I2C_REGSHIFT	0
+
+
 /* Bits of FSL I2C registers */
 #define I2SR_RXAK	0x01
 #define I2SR_IIF	0x02
@@ -77,6 +89,22 @@
 #define I2CR_IIEN	0x40
 #define I2CR_IEN	0x80
 
+/* register bits different operating codes definition:
+ * 1) I2SR: Interrupt flags clear operation differ between SoCs:
+ * - write zero to clear(w0c) INT flag on i.MX,
+ * - but write one to clear(w1c) INT flag on Vybrid.
+ * 2) I2CR: I2C module enable operation also differ between SoCs:
+ * - set I2CR_IEN bit enable the module on i.MX,
+ * - but clear I2CR_IEN bit enable the module on Vybrid.
+ */
+#define I2SR_CLR_OPCODE_W0C	0x0
+#define I2SR_CLR_OPCODE_W1C	(I2SR_IAL | I2SR_IIF)
+#define I2CR_IEN_OPCODE_0	0x0
+#define I2CR_IEN_OPCODE_1	I2CR_IEN
+
+#define I2C_PM_TIMEOUT		10 /* ms */
+
+
 /*
  * sorted list of clock divider, register value pairs
  * taken from table 26-5, p.26-9, Freescale i.MX
@@ -85,8 +113,14 @@
  *
  * Duplicated divider values removed from list
  */
+struct fsl_i2c_clk_pair {
+	u16	div;
+	u16	val;
+};
+
 #ifndef CONFIG_PPC
-static u16 i2c_clk_div[50][2] = {
+
+static struct fsl_i2c_clk_pair imx_i2c_clk_div[] = {
 	{ 22,	0x20 }, { 24,	0x21 }, { 26,	0x22 }, { 28,	0x23 },
 	{ 30,	0x00 },	{ 32,	0x24 }, { 36,	0x25 }, { 40,	0x26 },
 	{ 42,	0x03 }, { 44,	0x27 },	{ 48,	0x28 }, { 52,	0x05 },
@@ -101,8 +135,36 @@ static u16 i2c_clk_div[50][2] = {
 	{ 1920,	0x1B },	{ 2048,	0x3F }, { 2304,	0x1C }, { 2560,	0x1D },
 	{ 3072,	0x1E }, { 3840,	0x1F }
 };
+
+/* Vybrid VF610 clock divider, register value pairs */
+static struct fsl_i2c_clk_pair vf610_i2c_clk_div[] = {
+	{ 20,   0x00 }, { 22,   0x01 }, { 24,   0x02 }, { 26,   0x03 },
+	{ 28,   0x04 }, { 30,   0x05 }, { 32,   0x09 }, { 34,   0x06 },
+	{ 36,   0x0A }, { 40,   0x07 }, { 44,   0x0C }, { 48,   0x0D },
+	{ 52,   0x43 }, { 56,   0x0E }, { 60,   0x45 }, { 64,   0x12 },
+	{ 68,   0x0F }, { 72,   0x13 }, { 80,   0x14 }, { 88,   0x15 },
+	{ 96,   0x19 }, { 104,  0x16 }, { 112,  0x1A }, { 128,  0x17 },
+	{ 136,  0x4F }, { 144,  0x1C }, { 160,  0x1D }, { 176,  0x55 },
+	{ 192,  0x1E }, { 208,  0x56 }, { 224,  0x22 }, { 228,  0x24 },
+	{ 240,  0x1F }, { 256,  0x23 }, { 288,  0x5C }, { 320,  0x25 },
+	{ 384,  0x26 }, { 448,  0x2A }, { 480,  0x27 }, { 512,  0x2B },
+	{ 576,  0x2C }, { 640,  0x2D }, { 768,  0x31 }, { 896,  0x32 },
+	{ 960,  0x2F }, { 1024, 0x33 }, { 1152, 0x34 }, { 1280, 0x35 },
+	{ 1536, 0x36 }, { 1792, 0x3A }, { 1920, 0x37 }, { 2048, 0x3B },
+	{ 2304, 0x3C }, { 2560, 0x3D }, { 3072, 0x3E }, { 3584, 0x7A },
+	{ 3840, 0x3F }, { 4096, 0x7B }, { 5120, 0x7D }, { 6144, 0x7E },
+};
+
 #endif
 
+struct fsl_i2c_hwdata {
+	unsigned		regshift;
+	struct fsl_i2c_clk_pair	*clk_div;
+	unsigned		ndivs;
+	unsigned		i2sr_clr_opcode;
+	unsigned		i2cr_ien_opcode;
+};
+
 struct fsl_i2c_struct {
 	void __iomem		*base;
 	struct clk		*clk;
@@ -112,6 +174,7 @@ struct fsl_i2c_struct {
 	unsigned int		ifdr;	/* FSL_I2C_IFDR */
 	unsigned int		dfsrr;  /* FSL_I2C_DFSRR */
 	struct i2c_bus_recovery_info rinfo;
+	const struct fsl_i2c_hwdata *hwdata;
 };
 #define to_fsl_i2c_struct(a)	container_of(a, struct fsl_i2c_struct, adapter)
 
@@ -144,16 +207,28 @@ static inline void i2c_fsl_dump_reg(struct i2c_adapter *adapter)
 }
 #endif
 
+static inline void fsl_i2c_write_reg(unsigned int val,
+				     struct fsl_i2c_struct *i2c_fsl,
+				     unsigned int reg)
+{
+	writeb(val, i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
+}
+
+static inline unsigned char fsl_i2c_read_reg(struct fsl_i2c_struct *i2c_fsl,
+					     unsigned int reg)
+{
+	return readb(i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
+}
+
 static int i2c_fsl_bus_busy(struct i2c_adapter *adapter, int for_busy)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
 	uint64_t start;
 	unsigned int temp;
 
 	start = get_time_ns();
 	while (1) {
-		temp = readb(base + FSL_I2C_I2SR);
+		temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2SR);
 		if (for_busy && (temp & I2SR_IBB))
 			break;
 		if (!for_busy && !(temp & I2SR_IBB))
@@ -172,12 +247,11 @@ static int i2c_fsl_bus_busy(struct i2c_adapter *adapter, int for_busy)
 static int i2c_fsl_trx_complete(struct i2c_adapter *adapter)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
 	uint64_t start;
 
 	start = get_time_ns();
 	while (1) {
-		unsigned int reg = readb(base + FSL_I2C_I2SR);
+		unsigned int reg = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2SR);
 		if (reg & I2SR_IIF)
 			break;
 
@@ -186,7 +260,9 @@ static int i2c_fsl_trx_complete(struct i2c_adapter *adapter)
 			return -EIO;
 		}
 	}
-	writeb(0, base + FSL_I2C_I2SR);
+
+	fsl_i2c_write_reg(i2c_fsl->hwdata->i2sr_clr_opcode,
+			  i2c_fsl, FSL_I2C_I2SR);
 
 	return 0;
 }
@@ -194,12 +270,11 @@ static int i2c_fsl_trx_complete(struct i2c_adapter *adapter)
 static int i2c_fsl_acked(struct i2c_adapter *adapter)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
 	uint64_t start;
 
 	start = get_time_ns();
 	while (1) {
-		unsigned int reg = readb(base + FSL_I2C_I2SR);
+		unsigned int reg = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2SR);
 		if (!(reg & I2SR_RXAK))
 			break;
 
@@ -215,25 +290,28 @@ static int i2c_fsl_acked(struct i2c_adapter *adapter)
 static int i2c_fsl_start(struct i2c_adapter *adapter)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
 	unsigned int temp = 0;
 	int result;
 
-	writeb(i2c_fsl->ifdr, base + FSL_I2C_IFDR);
+	fsl_i2c_write_reg(i2c_fsl->ifdr, i2c_fsl, FSL_I2C_IFDR);
+#ifdef CONFIG_PPC
 	if (i2c_fsl->dfsrr != -1)
 		writeb(i2c_fsl->dfsrr, base + FSL_I2C_DFSRR);
+#endif
 
 	/* Enable I2C controller */
-	writeb(0, base + FSL_I2C_I2SR);
-	writeb(I2CR_IEN, base + FSL_I2C_I2CR);
+	fsl_i2c_write_reg(i2c_fsl->hwdata->i2sr_clr_opcode,
+			  i2c_fsl, FSL_I2C_I2SR);
+	fsl_i2c_write_reg(i2c_fsl->hwdata->i2cr_ien_opcode,
+			  i2c_fsl, FSL_I2C_I2CR);
 
 	/* Wait controller to be stable */
 	udelay(100);
 
 	/* Start I2C transaction */
-	temp = readb(base + FSL_I2C_I2CR);
+	temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
 	temp |= I2CR_MSTA;
-	writeb(temp, base + FSL_I2C_I2CR);
+	fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 
 	result = i2c_fsl_bus_busy(adapter, 1);
 	if (result) {
@@ -246,7 +324,7 @@ static int i2c_fsl_start(struct i2c_adapter *adapter)
 	i2c_fsl->stopped = 0;
 
 	temp |= I2CR_MTX | I2CR_TXAK;
-	writeb(temp, base + FSL_I2C_I2CR);
+	fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 
 	return result;
 }
@@ -254,14 +332,13 @@ static int i2c_fsl_start(struct i2c_adapter *adapter)
 static void i2c_fsl_stop(struct i2c_adapter *adapter)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
 	unsigned int temp = 0;
 
 	if (!i2c_fsl->stopped) {
 		/* Stop I2C transaction */
-		temp = readb(base + FSL_I2C_I2CR);
+		temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
 		temp &= ~(I2CR_MSTA | I2CR_MTX);
-		writeb(temp, base + FSL_I2C_I2CR);
+		fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 		/* wait for the stop condition to be send, otherwise the i2c
 		 * controller is disabled before the STOP is sent completely */
 		i2c_fsl->stopped = i2c_fsl_bus_busy(adapter, 0) ? 0 : 1;
@@ -273,7 +350,8 @@ static void i2c_fsl_stop(struct i2c_adapter *adapter)
 	}
 
 	/* Disable I2C controller, and force our state to stopped */
-	writeb(0, base + FSL_I2C_I2CR);
+	temp = i2c_fsl->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
+	fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 }
 
 #ifdef CONFIG_PPC
@@ -349,6 +427,7 @@ static void i2c_fsl_set_clk(struct fsl_i2c_struct *i2c_fsl,
 static void i2c_fsl_set_clk(struct fsl_i2c_struct *i2c_fsl,
 			    unsigned int rate)
 {
+	struct fsl_i2c_clk_pair *i2c_clk_div = i2c_fsl->hwdata->clk_div;
 	unsigned int i2c_clk_rate;
 	unsigned int div;
 	int i;
@@ -356,16 +435,16 @@ static void i2c_fsl_set_clk(struct fsl_i2c_struct *i2c_fsl,
 	/* Divider value calculation */
 	i2c_clk_rate = clk_get_rate(i2c_fsl->clk);
 	div = (i2c_clk_rate + rate - 1) / rate;
-	if (div < i2c_clk_div[0][0])
+	if (div < i2c_clk_div[0].div)
 		i = 0;
-	else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0])
-		i = ARRAY_SIZE(i2c_clk_div) - 1;
+	else if (div > i2c_clk_div[i2c_fsl->hwdata->ndivs - 1].div)
+		i = i2c_clk_div[i2c_fsl->hwdata->ndivs - 1].div - 1;
 	else
-		for (i = 0; i2c_clk_div[i][0] < div; i++)
+		for (i = 0; i2c_clk_div[i].div < div; i++)
 			;
 
 	/* Store divider value */
-	i2c_fsl->ifdr = i2c_clk_div[i][1];
+	i2c_fsl->ifdr = i2c_clk_div[i].val;
 
 	/*
 	 * There dummy delay is calculated.
@@ -374,20 +453,19 @@ static void i2c_fsl_set_clk(struct fsl_i2c_struct *i2c_fsl,
 	 * to fix chip hardware bug.
 	 */
 	i2c_fsl->disable_delay =
-		(500000U * i2c_clk_div[i][0] + (i2c_clk_rate / 2) - 1) /
+		(500000U * i2c_clk_div[i].div + (i2c_clk_rate / 2) - 1) /
 		(i2c_clk_rate / 2);
 
 	dev_dbg(&i2c_fsl->adapter.dev, "<%s> I2C_CLK=%d, REQ DIV=%d\n",
 		__func__, i2c_clk_rate, div);
 	dev_dbg(&i2c_fsl->adapter.dev, "<%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
-		__func__, i2c_clk_div[i][1], i2c_clk_div[i][0]);
+		__func__, i2c_clk_div[i].val, i2c_clk_div[i].div);
 }
 #endif
 
 static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
 	int i, result;
 
 	if ( !(msgs->flags & I2C_M_DATA_ONLY) ) {
@@ -396,7 +474,8 @@ static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 			__func__, msgs->addr << 1);
 
 		/* write slave address */
-		writeb(msgs->addr << 1, base + FSL_I2C_I2DR);
+		fsl_i2c_write_reg(msgs->addr << 1, i2c_fsl,
+				  FSL_I2C_I2DR);
 
 		result = i2c_fsl_trx_complete(adapter);
 		if (result)
@@ -411,7 +490,8 @@ static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 		dev_dbg(&adapter->dev,
 			"<%s> write byte: B%d=0x%02X\n",
 			__func__, i, msgs->buf[i]);
-		writeb(msgs->buf[i], base + FSL_I2C_I2DR);
+		fsl_i2c_write_reg(msgs->buf[i], i2c_fsl,
+				  FSL_I2C_I2DR);
 
 		result = i2c_fsl_trx_complete(adapter);
 		if (result)
@@ -426,12 +506,12 @@ static int i2c_fsl_write(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 static int i2c_fsl_read(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
 	int i, result;
 	unsigned int temp;
 
 	/* clear IIF */
-	writeb(0x0, base + FSL_I2C_I2SR);
+	fsl_i2c_write_reg(i2c_fsl->hwdata->i2sr_clr_opcode,
+			  i2c_fsl, FSL_I2C_I2SR);
 
 	if ( !(msgs->flags & I2C_M_DATA_ONLY) ) {
 		dev_dbg(&adapter->dev,
@@ -439,7 +519,8 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 			__func__, (msgs->addr << 1) | 0x01);
 
 		/* write slave address */
-		writeb((msgs->addr << 1) | 0x01, base + FSL_I2C_I2DR);
+		fsl_i2c_write_reg((msgs->addr << 1) | 0x01, i2c_fsl,
+				  FSL_I2C_I2DR);
 
 		result = i2c_fsl_trx_complete(adapter);
 		if (result)
@@ -450,13 +531,13 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 	}
 
 	/* setup bus to read data */
-	temp = readb(base + FSL_I2C_I2CR);
+	temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
 	temp &= ~I2CR_MTX;
 	if (msgs->len - 1)
 		temp &= ~I2CR_TXAK;
-	writeb(temp, base + FSL_I2C_I2CR);
+	fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 
-	readb(base + FSL_I2C_I2DR);	/* dummy read */
+	fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2DR); /* dummy read */
 
 	/* read data */
 	for (i = 0; i < msgs->len; i++) {
@@ -469,9 +550,9 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 			 * It must generate STOP before read I2DR to prevent
 			 * controller from generating another clock cycle
 			 */
-			temp = readb(base + FSL_I2C_I2CR);
+			temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
 			temp &= ~(I2CR_MSTA | I2CR_MTX);
-			writeb(temp, base + FSL_I2C_I2CR);
+			fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 
 			/*
 			 * adding this delay helps on low bitrates
@@ -481,11 +562,11 @@ static int i2c_fsl_read(struct i2c_adapter *adapter, struct i2c_msg *msgs)
 			i2c_fsl_bus_busy(adapter, 0);
 			i2c_fsl->stopped = 1;
 		} else if (i == (msgs->len - 2)) {
-			temp = readb(base + FSL_I2C_I2CR);
+			temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
 			temp |= I2CR_TXAK;
-			writeb(temp, base + FSL_I2C_I2CR);
+			fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 		}
-		msgs->buf[i] = readb(base + FSL_I2C_I2DR);
+		msgs->buf[i] = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2DR);
 
 		dev_dbg(&adapter->dev, "<%s> read byte: B%d=0x%02X\n",
 			__func__, i, msgs->buf[i]);
@@ -497,7 +578,7 @@ static int i2c_fsl_xfer(struct i2c_adapter *adapter,
 			struct i2c_msg *msgs, int num)
 {
 	struct fsl_i2c_struct *i2c_fsl = to_fsl_i2c_struct(adapter);
-	void __iomem *base = i2c_fsl->base;
+
 	unsigned int i, temp;
 	int result;
 
@@ -514,9 +595,9 @@ static int i2c_fsl_xfer(struct i2c_adapter *adapter,
 	/* read/write data */
 	for (i = 0; i < num; i++) {
 		if (i && !(msgs[i].flags & I2C_M_DATA_ONLY)) {
-			temp = readb(base + FSL_I2C_I2CR);
+			temp = fsl_i2c_read_reg(i2c_fsl, FSL_I2C_I2CR);
 			temp |= I2CR_RSTA;
-			writeb(temp, base + FSL_I2C_I2CR);
+			fsl_i2c_write_reg(temp, i2c_fsl, FSL_I2C_I2CR);
 
 			result = i2c_fsl_bus_busy(adapter, 1);
 			if (result)
@@ -600,6 +681,13 @@ static int __init i2c_fsl_probe(struct device_d *pdev)
 		goto fail;
 	}
 #endif
+
+	i2c_fsl->hwdata = of_device_get_match_data(pdev);
+	if (!i2c_fsl->hwdata) {
+		ret = -EINVAL;
+		goto fail;
+	}
+
 	/* Setup i2c_fsl driver structure */
 	i2c_fsl->adapter.master_xfer = i2c_fsl_xfer;
 	i2c_fsl->adapter.nr = pdev->id;
@@ -623,8 +711,9 @@ static int __init i2c_fsl_probe(struct device_d *pdev)
 		i2c_fsl_set_clk(i2c_fsl, FSL_I2C_BIT_RATE);
 
 	/* Set up chip registers to defaults */
-	writeb(0, i2c_fsl->base + FSL_I2C_I2CR);
-	writeb(0, i2c_fsl->base + FSL_I2C_I2SR);
+	fsl_i2c_write_reg(i2c_fsl->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
+			  i2c_fsl, FSL_I2C_I2CR);
+	fsl_i2c_write_reg(i2c_fsl->hwdata->i2sr_clr_opcode, i2c_fsl, FSL_I2C_I2SR);
 
 	/* Add I2C adapter */
 	ret = i2c_add_numbered_adapter(&i2c_fsl->adapter);
@@ -640,12 +729,28 @@ fail:
 	return ret;
 }
 
+static const struct fsl_i2c_hwdata imx21_i2c_hwdata = {
+	.regshift		= IMX_I2C_REGSHIFT,
+	.clk_div		= imx_i2c_clk_div,
+	.ndivs			= ARRAY_SIZE(imx_i2c_clk_div),
+	.i2sr_clr_opcode	= I2SR_CLR_OPCODE_W0C,
+	.i2cr_ien_opcode	= I2CR_IEN_OPCODE_1,
+
+};
+
+static const struct fsl_i2c_hwdata vf610_i2c_hwdata = {
+	.regshift		= VF610_I2C_REGSHIFT,
+	.clk_div		= vf610_i2c_clk_div,
+	.ndivs			= ARRAY_SIZE(vf610_i2c_clk_div),
+	.i2sr_clr_opcode	= I2SR_CLR_OPCODE_W1C,
+	.i2cr_ien_opcode	= I2CR_IEN_OPCODE_0,
+
+};
+
 static __maybe_unused struct of_device_id imx_i2c_dt_ids[] = {
-	{
-		.compatible = "fsl,imx21-i2c",
-	}, {
-		/* sentinel */
-	}
+	{ .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, },
+	{ .compatible = "fsl,vf610-i2c", .data = &vf610_i2c_hwdata, },
+	{ /* sentinel */ }
 };
 
 static struct driver_d i2c_fsl_driver = {
-- 
2.5.5



From andrew.smirnov at gmail.com  Mon Oct  3 07:40:48 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Mon,  3 Oct 2016 07:40:48 -0700
Subject: [PATCH 11/20] i.MX: Add VF610 clock tree initialization code
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <1475505657-898-12-git-send-email-andrew.smirnov@gmail.com>

Based on analogous code from Linux kernel

Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 drivers/clk/imx/Makefile    |    1 +
 drivers/clk/imx/clk-vf610.c | 1224 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 1225 insertions(+)
 create mode 100644 drivers/clk/imx/clk-vf610.c

diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 0303c0b..2665f49 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -1 +1,2 @@
 obj-y += clk.o
+obj-$(CONFIG_ARCH_VF610) += clk-vf610.o
diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
new file mode 100644
index 0000000..2fbdbb3
--- /dev/null
+++ b/drivers/clk/imx/clk-vf610.c
@@ -0,0 +1,1224 @@
+/*
+ * Copyright (c) 2016 Zodiac Inflight Innovations
+ * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
+ *
+ * Based on analogous code from Linux kernel
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <linux/clk.h>
+#include <io.h>
+#include <of.h>
+#include <of_address.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <mfd/syscon.h>
+#include <dt-bindings/clock/vf610-clock.h>
+
+#include "../../../arch/arm/mach-imx/clk.h"
+
+enum {
+	CCM_CCR		= 0x00,
+	CCM_CSR		= 0x04,
+	CCM_CCSR	= 0x08,
+	CCM_CACRR	= 0x0c,
+	CCM_CSCMR1	= 0x10,
+	CCM_CSCDR1	= 0x14,
+	CCM_CSCDR2	= 0x18,
+	CCM_CSCDR3	= 0x1c,
+	CCM_CSCMR2	= 0x20,
+	CCM_CSCDR4	= 0x24,
+	CCM_CLPCR	= 0x2c,
+	CCM_CISR	= 0x30,
+	CCM_CIMR	= 0x34,
+	CCM_CGPR	= 0x3c,
+	CCM_CCGR0	= 0x40,
+	CCM_CCGR1	= 0x44,
+	CCM_CCGR2	= 0x48,
+	CCM_CCGR3	= 0x4c,
+	CCM_CCGR4	= 0x50,
+	CCM_CCGR5	= 0x54,
+	CCM_CCGR6	= 0x58,
+	CCM_CCGR7	= 0x5c,
+	CCM_CCGR8	= 0x60,
+	CCM_CCGR9	= 0x64,
+	CCM_CCGR10	= 0x68,
+	CCM_CCGR11	= 0x6c,
+
+	CCM_CMEOR0	= 0x70,
+	CCM_CMEOR1	= 0x74,
+	CCM_CMEOR2	= 0x78,
+	CCM_CMEOR3	= 0x7c,
+	CCM_CMEOR4	= 0x80,
+	CCM_CMEOR5	= 0x84,
+	CCM_CPPDSR	= 0x88,
+	CCM_CCOWR	= 0x8c,
+	CCM_CCPGR0	= 0x90,
+	CCM_CCPGR1	= 0x94,
+	CCM_CCPGR2	= 0x98,
+	CCM_CCPGR3	= 0x9c,
+};
+
+/* CCM_CCGRx(x)		(CCM_CCGR0 + (x) * 4) */
+
+static int vf610_ccm_ccgrx_cgn(int n) {
+	return n * 2;
+}
+
+
+enum {
+	PFD_PLL1_BASE	= 0x2b0,
+	PFD_PLL2_BASE	= 0x100,
+	PFD_PLL3_BASE	= 0x0f0,
+	ANA_MISC1	= 0x160,
+};
+
+static const unsigned int PLL_CTRL[7] = {
+	0x270,
+	0x030,
+	0x010,
+	0x070,
+	0x0e0,
+	0x0a0,
+	0x020,
+};
+
+
+static struct clk *clk[VF610_CLK_END];
+struct clk_onecell_data clk_data;
+
+static struct clk * __init vf610_get_fixed_clock(struct device_node *np,
+						 const char *name)
+{
+	struct clk *clk = of_clk_get_by_name(np, name);
+
+	/* Backward compatibility if device tree is missing clks assignments */
+	if (IS_ERR(clk))
+		clk = imx_obtain_fixed_clock(name, 0);
+
+	return clk;
+};
+
+static void vf610_ccm_setup_fixed(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+{
+	clk[VF610_CLK_DUMMY]	 = clk_fixed("dummy", 0);
+	clk[VF610_CLK_SIRC_128K] = clk_fixed("sirc_128k", 128000);
+	clk[VF610_CLK_SIRC_32K]  = clk_fixed("sirc_32k", 32000);
+	clk[VF610_CLK_FIRC]	 = clk_fixed("firc", 24000000);
+}
+
+static void vf610_ccm_setup_from_dt(struct device_node *np,
+				    void __iomem *anatop,
+				    void __iomem *ccm)
+{
+	clk[VF610_CLK_SXOSC]     = vf610_get_fixed_clock(np, "sxosc");
+	clk[VF610_CLK_FXOSC]     = vf610_get_fixed_clock(np, "fxosc");
+	clk[VF610_CLK_AUDIO_EXT] = vf610_get_fixed_clock(np, "audio_ext");
+	clk[VF610_CLK_ENET_EXT]  = vf610_get_fixed_clock(np, "enet_ext");
+
+	/* Clock source from external clock via LVDs PAD */
+	clk[VF610_CLK_ANACLK1] = vf610_get_fixed_clock(np, "anaclk1");
+
+	clk[VF610_CLK_FXOSC_HALF] = imx_clk_fixed_factor("fxosc_half",
+							 "fxosc", 1, 2);
+}
+
+static void vf610_ccm_setup_slow_clk(struct device_node *np,
+				     void __iomem *anatop,
+				     void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"sirc_32k",
+		"sxosc",
+	};
+
+	clk[VF610_CLK_SLOW_CLK_SEL] = imx_clk_mux("slow_clk_sel",
+						  ccm + CCM_CCSR,
+						  4, 1,
+						  sources,
+						  ARRAY_SIZE(sources));
+}
+
+static void vf610_ccm_setup_fast_clk(struct device_node *np,
+				     void __iomem *anatop,
+				     void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"firc",
+		"fxosc",
+	};
+
+	clk[VF610_CLK_FASK_CLK_SEL] = imx_clk_mux("fast_clk_sel",
+						  ccm + CCM_CCSR,
+						  5, 1,
+						  sources,
+						  ARRAY_SIZE(sources));
+}
+
+static void vf610_ccm_setup_pll_bypass_srcs(struct device_node *np,
+					    void __iomem *anatop,
+					    void __iomem *ccm)
+{
+	size_t i;
+
+	static const char *parents[] = {
+		"fast_clk_sel",
+		"lvds1_in",
+	};
+
+#define VF610_CLK_PLL_BYPASS_SRC(n)			\
+	{ VF610_CLK_PLL##n##_BYPASS_SRC, "pll" #n "_bypass_src" }
+
+	static const struct {
+		int id;
+		const char *name;
+	} clocks[] = {
+		VF610_CLK_PLL_BYPASS_SRC(1),
+		VF610_CLK_PLL_BYPASS_SRC(2),
+		VF610_CLK_PLL_BYPASS_SRC(3),
+		VF610_CLK_PLL_BYPASS_SRC(4),
+		VF610_CLK_PLL_BYPASS_SRC(5),
+		VF610_CLK_PLL_BYPASS_SRC(6),
+		VF610_CLK_PLL_BYPASS_SRC(7),
+	};
+
+#undef VF610_CLK_PLL_BYPASS_SRC
+
+	for (i = 0; i < ARRAY_SIZE(clocks); i++) {
+		const char *name = clocks[i].name;
+		const int id = clocks[i].id;
+
+		clk[id] = imx_clk_mux(name, anatop + PLL_CTRL[i],
+				      14, 1,
+				      parents, ARRAY_SIZE(parents));
+	}
+}
+
+static void vf610_ccm_setup_plls(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	size_t i;
+
+#define VF610_CLK_PLL(n, type, mask)				   \
+	{ VF610_CLK_PLL##n, type, "pll" #n, "pll" #n "_bypass_src", mask }
+
+	static const struct {
+		int id;
+		int type;
+		const char *name;
+		const char *parent;
+		u32 mask;
+	} clocks[] = {
+		VF610_CLK_PLL(1, IMX_PLLV3_GENERIC,   0x01),
+		VF610_CLK_PLL(2, IMX_PLLV3_GENERIC,   0x01),
+		VF610_CLK_PLL(3, IMX_PLLV3_USB_VF610, 0x02),
+		VF610_CLK_PLL(4, IMX_PLLV3_AV,        0x7f),
+		VF610_CLK_PLL(5, IMX_PLLV3_ENET,      0x03),
+		VF610_CLK_PLL(6, IMX_PLLV3_AV,        0x7f),
+		VF610_CLK_PLL(7, IMX_PLLV3_USB_VF610, 0x02),
+	};
+
+#undef VF610_CLK_PLL
+
+	for (i = 0; i < ARRAY_SIZE(clocks); i++) {
+		const char *name = clocks[i].name;
+		const int id = clocks[i].id;
+
+		clk[id] = imx_clk_pllv3(clocks[i].type,
+					name,
+					clocks[i].parent,
+					anatop + PLL_CTRL[i],
+					clocks[i].mask);
+	}
+}
+
+static void vf610_ccm_setup_pll_bypass(struct device_node *np,
+				       void __iomem *anatop,
+				       void __iomem *ccm)
+{
+	size_t i;
+	static const char *pll_bypass_parents[][2] = {
+		{ "pll1", "pll1_bypass_src" },
+		{ "pll2", "pll2_bypass_src" },
+		{ "pll3", "pll3_bypass_src" },
+		{ "pll4", "pll4_bypass_src" },
+		{ "pll5", "pll5_bypass_src" },
+		{ "pll6", "pll6_bypass_src" },
+		{ "pll7", "pll7_bypass_src" },
+	};
+
+#define VF610_PLL_BYPASS(n)				\
+	{ VF610_PLL##n##_BYPASS, "pll" #n "_bypass" }
+
+	static const struct {
+		int id;
+		const char *name;
+	} clocks[] = {
+		VF610_PLL_BYPASS(1),
+		VF610_PLL_BYPASS(2),
+		VF610_PLL_BYPASS(3),
+		VF610_PLL_BYPASS(4),
+		VF610_PLL_BYPASS(5),
+		VF610_PLL_BYPASS(6),
+		VF610_PLL_BYPASS(7),
+	};
+
+#undef VF610_PLL_BYPASS
+
+	for (i = 0; i < ARRAY_SIZE(clocks); i++) {
+		const char *name = clocks[i].name;
+		const int id = clocks[i].id;
+
+		clk[id] = imx_clk_mux_p(name,
+					anatop + PLL_CTRL[i],
+					16, 1,
+					pll_bypass_parents[i],
+					ARRAY_SIZE(pll_bypass_parents[i]));
+	}
+}
+
+static void vf610_ccm_setup_group1(struct device_node *np,
+				   void __iomem *anatop,
+				   void __iomem *ccm)
+{
+	size_t i;
+
+	static const struct {
+		int id;
+		const char *name;
+		const char *parent;
+		unsigned int reg;
+	} clocks[] = {
+		{ VF610_CLK_PLL1_SYS,      "pll1_sys",      "pll1_bypass" },
+		{ VF610_CLK_PLL2_BUS,      "pll2_bus",      "pll2_bypass" },
+		{ VF610_CLK_PLL3_USB_OTG,  "pll3_usb_otg",  "pll3_bypass" },
+		{ VF610_CLK_PLL4_AUDIO,    "pll4_audio",    "pll4_bypass" },
+		{ VF610_CLK_PLL5_ENET,     "pll5_enet",     "pll5_bypass" },
+		{ VF610_CLK_PLL6_VIDEO,    "pll6_video",    "pll6_bypass" },
+		{ VF610_CLK_PLL7_USB_HOST, "pll7_usb_host", "pll7_bypass" },
+	};
+
+	for (i = 0; i < ARRAY_SIZE(clocks); i++) {
+		const char *name = clocks[i].name;
+		const int id = clocks[i].id;
+
+		clk[id] = imx_clk_gate(name, clocks[i].parent,
+				       anatop + PLL_CTRL[i], 13);
+	}
+}
+
+static void vf610_ccm_setup_pfds(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	size_t i;
+
+#define VF610_CLK_PLL_PFD(n, m)						\
+	{ VF610_CLK_PLL##n##_PFD##m, "pll" #n "_pfd" #m,		\
+	  "pll" #n "_sys", PFD_PLL##n##_BASE, m - 1 }
+
+	const static struct {
+		int id;
+		const char *name;
+		const char *parent;
+		unsigned int reg;
+		u8 idx;
+	} clocks[] = {
+		VF610_CLK_PLL_PFD(1, 1),
+		VF610_CLK_PLL_PFD(1, 2),
+		VF610_CLK_PLL_PFD(1, 3),
+		VF610_CLK_PLL_PFD(1, 4),
+
+		VF610_CLK_PLL_PFD(2, 1),
+		VF610_CLK_PLL_PFD(2, 2),
+		VF610_CLK_PLL_PFD(2, 3),
+		VF610_CLK_PLL_PFD(2, 4),
+
+		VF610_CLK_PLL_PFD(3, 1),
+		VF610_CLK_PLL_PFD(3, 2),
+		VF610_CLK_PLL_PFD(3, 3),
+		VF610_CLK_PLL_PFD(3, 4),
+	};
+
+#undef VF610_CLK_PLL_PFD
+
+	for (i = 0; i < ARRAY_SIZE(clocks); i++) {
+		const char *name = clocks[i].name;
+		const int id = clocks[i].id;
+
+		clk[id] = imx_clk_pfd(name,
+				      clocks[i].parent,
+				      anatop + clocks[i].reg,
+				      clocks[i].idx);
+	}
+}
+
+static void vf610_ccm_setup_pll1_pfd_out(struct device_node *np,
+					 void __iomem *anatop,
+					 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll1_sys",
+		"pll1_pfd1",
+		"pll1_pfd2",
+		"pll1_pfd3",
+		"pll1_pfd4",
+	};
+
+	clk[VF610_CLK_PLL1_PFD_SEL] = imx_clk_mux("pll1_pfd_sel",
+						  ccm + CCM_CCSR,
+						  16, 3,
+						  sources, ARRAY_SIZE(sources));
+}
+
+static void vf610_ccm_setup_pll2_pfd_out(struct device_node *np,
+					 void __iomem *anatop,
+					 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll2_bus",
+		"pll2_pfd1",
+		"pll2_pfd2",
+		"pll2_pfd3",
+		"pll2_pfd4",
+	};
+
+	clk[VF610_CLK_PLL2_PFD_SEL] = imx_clk_mux("pll2_pfd_sel",
+						  ccm + CCM_CCSR,
+						  19, 3,
+						  sources, ARRAY_SIZE(sources));
+}
+
+static void vf610_ccm_setup_sys_out(struct device_node *np,
+				   void __iomem *anatop,
+				   void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"fast_clk_sel",
+		"slow_clk_sel",
+		"pll2_pfd_sel",
+		"pll2_bus",
+		"pll1_pfd_sel",
+		"pll3_usb_otg",
+	};
+
+	clk[VF610_CLK_SYS_SEL] = imx_clk_mux("sys_sel",
+					     ccm + CCM_CCSR,
+					     0, 3,
+					     sources, ARRAY_SIZE(sources));
+}
+
+static void vf610_ccm_setup_ddr_out(struct device_node *np,
+				    void __iomem *anatop,
+				    void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll2_pfd2",
+		"sys_sel",
+	};
+
+	clk[VF610_CLK_DDR_SEL] = imx_clk_mux("ddr_sel",
+					     ccm + CCM_CCSR,
+					     6, 1,
+					     sources, ARRAY_SIZE(sources));
+}
+
+static void vf610_ccm_setup_dividers(struct device_node *np,
+				     void __iomem *anatop,
+				     void __iomem *ccm)
+{
+	size_t i;
+
+	static const struct {
+		int id;
+		const char *name;
+		const char *parent;
+		u8 shift;
+		u8 width;
+	} clocks[] = {
+		{
+			.id	= VF610_CLK_SYS_BUS,
+			.name	= "sys_bus",
+			.parent = "sys_sel",
+			.shift	= 0,
+			.width	= 3,
+		},
+		{
+			.id	= VF610_CLK_PLATFORM_BUS,
+			.name	= "platform_bus",
+			.parent = "sys_bus",
+			.shift	= 3,
+			.width	= 3,
+		},
+		{
+			.id	= VF610_CLK_IPG_BUS,
+			.name	= "ipg_bus",
+			.parent = "platform_bus",
+			.shift	= 11,
+			.width	= 2,
+		},
+		{
+			.id	= VF610_CLK_PLL3_MAIN_DIV,
+			.name	= "pll3_usb_otg_div",
+			.parent = "pll3_usb_otg",
+			.shift	= 20,
+			.width	= 1,
+		},
+		{
+			.id	= VF610_CLK_PLL6_MAIN_DIV,
+			.name	= "pll6_video_div",
+			.parent = "pll6_video",
+			.shift	= 21,
+			.width	= 1,
+		},
+	};
+
+	for (i = 0; i < ARRAY_SIZE(clocks); i++)
+		clk[clocks[i].id] = imx_clk_divider(clocks[i].name,
+						    clocks[i].parent,
+						    ccm + CCM_CACRR,
+						    clocks[i].shift,
+						    clocks[i].width);
+}
+
+static void vf610_ccm_setup_pll4_main_div(struct device_node *np,
+					  void __iomem *anatop,
+					  void __iomem *ccm)
+{
+	static const struct clk_div_table div_table[] = {
+		{ .val = 0, .div = 1  },
+		{ .val = 1, .div = 2  },
+		{ .val = 2, .div = 6  },
+		{ .val = 3, .div = 8  },
+		{ .val = 4, .div = 10 },
+		{ .val = 5, .div = 12 },
+		{ .val = 6, .div = 14 },
+		{ .val = 7, .div = 16 },
+		{ }
+	};
+
+	clk[VF610_CLK_PLL4_MAIN_DIV] = clk_divider_table("pll4_audio_div",
+							 "pll4_audio",
+							 ccm +  CCM_CACRR, 6, 3,
+							 div_table, 0);
+}
+
+static void vf610_ccm_setup_ddrmc(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+{
+	clk[VF610_CLK_DDRMC] = imx_clk_gate2_cgr("ddrmc",
+						 "ddr_sel",
+						 ccm + CCM_CCGR6,
+						 vf610_ccm_ccgrx_cgn(14),
+						 0x2);
+}
+
+static void vf610_ccm_setup_wkpu(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	clk[VF610_CLK_WKPU] = imx_clk_gate2_cgr("wkpu",
+						"ipg_bus",
+						ccm + CCM_CCGR4,
+						vf610_ccm_ccgrx_cgn(10),
+						0x2);
+}
+
+static void vf610_ccm_setup_usbphys(struct device_node *np,
+				    void __iomem *anatop,
+				    void __iomem *ccm)
+{
+	clk[VF610_CLK_USBPHY0] = imx_clk_gate("usbphy0", "pll3_usb_otg",
+					      anatop + PLL_CTRL[2], 6);
+	clk[VF610_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll7_usb_host",
+					      anatop + PLL_CTRL[6], 6);
+}
+
+static void vf610_ccm_setup_usbcs(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+
+{
+
+	clk[VF610_CLK_USBC0] = imx_clk_gate2("usbc0", "ipg_bus",
+					     ccm + CCM_CCGR1,
+					     vf610_ccm_ccgrx_cgn(4));
+	clk[VF610_CLK_USBC1] = imx_clk_gate2("usbc1", "ipg_bus",
+					     ccm + CCM_CCGR7,
+					     vf610_ccm_ccgrx_cgn(4));
+
+}
+
+static void vf610_ccm_setup_qspis(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll3_usb_otg",
+		"pll3_pfd4",
+		"pll2_pfd4",
+		"pll1_pfd4",
+	};
+
+	clk[VF610_CLK_QSPI0_SEL] = imx_clk_mux("qspi0_sel",
+					       ccm + CCM_CSCMR1,
+					       22, 2,
+					       sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_QSPI0_EN] = imx_clk_gate("qspi0_en", "qspi0_sel",
+					       ccm + CCM_CSCDR3, 4);
+	clk[VF610_CLK_QSPI0_X4_DIV] = imx_clk_divider("qspi0_x4", "qspi0_en",
+						      ccm + CCM_CSCDR3, 0, 2);
+	clk[VF610_CLK_QSPI0_X2_DIV] = imx_clk_divider("qspi0_x2", "qspi0_x4",
+						      ccm + CCM_CSCDR3, 2, 1);
+	clk[VF610_CLK_QSPI0_X1_DIV] = imx_clk_divider("qspi0_x1", "qspi0_x2",
+						      ccm + CCM_CSCDR3, 3, 1);
+	clk[VF610_CLK_QSPI0] = imx_clk_gate2("qspi0", "qspi0_x1",
+					     ccm + CCM_CCGR2,
+					     vf610_ccm_ccgrx_cgn(4));
+
+	clk[VF610_CLK_QSPI1_SEL] = imx_clk_mux("qspi1_sel",
+					       ccm + CCM_CSCMR1,
+					       24, 2,
+					       sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_QSPI1_EN] = imx_clk_gate("qspi1_en", "qspi1_sel",
+					       ccm + CCM_CSCDR3, 12);
+	clk[VF610_CLK_QSPI1_X4_DIV] = imx_clk_divider("qspi1_x4", "qspi1_en",
+						      ccm + CCM_CSCDR3, 8, 2);
+	clk[VF610_CLK_QSPI1_X2_DIV] = imx_clk_divider("qspi1_x2", "qspi1_x4",
+						      ccm + CCM_CSCDR3, 10, 1);
+	clk[VF610_CLK_QSPI1_X1_DIV] = imx_clk_divider("qspi1_x1", "qspi1_x2",
+						      ccm + CCM_CSCDR3, 11, 1);
+	clk[VF610_CLK_QSPI1] = imx_clk_gate2("qspi1", "qspi1_x1",
+					     ccm + CCM_CCGR8,
+					     vf610_ccm_ccgrx_cgn(4));
+}
+
+static void vf610_ccm_setup_enets(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+{
+	static const char *enet_sels[] = {
+		"enet_ext",
+		"audio_ext",
+		"enet_50m",
+		"enet_25m",
+	};
+
+	static const char *enet_ts_sels[] = {
+		"enet_ext",
+		"fxosc",
+		"audio_ext",
+		"usb",
+		"enet_ts",
+		"enet_25m",
+		"enet_50m",
+	};
+
+	clk[VF610_CLK_ENET_50M] = imx_clk_fixed_factor("enet_50m",
+						       "pll5_enet", 1, 10);
+	clk[VF610_CLK_ENET_25M] = imx_clk_fixed_factor("enet_25m",
+						       "pll5_enet", 1, 20);
+	clk[VF610_CLK_ENET_SEL] = imx_clk_mux("enet_sel",
+					      ccm + CCM_CSCMR2, 4, 2,
+					      enet_sels,
+					      ARRAY_SIZE(enet_sels));
+	clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel",
+						 ccm + CCM_CSCMR2, 0, 3,
+						 enet_ts_sels,
+						 ARRAY_SIZE(enet_ts_sels));
+	clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel",
+					   ccm + CCM_CSCDR1, 24);
+	clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel",
+					      ccm + CCM_CSCDR1, 23);
+	clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus",
+					     ccm + CCM_CCGR9,
+					     vf610_ccm_ccgrx_cgn(0));
+	clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus",
+					     ccm + CCM_CCGR9,
+					     vf610_ccm_ccgrx_cgn(1));
+}
+
+static void vf610_ccm_setup_pit(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+{
+	clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus",
+					   ccm + CCM_CCGR1,
+					   vf610_ccm_ccgrx_cgn(7));
+}
+
+static void vf610_ccm_setup_uarts(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+{
+	clk[VF610_CLK_UART0] = imx_clk_gate2("uart0", "ipg_bus",
+					     ccm + CCM_CCGR0,
+					     vf610_ccm_ccgrx_cgn(7));
+	clk[VF610_CLK_UART1] = imx_clk_gate2("uart1", "ipg_bus",
+					     ccm + CCM_CCGR0,
+					     vf610_ccm_ccgrx_cgn(8));
+	clk[VF610_CLK_UART2] = imx_clk_gate2("uart2", "ipg_bus",
+					     ccm + CCM_CCGR0,
+					     vf610_ccm_ccgrx_cgn(9));
+	clk[VF610_CLK_UART3] = imx_clk_gate2("uart3", "ipg_bus",
+					     ccm + CCM_CCGR0,
+					     vf610_ccm_ccgrx_cgn(10));
+	clk[VF610_CLK_UART4] = imx_clk_gate2("uart4", "ipg_bus",
+					     ccm + CCM_CCGR6,
+					     vf610_ccm_ccgrx_cgn(9));
+	clk[VF610_CLK_UART5] = imx_clk_gate2("uart5", "ipg_bus",
+					     ccm + CCM_CCGR6,
+					     vf610_ccm_ccgrx_cgn(10));
+}
+
+static void vf610_ccm_setup_i2cs(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+
+{
+	clk[VF610_CLK_I2C0] = imx_clk_gate2("i2c0", "ipg_bus",
+					    ccm + CCM_CCGR4,
+					    vf610_ccm_ccgrx_cgn(6));
+	clk[VF610_CLK_I2C1] = imx_clk_gate2("i2c1", "ipg_bus",
+					    ccm + CCM_CCGR4,
+					    vf610_ccm_ccgrx_cgn(7));
+	clk[VF610_CLK_I2C2] = imx_clk_gate2("i2c2", "ipg_bus",
+					    ccm + CCM_CCGR10,
+					    vf610_ccm_ccgrx_cgn(6));
+	clk[VF610_CLK_I2C3] = imx_clk_gate2("i2c3", "ipg_bus",
+					    ccm + CCM_CCGR10,
+					    vf610_ccm_ccgrx_cgn(7));
+}
+
+static void vf610_ccm_setup_dspis(struct device_node *np,
+				  void __iomem *anatop,
+				  void __iomem *ccm)
+{
+	clk[VF610_CLK_DSPI0] = imx_clk_gate2("dspi0", "ipg_bus",
+					     ccm + CCM_CCGR0,
+					     vf610_ccm_ccgrx_cgn(12));
+	clk[VF610_CLK_DSPI1] = imx_clk_gate2("dspi1", "ipg_bus",
+					     ccm + CCM_CCGR0,
+					     vf610_ccm_ccgrx_cgn(13));
+	clk[VF610_CLK_DSPI2] = imx_clk_gate2("dspi2", "ipg_bus",
+					     ccm + CCM_CCGR6,
+					     vf610_ccm_ccgrx_cgn(12));
+	clk[VF610_CLK_DSPI3] = imx_clk_gate2("dspi3", "ipg_bus",
+					     ccm + CCM_CCGR6,
+					     vf610_ccm_ccgrx_cgn(13));
+}
+
+static void vf610_ccm_setup_wdt(struct device_node *np,
+				void __iomem *anatop,
+				void __iomem *ccm)
+{
+	clk[VF610_CLK_WDT] = imx_clk_gate2("wdt", "ipg_bus",
+					   ccm + CCM_CCGR1,
+					   vf610_ccm_ccgrx_cgn(14));
+}
+
+static void vf610_ccm_setup_esdhcs(struct device_node *np,
+				   void __iomem *anatop,
+				   void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll3_usb_otg",
+		"pll3_pfd3",
+		"pll1_pfd3",
+		"platform_bus",
+	};
+
+	clk[VF610_CLK_ESDHC0_SEL] = imx_clk_mux("esdhc0_sel",
+						ccm + CCM_CSCMR1, 16, 2,
+						sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_ESDHC0_EN] = imx_clk_gate("esdhc0_en", "esdhc0_sel",
+						ccm + CCM_CSCDR2, 28);
+	clk[VF610_CLK_ESDHC0_DIV] = imx_clk_divider("esdhc0_div", "esdhc0_en",
+						    ccm +CCM_CSCDR2, 16, 4);
+	clk[VF610_CLK_ESDHC0] = imx_clk_gate2("eshc0", "esdhc0_div",
+					      ccm + CCM_CCGR7,
+					      vf610_ccm_ccgrx_cgn(1));
+
+	clk[VF610_CLK_ESDHC1_SEL] = imx_clk_mux("esdhc1_sel",
+						ccm + CCM_CSCMR1, 18, 2,
+						sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_ESDHC1_EN] = imx_clk_gate("esdhc1_en", "esdhc1_sel",
+						ccm + CCM_CSCDR2, 29);
+	clk[VF610_CLK_ESDHC1_DIV] = imx_clk_divider("esdhc1_div", "esdhc1_en",
+						    ccm + CCM_CSCDR2, 20, 4);
+	clk[VF610_CLK_ESDHC1] = imx_clk_gate2("eshc1", "esdhc1_div",
+					      ccm + CCM_CCGR7,
+					      vf610_ccm_ccgrx_cgn(2));
+}
+
+static void vf610_ccm_setup_ftms(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	/* FTM counter clock source, not module clock */
+	static const char *ftm_ext_sels[] = {
+		"sirc_128k",
+		"sxosc",
+		"fxosc_half",
+		"audio_ext",
+	};
+
+	static const char *ftm_fix_sels[] = {
+		"sxosc",
+		"ipg_bus",
+	};
+
+	/*
+	 * ftm_ext_clk and ftm_fix_clk are FTM timer counter's
+	 * selectable clock sources, both use a common enable bit
+	 * in CCM_CSCDR1, selecting "dummy" clock as parent of
+	 * "ftm0_ext_fix" make it serve only for enable/disable.
+	 */
+	clk[VF610_CLK_FTM0_EXT_SEL] = imx_clk_mux("ftm0_ext_sel",
+						  ccm + CCM_CSCMR2, 6, 2,
+						  ftm_ext_sels,
+						  ARRAY_SIZE(ftm_ext_sels));
+	clk[VF610_CLK_FTM0_FIX_SEL] = imx_clk_mux("ftm0_fix_sel",
+						  ccm + CCM_CSCMR2, 14, 1,
+						  ftm_fix_sels,
+						  ARRAY_SIZE(ftm_fix_sels));
+	clk[VF610_CLK_FTM0_EXT_FIX_EN] = imx_clk_gate("ftm0_ext_fix_en",
+						      "dummy",
+						      ccm + CCM_CSCDR1, 25);
+	clk[VF610_CLK_FTM1_EXT_SEL] = imx_clk_mux("ftm1_ext_sel",
+						  ccm + CCM_CSCMR2, 8, 2,
+						  ftm_ext_sels,
+						  ARRAY_SIZE(ftm_ext_sels));
+	clk[VF610_CLK_FTM1_FIX_SEL] = imx_clk_mux("ftm1_fix_sel",
+						  ccm + CCM_CSCMR2, 15, 1,
+						  ftm_fix_sels,
+						  ARRAY_SIZE(ftm_fix_sels));
+	clk[VF610_CLK_FTM1_EXT_FIX_EN] = imx_clk_gate("ftm1_ext_fix_en",
+						      "dummy",
+						      ccm + CCM_CSCDR1, 26);
+	clk[VF610_CLK_FTM2_EXT_SEL] = imx_clk_mux("ftm2_ext_sel",
+						  ccm + CCM_CSCMR2, 10, 2,
+						  ftm_ext_sels,
+						  ARRAY_SIZE(ftm_ext_sels));
+	clk[VF610_CLK_FTM2_FIX_SEL] = imx_clk_mux("ftm2_fix_sel",
+						  ccm + CCM_CSCMR2, 16, 1,
+						  ftm_fix_sels,
+						  ARRAY_SIZE(ftm_fix_sels));
+	clk[VF610_CLK_FTM2_EXT_FIX_EN] = imx_clk_gate("ftm2_ext_fix_en",
+						      "dummy",
+						      ccm + CCM_CSCDR1, 27);
+	clk[VF610_CLK_FTM3_EXT_SEL] = imx_clk_mux("ftm3_ext_sel",
+						  ccm + CCM_CSCMR2, 12, 2,
+						  ftm_ext_sels,
+						  ARRAY_SIZE(ftm_ext_sels));
+	clk[VF610_CLK_FTM3_FIX_SEL] = imx_clk_mux("ftm3_fix_sel",
+						  ccm + CCM_CSCMR2, 17, 1,
+						  ftm_fix_sels,
+						  ARRAY_SIZE(ftm_fix_sels));
+	clk[VF610_CLK_FTM3_EXT_FIX_EN] = imx_clk_gate("ftm3_ext_fix_en",
+						      "dummy",
+						      ccm + CCM_CSCDR1, 28);
+
+	/* ftm(n)_clk are FTM module operation clock */
+	clk[VF610_CLK_FTM0] = imx_clk_gate2("ftm0", "ipg_bus",
+					    ccm + CCM_CCGR1,
+					    vf610_ccm_ccgrx_cgn(8));
+	clk[VF610_CLK_FTM1] = imx_clk_gate2("ftm1", "ipg_bus",
+					    ccm + CCM_CCGR1,
+					    vf610_ccm_ccgrx_cgn(9));
+	clk[VF610_CLK_FTM2] = imx_clk_gate2("ftm2", "ipg_bus",
+					    ccm + CCM_CCGR7,
+					    vf610_ccm_ccgrx_cgn(8));
+	clk[VF610_CLK_FTM3] = imx_clk_gate2("ftm3", "ipg_bus",
+					    ccm + CCM_CCGR7,
+					    vf610_ccm_ccgrx_cgn(9));
+}
+
+static void vf610_ccm_setup_dcus(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll1_pfd2",
+		"pll3_usb_otg",
+	};
+
+	clk[VF610_CLK_DCU0_SEL] = imx_clk_mux("dcu0_sel",
+					      ccm + CCM_CSCMR1, 28, 1,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_DCU0_EN] = imx_clk_gate("dcu0_en", "dcu0_sel",
+					      ccm + CCM_CSCDR3, 19);
+	clk[VF610_CLK_DCU0_DIV] = imx_clk_divider("dcu0_div", "dcu0_en",
+						  ccm + CCM_CSCDR3, 16, 3);
+	clk[VF610_CLK_DCU0] = imx_clk_gate2("dcu0", "ipg_bus",
+					    ccm + CCM_CCGR3,
+					    vf610_ccm_ccgrx_cgn(8));
+	clk[VF610_CLK_DCU1_SEL] = imx_clk_mux("dcu1_sel",
+					      ccm + CCM_CSCMR1, 29, 1,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_DCU1_EN] = imx_clk_gate("dcu1_en", "dcu1_sel",
+					      ccm + CCM_CSCDR3, 23);
+	clk[VF610_CLK_DCU1_DIV] = imx_clk_divider("dcu1_div", "dcu1_en",
+						  ccm + CCM_CSCDR3, 20, 3);
+	clk[VF610_CLK_DCU1] = imx_clk_gate2("dcu1", "ipg_bus",
+					    ccm + CCM_CCGR9,
+					    vf610_ccm_ccgrx_cgn(8));
+}
+
+static void vf610_ccm_setup_tcons(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	clk[VF610_CLK_TCON0] = imx_clk_gate2("tcon0", "platform_bus",
+					     ccm + CCM_CCGR1,
+					     vf610_ccm_ccgrx_cgn(13));
+	clk[VF610_CLK_TCON1] = imx_clk_gate2("tcon1", "platform_bus",
+					     ccm + CCM_CCGR7,
+					     vf610_ccm_ccgrx_cgn(13));
+}
+
+
+static void vf610_ccm_setup_esai(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"audio_ext",
+		"mlb",
+		"spdif_rx",
+		"pll4_audio_div",
+	};
+
+	clk[VF610_CLK_ESAI_SEL] = imx_clk_mux("esai_sel",
+					      ccm + CCM_CSCMR1, 20, 2,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_ESAI_EN] = imx_clk_gate("esai_en", "esai_sel",
+					      ccm + CCM_CSCDR2, 30);
+	clk[VF610_CLK_ESAI_DIV] = imx_clk_divider("esai_div", "esai_en",
+						  ccm + CCM_CSCDR2, 24, 4);
+	clk[VF610_CLK_ESAI] = imx_clk_gate2("esai", "esai_div",
+					    ccm + CCM_CCGR4,
+					    vf610_ccm_ccgrx_cgn(2));
+}
+
+static void vf610_ccm_setup_sais(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"audio_ext",
+		"mlb",
+		"spdif_rx",
+		"pll4_audio_div",
+	};
+
+	clk[VF610_CLK_SAI0_SEL] = imx_clk_mux("sai0_sel",
+					      ccm + CCM_CSCMR1, 0, 2,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_SAI0_EN] = imx_clk_gate("sai0_en", "sai0_sel",
+					      ccm + CCM_CSCDR1, 16);
+	clk[VF610_CLK_SAI0_DIV] = imx_clk_divider("sai0_div", "sai0_en",
+						  ccm + CCM_CSCDR1, 0, 4);
+	clk[VF610_CLK_SAI0] = imx_clk_gate2("sai0", "ipg_bus",
+					    ccm + CCM_CCGR0,
+					    vf610_ccm_ccgrx_cgn(15));
+
+	clk[VF610_CLK_SAI1_SEL] = imx_clk_mux("sai1_sel",
+					      ccm + CCM_CSCMR1, 2, 2,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_SAI1_EN] = imx_clk_gate("sai1_en", "sai1_sel",
+					      ccm + CCM_CSCDR1, 17);
+	clk[VF610_CLK_SAI1_DIV] = imx_clk_divider("sai1_div", "sai1_en",
+						  ccm + CCM_CSCDR1, 4, 4);
+	clk[VF610_CLK_SAI1] = imx_clk_gate2("sai1", "ipg_bus",
+					    ccm + CCM_CCGR1,
+					    vf610_ccm_ccgrx_cgn(0));
+
+	clk[VF610_CLK_SAI2_SEL] = imx_clk_mux("sai2_sel",
+					      ccm + CCM_CSCMR1, 4, 2,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_SAI2_EN] = imx_clk_gate("sai2_en", "sai2_sel",
+					      ccm + CCM_CSCDR1, 18);
+	clk[VF610_CLK_SAI2_DIV] = imx_clk_divider("sai2_div", "sai2_en",
+						  ccm + CCM_CSCDR1, 8, 4);
+	clk[VF610_CLK_SAI2] = imx_clk_gate2("sai2", "ipg_bus",
+					    ccm + CCM_CCGR1,
+					    vf610_ccm_ccgrx_cgn(1));
+
+	clk[VF610_CLK_SAI3_SEL] = imx_clk_mux("sai3_sel",
+					      ccm + CCM_CSCMR1, 6, 2,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_SAI3_EN] = imx_clk_gate("sai3_en", "sai3_sel",
+					      ccm + CCM_CSCDR1, 19);
+	clk[VF610_CLK_SAI3_DIV] = imx_clk_divider("sai3_div", "sai3_en",
+						  ccm + CCM_CSCDR1, 12, 4);
+	clk[VF610_CLK_SAI3] = imx_clk_gate2("sai3", "ipg_bus",
+					    ccm + CCM_CCGR1,
+					    vf610_ccm_ccgrx_cgn(2));
+}
+
+static void vf610_ccm_setup_nfc(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"platform_bus",
+		"pll1_pfd1",
+		"pll3_pfd1",
+		"pll3_pfd3",
+	};
+
+	clk[VF610_CLK_NFC_SEL] = imx_clk_mux("nfc_sel",
+					     ccm + CCM_CSCMR1, 12, 2,
+					     sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_NFC_EN] = imx_clk_gate("nfc_en", "nfc_sel",
+					     ccm + CCM_CSCDR2, 9);
+	clk[VF610_CLK_NFC_PRE_DIV] = imx_clk_divider("nfc_pre_div", "nfc_en",
+						     ccm + CCM_CSCDR3, 13, 3);
+	clk[VF610_CLK_NFC_FRAC_DIV] = imx_clk_divider("nfc_frac_div",
+						      "nfc_pre_div",
+						      ccm + CCM_CSCDR2, 4, 4);
+	clk[VF610_CLK_NFC] = imx_clk_gate2("nfc", "nfc_frac_div",
+					   ccm + CCM_CCGR10,
+					   vf610_ccm_ccgrx_cgn(0));
+}
+
+static void vf610_ccm_setup_gpu(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll2_pfd2",
+		"pll3_pfd2",
+	};
+
+	clk[VF610_CLK_GPU_SEL] = imx_clk_mux("gpu_sel",
+					     ccm + CCM_CSCMR1, 14, 1,
+					     sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_GPU_EN] = imx_clk_gate("gpu_en", "gpu_sel",
+					     ccm + CCM_CSCDR2, 10);
+	clk[VF610_CLK_GPU2D] = imx_clk_gate2("gpu", "gpu_en",
+					     ccm + CCM_CCGR8,
+					     vf610_ccm_ccgrx_cgn(15));
+}
+
+static void vf610_ccm_setup_vadc(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	static const char *sources[] = {
+		"pll6_video_div",
+		"pll3_usb_otg_div",
+		"pll3_usb_otg",
+	};
+
+	clk[VF610_CLK_VADC_SEL] = imx_clk_mux("vadc_sel",
+					      ccm + CCM_CSCMR1, 8, 2,
+					      sources, ARRAY_SIZE(sources));
+	clk[VF610_CLK_VADC_EN] = imx_clk_gate("vadc_en", "vadc_sel",
+					      ccm + CCM_CSCDR1, 22);
+	clk[VF610_CLK_VADC_DIV] = imx_clk_divider("vadc_div", "vadc_en",
+						  ccm + CCM_CSCDR1, 20, 2);
+	clk[VF610_CLK_VADC_DIV_HALF] = imx_clk_fixed_factor("vadc_div_half",
+							    "vadc_div",
+							    1, 2);
+	clk[VF610_CLK_VADC] = imx_clk_gate2("vadc", "vadc_div",
+					    ccm + CCM_CCGR8,
+					    vf610_ccm_ccgrx_cgn(7));
+}
+
+
+static void vf610_ccm_setup_adcs(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	clk[VF610_CLK_ADC0] = imx_clk_gate2("adc0", "ipg_bus",
+					    ccm + CCM_CCGR1,
+					    vf610_ccm_ccgrx_cgn(11));
+	clk[VF610_CLK_ADC1] = imx_clk_gate2("adc1", "ipg_bus",
+					    ccm + CCM_CCGR7,
+					    vf610_ccm_ccgrx_cgn(11));
+	clk[VF610_CLK_DAC0] = imx_clk_gate2("dac0", "ipg_bus",
+					    ccm + CCM_CCGR8,
+					    vf610_ccm_ccgrx_cgn(12));
+	clk[VF610_CLK_DAC1] = imx_clk_gate2("dac1", "ipg_bus",
+					    ccm + CCM_CCGR8,
+					    vf610_ccm_ccgrx_cgn(13));
+}
+
+static void vf610_ccm_setup_flexcans(struct device_node *np,
+				     void __iomem *anatop,
+				     void __iomem *ccm)
+{
+	clk[VF610_CLK_FLEXCAN0_EN] = imx_clk_gate("flexcan0_en", "ipg_bus",
+						  ccm + CCM_CSCDR2, 11);
+	clk[VF610_CLK_FLEXCAN0] = imx_clk_gate2("flexcan0", "flexcan0_en",
+						ccm + CCM_CCGR0,
+						vf610_ccm_ccgrx_cgn(0));
+	clk[VF610_CLK_FLEXCAN1_EN] = imx_clk_gate("flexcan1_en", "ipg_bus",
+						  ccm + CCM_CSCDR2, 12);
+	clk[VF610_CLK_FLEXCAN1] = imx_clk_gate2("flexcan1", "flexcan1_en",
+						ccm + CCM_CCGR9,
+						vf610_ccm_ccgrx_cgn(4));
+}
+
+static void vf610_ccm_setup_dmas(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	clk[VF610_CLK_DMAMUX0] = imx_clk_gate2("dmamux0", "platform_bus",
+					       ccm + CCM_CCGR0,
+					       vf610_ccm_ccgrx_cgn(4));
+	clk[VF610_CLK_DMAMUX1] = imx_clk_gate2("dmamux1", "platform_bus",
+					       ccm + CCM_CCGR0,
+					       vf610_ccm_ccgrx_cgn(5));
+	clk[VF610_CLK_DMAMUX2] = imx_clk_gate2("dmamux2", "platform_bus",
+					       ccm + CCM_CCGR6,
+					       vf610_ccm_ccgrx_cgn(1));
+	clk[VF610_CLK_DMAMUX3] = imx_clk_gate2("dmamux3", "platform_bus",
+					       ccm + CCM_CCGR6,
+					       vf610_ccm_ccgrx_cgn(2));
+}
+
+static void vf610_ccm_setup_misc(struct device_node *np,
+				 void __iomem *anatop,
+				 void __iomem *ccm)
+{
+	clk[VF610_CLK_ASRC] = imx_clk_gate2("asrc", "ipg_bus",
+					    ccm + CCM_CCGR4,
+					    vf610_ccm_ccgrx_cgn(1));
+	clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus",
+					    ccm + CCM_CCGR6,
+					    vf610_ccm_ccgrx_cgn(7));
+	clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus",
+					  ccm + CCM_CCSR, 24);
+	clk[VF610_CLK_OCOTP] = imx_clk_gate("ocotp", "ipg_bus",
+					    ccm + CCM_CCGR6,
+					    vf610_ccm_ccgrx_cgn(5));
+
+	clk[VF610_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in",
+							 "anaclk1",
+							 anatop + ANA_MISC1,
+							 12, BIT(10));
+}
+
+typedef void (*vf610_ccm_group_setup_func) (struct device_node *np,
+					    void __iomem *anatop,
+					    void __iomem *ccm);
+
+static void __init vf610_clocks_init(struct device_node *np)
+{
+	size_t i;
+	struct device_node *node;
+	void __iomem *anatop;
+	void __iomem *ccm;
+
+	static const vf610_ccm_group_setup_func group_setup_funcs[] = {
+		vf610_ccm_setup_fixed,
+		vf610_ccm_setup_from_dt,
+		vf610_ccm_setup_slow_clk,
+		vf610_ccm_setup_fast_clk,
+		vf610_ccm_setup_pll_bypass_srcs,
+		vf610_ccm_setup_plls,
+		vf610_ccm_setup_pll_bypass,
+		vf610_ccm_setup_group1,
+		vf610_ccm_setup_pfds,
+		vf610_ccm_setup_pll1_pfd_out,
+		vf610_ccm_setup_pll2_pfd_out,
+		vf610_ccm_setup_sys_out,
+		vf610_ccm_setup_ddr_out,
+		vf610_ccm_setup_dividers,
+		vf610_ccm_setup_pll4_main_div,
+		vf610_ccm_setup_ddrmc,
+		vf610_ccm_setup_wkpu,
+		vf610_ccm_setup_usbphys,
+		vf610_ccm_setup_usbcs,
+		vf610_ccm_setup_qspis,
+		vf610_ccm_setup_enets,
+		vf610_ccm_setup_pit,
+		vf610_ccm_setup_uarts,
+		vf610_ccm_setup_i2cs,
+		vf610_ccm_setup_dspis,
+		vf610_ccm_setup_wdt,
+		vf610_ccm_setup_esdhcs,
+		vf610_ccm_setup_ftms,
+		vf610_ccm_setup_dcus,
+		vf610_ccm_setup_tcons,
+		vf610_ccm_setup_esai,
+		vf610_ccm_setup_sais,
+		vf610_ccm_setup_nfc,
+		vf610_ccm_setup_gpu,
+		vf610_ccm_setup_vadc,
+		vf610_ccm_setup_adcs,
+		vf610_ccm_setup_flexcans,
+		vf610_ccm_setup_dmas,
+		vf610_ccm_setup_misc,
+	};
+
+	ccm = of_iomap(np, 0);
+	BUG_ON(!ccm);
+
+	node = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop");
+	anatop = of_iomap(node, 0);
+	/* anatop = syscon_base_lookup_by_phandle(np, "fsl,anatop"); */
+	BUG_ON(IS_ERR(anatop));
+
+	for (i = 0; i < ARRAY_SIZE(group_setup_funcs); i++)
+		group_setup_funcs[i](np, anatop, ccm);
+
+	imx_check_clocks(clk, VF610_CLK_END);
+
+	/* Do not bypass PLLs initially */
+
+	clk_set_parent(clk[VF610_PLL1_BYPASS], clk[VF610_CLK_PLL1]);
+	clk_set_parent(clk[VF610_PLL2_BYPASS], clk[VF610_CLK_PLL2]);
+	clk_set_parent(clk[VF610_PLL3_BYPASS], clk[VF610_CLK_PLL3]);
+	clk_set_parent(clk[VF610_PLL4_BYPASS], clk[VF610_CLK_PLL4]);
+	clk_set_parent(clk[VF610_PLL5_BYPASS], clk[VF610_CLK_PLL5]);
+	clk_set_parent(clk[VF610_PLL6_BYPASS], clk[VF610_CLK_PLL6]);
+	clk_set_parent(clk[VF610_PLL7_BYPASS], clk[VF610_CLK_PLL7]);
+
+	clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]);
+	clk_set_rate(clk[VF610_CLK_QSPI0_X4_DIV],
+		     clk_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);
+	clk_set_rate(clk[VF610_CLK_QSPI0_X2_DIV],
+		     clk_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);
+	clk_set_rate(clk[VF610_CLK_QSPI0_X1_DIV],
+		     clk_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);
+
+	clk_set_parent(clk[VF610_CLK_QSPI1_SEL], clk[VF610_CLK_PLL1_PFD4]);
+	clk_set_rate(clk[VF610_CLK_QSPI1_X4_DIV],
+		     clk_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);
+	clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV],
+		     clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
+	clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV],
+		     clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
+
+	clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]);
+	clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]);
+	clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]);
+	clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]);
+
+	clk_enable(clk[VF610_CLK_SYS_BUS]);
+	clk_enable(clk[VF610_CLK_DDR_SEL]);
+	clk_enable(clk[VF610_CLK_DAP]);
+	clk_enable(clk[VF610_CLK_DDRMC]);
+	clk_enable(clk[VF610_CLK_WKPU]);
+
+	clk_data.clks = clk;
+	clk_data.clk_num = ARRAY_SIZE(clk);
+	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+}
+CLK_OF_DECLARE(vf610, "fsl,vf610-ccm", vf610_clocks_init);
-- 
2.5.5



From ivan.skinner at tennesseeinternationalpageants.com  Mon Oct  3 16:06:45 2016
From: ivan.skinner at tennesseeinternationalpageants.com (FedEx Standard Overnight)
Date: Mon, 3 Oct 2016 23:06:45 +0000
Subject: Problems with item delivery, n.00809120
Message-ID: <a4bd4d4fe014e256fe93b86917765a67@tennesseeinternationalpageants.com>

Dear Customer,

Courier was unable to deliver the parcel to you.
Please, download Delivery Label attached to this email.

Thanks and best regards,
Ivan Skinner,
FedEx Station Manager.

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From s.hauer at pengutronix.de  Mon Oct  3 23:05:17 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:05:17 +0200
Subject: [PATCH 0/7] scripts: kwboot: various improvements
In-Reply-To: <20160928185017.25002-1-u.kleine-koenig@pengutronix.de>
References: <20160928185017.25002-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161004060517.kgswt2fj5qnmpxty@pengutronix.de>

On Wed, Sep 28, 2016 at 08:50:10PM +0200, Uwe Kleine-K?nig wrote:
> Hello,
> 
> this series is the result of my efforts to make UART booting on an
> Netgear ReadyNAS 2120 work.
> 
> Best regards
> Uwe

Applied, thanks

Sascha

> 
> Uwe Kleine-K?nig (7):
>   scripts: kwboot: try to resync on packet boundary after receiving a
>     NAK
>   scripts: kwboot: flush input and output only once
>   scripts: kwboot: improve diagnostic output
>   scripts: kwboot: shorten delay between two boot messages
>   scripts: kwboot: simplify kwboot_mmap_image
>   scripts: kwboot: set boot source to UART before sending
>   images: mvebu: don't generate uart images
> 
>  images/Makefile.mvebu |  29 ---------------
>  scripts/kwboot.c      | 101 +++++++++++++++++++++++++++++++++++++++-----------
>  2 files changed, 80 insertions(+), 50 deletions(-)
> 
> -- 
> 2.9.3
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:05:51 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:05:51 +0200
Subject: [PATCH] pinctrl: mvebu: add newline to error message
In-Reply-To: <1475092260-12749-1-git-send-email-uwe@kleine-koenig.org>
References: <1475092260-12749-1-git-send-email-uwe@kleine-koenig.org>
Message-ID: <20161004060551.ikj2gy3pvkltidzm@pengutronix.de>

On Wed, Sep 28, 2016 at 09:51:00PM +0200, Uwe Kleine-K?nig wrote:
> Signed-off-by: Uwe Kleine-K?nig <uwe at kleine-koenig.org>
> ---
>  drivers/pinctrl/mvebu/common.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Applied, thanks

Sascha

> 
> diff --git a/drivers/pinctrl/mvebu/common.c b/drivers/pinctrl/mvebu/common.c
> index 532705286795..ae16b39268d7 100644
> --- a/drivers/pinctrl/mvebu/common.c
> +++ b/drivers/pinctrl/mvebu/common.c
> @@ -78,7 +78,8 @@ static int mvebu_pinctrl_set_state(struct pinctrl_device *pdev,
>  
>  		set = mvebu_pinctrl_find_setting_by_name(pctl, mode, function);
>  		if (!set) {
> -			dev_err(pdev->dev, "unsupported function %s on pin %s",
> +			dev_err(pdev->dev,
> +				"unsupported function %s on pin %s\n",
>  				function, group);
>  			continue;
>  		}
> -- 
> 2.8.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:10:54 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:10:54 +0200
Subject: [PATCH 1/2] i.MX: Introduce imx6_cpu_revision()
In-Reply-To: <1475187703-5748-1-git-send-email-andrew.smirnov@gmail.com>
References: <1475187703-5748-1-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004061054.pfqdjdl5hdwwhe5g@pengutronix.de>

On Thu, Sep 29, 2016 at 03:21:42PM -0700, Andrey Smirnov wrote:
> Factor out CPU revision identification code from imx6_init() into a
> standalone inline function (similar to imx6_cpu_type()), so that it
> would be possible to use that functionality in PBL code.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> ---
> 
> Sascha:
> 
> I have an almost ready to send, board support patch that uses this in
> PBL. Unfortunately at the last minute a regression in functionality
> was discovered in that code, so I can't post it until that is
> resolved, meanwhile I am hoping I can get this code in while I am
> debugging.
> 
> Let me know if you'd rathe I send everything together.

Looks good as is. Just send your board support when the remaining issues
are resolved. Thanks, applied.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:13:40 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:13:40 +0200
Subject: [PATCH 01/10] serial: arm_dcc: depend on !CPU_V8
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
References: <20160930103607.15791-1-l.stach@pengutronix.de>
Message-ID: <20161004061340.azwa54a6s7uvlll3@pengutronix.de>

On Fri, Sep 30, 2016 at 12:35:58PM +0200, Lucas Stach wrote:
> The DCC console uses coprocessor registers registers accesses, the
> implementation of those for ARMv8 is currently missing.
> 
> Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
> ---
>  drivers/serial/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:15:17 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:15:17 +0200
Subject: [PATCH] net/phy: marvell: fix error handling
In-Reply-To: <20160930201008.4136-1-u.kleine-koenig@pengutronix.de>
References: <20160930201008.4136-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161004061517.ychrfdgask52qcvf@pengutronix.de>

On Fri, Sep 30, 2016 at 10:10:08PM +0200, Uwe Kleine-K?nig wrote:
> Without first assigning to ret it doesn't make sense to check it.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
>  drivers/net/phy/marvell.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:16:00 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:16:00 +0200
Subject: [PATCH] sandbox: Makefile: drop unused SUBARCH stuff
In-Reply-To: <20161003115657.17953-1-antonynpavlov@gmail.com>
References: <20161003115657.17953-1-antonynpavlov@gmail.com>
Message-ID: <20161004061600.x3encuyzoz44ocvo@pengutronix.de>

On Mon, Oct 03, 2016 at 02:56:57PM +0300, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/sandbox/Makefile | 5 -----
>  1 file changed, 5 deletions(-)

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:24:20 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:24:20 +0200
Subject: [PATCH 02/20] i.MX: Add DEBUG_LL hooks for VF610
In-Reply-To: <1475505657-898-3-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-3-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004062420.uie22nvogkeqyndz@pengutronix.de>

On Mon, Oct 03, 2016 at 07:40:39AM -0700, Andrey Smirnov wrote:
> Add code to support DEBUG_LL functionality on VF610/Vybrid platform.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> ---
>  arch/arm/mach-imx/include/mach/debug_ll.h   |  27 ++-
>  arch/arm/mach-imx/include/mach/vf610-regs.h | 126 +++++++++++++
>  common/Kconfig                              |  10 +-
>  include/serial/lpuart.h                     | 265 ++++++++++++++++++++++++++++
>  4 files changed, 426 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/mach-imx/include/mach/vf610-regs.h
>  create mode 100644 include/serial/lpuart.h
> 
> diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h b/arch/arm/mach-imx/include/mach/debug_ll.h
> index 5c2db6c..a132f3c 100644
> --- a/arch/arm/mach-imx/include/mach/debug_ll.h
> +++ b/arch/arm/mach-imx/include/mach/debug_ll.h
> @@ -14,8 +14,10 @@
>  #include <mach/imx51-regs.h>
>  #include <mach/imx53-regs.h>
>  #include <mach/imx6-regs.h>
> +#include <mach/vf610-regs.h>
>  
>  #include <serial/imx-uart.h>
> +#include <serial/lpuart.h>
>  
>  #ifdef CONFIG_DEBUG_LL
>  
> @@ -42,6 +44,8 @@
>  #define IMX_DEBUG_SOC MX53
>  #elif defined CONFIG_DEBUG_IMX6Q_UART
>  #define IMX_DEBUG_SOC MX6
> +#elif defined CONFIG_DEBUG_VF610_UART
> +#define IMX_DEBUG_SOC VF610
>  #else
>  #error "unknown i.MX debug uart soc type"
>  #endif
> @@ -74,6 +78,13 @@ static inline void imx6_uart_setup_ll(void)
>  	imx6_uart_setup(base);
>  }
>  
> +static inline void vf610_uart_setup_ll(void)
> +{
> +	void *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, CONFIG_DEBUG_IMX_UART_PORT));
> +
> +	lpuart_setup(base, 66000000);
> +}
> +
>  static inline void PUTC_LL(int c)
>  {
>  	void __iomem *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC,
> @@ -82,14 +93,19 @@ static inline void PUTC_LL(int c)
>  	if (!base)
>  		return;
>  
> -	imx_uart_putc(base, c);
> +	if (IS_ENABLED(CONFIG_DEBUG_VF610_UART))
> +		lpuart_putc(base, c);
> +	else
> +		imx_uart_putc(base, c);
>  }
> +
>  #else
>  
>  static inline void imx50_uart_setup_ll(void) {}
>  static inline void imx51_uart_setup_ll(void) {}
>  static inline void imx53_uart_setup_ll(void) {}
>  static inline void imx6_uart_setup_ll(void)  {}
> +static inline void vf610_uart_setup_ll(void) {}
>  
>  #endif /* CONFIG_DEBUG_LL */
>  
> @@ -115,4 +131,13 @@ static inline void imx53_ungate_all_peripherals(void)
>  	imx_ungate_all_peripherals(IOMEM(MX53_CCM_BASE_ADDR));
>  }
>  
> +static inline void vf610_ungate_all_peripherals(void)
> +{
> +	void __iomem *ccmbase = IOMEM(VF610_CCM_BASE_ADDR);
> +	int i;
> +
> +	for (i = 0x40; i <= 0x6c; i += 4)
> +		writel(0xffffffff, ccmbase + i);
> +}
> +
>  #endif /* __MACH_DEBUG_LL_H__ */
> diff --git a/arch/arm/mach-imx/include/mach/vf610-regs.h b/arch/arm/mach-imx/include/mach/vf610-regs.h

This is probably not the right patch to add this file.

> new file mode 100644
> index 0000000..a1c1a09
> --- /dev/null
> +++ b/arch/arm/mach-imx/include/mach/vf610-regs.h
> @@ -0,0 +1,126 @@
> +/*
> + * Copyright 2013-2014 Freescale Semiconductor, Inc.
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef __ASM_ARCH_IMX_REGS_H__
> +#define __ASM_ARCH_IMX_REGS_H__

MACH_VF610_REGS_H ?

> +/* System Reset Controller (SRC) */
> +#define SRC_SRSR_SW_RST					(0x1 << 18)
> +#define SRC_SRSR_RESETB					(0x1 << 7)
> +#define SRC_SRSR_JTAG_RST				(0x1 << 5)
> +#define SRC_SRSR_WDOG_M4				(0x1 << 4)
> +#define SRC_SRSR_WDOG_A5				(0x1 << 3)
> +#define SRC_SRSR_POR_RST				(0x1 << 0)
> +#define SRC_SBMR2_BMOD_MASK             (0x3 << 24)
> +#define SRC_SBMR2_BMOD_SHIFT            24
> +#define SRC_SBMR2_BMOD_FUSES            0x0
> +#define SRC_SBMR2_BMOD_SERIAL           0x1
> +#define SRC_SBMR2_BMOD_RCON             0x2

Please add a VF610_ prefix.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:32:14 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:32:14 +0200
Subject: [PATCH 04/20] i.MX: Add support for VF610 Tower board
In-Reply-To: <1475505657-898-5-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-5-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004063214.2rguzsvtq4aste5x@pengutronix.de>

On Mon, Oct 03, 2016 at 07:40:41AM -0700, Andrey Smirnov wrote:
> Add support for VF610 Tower board.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> ---
>  arch/arm/boards/Makefile                           |   3 +-
>  arch/arm/boards/freescale-vf610-twr/Makefile       |   4 +
>  arch/arm/boards/freescale-vf610-twr/board.c        |  61 +++++
>  .../flash-header-vf610-twr.imxcfg                  | 277 +++++++++++++++++++++
>  arch/arm/boards/freescale-vf610-twr/lowlevel.c     |  45 ++++
>  arch/arm/dts/Makefile                              |   1 +
>  arch/arm/dts/vf610-twr.dts                         |  14 ++
>  arch/arm/mach-imx/Kconfig                          |   4 +
>  arch/arm/mach-imx/include/mach/clock-vf610.h       | 215 ++++++++++++++++
>  arch/arm/mach-imx/include/mach/iomux-vf610.h       | 258 +++++++++++++++++++
>  images/Makefile.imx                                |   5 +
>  11 files changed, 886 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boards/freescale-vf610-twr/Makefile
>  create mode 100644 arch/arm/boards/freescale-vf610-twr/board.c
>  create mode 100644 arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
>  create mode 100644 arch/arm/boards/freescale-vf610-twr/lowlevel.c
>  create mode 100644 arch/arm/dts/vf610-twr.dts
>  create mode 100644 arch/arm/mach-imx/include/mach/clock-vf610.h
>  create mode 100644 arch/arm/mach-imx/include/mach/iomux-vf610.h
> 
> diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
> index 23a8dbd..c8bc565 100644
> --- a/arch/arm/boards/Makefile
> +++ b/arch/arm/boards/Makefile
> @@ -10,7 +10,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK)		+= at91sam9260ek/
>  obj-$(CONFIG_MACH_AT91SAM9M10G45EK)		+= at91sam9m10g45ek/
>  obj-$(CONFIG_MACH_AT91SAM9M10IHD)		+= at91sam9m10ihd/
>  obj-$(CONFIG_MACH_AT91SAM9N12EK)		+= at91sam9n12ek/
> -obj-$(CONFIG_MACH_AT91SAM9X5EK)			+= at91sam9x5ek/
> +nobj-$(CONFIG_MACH_AT91SAM9X5EK)			+= at91sam9x5ek/
>  obj-$(CONFIG_MACH_BEAGLE)			+= beagle/
>  obj-$(CONFIG_MACH_BEAGLEBONE)			+= beaglebone/
>  obj-$(CONFIG_MACH_CANON_A1100)			+= canon-a1100/
> @@ -138,3 +138,4 @@ obj-$(CONFIG_MACH_ZEDBOARD)			+= avnet-zedboard/
>  obj-$(CONFIG_MACH_ZYLONITE)			+= zylonite/
>  obj-$(CONFIG_MACH_VARISCITE_MX6)		+= variscite-mx6/
>  obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
> +obj-$(CONFIG_MACH_VF610_TWR)			+= freescale-vf610-twr/
> diff --git a/arch/arm/boards/freescale-vf610-twr/Makefile b/arch/arm/boards/freescale-vf610-twr/Makefile
> new file mode 100644
> index 0000000..32a7da5
> --- /dev/null
> +++ b/arch/arm/boards/freescale-vf610-twr/Makefile
> @@ -0,0 +1,4 @@
> +obj-y += board.o
> +obj-y += flash-header-vf610-twr.dcd.o
> +extra-y += flash-header-vf610-twr.dcd.S flash-header-vf610-twr.dcd
> +lwl-y += lowlevel.o
> diff --git a/arch/arm/boards/freescale-vf610-twr/board.c b/arch/arm/boards/freescale-vf610-twr/board.c
> new file mode 100644
> index 0000000..0879f74
> --- /dev/null
> +++ b/arch/arm/boards/freescale-vf610-twr/board.c
> @@ -0,0 +1,61 @@
> +/*
> + * Copyright (c) 2016 Zodiac Inflight Innovation
> + * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include <config.h>
> +#include <common.h>
> +#include <dma.h>
> +#include <driver.h>
> +#include <init.h>
> +#include <of.h>
> +#include <malloc.h>
> +#include <mci.h>
> +#include <clock.h>
> +#include <io.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +
> +/*
> + * Make sure that esdhc1's clock divider is 1
> + */
> +static int vf610_twr_sdhc1_clock_init(void)
> +{
> +	int err;
> +	struct clk *esdhc1_div, *esdhc1_div_parent;
> +
> +	if (!of_machine_is_compatible("fsl,vf610-twr"))
> +		return 0;
> +
> +	esdhc1_div = clk_lookup("esdhc1_div");
> +
> +	if (IS_ERR(esdhc1_div))
> +		return PTR_ERR(esdhc1_div);
> +
> +	esdhc1_div_parent = clk_get_parent(esdhc1_div);
> +	if (IS_ERR(esdhc1_div_parent))
> +		return PTR_ERR(esdhc1_div_parent);
> +
> +	err = clk_set_rate(esdhc1_div,
> +			   clk_get_rate(esdhc1_div_parent));
> +	if (err)
> +		return err;
> +
> +	clk_put(esdhc1_div);
> +
> +	return 0;
> +}
> +coredevice_initcall(vf610_twr_sdhc1_clock_init);

What's the background for this? Should it be made SoC specific?

> diff --git a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
> new file mode 100644
> index 0000000..18138d2
> --- /dev/null
> +++ b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
> @@ -0,0 +1,277 @@
> +soc vf610
> +loadaddr 0x80000000
> +dcdofs 0x400
> +
> +#define VF610_DDR_PAD_CTRL	0x00000180 /* 25 Ohm drive strength */
> +#define VF610_DDR_PAD_CTRL_1	0x00010180 /* 25 Ohm drive strength + differential input */
> +
> +#define DDRMC_PHY_DQ_TIMING	0x00002613
> +#define DDRMC_PHY_DQS_TIMING	0x00002615
> +#define DDRMC_PHY_CTRL		0x00210000
> +#define DDRMC_PHY_MASTER_CTRL	0x0001012a
> +#define DDRMC_PHY_SLAVE_CTRL	0x00002000
> +#define DDRMC_PHY_OFF		0x00000000
> +#define DDRMC_PHY_PROC_PAD_ODT	0x00010101
> +
> +#ifdef DEBUG
> +#define CHECKPOINT(n) wm 32 0x3f000000 n
> +#else
> +#define CHECKPOINT(n)
> +#endif
> +
> +CHECKPOINT(1)
> +
> +/* ======================= Clock initialization =======================*/
> +
> +/*
> + * Ungate all IP block clocks
> + */
> +wm 32 0x4006b040 0xffffffff
> +wm 32 0x4006b044 0xffffffff
> +wm 32 0x4006b048 0xffffffff
> +wm 32 0x4006b04c 0xffffffff
> +wm 32 0x4006b050 0xffffffff
> +wm 32 0x4006b058 0xffffffff
> +wm 32 0x4006b05c 0xffffffff
> +wm 32 0x4006b060 0xffffffff
> +wm 32 0x4006b064 0xffffffff
> +wm 32 0x4006b068 0xffffffff
> +wm 32 0x4006b06c 0xffffffff
> +
> +
> +/*
> + * We have to options to clock DDR controller:
> + *
> + *  - Use Core-A5 clock
> + *  - Use PLL2 PFD2 clock
> + *
> +
> + * Using first option without changing PLL settings doesn't seem to be
> + * possible given that DDRMC requires minimum of 300Mhz and MaskROM
> + * configures it to be clocked at 264Mhz. Changing PLL1 settings
> + * proved to be challenging becuase MaskROM code executing this DCD
> + * will also be fetching the rest of the bootloader via some
> + * peripheral interface whose clock is derived from Cortex-A5 clock.
> + *
> + * As a result this DCD configuration code uses the second option of
> + * clocking DDR wiht PLL2 PFD2 clock output
> + *
> + * Turn PLL2 on
> + */
> +wm 32 0x40050030 0x00002001 /* Fout = Fin * 22 */
> +
> +CHECKPOINT(2)
> +
> +/*
> + * Wait for PLLs to lock
> + */
> +check 32 while_any_bit_clear 0x40050030 0x80000000
> +
> +
> +CHECKPOINT(3)
> +
> +/*
> + * Switch DDRMC to be clocked with PLL2 PFD2 and enable PFD2 output
> + */
> +clear_bits 32 0x4006b008 0x00000040
> +set_bits   32 0x4006b008 0x00002000
> +
> +
> +
> +/* ======================= DDR IOMUX ======================= */
> +
> +CHECKPOINT(4)
> +
> +wm 32 0x40048220 VF610_DDR_PAD_CTRL
> +wm 32 0x40048224 VF610_DDR_PAD_CTRL
> +wm 32 0x40048228 VF610_DDR_PAD_CTRL
> +wm 32 0x4004822c VF610_DDR_PAD_CTRL
> +wm 32 0x40048230 VF610_DDR_PAD_CTRL
> +wm 32 0x40048234 VF610_DDR_PAD_CTRL
> +wm 32 0x40048238 VF610_DDR_PAD_CTRL
> +wm 32 0x4004823c VF610_DDR_PAD_CTRL
> +wm 32 0x40048240 VF610_DDR_PAD_CTRL
> +wm 32 0x40048244 VF610_DDR_PAD_CTRL
> +wm 32 0x40048248 VF610_DDR_PAD_CTRL
> +wm 32 0x4004824c VF610_DDR_PAD_CTRL
> +wm 32 0x40048250 VF610_DDR_PAD_CTRL
> +wm 32 0x40048254 VF610_DDR_PAD_CTRL
> +wm 32 0x40048258 VF610_DDR_PAD_CTRL
> +wm 32 0x4004825c VF610_DDR_PAD_CTRL
> +wm 32 0x40048260 VF610_DDR_PAD_CTRL
> +wm 32 0x40048264 VF610_DDR_PAD_CTRL
> +wm 32 0x40048268 VF610_DDR_PAD_CTRL
> +wm 32 0x4004826c VF610_DDR_PAD_CTRL
> +wm 32 0x40048270 VF610_DDR_PAD_CTRL
> +wm 32 0x40048274 VF610_DDR_PAD_CTRL
> +wm 32 0x40048278 VF610_DDR_PAD_CTRL
> +wm 32 0x4004827c VF610_DDR_PAD_CTRL_1
> +wm 32 0x40048280 VF610_DDR_PAD_CTRL_1
> +wm 32 0x40048284 VF610_DDR_PAD_CTRL_1
> +wm 32 0x40048288 VF610_DDR_PAD_CTRL_1
> +wm 32 0x4004828c VF610_DDR_PAD_CTRL_1
> +wm 32 0x40048290 VF610_DDR_PAD_CTRL_1
> +wm 32 0x40048294 VF610_DDR_PAD_CTRL_1
> +wm 32 0x40048298 VF610_DDR_PAD_CTRL_1
> +wm 32 0x4004829c VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482a0 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482a4 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482a8 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482ac VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482b0 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482b4 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482b8 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482bc VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482c0 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482c4 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482c8 VF610_DDR_PAD_CTRL_1
> +wm 32 0x400482cc VF610_DDR_PAD_CTRL
> +wm 32 0x400482d0 VF610_DDR_PAD_CTRL
> +wm 32 0x400482d4 VF610_DDR_PAD_CTRL
> +wm 32 0x400482d8 VF610_DDR_PAD_CTRL
> +wm 32 0x4004821c VF610_DDR_PAD_CTRL
> +
> +/* ======================= DDR Controller =======================*/
> +
> +CHECKPOINT(5)
> +
> +wm 32 0x400ae000 0x00000600
> +wm 32 0x400ae008 0x00000020
> +wm 32 0x400ae028 0x00013880
> +wm 32 0x400ae02c 0x00030d40
> +wm 32 0x400ae030 0x0000050c
> +wm 32 0x400ae034 0x15040400
> +wm 32 0x400ae038 0x1406040f
> +wm 32 0x400ae040 0x04040000
> +wm 32 0x400ae044 0x006db00c
> +wm 32 0x400ae048 0x00000403
> +wm 32 0x400ae050 0x01000000
> +wm 32 0x400ae054 0x00060001
> +wm 32 0x400ae058 0x000c0000
> +wm 32 0x400ae05c 0x03000200
> +wm 32 0x400ae060 0x00000006
> +wm 32 0x400ae064 0x00010000
> +wm 32 0x400ae068 0x0c30002c
> +wm 32 0x400ae070 0x00000000
> +wm 32 0x400ae074 0x00000003
> +wm 32 0x400ae078 0x0000000a
> +wm 32 0x400ae07c 0x003001d4
> +wm 32 0x400ae084 0x00010000
> +wm 32 0x400ae088 0x00050500
> +wm 32 0x400ae098 0x00000000
> +wm 32 0x400ae09c 0x04001002
> +wm 32 0x400ae0a4 0x00000001
> +wm 32 0x400ae0c0 0x00460420
> +wm 32 0x400ae108 0x01000200
> +wm 32 0x400ae10c 0x00000040
> +wm 32 0x400ae114 0x00000200
> +wm 32 0x400ae118 0x00000040
> +wm 32 0x400ae120 0x00000000
> +wm 32 0x400ae124 0x0a010300
> +wm 32 0x400ae128 0x01014040
> +wm 32 0x400ae12c 0x01010101
> +wm 32 0x400ae130 0x03030100
> +wm 32 0x400ae134 0x01000101
> +wm 32 0x400ae138 0x0700000c
> +wm 32 0x400ae13c 0x00000000
> +wm 32 0x400ae148 0x10000000
> +wm 32 0x400ae15c 0x01000000
> +wm 32 0x400ae160 0x00040000
> +wm 32 0x400ae164 0x00000002
> +wm 32 0x400ae16c 0x00020000
> +wm 32 0x400ae180 0x00002819
> +wm 32 0x400ae184 0x01000000
> +wm 32 0x400ae188 0x00000000
> +wm 32 0x400ae18c 0x00000000
> +wm 32 0x400ae198 0x00010100
> +wm 32 0x400ae1a4 0x00000000
> +wm 32 0x400ae1a8 0x00000004
> +wm 32 0x400ae1b8 0x00040000
> +wm 32 0x400ae1c8 0x00000000
> +wm 32 0x400ae1cc 0x00000000
> +wm 32 0x400ae1d4 0x00000000
> +wm 32 0x400ae1d8 0x01010000
> +wm 32 0x400ae1e0 0x02020000
> +wm 32 0x400ae1e4 0x00000202
> +wm 32 0x400ae1e8 0x01010064
> +wm 32 0x400ae1ec 0x00010101
> +wm 32 0x400ae1f0 0x00000064
> +wm 32 0x400ae1f8 0x00000800
> +wm 32 0x400ae210 0x00000506
> +wm 32 0x400ae224 0x00020000
> +wm 32 0x400ae228 0x01000000
> +wm 32 0x400ae22c 0x04070303
> +wm 32 0x400ae230 0x00000040
> +wm 32 0x400ae23c 0x06000080
> +wm 32 0x400ae240 0x04070303
> +wm 32 0x400ae244 0x00000040
> +wm 32 0x400ae248 0x00000040
> +wm 32 0x400ae24c 0x000f0000
> +wm 32 0x400ae250 0x000f0000
> +wm 32 0x400ae25c 0x00000101
> +wm 32 0x400ae268 0x682c4000
> +wm 32 0x400ae26c 0x00000012
> +wm 32 0x400ae278 0x00000006
> +wm 32 0x400ae284 0x00010202
> +
> +/* ======================= DDR PHY =======================*/
> +
> +CHECKPOINT(6)
> +
> +wm 32 0x400ae400 DDRMC_PHY_DQ_TIMING
> +wm 32 0x400ae440 DDRMC_PHY_DQ_TIMING
> +wm 32 0x400ae480 DDRMC_PHY_DQ_TIMING
> +wm 32 0x400ae404 DDRMC_PHY_DQS_TIMING
> +wm 32 0x400ae444 DDRMC_PHY_DQS_TIMING
> +wm 32 0x400ae408 DDRMC_PHY_CTRL
> +wm 32 0x400ae448 DDRMC_PHY_CTRL
> +wm 32 0x400ae488 DDRMC_PHY_CTRL
> +wm 32 0x400ae40c DDRMC_PHY_CTRL
> +wm 32 0x400ae44c DDRMC_PHY_CTRL
> +wm 32 0x400ae48c DDRMC_PHY_CTRL
> +wm 32 0x400ae410 DDRMC_PHY_SLAVE_CTRL
> +wm 32 0x400ae450 DDRMC_PHY_SLAVE_CTRL
> +wm 32 0x400ae490 DDRMC_PHY_SLAVE_CTRL
> +wm 32 0x400ae4c4 DDRMC_PHY_OFF
> +wm 32 0x400ae4c8 0x00001100
> +wm 32 0x400ae4d0 DDRMC_PHY_PROC_PAD_ODT
> +wm 32 0x400ae000 0x00000601
> +
> +CHECKPOINT(7)
> +
> +check 32 while_any_bit_clear 0x400ae140 0x100
> +
> +CHECKPOINT(8)
> +
> +/*
> + * Cargo cult DDR controller initialization here we come!
> + *
> + * Experemintation with VF610 Tower Board shows that without the

s/Experemintation/Experimentation/

> + * following code the board would not boot off of SD card when
> + * power-cycled. It will however happily boot when reset via SW3/Reset
> + * button. For whatever reason the following actions appear to be
> + * necessary:
> + *
> + *          - Initialize DDRMC as usual
> + *	    - Issue a read to location in DDR address space
> + *	    - Disable DDRMC
> + *	    - Enable DDRMC and wait for it to finish initializing
> + *
> + * I am sure this is all going to be extrememly embarrassing to read
> + * if/when the real problem and real solution is found.
> + */
> +
> +/*
> + * Because there's no standalone read command what we do here instead
> + * is write a pattern to memory and then checking that memory address
> + * against that pattern
> + */
> +wm 32 0x80000000 0xa5a5a5a5
> +check 32 while_any_bit_clear 0x80000000 0xa5a5a5a5
> +
> +wm 32 0x400ae000 0x00000600
> +wm 32 0x400ae000 0x00000601
> +
> +check 32 while_any_bit_clear 0x400ae140 0x100
> +
> +CHECKPOINT(9)
> \ No newline at end of file
> diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
> new file mode 100644
> index 0000000..6504273
> --- /dev/null
> +++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
> @@ -0,0 +1,45 @@
> +#include <common.h>
> +#include <linux/sizes.h>
> +#include <mach/generic.h>
> +#include <asm/barebox-arm-head.h>
> +#include <asm/barebox-arm.h>
> +#include <mach/vf610-regs.h>
> +#include <mach/clock-vf610.h>
> +#include <mach/iomux-vf610.h>
> +#include <debug_ll.h>
> +
> +static inline void setup_uart(void)
> +{
> +	void __iomem *iomuxbase = IOMEM(VF610_IOMUXC_BASE_ADDR);
> +
> +	vf610_ungate_all_peripherals();
> +
> +	/*
> +	 * VF610_PAD_PTB4__UART1_TX
> +	 */
> +	writel(VF610_UART_PAD_CTRL | (2 << 20), iomuxbase + 0x0068);
> +	writel(0, iomuxbase + 0x0380);
> +
> +	vf610_uart_setup_ll();
> +}
> +
> +extern char __dtb_vf610_twr_start[];
> +
> +ENTRY_FUNCTION(start_vf610_twr, r0, r1, r2)
> +{
> +	int i;
> +	void *fdt;
> +	void __iomem *mscm = IOMEM(VF610_MSCM_BASE_ADDR);
> +
> +	vf610_cpu_lowlevel_init();
> +
> +	for (i = 0; i < VF610_MSCM_IRSPRC_NUM; i++)
> +		writew(VF610_MSCM_IRSPRC_CP0_EN,
> +		       mscm + VF610_MSCM_IRSPRC(i));
> +
> +	if (IS_ENABLED(CONFIG_DEBUG_LL))
> +		setup_uart();
> +
> +	fdt = __dtb_vf610_twr_start - get_runtime_offset();
> +	barebox_arm_entry(0x80000000, SZ_128M, fdt);
> +}
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index d1a3fe8..f93152c 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -76,5 +76,6 @@ pbl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o
>  pbl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
>  pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
>  pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
> +pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
>  
>  clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
> diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
> new file mode 100644
> index 0000000..54b4435
> --- /dev/null
> +++ b/arch/arm/dts/vf610-twr.dts
> @@ -0,0 +1,14 @@
> +/*
> + * Copyright 2013 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include <arm/vf610-twr.dts>
> +
> +&usbdev0 {
> +	status = "disabled";
> +};
> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index 71862ef..0284a8f 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -332,6 +332,10 @@ config MACH_CM_FX6
>  	bool "CM FX6"
>  	select ARCH_IMX6
>  
> +config MACH_VF610_TWR
> +	bool "Freescale VF610 Tower Board"
> +	select ARCH_VF610
> +
>  endif
>  
>  # ----------------------------------------------------------
> diff --git a/arch/arm/mach-imx/include/mach/clock-vf610.h b/arch/arm/mach-imx/include/mach/clock-vf610.h

Should be added in a SoC specific patch.

> +#define CCM_CCR_FIRC_EN				(1 << 16)
> +#define CCM_CCR_OSCNT_MASK			0xff
> +#define CCM_CCR_OSCNT(v)			((v) & 0xff)
> +

[...]

> +#define ENET_EXTERNAL_CLK	50000000
> +#define AUDIO_EXTERNAL_CLK	24576000

VF610_ prefix?

> diff --git a/arch/arm/mach-imx/include/mach/iomux-vf610.h b/arch/arm/mach-imx/include/mach/iomux-vf610.h

Should also be added in a SoC specific patch.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:38:53 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:38:53 +0200
Subject: [PATCH 07/20] clk: Port of_clk_set_defautls()
In-Reply-To: <1475505657-898-8-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-8-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004063853.5p7xulewpbuuacxv@pengutronix.de>

On Mon, Oct 03, 2016 at 07:40:44AM -0700, Andrey Smirnov wrote:
> Port of_clk_set_defautls() from Linux kernel in order to support DT
> configurations that require it (e. g. Vybrid).

s/of_clk_set_defautls/of_clk_set_defaults/ here and in the subject.

> diff --git a/include/linux/clk/clk-conf.h b/include/linux/clk/clk-conf.h
> new file mode 100644
> index 0000000..2c0a39e
> --- /dev/null
> +++ b/include/linux/clk/clk-conf.h
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright (C) 2014 Samsung Electronics Co., Ltd.
> + * Sylwester Nawrocki <s.nawrocki at samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/types.h>
> +
> +struct device_node;
> +
> +#if defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK)
> +int of_clk_set_defaults(struct device_node *node, bool clk_supplier);
> +#else
> +static inline int of_clk_set_defaults(struct device_node *node,
> +				      bool clk_supplier)
> +{
> +	return 0;
> +}
> +#endif

We shouldn't need this static inline variant. The caller already exists for OF
enabled builds only.

Sascha

> -- 
> 2.5.5
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct  3 23:49:23 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:49:23 +0200
Subject: [PATCH 10/20] i.MX: clk: Port imx_check_clocks() and
 imx_obtain_fixed_clock()
In-Reply-To: <1475505657-898-11-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-11-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004064923.txvdncnm57xwor5h@pengutronix.de>

On Mon, Oct 03, 2016 at 07:40:47AM -0700, Andrey Smirnov wrote:
> Port imx_check_clocks() and imx_obtain_fixed_clock() from Linux kernel.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> ---
>  arch/arm/mach-imx/clk.h  |  4 ++++
>  drivers/clk/Makefile     |  1 +
>  drivers/clk/imx/Makefile |  1 +
>  drivers/clk/imx/clk.c    | 49 ++++++++++++++++++++++++++++++++++++++++++++++++
>  4 files changed, 55 insertions(+)
>  create mode 100644 drivers/clk/imx/Makefile
>  create mode 100644 drivers/clk/imx/clk.c
> 
> diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
> index 35e480f..f96e5d2 100644
> --- a/arch/arm/mach-imx/clk.h
> +++ b/arch/arm/mach-imx/clk.h
> @@ -109,4 +109,8 @@ static inline struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg,
>  struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
>  		void __iomem *reg, u8 shift, u32 exclusive_mask);
>  
> +void imx_check_clocks(struct clk *clks[], unsigned int count);
> +struct clk * __init imx_obtain_fixed_clock(const char *name, unsigned long rate);
> +
> +
>  #endif /* __IMX_CLK_H */
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index 0fe8f1e..6dc82ea 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -9,3 +9,4 @@ obj-$(CONFIG_ARCH_ROCKCHIP)	+= rockchip/
>  obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
>  obj-$(CONFIG_CLK_SOCFPGA)	+= socfpga.o
>  obj-$(CONFIG_MACH_MIPS_ATH79)	+= clk-ar933x.o
> +obj-$(CONFIG_COMMON_CLK)	+= imx/
> diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
> new file mode 100644
> index 0000000..0303c0b
> --- /dev/null
> +++ b/drivers/clk/imx/Makefile
> @@ -0,0 +1 @@
> +obj-y += clk.o
> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
> new file mode 100644
> index 0000000..0357048
> --- /dev/null
> +++ b/drivers/clk/imx/clk.c

We currently have the i.MX clock support in arch/arm/mach-imx/. This may
or may not be changed, but until it is, other i.MX clock support code
should go to arch/arm/mach-imx/ aswell.

> @@ -0,0 +1,49 @@
> +#include <common.h>
> +#include <init.h>
> +#include <driver.h>
> +#include <linux/clk.h>
> +#include <io.h>
> +#include <of.h>
> +#include <linux/clkdev.h>
> +#include <linux/err.h>
> +
> +#include "../../../arch/arm/mach-imx/clk.h"

#include <mach/clk.h>

> +
> +void __init imx_check_clocks(struct clk *clks[], unsigned int count)
> +{
> +	unsigned i;
> +
> +	for (i = 0; i < count; i++)
> +		if (IS_ERR(clks[i]))
> +			pr_err("i.MX clk %u: register failed with %ld\n",
> +			       i, PTR_ERR(clks[i]));
> +}
> +
> +static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
> +{
> +	struct of_phandle_args phandle;
> +	struct clk *clk = ERR_PTR(-ENODEV);
> +	char *path;
> +
> +	path = basprintf("/clocks/%s", name);
> +	if (!path)
> +		return ERR_PTR(-ENOMEM);
> +
> +	phandle.np = of_find_node_by_path(path);
> +	kfree(path);
> +
> +	if (phandle.np)
> +		clk = of_clk_get_from_provider(&phandle);
> +
> +	return clk;
> +}

Do we need this anyway? We already have clk providers for fixed-clock.
Hm, looking further, maybe a later patch explains.

Sascha

-- 
Pengutronix e.K.                           |                             |
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From s.hauer at pengutronix.de  Mon Oct  3 23:58:11 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 08:58:11 +0200
Subject: [PATCH 11/20] i.MX: Add VF610 clock tree initialization code
In-Reply-To: <1475505657-898-12-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-12-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004065811.vsvvya5csazebcfg@pengutronix.de>

On Mon, Oct 03, 2016 at 07:40:48AM -0700, Andrey Smirnov wrote:
> Based on analogous code from Linux kernel
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> ---
>  drivers/clk/imx/Makefile    |    1 +
>  drivers/clk/imx/clk-vf610.c | 1224 +++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 1225 insertions(+)
>  create mode 100644 drivers/clk/imx/clk-vf610.c
> 
> diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
> index 0303c0b..2665f49 100644
> --- a/drivers/clk/imx/Makefile
> +++ b/drivers/clk/imx/Makefile
> @@ -1 +1,2 @@
>  obj-y += clk.o
> +obj-$(CONFIG_ARCH_VF610) += clk-vf610.o
> +static struct clk *clk[VF610_CLK_END];
> +struct clk_onecell_data clk_data;
> +
> +static struct clk * __init vf610_get_fixed_clock(struct device_node *np,
> +						 const char *name)
> +{
> +	struct clk *clk = of_clk_get_by_name(np, name);
> +
> +	/* Backward compatibility if device tree is missing clks assignments */
> +	if (IS_ERR(clk))
> +		clk = imx_obtain_fixed_clock(name, 0);

Ah, that explains it. No, we don't need this since we are compiling the
device trees into barebox and can make sure they are compatible with our
code.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From u.kleine-koenig at pengutronix.de  Tue Oct  4 00:06:33 2016
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Tue,  4 Oct 2016 09:06:33 +0200
Subject: [PATCH] pinctrl: mvebu: armada-370 fix gpio name for mpp63
Message-ID: <20161004070633.19328-1-u.kleine-koenig@pengutronix.de>

It was found that pin 63 also works as input and so the respective function
is renamed from "gpo" to "gpio". The respective commit in Linux is:

	a526973e0291 ("pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)")

which appeared in v4.1-rc3. The devicetrees are fixed accordingly since
commit

	ce5cad51f381 ("ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370")

which appeared in v4.6-rc1.

This fixes a runtime warning on the affected machines
(globalscale-mirabox and netgear-rn104) and makes the pin functional
again.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 drivers/pinctrl/mvebu/armada-370.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/mvebu/armada-370.c b/drivers/pinctrl/mvebu/armada-370.c
index 1c79bd62af92..c2c1a0fa6399 100644
--- a/drivers/pinctrl/mvebu/armada-370.c
+++ b/drivers/pinctrl/mvebu/armada-370.c
@@ -362,7 +362,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x5, "audio", "mclk"),
 	   MPP_FUNCTION(0x6, "uart0", "cts")),
 	MPP_MODE(63, "mpp63", armada_370_mpp_ctrl,
-	   MPP_FUNCTION(0x0, "gpo", NULL),
+	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "sck"),
 	   MPP_FUNCTION(0x2, "tclk", NULL)),
 	MPP_MODE(64, "mpp64", armada_370_mpp_ctrl,
-- 
2.9.3



From s.hauer at pengutronix.de  Tue Oct  4 00:13:14 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 09:13:14 +0200
Subject: [PATCH 13/20] i.MX: Add 'lpuart' serial driver
In-Reply-To: <1475505657-898-14-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-14-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004071314.e7ptvxiqo33pdt6a@pengutronix.de>

On Mon, Oct 03, 2016 at 07:40:50AM -0700, Andrey Smirnov wrote:
> Add 'lpuart' serial driver, based on analogous driver from U-Boot
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> ---
>  drivers/serial/Kconfig         |   4 +
>  drivers/serial/Makefile        |   1 +
>  drivers/serial/serial_lpuart.c | 217 +++++++++++++++++++++++++++++++++++++++++
>  include/serial/lpuart.h        |  28 ++++--
>  4 files changed, 244 insertions(+), 6 deletions(-)
>  create mode 100644 drivers/serial/serial_lpuart.c
> 
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 146bf1e..02e869a 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -137,4 +137,8 @@ config DRIVER_SERIAL_DIGIC
>  	bool "Canon DIGIC serial driver"
>  	depends on ARCH_DIGIC
>  
> +config DRIVER_SERIAL_LPUART
> +	depends on ARCH_IMX
> +	bool "LPUART serial driver"
> +
>  endmenu
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 189e777..7d1bae1 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -20,3 +20,4 @@ obj-$(CONFIG_DRIVER_SERIAL_AUART)		+= serial_auart.o
>  obj-$(CONFIG_DRIVER_SERIAL_CADENCE)		+= serial_cadence.o
>  obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO)		+= efi-stdio.o
>  obj-$(CONFIG_DRIVER_SERIAL_DIGIC)		+= serial_digic.o
> +obj-$(CONFIG_DRIVER_SERIAL_LPUART)		+= serial_lpuart.o
> diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
> new file mode 100644
> index 0000000..52fb6d3
> --- /dev/null
> +++ b/drivers/serial/serial_lpuart.c
> @@ -0,0 +1,217 @@
> +/*
> + * Copyright (c) 2016 Zodiac Inflight Innovation
> + * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
> + *
> + * Based on analogous driver from U-Boot
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#include <common.h>
> +#include <driver.h>
> +#include <init.h>
> +#include <malloc.h>
> +#include <notifier.h>
> +#include <io.h>
> +#include <of.h>
> +#include <linux/err.h>
> +#include <linux/clk.h>
> +#include <serial/lpuart.h>
> +
> +struct lpuart {
> +	struct console_device cdev;
> +	int baudrate;
> +	int dte_mode;
> +	struct notifier_block notify;
> +	struct resource *io;
> +	void __iomem *base;
> +	struct clk *clk;
> +};
> +
> +static struct lpuart *cdev_to_lpuart(struct console_device *cdev)
> +{
> +	return container_of(cdev, struct lpuart, cdev);
> +}
> +
> +static struct lpuart *nb_to_lpuart(struct notifier_block *nb)
> +{
> +	return container_of(nb, struct lpuart, notify);
> +}
> +
> +static void lpuart_enable(struct lpuart *lpuart, bool on)
> +{
> +	u8 ctrl;
> +
> +	ctrl = readb(lpuart->base + UARTCR2);
> +	if (on)
> +		ctrl |= UARTCR2_TE | UARTCR2_RE;
> +	else
> +		ctrl &= ~(UARTCR2_TE | UARTCR2_RE);
> +	writeb(ctrl, lpuart->base + UARTCR2);
> +}
> +
> +static int lpuart_serial_setbaudrate(struct console_device *cdev,
> +				     int baudrate)
> +{
> +	struct lpuart *lpuart = cdev_to_lpuart(cdev);
> +
> +	lpuart_enable(lpuart, false);
> +
> +	lpuart_setbrg(lpuart->base,
> +		      clk_get_rate(lpuart->clk),
> +		      baudrate);
> +
> +	lpuart_enable(lpuart, true);
> +
> +	lpuart->baudrate = baudrate;
> +
> +	return 0;
> +}
> +
> +static int lpuart_serial_getc(struct console_device *cdev)
> +{
> +	bool ready;
> +	struct lpuart *lpuart = cdev_to_lpuart(cdev);
> +
> +	do {
> +		const u8 sr1 = readb(lpuart->base + UARTSR1);
> +		ready = !!(sr1 & (UARTSR1_OR | UARTSR1_RDRF));
> +	} while (!ready);
> +
> +	return readb(lpuart->base + UARTDR);
> +}
> +
> +static void lpuart_serial_putc(struct console_device *cdev, char c)
> +{
> +	lpuart_putc(cdev_to_lpuart(cdev)->base, c);
> +}
> +
> +/* Test whether a character is in the RX buffer */
> +static int lpuart_serial_tstc(struct console_device *cdev)
> +{
> +	return !!readb(cdev_to_lpuart(cdev)->base + UARTRCFIFO);
> +}
> +
> +static void lpuart_serial_flush(struct console_device *cdev)
> +{
> +	bool tx_empty;
> +	struct lpuart *lpuart = cdev_to_lpuart(cdev);
> +
> +	do {
> +		const u8 sr1 = readb(lpuart->base + UARTSR1);
> +		tx_empty = !!(sr1 & UARTSR1_TDRE);
> +	} while (!tx_empty);
> +}
> +
> +static int lpuart_clocksource_clock_change(struct notifier_block *nb,
> +					   unsigned long event, void *data)
> +{
> +	struct lpuart *lpuart = nb_to_lpuart(nb);
> +
> +	return lpuart_serial_setbaudrate(&lpuart->cdev, lpuart->baudrate);
> +}

This doesn't make sense in this form. I introduced this code in the i.MX
uart driver since I had the need to change PLL rates while the uart is
active. When this happens I had to adjust the dividers for the new uart
base clock. The code above doesn't react to base clock changes though,
it takes the old rate stored in lpuart->baudrate.

If you don't have to adjust PLL rates while the uart is active then I
suggest that you just remove this code.

> @@ -225,25 +225,35 @@ static inline void lpuart_setbrg(void __iomem *base,
>  				 unsigned int refclock,
>  				 unsigned int baudrate)
>  {
> +	unsigned int bfra;
>  	u16 sbr;
> +
>  	sbr = (u16) (refclock / (16 * baudrate));
>  
>  	writeb(sbr >> 8,   base + UARTBDH);
>  	writeb(sbr & 0xff, base + UARTBDL);
> +
> +	bfra  = DIV_ROUND_UP(2 * refclock, baudrate) - 32 * sbr;
> +	bfra &= UARTCR4_BRFA_MASK;
> +	writeb(bfra, base + UARTCR4);
>  }
>  
> -static inline void lpuart_setup(void __iomem *base,
> -				unsigned int refclock)
> +static inline void lpuart_setup_with_fifo(void __iomem *base,
> +					  unsigned int refclock,
> +					  unsigned int twfifo)
>  {
> -
>  	/* Disable UART */
>  	writeb(0, base + UARTCR2);
>  	writeb(0, base + UARTMODEM);
>  	writeb(0, base + UARTCR1);
>  
> -	/* Disable FIFOs */
> -	writeb(0, base + UARTPFIFO);
> -	writeb(0, base + UARTTWFIFO);
> +	if (twfifo) {
> +		writeb(UARTPFIFO_TXFE | UARTPFIFO_RXFE, base + UARTPFIFO);
> +		writeb((u8)twfifo, base + UARTTWFIFO);
> +	} else {
> +		writeb(0, base + UARTPFIFO);
> +		writeb(0, base + UARTTWFIFO);
> +	}
>  	writeb(1, base + UARTRWFIFO);
>  	writeb(UARTCFIFO_RXFLUSH | UARTCFIFO_TXFLUSH, base + UARTCFIFO);
>  
> @@ -252,6 +262,12 @@ static inline void lpuart_setup(void __iomem *base,
>  	writeb(UARTCR2_TE | UARTCR2_RE, base + UARTCR2);
>  }
>  
> +static inline void lpuart_setup(void __iomem *base,
> +				unsigned int refclock)
> +{
> +	lpuart_setup_with_fifo(base, refclock, 0x00);
> +}
> +
>  static inline void lpuart_putc(void __iomem *base, int c)
>  {
>  	if (!(readb(base + UARTCR2) & UARTCR2_TE))

This was introduced earlier with this series. No need to change it, just
create it correctly in the first place.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct  4 00:20:41 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 09:20:41 +0200
Subject: [PATCH 14/20] i.MX: i2c-imx: Add Vybrid support
In-Reply-To: <1475505657-898-15-git-send-email-andrew.smirnov@gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-15-git-send-email-andrew.smirnov@gmail.com>
Message-ID: <20161004072041.mfou7hpp3uoihqys@pengutronix.de>

On Mon, Oct 03, 2016 at 07:40:51AM -0700, Andrey Smirnov wrote:
> Vybrid flavour of the I2C controller requires some additional quirks on
> part of the driver. This commit ports those quirks code from analogous
> Linux kernel driver.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> ---
>  drivers/i2c/busses/i2c-imx.c | 215 ++++++++++++++++++++++++++++++++-----------
>  1 file changed, 160 insertions(+), 55 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
> index e407896..dbc76c2 100644
> --- a/drivers/i2c/busses/i2c-imx.c
> +++ b/drivers/i2c/busses/i2c-imx.c
> @@ -43,6 +43,7 @@
> +static inline void fsl_i2c_write_reg(unsigned int val,
> +				     struct fsl_i2c_struct *i2c_fsl,
> +				     unsigned int reg)
> +{
> +	writeb(val, i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
> +}
> +
> +static inline unsigned char fsl_i2c_read_reg(struct fsl_i2c_struct *i2c_fsl,
> +					     unsigned int reg)
> +{
> +	return readb(i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
> +}

Can we have the introduction of the read/write accessor functions as a
separate patch (with regshift hardcoded to 0)? This would make reviewing
the rest easier.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct  4 00:29:37 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 09:29:37 +0200
Subject: [PATCH] pinctrl: mvebu: armada-370 fix gpio name for mpp63
In-Reply-To: <20161004070633.19328-1-u.kleine-koenig@pengutronix.de>
References: <20161004070633.19328-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161004072937.mwm4mfzx4p7ow4vw@pengutronix.de>

On Tue, Oct 04, 2016 at 09:06:33AM +0200, Uwe Kleine-K?nig wrote:
> It was found that pin 63 also works as input and so the respective function
> is renamed from "gpo" to "gpio". The respective commit in Linux is:
> 
> 	a526973e0291 ("pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)")
> 
> which appeared in v4.1-rc3. The devicetrees are fixed accordingly since
> commit
> 
> 	ce5cad51f381 ("ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370")
> 
> which appeared in v4.6-rc1.
> 
> This fixes a runtime warning on the affected machines
> (globalscale-mirabox and netgear-rn104) and makes the pin functional
> again.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
>  drivers/pinctrl/mvebu/armada-370.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From ejo at pengutronix.de  Tue Oct  4 03:10:43 2016
From: ejo at pengutronix.de (Enrico Jorns)
Date: Tue,  4 Oct 2016 12:10:43 +0200
Subject: [PATCH 0/5] Extend squashfs support
Message-ID: <20161004101048.12970-1-ejo@pengutronix.de>

This adds missing compression methods: lz4, lzo, zlib

It also creates missing links in driver and detection code in order to allow
using squashfs with those nice barebox autodetection features and especially
for bootspec booting.

The appendroot mechanism currently (only) supports booting form an ubi volume.

Enrico Jorns (5):
  fs: squashfs: port lzo compression support from kernel
  fs: squashfs: port lz4 compression support from kernel
  fs: squashfs: port zlib compression support from kernel
  Add filetype and detection for squashfs images
  fs: squashfs: append linux rootarg for ubi volume

 common/filetype.c          |   4 ++
 fs/squashfs/Kconfig        |  45 +++++++++++++++
 fs/squashfs/Makefile       |   3 +
 fs/squashfs/lz4_wrapper.c  | 140 +++++++++++++++++++++++++++++++++++++++++++++
 fs/squashfs/lzo_wrapper.c  | 128 +++++++++++++++++++++++++++++++++++++++++
 fs/squashfs/squashfs.c     |  32 +++++++++++
 fs/squashfs/zlib_wrapper.c | 132 ++++++++++++++++++++++++++++++++++++++++++
 include/filetype.h         |   1 +
 include/linux/lzo.h        |  47 +++++++++++++++
 9 files changed, 532 insertions(+)
 create mode 100644 fs/squashfs/lz4_wrapper.c
 create mode 100644 fs/squashfs/lzo_wrapper.c
 create mode 100644 fs/squashfs/zlib_wrapper.c
 create mode 100644 include/linux/lzo.h

-- 
2.9.3



From ejo at pengutronix.de  Tue Oct  4 03:10:44 2016
From: ejo at pengutronix.de (Enrico Jorns)
Date: Tue,  4 Oct 2016 12:10:44 +0200
Subject: [PATCH 1/5] fs: squashfs: port lzo compression support from kernel
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
Message-ID: <20161004101048.12970-2-ejo@pengutronix.de>

This ports lzo_wrapper from kernel code and adds some minimal adaptions
to make squashfs lzo compression work in barebox.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
---
 fs/squashfs/Kconfig       |  14 +++++
 fs/squashfs/Makefile      |   1 +
 fs/squashfs/lzo_wrapper.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++
 include/linux/lzo.h       |  47 +++++++++++++++++
 4 files changed, 190 insertions(+)
 create mode 100644 fs/squashfs/lzo_wrapper.c
 create mode 100644 include/linux/lzo.h

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index dc25d93..d8ee554 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,20 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_LZO
+	bool "Include support for LZO compressed file systems"
+	default y
+	depends on FS_SQUASHFS
+	select LZO_DECOMPRESS
+	help
+	  Saying Y here includes support for reading Squashfs file systems
+	  compressed with LZO compression.  LZO compression is mainly
+	  aimed at embedded systems with slower CPUs where the overheads
+	  of zlib are too high.
+
+	  LZO is not the standard compression used in Squashfs and so most
+	  file systems will be readable without selecting this option.
+
 config SQUASHFS_XZ
 	bool "Include support for XZ compressed file systems"
 	default y
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index c0d024c..447e15e 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -11,3 +11,4 @@ obj-y	+= inode.o
 obj-y	+= namei.o
 obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
+obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c
new file mode 100644
index 0000000..b457955
--- /dev/null
+++ b/fs/squashfs/lzo_wrapper.c
@@ -0,0 +1,128 @@
+/*
+ * Squashfs - a compressed read only filesystem for Linux
+ *
+ * Copyright (c) 2010 LG Electronics
+ * Chan Jeong <chan.jeong at lge.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * lzo_wrapper.c
+ */
+
+#include <linux/mutex.h>
+#include <linux/lzo.h>
+#include <types.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+struct squashfs_lzo {
+	void	*input;
+	void	*output;
+};
+
+static void *lzo_init(struct squashfs_sb_info *msblk, void *buff)
+{
+	int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
+
+	struct squashfs_lzo *stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->input = vmalloc(block_size);
+	if (stream->input == NULL)
+		goto failed;
+	stream->output = vmalloc(block_size);
+	if (stream->output == NULL)
+		goto failed2;
+
+	return stream;
+
+failed2:
+	vfree(stream->input);
+failed:
+	ERROR("Failed to allocate lzo workspace\n");
+	kfree(stream);
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void lzo_free(void *strm)
+{
+	struct squashfs_lzo *stream = strm;
+
+	if (stream) {
+		vfree(stream->input);
+		vfree(stream->output);
+	}
+	kfree(stream);
+}
+
+
+static int lzo_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	struct squashfs_lzo *stream = strm;
+	void *buff = stream->input, *data;
+	int avail, i, bytes = length, res;
+	size_t out_len = output->length;
+
+	for (i = 0; i < b; i++) {
+		avail = min(bytes, msblk->devblksize - offset);
+		memcpy(buff, bh[i] + offset, avail);
+		buff += avail;
+		bytes -= avail;
+		offset = 0;
+		kfree(bh[i]);
+	}
+
+	res = lzo1x_decompress_safe(stream->input, (size_t)length,
+					stream->output, &out_len);
+	if (res != LZO_E_OK)
+		goto failed;
+
+	res = bytes = (int)out_len;
+	data = squashfs_first_page(output);
+	buff = stream->output;
+	while (data) {
+		if (bytes <= PAGE_CACHE_SIZE) {
+			memcpy(data, buff, bytes);
+			break;
+		} else {
+			memcpy(data, buff, PAGE_CACHE_SIZE);
+			buff += PAGE_CACHE_SIZE;
+			bytes -= PAGE_CACHE_SIZE;
+			data = squashfs_next_page(output);
+		}
+	}
+	squashfs_finish_page(output);
+
+	return res;
+
+failed:
+	return -EIO;
+}
+
+const struct squashfs_decompressor squashfs_lzo_comp_ops = {
+	.init = lzo_init,
+	.free = lzo_free,
+	.decompress = lzo_uncompress,
+	.id = LZO_COMPRESSION,
+	.name = "lzo",
+	.supported = 1
+};
diff --git a/include/linux/lzo.h b/include/linux/lzo.h
new file mode 100644
index 0000000..ae52d79
--- /dev/null
+++ b/include/linux/lzo.h
@@ -0,0 +1,47 @@
+#ifndef __LZO_H__
+#define __LZO_H__
+/*
+ *  LZO Public Kernel Interface
+ *  A mini subset of the LZO real-time data compression library
+ *
+ *  Copyright (C) 1996-2012 Markus F.X.J. Oberhumer <markus at oberhumer.com>
+ *
+ *  The full LZO package can be found at:
+ *  http://www.oberhumer.com/opensource/lzo/
+ *
+ *  Changed for Linux kernel use by:
+ *  Nitin Gupta <nitingupta910 at gmail.com>
+ *  Richard Purdie <rpurdie at openedhand.com>
+ */
+
+#include <types.h>
+
+#define LZO1X_1_MEM_COMPRESS	(8192 * sizeof(unsigned short))
+#define LZO1X_MEM_COMPRESS	LZO1X_1_MEM_COMPRESS
+
+#define lzo1x_worst_compress(x) ((x) + ((x) / 16) + 64 + 3)
+
+/* This requires 'wrkmem' of size LZO1X_1_MEM_COMPRESS */
+int lzo1x_1_compress(const unsigned char *src, size_t src_len,
+		     unsigned char *dst, size_t *dst_len, void *wrkmem);
+
+/* safe decompression with overrun testing */
+int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
+			  unsigned char *dst, size_t *dst_len);
+
+/*
+ * Return values (< 0 = Error)
+ */
+#define LZO_E_OK			0
+#define LZO_E_ERROR			(-1)
+#define LZO_E_OUT_OF_MEMORY		(-2)
+#define LZO_E_NOT_COMPRESSIBLE		(-3)
+#define LZO_E_INPUT_OVERRUN		(-4)
+#define LZO_E_OUTPUT_OVERRUN		(-5)
+#define LZO_E_LOOKBEHIND_OVERRUN	(-6)
+#define LZO_E_EOF_NOT_FOUND		(-7)
+#define LZO_E_INPUT_NOT_CONSUMED	(-8)
+#define LZO_E_NOT_YET_IMPLEMENTED	(-9)
+#define LZO_E_INVALID_ARGUMENT		(-10)
+
+#endif
-- 
2.9.3



From ejo at pengutronix.de  Tue Oct  4 03:10:47 2016
From: ejo at pengutronix.de (Enrico Jorns)
Date: Tue,  4 Oct 2016 12:10:47 +0200
Subject: [PATCH 4/5] Add filetype and detection for squashfs images
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
Message-ID: <20161004101048.12970-5-ejo@pengutronix.de>

This adds `filetype_squashfs` to the list of known filetypes and adds a
detection for squashfs files to file_detect_type(). This currently
matches on the `hsqs` start sequence of an image file.

Additionally, the newly introduced filetype is registered as the type of
the squashfs_driver which allows, for example, to mount squashfs without
the need to specify a type parameter.

This changes enable booting a squashfs with the simple `boot` command
pointing to the location (device) that holds the squashfs.

Note that booting with blspec is limited as the current squashfs driver
is not capable of handling symbolic links.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
---
 common/filetype.c      | 4 ++++
 fs/squashfs/squashfs.c | 1 +
 include/filetype.h     | 1 +
 3 files changed, 6 insertions(+)

diff --git a/common/filetype.c b/common/filetype.c
index 4728f87..8d72933 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -40,6 +40,7 @@ static const struct filetype_str filetype_str[] = {
 	[filetype_uimage] = { "U-Boot uImage", "u-boot" },
 	[filetype_ubi] = { "UBI image", "ubi" },
 	[filetype_jffs2] = { "JFFS2 image", "jffs2" },
+	[filetype_squashfs] = { "Squashfs image", "squashfs" },
 	[filetype_gzip] = { "GZIP compressed", "gzip" },
 	[filetype_bzip2] = { "BZIP2 compressed", "bzip2" },
 	[filetype_oftree] = { "open firmware Device Tree flattened Binary", "dtb" },
@@ -278,6 +279,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
 	if (buf8[0] == 0xfd && buf8[1] == 0x37 && buf8[2] == 0x7a &&
 			buf8[3] == 0x58 && buf8[4] == 0x5a && buf8[5] == 0x00)
 		return filetype_xz_compressed;
+	if (buf8[0] == 'h' && buf8[1] == 's' && buf8[2] == 'q' &&
+			buf8[3] == 's')
+		return filetype_squashfs;
 	if (buf[0] == be32_to_cpu(0xd00dfeed))
 		return filetype_oftree;
 	if (strncmp(buf8, "ANDROID!", 8) == 0)
diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
index d00dee6..6d04681 100644
--- a/fs/squashfs/squashfs.c
+++ b/fs/squashfs/squashfs.c
@@ -353,6 +353,7 @@ static struct fs_driver_d squashfs_driver = {
 	.readdir	= squashfs_readdir,
 	.closedir	= squashfs_closedir,
 	.stat		= squashfs_stat,
+	.type		= filetype_squashfs,
 	.drv = {
 		.probe = squashfs_probe,
 		.remove = squashfs_remove,
diff --git a/include/filetype.h b/include/filetype.h
index cde73c1..65bd6ef 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -16,6 +16,7 @@ enum filetype {
 	filetype_uimage,
 	filetype_ubi,
 	filetype_jffs2,
+	filetype_squashfs,
 	filetype_gzip,
 	filetype_bzip2,
 	filetype_oftree,
-- 
2.9.3



From ejo at pengutronix.de  Tue Oct  4 03:10:46 2016
From: ejo at pengutronix.de (Enrico Jorns)
Date: Tue,  4 Oct 2016 12:10:46 +0200
Subject: [PATCH 3/5] fs: squashfs: port zlib compression support from kernel
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
Message-ID: <20161004101048.12970-4-ejo@pengutronix.de>

As this is the default compression method for squashfs, make this the
default in kconfig selection, too

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
---
 fs/squashfs/Kconfig        |  20 ++++++-
 fs/squashfs/Makefile       |   1 +
 fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 152 insertions(+), 1 deletion(-)
 create mode 100644 fs/squashfs/zlib_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index d2de168..1cb1ac5 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_ZLIB
+	bool "Include support for ZLIB compressed file systems"
+	depends on FS_SQUASHFS
+	select ZLIB
+	default y
+	help
+	  ZLIB compression is the standard compression used by Squashfs
+	  file systems.  It offers a good trade-off between compression
+	  achieved and the amount of CPU time and memory necessary to
+	  compress and decompress.
+
+	  If unsure, say Y.
+
 config SQUASHFS_LZ4
 	bool "Include support for LZ4 compressed file systems"
 	depends on FS_SQUASHFS
@@ -30,9 +43,10 @@ config SQUASHFS_LZ4
 	  LZ4 is not the standard compression used in Squashfs and so most
 	  file systems will be readable without selecting this option.
 
+	  If unsure, say N.
+
 config SQUASHFS_LZO
 	bool "Include support for LZO compressed file systems"
-	default y
 	depends on FS_SQUASHFS
 	select LZO_DECOMPRESS
 	help
@@ -44,6 +58,8 @@ config SQUASHFS_LZO
 	  LZO is not the standard compression used in Squashfs and so most
 	  file systems will be readable without selecting this option.
 
+	  If unsure, say N.
+
 config SQUASHFS_XZ
 	bool "Include support for XZ compressed file systems"
 	default y
@@ -57,3 +73,5 @@ config SQUASHFS_XZ
 
 	  XZ is not the standard compression used in Squashfs and so most
 	  file systems will be readable without selecting this option.
+
+	  If unsure, say N.
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 8590b09..7976e3f 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -13,3 +13,4 @@ obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
+obj-$(CONFIG_SQUASHFS_ZLIB) += zlib_wrapper.o
diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c
new file mode 100644
index 0000000..f422515
--- /dev/null
+++ b/fs/squashfs/zlib_wrapper.c
@@ -0,0 +1,132 @@
+/*
+ * Squashfs - a compressed read only filesystem for Linux
+ *
+ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ * Phillip Lougher <phillip at squashfs.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * zlib_wrapper.c
+ */
+
+
+#include <linux/mutex.h>
+#include <linux/zlib.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+static void *zlib_init(struct squashfs_sb_info *dummy, void *buff)
+{
+	z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->workspace = vmalloc(zlib_inflate_workspacesize());
+	if (stream->workspace == NULL)
+		goto failed;
+
+	return stream;
+
+failed:
+	ERROR("Failed to allocate zlib workspace\n");
+	kfree(stream);
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void zlib_free(void *strm)
+{
+	z_stream *stream = strm;
+
+	if (stream)
+		vfree(stream->workspace);
+	kfree(stream);
+}
+
+
+static int zlib_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	int zlib_err, zlib_init = 0, k = 0;
+	z_stream *stream = strm;
+
+	stream->avail_out = PAGE_CACHE_SIZE;
+	stream->next_out = squashfs_first_page(output);
+	stream->avail_in = 0;
+
+	do {
+		if (stream->avail_in == 0 && k < b) {
+			int avail = min(length, msblk->devblksize - offset);
+			length -= avail;
+			stream->next_in = bh[k] + offset;
+			stream->avail_in = avail;
+			offset = 0;
+		}
+
+		if (stream->avail_out == 0) {
+			stream->next_out = squashfs_next_page(output);
+			if (stream->next_out != NULL)
+				stream->avail_out = PAGE_CACHE_SIZE;
+		}
+
+		if (!zlib_init) {
+			zlib_err = zlib_inflateInit(stream);
+			if (zlib_err != Z_OK) {
+				squashfs_finish_page(output);
+				goto out;
+			}
+			zlib_init = 1;
+		}
+
+		zlib_err = zlib_inflate(stream, Z_SYNC_FLUSH);
+
+		if (stream->avail_in == 0 && k < b)
+			kfree(bh[k++]);
+	} while (zlib_err == Z_OK);
+
+	squashfs_finish_page(output);
+
+	if (zlib_err != Z_STREAM_END)
+		goto out;
+
+	zlib_err = zlib_inflateEnd(stream);
+	if (zlib_err != Z_OK)
+		goto out;
+
+	if (k < b)
+		goto out;
+
+	return stream->total_out;
+
+out:
+	for (; k < b; k++)
+		kfree(bh[k]);
+
+	return -EIO;
+}
+
+const struct squashfs_decompressor squashfs_zlib_comp_ops = {
+	.init = zlib_init,
+	.free = zlib_free,
+	.decompress = zlib_uncompress,
+	.id = ZLIB_COMPRESSION,
+	.name = "zlib",
+	.supported = 1
+};
+
-- 
2.9.3



From ejo at pengutronix.de  Tue Oct  4 03:10:48 2016
From: ejo at pengutronix.de (Enrico Jorns)
Date: Tue,  4 Oct 2016 12:10:48 +0200
Subject: [PATCH 5/5] fs: squashfs: append linux rootarg for ubi volume
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
Message-ID: <20161004101048.12970-6-ejo@pengutronix.de>

If squashfs runs from an ubi volume, append appropriate root kernel
options.

Note that ubiblock support is required in the kernel for that.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
---
 fs/squashfs/squashfs.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
index 6d04681..c4d0bac 100644
--- a/fs/squashfs/squashfs.c
+++ b/fs/squashfs/squashfs.c
@@ -9,12 +9,16 @@
 #include <linux/fs.h>
 #include <linux/stat.h>
 #include <linux/pagemap.h>
+#include <linux/mtd/ubi.h>
+#include <linux/mtd/mtd.h>
 
 #include "squashfs_fs.h"
 #include "squashfs_fs_sb.h"
 #include "squashfs_fs_i.h"
 #include "squashfs.h"
 
+struct ubi_volume_desc;
+
 char *squashfs_devread(struct squashfs_sb_info *fs, int byte_offset,
 		int byte_len)
 {
@@ -108,6 +112,31 @@ static struct inode *squashfs_findfile(struct super_block *sb,
 	return NULL;
 }
 
+void squashfs_set_rootarg(struct squashfs_priv *priv, struct fs_device_d *fsdev)
+{
+	struct ubi_volume_desc *ubi_vol;
+	struct ubi_volume_info vi = {};
+	struct ubi_device_info di = {};
+	struct mtd_info *mtd;
+	char *str;
+
+	ubi_vol = ubi_open_volume_cdev(fsdev->cdev, UBI_READONLY);
+
+	if (IS_ERR(ubi_vol))
+		return;
+
+	ubi_get_volume_info(ubi_vol, &vi);
+	ubi_get_device_info(vi.ubi_num, &di);
+	mtd = di.mtd;
+
+	str = basprintf("root=/dev/ubiblock%d_%d ubi.mtd=%s ubi.block=%d,%d rootfstype=squashfs",
+			vi.ubi_num, vi.vol_id, mtd->cdev.partname, vi.ubi_num, vi.vol_id);
+
+	fsdev_set_linux_rootarg(fsdev, str);
+
+	free(str);
+}
+
 static int squashfs_probe(struct device_d *dev)
 {
 	struct fs_device_d *fsdev;
@@ -130,6 +159,8 @@ static int squashfs_probe(struct device_d *dev)
 		goto err_out;
 	}
 
+	squashfs_set_rootarg(priv, fsdev);
+
 	return 0;
 
 err_out:
-- 
2.9.3



From ejo at pengutronix.de  Tue Oct  4 03:10:45 2016
From: ejo at pengutronix.de (Enrico Jorns)
Date: Tue,  4 Oct 2016 12:10:45 +0200
Subject: [PATCH 2/5] fs: squashfs: port lz4 compression support from kernel
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
Message-ID: <20161004101048.12970-3-ejo@pengutronix.de>

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
---
 fs/squashfs/Kconfig       |  13 +++++
 fs/squashfs/Makefile      |   1 +
 fs/squashfs/lz4_wrapper.c | 140 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 154 insertions(+)
 create mode 100644 fs/squashfs/lz4_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index d8ee554..d2de168 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_LZ4
+	bool "Include support for LZ4 compressed file systems"
+	depends on FS_SQUASHFS
+	select LZ4_DECOMPRESS
+	help
+	  Saying Y here includes support for reading Squashfs file systems
+	  compressed with LZ4 compression.  LZ4 compression is mainly
+	  aimed at embedded systems with slower CPUs where the overheads
+	  of zlib are too high.
+
+	  LZ4 is not the standard compression used in Squashfs and so most
+	  file systems will be readable without selecting this option.
+
 config SQUASHFS_LZO
 	bool "Include support for LZO compressed file systems"
 	default y
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 447e15e..8590b09 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -12,3 +12,4 @@ obj-y	+= namei.o
 obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
+obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
diff --git a/fs/squashfs/lz4_wrapper.c b/fs/squashfs/lz4_wrapper.c
new file mode 100644
index 0000000..6ca6a32
--- /dev/null
+++ b/fs/squashfs/lz4_wrapper.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2013, 2014
+ * Phillip Lougher <phillip at squashfs.org.uk>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <types.h>
+#include <linux/mutex.h>
+#include <linux/lz4.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+#define LZ4_LEGACY	1
+
+struct lz4_comp_opts {
+	__le32 version;
+	__le32 flags;
+};
+
+struct squashfs_lz4 {
+	void *input;
+	void *output;
+};
+
+
+static void *lz4_comp_opts(struct squashfs_sb_info *msblk,
+	void *buff, int len)
+{
+	struct lz4_comp_opts *comp_opts = buff;
+
+	/* LZ4 compressed filesystems always have compression options */
+	if (comp_opts == NULL || len < sizeof(*comp_opts))
+		return ERR_PTR(-EIO);
+
+	if (le32_to_cpu(comp_opts->version) != LZ4_LEGACY) {
+		/* LZ4 format currently used by the kernel is the 'legacy'
+		 * format */
+		ERROR("Unknown LZ4 version\n");
+		return ERR_PTR(-EINVAL);
+	}
+
+	return NULL;
+}
+
+
+static void *lz4_init(struct squashfs_sb_info *msblk, void *buff)
+{
+	int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
+	struct squashfs_lz4 *stream;
+
+	stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->input = vmalloc(block_size);
+	if (stream->input == NULL)
+		goto failed2;
+	stream->output = vmalloc(block_size);
+	if (stream->output == NULL)
+		goto failed3;
+
+	return stream;
+
+failed3:
+	vfree(stream->input);
+failed2:
+	kfree(stream);
+failed:
+	ERROR("Failed to initialise LZ4 decompressor\n");
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void lz4_free(void *strm)
+{
+	struct squashfs_lz4 *stream = strm;
+
+	if (stream) {
+		vfree(stream->input);
+		vfree(stream->output);
+	}
+	kfree(stream);
+}
+
+
+static int lz4_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	struct squashfs_lz4 *stream = strm;
+	void *buff = stream->input, *data;
+	int avail, i, bytes = length, res;
+	size_t dest_len = output->length;
+
+	for (i = 0; i < b; i++) {
+		avail = min(bytes, msblk->devblksize - offset);
+		memcpy(buff, bh[i] + offset, avail);
+		buff += avail;
+		bytes -= avail;
+		offset = 0;
+		kfree(bh[i]);
+	}
+
+	res = lz4_decompress_unknownoutputsize(stream->input, length,
+					stream->output, &dest_len);
+	if (res)
+		return -EIO;
+
+	bytes = dest_len;
+	data = squashfs_first_page(output);
+	buff = stream->output;
+	while (data) {
+		if (bytes <= PAGE_CACHE_SIZE) {
+			memcpy(data, buff, bytes);
+			break;
+		}
+		memcpy(data, buff, PAGE_CACHE_SIZE);
+		buff += PAGE_CACHE_SIZE;
+		bytes -= PAGE_CACHE_SIZE;
+		data = squashfs_next_page(output);
+	}
+	squashfs_finish_page(output);
+
+	return dest_len;
+}
+
+const struct squashfs_decompressor squashfs_lz4_comp_ops = {
+	.init = lz4_init,
+	.comp_opts = lz4_comp_opts,
+	.free = lz4_free,
+	.decompress = lz4_uncompress,
+	.id = LZ4_COMPRESSION,
+	.name = "lz4",
+	.supported = 1
+};
-- 
2.9.3



From andrew.smirnov at gmail.com  Tue Oct  4 06:27:15 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Tue, 4 Oct 2016 06:27:15 -0700
Subject: [PATCH 02/20] i.MX: Add DEBUG_LL hooks for VF610
In-Reply-To: <20161004062420.uie22nvogkeqyndz@pengutronix.de>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-3-git-send-email-andrew.smirnov@gmail.com>
 <20161004062420.uie22nvogkeqyndz@pengutronix.de>
Message-ID: <CAHQ1cqGgfAoVYRe6eknkzfTBXfJs=bMMome5fMU57eGsSmzypw@mail.gmail.com>

On Mon, Oct 3, 2016 at 11:24 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:39AM -0700, Andrey Smirnov wrote:
>> Add code to support DEBUG_LL functionality on VF610/Vybrid platform.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
>> ---
>>  arch/arm/mach-imx/include/mach/debug_ll.h   |  27 ++-
>>  arch/arm/mach-imx/include/mach/vf610-regs.h | 126 +++++++++++++
>>  common/Kconfig                              |  10 +-
>>  include/serial/lpuart.h                     | 265 ++++++++++++++++++++++++++++
>>  4 files changed, 426 insertions(+), 2 deletions(-)
>>  create mode 100644 arch/arm/mach-imx/include/mach/vf610-regs.h
>>  create mode 100644 include/serial/lpuart.h
>>
>> diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h b/arch/arm/mach-imx/include/mach/debug_ll.h
>> index 5c2db6c..a132f3c 100644
>> --- a/arch/arm/mach-imx/include/mach/debug_ll.h
>> +++ b/arch/arm/mach-imx/include/mach/debug_ll.h
>> @@ -14,8 +14,10 @@
>>  #include <mach/imx51-regs.h>
>>  #include <mach/imx53-regs.h>
>>  #include <mach/imx6-regs.h>
>> +#include <mach/vf610-regs.h>
>>
>>  #include <serial/imx-uart.h>
>> +#include <serial/lpuart.h>
>>
>>  #ifdef CONFIG_DEBUG_LL
>>
>> @@ -42,6 +44,8 @@
>>  #define IMX_DEBUG_SOC MX53
>>  #elif defined CONFIG_DEBUG_IMX6Q_UART
>>  #define IMX_DEBUG_SOC MX6
>> +#elif defined CONFIG_DEBUG_VF610_UART
>> +#define IMX_DEBUG_SOC VF610
>>  #else
>>  #error "unknown i.MX debug uart soc type"
>>  #endif
>> @@ -74,6 +78,13 @@ static inline void imx6_uart_setup_ll(void)
>>       imx6_uart_setup(base);
>>  }
>>
>> +static inline void vf610_uart_setup_ll(void)
>> +{
>> +     void *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, CONFIG_DEBUG_IMX_UART_PORT));
>> +
>> +     lpuart_setup(base, 66000000);
>> +}
>> +
>>  static inline void PUTC_LL(int c)
>>  {
>>       void __iomem *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC,
>> @@ -82,14 +93,19 @@ static inline void PUTC_LL(int c)
>>       if (!base)
>>               return;
>>
>> -     imx_uart_putc(base, c);
>> +     if (IS_ENABLED(CONFIG_DEBUG_VF610_UART))
>> +             lpuart_putc(base, c);
>> +     else
>> +             imx_uart_putc(base, c);
>>  }
>> +
>>  #else
>>
>>  static inline void imx50_uart_setup_ll(void) {}
>>  static inline void imx51_uart_setup_ll(void) {}
>>  static inline void imx53_uart_setup_ll(void) {}
>>  static inline void imx6_uart_setup_ll(void)  {}
>> +static inline void vf610_uart_setup_ll(void) {}
>>
>>  #endif /* CONFIG_DEBUG_LL */
>>
>> @@ -115,4 +131,13 @@ static inline void imx53_ungate_all_peripherals(void)
>>       imx_ungate_all_peripherals(IOMEM(MX53_CCM_BASE_ADDR));
>>  }
>>
>> +static inline void vf610_ungate_all_peripherals(void)
>> +{
>> +     void __iomem *ccmbase = IOMEM(VF610_CCM_BASE_ADDR);
>> +     int i;
>> +
>> +     for (i = 0x40; i <= 0x6c; i += 4)
>> +             writel(0xffffffff, ccmbase + i);
>> +}
>> +
>>  #endif /* __MACH_DEBUG_LL_H__ */
>> diff --git a/arch/arm/mach-imx/include/mach/vf610-regs.h b/arch/arm/mach-imx/include/mach/vf610-regs.h
>
> This is probably not the right patch to add this file.

OK, unless you prefer something different, I'll split this file into a
separate patch in v2

>
>> new file mode 100644
>> index 0000000..a1c1a09
>> --- /dev/null
>> +++ b/arch/arm/mach-imx/include/mach/vf610-regs.h
>> @@ -0,0 +1,126 @@
>> +/*
>> + * Copyright 2013-2014 Freescale Semiconductor, Inc.
>> + *
>> + * SPDX-License-Identifier:  GPL-2.0+
>> + */
>> +
>> +#ifndef __ASM_ARCH_IMX_REGS_H__
>> +#define __ASM_ARCH_IMX_REGS_H__
>
> MACH_VF610_REGS_H ?

OK, will do in v2

>
>> +/* System Reset Controller (SRC) */
>> +#define SRC_SRSR_SW_RST                                      (0x1 << 18)
>> +#define SRC_SRSR_RESETB                                      (0x1 << 7)
>> +#define SRC_SRSR_JTAG_RST                            (0x1 << 5)
>> +#define SRC_SRSR_WDOG_M4                             (0x1 << 4)
>> +#define SRC_SRSR_WDOG_A5                             (0x1 << 3)
>> +#define SRC_SRSR_POR_RST                             (0x1 << 0)
>> +#define SRC_SBMR2_BMOD_MASK             (0x3 << 24)
>> +#define SRC_SBMR2_BMOD_SHIFT            24
>> +#define SRC_SBMR2_BMOD_FUSES            0x0
>> +#define SRC_SBMR2_BMOD_SERIAL           0x1
>> +#define SRC_SBMR2_BMOD_RCON             0x2
>
> Please add a VF610_ prefix.

I have a suspicion that I am not using those definitions anywhere, so
I'll ether remove them or add said prefix in v2.

Thanks,
Andrey


From andrew.smirnov at gmail.com  Tue Oct  4 06:34:45 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Tue, 4 Oct 2016 06:34:45 -0700
Subject: [PATCH 04/20] i.MX: Add support for VF610 Tower board
In-Reply-To: <20161004063214.2rguzsvtq4aste5x@pengutronix.de>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-5-git-send-email-andrew.smirnov@gmail.com>
 <20161004063214.2rguzsvtq4aste5x@pengutronix.de>
Message-ID: <CAHQ1cqFpyRK7EGq112s8+jGf=km15EobPQ3yR3HPK38QdCsQCw@mail.gmail.com>

On Mon, Oct 3, 2016 at 11:32 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:41AM -0700, Andrey Smirnov wrote:
>> Add support for VF610 Tower board.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
>> ---
>>  arch/arm/boards/Makefile                           |   3 +-
>>  arch/arm/boards/freescale-vf610-twr/Makefile       |   4 +
>>  arch/arm/boards/freescale-vf610-twr/board.c        |  61 +++++
>>  .../flash-header-vf610-twr.imxcfg                  | 277 +++++++++++++++++++++
>>  arch/arm/boards/freescale-vf610-twr/lowlevel.c     |  45 ++++
>>  arch/arm/dts/Makefile                              |   1 +
>>  arch/arm/dts/vf610-twr.dts                         |  14 ++
>>  arch/arm/mach-imx/Kconfig                          |   4 +
>>  arch/arm/mach-imx/include/mach/clock-vf610.h       | 215 ++++++++++++++++
>>  arch/arm/mach-imx/include/mach/iomux-vf610.h       | 258 +++++++++++++++++++
>>  images/Makefile.imx                                |   5 +
>>  11 files changed, 886 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/arm/boards/freescale-vf610-twr/Makefile
>>  create mode 100644 arch/arm/boards/freescale-vf610-twr/board.c
>>  create mode 100644 arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
>>  create mode 100644 arch/arm/boards/freescale-vf610-twr/lowlevel.c
>>  create mode 100644 arch/arm/dts/vf610-twr.dts
>>  create mode 100644 arch/arm/mach-imx/include/mach/clock-vf610.h
>>  create mode 100644 arch/arm/mach-imx/include/mach/iomux-vf610.h
>>
>> diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
>> index 23a8dbd..c8bc565 100644
>> --- a/arch/arm/boards/Makefile
>> +++ b/arch/arm/boards/Makefile
>> @@ -10,7 +10,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK)            += at91sam9260ek/
>>  obj-$(CONFIG_MACH_AT91SAM9M10G45EK)          += at91sam9m10g45ek/
>>  obj-$(CONFIG_MACH_AT91SAM9M10IHD)            += at91sam9m10ihd/
>>  obj-$(CONFIG_MACH_AT91SAM9N12EK)             += at91sam9n12ek/
>> -obj-$(CONFIG_MACH_AT91SAM9X5EK)                      += at91sam9x5ek/
>> +nobj-$(CONFIG_MACH_AT91SAM9X5EK)                     += at91sam9x5ek/
>>  obj-$(CONFIG_MACH_BEAGLE)                    += beagle/
>>  obj-$(CONFIG_MACH_BEAGLEBONE)                        += beaglebone/
>>  obj-$(CONFIG_MACH_CANON_A1100)                       += canon-a1100/
>> @@ -138,3 +138,4 @@ obj-$(CONFIG_MACH_ZEDBOARD)                       += avnet-zedboard/
>>  obj-$(CONFIG_MACH_ZYLONITE)                  += zylonite/
>>  obj-$(CONFIG_MACH_VARISCITE_MX6)             += variscite-mx6/
>>  obj-$(CONFIG_MACH_QEMU_VIRT64)                       += qemu-virt64/
>> +obj-$(CONFIG_MACH_VF610_TWR)                 += freescale-vf610-twr/
>> diff --git a/arch/arm/boards/freescale-vf610-twr/Makefile b/arch/arm/boards/freescale-vf610-twr/Makefile
>> new file mode 100644
>> index 0000000..32a7da5
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/Makefile
>> @@ -0,0 +1,4 @@
>> +obj-y += board.o
>> +obj-y += flash-header-vf610-twr.dcd.o
>> +extra-y += flash-header-vf610-twr.dcd.S flash-header-vf610-twr.dcd
>> +lwl-y += lowlevel.o
>> diff --git a/arch/arm/boards/freescale-vf610-twr/board.c b/arch/arm/boards/freescale-vf610-twr/board.c
>> new file mode 100644
>> index 0000000..0879f74
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/board.c
>> @@ -0,0 +1,61 @@
>> +/*
>> + * Copyright (c) 2016 Zodiac Inflight Innovation
>> + * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2
>> + * as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +
>> +#include <config.h>
>> +#include <common.h>
>> +#include <dma.h>
>> +#include <driver.h>
>> +#include <init.h>
>> +#include <of.h>
>> +#include <malloc.h>
>> +#include <mci.h>
>> +#include <clock.h>
>> +#include <io.h>
>> +#include <linux/clk.h>
>> +#include <linux/err.h>
>> +
>> +/*
>> + * Make sure that esdhc1's clock divider is 1
>> + */
>> +static int vf610_twr_sdhc1_clock_init(void)
>> +{
>> +     int err;
>> +     struct clk *esdhc1_div, *esdhc1_div_parent;
>> +
>> +     if (!of_machine_is_compatible("fsl,vf610-twr"))
>> +             return 0;
>> +
>> +     esdhc1_div = clk_lookup("esdhc1_div");
>> +
>> +     if (IS_ERR(esdhc1_div))
>> +             return PTR_ERR(esdhc1_div);
>> +
>> +     esdhc1_div_parent = clk_get_parent(esdhc1_div);
>> +     if (IS_ERR(esdhc1_div_parent))
>> +             return PTR_ERR(esdhc1_div_parent);
>> +
>> +     err = clk_set_rate(esdhc1_div,
>> +                        clk_get_rate(esdhc1_div_parent));
>> +     if (err)
>> +             return err;
>> +
>> +     clk_put(esdhc1_div);
>> +
>> +     return 0;
>> +}
>> +coredevice_initcall(vf610_twr_sdhc1_clock_init);
>
> What's the background for this? Should it be made SoC specific?

The divider that peripheral bus clock is connected to before that
clock goes to SDHC controller is not set to one, so if this is not set
the parent clock ends up being something around 12Mhz.


>
>> diff --git a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
>> new file mode 100644
>> index 0000000..18138d2
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
>> @@ -0,0 +1,277 @@
>> +soc vf610
>> +loadaddr 0x80000000
>> +dcdofs 0x400
>> +
>> +#define VF610_DDR_PAD_CTRL   0x00000180 /* 25 Ohm drive strength */
>> +#define VF610_DDR_PAD_CTRL_1 0x00010180 /* 25 Ohm drive strength + differential input */
>> +
>> +#define DDRMC_PHY_DQ_TIMING  0x00002613
>> +#define DDRMC_PHY_DQS_TIMING 0x00002615
>> +#define DDRMC_PHY_CTRL               0x00210000
>> +#define DDRMC_PHY_MASTER_CTRL        0x0001012a
>> +#define DDRMC_PHY_SLAVE_CTRL 0x00002000
>> +#define DDRMC_PHY_OFF                0x00000000
>> +#define DDRMC_PHY_PROC_PAD_ODT       0x00010101
>> +
>> +#ifdef DEBUG
>> +#define CHECKPOINT(n) wm 32 0x3f000000 n
>> +#else
>> +#define CHECKPOINT(n)
>> +#endif
>> +
>> +CHECKPOINT(1)
>> +
>> +/* ======================= Clock initialization =======================*/
>> +
>> +/*
>> + * Ungate all IP block clocks
>> + */
>> +wm 32 0x4006b040 0xffffffff
>> +wm 32 0x4006b044 0xffffffff
>> +wm 32 0x4006b048 0xffffffff
>> +wm 32 0x4006b04c 0xffffffff
>> +wm 32 0x4006b050 0xffffffff
>> +wm 32 0x4006b058 0xffffffff
>> +wm 32 0x4006b05c 0xffffffff
>> +wm 32 0x4006b060 0xffffffff
>> +wm 32 0x4006b064 0xffffffff
>> +wm 32 0x4006b068 0xffffffff
>> +wm 32 0x4006b06c 0xffffffff
>> +
>> +
>> +/*
>> + * We have to options to clock DDR controller:
>> + *
>> + *  - Use Core-A5 clock
>> + *  - Use PLL2 PFD2 clock
>> + *
>> +
>> + * Using first option without changing PLL settings doesn't seem to be
>> + * possible given that DDRMC requires minimum of 300Mhz and MaskROM
>> + * configures it to be clocked at 264Mhz. Changing PLL1 settings
>> + * proved to be challenging becuase MaskROM code executing this DCD
>> + * will also be fetching the rest of the bootloader via some
>> + * peripheral interface whose clock is derived from Cortex-A5 clock.
>> + *
>> + * As a result this DCD configuration code uses the second option of
>> + * clocking DDR wiht PLL2 PFD2 clock output
>> + *
>> + * Turn PLL2 on
>> + */
>> +wm 32 0x40050030 0x00002001 /* Fout = Fin * 22 */
>> +
>> +CHECKPOINT(2)
>> +
>> +/*
>> + * Wait for PLLs to lock
>> + */
>> +check 32 while_any_bit_clear 0x40050030 0x80000000
>> +
>> +
>> +CHECKPOINT(3)
>> +
>> +/*
>> + * Switch DDRMC to be clocked with PLL2 PFD2 and enable PFD2 output
>> + */
>> +clear_bits 32 0x4006b008 0x00000040
>> +set_bits   32 0x4006b008 0x00002000
>> +
>> +
>> +
>> +/* ======================= DDR IOMUX ======================= */
>> +
>> +CHECKPOINT(4)
>> +
>> +wm 32 0x40048220 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048224 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048228 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004822c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048230 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048234 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048238 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004823c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048240 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048244 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048248 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004824c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048250 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048254 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048258 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004825c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048260 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048264 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048268 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004826c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048270 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048274 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048278 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004827c VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048280 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048284 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048288 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x4004828c VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048290 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048294 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048298 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x4004829c VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482a0 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482a4 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482a8 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482ac VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482b0 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482b4 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482b8 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482bc VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482c0 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482c4 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482c8 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482cc VF610_DDR_PAD_CTRL
>> +wm 32 0x400482d0 VF610_DDR_PAD_CTRL
>> +wm 32 0x400482d4 VF610_DDR_PAD_CTRL
>> +wm 32 0x400482d8 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004821c VF610_DDR_PAD_CTRL
>> +
>> +/* ======================= DDR Controller =======================*/
>> +
>> +CHECKPOINT(5)
>> +
>> +wm 32 0x400ae000 0x00000600
>> +wm 32 0x400ae008 0x00000020
>> +wm 32 0x400ae028 0x00013880
>> +wm 32 0x400ae02c 0x00030d40
>> +wm 32 0x400ae030 0x0000050c
>> +wm 32 0x400ae034 0x15040400
>> +wm 32 0x400ae038 0x1406040f
>> +wm 32 0x400ae040 0x04040000
>> +wm 32 0x400ae044 0x006db00c
>> +wm 32 0x400ae048 0x00000403
>> +wm 32 0x400ae050 0x01000000
>> +wm 32 0x400ae054 0x00060001
>> +wm 32 0x400ae058 0x000c0000
>> +wm 32 0x400ae05c 0x03000200
>> +wm 32 0x400ae060 0x00000006
>> +wm 32 0x400ae064 0x00010000
>> +wm 32 0x400ae068 0x0c30002c
>> +wm 32 0x400ae070 0x00000000
>> +wm 32 0x400ae074 0x00000003
>> +wm 32 0x400ae078 0x0000000a
>> +wm 32 0x400ae07c 0x003001d4
>> +wm 32 0x400ae084 0x00010000
>> +wm 32 0x400ae088 0x00050500
>> +wm 32 0x400ae098 0x00000000
>> +wm 32 0x400ae09c 0x04001002
>> +wm 32 0x400ae0a4 0x00000001
>> +wm 32 0x400ae0c0 0x00460420
>> +wm 32 0x400ae108 0x01000200
>> +wm 32 0x400ae10c 0x00000040
>> +wm 32 0x400ae114 0x00000200
>> +wm 32 0x400ae118 0x00000040
>> +wm 32 0x400ae120 0x00000000
>> +wm 32 0x400ae124 0x0a010300
>> +wm 32 0x400ae128 0x01014040
>> +wm 32 0x400ae12c 0x01010101
>> +wm 32 0x400ae130 0x03030100
>> +wm 32 0x400ae134 0x01000101
>> +wm 32 0x400ae138 0x0700000c
>> +wm 32 0x400ae13c 0x00000000
>> +wm 32 0x400ae148 0x10000000
>> +wm 32 0x400ae15c 0x01000000
>> +wm 32 0x400ae160 0x00040000
>> +wm 32 0x400ae164 0x00000002
>> +wm 32 0x400ae16c 0x00020000
>> +wm 32 0x400ae180 0x00002819
>> +wm 32 0x400ae184 0x01000000
>> +wm 32 0x400ae188 0x00000000
>> +wm 32 0x400ae18c 0x00000000
>> +wm 32 0x400ae198 0x00010100
>> +wm 32 0x400ae1a4 0x00000000
>> +wm 32 0x400ae1a8 0x00000004
>> +wm 32 0x400ae1b8 0x00040000
>> +wm 32 0x400ae1c8 0x00000000
>> +wm 32 0x400ae1cc 0x00000000
>> +wm 32 0x400ae1d4 0x00000000
>> +wm 32 0x400ae1d8 0x01010000
>> +wm 32 0x400ae1e0 0x02020000
>> +wm 32 0x400ae1e4 0x00000202
>> +wm 32 0x400ae1e8 0x01010064
>> +wm 32 0x400ae1ec 0x00010101
>> +wm 32 0x400ae1f0 0x00000064
>> +wm 32 0x400ae1f8 0x00000800
>> +wm 32 0x400ae210 0x00000506
>> +wm 32 0x400ae224 0x00020000
>> +wm 32 0x400ae228 0x01000000
>> +wm 32 0x400ae22c 0x04070303
>> +wm 32 0x400ae230 0x00000040
>> +wm 32 0x400ae23c 0x06000080
>> +wm 32 0x400ae240 0x04070303
>> +wm 32 0x400ae244 0x00000040
>> +wm 32 0x400ae248 0x00000040
>> +wm 32 0x400ae24c 0x000f0000
>> +wm 32 0x400ae250 0x000f0000
>> +wm 32 0x400ae25c 0x00000101
>> +wm 32 0x400ae268 0x682c4000
>> +wm 32 0x400ae26c 0x00000012
>> +wm 32 0x400ae278 0x00000006
>> +wm 32 0x400ae284 0x00010202
>> +
>> +/* ======================= DDR PHY =======================*/
>> +
>> +CHECKPOINT(6)
>> +
>> +wm 32 0x400ae400 DDRMC_PHY_DQ_TIMING
>> +wm 32 0x400ae440 DDRMC_PHY_DQ_TIMING
>> +wm 32 0x400ae480 DDRMC_PHY_DQ_TIMING
>> +wm 32 0x400ae404 DDRMC_PHY_DQS_TIMING
>> +wm 32 0x400ae444 DDRMC_PHY_DQS_TIMING
>> +wm 32 0x400ae408 DDRMC_PHY_CTRL
>> +wm 32 0x400ae448 DDRMC_PHY_CTRL
>> +wm 32 0x400ae488 DDRMC_PHY_CTRL
>> +wm 32 0x400ae40c DDRMC_PHY_CTRL
>> +wm 32 0x400ae44c DDRMC_PHY_CTRL
>> +wm 32 0x400ae48c DDRMC_PHY_CTRL
>> +wm 32 0x400ae410 DDRMC_PHY_SLAVE_CTRL
>> +wm 32 0x400ae450 DDRMC_PHY_SLAVE_CTRL
>> +wm 32 0x400ae490 DDRMC_PHY_SLAVE_CTRL
>> +wm 32 0x400ae4c4 DDRMC_PHY_OFF
>> +wm 32 0x400ae4c8 0x00001100
>> +wm 32 0x400ae4d0 DDRMC_PHY_PROC_PAD_ODT
>> +wm 32 0x400ae000 0x00000601
>> +
>> +CHECKPOINT(7)
>> +
>> +check 32 while_any_bit_clear 0x400ae140 0x100
>> +
>> +CHECKPOINT(8)
>> +
>> +/*
>> + * Cargo cult DDR controller initialization here we come!
>> + *
>> + * Experemintation with VF610 Tower Board shows that without the
>
> s/Experemintation/Experimentation/

Will fix in v2.

>
>> + * following code the board would not boot off of SD card when
>> + * power-cycled. It will however happily boot when reset via SW3/Reset
>> + * button. For whatever reason the following actions appear to be
>> + * necessary:
>> + *
>> + *          - Initialize DDRMC as usual
>> + *       - Issue a read to location in DDR address space
>> + *       - Disable DDRMC
>> + *       - Enable DDRMC and wait for it to finish initializing
>> + *
>> + * I am sure this is all going to be extrememly embarrassing to read
>> + * if/when the real problem and real solution is found.
>> + */
>> +
>> +/*
>> + * Because there's no standalone read command what we do here instead
>> + * is write a pattern to memory and then checking that memory address
>> + * against that pattern
>> + */
>> +wm 32 0x80000000 0xa5a5a5a5
>> +check 32 while_any_bit_clear 0x80000000 0xa5a5a5a5
>> +
>> +wm 32 0x400ae000 0x00000600
>> +wm 32 0x400ae000 0x00000601
>> +
>> +check 32 while_any_bit_clear 0x400ae140 0x100
>> +
>> +CHECKPOINT(9)
>> \ No newline at end of file
>> diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
>> new file mode 100644
>> index 0000000..6504273
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
>> @@ -0,0 +1,45 @@
>> +#include <common.h>
>> +#include <linux/sizes.h>
>> +#include <mach/generic.h>
>> +#include <asm/barebox-arm-head.h>
>> +#include <asm/barebox-arm.h>
>> +#include <mach/vf610-regs.h>
>> +#include <mach/clock-vf610.h>
>> +#include <mach/iomux-vf610.h>
>> +#include <debug_ll.h>
>> +
>> +static inline void setup_uart(void)
>> +{
>> +     void __iomem *iomuxbase = IOMEM(VF610_IOMUXC_BASE_ADDR);
>> +
>> +     vf610_ungate_all_peripherals();
>> +
>> +     /*
>> +      * VF610_PAD_PTB4__UART1_TX
>> +      */
>> +     writel(VF610_UART_PAD_CTRL | (2 << 20), iomuxbase + 0x0068);
>> +     writel(0, iomuxbase + 0x0380);
>> +
>> +     vf610_uart_setup_ll();
>> +}
>> +
>> +extern char __dtb_vf610_twr_start[];
>> +
>> +ENTRY_FUNCTION(start_vf610_twr, r0, r1, r2)
>> +{
>> +     int i;
>> +     void *fdt;
>> +     void __iomem *mscm = IOMEM(VF610_MSCM_BASE_ADDR);
>> +
>> +     vf610_cpu_lowlevel_init();
>> +
>> +     for (i = 0; i < VF610_MSCM_IRSPRC_NUM; i++)
>> +             writew(VF610_MSCM_IRSPRC_CP0_EN,
>> +                    mscm + VF610_MSCM_IRSPRC(i));
>> +
>> +     if (IS_ENABLED(CONFIG_DEBUG_LL))
>> +             setup_uart();
>> +
>> +     fdt = __dtb_vf610_twr_start - get_runtime_offset();
>> +     barebox_arm_entry(0x80000000, SZ_128M, fdt);
>> +}
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index d1a3fe8..f93152c 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -76,5 +76,6 @@ pbl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o
>>  pbl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
>>  pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
>>  pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
>> +pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
>>
>>  clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
>> diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
>> new file mode 100644
>> index 0000000..54b4435
>> --- /dev/null
>> +++ b/arch/arm/dts/vf610-twr.dts
>> @@ -0,0 +1,14 @@
>> +/*
>> + * Copyright 2013 Freescale Semiconductor, Inc.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + */
>> +
>> +#include <arm/vf610-twr.dts>
>> +
>> +&usbdev0 {
>> +     status = "disabled";
>> +};
>> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
>> index 71862ef..0284a8f 100644
>> --- a/arch/arm/mach-imx/Kconfig
>> +++ b/arch/arm/mach-imx/Kconfig
>> @@ -332,6 +332,10 @@ config MACH_CM_FX6
>>       bool "CM FX6"
>>       select ARCH_IMX6
>>
>> +config MACH_VF610_TWR
>> +     bool "Freescale VF610 Tower Board"
>> +     select ARCH_VF610
>> +
>>  endif
>>
>>  # ----------------------------------------------------------
>> diff --git a/arch/arm/mach-imx/include/mach/clock-vf610.h b/arch/arm/mach-imx/include/mach/clock-vf610.h
>
> Should be added in a SoC specific patch.

OK, unless you object I'll move this file to commit introducing other regs in v2

>
>> +#define CCM_CCR_FIRC_EN                              (1 << 16)
>> +#define CCM_CCR_OSCNT_MASK                   0xff
>> +#define CCM_CCR_OSCNT(v)                     ((v) & 0xff)
>> +
>
> [...]
>
>> +#define ENET_EXTERNAL_CLK    50000000
>> +#define AUDIO_EXTERNAL_CLK   24576000
>
> VF610_ prefix?

I don't think any of that is use, so I'll remove it in v2

>
>> diff --git a/arch/arm/mach-imx/include/mach/iomux-vf610.h b/arch/arm/mach-imx/include/mach/iomux-vf610.h
>
> Should also be added in a SoC specific patch.

Will move to patch with registers in v2.

Thanks,
Andrey


From andrew.smirnov at gmail.com  Tue Oct  4 06:36:12 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Tue, 4 Oct 2016 06:36:12 -0700
Subject: [PATCH 07/20] clk: Port of_clk_set_defautls()
In-Reply-To: <20161004063853.5p7xulewpbuuacxv@pengutronix.de>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-8-git-send-email-andrew.smirnov@gmail.com>
 <20161004063853.5p7xulewpbuuacxv@pengutronix.de>
Message-ID: <CAHQ1cqE1-K1A+SPRfFrfM-sgS4MbW2nqfygMfgQJGEeQ4Aa8Jg@mail.gmail.com>

On Mon, Oct 3, 2016 at 11:38 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:44AM -0700, Andrey Smirnov wrote:
>> Port of_clk_set_defautls() from Linux kernel in order to support DT
>> configurations that require it (e. g. Vybrid).
>
> s/of_clk_set_defautls/of_clk_set_defaults/ here and in the subject.
>
>> diff --git a/include/linux/clk/clk-conf.h b/include/linux/clk/clk-conf.h
>> new file mode 100644
>> index 0000000..2c0a39e
>> --- /dev/null
>> +++ b/include/linux/clk/clk-conf.h
>> @@ -0,0 +1,22 @@
>> +/*
>> + * Copyright (C) 2014 Samsung Electronics Co., Ltd.
>> + * Sylwester Nawrocki <s.nawrocki at samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/types.h>
>> +
>> +struct device_node;
>> +
>> +#if defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK)
>> +int of_clk_set_defaults(struct device_node *node, bool clk_supplier);
>> +#else
>> +static inline int of_clk_set_defaults(struct device_node *node,
>> +                                   bool clk_supplier)
>> +{
>> +     return 0;
>> +}
>> +#endif
>
> We shouldn't need this static inline variant. The caller already exists for OF
> enabled builds only.

OK, will remove in v2.

Thanks,
Andrey


From andrew.smirnov at gmail.com  Tue Oct  4 06:43:01 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Tue, 4 Oct 2016 06:43:01 -0700
Subject: [PATCH 10/20] i.MX: clk: Port imx_check_clocks() and
 imx_obtain_fixed_clock()
In-Reply-To: <20161004064923.txvdncnm57xwor5h@pengutronix.de>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-11-git-send-email-andrew.smirnov@gmail.com>
 <20161004064923.txvdncnm57xwor5h@pengutronix.de>
Message-ID: <CAHQ1cqE3UduSbJ5u_y4Rpi4qUcFD3EYzqCDxv5iQckw3cAv9qQ@mail.gmail.com>

On Mon, Oct 3, 2016 at 11:49 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:47AM -0700, Andrey Smirnov wrote:
>> Port imx_check_clocks() and imx_obtain_fixed_clock() from Linux kernel.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
>> ---
>>  arch/arm/mach-imx/clk.h  |  4 ++++
>>  drivers/clk/Makefile     |  1 +
>>  drivers/clk/imx/Makefile |  1 +
>>  drivers/clk/imx/clk.c    | 49 ++++++++++++++++++++++++++++++++++++++++++++++++
>>  4 files changed, 55 insertions(+)
>>  create mode 100644 drivers/clk/imx/Makefile
>>  create mode 100644 drivers/clk/imx/clk.c
>>
>> diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
>> index 35e480f..f96e5d2 100644
>> --- a/arch/arm/mach-imx/clk.h
>> +++ b/arch/arm/mach-imx/clk.h
>> @@ -109,4 +109,8 @@ static inline struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg,
>>  struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
>>               void __iomem *reg, u8 shift, u32 exclusive_mask);
>>
>> +void imx_check_clocks(struct clk *clks[], unsigned int count);
>> +struct clk * __init imx_obtain_fixed_clock(const char *name, unsigned long rate);
>> +
>> +
>>  #endif /* __IMX_CLK_H */
>> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
>> index 0fe8f1e..6dc82ea 100644
>> --- a/drivers/clk/Makefile
>> +++ b/drivers/clk/Makefile
>> @@ -9,3 +9,4 @@ obj-$(CONFIG_ARCH_ROCKCHIP)   += rockchip/
>>  obj-$(CONFIG_ARCH_TEGRA)     += tegra/
>>  obj-$(CONFIG_CLK_SOCFPGA)    += socfpga.o
>>  obj-$(CONFIG_MACH_MIPS_ATH79)        += clk-ar933x.o
>> +obj-$(CONFIG_COMMON_CLK)     += imx/
>> diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
>> new file mode 100644
>> index 0000000..0303c0b
>> --- /dev/null
>> +++ b/drivers/clk/imx/Makefile
>> @@ -0,0 +1 @@
>> +obj-y += clk.o
>> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
>> new file mode 100644
>> index 0000000..0357048
>> --- /dev/null
>> +++ b/drivers/clk/imx/clk.c
>
> We currently have the i.MX clock support in arch/arm/mach-imx/. This may
> or may not be changed, but until it is, other i.MX clock support code
> should go to arch/arm/mach-imx/ aswell.

My preference would be to try to move the rest of i.MX clock code to
drivers/clk, to reconcile with how it is done in Linux kernel. Is that
OK with you or would you rather I move everything to
arch/arm/mach-imx?

>
>> @@ -0,0 +1,49 @@
>> +#include <common.h>
>> +#include <init.h>
>> +#include <driver.h>
>> +#include <linux/clk.h>
>> +#include <io.h>
>> +#include <of.h>
>> +#include <linux/clkdev.h>
>> +#include <linux/err.h>
>> +
>> +#include "../../../arch/arm/mach-imx/clk.h"
>
> #include <mach/clk.h>
>
>> +
>> +void __init imx_check_clocks(struct clk *clks[], unsigned int count)
>> +{
>> +     unsigned i;
>> +
>> +     for (i = 0; i < count; i++)
>> +             if (IS_ERR(clks[i]))
>> +                     pr_err("i.MX clk %u: register failed with %ld\n",
>> +                            i, PTR_ERR(clks[i]));
>> +}
>> +
>> +static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
>> +{
>> +     struct of_phandle_args phandle;
>> +     struct clk *clk = ERR_PTR(-ENODEV);
>> +     char *path;
>> +
>> +     path = basprintf("/clocks/%s", name);
>> +     if (!path)
>> +             return ERR_PTR(-ENOMEM);
>> +
>> +     phandle.np = of_find_node_by_path(path);
>> +     kfree(path);
>> +
>> +     if (phandle.np)
>> +             clk = of_clk_get_from_provider(&phandle);
>> +
>> +     return clk;
>> +}
>
> Do we need this anyway? We already have clk providers for fixed-clock.
> Hm, looking further, maybe a later patch explains.

OK, I'll remove it and add DT fixes if needed in v2.

Thanks,
Andrey


From andrew.smirnov at gmail.com  Tue Oct  4 06:44:04 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Tue, 4 Oct 2016 06:44:04 -0700
Subject: [PATCH 11/20] i.MX: Add VF610 clock tree initialization code
In-Reply-To: <20161004065811.vsvvya5csazebcfg@pengutronix.de>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-12-git-send-email-andrew.smirnov@gmail.com>
 <20161004065811.vsvvya5csazebcfg@pengutronix.de>
Message-ID: <CAHQ1cqEPSGsWAAuw=5i6NNG-28iO+W-9Qhz8vhNdHcen9Y93Ag@mail.gmail.com>

On Mon, Oct 3, 2016 at 11:58 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:48AM -0700, Andrey Smirnov wrote:
>> Based on analogous code from Linux kernel
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
>> ---
>>  drivers/clk/imx/Makefile    |    1 +
>>  drivers/clk/imx/clk-vf610.c | 1224 +++++++++++++++++++++++++++++++++++++++++++
>>  2 files changed, 1225 insertions(+)
>>  create mode 100644 drivers/clk/imx/clk-vf610.c
>>
>> diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
>> index 0303c0b..2665f49 100644
>> --- a/drivers/clk/imx/Makefile
>> +++ b/drivers/clk/imx/Makefile
>> @@ -1 +1,2 @@
>>  obj-y += clk.o
>> +obj-$(CONFIG_ARCH_VF610) += clk-vf610.o
>> +static struct clk *clk[VF610_CLK_END];
>> +struct clk_onecell_data clk_data;
>> +
>> +static struct clk * __init vf610_get_fixed_clock(struct device_node *np,
>> +                                              const char *name)
>> +{
>> +     struct clk *clk = of_clk_get_by_name(np, name);
>> +
>> +     /* Backward compatibility if device tree is missing clks assignments */
>> +     if (IS_ERR(clk))
>> +             clk = imx_obtain_fixed_clock(name, 0);
>
> Ah, that explains it. No, we don't need this since we are compiling the
> device trees into barebox and can make sure they are compatible with our
> code.

OK, will fix in v2.
Thanks,
Andrey


From andrew.smirnov at gmail.com  Tue Oct  4 06:56:58 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Tue, 4 Oct 2016 06:56:58 -0700
Subject: [PATCH 13/20] i.MX: Add 'lpuart' serial driver
In-Reply-To: <20161004071314.e7ptvxiqo33pdt6a@pengutronix.de>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-14-git-send-email-andrew.smirnov@gmail.com>
 <20161004071314.e7ptvxiqo33pdt6a@pengutronix.de>
Message-ID: <CAHQ1cqGe9qXX-a9kDDfeG7j92gB5LNce0DYY4_Vh+4L-ssTkPA@mail.gmail.com>

On Tue, Oct 4, 2016 at 12:13 AM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:50AM -0700, Andrey Smirnov wrote:
>> Add 'lpuart' serial driver, based on analogous driver from U-Boot
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
>> ---
>>  drivers/serial/Kconfig         |   4 +
>>  drivers/serial/Makefile        |   1 +
>>  drivers/serial/serial_lpuart.c | 217 +++++++++++++++++++++++++++++++++++++++++
>>  include/serial/lpuart.h        |  28 ++++--
>>  4 files changed, 244 insertions(+), 6 deletions(-)
>>  create mode 100644 drivers/serial/serial_lpuart.c
>>
>> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
>> index 146bf1e..02e869a 100644
>> --- a/drivers/serial/Kconfig
>> +++ b/drivers/serial/Kconfig
>> @@ -137,4 +137,8 @@ config DRIVER_SERIAL_DIGIC
>>       bool "Canon DIGIC serial driver"
>>       depends on ARCH_DIGIC
>>
>> +config DRIVER_SERIAL_LPUART
>> +     depends on ARCH_IMX
>> +     bool "LPUART serial driver"
>> +
>>  endmenu
>> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
>> index 189e777..7d1bae1 100644
>> --- a/drivers/serial/Makefile
>> +++ b/drivers/serial/Makefile
>> @@ -20,3 +20,4 @@ obj-$(CONFIG_DRIVER_SERIAL_AUART)           += serial_auart.o
>>  obj-$(CONFIG_DRIVER_SERIAL_CADENCE)          += serial_cadence.o
>>  obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO)                += efi-stdio.o
>>  obj-$(CONFIG_DRIVER_SERIAL_DIGIC)            += serial_digic.o
>> +obj-$(CONFIG_DRIVER_SERIAL_LPUART)           += serial_lpuart.o
>> diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
>> new file mode 100644
>> index 0000000..52fb6d3
>> --- /dev/null
>> +++ b/drivers/serial/serial_lpuart.c
>> @@ -0,0 +1,217 @@
>> +/*
>> + * Copyright (c) 2016 Zodiac Inflight Innovation
>> + * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
>> + *
>> + * Based on analogous driver from U-Boot
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2
>> + * as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +
>> +#include <common.h>
>> +#include <driver.h>
>> +#include <init.h>
>> +#include <malloc.h>
>> +#include <notifier.h>
>> +#include <io.h>
>> +#include <of.h>
>> +#include <linux/err.h>
>> +#include <linux/clk.h>
>> +#include <serial/lpuart.h>
>> +
>> +struct lpuart {
>> +     struct console_device cdev;
>> +     int baudrate;
>> +     int dte_mode;
>> +     struct notifier_block notify;
>> +     struct resource *io;
>> +     void __iomem *base;
>> +     struct clk *clk;
>> +};
>> +
>> +static struct lpuart *cdev_to_lpuart(struct console_device *cdev)
>> +{
>> +     return container_of(cdev, struct lpuart, cdev);
>> +}
>> +
>> +static struct lpuart *nb_to_lpuart(struct notifier_block *nb)
>> +{
>> +     return container_of(nb, struct lpuart, notify);
>> +}
>> +
>> +static void lpuart_enable(struct lpuart *lpuart, bool on)
>> +{
>> +     u8 ctrl;
>> +
>> +     ctrl = readb(lpuart->base + UARTCR2);
>> +     if (on)
>> +             ctrl |= UARTCR2_TE | UARTCR2_RE;
>> +     else
>> +             ctrl &= ~(UARTCR2_TE | UARTCR2_RE);
>> +     writeb(ctrl, lpuart->base + UARTCR2);
>> +}
>> +
>> +static int lpuart_serial_setbaudrate(struct console_device *cdev,
>> +                                  int baudrate)
>> +{
>> +     struct lpuart *lpuart = cdev_to_lpuart(cdev);
>> +
>> +     lpuart_enable(lpuart, false);
>> +
>> +     lpuart_setbrg(lpuart->base,
>> +                   clk_get_rate(lpuart->clk),
>> +                   baudrate);
>> +
>> +     lpuart_enable(lpuart, true);
>> +
>> +     lpuart->baudrate = baudrate;
>> +
>> +     return 0;
>> +}
>> +
>> +static int lpuart_serial_getc(struct console_device *cdev)
>> +{
>> +     bool ready;
>> +     struct lpuart *lpuart = cdev_to_lpuart(cdev);
>> +
>> +     do {
>> +             const u8 sr1 = readb(lpuart->base + UARTSR1);
>> +             ready = !!(sr1 & (UARTSR1_OR | UARTSR1_RDRF));
>> +     } while (!ready);
>> +
>> +     return readb(lpuart->base + UARTDR);
>> +}
>> +
>> +static void lpuart_serial_putc(struct console_device *cdev, char c)
>> +{
>> +     lpuart_putc(cdev_to_lpuart(cdev)->base, c);
>> +}
>> +
>> +/* Test whether a character is in the RX buffer */
>> +static int lpuart_serial_tstc(struct console_device *cdev)
>> +{
>> +     return !!readb(cdev_to_lpuart(cdev)->base + UARTRCFIFO);
>> +}
>> +
>> +static void lpuart_serial_flush(struct console_device *cdev)
>> +{
>> +     bool tx_empty;
>> +     struct lpuart *lpuart = cdev_to_lpuart(cdev);
>> +
>> +     do {
>> +             const u8 sr1 = readb(lpuart->base + UARTSR1);
>> +             tx_empty = !!(sr1 & UARTSR1_TDRE);
>> +     } while (!tx_empty);
>> +}
>> +
>> +static int lpuart_clocksource_clock_change(struct notifier_block *nb,
>> +                                        unsigned long event, void *data)
>> +{
>> +     struct lpuart *lpuart = nb_to_lpuart(nb);
>> +
>> +     return lpuart_serial_setbaudrate(&lpuart->cdev, lpuart->baudrate);
>> +}
>
> This doesn't make sense in this form. I introduced this code in the i.MX
> uart driver since I had the need to change PLL rates while the uart is
> active. When this happens I had to adjust the dividers for the new uart
> base clock. The code above doesn't react to base clock changes though,
> it takes the old rate stored in lpuart->baudrate.
>
> If you don't have to adjust PLL rates while the uart is active then I
> suggest that you just remove this code.

I am not sure I understand what you mean. I modeled this part of the
code after i.MX driver (serial_imx.c) and unless I missed something
(which I am not seeing) it should work exactly the same way.

That is: parent clock changes, this notifier gets called, it sets
configured baud rate again via lpuart_serial_setbaudrate, which in
turn sets dividers based off of value it gets from
clk_get_rate(lpuart->clk).

It does use old value in lpuart->baudrate, just as i.MX driver does,
since AFAIU the purpose of this callback is to make sure that UART
operates at the originally configured baudrate despite the clock rate
change.

I feel like I am missing something, although it is 7AM where I am now,
so I wouldn't be surprised if I am :-)

>
>> @@ -225,25 +225,35 @@ static inline void lpuart_setbrg(void __iomem *base,
>>                                unsigned int refclock,
>>                                unsigned int baudrate)
>>  {
>> +     unsigned int bfra;
>>       u16 sbr;
>> +
>>       sbr = (u16) (refclock / (16 * baudrate));
>>
>>       writeb(sbr >> 8,   base + UARTBDH);
>>       writeb(sbr & 0xff, base + UARTBDL);
>> +
>> +     bfra  = DIV_ROUND_UP(2 * refclock, baudrate) - 32 * sbr;
>> +     bfra &= UARTCR4_BRFA_MASK;
>> +     writeb(bfra, base + UARTCR4);
>>  }
>>
>> -static inline void lpuart_setup(void __iomem *base,
>> -                             unsigned int refclock)
>> +static inline void lpuart_setup_with_fifo(void __iomem *base,
>> +                                       unsigned int refclock,
>> +                                       unsigned int twfifo)
>>  {
>> -
>>       /* Disable UART */
>>       writeb(0, base + UARTCR2);
>>       writeb(0, base + UARTMODEM);
>>       writeb(0, base + UARTCR1);
>>
>> -     /* Disable FIFOs */
>> -     writeb(0, base + UARTPFIFO);
>> -     writeb(0, base + UARTTWFIFO);
>> +     if (twfifo) {
>> +             writeb(UARTPFIFO_TXFE | UARTPFIFO_RXFE, base + UARTPFIFO);
>> +             writeb((u8)twfifo, base + UARTTWFIFO);
>> +     } else {
>> +             writeb(0, base + UARTPFIFO);
>> +             writeb(0, base + UARTTWFIFO);
>> +     }
>>       writeb(1, base + UARTRWFIFO);
>>       writeb(UARTCFIFO_RXFLUSH | UARTCFIFO_TXFLUSH, base + UARTCFIFO);
>>
>> @@ -252,6 +262,12 @@ static inline void lpuart_setup(void __iomem *base,
>>       writeb(UARTCR2_TE | UARTCR2_RE, base + UARTCR2);
>>  }
>>
>> +static inline void lpuart_setup(void __iomem *base,
>> +                             unsigned int refclock)
>> +{
>> +     lpuart_setup_with_fifo(base, refclock, 0x00);
>> +}
>> +
>>  static inline void lpuart_putc(void __iomem *base, int c)
>>  {
>>       if (!(readb(base + UARTCR2) & UARTCR2_TE))
>
> This was introduced earlier with this series. No need to change it, just
> create it correctly in the first place.

OK, will fix in v2.

Thanks,
Andrey


From andrew.smirnov at gmail.com  Tue Oct  4 06:57:53 2016
From: andrew.smirnov at gmail.com (Andrey Smirnov)
Date: Tue, 4 Oct 2016 06:57:53 -0700
Subject: [PATCH 14/20] i.MX: i2c-imx: Add Vybrid support
In-Reply-To: <20161004072041.mfou7hpp3uoihqys@pengutronix.de>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-15-git-send-email-andrew.smirnov@gmail.com>
 <20161004072041.mfou7hpp3uoihqys@pengutronix.de>
Message-ID: <CAHQ1cqGBqBHzF+MCWURs6qN-Qj50gH8q1tNs7LyVyy9r4a-HcA@mail.gmail.com>

On Tue, Oct 4, 2016 at 12:20 AM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:51AM -0700, Andrey Smirnov wrote:
>> Vybrid flavour of the I2C controller requires some additional quirks on
>> part of the driver. This commit ports those quirks code from analogous
>> Linux kernel driver.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
>> ---
>>  drivers/i2c/busses/i2c-imx.c | 215 ++++++++++++++++++++++++++++++++-----------
>>  1 file changed, 160 insertions(+), 55 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
>> index e407896..dbc76c2 100644
>> --- a/drivers/i2c/busses/i2c-imx.c
>> +++ b/drivers/i2c/busses/i2c-imx.c
>> @@ -43,6 +43,7 @@
>> +static inline void fsl_i2c_write_reg(unsigned int val,
>> +                                  struct fsl_i2c_struct *i2c_fsl,
>> +                                  unsigned int reg)
>> +{
>> +     writeb(val, i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
>> +}
>> +
>> +static inline unsigned char fsl_i2c_read_reg(struct fsl_i2c_struct *i2c_fsl,
>> +                                          unsigned int reg)
>> +{
>> +     return readb(i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
>> +}
>
> Can we have the introduction of the read/write accessor functions as a
> separate patch (with regshift hardcoded to 0)? This would make reviewing
> the rest easier.

OK, will do in v2.

Thanks,
Andrey


From u.kleine-koenig at pengutronix.de  Tue Oct  4 12:13:06 2016
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Tue,  4 Oct 2016 21:13:06 +0200
Subject: [PATCH 2/2] ARM: mvebu: document some general mvebu stuff and the
 rn2120 board
In-Reply-To: <20161004191306.1838-1-u.kleine-koenig@pengutronix.de>
References: <20161004191306.1838-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161004191306.1838-2-u.kleine-koenig@pengutronix.de>

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 Documentation/boards/mvebu.rst                     | 50 ++++++++++++++++++++++
 .../boards/mvebu/Netgear-ReadyNAS-2120.rst         | 19 ++++++++
 2 files changed, 69 insertions(+)
 create mode 100644 Documentation/boards/mvebu.rst
 create mode 100644 Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst

diff --git a/Documentation/boards/mvebu.rst b/Documentation/boards/mvebu.rst
new file mode 100644
index 000000000000..b4f8e6043dac
--- /dev/null
+++ b/Documentation/boards/mvebu.rst
@@ -0,0 +1,50 @@
+Marvell Embedded Business Unit (mvebu)
+======================================
+
+Move of the Register Window
+---------------------------
+
+When an mvebu SoC comes up the internal registers are mapped at 0xd0000000 in
+the address space. To make it possible to have more than 3.25 GiB of continuous
+RAM in Linux this window is moved to 0xf1000000.
+Unfortunately the register to configure the location of the registers is located
+in this window, so there is no way to determine the location afterwards.
+
+RAM initialisation
+------------------
+
+Traditionally the RAM initialisation happens with a binary blob that have to be
+extracted from the vendor U-Boot::
+
+  scripts/kwbimage -x -i /dev/mtdblock0 -o .
+
+This creates among others a file "binary.0" that has to be put into the board
+directory. For license reasons this is usually not included in the barebox
+repository.
+
+Note that in the meantime U-Boot has open source code to do the RAM
+initialisation that could be taken.
+
+Booting second stage
+--------------------
+
+This is currently not possible because barebox assumes the registers are mapped
+at 0xd0000000 as is the case when the boot ROM gives control to the bootloader.
+
+Booting from UART
+-----------------
+
+The mvebu SoCs support booting from UART. For this there is a tool available in
+barebox called kwboot.
+
+mvebu boards
+------------
+
+Not all supported boards have a description here.
+
+.. toctree::
+  :glob:
+  :numbered:
+  :maxdepth: 1
+
+  mvebu/*
diff --git a/Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst b/Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst
new file mode 100644
index 000000000000..5bee03af9d38
--- /dev/null
+++ b/Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst
@@ -0,0 +1,19 @@
+Netgear ReadyNAS 2120
+=====================
+
+This is a rack mountable 4 bay NAS using an Armada XP dual-core processor.
+
+UART booting
+------------
+
+The first UART hides behind a sticker on 4 pins.
+
+The machine seems to do two resets at power on which makes UART booting hard. A
+trick to work around this is::
+
+  scripts/kwboot -d /dev/ttyUSB0; kwboot -b images/barebox-netgear-rn2120.img -t /dev/ttyUSB0
+
+This way the first window in which the CPU accepts the magic string is taken by
+the first invokation which blocks until the second reset happens. The second
+window is then hit with the image to boot. This is not 100% reliable but works
+most of the time.
-- 
2.9.3



From u.kleine-koenig at pengutronix.de  Tue Oct  4 12:13:05 2016
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Tue,  4 Oct 2016 21:13:05 +0200
Subject: [PATCH 1/2] ARM: mvebu: add support for Netgear RN2120
Message-ID: <20161004191306.1838-1-u.kleine-koenig@pengutronix.de>

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 arch/arm/boards/Makefile                    |  1 +
 arch/arm/boards/netgear-rn2120/Makefile     |  2 +
 arch/arm/boards/netgear-rn2120/board.c      | 88 +++++++++++++++++++++++++++++
 arch/arm/boards/netgear-rn2120/kwbimage.cfg |  7 +++
 arch/arm/boards/netgear-rn2120/lowlevel.c   | 41 ++++++++++++++
 arch/arm/dts/Makefile                       |  1 +
 arch/arm/dts/armada-xp-rn2120-bb.dts        | 11 ++++
 arch/arm/mach-mvebu/Kconfig                 |  4 ++
 images/Makefile.mvebu                       |  8 +++
 9 files changed, 163 insertions(+)
 create mode 100644 arch/arm/boards/netgear-rn2120/Makefile
 create mode 100644 arch/arm/boards/netgear-rn2120/board.c
 create mode 100644 arch/arm/boards/netgear-rn2120/kwbimage.cfg
 create mode 100644 arch/arm/boards/netgear-rn2120/lowlevel.c
 create mode 100644 arch/arm/dts/armada-xp-rn2120-bb.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 35b636f0cfbb..8f24fd13aa7b 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_MACH_MX28EVK)			+= freescale-mx28-evk/
 obj-$(CONFIG_MACH_MX31MOBOARD)			+= mx31moboard/
 obj-$(CONFIG_MACH_NESO)				+= guf-neso/
 obj-$(CONFIG_MACH_NETGEAR_RN104)		+= netgear-rn104/
+obj-$(CONFIG_MACH_NETGEAR_RN2120)		+= netgear-rn2120/
 obj-$(CONFIG_MACH_NOMADIK_8815NHK)		+= nhk8815/
 obj-$(CONFIG_MACH_NVIDIA_BEAVER)		+= nvidia-beaver/
 obj-$(CONFIG_MACH_NVIDIA_JETSON)		+= nvidia-jetson-tk1/
diff --git a/arch/arm/boards/netgear-rn2120/Makefile b/arch/arm/boards/netgear-rn2120/Makefile
new file mode 100644
index 000000000000..01c7a259e9a5
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/netgear-rn2120/board.c b/arch/arm/boards/netgear-rn2120/board.c
new file mode 100644
index 000000000000..caf106af50d6
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/board.c
@@ -0,0 +1,88 @@
+#include <clock.h>
+#include <init.h>
+#include <of.h>
+#include <gpio.h>
+#include <printk.h>
+#include <linux/kernel.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+
+static int rn2120_init(void)
+{
+	/*
+	 * This is the machine type that the kernel shipped by Netgear is using.
+	 * It's wrong but a given fact.
+	 */
+	armlinux_set_architecture(MACH_TYPE_ARMADA_XP_DB);
+
+	return 0;
+}
+device_initcall(rn2120_init);
+
+struct hdpower {
+	unsigned gpio_detect;
+	unsigned gpio_power;
+	unsigned gpio_led;
+};
+
+/*
+ * It would be nice to have this abstracted in the device tree, but currently
+ * this isn't the case.
+ */
+static struct hdpower rn2120_hdpower[] = {
+	{
+		/* sata 1 */
+		.gpio_detect = 32,
+		.gpio_power = 24,
+		.gpio_led = 31,
+	}, {
+		/* sata 2 */
+		.gpio_detect = 33,
+		.gpio_power = 25,
+		.gpio_led = 40,
+	}, {
+		/* sata 3 */
+		.gpio_detect = 34,
+		.gpio_power = 26,
+		.gpio_led = 44,
+	}, {
+		/* sata 4 */
+		.gpio_detect = 35,
+		.gpio_power = 28,
+		.gpio_led = 47,
+	},
+};
+
+static int rn2120_hddetect(void)
+{
+	int i;
+
+	if (!of_machine_is_compatible("netgear,readynas-2120"))
+		return 0;
+
+	for (i = 0; i < ARRAY_SIZE(rn2120_hdpower); ++i) {
+		int ret;
+		ret = gpio_direction_input(rn2120_hdpower[i].gpio_detect);
+		if (ret) {
+			pr_err("Failure to detect hd%d (%d)\n", i, ret);
+			continue;
+		}
+
+		ret = gpio_get_value(rn2120_hdpower[i].gpio_detect);
+		if (ret) {
+			/* no disk present */
+			gpio_direction_output(rn2120_hdpower[i].gpio_power, 0);
+		} else {
+			pr_info("Detected presence of disk #%d\n", i + 1);
+			/* make a pause after powering up 2 disks */
+			if (i && !(i & 1)) {
+				pr_info("Delay power up\n");
+				mdelay(7000);
+			}
+
+			gpio_direction_output(rn2120_hdpower[i].gpio_power, 1);
+		}
+	}
+	return 0;
+}
+device_initcall(rn2120_hddetect);
diff --git a/arch/arm/boards/netgear-rn2120/kwbimage.cfg b/arch/arm/boards/netgear-rn2120/kwbimage.cfg
new file mode 100644
index 000000000000..a6f0aa6d3dc3
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/kwbimage.cfg
@@ -0,0 +1,7 @@
+VERSION 1
+BOOT_FROM nand
+DESTADDR 00000000
+EXECADDR 00000000
+NAND_BLKSZ 00020000
+NAND_BADBLK_LOCATION 01
+BINARY binary.0 0000005b 00000068
diff --git a/arch/arm/boards/netgear-rn2120/lowlevel.c b/arch/arm/boards/netgear-rn2120/lowlevel.c
new file mode 100644
index 000000000000..29c8b43c4467
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/lowlevel.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2015 Pengutronix, Uwe Kleine-K?nig <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/io.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_armada_xp_rn2120_bb_start[];
+
+ENTRY_FUNCTION(start_netgear_rn2120, r0, r1, r2)
+{
+	void *fdt;
+
+	arm_cpu_lowlevel_init();
+
+	/*
+	 * This is necessary to allow the machine to draw more power. Probably
+	 * connected to a TI TPS65251. Without this resetting a phy makes the
+	 * SoC reset.
+	 * This is effectively gpio_direction_output(42, 1);
+	 */
+	writel((1 << 10) | readl((void *)0xd0018140), (void *)0xd0018140);
+	writel(~(1 << 10) & readl((void *)0xd0018144), (void *)0xd0018144);
+
+	fdt = __dtb_armada_xp_rn2120_bb_start -
+		get_runtime_offset();
+
+	mvebu_barebox_entry(fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 09bf68ea2be7..0bc5c9542d3f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ pbl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o
 pbl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_NETGEAR_RN104) += armada-370-rn104-bb.dtb.o
+pbl-dtb-$(CONFIG_MACH_NETGEAR_RN2120) += armada-xp-rn2120-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_NITROGEN6) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o imx6qp-nitrogen6_max.dtb.o
 pbl-dtb-$(CONFIG_MACH_NVIDIA_BEAVER) += tegra30-beaver.dtb.o
 pbl-dtb-$(CONFIG_MACH_NVIDIA_JETSON) += tegra124-jetson-tk1.dtb.o
diff --git a/arch/arm/dts/armada-xp-rn2120-bb.dts b/arch/arm/dts/armada-xp-rn2120-bb.dts
new file mode 100644
index 000000000000..969136b336fc
--- /dev/null
+++ b/arch/arm/dts/armada-xp-rn2120-bb.dts
@@ -0,0 +1,11 @@
+/*
+ * Barebox specific DT overlay for Netgear ReadyNAS 2120
+ */
+
+#include "arm/armada-xp-netgear-rn2120.dts"
+
+/ {
+	chosen {
+		stdout-path = "/soc/internal-regs/serial at 12000";
+	};
+};
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 79fcc8d3ac36..148b4f6d4cb3 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -55,6 +55,10 @@ config MACH_MARVELL_ARMADA_XP_GP
 	bool "Marvell Armada XP GP"
 	select ARCH_ARMADA_XP
 
+config MACH_NETGEAR_RN2120
+	bool "Netgear ReadyNAS 2120"
+	select ARCH_ARMADA_XP
+
 config MACH_PLATHOME_OPENBLOCKS_AX3
 	bool "PlatHome OpenBlocks AX3"
 	select ARCH_ARMADA_XP
diff --git a/images/Makefile.mvebu b/images/Makefile.mvebu
index 195f48d47073..6286c93e3d8e 100644
--- a/images/Makefile.mvebu
+++ b/images/Makefile.mvebu
@@ -57,6 +57,14 @@ image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp.img
 image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp-uart.img
 image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp-2nd.img
 
+NETGEAR_RN2120_KWBOPTS = ${KWBOPTS} -i $(board)/netgear-rn2120/kwbimage.cfg
+OPTS_start_netgear_rn2120.pblx.kwbimg = $(NETGEAR_RN2120_KWBOPTS)
+FILE_barebox-netgear-rn2120.img	= start_netgear_rn2120.pblx.kwbimg
+FILE_barebox-netgear-rn2120-2nd.img = start_netgear_rn2120.pblx
+pblx-$(CONFIG_MACH_NETGEAR_RN2120) += start_netgear_rn2120
+image-$(CONFIG_MACH_NETGEAR_RN2120) += barebox-netgear-rn2120.img
+image-$(CONFIG_MACH_NETGEAR_RN2120) += barebox-netgear-rn2120-2nd.img
+
 PLATHOME_OPENBLOCKS_AX3_KWBOPTS = ${KWBOPTS} -i $(board)/plathome-openblocks-ax3/kwbimage.cfg
 OPTS_start_plathome_openblocks_ax3.pblx.kwbimg = $(PLATHOME_OPENBLOCKS_AX3_KWBOPTS)
 OPTS_start_plathome_openblocks_ax3.pblx.kwbuartimg = -m uart $(PLATHOME_OPENBLOCKS_AX3_KWBOPTS)
-- 
2.9.3



From s.hauer at pengutronix.de  Tue Oct  4 12:25:21 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 21:25:21 +0200
Subject: [PATCH 13/20] i.MX: Add 'lpuart' serial driver
In-Reply-To: <CAHQ1cqGe9qXX-a9kDDfeG7j92gB5LNce0DYY4_Vh+4L-ssTkPA@mail.gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-14-git-send-email-andrew.smirnov@gmail.com>
 <20161004071314.e7ptvxiqo33pdt6a@pengutronix.de>
 <CAHQ1cqGe9qXX-a9kDDfeG7j92gB5LNce0DYY4_Vh+4L-ssTkPA@mail.gmail.com>
Message-ID: <20161004192521.w6wujh2x2265lyjc@pengutronix.de>

On Tue, Oct 04, 2016 at 06:56:58AM -0700, Andrey Smirnov wrote:
> On Tue, Oct 4, 2016 at 12:13 AM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> > On Mon, Oct 03, 2016 at 07:40:50AM -0700, Andrey Smirnov wrote:
> >> Add 'lpuart' serial driver, based on analogous driver from U-Boot
> >>
> >> Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
> >> ---
> >>  drivers/serial/Kconfig         |   4 +
> >>  drivers/serial/Makefile        |   1 +
> >>  drivers/serial/serial_lpuart.c | 217 +++++++++++++++++++++++++++++++++++++++++
> >>  include/serial/lpuart.h        |  28 ++++--
> >>  4 files changed, 244 insertions(+), 6 deletions(-)
> >>  create mode 100644 drivers/serial/serial_lpuart.c
> >>
> >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> >> index 146bf1e..02e869a 100644
> >> --- a/drivers/serial/Kconfig
> >> +++ b/drivers/serial/Kconfig
> >> @@ -137,4 +137,8 @@ config DRIVER_SERIAL_DIGIC
> >>       bool "Canon DIGIC serial driver"
> >>       depends on ARCH_DIGIC
> >>
> >> +config DRIVER_SERIAL_LPUART
> >> +     depends on ARCH_IMX
> >> +     bool "LPUART serial driver"
> >> +
> >>  endmenu
> >> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> >> index 189e777..7d1bae1 100644
> >> --- a/drivers/serial/Makefile
> >> +++ b/drivers/serial/Makefile
> >> @@ -20,3 +20,4 @@ obj-$(CONFIG_DRIVER_SERIAL_AUART)           += serial_auart.o
> >>  obj-$(CONFIG_DRIVER_SERIAL_CADENCE)          += serial_cadence.o
> >>  obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO)                += efi-stdio.o
> >>  obj-$(CONFIG_DRIVER_SERIAL_DIGIC)            += serial_digic.o
> >> +obj-$(CONFIG_DRIVER_SERIAL_LPUART)           += serial_lpuart.o
> >> diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
> >> new file mode 100644
> >> index 0000000..52fb6d3
> >> --- /dev/null
> >> +++ b/drivers/serial/serial_lpuart.c
> >> @@ -0,0 +1,217 @@
> >> +/*
> >> + * Copyright (c) 2016 Zodiac Inflight Innovation
> >> + * Author: Andrey Smirnov <andrew.smirnov at gmail.com>
> >> + *
> >> + * Based on analogous driver from U-Boot
> >> + *
> >> + * See file CREDITS for list of people who contributed to this
> >> + * project.
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License version 2
> >> + * as published by the Free Software Foundation.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >> + * GNU General Public License for more details.
> >> + *
> >> + */
> >> +
> >> +#include <common.h>
> >> +#include <driver.h>
> >> +#include <init.h>
> >> +#include <malloc.h>
> >> +#include <notifier.h>
> >> +#include <io.h>
> >> +#include <of.h>
> >> +#include <linux/err.h>
> >> +#include <linux/clk.h>
> >> +#include <serial/lpuart.h>
> >> +
> >> +struct lpuart {
> >> +     struct console_device cdev;
> >> +     int baudrate;
> >> +     int dte_mode;
> >> +     struct notifier_block notify;
> >> +     struct resource *io;
> >> +     void __iomem *base;
> >> +     struct clk *clk;
> >> +};
> >> +
> >> +static struct lpuart *cdev_to_lpuart(struct console_device *cdev)
> >> +{
> >> +     return container_of(cdev, struct lpuart, cdev);
> >> +}
> >> +
> >> +static struct lpuart *nb_to_lpuart(struct notifier_block *nb)
> >> +{
> >> +     return container_of(nb, struct lpuart, notify);
> >> +}
> >> +
> >> +static void lpuart_enable(struct lpuart *lpuart, bool on)
> >> +{
> >> +     u8 ctrl;
> >> +
> >> +     ctrl = readb(lpuart->base + UARTCR2);
> >> +     if (on)
> >> +             ctrl |= UARTCR2_TE | UARTCR2_RE;
> >> +     else
> >> +             ctrl &= ~(UARTCR2_TE | UARTCR2_RE);
> >> +     writeb(ctrl, lpuart->base + UARTCR2);
> >> +}
> >> +
> >> +static int lpuart_serial_setbaudrate(struct console_device *cdev,
> >> +                                  int baudrate)
> >> +{
> >> +     struct lpuart *lpuart = cdev_to_lpuart(cdev);
> >> +
> >> +     lpuart_enable(lpuart, false);
> >> +
> >> +     lpuart_setbrg(lpuart->base,
> >> +                   clk_get_rate(lpuart->clk),
> >> +                   baudrate);
> >> +
> >> +     lpuart_enable(lpuart, true);
> >> +
> >> +     lpuart->baudrate = baudrate;
> >> +
> >> +     return 0;
> >> +}
> >> +
> >> +static int lpuart_serial_getc(struct console_device *cdev)
> >> +{
> >> +     bool ready;
> >> +     struct lpuart *lpuart = cdev_to_lpuart(cdev);
> >> +
> >> +     do {
> >> +             const u8 sr1 = readb(lpuart->base + UARTSR1);
> >> +             ready = !!(sr1 & (UARTSR1_OR | UARTSR1_RDRF));
> >> +     } while (!ready);
> >> +
> >> +     return readb(lpuart->base + UARTDR);
> >> +}
> >> +
> >> +static void lpuart_serial_putc(struct console_device *cdev, char c)
> >> +{
> >> +     lpuart_putc(cdev_to_lpuart(cdev)->base, c);
> >> +}
> >> +
> >> +/* Test whether a character is in the RX buffer */
> >> +static int lpuart_serial_tstc(struct console_device *cdev)
> >> +{
> >> +     return !!readb(cdev_to_lpuart(cdev)->base + UARTRCFIFO);
> >> +}
> >> +
> >> +static void lpuart_serial_flush(struct console_device *cdev)
> >> +{
> >> +     bool tx_empty;
> >> +     struct lpuart *lpuart = cdev_to_lpuart(cdev);
> >> +
> >> +     do {
> >> +             const u8 sr1 = readb(lpuart->base + UARTSR1);
> >> +             tx_empty = !!(sr1 & UARTSR1_TDRE);
> >> +     } while (!tx_empty);
> >> +}
> >> +
> >> +static int lpuart_clocksource_clock_change(struct notifier_block *nb,
> >> +                                        unsigned long event, void *data)
> >> +{
> >> +     struct lpuart *lpuart = nb_to_lpuart(nb);
> >> +
> >> +     return lpuart_serial_setbaudrate(&lpuart->cdev, lpuart->baudrate);
> >> +}
> >
> > This doesn't make sense in this form. I introduced this code in the i.MX
> > uart driver since I had the need to change PLL rates while the uart is
> > active. When this happens I had to adjust the dividers for the new uart
> > base clock. The code above doesn't react to base clock changes though,
> > it takes the old rate stored in lpuart->baudrate.
> >
> > If you don't have to adjust PLL rates while the uart is active then I
> > suggest that you just remove this code.
> 
> I am not sure I understand what you mean. I modeled this part of the
> code after i.MX driver (serial_imx.c) and unless I missed something
> (which I am not seeing) it should work exactly the same way.
> 
> That is: parent clock changes, this notifier gets called, it sets
> configured baud rate again via lpuart_serial_setbaudrate, which in
> turn sets dividers based off of value it gets from
> clk_get_rate(lpuart->clk).

Ah, I see. I misread the code and thought you pass the clock rate to
lpuart_serial_setbaudrate(), but of course you pass the desired
baudrate. You're right, the code looks fine.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct  4 12:28:32 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 21:28:32 +0200
Subject: [PATCH 10/20] i.MX: clk: Port imx_check_clocks() and
 imx_obtain_fixed_clock()
In-Reply-To: <CAHQ1cqE3UduSbJ5u_y4Rpi4qUcFD3EYzqCDxv5iQckw3cAv9qQ@mail.gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-11-git-send-email-andrew.smirnov@gmail.com>
 <20161004064923.txvdncnm57xwor5h@pengutronix.de>
 <CAHQ1cqE3UduSbJ5u_y4Rpi4qUcFD3EYzqCDxv5iQckw3cAv9qQ@mail.gmail.com>
Message-ID: <20161004192832.uwvcko2lxbqorp33@pengutronix.de>

On Tue, Oct 04, 2016 at 06:43:01AM -0700, Andrey Smirnov wrote:
> >> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
> >> new file mode 100644
> >> index 0000000..0357048
> >> --- /dev/null
> >> +++ b/drivers/clk/imx/clk.c
> >
> > We currently have the i.MX clock support in arch/arm/mach-imx/. This may
> > or may not be changed, but until it is, other i.MX clock support code
> > should go to arch/arm/mach-imx/ aswell.
> 
> My preference would be to try to move the rest of i.MX clock code to
> drivers/clk, to reconcile with how it is done in Linux kernel. Is that
> OK with you or would you rather I move everything to
> arch/arm/mach-imx?

I sometimes thought the clk code should be moved to drivers/clk/, but I
never had enough motivation to actually create a patch. If you create
one I'll happily apply it.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct  4 12:34:16 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 21:34:16 +0200
Subject: [PATCH 1/5] fs: squashfs: port lzo compression support from kernel
In-Reply-To: <20161004101048.12970-2-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-2-ejo@pengutronix.de>
Message-ID: <20161004193416.awslsajyeeze4aiu@pengutronix.de>

On Tue, Oct 04, 2016 at 12:10:44PM +0200, Enrico Jorns wrote:
> This ports lzo_wrapper from kernel code and adds some minimal adaptions
> to make squashfs lzo compression work in barebox.
> 
> Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
> ---
>  fs/squashfs/Kconfig       |  14 +++++
>  fs/squashfs/Makefile      |   1 +
>  fs/squashfs/lzo_wrapper.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++
>  include/linux/lzo.h       |  47 +++++++++++++++++
>  4 files changed, 190 insertions(+)
>  create mode 100644 fs/squashfs/lzo_wrapper.c
>  create mode 100644 include/linux/lzo.h
> 
> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
> index dc25d93..d8ee554 100644
> --- a/fs/squashfs/Kconfig
> +++ b/fs/squashfs/Kconfig
> @@ -17,6 +17,20 @@ menuconfig FS_SQUASHFS
>  	  embedded systems where low overhead is needed.  Further information
>  	  and tools are available from http://squashfs.sourceforge.net.
>  
> +config SQUASHFS_LZO
> +	bool "Include support for LZO compressed file systems"
> +	default y
> +	depends on FS_SQUASHFS
> +	select LZO_DECOMPRESS
> +	help
> +	  Saying Y here includes support for reading Squashfs file systems
> +	  compressed with LZO compression.  LZO compression is mainly
> +	  aimed at embedded systems with slower CPUs where the overheads
> +	  of zlib are too high.
> +
> +	  LZO is not the standard compression used in Squashfs and so most
> +	  file systems will be readable without selecting this option.
> +
>  config SQUASHFS_XZ
>  	bool "Include support for XZ compressed file systems"
>  	default y
> diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
> index c0d024c..447e15e 100644
> --- a/fs/squashfs/Makefile
> +++ b/fs/squashfs/Makefile
> @@ -11,3 +11,4 @@ obj-y	+= inode.o
>  obj-y	+= namei.o
>  obj-y	+= super.o
>  obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
> +obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
> diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c
> new file mode 100644
> index 0000000..b457955
> --- /dev/null
> +++ b/fs/squashfs/lzo_wrapper.c
> @@ -0,0 +1,128 @@
> +/*
> + * Squashfs - a compressed read only filesystem for Linux
> + *
> + * Copyright (c) 2010 LG Electronics
> + * Chan Jeong <chan.jeong at lge.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2,
> + * or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
> + *
> + * lzo_wrapper.c
> + */
> +
> +#include <linux/mutex.h>
> +#include <linux/lzo.h>
> +#include <types.h>
> +
> +#include "squashfs_fs.h"
> +#include "squashfs_fs_sb.h"
> +#include "squashfs.h"
> +#include "decompressor.h"
> +#include "page_actor.h"
> +
> +struct squashfs_lzo {
> +	void	*input;
> +	void	*output;
> +};
> +
> +static void *lzo_init(struct squashfs_sb_info *msblk, void *buff)
> +{
> +	int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
> +
> +	struct squashfs_lzo *stream = kzalloc(sizeof(*stream), GFP_KERNEL);
> +	if (stream == NULL)
> +		goto failed;
> +	stream->input = vmalloc(block_size);
> +	if (stream->input == NULL)
> +		goto failed;
> +	stream->output = vmalloc(block_size);
> +	if (stream->output == NULL)
> +		goto failed2;
> +
> +	return stream;
> +
> +failed2:
> +	vfree(stream->input);
> +failed:
> +	ERROR("Failed to allocate lzo workspace\n");
> +	kfree(stream);
> +	return ERR_PTR(-ENOMEM);
> +}
> +
> +
> +static void lzo_free(void *strm)
> +{
> +	struct squashfs_lzo *stream = strm;
> +
> +	if (stream) {
> +		vfree(stream->input);
> +		vfree(stream->output);
> +	}
> +	kfree(stream);
> +}
> +
> +
> +static int lzo_uncompress(struct squashfs_sb_info *msblk, void *strm,
> +	char **bh, int b, int offset, int length,
> +	struct squashfs_page_actor *output)
> +{
> +	struct squashfs_lzo *stream = strm;
> +	void *buff = stream->input, *data;
> +	int avail, i, bytes = length, res;
> +	size_t out_len = output->length;
> +
> +	for (i = 0; i < b; i++) {
> +		avail = min(bytes, msblk->devblksize - offset);
> +		memcpy(buff, bh[i] + offset, avail);
> +		buff += avail;
> +		bytes -= avail;
> +		offset = 0;
> +		kfree(bh[i]);
> +	}
> +
> +	res = lzo1x_decompress_safe(stream->input, (size_t)length,
> +					stream->output, &out_len);
> +	if (res != LZO_E_OK)
> +		goto failed;
> +
> +	res = bytes = (int)out_len;
> +	data = squashfs_first_page(output);
> +	buff = stream->output;
> +	while (data) {
> +		if (bytes <= PAGE_CACHE_SIZE) {
> +			memcpy(data, buff, bytes);
> +			break;
> +		} else {
> +			memcpy(data, buff, PAGE_CACHE_SIZE);
> +			buff += PAGE_CACHE_SIZE;
> +			bytes -= PAGE_CACHE_SIZE;
> +			data = squashfs_next_page(output);
> +		}
> +	}
> +	squashfs_finish_page(output);
> +
> +	return res;
> +
> +failed:
> +	return -EIO;
> +}
> +
> +const struct squashfs_decompressor squashfs_lzo_comp_ops = {
> +	.init = lzo_init,
> +	.free = lzo_free,
> +	.decompress = lzo_uncompress,
> +	.id = LZO_COMPRESSION,
> +	.name = "lzo",
> +	.supported = 1
> +};
> diff --git a/include/linux/lzo.h b/include/linux/lzo.h

We already have include/lzo.h with the same content, no need to add it
again.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct  4 12:40:20 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 4 Oct 2016 21:40:20 +0200
Subject: [PATCH 3/5] fs: squashfs: port zlib compression support from
 kernel
In-Reply-To: <20161004101048.12970-4-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-4-ejo@pengutronix.de>
Message-ID: <20161004194020.vmmm35546csmbvnv@pengutronix.de>

On Tue, Oct 04, 2016 at 12:10:46PM +0200, Enrico Jorns wrote:
> As this is the default compression method for squashfs, make this the
> default in kconfig selection, too
> 
> Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
> ---
>  fs/squashfs/Kconfig        |  20 ++++++-
>  fs/squashfs/Makefile       |   1 +
>  fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 152 insertions(+), 1 deletion(-)
>  create mode 100644 fs/squashfs/zlib_wrapper.c
> 
> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
> index d2de168..1cb1ac5 100644
> --- a/fs/squashfs/Kconfig
> +++ b/fs/squashfs/Kconfig
> @@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
>  	  embedded systems where low overhead is needed.  Further information
>  	  and tools are available from http://squashfs.sourceforge.net.
>  
> +config SQUASHFS_ZLIB
> +	bool "Include support for ZLIB compressed file systems"
> +	depends on FS_SQUASHFS
> +	select ZLIB
> +	default y
> +	help
> +	  ZLIB compression is the standard compression used by Squashfs
> +	  file systems.  It offers a good trade-off between compression
> +	  achieved and the amount of CPU time and memory necessary to
> +	  compress and decompress.
> +
> +	  If unsure, say Y.
> +
>  config SQUASHFS_LZ4
>  	bool "Include support for LZ4 compressed file systems"
>  	depends on FS_SQUASHFS
> @@ -30,9 +43,10 @@ config SQUASHFS_LZ4
>  	  LZ4 is not the standard compression used in Squashfs and so most
>  	  file systems will be readable without selecting this option.
>  
> +	  If unsure, say N.
> +
>  config SQUASHFS_LZO
>  	bool "Include support for LZO compressed file systems"
> -	default y
>  	depends on FS_SQUASHFS
>  	select LZO_DECOMPRESS
>  	help
> @@ -44,6 +58,8 @@ config SQUASHFS_LZO
>  	  LZO is not the standard compression used in Squashfs and so most
>  	  file systems will be readable without selecting this option.
>  
> +	  If unsure, say N.
> +
>  config SQUASHFS_XZ
>  	bool "Include support for XZ compressed file systems"
>  	default y
> @@ -57,3 +73,5 @@ config SQUASHFS_XZ
>  
>  	  XZ is not the standard compression used in Squashfs and so most
>  	  file systems will be readable without selecting this option.
> +
> +	  If unsure, say N.

Here unrelated Kconfig entries are changed. Also in the end we get
"default y" for SQUASHFS_XZ along with the help "If unsure, say N."
which seems inconsistent.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From iw3gtf at arcor.de  Wed Oct  5 06:23:15 2016
From: iw3gtf at arcor.de (iw3gtf at arcor.de)
Date: Wed, 5 Oct 2016 15:23:15 +0200 (CEST)
Subject: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
Message-ID: <1382352141.1327180.1475673795806.JavaMail.ngmail@webmail09.arcor-online.net>

Hi,

I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b flagged static
UBI volumes as DEVFS_IS_CHARACTER_DEV.

A consequence of this flag is that commands like:

# cp /dev/nand0.ubi_volumes.ubi.my_static_vol file

will not work because the cp command will see a src file (the static UBI volume) with a size
of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood of
"UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the console.

I tried to comment out the flag assignment, just to see what happen:

int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
{
...
	cdev->size = vol->used_bytes;

//	if (vol->vol_type == UBI_STATIC_VOLUME)
//		cdev->flags = DEVFS_IS_CHARACTER_DEV;

	cdev->dev = &vol->dev;
...

and then the cp command worked than as expected.

Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for static UBI volumes
is really needed (to avoid some other problems that my superficial test does not triggers) ?

giorgio


Giorgio, iw3gtf at arcor.de


From t.remmet at phytec.de  Thu Oct  6 01:17:27 2016
From: t.remmet at phytec.de (Teresa Remmet)
Date: Thu, 06 Oct 2016 10:17:27 +0200
Subject: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
In-Reply-To: <1382352141.1327180.1475673795806.JavaMail.ngmail@webmail09.arcor-online.net>
References: <1382352141.1327180.1475673795806.JavaMail.ngmail@webmail09.arcor-online.net>
Message-ID: <1475741847.3468.20.camel@lws-tremmet.phytec.de>

Hello Giorgio,

Am Mittwoch, den 05.10.2016, 15:23 +0200 schrieb iw3gtf at arcor.de:
> Hi,
> 
> I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b flagged static
> UBI volumes as DEVFS_IS_CHARACTER_DEV.
> 
> A consequence of this flag is that commands like:
> 
> # cp /dev/nand0.ubi_volumes.ubi.my_static_vol file
> 
> will not work because the cp command will see a src file (the static UBI volume) with a size
> of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood of
> "UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the console.
> 
> I tried to comment out the flag assignment, just to see what happen:
> 
> int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
> {
> ...
> 	cdev->size = vol->used_bytes;
> 
> //	if (vol->vol_type == UBI_STATIC_VOLUME)
> //		cdev->flags = DEVFS_IS_CHARACTER_DEV;
> 
> 	cdev->dev = &vol->dev;
> ...
> 
> and then the cp command worked than as expected.
> 
> Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for static UBI volumes
> is really needed (to avoid some other problems that my superficial test does not triggers) ?

the size of a static ubi volume device is equal to the image size you
flashed. When you create a new static ubi volume the size is 0, as it is
empty.
We need the chardev flag to be able to update the static ubi volume or
barebox will complain that there is not enough space.

Regards,
Teresa

> 
> giorgio
> 
> 
> Giorgio, iw3gtf at arcor.de
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox




From yegorslists at googlemail.com  Thu Oct  6 02:08:07 2016
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Thu, 6 Oct 2016 11:08:07 +0200
Subject: am335x: memory configuration
Message-ID: <CAGm1_ku0Vh=SC0omVMUZof3DBJhvFRPsgxg1BDEn4GGTpez9_g@mail.gmail.com>

I've submitted a patch [1] to support our Baltos systems back in the
May. There was an issue with dynamically detecting RAM size as the
systems can have either 256MB or 512MB modules.

So far u-boot was able to detect the RAM size dynamically. In order to
do so it uses following code in arch/arm/cpu/armv7/am33xx/emif4.c:

int dram_init(void)
{

#ifndef CONFIG_SKIP_LOWLEVEL_INIT
        sdram_init();
#endif

        /* dram_init must store complete ramsize in gd->ram_size */
        gd->ram_size = get_ram_size(
                        (void *)CONFIG_SYS_SDRAM_BASE,
                        CONFIG_MAX_RAM_BANK_SIZE);
        return 0;
}

void dram_init_banksize(void)
{
        gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
        gd->bd->bi_dram[0].size = gd->ram_size;
}

This peace of code will be excuted in u-boot.img (not in MLO).

In Barebox we have get_ram_size(), that provides real RAM size and
am335x_sdram_size(), that returns RAM controller settings. So far DDR
controler will be configured for 512MB regardless of the module. Hence
the return value from am335x_sdram_size() cannot be used for crating
ram0 node.

What were the best way to provide get_ram_size() from lowlevel.c to
board.c, where I would invoke:
arm_add_mem_device("ram0", 0x80000000, sdram_size);

[1] http://lists.infradead.org/pipermail/barebox/2016-May/027224.html

Yegor


From iw3gtf at arcor.de  Thu Oct  6 02:20:09 2016
From: iw3gtf at arcor.de (iw3gtf at arcor.de)
Date: Thu, 6 Oct 2016 11:20:09 +0200 (CEST)
Subject: Aw: Re: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
In-Reply-To: <1475741847.3468.20.camel@lws-tremmet.phytec.de>
References: <1475741847.3468.20.camel@lws-tremmet.phytec.de>
 <1382352141.1327180.1475673795806.JavaMail.ngmail@webmail09.arcor-online.net>
Message-ID: <2074290715.1345124.1475745609454.JavaMail.ngmail@webmail11.arcor-online.net>

 


----- Original Nachricht ----
Von:     Teresa Remmet <t.remmet at phytec.de>
An:      iw3gtf at arcor.de
Datum:   06.10.2016 10:17
Betreff: Re: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV

> Hello Giorgio,
> 
> Am Mittwoch, den 05.10.2016, 15:23 +0200 schrieb iw3gtf at arcor.de:
> > Hi,
> > 
> > I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b
> flagged static
> > UBI volumes as DEVFS_IS_CHARACTER_DEV.
> > 
> > A consequence of this flag is that commands like:
> > 
> > # cp /dev/nand0.ubi_volumes.ubi.my_static_vol file
> > 
> > will not work because the cp command will see a src file (the static UBI
> volume) with a size
> > of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood
> of
> > "UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the
> console.
> > 
> > I tried to comment out the flag assignment, just to see what happen:
> > 
> > int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
> > {
> > ...
> > 	cdev->size = vol->used_bytes;
> > 
> > //	if (vol->vol_type == UBI_STATIC_VOLUME)
> > //		cdev->flags = DEVFS_IS_CHARACTER_DEV;
> > 
> > 	cdev->dev = &vol->dev;
> > ...
> > 
> > and then the cp command worked than as expected.
> > 
> > Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for
> static UBI volumes
> > is really needed (to avoid some other problems that my superficial test
> does not triggers) ?
> 
> the size of a static ubi volume device is equal to the image size you
> flashed. When you create a new static ubi volume the size is 0, as it is
> empty.
> We need the chardev flag to be able to update the static ubi volume or
> barebox will complain that there is not enough space.
> 
> Regards,
> Teresa
> 
Hi,

thanks for the answer, I knew there must be a reason for it.

Nonetheless it is a bit annoying not to be able to simply extract the content
of a static volume.

In my application the static volume contains a barebox bootloader image for an
imx25 cpu, I used to copy it to an mtd partition at the beginning of the nand flash
with the commands: erase /dev/nand0.barebox ; cp /dev/nand0.ubi_volumes... /dev/barebox
This does not work anymore now.

With a newer imx6 cpu I use the command barebox_update -y /dev/nand0.ubi_volumes...,
this works as expected.

Maybe I should write a new barebox_update command variant for the older cpu.

giorgio


Giorgio, iw3gtf at arcor.de


From yegorslists at googlemail.com  Thu Oct  6 03:55:08 2016
From: yegorslists at googlemail.com (yegorslists at googlemail.com)
Date: Thu,  6 Oct 2016 12:55:08 +0200
Subject: [PATCH v3] Add support for Baltos systems
Message-ID: <1475751308-27894-1-git-send-email-yegorslists@googlemail.com>

From: Yegor Yefremov <yegorslists at googlemail.com>

OnRISC Baltos devices are based on a am335x SoC and can be booted
either from MMC or NAND.

Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
---
Changes:
	v3: - make hw_param a local variable
	    - implement memory size detection
	    - remove baltos_mem_init initcall
        v2: - remove typedef
            - rework invalid EEPROM content handling
            - add mmc0 as boot device for MMC boot source

 arch/arm/boards/Makefile                |   1 +
 arch/arm/boards/vscom-baltos/Makefile   |   2 +
 arch/arm/boards/vscom-baltos/board.c    | 132 ++++++++++
 arch/arm/boards/vscom-baltos/lowlevel.c | 134 ++++++++++
 arch/arm/dts/Makefile                   |   1 +
 arch/arm/dts/am335x-baltos-minimal.dts  | 439 ++++++++++++++++++++++++++++++++
 arch/arm/mach-omap/Kconfig              |   7 +
 images/Makefile.am33xx                  |   8 +
 8 files changed, 724 insertions(+)
 create mode 100644 arch/arm/boards/vscom-baltos/Makefile
 create mode 100644 arch/arm/boards/vscom-baltos/board.c
 create mode 100644 arch/arm/boards/vscom-baltos/lowlevel.c
 create mode 100644 arch/arm/dts/am335x-baltos-minimal.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 23a8dbd..da6ea0d 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -137,4 +137,5 @@ obj-$(CONFIG_MACH_VIRT2REAL)			+= virt2real/
 obj-$(CONFIG_MACH_ZEDBOARD)			+= avnet-zedboard/
 obj-$(CONFIG_MACH_ZYLONITE)			+= zylonite/
 obj-$(CONFIG_MACH_VARISCITE_MX6)		+= variscite-mx6/
+obj-$(CONFIG_MACH_VSCOM_BALTOS)			+= vscom-baltos/
 obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
diff --git a/arch/arm/boards/vscom-baltos/Makefile b/arch/arm/boards/vscom-baltos/Makefile
new file mode 100644
index 0000000..092c31d
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/Makefile
@@ -0,0 +1,2 @@
+lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/vscom-baltos/board.c b/arch/arm/boards/vscom-baltos/board.c
new file mode 100644
index 0000000..dc08ed5
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/board.c
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2008
+ * Texas Instruments, <www.ti.com>
+ * Raghavendra KH <r-khandenahally at ti.com>
+ *
+ * Copyright (C) 2012 Jan Luebbe <j.luebbe at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/**
+ * @file
+ * @brief OnRISC Baltos Specific Board Initialization routines
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <envfs.h>
+#include <environment.h>
+#include <globalvar.h>
+#include <linux/sizes.h>
+#include <net.h>
+#include <envfs.h>
+#include <bootsource.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <mach/am33xx-generic.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/gpmc.h>
+#include <linux/err.h>
+#include <mach/bbu.h>
+#include <libfile.h>
+
+static struct omap_barebox_part baltos_barebox_part = {
+	.nand_offset = SZ_512K,
+	.nand_size = 0x1e0000,
+};
+
+struct bsp_vs_hwparam {
+	uint32_t Magic;
+	uint32_t HwRev;
+	uint32_t SerialNumber;
+	char PrdDate[11];
+	uint16_t SystemId;
+	uint8_t MAC1[6];
+	uint8_t MAC2[6];
+	uint8_t MAC3[6];
+} __attribute__ ((packed));
+
+static int baltos_read_eeprom(void)
+{
+	struct bsp_vs_hwparam hw_param;
+	size_t size;
+	char *buf, var_buf[32];
+	int rc;
+	unsigned char mac_addr[6];
+
+	rc = read_file_2("/dev/eeprom0",
+			 &size,
+			 (void *)&buf,
+			 sizeof(hw_param));
+	if (rc && rc != -EFBIG)
+		return rc;
+
+	memcpy(&hw_param, buf, sizeof(hw_param));
+
+	free(buf);
+
+	if (hw_param.Magic == 0xDEADBEEF) {
+		/* setup MAC1 */
+		mac_addr[0] = hw_param.MAC1[0];
+		mac_addr[1] = hw_param.MAC1[1];
+		mac_addr[2] = hw_param.MAC1[2];
+		mac_addr[3] = hw_param.MAC1[3];
+		mac_addr[4] = hw_param.MAC1[4];
+		mac_addr[5] = hw_param.MAC1[5];
+
+		eth_register_ethaddr(0, mac_addr);
+
+		/* setup MAC2 */
+		mac_addr[0] = hw_param.MAC2[0];
+		mac_addr[1] = hw_param.MAC2[1];
+		mac_addr[2] = hw_param.MAC2[2];
+		mac_addr[3] = hw_param.MAC2[3];
+		mac_addr[4] = hw_param.MAC2[4];
+		mac_addr[5] = hw_param.MAC2[5];
+
+		eth_register_ethaddr(1, mac_addr);
+	} else {
+		printf("Baltos: incorrect magic number (0x%x) "
+		       "in EEPROM\n",
+		       hw_param.Magic);
+
+		hw_param.SystemId = 0;
+	}
+
+	sprintf(var_buf, "%d", hw_param.SystemId);
+	globalvar_add_simple("board.id", var_buf);
+
+	return 0;
+}
+environment_initcall(baltos_read_eeprom);
+
+static int baltos_devices_init(void)
+{
+	if (!of_machine_is_compatible("vscom,onrisc"))
+		return 0;
+
+	globalvar_add_simple("board.variant", "baltos");
+
+	if (bootsource_get() == BOOTSOURCE_MMC)
+		omap_set_bootmmc_devname("mmc0");
+
+	omap_set_barebox_part(&baltos_barebox_part);
+
+	if (IS_ENABLED(CONFIG_SHELL_NONE))
+		return am33xx_of_register_bootdevice();
+
+	return 0;
+}
+coredevice_initcall(baltos_devices_init);
diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c
new file mode 100644
index 0000000..8bce91a
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/lowlevel.c
@@ -0,0 +1,134 @@
+#include <common.h>
+#include <init.h>
+#include <linux/sizes.h>
+#include <io.h>
+#include <linux/string.h>
+#include <debug_ll.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/am33xx-clock.h>
+#include <mach/generic.h>
+#include <mach/sdrc.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/am33xx-mux.h>
+#include <mach/am33xx-generic.h>
+#include <mach/wdt.h>
+
+static const struct am33xx_ddr_data ddr3_data = {
+	.rd_slave_ratio0        = 0x38,
+	.wr_dqs_slave_ratio0    = 0x44,
+	.fifo_we_slave_ratio0	= 0x94,
+	.wr_slave_ratio0        = 0x7D,
+	.use_rank0_delay	= 0x01,
+	.dll_lock_diff0		= 0x0,
+};
+
+static const struct am33xx_cmd_control ddr3_cmd_ctrl = {
+	.slave_ratio0	= 0x80,
+	.dll_lock_diff0	= 0x1,
+	.invert_clkout0	= 0x0,
+	.slave_ratio1	= 0x80,
+	.dll_lock_diff1	= 0x1,
+	.invert_clkout1	= 0x0,
+	.slave_ratio2	= 0x80,
+	.dll_lock_diff2	= 0x1,
+	.invert_clkout2	= 0x0,
+};
+
+static const struct am33xx_emif_regs ddr3_regs = {
+	.emif_read_latency	= 0x100007,
+	.emif_tim1		= 0x0AAAD4DB,
+	.emif_tim2		= 0x266B7FDA,
+	.emif_tim3		= 0x501F867F,
+	.zq_config		= 0x50074BE4,
+	.sdram_config		= 0x61C05332,
+	.sdram_config2		= 0x0,
+	.sdram_ref_ctrl		= 0xC30,
+};
+
+static const struct am33xx_ddr_data ddr3_data_256mb = {
+	.rd_slave_ratio0	= 0x36,
+	.wr_dqs_slave_ratio0	= 0x38,
+	.fifo_we_slave_ratio0	= 0x99,
+	.wr_slave_ratio0	= 0x73,
+};
+
+static const struct am33xx_emif_regs ddr3_regs_256mb = {
+	.emif_read_latency	= 0x7,
+	.emif_tim1		= 0x0AAAD4DB,
+	.emif_tim2		= 0x26437FDA,
+	.emif_tim3		= 0x501F83FF,
+	.sdram_config		= 0x61C052B2,
+	.zq_config		= 0x50074BE4,
+	.sdram_ref_ctrl		= 0x00000C30,
+
+};
+
+extern char __dtb_am335x_baltos_minimal_start[];
+
+/**
+ * @brief The basic entry point for board initialization.
+ *
+ * This is called as part of machine init (after arch init).
+ * This is again called with stack in SRAM, so not too many
+ * constructs possible here.
+ *
+ * @return void
+ */
+static noinline int baltos_sram_init(void)
+{
+	uint32_t sdram_size;
+	void *fdt;
+
+	fdt = __dtb_am335x_baltos_minimal_start;
+
+	/* WDT1 is already running when the bootloader gets control
+	 * Disable it to avoid "random" resets
+	 */
+	__raw_writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
+	while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+	__raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
+	while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+	/* Setup the PLLs and the clocks for the peripherals */
+	am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_400);
+	am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data);
+	sdram_size = get_ram_size((void *)0x80000000, (1024 << 20));
+	if (sdram_size == SZ_256M)
+		am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs_256mb,
+				&ddr3_data_256mb);
+
+	am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
+	am33xx_enable_uart0_pin_mux();
+	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
+	putc_ll('>');
+
+	am335x_barebox_entry(fdt);
+}
+
+ENTRY_FUNCTION(start_am33xx_baltos_sram, bootinfo, r1, r2)
+{
+	am33xx_save_bootinfo((void *)bootinfo);
+
+	/*
+	 * Setup C environment, the board init code uses global variables.
+	 * Stackpointer has already been initialized by the ROM code.
+	 */
+	relocate_to_current_adr();
+	setup_c();
+
+	baltos_sram_init();
+}
+
+ENTRY_FUNCTION(start_am33xx_baltos_sdram, r0, r1, r2)
+{
+	void *fdt;
+
+	fdt = __dtb_am335x_baltos_minimal_start;
+
+	fdt -= get_runtime_offset();
+
+	am335x_barebox_entry(fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d1a3fe8..765cd59 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -76,5 +76,6 @@ pbl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o
 pbl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
 pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
+pbl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o
 
 clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
diff --git a/arch/arm/dts/am335x-baltos-minimal.dts b/arch/arm/dts/am335x-baltos-minimal.dts
new file mode 100644
index 0000000..13eb91c
--- /dev/null
+++ b/arch/arm/dts/am335x-baltos-minimal.dts
@@ -0,0 +1,439 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * VScom OnRISC
+ * http://www.vscom.de
+ */
+
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+	model = "OnRISC Baltos";
+	compatible = "vscom,onrisc", "ti,am33xx";
+
+	chosen {
+		linux,stdout-path = &uart0;
+	};
+
+	cpus {
+		cpu at 0 {
+			cpu0-supply = <&vdd1_reg>;
+		};
+	};
+
+	vbat: fixedregulator at 0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vbat";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+	};
+};
+
+&am33xx_pinmux {
+	mmc1_pins: pinmux_mmc1_pins {
+		pinctrl-single,pins = <
+			0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat3.mmc0_dat3 */
+			0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat2.mmc0_dat2 */
+			0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat1.mmc0_dat1 */
+			0xfc (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat0.mmc0_dat0 */
+			0x100 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_clk.mmc0_clk */
+			0x104 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_cmd.mmc0_cmd */
+		>;
+	};
+
+	i2c1_pins: pinmux_i2c1_pins {
+		pinctrl-single,pins = <
+			0x158 0x2a      /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */
+			0x15c 0x2a      /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */
+		>;
+	};
+
+	tps65910_pins: pinmux_tps65910_pins {
+		pinctrl-single,pins = <
+			0x078 (PIN_INPUT_PULLUP | MUX_MODE7)      /* gpmc_ben1.gpio1[28] */
+		>;
+
+	};
+	tca6416_pins: pinmux_tca6416_pins {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
+		>;
+	};
+
+	uart0_pins: pinmux_uart0_pins {
+		pinctrl-single,pins = <
+			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
+			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)		/* uart0_txd.uart0_txd */
+		>;
+	};
+
+	cpsw_default: cpsw_default {
+		pinctrl-single,pins = <
+			/* Slave 1 */
+			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)       /* mii1_crs.rmii1_crs_dv */
+			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_tx_en.rmii1_txen */
+			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd1.rmii1_txd1 */
+			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd0.rmii1_txd0 */
+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd1.rmii1_rxd1 */
+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd0.rmii1_rxd0 */
+			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)      /* rmii1_ref_clk.rmii1_refclk */
+
+
+			/* Slave 2 */
+			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
+			0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
+			0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
+			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
+			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
+			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
+			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
+			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
+			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
+			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
+		>;
+	};
+
+	cpsw_sleep: cpsw_sleep {
+		pinctrl-single,pins = <
+			/* Slave 1 reset value */
+			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+
+			/* Slave 2 reset value*/
+			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+		>;
+	};
+
+	davinci_mdio_default: davinci_mdio_default {
+		pinctrl-single,pins = <
+			/* MDIO */
+			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
+			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
+		>;
+	};
+
+	davinci_mdio_sleep: davinci_mdio_sleep {
+		pinctrl-single,pins = <
+			/* MDIO reset value */
+			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+		>;
+	};
+
+	nandflash_pins_s0: nandflash_pins_s0 {
+		pinctrl-single,pins = <
+			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
+			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
+			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
+			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
+			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
+			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
+			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
+			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
+			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
+			0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
+			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
+			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
+			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
+			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
+			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
+		>;
+	};
+};
+
+&elm {
+	status = "okay";
+};
+
+&gpmc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&nandflash_pins_s0>;
+	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
+	status = "okay";
+
+	nand at 0,0 {
+		reg = <0 0 0>; /* CS0, offset 0 */
+		nand-bus-width = <8>;
+		ti,nand-ecc-opt = "bch8";
+		ti,nand-xfer-type = "polled";
+
+		gpmc,device-nand = "true";
+		gpmc,device-width = <1>;
+		gpmc,sync-clk-ps = <0>;
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <44>;
+		gpmc,cs-wr-off-ns = <44>;
+		gpmc,adv-on-ns = <6>;
+		gpmc,adv-rd-off-ns = <34>;
+		gpmc,adv-wr-off-ns = <44>;
+		gpmc,we-on-ns = <0>;
+		gpmc,we-off-ns = <40>;
+		gpmc,oe-on-ns = <0>;
+		gpmc,oe-off-ns = <54>;
+		gpmc,access-ns = <64>;
+		gpmc,rd-cycle-ns = <82>;
+		gpmc,wr-cycle-ns = <82>;
+		gpmc,wait-on-read = "true";
+		gpmc,wait-on-write = "true";
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <0>;
+		gpmc,clk-activation-ns = <0>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,wr-access-ns = <40>;
+		gpmc,wr-data-mux-bus-ns = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		elm_id = <&elm>;
+
+		boot at 0 {
+		       label = "SPL";
+		       reg = <0x0 0x20000>;
+		};
+		boot at 20000{
+		       label = "SPL.backup1";
+		       reg = <0x20000 0x20000>;
+		};
+		boot at 40000 {
+		       label = "SPL.backup2";
+		       reg = <0x40000 0x20000>;
+		};
+		boot at 60000 {
+		       label = "SPL.backup3";
+		       reg = <0x60000 0x20000>;
+		};
+		boot at 80000 {
+		       label = "u-boot";
+		       reg = <0x80000 0x1e0000>;
+		};
+		boot at 260000 {
+		       label = "UBI";
+		       reg = <0x260000 0xfda0000>;
+		};
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+
+	status = "okay";
+};
+
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_pins>;
+
+	status = "okay";
+	clock-frequency = <1000>;
+
+	tps: tps at 2d {
+		reg = <0x2d>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <28 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tps65910_pins>;
+	};
+
+	at24 at 50 {
+		compatible = "at24,24c02";
+		pagesize = <8>;
+		reg = <0x50>;
+	};
+
+	tca6416: gpio at 20 {
+		compatible = "ti,tca6416";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <20 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tca6416_pins>;
+	};
+};
+
+&usb {
+	status = "okay";
+};
+
+&usb_ctrl_mod {
+	status = "okay";
+};
+
+&usb0_phy {
+	status = "okay";
+};
+
+&usb1_phy {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&usb1 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&cppi41dma  {
+	status = "okay";
+};
+
+/include/ "tps65910.dtsi"
+
+&tps {
+	vcc1-supply = <&vbat>;
+	vcc2-supply = <&vbat>;
+	vcc3-supply = <&vbat>;
+	vcc4-supply = <&vbat>;
+	vcc5-supply = <&vbat>;
+	vcc6-supply = <&vbat>;
+	vcc7-supply = <&vbat>;
+	vccio-supply = <&vbat>;
+
+	ti,en-ck32k-xtal = <1>;
+
+	regulators {
+		vrtc_reg: regulator at 0 {
+			regulator-always-on;
+		};
+
+		vio_reg: regulator at 1 {
+			regulator-always-on;
+		};
+
+		vdd1_reg: regulator at 2 {
+			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+			regulator-name = "vdd_mpu";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1312500>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd2_reg: regulator at 3 {
+			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+			regulator-name = "vdd_core";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1150000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd3_reg: regulator at 4 {
+			regulator-always-on;
+		};
+
+		vdig1_reg: regulator at 5 {
+			regulator-always-on;
+		};
+
+		vdig2_reg: regulator at 6 {
+			regulator-always-on;
+		};
+
+		vpll_reg: regulator at 7 {
+			regulator-always-on;
+		};
+
+		vdac_reg: regulator at 8 {
+			regulator-always-on;
+		};
+
+		vaux1_reg: regulator at 9 {
+			regulator-always-on;
+		};
+
+		vaux2_reg: regulator at 10 {
+			regulator-always-on;
+		};
+
+		vaux33_reg: regulator at 11 {
+			regulator-always-on;
+		};
+
+		vmmc_reg: regulator at 12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+	};
+};
+
+&mac {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&cpsw_default>;
+	pinctrl-1 = <&cpsw_sleep>;
+	dual_emac = <1>;
+
+	status = "okay";
+};
+
+&davinci_mdio {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&davinci_mdio_default>;
+	pinctrl-1 = <&davinci_mdio_sleep>;
+
+	status = "okay";
+};
+
+&cpsw_emac0 {
+	phy_id = <&davinci_mdio>, <0>;
+	phy-mode = "rmii";
+	dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+	phy_id = <&davinci_mdio>, <7>;
+	phy-mode = "rgmii-txid";
+	dual_emac_res_vlan = <2>;
+};
+
+&phy_sel {
+	rmii-clock-ext = <1>;
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&vmmc_reg>;
+	status = "okay";
+};
+
+&gpio0 {
+	ti,no-reset-on-init;
+};
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index d7c863c..a1bb8f0 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -184,6 +184,13 @@ config MACH_PHYTEC_SOM_AM335X
 	select ARCH_AM33XX
 	help
 	  Say Y here if you are using a am335x based Phytecs SOM
+
+config MACH_VSCOM_BALTOS
+	bool "VScom Baltos Devices"
+	select ARCH_AM33XX
+	help
+	  Say Y here if you are using a am335x based VScom Baltos devices
+
 endif
 
 choice
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index 8be78ef..8168fe4 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -135,6 +135,14 @@ pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sram
 FILE_barebox-am33xx-beaglebone-mlo.img = start_am33xx_beaglebone_sram.pblx.mlo
 am33xx-mlo-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone-mlo.img
 
+pblx-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sdram
+FILE_barebox-am33xx-baltos.img = start_am33xx_baltos_sdram.pblx
+am33xx-barebox-$(CONFIG_MACH_VSCOM_BALTOS) += barebox-am33xx-baltos.img
+
+pblx-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sram
+FILE_barebox-am33xx-baltos-mlo.img = start_am33xx_baltos_sram.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_VSCOM_BALTOS) += barebox-am33xx-baltos-mlo.img
+
 ifdef CONFIG_OMAP_BUILD_IFT
 image-y += $(am33xx-mlo-y)
 else
-- 
2.1.4



From J.Remmet at phytec.de  Thu Oct  6 06:45:45 2016
From: J.Remmet at phytec.de (Jan Remmet)
Date: Thu, 6 Oct 2016 15:45:45 +0200
Subject: am335x: memory configuration
In-Reply-To: <CAGm1_ku0Vh=SC0omVMUZof3DBJhvFRPsgxg1BDEn4GGTpez9_g@mail.gmail.com>
References: <CAGm1_ku0Vh=SC0omVMUZof3DBJhvFRPsgxg1BDEn4GGTpez9_g@mail.gmail.com>
Message-ID: <20161006134545.GA7434@lws-weitzel2@phytec.de>

On Thu, Oct 06, 2016 at 11:08:07AM +0200, Yegor Yefremov wrote:
> I've submitted a patch [1] to support our Baltos systems back in the
> May. There was an issue with dynamically detecting RAM size as the
> systems can have either 256MB or 512MB modules.
> 
> So far u-boot was able to detect the RAM size dynamically. In order to
> do so it uses following code in arch/arm/cpu/armv7/am33xx/emif4.c:
> 
> int dram_init(void)
> {
> 
> #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>         sdram_init();
> #endif
> 
>         /* dram_init must store complete ramsize in gd->ram_size */
>         gd->ram_size = get_ram_size(
>                         (void *)CONFIG_SYS_SDRAM_BASE,
>                         CONFIG_MAX_RAM_BANK_SIZE);
>         return 0;
> }
> 
> void dram_init_banksize(void)
> {
>         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
>         gd->bd->bi_dram[0].size = gd->ram_size;
> }
> 
> This peace of code will be excuted in u-boot.img (not in MLO).
> 
> In Barebox we have get_ram_size(), that provides real RAM size and
> am335x_sdram_size(), that returns RAM controller settings. So far DDR
> controler will be configured for 512MB regardless of the module. Hence
> the return value from am335x_sdram_size() cannot be used for crating
> ram0 node.
On our am335x boards we use MLOs with individual RAM timings and EMIF config
values. So am335x_sdram_size works fine in barebox.bin.
Maybe get_ram_size works if the timing settings are equal?

Jan
> 
> What were the best way to provide get_ram_size() from lowlevel.c to
> board.c, where I would invoke:
> arm_add_mem_device("ram0", 0x80000000, sdram_size);
> 
> [1] http://lists.infradead.org/pipermail/barebox/2016-May/027224.html
> 
> Yegor
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From yegorslists at googlemail.com  Thu Oct  6 06:50:24 2016
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Thu, 6 Oct 2016 15:50:24 +0200
Subject: am335x: memory configuration
In-Reply-To: <57f65594.d4491c0a.37103.324dSMTPIN_ADDED_BROKEN@mx.google.com>
References: <CAGm1_ku0Vh=SC0omVMUZof3DBJhvFRPsgxg1BDEn4GGTpez9_g@mail.gmail.com>
 <57f65594.d4491c0a.37103.324dSMTPIN_ADDED_BROKEN@mx.google.com>
Message-ID: <CAGm1_ktk+pAF1+XLTdDa40TJesuxZk+518NCKeMhG72w1P6R7g@mail.gmail.com>

Hi Jan,

On Thu, Oct 6, 2016 at 3:45 PM, Jan Remmet <J.Remmet at phytec.de> wrote:
> On Thu, Oct 06, 2016 at 11:08:07AM +0200, Yegor Yefremov wrote:
>> I've submitted a patch [1] to support our Baltos systems back in the
>> May. There was an issue with dynamically detecting RAM size as the
>> systems can have either 256MB or 512MB modules.
>>
>> So far u-boot was able to detect the RAM size dynamically. In order to
>> do so it uses following code in arch/arm/cpu/armv7/am33xx/emif4.c:
>>
>> int dram_init(void)
>> {
>>
>> #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>>         sdram_init();
>> #endif
>>
>>         /* dram_init must store complete ramsize in gd->ram_size */
>>         gd->ram_size = get_ram_size(
>>                         (void *)CONFIG_SYS_SDRAM_BASE,
>>                         CONFIG_MAX_RAM_BANK_SIZE);
>>         return 0;
>> }
>>
>> void dram_init_banksize(void)
>> {
>>         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
>>         gd->bd->bi_dram[0].size = gd->ram_size;
>> }
>>
>> This peace of code will be excuted in u-boot.img (not in MLO).
>>
>> In Barebox we have get_ram_size(), that provides real RAM size and
>> am335x_sdram_size(), that returns RAM controller settings. So far DDR
>> controler will be configured for 512MB regardless of the module. Hence
>> the return value from am335x_sdram_size() cannot be used for crating
>> ram0 node.
> On our am335x boards we use MLOs with individual RAM timings and EMIF config
> values. So am335x_sdram_size works fine in barebox.bin.
> Maybe get_ram_size works if the timing settings are equal?

I've solved the problem the way Sascha proposed earlier (see the third
version of my patch sent today).

In MLO I setup memory controller to 512MB, then I check the real
amount via  get_ram_size() and if I have 256MB I just reinitialize the
memory controller with values for 256Mb i.e. rows 14 instead of 15.
With this done one can use am335x_sdram_size() in other parts of
berebox.

Thanks for the feedback.

Yegor


From yegorslists at googlemail.com  Thu Oct  6 06:55:06 2016
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Thu, 6 Oct 2016 15:55:06 +0200
Subject: [PATCH 4/5] Add filetype and detection for squashfs images
In-Reply-To: <20161004101048.12970-5-ejo@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-5-ejo@pengutronix.de>
Message-ID: <CAGm1_kvFujU0QcCdmREtbRfU7J_vQgMnJvs9k=dpR3PQ=9+_6g@mail.gmail.com>

Hi Enrico,

On Tue, Oct 4, 2016 at 12:10 PM, Enrico Jorns <ejo at pengutronix.de> wrote:
> This adds `filetype_squashfs` to the list of known filetypes and adds a
> detection for squashfs files to file_detect_type(). This currently
> matches on the `hsqs` start sequence of an image file.
>
> Additionally, the newly introduced filetype is registered as the type of
> the squashfs_driver which allows, for example, to mount squashfs without
> the need to specify a type parameter.
>
> This changes enable booting a squashfs with the simple `boot` command
> pointing to the location (device) that holds the squashfs.
>
> Note that booting with blspec is limited as the current squashfs driver
> is not capable of handling symbolic links.

Glad to see SquashFS will be used not only by myself :-)

Could you explain how one can write a rootfs.sqaushfs to a ubiblock
from Linux and then what steps are needed in barebox?

So far I've only found this info about ubiblock:
http://www.linux-mtd.infradead.org/doc/ubi.html#L_ubiblock, but it
doesn't say much.

My actions were:

ubiattach -p /dev/mtd5
ubiblock --create /dev/ubi0_0
ubiupdatevol /dev/ubi0_0 rootfs.squashfs

Can I mount /dev/ubi0_0 via mount? If yes, what parameters I should use?

How can I mount this volume in barebox step-by-step?

Thanks.

Yegor

> Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
> ---
>  common/filetype.c      | 4 ++++
>  fs/squashfs/squashfs.c | 1 +
>  include/filetype.h     | 1 +
>  3 files changed, 6 insertions(+)
>
> diff --git a/common/filetype.c b/common/filetype.c
> index 4728f87..8d72933 100644
> --- a/common/filetype.c
> +++ b/common/filetype.c
> @@ -40,6 +40,7 @@ static const struct filetype_str filetype_str[] = {
>         [filetype_uimage] = { "U-Boot uImage", "u-boot" },
>         [filetype_ubi] = { "UBI image", "ubi" },
>         [filetype_jffs2] = { "JFFS2 image", "jffs2" },
> +       [filetype_squashfs] = { "Squashfs image", "squashfs" },
>         [filetype_gzip] = { "GZIP compressed", "gzip" },
>         [filetype_bzip2] = { "BZIP2 compressed", "bzip2" },
>         [filetype_oftree] = { "open firmware Device Tree flattened Binary", "dtb" },
> @@ -278,6 +279,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
>         if (buf8[0] == 0xfd && buf8[1] == 0x37 && buf8[2] == 0x7a &&
>                         buf8[3] == 0x58 && buf8[4] == 0x5a && buf8[5] == 0x00)
>                 return filetype_xz_compressed;
> +       if (buf8[0] == 'h' && buf8[1] == 's' && buf8[2] == 'q' &&
> +                       buf8[3] == 's')
> +               return filetype_squashfs;
>         if (buf[0] == be32_to_cpu(0xd00dfeed))
>                 return filetype_oftree;
>         if (strncmp(buf8, "ANDROID!", 8) == 0)
> diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
> index d00dee6..6d04681 100644
> --- a/fs/squashfs/squashfs.c
> +++ b/fs/squashfs/squashfs.c
> @@ -353,6 +353,7 @@ static struct fs_driver_d squashfs_driver = {
>         .readdir        = squashfs_readdir,
>         .closedir       = squashfs_closedir,
>         .stat           = squashfs_stat,
> +       .type           = filetype_squashfs,
>         .drv = {
>                 .probe = squashfs_probe,
>                 .remove = squashfs_remove,
> diff --git a/include/filetype.h b/include/filetype.h
> index cde73c1..65bd6ef 100644
> --- a/include/filetype.h
> +++ b/include/filetype.h
> @@ -16,6 +16,7 @@ enum filetype {
>         filetype_uimage,
>         filetype_ubi,
>         filetype_jffs2,
> +       filetype_squashfs,
>         filetype_gzip,
>         filetype_bzip2,
>         filetype_oftree,
> --
> 2.9.3
>
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From ejo at pengutronix.de  Thu Oct  6 07:10:36 2016
From: ejo at pengutronix.de (Enrico Joerns)
Date: Thu, 6 Oct 2016 16:10:36 +0200
Subject: [PATCH 4/5] Add filetype and detection for squashfs images
In-Reply-To: <CAGm1_kvFujU0QcCdmREtbRfU7J_vQgMnJvs9k=dpR3PQ=9+_6g@mail.gmail.com>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-5-ejo@pengutronix.de>
 <CAGm1_kvFujU0QcCdmREtbRfU7J_vQgMnJvs9k=dpR3PQ=9+_6g@mail.gmail.com>
Message-ID: <7945e859-d844-9c44-f776-87e35ffc27e3@pengutronix.de>

Hi Yegor,

On 10/06/2016 03:55 PM, Yegor Yefremov wrote:
> On Tue, Oct 4, 2016 at 12:10 PM, Enrico Jorns <ejo at pengutronix.de> wrote:
>> This adds `filetype_squashfs` to the list of known filetypes and adds a
>> detection for squashfs files to file_detect_type(). This currently
>> matches on the `hsqs` start sequence of an image file.
>>
>> Additionally, the newly introduced filetype is registered as the type of
>> the squashfs_driver which allows, for example, to mount squashfs without
>> the need to specify a type parameter.
>>
>> This changes enable booting a squashfs with the simple `boot` command
>> pointing to the location (device) that holds the squashfs.
>>
>> Note that booting with blspec is limited as the current squashfs driver
>> is not capable of handling symbolic links.
>
> Glad to see SquashFS will be used not only by myself :-)

glad to see that, too ;)

> Could you explain how one can write a rootfs.sqaushfs to a ubiblock
> from Linux and then what steps are needed in barebox?
>
> So far I've only found this info about ubiblock:
> http://www.linux-mtd.infradead.org/doc/ubi.html#L_ubiblock, but it
> doesn't say much.

Yes, the informations provided are a bit sparse..

> My actions were:
>
> ubiattach -p /dev/mtd5
> ubiblock --create /dev/ubi0_0
> ubiupdatevol /dev/ubi0_0 rootfs.squashfs
>
> Can I mount /dev/ubi0_0 via mount? If yes, what parameters I should use?

The above commands look pretty similar to what I did. Mounting the 
ubiblock device does work too, with a little pitfall, mount will be 
confused by having a read-only file system but nobody told it before.
So you must do

   mount -o ro /dev/ubiblock0_0 /mnt/test

> How can I mount this volume in barebox step-by-step?

Using it in barebox is pretty easy, as the ubiblock layer is not 
required there:

   ubiattach /dev/nand0.root
   ubiupdatevol /dev/nand0.root.ubi.ubivolname rootfs.squashfs
   mkdir /mnt/test
   mount /dev/nand0.root.ubi.ubivolname /mnt/test


To boot via bootspec form a ubi containing a squashfs, you simply need to

   boot /dev/nand0.root.ubi.ubivolname


Hope that helps.


Best regards, Enrico

-- 
Pengutronix e.K.                           | Enrico J?rns                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-5080 |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



From s.hauer at pengutronix.de  Fri Oct  7 00:09:08 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri,  7 Oct 2016 09:09:08 +0200
Subject: [PATCH 2/2] completion: Fix completion for devices with a dot in the
 name
In-Reply-To: <20161007070908.14855-1-s.hauer@pengutronix.de>
References: <20161007070908.14855-1-s.hauer@pengutronix.de>
Message-ID: <20161007070908.14855-2-s.hauer@pengutronix.de>

Devices can have a dot in the name, so do not expect the full
device name before the first dot.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/complete.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/common/complete.c b/common/complete.c
index aee21ea..2dab7d1 100644
--- a/common/complete.c
+++ b/common/complete.c
@@ -279,7 +279,7 @@ static int env_param_complete(struct string_list *sl, char *instr, int eval)
 	struct env_context *c;
 	char *instr_param;
 	int len;
-	char end = '=';
+	char end = '=', *pos, *dot;
 	char *begin = "";
 
 	if (!instr)
@@ -290,7 +290,6 @@ static int env_param_complete(struct string_list *sl, char *instr, int eval)
 		end = ' ';
 	}
 
-	instr_param = strchr(instr, '.');
 	len = strlen(instr);
 
 	c = get_current_context();
@@ -312,20 +311,21 @@ static int env_param_complete(struct string_list *sl, char *instr, int eval)
 		c = c->parent;
 	}
 
-	if (instr_param) {
+	pos = instr;
+	while ((dot = strchr(pos, '.'))) {
 		char *devname;
 
-		len = (instr_param - instr);
-
-		devname = xstrndup(instr, len);
+		devname = xstrndup(instr, dot - instr);
 
 		instr_param++;
 
 		dev = get_device_by_name(devname);
 		free(devname);
+
 		if (dev)
-			device_param_complete(dev, sl, instr_param, eval);
-		return 0;
+			device_param_complete(dev, sl, dot + 1, eval);
+
+		pos = dot + 1;
 	}
 
 	len = strlen(instr);
-- 
2.9.3



From s.hauer at pengutronix.de  Fri Oct  7 00:09:07 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri,  7 Oct 2016 09:09:07 +0200
Subject: [PATCH 1/2] Allow device parameters for devices with dots in name
Message-ID: <20161007070908.14855-1-s.hauer@pengutronix.de>

Devices can have a dot in the name, so we can't expect to find the
full device name before the first dot. Currently parameters of devices
with a dot in the name are inaccessible from the shell.
Fix this by iterating over the possible device name / parameter name
combinations to find a existing combination.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/env.c | 48 ++++++++++++++++++++++++++++++++++--------------
 1 file changed, 34 insertions(+), 14 deletions(-)

diff --git a/common/env.c b/common/env.c
index 6f736d5..df8a4df 100644
--- a/common/env.c
+++ b/common/env.c
@@ -135,26 +135,46 @@ static const char *getenv_raw(struct list_head *l, const char *name)
 	return NULL;
 }
 
-const char *getenv (const char *name)
+static const char *dev_getenv(const char *name)
 {
-	struct env_context *c;
-	const char *val;
+	const char *pos, *val, *dot, *varname;
+	char *devname;
+	struct device_d *dev;
+
+	pos = name;
+
+	while (1) {
+		dot = strchr(pos, '.');
+		if (!dot)
+			break;
+
+		devname = xstrndup(name, dot - name);
+		varname = dot + 1;
+
+		dev = get_device_by_name(devname);
+
+		free(devname);
 
-	if (strchr(name, '.')) {
-		const char *ret = NULL;
-		char *devstr = strdup(name);
-		char *par = strchr(devstr, '.');
-		struct device_d *dev;
-		*par = 0;
-		dev = get_device_by_name(devstr);
 		if (dev) {
-				par++;
-				ret = dev_get_param(dev, par);
+			val = dev_get_param(dev, varname);
+			if (val)
+				return val;
 		}
-		free(devstr);
-		return ret;
+
+		pos = dot + 1;
 	}
 
+	return NULL;
+}
+
+const char *getenv(const char *name)
+{
+	struct env_context *c;
+	const char *val;
+
+	if (strchr(name, '.'))
+		return dev_getenv(name);
+
 	c = context;
 
 	val = getenv_raw(&c->local, name);
-- 
2.9.3



From s.hauer at pengutronix.de  Fri Oct  7 00:27:20 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 7 Oct 2016 09:27:20 +0200
Subject: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
In-Reply-To: <1475741847.3468.20.camel@lws-tremmet.phytec.de>
References: <1382352141.1327180.1475673795806.JavaMail.ngmail@webmail09.arcor-online.net>
 <1475741847.3468.20.camel@lws-tremmet.phytec.de>
Message-ID: <20161007072720.u3c7k6qv4pphlihz@pengutronix.de>

On Thu, Oct 06, 2016 at 10:17:27AM +0200, Teresa Remmet wrote:
> Hello Giorgio,
> 
> Am Mittwoch, den 05.10.2016, 15:23 +0200 schrieb iw3gtf at arcor.de:
> > Hi,
> > 
> > I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b flagged static
> > UBI volumes as DEVFS_IS_CHARACTER_DEV.
> > 
> > A consequence of this flag is that commands like:
> > 
> > # cp /dev/nand0.ubi_volumes.ubi.my_static_vol file
> > 
> > will not work because the cp command will see a src file (the static UBI volume) with a size
> > of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood of
> > "UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the console.
> > 
> > I tried to comment out the flag assignment, just to see what happen:
> > 
> > int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
> > {
> > ...
> > 	cdev->size = vol->used_bytes;
> > 
> > //	if (vol->vol_type == UBI_STATIC_VOLUME)
> > //		cdev->flags = DEVFS_IS_CHARACTER_DEV;
> > 
> > 	cdev->dev = &vol->dev;
> > ...
> > 
> > and then the cp command worked than as expected.
> > 
> > Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for static UBI volumes
> > is really needed (to avoid some other problems that my superficial test does not triggers) ?
> 
> the size of a static ubi volume device is equal to the image size you
> flashed. When you create a new static ubi volume the size is 0, as it is
> empty.
> We need the chardev flag to be able to update the static ubi volume or
> barebox will complain that there is not enough space.

Then I think we need another solution for that. UBI volumes are clearly
not character devices, so we shouldn't set this flag to work around
other issues we have.

Currently devfs_truncate is implemented like:

static int devfs_truncate(struct device_d *dev, FILE *f, ulong size)
{
        if (f->fsdev->dev.num_resources < 1)
                return -ENOSPC;
        if (size > resource_size(&f->fsdev->dev.resource[0]))
                return -ENOSPC;
        return 0;
}

Maybe we need an optional cdev->ops->truncate() to let the UBI volumes be
able to overwrite this behaviour?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct  7 00:56:02 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 7 Oct 2016 09:56:02 +0200
Subject: [PATCH 04/20] i.MX: Add support for VF610 Tower board
In-Reply-To: <CAHQ1cqFpyRK7EGq112s8+jGf=km15EobPQ3yR3HPK38QdCsQCw@mail.gmail.com>
References: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
 <1475505657-898-5-git-send-email-andrew.smirnov@gmail.com>
 <20161004063214.2rguzsvtq4aste5x@pengutronix.de>
 <CAHQ1cqFpyRK7EGq112s8+jGf=km15EobPQ3yR3HPK38QdCsQCw@mail.gmail.com>
Message-ID: <20161007075602.2ctkqsaxbhk5rnkl@pengutronix.de>

On Tue, Oct 04, 2016 at 06:34:45AM -0700, Andrey Smirnov wrote:
> On Mon, Oct 3, 2016 at 11:32 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> >> +static int vf610_twr_sdhc1_clock_init(void)
> >> +{
> >> +     int err;
> >> +     struct clk *esdhc1_div, *esdhc1_div_parent;
> >> +
> >> +     if (!of_machine_is_compatible("fsl,vf610-twr"))
> >> +             return 0;
> >> +
> >> +     esdhc1_div = clk_lookup("esdhc1_div");
> >> +
> >> +     if (IS_ERR(esdhc1_div))
> >> +             return PTR_ERR(esdhc1_div);
> >> +
> >> +     esdhc1_div_parent = clk_get_parent(esdhc1_div);
> >> +     if (IS_ERR(esdhc1_div_parent))
> >> +             return PTR_ERR(esdhc1_div_parent);
> >> +
> >> +     err = clk_set_rate(esdhc1_div,
> >> +                        clk_get_rate(esdhc1_div_parent));
> >> +     if (err)
> >> +             return err;
> >> +
> >> +     clk_put(esdhc1_div);
> >> +
> >> +     return 0;
> >> +}
> >> +coredevice_initcall(vf610_twr_sdhc1_clock_init);
> >
> > What's the background for this? Should it be made SoC specific?
> 
> The divider that peripheral bus clock is connected to before that
> clock goes to SDHC controller is not set to one, so if this is not set
> the parent clock ends up being something around 12Mhz.

This sounds like this should be done in the CCM init code as part of the
"bring the clocks to sane defaults", possibly for the other SDHC
controllers aswell.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct  7 01:16:59 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 7 Oct 2016 10:16:59 +0200
Subject: [PATCH v3] Add support for Baltos systems
In-Reply-To: <1475751308-27894-1-git-send-email-yegorslists@googlemail.com>
References: <1475751308-27894-1-git-send-email-yegorslists@googlemail.com>
Message-ID: <20161007081659.g3nmv7vm3nlgqa66@pengutronix.de>

On Thu, Oct 06, 2016 at 12:55:08PM +0200, yegorslists at googlemail.com wrote:
> From: Yegor Yefremov <yegorslists at googlemail.com>
> 
> OnRISC Baltos devices are based on a am335x SoC and can be booted
> either from MMC or NAND.
> 
> Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
> ---
> Changes:
> 	v3: - make hw_param a local variable
> 	    - implement memory size detection
> 	    - remove baltos_mem_init initcall
>         v2: - remove typedef
>             - rework invalid EEPROM content handling
>             - add mmc0 as boot device for MMC boot source
> 
>  arch/arm/boards/Makefile                |   1 +
>  arch/arm/boards/vscom-baltos/Makefile   |   2 +
>  arch/arm/boards/vscom-baltos/board.c    | 132 ++++++++++
>  arch/arm/boards/vscom-baltos/lowlevel.c | 134 ++++++++++
>  arch/arm/dts/Makefile                   |   1 +
>  arch/arm/dts/am335x-baltos-minimal.dts  | 439 ++++++++++++++++++++++++++++++++
>  arch/arm/mach-omap/Kconfig              |   7 +
>  images/Makefile.am33xx                  |   8 +
>  8 files changed, 724 insertions(+)
>  create mode 100644 arch/arm/boards/vscom-baltos/Makefile
>  create mode 100644 arch/arm/boards/vscom-baltos/board.c
>  create mode 100644 arch/arm/boards/vscom-baltos/lowlevel.c
>  create mode 100644 arch/arm/dts/am335x-baltos-minimal.dts

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct  7 02:07:28 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 7 Oct 2016 11:07:28 +0200
Subject: [PATCH 1/2] ARM: mvebu: add support for Netgear RN2120
In-Reply-To: <20161004191306.1838-1-u.kleine-koenig@pengutronix.de>
References: <20161004191306.1838-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161007090728.ns3hddrtmv6zfbc5@pengutronix.de>

On Tue, Oct 04, 2016 at 09:13:05PM +0200, Uwe Kleine-K?nig wrote:
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
>  arch/arm/boards/Makefile                    |  1 +
>  arch/arm/boards/netgear-rn2120/Makefile     |  2 +
>  arch/arm/boards/netgear-rn2120/board.c      | 88 +++++++++++++++++++++++++++++
>  arch/arm/boards/netgear-rn2120/kwbimage.cfg |  7 +++
>  arch/arm/boards/netgear-rn2120/lowlevel.c   | 41 ++++++++++++++
>  arch/arm/dts/Makefile                       |  1 +
>  arch/arm/dts/armada-xp-rn2120-bb.dts        | 11 ++++
>  arch/arm/mach-mvebu/Kconfig                 |  4 ++
>  images/Makefile.mvebu                       |  8 +++
>  9 files changed, 163 insertions(+)
>  create mode 100644 arch/arm/boards/netgear-rn2120/Makefile
>  create mode 100644 arch/arm/boards/netgear-rn2120/board.c
>  create mode 100644 arch/arm/boards/netgear-rn2120/kwbimage.cfg
>  create mode 100644 arch/arm/boards/netgear-rn2120/lowlevel.c
>  create mode 100644 arch/arm/dts/armada-xp-rn2120-bb.dts

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From yegorslists at googlemail.com  Fri Oct  7 05:08:42 2016
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Fri, 7 Oct 2016 14:08:42 +0200
Subject: [PATCH 4/5] Add filetype and detection for squashfs images
In-Reply-To: <7945e859-d844-9c44-f776-87e35ffc27e3@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-5-ejo@pengutronix.de>
 <CAGm1_kvFujU0QcCdmREtbRfU7J_vQgMnJvs9k=dpR3PQ=9+_6g@mail.gmail.com>
 <7945e859-d844-9c44-f776-87e35ffc27e3@pengutronix.de>
Message-ID: <CAGm1_kt_-rdCHpigKYBFJNMRoOB-mZENKFiqUwA2Fs7XGf1oMw@mail.gmail.com>

Hi Enrico,

On Thu, Oct 6, 2016 at 4:10 PM, Enrico Joerns <ejo at pengutronix.de> wrote:
> Hi Yegor,
>
> On 10/06/2016 03:55 PM, Yegor Yefremov wrote:
>>
>> On Tue, Oct 4, 2016 at 12:10 PM, Enrico Jorns <ejo at pengutronix.de> wrote:
>>>
>>> This adds `filetype_squashfs` to the list of known filetypes and adds a
>>> detection for squashfs files to file_detect_type(). This currently
>>> matches on the `hsqs` start sequence of an image file.
>>>
>>> Additionally, the newly introduced filetype is registered as the type of
>>> the squashfs_driver which allows, for example, to mount squashfs without
>>> the need to specify a type parameter.
>>>
>>> This changes enable booting a squashfs with the simple `boot` command
>>> pointing to the location (device) that holds the squashfs.
>>>
>>> Note that booting with blspec is limited as the current squashfs driver
>>> is not capable of handling symbolic links.
>>
>>
>> Glad to see SquashFS will be used not only by myself :-)
>
>
> glad to see that, too ;)
>
>> Could you explain how one can write a rootfs.sqaushfs to a ubiblock
>> from Linux and then what steps are needed in barebox?
>>
>> So far I've only found this info about ubiblock:
>> http://www.linux-mtd.infradead.org/doc/ubi.html#L_ubiblock, but it
>> doesn't say much.
>
>
> Yes, the informations provided are a bit sparse..
>
>> My actions were:
>>
>> ubiattach -p /dev/mtd5
>> ubiblock --create /dev/ubi0_0
>> ubiupdatevol /dev/ubi0_0 rootfs.squashfs
>>
>> Can I mount /dev/ubi0_0 via mount? If yes, what parameters I should use?
>
>
> The above commands look pretty similar to what I did. Mounting the ubiblock
> device does work too, with a little pitfall, mount will be confused by
> having a read-only file system but nobody told it before.
> So you must do
>
>   mount -o ro /dev/ubiblock0_0 /mnt/test
>
>> How can I mount this volume in barebox step-by-step?
>
>
> Using it in barebox is pretty easy, as the ubiblock layer is not required
> there:
>
>   ubiattach /dev/nand0.root
>   ubiupdatevol /dev/nand0.root.ubi.ubivolname rootfs.squashfs
>   mkdir /mnt/test
>   mount /dev/nand0.root.ubi.ubivolname /mnt/test
>
>
> To boot via bootspec form a ubi containing a squashfs, you simply need to
>
>   boot /dev/nand0.root.ubi.ubivolname
>
>
> Hope that helps.

Everything is working like a charm. I just had a problem with my
ccache and hence both my kernel and barebox got compiled without
squashfs support :-)

So here is my:

Tested-by: Yegor Yefremov <yegorslists at googlemail.com>

Thanks.

Yegor


From s.hauer at pengutronix.de  Sun Oct  9 23:46:31 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 10 Oct 2016 08:46:31 +0200
Subject: v2016.10.0
Message-ID: <20161010064631.5cjvj443ak552f2p@pengutronix.de>

Hi All,

We have an October release. This time we have Rockchip RK3288 support
and improved i.MX50 support. Lucas brought us several ARM64 compile
fixes to make his autobuilder green again, thanks Lucas ;)

Sascha


----------------------------------------------------------------
Aleksey Kuleshov (4):
      fix double free
      properly remove menu entry
      clarify strim function description
      rework menu so that it can support multiline titles

Alexander Kurz (13):
      mfd mc13xxx: add MC13892_REVISION_2_4
      Kconfig: defaultenv-2 select CMD_TEST
      scripts: imx-usb-loader: do DCD only once, cleanup
      scripts: imx-image: DCD check command for v2 only
      scripts: imx-usb-loader: enable DCD 16-bit write for hdr v1
      scripts: imx-usb-loader: structured DCD v1 element access
      scripts: imx-usb-loader: cleanup DCD v2 processing
      ARM: add common definitions for i.MX50 SOC
      scripts: imx: add support for i.MX50
      ARM: i.MX clock: cleanup imx50 incompatibilities
      ARM: i.MX drivers: enable i.MX50 where already supported
      Add i.MX50 support
      ARM i.MX50: Add iomux definitions for non-DT board implementations

Andrey Gusakov (1):
      video: tc358767: add eDP video encoder driver

Andrey Smirnov (1):
      arm: Add both .lds files to CLEAN_FILES unconditionally

Antony Pavlov (3):
      MIPS: dts: reuse TP-LINK MR3020 dts file from linux
      net: phy: of_phy_register_fixed_link(): drop redundant initialization
      Documentation: imd: fix sphinx warning

Christian Hemp (1):
      commands/Kconfig: fix typo in CMD_OF_FIXUP_STATUS help

Enrico Jorns (3):
      clk: socfpga: add divider registers to the main pll outputs
      commands: saveenv: exit on invalid option
      commands: exit on invalid option

Lucas Stach (10):
      serial: arm_dcc: depend on !CPU_V8
      mfd: syscon: drop EXPORT_SYMBOL for static function
      video: tc358767: depend on EDID helpers
      arm64: select ARM_EXCEPTIONS
      arm(64): move HAS_DMA and HAS_MODULES to CPU_32
      arm(64): don't advertise stack_dumping capabilities for ARM64
      arm: semihosting support is not implemented for ARM64
      arm64: include correct setupc file in ARM64 PBL
      arm64: drop unneeded files from Makefile
      arm64: don't allow to build relocatable image

Michael Olbrich (1):
      mci: mmci: Fix read FIFO handling

Philipp Zabel (3):
      video: switch to media bus formats
      video: add VPL ioctl to get bus format
      video/edid: Fix edid_to_display_timings error path

Sam Van Den Berge (1):
      Fix small typo in common/Kconfig

Sascha Hauer (27):
      mtd: nand: define struct nand_timings
      mtd: nand: add ONFI timing mode to nand_timings converter
      mtd: nand-imx: split preset_v1_v2 into two functions
      ARM: i.MX25: Provide a clock for the nand controller
      mtd: nand-imx: Optimize timing for i.MX25
      defaultenv-2: remove ps1 duplicates
      defaultenv-2: remove unused *-menu-add-entry calls
      usb: chipidea i.MX: Do not return unnecessary error
      ARM: i.MX6 Santaro: Add enable-delay for the display
      ARM: i.MX6 Santaro: Add USB support
      ARM: i.MX6 Santaro: Add PBL console support
      usb: i.MX chipidea: Enable VBUS regulator when needed
      Merge branch 'for-next/defenv-2'
      Merge branch 'for-next/imx'
      Merge branch 'for-next/menu'
      Merge branch 'for-next/mips'
      Merge branch 'for-next/misc'
      Merge branch 'for-next/rockchip'
      Merge branch 'for-next/socfpga'
      Merge branch 'for-next/video'
      dts: update to v4.7-rc6
      dts: update to v4.7
      Merge branch 'for-next/dts'
      ARM: karo-tx6: Include correct device tree
      ARM: i.MX6: Enable parent propagation for clk_gate2
      nv: Fix variable removal in nvvar_save()
      Release v2016.10.0

Steffen Trumtrar (5):
      filetype: add new filetype for SoCFPGA xload image
      socfpga: remove dt entries that are upstream
      ARM: socfpga: socrates: set alias for ethernet0
      ARM: socfpga: socrates: add qspi partitions
      ARM: socfpga: socrates: register bbu handlers

Trent Piepho (1):
      socfpga: Add support for V1 images to socfpga_mkimage

Ulrich ?lmann (3):
      ARM: socfpga: xload: support more qspi partitions
      blspec: fix erroneus free in entry_is_of_compatible()
      blspec: fix return value of entry_is_of_compatible()

Uwe Kleine-K?nig (2):
      ARM: imx6: reset PLL2's PFD2 on i.MX6D
      net/phy: marvell: fix error handling

Wadim Egorov (8):
      ARM: rockchip: Add basic RK3288 support
      clocksource: Add rk3288 timer driver
      ARM: rockchip: Add early debug support for RK3288
      clk: Add RK3288 clock driver
      mci: dw_mmc: Add RK3288 compatible string
      ARM: Add phyCORE-RK3288 SOM support
      configs: Add RK3288 defconfig
      doc: Add RK3288 Documentation

grodriguez (1):
      Call boot_board from boot, not from init.

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From yegorslists at googlemail.com  Mon Oct 10 00:48:40 2016
From: yegorslists at googlemail.com (yegorslists at googlemail.com)
Date: Mon, 10 Oct 2016 09:48:40 +0200
Subject: [PATCH] boot: add '-w' parameter to usage help text
Message-ID: <1476085720-2752-1-git-send-email-yegorslists@googlemail.com>

From: Yegor Yefremov <yegorslists at googlemail.com>

Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
---
 commands/boot.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/commands/boot.c b/commands/boot.c
index 102ca07..5d81d79 100644
--- a/commands/boot.c
+++ b/commands/boot.c
@@ -141,7 +141,7 @@ BAREBOX_CMD_HELP_END
 BAREBOX_CMD_START(boot)
 	.cmd	= do_boot,
 	BAREBOX_CMD_DESC("boot from script, device, ...")
-	BAREBOX_CMD_OPTS("[-vdlmt] [BOOTSRC...]")
+	BAREBOX_CMD_OPTS("[-vdlmwt] [BOOTSRC...]")
 	BAREBOX_CMD_GROUP(CMD_GRP_BOOT)
 	BAREBOX_CMD_HELP(cmd_boot_help)
 BAREBOX_CMD_END
-- 
2.1.4



From t.remmet at phytec.de  Mon Oct 10 01:17:54 2016
From: t.remmet at phytec.de (Teresa Remmet)
Date: Mon, 10 Oct 2016 10:17:54 +0200
Subject: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
In-Reply-To: <20161007072720.u3c7k6qv4pphlihz@pengutronix.de>
References: <1382352141.1327180.1475673795806.JavaMail.ngmail@webmail09.arcor-online.net>
 <1475741847.3468.20.camel@lws-tremmet.phytec.de>
 <20161007072720.u3c7k6qv4pphlihz@pengutronix.de>
Message-ID: <1476087474.4195.7.camel@lws-tremmet.phytec.de>

Hello Sascha,

Am Freitag, den 07.10.2016, 09:27 +0200 schrieb Sascha Hauer:
> On Thu, Oct 06, 2016 at 10:17:27AM +0200, Teresa Remmet wrote:
> > Hello Giorgio,
> > 
> > Am Mittwoch, den 05.10.2016, 15:23 +0200 schrieb iw3gtf at arcor.de:
> > > Hi,
> > > 
> > > I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b flagged static
> > > UBI volumes as DEVFS_IS_CHARACTER_DEV.
> > > 
> > > A consequence of this flag is that commands like:
> > > 
> > > # cp /dev/nand0.ubi_volumes.ubi.my_static_vol file
> > > 
> > > will not work because the cp command will see a src file (the static UBI volume) with a size
> > > of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood of
> > > "UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the console.
> > > 
> > > I tried to comment out the flag assignment, just to see what happen:
> > > 
> > > int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
> > > {
> > > ...
> > > 	cdev->size = vol->used_bytes;
> > > 
> > > //	if (vol->vol_type == UBI_STATIC_VOLUME)
> > > //		cdev->flags = DEVFS_IS_CHARACTER_DEV;
> > > 
> > > 	cdev->dev = &vol->dev;
> > > ...
> > > 
> > > and then the cp command worked than as expected.
> > > 
> > > Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for static UBI volumes
> > > is really needed (to avoid some other problems that my superficial test does not triggers) ?
> > 
> > the size of a static ubi volume device is equal to the image size you
> > flashed. When you create a new static ubi volume the size is 0, as it is
> > empty.
> > We need the chardev flag to be able to update the static ubi volume or
> > barebox will complain that there is not enough space.
> 
> Then I think we need another solution for that. UBI volumes are clearly
> not character devices, so we shouldn't set this flag to work around
> other issues we have.

Yes, you are write using the character dev flag is more a work around.
Which now brings up other problems like dumping the data back from
flash.

> 
> Currently devfs_truncate is implemented like:
> 
> static int devfs_truncate(struct device_d *dev, FILE *f, ulong size)
> {
>         if (f->fsdev->dev.num_resources < 1)
>                 return -ENOSPC;
>         if (size > resource_size(&f->fsdev->dev.resource[0]))
>                 return -ENOSPC;
>         return 0;
> }
> 
> Maybe we need an optional cdev->ops->truncate() to let the UBI volumes be
> able to overwrite this behaviour?

Truncate sounds like a better way. But UBI itself is not a filesystem.
So I do not see a good place to overwrite it on a first look.

I will try to look into this deeper next week. 

Regards,
Teresa

> 
> Sascha
> 




From s.hauer at pengutronix.de  Mon Oct 10 22:01:07 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 11 Oct 2016 07:01:07 +0200
Subject: [PATCH 0/2] H100 support
In-Reply-To: <20160930160401.21147-1-l.stach@pengutronix.de>
References: <20160930160401.21147-1-l.stach@pengutronix.de>
Message-ID: <20161011050107.u7fue4ofgznnetgg@pengutronix.de>

On Fri, Sep 30, 2016 at 06:03:59PM +0200, Lucas Stach wrote:
> This adds support for the H100 baseboard. Series is on top of -next
> as the base DT for this board is only in Linux 4.8.
> 
> Lucas Stach (2):
>   ARM: microsom: use imx6q_barebox_entry
>   ARM: imx6: add support for Auvidea H100

Applied, thanks.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct 10 23:45:00 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 11 Oct 2016 08:45:00 +0200
Subject: [PATCH] mtd: ubi: Fix scrubbing during attach
Message-ID: <20161011064500.1864-1-s.hauer@pengutronix.de>

ensure_wear_leveling() is called at the end of ubi_wl_init() and may
come to the decision to scrub some blocks. In the Kernel this is done
in a separate thread, but in barebox we do this synchronously. The
problem is that during ubi_wl_init() the EBA system is not yet
initialized (ubi_eba_init() is not yet called), so the wear level worker
hits a NULL pointer deref when the fastmap needs to be updated and
ubi_write_fastmap() accesses vol->eba_tbl.

Solve this by honoring the ubi->thread_enabled flag which is only set
to true when UBI is sufficiently initialized. This means we now can
have multiple works queued, so we can no longer simply do one work when
queued, but instead have to continue to do work until all work is done.
The best place to do so is a ubi_thread() function which behaves similar
to the Kernel function with the same name, but is called synchronously
in barebox. To make sure that the initially queued works are done, the
call to (no-op) wake_up_process() at the end of ubi_attach_mtd_dev()
is replaced with a call to ubi_thread().

While at it also honor the ubi->ro_mode flag to make sure we do not do
any wear leveling work on readonly UBI devices.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/ubi/build.c |  4 +++-
 drivers/mtd/ubi/ubi.h   |  2 +-
 drivers/mtd/ubi/wl.c    | 25 ++++++++++++++++++++++++-
 3 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index 5953e36..617c63e 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -668,7 +668,9 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num,
 	 * checks @ubi->thread_enabled. Otherwise we may fail to wake it up.
 	 */
 	ubi->thread_enabled = 1;
-	wake_up_process(ubi->bgt_thread);
+
+	/* No threading, call ubi_thread directly */
+	ubi_thread(ubi);
 
 	ubi_devices[ubi_num] = ubi;
 
diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h
index 89e3347..1f0ad38 100644
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -788,7 +788,7 @@ int ubi_wl_flush(struct ubi_device *ubi, int vol_id, int lnum);
 int ubi_wl_scrub_peb(struct ubi_device *ubi, int pnum);
 int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai);
 void ubi_wl_close(struct ubi_device *ubi);
-int ubi_thread(void *u);
+int ubi_thread(struct ubi_device *ubi);
 struct ubi_wl_entry *ubi_wl_get_fm_peb(struct ubi_device *ubi, int anchor);
 int ubi_wl_put_fm_peb(struct ubi_device *ubi, struct ubi_wl_entry *used_e,
 		      int lnum, int torture);
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index f24c219..a368bf9 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -523,7 +523,7 @@ static void __schedule_ubi_work(struct ubi_device *ubi, struct ubi_work *wrk)
 	ubi->works_count += 1;
 
 	/* No threading in barebox, so do work synchronously */
-	do_work(ubi);
+	ubi_thread(ubi);
 }
 
 /**
@@ -1329,6 +1329,29 @@ static void tree_destroy(struct ubi_device *ubi, struct rb_root *root)
 }
 
 /**
+ * ubi_thread - UBI background thread.
+ * @ubi: UBI device description object
+ *
+ * for barebox this is no thread, instead it's called synchronously from
+ * __schedule_ubi_work(). This is the place that makes sure all pending
+ * work is done.
+ */
+int ubi_thread(struct ubi_device *ubi)
+{
+	while (!list_empty(&ubi->works)) {
+		if (!ubi->thread_enabled)
+			return 0;
+
+		if (ubi->ro_mode)
+			return 0;
+
+		do_work(ubi);
+	}
+
+	return 0;
+}
+
+/**
  * shutdown_work - shutdown all pending works.
  * @ubi: UBI device description object
  */
-- 
2.9.3



From antonynpavlov at gmail.com  Tue Oct 11 02:06:11 2016
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Tue, 11 Oct 2016 12:06:11 +0300
Subject: [PATCH] sandbox: drop unused header files
Message-ID: <20161011090611.29865-1-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/sandbox/include/asm/processor.h | 25 -------------------------
 arch/sandbox/include/asm/ptrace.h    |  1 -
 2 files changed, 26 deletions(-)
 delete mode 100644 arch/sandbox/include/asm/processor.h
 delete mode 100644 arch/sandbox/include/asm/ptrace.h

diff --git a/arch/sandbox/include/asm/processor.h b/arch/sandbox/include/asm/processor.h
deleted file mode 100644
index 075ec74..0000000
--- a/arch/sandbox/include/asm/processor.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engstr?m, Omicron Ceti AB, daniel at omicron.se
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ASM_PROCESSOR_H_
-#define __ASM_PROCESSOR_H_ 1
-/* Currently this header is unused in the i386 port
- * but some generic files #include <asm/processor.h>
- * so this file is a placeholder. */
-#endif
diff --git a/arch/sandbox/include/asm/ptrace.h b/arch/sandbox/include/asm/ptrace.h
deleted file mode 100644
index 2997587..0000000
--- a/arch/sandbox/include/asm/ptrace.h
+++ /dev/null
@@ -1 +0,0 @@
-/* dummy */
-- 
2.9.3



From yegorslists at googlemail.com  Tue Oct 11 22:52:22 2016
From: yegorslists at googlemail.com (yegorslists at googlemail.com)
Date: Wed, 12 Oct 2016 07:52:22 +0200
Subject: [PATCH] ubi: fix spelling
Message-ID: <1476251542-5228-1-git-send-email-yegorslists@googlemail.com>

From: Yegor Yefremov <yegorslists at googlemail.com>

Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
---
 drivers/mtd/ubi/build.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index 5953e36..a7a679a 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -492,13 +492,13 @@ static int autoresize(struct ubi_device *ubi, int vol_id)
  * @vid_hdr_offset: VID header offset
  * @max_beb_per1024: maximum expected number of bad PEB per 1024 PEBs
  *
- * This function attaches MTD device @mtd_dev to UBI and assign @ubi_num number
+ * This function attaches MTD device @mtd_dev to UBI and assigns @ubi_num number
  * to the newly created UBI device, unless @ubi_num is %UBI_DEV_NUM_AUTO, in
  * which case this function finds a vacant device number and assigns it
  * automatically. Returns the new UBI device number in case of success and a
  * negative error code in case of failure.
  *
- * Note, the invocations of this function has to be serialized by the
+ * Note, the invocation of this function has to be serialized by the
  * @ubi_devices_mutex.
  */
 int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num,
@@ -695,7 +695,7 @@ out_free:
  * UBI device is busy and cannot be destroyed, and %-EINVAL if it does not
  * exist.
  *
- * Note, the invocations of this function has to be serialized by the
+ * Note, the invocation of this function has to be serialized by the
  * @ubi_devices_mutex.
  */
 int ubi_detach_mtd_dev(int ubi_num, int anyway)
-- 
2.1.4



From yegorslists at googlemail.com  Tue Oct 11 23:26:00 2016
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Wed, 12 Oct 2016 08:26:00 +0200
Subject: [PATCH 1/5] fs: squashfs: port lzo compression support from kernel
In-Reply-To: <20161004193416.awslsajyeeze4aiu@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-2-ejo@pengutronix.de>
 <20161004193416.awslsajyeeze4aiu@pengutronix.de>
Message-ID: <CAGm1_kvH46mWrdNAVjoj7-koO087Bh1V0xT3u6HpU6yndBMn=A@mail.gmail.com>

On Tue, Oct 4, 2016 at 9:34 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Tue, Oct 04, 2016 at 12:10:44PM +0200, Enrico Jorns wrote:
>> This ports lzo_wrapper from kernel code and adds some minimal adaptions
>> to make squashfs lzo compression work in barebox.
>>
>> Signed-off-by: Enrico Jorns <ejo at pengutronix.de>

Tested-by: Yegor Yefremov <yegorslists at googlemail.com>

>> ---
>>  fs/squashfs/Kconfig       |  14 +++++
>>  fs/squashfs/Makefile      |   1 +
>>  fs/squashfs/lzo_wrapper.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++
>>  include/linux/lzo.h       |  47 +++++++++++++++++
>>  4 files changed, 190 insertions(+)
>>  create mode 100644 fs/squashfs/lzo_wrapper.c
>>  create mode 100644 include/linux/lzo.h
>>
>> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
>> index dc25d93..d8ee554 100644
>> --- a/fs/squashfs/Kconfig
>> +++ b/fs/squashfs/Kconfig
>> @@ -17,6 +17,20 @@ menuconfig FS_SQUASHFS
>>         embedded systems where low overhead is needed.  Further information
>>         and tools are available from http://squashfs.sourceforge.net.
>>
>> +config SQUASHFS_LZO
>> +     bool "Include support for LZO compressed file systems"
>> +     default y
>> +     depends on FS_SQUASHFS
>> +     select LZO_DECOMPRESS
>> +     help
>> +       Saying Y here includes support for reading Squashfs file systems
>> +       compressed with LZO compression.  LZO compression is mainly
>> +       aimed at embedded systems with slower CPUs where the overheads
>> +       of zlib are too high.
>> +
>> +       LZO is not the standard compression used in Squashfs and so most
>> +       file systems will be readable without selecting this option.
>> +
>>  config SQUASHFS_XZ
>>       bool "Include support for XZ compressed file systems"
>>       default y
>> diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
>> index c0d024c..447e15e 100644
>> --- a/fs/squashfs/Makefile
>> +++ b/fs/squashfs/Makefile
>> @@ -11,3 +11,4 @@ obj-y       += inode.o
>>  obj-y        += namei.o
>>  obj-y        += super.o
>>  obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
>> +obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
>> diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c
>> new file mode 100644
>> index 0000000..b457955
>> --- /dev/null
>> +++ b/fs/squashfs/lzo_wrapper.c
>> @@ -0,0 +1,128 @@
>> +/*
>> + * Squashfs - a compressed read only filesystem for Linux
>> + *
>> + * Copyright (c) 2010 LG Electronics
>> + * Chan Jeong <chan.jeong at lge.com>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; either version 2,
>> + * or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
>> + *
>> + * lzo_wrapper.c
>> + */
>> +
>> +#include <linux/mutex.h>
>> +#include <linux/lzo.h>
>> +#include <types.h>
>> +
>> +#include "squashfs_fs.h"
>> +#include "squashfs_fs_sb.h"
>> +#include "squashfs.h"
>> +#include "decompressor.h"
>> +#include "page_actor.h"
>> +
>> +struct squashfs_lzo {
>> +     void    *input;
>> +     void    *output;
>> +};
>> +
>> +static void *lzo_init(struct squashfs_sb_info *msblk, void *buff)
>> +{
>> +     int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
>> +
>> +     struct squashfs_lzo *stream = kzalloc(sizeof(*stream), GFP_KERNEL);
>> +     if (stream == NULL)
>> +             goto failed;
>> +     stream->input = vmalloc(block_size);
>> +     if (stream->input == NULL)
>> +             goto failed;
>> +     stream->output = vmalloc(block_size);
>> +     if (stream->output == NULL)
>> +             goto failed2;
>> +
>> +     return stream;
>> +
>> +failed2:
>> +     vfree(stream->input);
>> +failed:
>> +     ERROR("Failed to allocate lzo workspace\n");
>> +     kfree(stream);
>> +     return ERR_PTR(-ENOMEM);
>> +}
>> +
>> +
>> +static void lzo_free(void *strm)
>> +{
>> +     struct squashfs_lzo *stream = strm;
>> +
>> +     if (stream) {
>> +             vfree(stream->input);
>> +             vfree(stream->output);
>> +     }
>> +     kfree(stream);
>> +}
>> +
>> +
>> +static int lzo_uncompress(struct squashfs_sb_info *msblk, void *strm,
>> +     char **bh, int b, int offset, int length,
>> +     struct squashfs_page_actor *output)
>> +{
>> +     struct squashfs_lzo *stream = strm;
>> +     void *buff = stream->input, *data;
>> +     int avail, i, bytes = length, res;
>> +     size_t out_len = output->length;
>> +
>> +     for (i = 0; i < b; i++) {
>> +             avail = min(bytes, msblk->devblksize - offset);
>> +             memcpy(buff, bh[i] + offset, avail);
>> +             buff += avail;
>> +             bytes -= avail;
>> +             offset = 0;
>> +             kfree(bh[i]);
>> +     }
>> +
>> +     res = lzo1x_decompress_safe(stream->input, (size_t)length,
>> +                                     stream->output, &out_len);
>> +     if (res != LZO_E_OK)
>> +             goto failed;
>> +
>> +     res = bytes = (int)out_len;
>> +     data = squashfs_first_page(output);
>> +     buff = stream->output;
>> +     while (data) {
>> +             if (bytes <= PAGE_CACHE_SIZE) {
>> +                     memcpy(data, buff, bytes);
>> +                     break;
>> +             } else {
>> +                     memcpy(data, buff, PAGE_CACHE_SIZE);
>> +                     buff += PAGE_CACHE_SIZE;
>> +                     bytes -= PAGE_CACHE_SIZE;
>> +                     data = squashfs_next_page(output);
>> +             }
>> +     }
>> +     squashfs_finish_page(output);
>> +
>> +     return res;
>> +
>> +failed:
>> +     return -EIO;
>> +}
>> +
>> +const struct squashfs_decompressor squashfs_lzo_comp_ops = {
>> +     .init = lzo_init,
>> +     .free = lzo_free,
>> +     .decompress = lzo_uncompress,
>> +     .id = LZO_COMPRESSION,
>> +     .name = "lzo",
>> +     .supported = 1
>> +};
>> diff --git a/include/linux/lzo.h b/include/linux/lzo.h
>
> We already have include/lzo.h with the same content, no need to add it
> again.
>
> Sascha
>
> --
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From s.hauer at pengutronix.de  Tue Oct 11 23:48:08 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 12 Oct 2016 08:48:08 +0200
Subject: [PATCH] boot: add '-w' parameter to usage help text
In-Reply-To: <1476085720-2752-1-git-send-email-yegorslists@googlemail.com>
References: <1476085720-2752-1-git-send-email-yegorslists@googlemail.com>
Message-ID: <20161012064808.qp5vz7vqjcukvebb@pengutronix.de>

On Mon, Oct 10, 2016 at 09:48:40AM +0200, yegorslists at googlemail.com wrote:
> From: Yegor Yefremov <yegorslists at googlemail.com>
> 
> Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
> ---
>  commands/boot.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha

> 
> diff --git a/commands/boot.c b/commands/boot.c
> index 102ca07..5d81d79 100644
> --- a/commands/boot.c
> +++ b/commands/boot.c
> @@ -141,7 +141,7 @@ BAREBOX_CMD_HELP_END
>  BAREBOX_CMD_START(boot)
>  	.cmd	= do_boot,
>  	BAREBOX_CMD_DESC("boot from script, device, ...")
> -	BAREBOX_CMD_OPTS("[-vdlmt] [BOOTSRC...]")
> +	BAREBOX_CMD_OPTS("[-vdlmwt] [BOOTSRC...]")
>  	BAREBOX_CMD_GROUP(CMD_GRP_BOOT)
>  	BAREBOX_CMD_HELP(cmd_boot_help)
>  BAREBOX_CMD_END
> -- 
> 2.1.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct 11 23:50:13 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 12 Oct 2016 08:50:13 +0200
Subject: [PATCH] sandbox: drop unused header files
In-Reply-To: <20161011090611.29865-1-antonynpavlov@gmail.com>
References: <20161011090611.29865-1-antonynpavlov@gmail.com>
Message-ID: <20161012065013.y7aj3rxakgqnqub5@pengutronix.de>

On Tue, Oct 11, 2016 at 12:06:11PM +0300, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/sandbox/include/asm/processor.h | 25 -------------------------
>  arch/sandbox/include/asm/ptrace.h    |  1 -
>  2 files changed, 26 deletions(-)
>  delete mode 100644 arch/sandbox/include/asm/processor.h
>  delete mode 100644 arch/sandbox/include/asm/ptrace.h

Applied, thanks

Sascha

> 
> diff --git a/arch/sandbox/include/asm/processor.h b/arch/sandbox/include/asm/processor.h
> deleted file mode 100644
> index 075ec74..0000000
> --- a/arch/sandbox/include/asm/processor.h
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -/*
> - * (C) Copyright 2002
> - * Daniel Engstr?m, Omicron Ceti AB, daniel at omicron.se
> - *
> - * See file CREDITS for list of people who contributed to this
> - * project.
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License as
> - * published by the Free Software Foundation; either version 2 of
> - * the License, or (at your option) any later version.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
> - *
> - */
> -
> -#ifndef __ASM_PROCESSOR_H_
> -#define __ASM_PROCESSOR_H_ 1
> -/* Currently this header is unused in the i386 port
> - * but some generic files #include <asm/processor.h>
> - * so this file is a placeholder. */
> -#endif
> diff --git a/arch/sandbox/include/asm/ptrace.h b/arch/sandbox/include/asm/ptrace.h
> deleted file mode 100644
> index 2997587..0000000
> --- a/arch/sandbox/include/asm/ptrace.h
> +++ /dev/null
> @@ -1 +0,0 @@
> -/* dummy */
> -- 
> 2.9.3
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct 11 23:53:11 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 12 Oct 2016 08:53:11 +0200
Subject: [PATCH] ubi: fix spelling
In-Reply-To: <1476251542-5228-1-git-send-email-yegorslists@googlemail.com>
References: <1476251542-5228-1-git-send-email-yegorslists@googlemail.com>
Message-ID: <20161012065311.up6whditvf2gxa34@pengutronix.de>

On Wed, Oct 12, 2016 at 07:52:22AM +0200, yegorslists at googlemail.com wrote:
> From: Yegor Yefremov <yegorslists at googlemail.com>
> 
> Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
> ---
>  drivers/mtd/ubi/build.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Applied, but you should send the patch for the Kernel aswell, otherwise
the wrong spelling comes back to barebox with future UBI updates.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Oct 12 00:04:47 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 12 Oct 2016 09:04:47 +0200
Subject: [PATCH] arch: refresh defconfigs
Message-ID: <20161012070447.13211-1-s.hauer@pengutronix.de>

The defconfig files are long untouched and a
make xy_defconfig; make savedefconfig usually generates quite
a different looking file. Refresh them to make it easier to generate
patches against the configs using
make xy_defconfig; make menuconfig; make savedefconfig

This has been done with the following script.

for a in arch/*; do
	arch=$(basename $a)
	for c in $a/configs/*; do
		config=$(basename $c)

	export ARCH=$arch
	make $config && make savedefconfig && mv defconfig $c
	done
done

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/configs/a9m2410_defconfig                 |  30 ++--
 arch/arm/configs/a9m2440_defconfig                 |  30 ++--
 arch/arm/configs/am335x_mlo_defconfig              |   1 -
 arch/arm/configs/animeo_ip_defconfig               |  51 +++----
 arch/arm/configs/archosg9_defconfig                |  12 +-
 arch/arm/configs/archosg9_xload_defconfig          |   1 -
 arch/arm/configs/at91rm9200ek_defconfig            |  65 ++++----
 arch/arm/configs/at91sam9260ek_defconfig           |  51 +++----
 arch/arm/configs/at91sam9261ek_bootstrap_defconfig |   2 -
 arch/arm/configs/at91sam9261ek_defconfig           |  49 +++---
 .../configs/at91sam9261ek_first_stage_defconfig    |  46 +++---
 arch/arm/configs/at91sam9263ek_defconfig           |  52 +++----
 arch/arm/configs/at91sam9g10ek_defconfig           |  49 +++---
 arch/arm/configs/at91sam9g20ek_defconfig           |  51 +++----
 arch/arm/configs/at91sam9m10g45ek_defconfig        |  57 ++++---
 arch/arm/configs/at91sam9m10ihd_defconfig          |  59 ++++----
 arch/arm/configs/at91sam9n12ek_defconfig           |  51 +++----
 arch/arm/configs/at91sam9x5ek_defconfig            |  54 +++----
 arch/arm/configs/canon-a1100_defconfig             |   2 -
 arch/arm/configs/ccmx51_defconfig                  |  46 +++---
 arch/arm/configs/cfa10036_defconfig                |  27 ++--
 arch/arm/configs/chumbyone_defconfig               |  37 ++---
 arch/arm/configs/cupid_defconfig                   |  48 +++---
 arch/arm/configs/datamodul-edm-qmx6_defconfig      |  68 ++++-----
 arch/arm/configs/dss11_defconfig                   |  24 ++-
 arch/arm/configs/duckbill_defconfig                |   6 +-
 arch/arm/configs/edb93xx_defconfig                 |  29 ++--
 arch/arm/configs/efika-mx-smartbook_defconfig      |  84 +++++------
 arch/arm/configs/eukrea_cpuimx25_defconfig         |  10 +-
 arch/arm/configs/eukrea_cpuimx27_defconfig         |  42 +++---
 arch/arm/configs/eukrea_cpuimx35_defconfig         |  10 +-
 arch/arm/configs/eukrea_cpuimx51_defconfig         |  47 +++---
 arch/arm/configs/freescale-mx21-ads_defconfig      |  26 ++--
 arch/arm/configs/freescale-mx23-evk_defconfig      |  18 +--
 arch/arm/configs/freescale-mx25-3ds_defconfig      |  44 +++---
 arch/arm/configs/freescale-mx27-ads_defconfig      |  34 ++---
 arch/arm/configs/freescale-mx28-evk_defconfig      |   6 +-
 arch/arm/configs/freescale-mx35-3ds_defconfig      |  53 +++----
 arch/arm/configs/freescale-mx53-smd_defconfig      |  47 +++---
 arch/arm/configs/friendlyarm_mini2440_defconfig    |   1 -
 arch/arm/configs/friendlyarm_mini6410_defconfig    |  28 ++--
 arch/arm/configs/friendlyarm_tiny210_defconfig     |   9 --
 arch/arm/configs/friendlyarm_tiny6410_defconfig    |  28 ++--
 arch/arm/configs/haba_knx_lite_defconfig           |  10 +-
 arch/arm/configs/highbank_defconfig                |  49 +++---
 arch/arm/configs/imx233-olinuxino_defconfig        |  10 +-
 arch/arm/configs/imx_v7-xload_defconfig            |  27 +---
 arch/arm/configs/imx_v7_defconfig                  |  13 +-
 arch/arm/configs/lubbock_defconfig                 |  11 +-
 arch/arm/configs/mainstone_defconfig               |  11 +-
 arch/arm/configs/mioa701_defconfig                 |  87 ++++++-----
 arch/arm/configs/mmccpu_defconfig                  |  32 ++--
 arch/arm/configs/module-mb7707_defconfig           |   2 -
 arch/arm/configs/neso_defconfig                    |  51 +++----
 arch/arm/configs/netx_nxdb500_defconfig            |  29 ++--
 arch/arm/configs/nhk8815_defconfig                 |  46 +++---
 .../configs/omap3430_sdp3430_per_uart_defconfig    |  28 ++--
 arch/arm/configs/omap3530_beagle_defconfig         |  10 +-
 .../arm/configs/omap3530_beagle_per_uart_defconfig |  28 ++--
 arch/arm/configs/omap3530_beagle_xload_defconfig   |   1 -
 arch/arm/configs/omap3_evm_defconfig               |  25 ++-
 arch/arm/configs/panda_defconfig                   |  60 ++++----
 arch/arm/configs/panda_xload_defconfig             |   2 -
 .../configs/phytec-phycard-omap3-xload_defconfig   |   8 +-
 arch/arm/configs/phytec-phycard-omap3_defconfig    | 167 ++++-----------------
 .../configs/phytec-phycard-omap4-xload_defconfig   |   7 -
 arch/arm/configs/phytec-phycard-omap4_defconfig    |  37 ++---
 arch/arm/configs/phytec-phycore-imx31_defconfig    |  71 ++++-----
 arch/arm/configs/phytec-phycore-imx35_defconfig    |  76 +++++-----
 .../phytec-phycore-omap4460-xload-mmc_defconfig    |   1 -
 .../phytec-phycore-omap4460-xload-nand_defconfig   |   1 -
 arch/arm/configs/phytec-phycore-omap4460_defconfig |  49 +++---
 arch/arm/configs/phytec-phycore-pxa270_defconfig   |  10 +-
 arch/arm/configs/pm9261_defconfig                  |  46 +++---
 arch/arm/configs/pm9263_defconfig                  |  32 ++--
 arch/arm/configs/pm9g45_defconfig                  |  37 +++--
 arch/arm/configs/qil_a9260_128mib_defconfig        |  49 +++---
 arch/arm/configs/qil_a9260_defconfig               |  49 +++---
 arch/arm/configs/qil_a9g20_128mib_defconfig        |  49 +++---
 arch/arm/configs/qil_a9g20_defconfig               |  49 +++---
 arch/arm/configs/rk3188_defconfig                  |  13 +-
 arch/arm/configs/rpi2_defconfig                    |   8 +-
 arch/arm/configs/rpi_defconfig                     |   8 +-
 arch/arm/configs/sama5d3_xplained_defconfig        |  45 +++---
 arch/arm/configs/sama5d3xek_defconfig              |  53 +++----
 arch/arm/configs/sama5d4_xplained_defconfig        |  10 +-
 arch/arm/configs/sama5d4ek_defconfig               |  10 +-
 arch/arm/configs/scb9328_defconfig                 |  48 +++---
 arch/arm/configs/socfpga-xload-2_defconfig         |   1 -
 arch/arm/configs/socfpga-xload_defconfig           |   1 -
 arch/arm/configs/socfpga_defconfig                 |  10 +-
 arch/arm/configs/tegra_v7_defconfig                |   4 +-
 arch/arm/configs/telit_evk_pro3_defconfig          |  46 +++---
 arch/arm/configs/tny_a9260_defconfig               |  61 ++++----
 arch/arm/configs/tny_a9263_bootstrap_defconfig     |   4 -
 arch/arm/configs/tny_a9263_defconfig               |  61 ++++----
 arch/arm/configs/tny_a9g20_defconfig               |  61 ++++----
 arch/arm/configs/tqma53_defconfig                  |  54 +++----
 arch/arm/configs/tx28stk5_defconfig                |  12 +-
 arch/arm/configs/tx51stk5_defconfig                | 130 +++-------------
 arch/arm/configs/tx53stk5_defconfig                |  56 +++----
 arch/arm/configs/usb_a9260_defconfig               |  63 ++++----
 .../configs/usb_a9263_128mib_bootstrap_defconfig   |   3 -
 arch/arm/configs/usb_a9263_128mib_defconfig        |  63 ++++----
 arch/arm/configs/usb_a9263_bootstrap_defconfig     |   3 -
 arch/arm/configs/usb_a9263_defconfig               |  63 ++++----
 arch/arm/configs/usb_a9g20_128mib_defconfig        |  66 ++++----
 arch/arm/configs/usb_a9g20_defconfig               |  66 ++++----
 arch/arm/configs/versatilepb_arm1176_defconfig     |  17 +--
 arch/arm/configs/versatilepb_defconfig             |  11 +-
 arch/arm/configs/vexpress_ca9_defconfig            |  53 +++----
 arch/arm/configs/vexpress_defconfig                |  53 +++----
 arch/arm/configs/vincell_defconfig                 |  12 +-
 arch/arm/configs/virt2real_defconfig               |  35 +++--
 arch/arm/configs/zedboard_defconfig                |   9 +-
 arch/arm/configs/zylonite310_defconfig             |  11 +-
 arch/blackfin/configs/ipe337_defconfig             |  31 ++--
 arch/efi/configs/efi_defconfig                     |   8 +-
 arch/mips/configs/dlink-dir-320_defconfig          |   2 +-
 arch/mips/configs/gxemul-malta_defconfig           |   2 +-
 arch/mips/configs/img-ci20_defconfig               |  10 +-
 arch/mips/configs/loongson-ls1b_defconfig          |  45 +++---
 arch/mips/configs/qemu-malta_defconfig             |   2 +-
 arch/mips/configs/ritmix-rzx50_defconfig           |  10 +-
 arch/nios2/configs/generic_defconfig               |  28 ++--
 arch/ppc/configs/da923rc_defconfig                 |  73 ++++-----
 arch/ppc/configs/p1010rdb_defconfig                |  67 ++++-----
 arch/ppc/configs/p1022ds_defconfig                 |  63 +++-----
 arch/ppc/configs/p2020rdb_defconfig                |  64 ++++----
 arch/ppc/configs/pcm030_defconfig                  |   2 +-
 arch/sandbox/configs/sandbox_defconfig             |   6 -
 arch/x86/configs/generic_defconfig                 |  27 ++--
 132 files changed, 1904 insertions(+), 2515 deletions(-)

diff --git a/arch/arm/configs/a9m2410_defconfig b/arch/arm/configs/a9m2410_defconfig
index d7b08f5..44d1edf 100644
--- a/arch/arm/configs/a9m2410_defconfig
+++ b/arch/arm/configs/a9m2410_defconfig
@@ -1,35 +1,33 @@
 CONFIG_ARCH_S3C24xx=y
 CONFIG_S3C_NAND_BOOT=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_BROKEN=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_BAUDRATE=38400
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/a9m2410/env"
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_NET=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_FLASH=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_SMC91111=y
 # CONFIG_SPI is not set
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/a9m2440_defconfig b/arch/arm/configs/a9m2440_defconfig
index 59b16a8..d1ae580 100644
--- a/arch/arm/configs/a9m2440_defconfig
+++ b/arch/arm/configs/a9m2440_defconfig
@@ -3,35 +3,33 @@ CONFIG_MACH_A9M2440=y
 CONFIG_S3C_SDRAM_INIT=y
 CONFIG_S3C_NAND_BOOT=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_BROKEN=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_BAUDRATE=38400
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/a9m2440/env"
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_NET=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_FLASH=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_SMC91111=y
 # CONFIG_SPI is not set
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/am335x_mlo_defconfig b/arch/arm/configs/am335x_mlo_defconfig
index b66a653..58034b6 100644
--- a/arch/arm/configs/am335x_mlo_defconfig
+++ b/arch/arm/configs/am335x_mlo_defconfig
@@ -18,7 +18,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_ACTIVATE_NONE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_OFDEVICE=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
diff --git a/arch/arm/configs/animeo_ip_defconfig b/arch/arm/configs/animeo_ip_defconfig
index 0f2e3a0..96f73eb 100644
--- a/arch/arm/configs/animeo_ip_defconfig
+++ b/arch/arm/configs/animeo_ip_defconfig
@@ -1,8 +1,6 @@
 CONFIG_ARCH_AT91SAM9260=y
-CONFIG_MACH_ANIMEO_IP=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
@@ -10,50 +8,49 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="Animeo-IP:"
 CONFIG_BAUDRATE=38400
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_CMD_MIITOOL=y
 CONFIG_CMD_WD=y
 CONFIG_CMD_WD_DEFAULT_TIMOUT=16
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_MICREL_PHY=y
 CONFIG_DRIVER_NET_MACB=y
+CONFIG_MICREL_PHY=y
 CONFIG_NET_USB=y
 CONFIG_NET_USB_ASIX=y
 # CONFIG_SPI is not set
@@ -64,10 +61,7 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_HOST=y
-CONFIG_USB_OHCI=y
-CONFIG_USB_OHCI_AT91=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_ATMEL=y
@@ -76,7 +70,6 @@ CONFIG_LED_GPIO=y
 CONFIG_LED_GPIO_BICOLOR=y
 CONFIG_LED_TRIGGERS=y
 CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_AT91SAM9X=y
 CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/archosg9_defconfig b/arch/arm/configs/archosg9_defconfig
index e7d4672..9a71921 100644
--- a/arch/arm/configs/archosg9_defconfig
+++ b/arch/arm/configs/archosg9_defconfig
@@ -15,6 +15,12 @@ CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 # CONFIG_TIMESTAMP is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
+CONFIG_BOOTM_AIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/archosg9/env"
@@ -23,12 +29,6 @@ CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_CMD_BOOT_ORDER=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_BOOTM_AIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
diff --git a/arch/arm/configs/archosg9_xload_defconfig b/arch/arm/configs/archosg9_xload_defconfig
index 9660213..dc13f56 100644
--- a/arch/arm/configs/archosg9_xload_defconfig
+++ b/arch/arm/configs/archosg9_xload_defconfig
@@ -13,7 +13,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT=y
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig
index c82fe09..3e8d263 100644
--- a/arch/arm/configs/at91rm9200ek_defconfig
+++ b/arch/arm/configs/at91rm9200ek_defconfig
@@ -1,70 +1,64 @@
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9200-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_CMD_BOOTM_BZLIB=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_CMD_SPI=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_AT91_ETHER=y
 CONFIG_DRIVER_SPI_ATMEL=y
+CONFIG_MTD=y
+# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_MTD_DATAFLASH=y
 CONFIG_DRIVER_CFI=y
 # CONFIG_DRIVER_CFI_INTEL is not set
 # CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
 # CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
 CONFIG_CFI_BUFFER_WRITE=y
-CONFIG_MTD=y
-# CONFIG_MTD_OOB_DEVICE is not set
-CONFIG_MTD_DATAFLASH=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_MCI=y
@@ -75,5 +69,6 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
 CONFIG_FS_CRAMFS=y
+CONFIG_FS_TFTP=y
 CONFIG_DIGEST_SHA1_GENERIC=y
 CONFIG_DIGEST_SHA256_GENERIC=y
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260ek_defconfig
index 10a735d..3cc92d8 100644
--- a/arch/arm/configs/at91sam9260ek_defconfig
+++ b/arch/arm/configs/at91sam9260ek_defconfig
@@ -1,55 +1,50 @@
 CONFIG_ARCH_AT91SAM9260=y
 CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_PROMPT="9260-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
@@ -60,7 +55,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
@@ -70,5 +64,6 @@ CONFIG_MCI_ATMEL=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/at91sam9261ek_bootstrap_defconfig b/arch/arm/configs/at91sam9261ek_bootstrap_defconfig
index 1511ecb..3de1d78 100644
--- a/arch/arm/configs/at91sam9261ek_bootstrap_defconfig
+++ b/arch/arm/configs/at91sam9261ek_bootstrap_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARCH_AT91SAM9261=y
 CONFIG_AT91_BOOTSTRAP=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x27000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
@@ -11,7 +10,6 @@ CONFIG_PROMPT="9261-EK:"
 CONFIG_SHELL_NONE=y
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 # CONFIG_SPI is not set
 CONFIG_MTD=y
 # CONFIG_MTD_WRITE is not set
diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261ek_defconfig
index ad262e9..d6f547a 100644
--- a/arch/arm/configs/at91sam9261ek_defconfig
+++ b/arch/arm/configs/at91sam9261ek_defconfig
@@ -1,55 +1,52 @@
 CONFIG_ARCH_AT91SAM9261=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9261-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_INITRD=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
 CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_DM9K=y
 CONFIG_DRIVER_SPI_ATMEL=y
@@ -61,7 +58,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
@@ -71,4 +67,5 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
 CONFIG_KEYBOARD_GPIO=y
+CONFIG_FS_TFTP=y
 CONFIG_PNG=y
diff --git a/arch/arm/configs/at91sam9261ek_first_stage_defconfig b/arch/arm/configs/at91sam9261ek_first_stage_defconfig
index e3b6e5f..e4c9f1d 100644
--- a/arch/arm/configs/at91sam9261ek_first_stage_defconfig
+++ b/arch/arm/configs/at91sam9261ek_first_stage_defconfig
@@ -1,54 +1,53 @@
 CONFIG_ARCH_AT91SAM9261=y
-CONFIG_CMD_AT91_BOOT_TEST=y
 CONFIG_AT91_LOAD_BAREBOX_SRAM=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x27000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9261-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_INITRD=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_AT91_BOOT_TEST=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_MTEST=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_DM9K=y
 CONFIG_DRIVER_SPI_ATMEL=y
@@ -60,7 +59,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263ek_defconfig
index 5f98cd6..b28614d 100644
--- a/arch/arm/configs/at91sam9263ek_defconfig
+++ b/arch/arm/configs/at91sam9263ek_defconfig
@@ -1,65 +1,60 @@
 CONFIG_ARCH_AT91SAM9263=y
-# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9263-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
+CONFIG_MTD=y
+# CONFIG_MTD_OOB_DEVICE is not set
 CONFIG_DRIVER_CFI=y
 # CONFIG_DRIVER_CFI_INTEL is not set
 # CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
-CONFIG_MTD=y
-# CONFIG_MTD_OOB_DEVICE is not set
 CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW is not set
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
@@ -70,6 +65,7 @@ CONFIG_MCI_ATMEL=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_LFN=y
 CONFIG_PNG=y
diff --git a/arch/arm/configs/at91sam9g10ek_defconfig b/arch/arm/configs/at91sam9g10ek_defconfig
index 40b4b9a..17713cd 100644
--- a/arch/arm/configs/at91sam9g10ek_defconfig
+++ b/arch/arm/configs/at91sam9g10ek_defconfig
@@ -1,54 +1,51 @@
 CONFIG_ARCH_AT91SAM9G10=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9G10-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_INITRD=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_DM9K=y
 # CONFIG_SPI is not set
@@ -59,7 +56,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
@@ -67,3 +63,4 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
 CONFIG_KEYBOARD_GPIO=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20ek_defconfig
index a501ec5..6791be2 100644
--- a/arch/arm/configs/at91sam9g20ek_defconfig
+++ b/arch/arm/configs/at91sam9g20ek_defconfig
@@ -1,55 +1,50 @@
 CONFIG_ARCH_AT91SAM9G20=y
 CONFIG_AT91_HAVE_2MMC=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_PROMPT="9G20-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
@@ -60,7 +55,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
@@ -70,5 +64,6 @@ CONFIG_MCI_ATMEL=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/at91sam9m10g45ek_defconfig b/arch/arm/configs/at91sam9m10g45ek_defconfig
index 3985072..c38df8f 100644
--- a/arch/arm/configs/at91sam9m10g45ek_defconfig
+++ b/arch/arm/configs/at91sam9m10g45ek_defconfig
@@ -1,15 +1,13 @@
 CONFIG_ARCH_AT91SAM9G45=y
 CONFIG_MACH_AT91SAM9M10G45EK=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_MALLOC_SIZE=0x800000
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9M10G45-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2=">"
 CONFIG_HUSH_FANCY_PROMPT=y
@@ -17,48 +15,47 @@ CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 CONFIG_PASSWD_SUM_SHA1=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
 CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -73,7 +70,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
 CONFIG_USB_EHCI_ATMEL=y
@@ -86,6 +82,7 @@ CONFIG_MCI_ATMEL=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/at91sam9m10ihd_defconfig b/arch/arm/configs/at91sam9m10ihd_defconfig
index cc6d10c..006d2ac 100644
--- a/arch/arm/configs/at91sam9m10ihd_defconfig
+++ b/arch/arm/configs/at91sam9m10ihd_defconfig
@@ -1,65 +1,61 @@
 CONFIG_ARCH_AT91SAM9G45=y
-CONFIG_MACH_AT91SAM9M10IHD=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0xa00000
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9M10IHD:"
-CONFIG_LONGHELP=y
 CONFIG_PROMPT_HUSH_PS2=">"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 CONFIG_PASSWD_SUM_SHA1=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9m10ihd/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_PASSWD=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_UBIFORMAT=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_BOOTM_AIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9m10ihd/env"
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -76,7 +72,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
 CONFIG_USB_EHCI_ATMEL=y
diff --git a/arch/arm/configs/at91sam9n12ek_defconfig b/arch/arm/configs/at91sam9n12ek_defconfig
index e73e383..4ec3e90 100644
--- a/arch/arm/configs/at91sam9n12ek_defconfig
+++ b/arch/arm/configs/at91sam9n12ek_defconfig
@@ -1,58 +1,56 @@
 CONFIG_ARCH_AT91SAM9N12=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x26f00000
 CONFIG_MALLOC_SIZE=0xa00000
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9G20-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_SPI=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_KS8851_MLL=y
 CONFIG_DRIVER_SPI_ATMEL=y
@@ -67,7 +65,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
 CONFIG_NAND_ATMEL_PMECC=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
diff --git a/arch/arm/configs/at91sam9x5ek_defconfig b/arch/arm/configs/at91sam9x5ek_defconfig
index 1af5ec6..6ee0052 100644
--- a/arch/arm/configs/at91sam9x5ek_defconfig
+++ b/arch/arm/configs/at91sam9x5ek_defconfig
@@ -1,74 +1,69 @@
 CONFIG_ARCH_AT91SAM9X5=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0xa00000
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="9G20-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_MACB=y
 CONFIG_NET_USB=y
 CONFIG_NET_USB_ASIX=y
 CONFIG_DRIVER_SPI_ATMEL=y
-CONFIG_MTD_M25P80=y
 CONFIG_I2C=y
 CONFIG_I2C_GPIO=y
 CONFIG_MTD=y
 # CONFIG_MTD_OOB_DEVICE is not set
 CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
 CONFIG_NAND=y
 # CONFIG_NAND_ECC_SOFT is not set
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
 CONFIG_NAND_ATMEL_PMECC=y
-CONFIG_UBI=y
 CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
 CONFIG_USB_EHCI_ATMEL=y
@@ -80,14 +75,13 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
 CONFIG_EEPROM_AT24=y
+CONFIG_KEYBOARD_GPIO=y
 CONFIG_KEYBOARD_QT1070=y
 CONFIG_W1=y
 CONFIG_W1_MASTER_GPIO=y
 CONFIG_W1_SLAVE_DS2431=y
 CONFIG_W1_SLAVE_DS2433=y
-CONFIG_KEYBOARD_GPIO=y
 CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
-CONFIG_PNG=y
diff --git a/arch/arm/configs/canon-a1100_defconfig b/arch/arm/configs/canon-a1100_defconfig
index 5c1e195..2994bf3 100644
--- a/arch/arm/configs/canon-a1100_defconfig
+++ b/arch/arm/configs/canon-a1100_defconfig
@@ -1,5 +1,4 @@
 CONFIG_BUILTIN_DTB=y
-CONFIG_BUILTIN_DTB_NAME="canon-a1100"
 CONFIG_ARCH_DIGIC=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
@@ -47,7 +46,6 @@ CONFIG_MTD=y
 # CONFIG_MTD_WRITE is not set
 CONFIG_DRIVER_CFI=y
 # CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
-CONFIG_CLOCKSOURCE_DUMMY=y
 CONFIG_CLOCKSOURCE_DUMMY_RATE=2000
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
diff --git a/arch/arm/configs/ccmx51_defconfig b/arch/arm/configs/ccmx51_defconfig
index 4e5fe2f..c16f73f 100644
--- a/arch/arm/configs/ccmx51_defconfig
+++ b/arch/arm/configs/ccmx51_defconfig
@@ -1,50 +1,46 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX51=y
 CONFIG_MACH_CCMX51=y
 CONFIG_AEABI=y
-CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x2000000
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_DEFAULT_ENVIRONMENT_COMPRESSED_LZO=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/ccxmx51/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_ECHO_E=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OFTREE_PROBE=y
-CONFIG_CMD_NANDTEST=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_NANDTEST=y
 CONFIG_CMD_SPI=y
-CONFIG_CMD_CLK=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_DRIVER_NET_SMC911X=y
 CONFIG_DRIVER_NET_FEC_IMX=y
+CONFIG_DRIVER_NET_SMC911X=y
 CONFIG_I2C=y
 CONFIG_I2C_IMX=y
 CONFIG_MTD=y
diff --git a/arch/arm/configs/cfa10036_defconfig b/arch/arm/configs/cfa10036_defconfig
index 9d40a3c..2283658 100644
--- a/arch/arm/configs/cfa10036_defconfig
+++ b/arch/arm/configs/cfa10036_defconfig
@@ -6,34 +6,29 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x43000000
 CONFIG_MALLOC_SIZE=0x800000
-CONFIG_BROKEN=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/crystalfontz-cfa10036/env"
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_OFTREE=y
 # CONFIG_SPI is not set
 CONFIG_I2C=y
 CONFIG_MCI=y
diff --git a/arch/arm/configs/chumbyone_defconfig b/arch/arm/configs/chumbyone_defconfig
index 92b59b8..bb7473f 100644
--- a/arch/arm/configs/chumbyone_defconfig
+++ b/arch/arm/configs/chumbyone_defconfig
@@ -4,40 +4,35 @@ CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x1000000
-CONFIG_BROKEN=y
 CONFIG_PROMPT="chumby:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMD_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/chumby_falconwing/env"
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_ECHO_E=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_GETOPT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_GPIO=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_NET_USB=y
@@ -49,4 +44,4 @@ CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_STM=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
-CONFIG_MCI_STM378X=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/cupid_defconfig b/arch/arm/configs/cupid_defconfig
index a1776d2..13d3888 100644
--- a/arch/arm/configs/cupid_defconfig
+++ b/arch/arm/configs/cupid_defconfig
@@ -1,8 +1,6 @@
 CONFIG_ARCH_IMX=y
 CONFIG_CACHE_L2X0=y
-CONFIG_ARCH_IMX35=y
 CONFIG_MACH_GUF_CUPID=y
-CONFIG_IMX_CLKO=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
@@ -11,48 +9,46 @@ CONFIG_TEXT_BASE=0x87F00000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
-CONFIG_NET_NFS=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_TIME=y
+CONFIG_NET=y
+CONFIG_NET_NFS=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_FEC_IMX=y
@@ -62,11 +58,11 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_SOFT is not set
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 CONFIG_NAND_IMX=y
-CONFIG_UBI=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_IMX_IPU=y
 CONFIG_MCI=y
 CONFIG_MCI_IMX_ESDHC=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/datamodul-edm-qmx6_defconfig b/arch/arm/configs/datamodul-edm-qmx6_defconfig
index 2a4a2ef..1ef656a 100644
--- a/arch/arm/configs/datamodul-edm-qmx6_defconfig
+++ b/arch/arm/configs/datamodul-edm-qmx6_defconfig
@@ -5,7 +5,6 @@ CONFIG_MACH_REALQ7=y
 CONFIG_IMX_IIM=y
 CONFIG_IMX_IIM_FUSE_BLOW=y
 CONFIG_THUMB2_BAREBOX=y
-CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 CONFIG_MMU=y
@@ -13,59 +12,60 @@ CONFIG_TEXT_BASE=0x0
 CONFIG_MALLOC_SIZE=0x0
 CONFIG_MALLOC_TLSF=y
 CONFIG_RELOCATABLE=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_NONE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/datamodul-edm-qmx6/env"
 CONFIG_RESET_SOURCE=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_ARM_MMUINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_LN=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
 CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DETECT=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_MAGICVAR=y
-CONFIG_CMD_MAGICVAR_HELP=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_SPI=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DETECT=y
 CONFIG_CMD_WD=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
 CONFIG_NET_RESOLV=y
 CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
diff --git a/arch/arm/configs/dss11_defconfig b/arch/arm/configs/dss11_defconfig
index f15fb6b..3da4220 100644
--- a/arch/arm/configs/dss11_defconfig
+++ b/arch/arm/configs/dss11_defconfig
@@ -3,25 +3,23 @@ CONFIG_MACH_DSS11=y
 CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_PARTITION_DISK_DOS=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_LED=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_NET_MACB=y
 CONFIG_DRIVER_SPI_ATMEL=y
 CONFIG_MTD=y
@@ -29,7 +27,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_DISK_WRITE=y
 CONFIG_USB_HOST=y
 CONFIG_USB_OHCI=y
@@ -43,6 +40,7 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_GPIO_RGB=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/duckbill_defconfig b/arch/arm/configs/duckbill_defconfig
index 74e0b78..28ea405 100644
--- a/arch/arm/configs/duckbill_defconfig
+++ b/arch/arm/configs/duckbill_defconfig
@@ -15,6 +15,9 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
 CONFIG_BLSPEC=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_RESET_SOURCE=y
@@ -23,9 +26,6 @@ CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_UIMAGE=y
diff --git a/arch/arm/configs/edb93xx_defconfig b/arch/arm/configs/edb93xx_defconfig
index 89b3ca8..84c920a 100644
--- a/arch/arm/configs/edb93xx_defconfig
+++ b/arch/arm/configs/edb93xx_defconfig
@@ -1,34 +1,33 @@
 CONFIG_ARCH_EP93XX=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/edb93xx/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_READLINE=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
-CONFIG_CMD_MTEST=y
 CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
 CONFIG_CMD_GPIO=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_NET_EP93XX=y
 # CONFIG_SPI is not set
 CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/efika-mx-smartbook_defconfig b/arch/arm/configs/efika-mx-smartbook_defconfig
index 816cf26..a988a0c 100644
--- a/arch/arm/configs/efika-mx-smartbook_defconfig
+++ b/arch/arm/configs/efika-mx-smartbook_defconfig
@@ -1,86 +1,81 @@
-CONFIG_IMX_MULTI_BOARDS=y
-CONFIG_BUILTIN_DTB=y
-CONFIG_BUILTIN_DTB_NAME="imx51-genesi-efika-sb"
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX51=y
+CONFIG_IMX_MULTI_BOARDS=y
 CONFIG_MACH_EFIKA_MX_SMARTBOOK=y
 CONFIG_IMX_IIM=y
 CONFIG_IMX_IIM_FUSE_BLOW=y
 CONFIG_THUMB2_BAREBOX=y
-CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
-CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/efika-mx-smartbook/env/"
 CONFIG_RESET_SOURCE=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_ARM_MMUINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TIME=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_LN=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
 CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DETECT=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_MAGICVAR=y
-CONFIG_CMD_MAGICVAR_HELP=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_SPI=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_DETECT=y
 CONFIG_CMD_WD=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_OFDEVICE=y
 CONFIG_NET_USB=y
 CONFIG_NET_USB_ASIX=y
 CONFIG_NET_USB_SMSC95XX=y
-CONFIG_DRIVER_SPI_IMX=y
 CONFIG_I2C=y
 CONFIG_I2C_IMX=y
 CONFIG_MTD=y
@@ -97,7 +92,6 @@ CONFIG_USB_STORAGE=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_IMX_ESDHC=y
-CONFIG_MFD_MC13XXX=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
diff --git a/arch/arm/configs/eukrea_cpuimx25_defconfig b/arch/arm/configs/eukrea_cpuimx25_defconfig
index feebb13..b296122 100644
--- a/arch/arm/configs/eukrea_cpuimx25_defconfig
+++ b/arch/arm/configs/eukrea_cpuimx25_defconfig
@@ -16,17 +16,17 @@ CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_COMPRESSION_LZO=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_RESET=y
diff --git a/arch/arm/configs/eukrea_cpuimx27_defconfig b/arch/arm/configs/eukrea_cpuimx27_defconfig
index 36261af..c9672d3 100644
--- a/arch/arm/configs/eukrea_cpuimx27_defconfig
+++ b/arch/arm/configs/eukrea_cpuimx27_defconfig
@@ -1,52 +1,46 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX27=y
 CONFIG_MACH_EUKREA_CPUIMX27=y
-CONFIG_IMX_CLKO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0xa7f00000
 CONFIG_MALLOC_SIZE=0x800000
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/eukrea_cpuimx27/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
-CONFIG_CMD_MTEST=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_SPLASH=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_I2C=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
 CONFIG_I2C=y
 CONFIG_I2C_IMX=y
-CONFIG_MFD_LP3972=y
 CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 # CONFIG_DRIVER_CFI_AMD is not set
@@ -55,3 +49,5 @@ CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_IMX=y
+CONFIG_MFD_LP3972=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/eukrea_cpuimx35_defconfig b/arch/arm/configs/eukrea_cpuimx35_defconfig
index edc5b9c..bd19fc4 100644
--- a/arch/arm/configs/eukrea_cpuimx35_defconfig
+++ b/arch/arm/configs/eukrea_cpuimx35_defconfig
@@ -16,6 +16,11 @@ CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_COMPRESSION_LZO=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
@@ -23,11 +28,6 @@ CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_IMD=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_RESET=y
diff --git a/arch/arm/configs/eukrea_cpuimx51_defconfig b/arch/arm/configs/eukrea_cpuimx51_defconfig
index e1b011b..8d700b1 100644
--- a/arch/arm/configs/eukrea_cpuimx51_defconfig
+++ b/arch/arm/configs/eukrea_cpuimx51_defconfig
@@ -1,54 +1,52 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX51=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_MACH_EUKREA_CPUIMX51SD=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_RESET=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_FEC_IMX=y
@@ -58,7 +56,6 @@ CONFIG_I2C_IMX=y
 CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_IMX=y
-CONFIG_UBI=y
 CONFIG_MCI=y
 CONFIG_MCI_IMX_ESDHC=y
 CONFIG_LED=y
diff --git a/arch/arm/configs/freescale-mx21-ads_defconfig b/arch/arm/configs/freescale-mx21-ads_defconfig
index c50b2c9..e1645bd 100644
--- a/arch/arm/configs/freescale-mx21-ads_defconfig
+++ b/arch/arm/configs/freescale-mx21-ads_defconfig
@@ -3,31 +3,31 @@ CONFIG_MACH_IMX21ADS=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_TEXT_BASE=0xc3000000
 CONFIG_MALLOC_SIZE=0x2000000
-CONFIG_LONGHELP=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx21-ads/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
 CONFIG_CMD_GPIO=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_DRIVER_NET_CS8900=y
 # CONFIG_SPI is not set
 CONFIG_MTD=y
diff --git a/arch/arm/configs/freescale-mx23-evk_defconfig b/arch/arm/configs/freescale-mx23-evk_defconfig
index 1502d22..3dc8cc4 100644
--- a/arch/arm/configs/freescale-mx23-evk_defconfig
+++ b/arch/arm/configs/freescale-mx23-evk_defconfig
@@ -1,26 +1,22 @@
 CONFIG_ARCH_MXS=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_BROKEN=y
-CONFIG_LONGHELP=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_RESET_SOURCE=y
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
 # CONFIG_SPI is not set
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
diff --git a/arch/arm/configs/freescale-mx25-3ds_defconfig b/arch/arm/configs/freescale-mx25-3ds_defconfig
index 1fd8be2..49515f7 100644
--- a/arch/arm/configs/freescale-mx25-3ds_defconfig
+++ b/arch/arm/configs/freescale-mx25-3ds_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX25=y
 CONFIG_MACH_FREESCALE_MX25_3STACK=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
@@ -9,50 +8,49 @@ CONFIG_TEXT_BASE=0x87F00000
 CONFIG_MALLOC_SIZE=0x01000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 # CONFIG_ERRNO_MESSAGES is not set
-CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_TIME=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
 CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
+CONFIG_FS_TFTP=y
 CONFIG_ZLIB=y
 CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/configs/freescale-mx27-ads_defconfig b/arch/arm/configs/freescale-mx27-ads_defconfig
index dd4cb1f..e94a47e 100644
--- a/arch/arm/configs/freescale-mx27-ads_defconfig
+++ b/arch/arm/configs/freescale-mx27-ads_defconfig
@@ -1,39 +1,35 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX27=y
 CONFIG_MACH_IMX27ADS=y
-CONFIG_IMX_CLKO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_TEXT_BASE=0xa7f00000
-CONFIG_LONGHELP=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx27-ads/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_READLINE=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
 CONFIG_CMD_GPIO=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_SPI_IMX=y
 CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 # CONFIG_DRIVER_CFI_INTEL is not set
 CONFIG_CFI_BUFFER_WRITE=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/freescale-mx28-evk_defconfig b/arch/arm/configs/freescale-mx28-evk_defconfig
index c71bf84..6c0bb02 100644
--- a/arch/arm/configs/freescale-mx28-evk_defconfig
+++ b/arch/arm/configs/freescale-mx28-evk_defconfig
@@ -14,6 +14,9 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
 CONFIG_BLSPEC=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_RESET_SOURCE=y
@@ -22,9 +25,6 @@ CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_UIMAGE=y
diff --git a/arch/arm/configs/freescale-mx35-3ds_defconfig b/arch/arm/configs/freescale-mx35-3ds_defconfig
index 816dc78..29d2aa8 100644
--- a/arch/arm/configs/freescale-mx35-3ds_defconfig
+++ b/arch/arm/configs/freescale-mx35-3ds_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX35=y
 CONFIG_MACH_FREESCALE_MX35_3STACK=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
@@ -8,58 +7,56 @@ CONFIG_TEXT_BASE=0x87F00000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_CMD_I2C=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
-CONFIG_DRIVER_NET_SMC911X=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_TIME=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_FEC_IMX=y
+CONFIG_DRIVER_NET_SMC911X=y
 # CONFIG_SPI is not set
+CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
-CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_IMX=y
-CONFIG_UBI=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_IMX_IPU=y
+CONFIG_FS_TFTP=y
 CONFIG_ZLIB=y
 CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/configs/freescale-mx53-smd_defconfig b/arch/arm/configs/freescale-mx53-smd_defconfig
index c7f2191..4677e07 100644
--- a/arch/arm/configs/freescale-mx53-smd_defconfig
+++ b/arch/arm/configs/freescale-mx53-smd_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX53=y
 CONFIG_MACH_FREESCALE_MX53_SMD=y
 CONFIG_IMX_IIM=y
 CONFIG_IMX_IIM_FUSE_BLOW=y
@@ -7,57 +6,55 @@ CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 CONFIG_MMU=y
-CONFIG_TEXT_BASE=0x7ff00000
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEBUG_INFO=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
-CONFIG_NET_NFS=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_TIME=y
+CONFIG_NET=y
+CONFIG_NET_NFS=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_IMX_ESDHC=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/friendlyarm_mini2440_defconfig b/arch/arm/configs/friendlyarm_mini2440_defconfig
index 25db5be..19a5a4e 100644
--- a/arch/arm/configs/friendlyarm_mini2440_defconfig
+++ b/arch/arm/configs/friendlyarm_mini2440_defconfig
@@ -5,7 +5,6 @@ CONFIG_S3C_NAND_BOOT=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_TEXT_BASE=0x33e00000
-CONFIG_BROKEN=y
 CONFIG_PROMPT="mini2440:"
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
diff --git a/arch/arm/configs/friendlyarm_mini6410_defconfig b/arch/arm/configs/friendlyarm_mini6410_defconfig
index 1789374..209e3f8 100644
--- a/arch/arm/configs/friendlyarm_mini6410_defconfig
+++ b/arch/arm/configs/friendlyarm_mini6410_defconfig
@@ -1,37 +1,33 @@
 CONFIG_ARCH_S3C64xx=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_BROKEN=y
 CONFIG_PROMPT="mini6410:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
-CONFIG_PARTITION_DISK=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
-CONFIG_NET_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_GPIO=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_DM9K=y
 # CONFIG_SPI is not set
 CONFIG_ZLIB=y
diff --git a/arch/arm/configs/friendlyarm_tiny210_defconfig b/arch/arm/configs/friendlyarm_tiny210_defconfig
index 8686c65..1d16479 100644
--- a/arch/arm/configs/friendlyarm_tiny210_defconfig
+++ b/arch/arm/configs/friendlyarm_tiny210_defconfig
@@ -1,16 +1,7 @@
 CONFIG_ARCH_S5PCxx=y
-CONFIG_CPU_V7=y
-CONFIG_CPU_32v7=y
-CONFIG_ARCH_BAREBOX_MAX_BARE_INIT_SIZE=0x1ff0
-CONFIG_ARCH_SAMSUNG=y
-CONFIG_CPU_S5PV210=y
-CONFIG_MACH_TINY210=y
-CONFIG_S3C_LOWLEVEL_INIT=y
 CONFIG_S3C_PLL_INIT=y
-CONFIG_S3C_SDRAM_INIT=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_DRIVER_SERIAL_S3C=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
diff --git a/arch/arm/configs/friendlyarm_tiny6410_defconfig b/arch/arm/configs/friendlyarm_tiny6410_defconfig
index 90208c3..85ae781 100644
--- a/arch/arm/configs/friendlyarm_tiny6410_defconfig
+++ b/arch/arm/configs/friendlyarm_tiny6410_defconfig
@@ -2,37 +2,33 @@ CONFIG_ARCH_S3C64xx=y
 CONFIG_MACH_TINY6410=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_BROKEN=y
 CONFIG_PROMPT="tiny6410:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
-CONFIG_PARTITION_DISK=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
-CONFIG_NET_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_GPIO=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_DM9K=y
 # CONFIG_SPI is not set
 CONFIG_ZLIB=y
diff --git a/arch/arm/configs/haba_knx_lite_defconfig b/arch/arm/configs/haba_knx_lite_defconfig
index d01c412..0917715 100644
--- a/arch/arm/configs/haba_knx_lite_defconfig
+++ b/arch/arm/configs/haba_knx_lite_defconfig
@@ -15,16 +15,16 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-# CONFIG_CMD_ARM_CPUINFO is not set
-CONFIG_LONGHELP=y
-CONFIG_CMD_MEMINFO=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
diff --git a/arch/arm/configs/highbank_defconfig b/arch/arm/configs/highbank_defconfig
index 01b17bc..8a045d8 100644
--- a/arch/arm/configs/highbank_defconfig
+++ b/arch/arm/configs/highbank_defconfig
@@ -6,49 +6,46 @@ CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0xa00000
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="vexpress: "
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_PASSWD=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_POWEROFF=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OFTREE_PROBE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CLK=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_SERIAL_AMBA_PL011=y
diff --git a/arch/arm/configs/imx233-olinuxino_defconfig b/arch/arm/configs/imx233-olinuxino_defconfig
index eec1ce4..991386b 100644
--- a/arch/arm/configs/imx233-olinuxino_defconfig
+++ b/arch/arm/configs/imx233-olinuxino_defconfig
@@ -14,6 +14,11 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_BLSPEC=y
 CONFIG_DEFAULT_COMPRESSION_LZO=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
@@ -24,11 +29,6 @@ CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_IMD=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
diff --git a/arch/arm/configs/imx_v7-xload_defconfig b/arch/arm/configs/imx_v7-xload_defconfig
index 1d82f98..dcf100d 100644
--- a/arch/arm/configs/imx_v7-xload_defconfig
+++ b/arch/arm/configs/imx_v7-xload_defconfig
@@ -1,52 +1,31 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX_IMXIMAGE=y
 CONFIG_ARCH_IMX_XLOAD=y
-
-CONFIG_ARCH_IMX51=y
 CONFIG_IMX_MULTI_BOARDS=y
 CONFIG_MACH_FREESCALE_MX51_PDK=y
-
 CONFIG_THUMB2_BAREBOX=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x0
 CONFIG_MALLOC_SIZE=0x0
 CONFIG_MALLOC_DUMMY=y
 CONFIG_RELOCATABLE=y
-CONFIG_BAUDRATE=115200
 CONFIG_SHELL_NONE=y
-
+# CONFIG_ERRNO_MESSAGES is not set
+# CONFIG_TIMESTAMP is not set
 CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_IMX51_UART=y
-CONFIG_DEBUG_IMX_UART_PORT=1
-
-CONFIG_HAS_DEBUG_LL=y
-
 CONFIG_MTD=y
 # CONFIG_MTD_WRITE is not set
 CONFIG_MTD_DATAFLASH=y
-
-# CONFIG_ERRNO_MESSAGES is not set
-# CONFIG_TIMESTAMP is not set
-# CONFIG_DEFAULT_ENVIRONMENT is not set
-CONFIG_DRIVER_SERIAL_IMX=y
-
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 # CONFIG_MCI_WRITE is not set
-
 CONFIG_MCI_IMX_ESDHC=y
-
 CONFIG_EEPROM_AT25=y
-
-CONFIG_WATCHDOG_IMX_RESET_SOURCE=y
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_IMX=y
-
 # CONFIG_FS_RAMFS is not set
 # CONFIG_FS_DEVFS is not set
 CONFIG_FS_FAT=y
 CONFIG_BOOTSTRAP=y
-CONFIG_BOOTSTRAP_DISK=y
 CONFIG_BOOTSTRAP_DEVFS=y
+CONFIG_BOOTSTRAP_DISK=y
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index 50106df..df67cd0 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -44,6 +44,11 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_NONE=y
 CONFIG_PARTITION_DISK_EFI=y
@@ -57,11 +62,6 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_MMC_EXTCSD=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
@@ -117,7 +117,6 @@ CONFIG_CMD_TIME=y
 CONFIG_NET=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
-CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 CONFIG_AT803X_PHY=y
@@ -125,7 +124,6 @@ CONFIG_MICREL_PHY=y
 CONFIG_NET_USB=y
 CONFIG_NET_USB_ASIX=y
 CONFIG_NET_USB_SMSC95XX=y
-CONFIG_DRIVER_SPI_IMX=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_DEVICE=y
 CONFIG_MTD_DATAFLASH=y
@@ -160,7 +158,6 @@ CONFIG_DRIVER_VIDEO_EDID=y
 CONFIG_MCI=y
 CONFIG_MCI_MMC_BOOT_PARTITIONS=y
 CONFIG_MCI_IMX_ESDHC=y
-CONFIG_MFD_MC13XXX=y
 CONFIG_MFD_MC34704=y
 CONFIG_MFD_MC9SDZ60=y
 CONFIG_MFD_STMPE=y
diff --git a/arch/arm/configs/lubbock_defconfig b/arch/arm/configs/lubbock_defconfig
index df777ba..a45d723 100644
--- a/arch/arm/configs/lubbock_defconfig
+++ b/arch/arm/configs/lubbock_defconfig
@@ -16,6 +16,10 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/lubbock/env"
@@ -25,10 +29,6 @@ CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADS=y
@@ -56,7 +56,6 @@ CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_SPLASH=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
@@ -101,5 +100,3 @@ CONFIG_FS_UBIFS=y
 CONFIG_FS_UBIFS_COMPRESSION_LZO=y
 CONFIG_FS_UBIFS_COMPRESSION_ZLIB=y
 CONFIG_BZLIB=y
-CONFIG_BMP=y
-CONFIG_PNG=y
diff --git a/arch/arm/configs/mainstone_defconfig b/arch/arm/configs/mainstone_defconfig
index 171dda1..c8e4f78 100644
--- a/arch/arm/configs/mainstone_defconfig
+++ b/arch/arm/configs/mainstone_defconfig
@@ -17,6 +17,10 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mainstone/env"
@@ -26,10 +30,6 @@ CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADS=y
@@ -59,7 +59,6 @@ CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_SPLASH=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
@@ -104,5 +103,3 @@ CONFIG_FS_UBIFS=y
 CONFIG_FS_UBIFS_COMPRESSION_LZO=y
 CONFIG_FS_UBIFS_COMPRESSION_ZLIB=y
 CONFIG_BZLIB=y
-CONFIG_BMP=y
-CONFIG_PNG=y
diff --git a/arch/arm/configs/mioa701_defconfig b/arch/arm/configs/mioa701_defconfig
index d881b56..9943011 100644
--- a/arch/arm/configs/mioa701_defconfig
+++ b/arch/arm/configs/mioa701_defconfig
@@ -7,75 +7,74 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 # CONFIG_BANNER is not set
 CONFIG_MMU=y
-CONFIG_TEXT_BASE=0xa3d00000
 CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0x80000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MODULES=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMD_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_FLEXIBLE_BOOTARGS=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mioa701/env"
 CONFIG_RESET_SOURCE=y
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_BOOT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADS=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_SAVES=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_AUTOMOUNT=y
+CONFIG_CMD_UBIFORMAT=y
 CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_LET=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_PASSWD=y
-CONFIG_CMD_TIME=y
 CONFIG_CMD_GLOBAL=y
-CONFIG_CMD_AUTOMOUNT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_BASENAME=y
 CONFIG_CMD_DIRNAME=y
+CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_LN=y
 CONFIG_CMD_READLINK=y
-CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_GETOPT=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_LOADY=y
-CONFIG_CMD_LOADS=y
-CONFIG_CMD_SAVES=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_MM=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
 CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_UBIFORMAT=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_FLEXIBLE_BOOTARGS=y
-CONFIG_CMD_BOOT=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_POWEROFF=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
 CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_LSMOD=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_DETECT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_LED=y
-CONFIG_CMD_DETECT=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_LSMOD=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
 CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_DRIVER_SERIAL_PXA=y
diff --git a/arch/arm/configs/mmccpu_defconfig b/arch/arm/configs/mmccpu_defconfig
index 0fc4e97..8143b98 100644
--- a/arch/arm/configs/mmccpu_defconfig
+++ b/arch/arm/configs/mmccpu_defconfig
@@ -1,39 +1,37 @@
 CONFIG_ARCH_AT91SAM9263=y
 CONFIG_MACH_MMCCPU=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mmccpu/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_READLINE=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
 CONFIG_CMD_GPIO=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
 CONFIG_I2C=y
 CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/module-mb7707_defconfig b/arch/arm/configs/module-mb7707_defconfig
index 83a798b..189f295 100644
--- a/arch/arm/configs/module-mb7707_defconfig
+++ b/arch/arm/configs/module-mb7707_defconfig
@@ -1,5 +1,4 @@
 CONFIG_BUILTIN_DTB=y
-CONFIG_BUILTIN_DTB_NAME="module-mb7707"
 CONFIG_ARCH_UEMD=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
@@ -44,6 +43,5 @@ CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
 CONFIG_USB_STORAGE=y
-CONFIG_CLOCKSOURCE_DUMMY=y
 CONFIG_DIGEST_SHA1_GENERIC=y
 CONFIG_DIGEST_SHA256_GENERIC=y
diff --git a/arch/arm/configs/neso_defconfig b/arch/arm/configs/neso_defconfig
index 3015663..7d6ab28 100644
--- a/arch/arm/configs/neso_defconfig
+++ b/arch/arm/configs/neso_defconfig
@@ -1,8 +1,6 @@
 CONFIG_ARCH_IMX=y
 CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND=y
-CONFIG_ARCH_IMX27=y
 CONFIG_MACH_NESO=y
-CONFIG_IMX_CLKO=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
@@ -10,49 +8,46 @@ CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
-CONFIG_NET_NFS=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_TIME=y
+CONFIG_NET=y
+CONFIG_NET_NFS=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_FEC_IMX=y
@@ -64,10 +59,10 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_SOFT is not set
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 CONFIG_NAND_IMX=y
-CONFIG_UBI=y
 CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
 CONFIG_USB_ULPI=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_IMX=y
 CONFIG_IMXFB_DRIVER_VIDEO_IMX_OVERLAY=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/netx_nxdb500_defconfig b/arch/arm/configs/netx_nxdb500_defconfig
index 745afc1..8755f63 100644
--- a/arch/arm/configs/netx_nxdb500_defconfig
+++ b/arch/arm/configs/netx_nxdb500_defconfig
@@ -1,31 +1,30 @@
 CONFIG_ARCH_NETX=y
 CONFIG_TEXT_BASE=0x08f80000
-CONFIG_BROKEN=y
-CONFIG_LONGHELP=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_PARTITION=y
 # CONFIG_DEFAULT_ENVIRONMENT is not set
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_NET=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_FLASH=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_NETX=y
 CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
index 1526d79..63c777b 100644
--- a/arch/arm/configs/nhk8815_defconfig
+++ b/arch/arm/configs/nhk8815_defconfig
@@ -2,45 +2,41 @@ CONFIG_ARCH_NOMADIK=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_TEXT_BASE=0x03F80000
 CONFIG_PROMPT="Nomadik:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 CONFIG_PASSWD_SUM_SHA1=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_CMD_BOOTM_BZLIB=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_FLASH=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_SERIAL_AMBA_PL011=y
@@ -48,10 +44,8 @@ CONFIG_DRIVER_NET_SMC91111=y
 # CONFIG_SPI is not set
 CONFIG_MTD=y
 CONFIG_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_ECC_SMC=y
 CONFIG_MTD_NAND_NOMADIK=y
-CONFIG_UBI=y
 CONFIG_FS_CRAMFS=y
-CONFIG_MD5=y
+CONFIG_FS_TFTP=y
 CONFIG_DIGEST_SHA256_GENERIC=y
diff --git a/arch/arm/configs/omap3430_sdp3430_per_uart_defconfig b/arch/arm/configs/omap3430_sdp3430_per_uart_defconfig
index 445866f..1c30933 100644
--- a/arch/arm/configs/omap3430_sdp3430_per_uart_defconfig
+++ b/arch/arm/configs/omap3430_sdp3430_per_uart_defconfig
@@ -1,34 +1,28 @@
 CONFIG_ARCH_OMAP=y
-# CONFIG_OMAP3_COPY_CLOCK_SRAM is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-# CONFIG_COMPILE_MEMORY is not set
 CONFIG_TEXT_BASE=0x40200000
-CONFIG_MEMORY_LAYOUT_FIXED=y
-CONFIG_STACK_BASE=0x87BF7F10
-CONFIG_MALLOC_BASE=0x87BFFF10
 CONFIG_PROMPT="X-load 343x> "
-CONFIG_LONGHELP=y
 CONFIG_SHELL_SIMPLE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 # CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_CMD_LS is not set
-# CONFIG_CMD_RM is not set
+# CONFIG_CMD_HELP is not set
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_MOUNT is not set
+# CONFIG_CMD_UMOUNT is not set
 # CONFIG_CMD_CAT is not set
-# CONFIG_CMD_MKDIR is not set
-# CONFIG_CMD_RMDIR is not set
+# CONFIG_CMD_CD is not set
 # CONFIG_CMD_CP is not set
+# CONFIG_CMD_LS is not set
+# CONFIG_CMD_MKDIR is not set
 # CONFIG_CMD_PWD is not set
-# CONFIG_CMD_CD is not set
-# CONFIG_CMD_MOUNT is not set
-# CONFIG_CMD_UMOUNT is not set
+# CONFIG_CMD_RM is not set
+# CONFIG_CMD_RMDIR is not set
 # CONFIG_CMD_CLEAR is not set
 # CONFIG_CMD_ECHO is not set
-CONFIG_CMD_LOADB=y
-# CONFIG_CMD_BOOTM is not set
-CONFIG_CMD_GO=y
-# CONFIG_CMD_HELP is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/omap3530_beagle_defconfig b/arch/arm/configs/omap3530_beagle_defconfig
index d4e955e..b454cf2 100644
--- a/arch/arm/configs/omap3530_beagle_defconfig
+++ b/arch/arm/configs/omap3530_beagle_defconfig
@@ -15,6 +15,11 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_BLSPEC=y
 CONFIG_IMD_TARGET=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
@@ -28,11 +33,6 @@ CONFIG_CMD_IOMEM=y
 CONFIG_CMD_IMD=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
diff --git a/arch/arm/configs/omap3530_beagle_per_uart_defconfig b/arch/arm/configs/omap3530_beagle_per_uart_defconfig
index f574666..9acfe2f 100644
--- a/arch/arm/configs/omap3530_beagle_per_uart_defconfig
+++ b/arch/arm/configs/omap3530_beagle_per_uart_defconfig
@@ -1,32 +1,26 @@
 CONFIG_ARCH_OMAP=y
-# CONFIG_OMAP3_COPY_CLOCK_SRAM is not set
-CONFIG_MACH_BEAGLE=y
 CONFIG_TEXT_BASE=0x40200000
-CONFIG_MEMORY_LAYOUT_FIXED=y
-CONFIG_STACK_BASE=0x87BF7F10
-CONFIG_MALLOC_BASE=0x87BFFF10
 CONFIG_PROMPT="X-load Beagle>"
-CONFIG_LONGHELP=y
 CONFIG_SHELL_SIMPLE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 # CONFIG_DEFAULT_ENVIRONMENT is not set
-# CONFIG_CMD_LS is not set
-# CONFIG_CMD_RM is not set
+# CONFIG_CMD_HELP is not set
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_MOUNT is not set
+# CONFIG_CMD_UMOUNT is not set
 # CONFIG_CMD_CAT is not set
-# CONFIG_CMD_MKDIR is not set
-# CONFIG_CMD_RMDIR is not set
+# CONFIG_CMD_CD is not set
 # CONFIG_CMD_CP is not set
+# CONFIG_CMD_LS is not set
+# CONFIG_CMD_MKDIR is not set
 # CONFIG_CMD_PWD is not set
-# CONFIG_CMD_CD is not set
-# CONFIG_CMD_MOUNT is not set
-# CONFIG_CMD_UMOUNT is not set
+# CONFIG_CMD_RM is not set
+# CONFIG_CMD_RMDIR is not set
 # CONFIG_CMD_CLEAR is not set
 # CONFIG_CMD_ECHO is not set
-CONFIG_CMD_LOADB=y
-# CONFIG_CMD_BOOTM is not set
-CONFIG_CMD_GO=y
-# CONFIG_CMD_HELP is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/omap3530_beagle_xload_defconfig b/arch/arm/configs/omap3530_beagle_xload_defconfig
index 074cc21..d36aaf3 100644
--- a/arch/arm/configs/omap3530_beagle_xload_defconfig
+++ b/arch/arm/configs/omap3530_beagle_xload_defconfig
@@ -18,7 +18,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_OFDEVICE=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig
index 90ace31..7bad6ac 100644
--- a/arch/arm/configs/omap3_evm_defconfig
+++ b/arch/arm/configs/omap3_evm_defconfig
@@ -1,30 +1,25 @@
 CONFIG_ARCH_OMAP=y
-# CONFIG_OMAP3_COPY_CLOCK_SRAM is not set
 CONFIG_MACH_OMAP3EVM=y
 CONFIG_AEABI=y
-# CONFIG_COMPILE_MEMORY is not set
 CONFIG_TEXT_BASE=0x40200000
-CONFIG_MEMORY_LAYOUT_FIXED=y
-CONFIG_STACK_BASE=0x87BF7F10
-CONFIG_MALLOC_BASE=0x87BFFF10
 CONFIG_PROMPT="OMAP3_EVM> "
-CONFIG_LONGHELP=y
 CONFIG_SHELL_SIMPLE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 # CONFIG_DEFAULT_ENVIRONMENT is not set
-# CONFIG_CMD_RM is not set
-# CONFIG_CMD_CAT is not set
-# CONFIG_CMD_MKDIR is not set
-# CONFIG_CMD_RMDIR is not set
-# CONFIG_CMD_CP is not set
-# CONFIG_CMD_MOUNT is not set
-# CONFIG_CMD_UMOUNT is not set
-CONFIG_CMD_LOADB=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTM is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+# CONFIG_CMD_MOUNT is not set
+# CONFIG_CMD_UMOUNT is not set
+# CONFIG_CMD_CAT is not set
+# CONFIG_CMD_CP is not set
+# CONFIG_CMD_MKDIR is not set
+# CONFIG_CMD_RM is not set
+# CONFIG_CMD_RMDIR is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/panda_defconfig b/arch/arm/configs/panda_defconfig
index 85dd75d..f4ff5e2 100644
--- a/arch/arm/configs/panda_defconfig
+++ b/arch/arm/configs/panda_defconfig
@@ -1,7 +1,6 @@
 CONFIG_ARCH_OMAP=y
 CONFIG_MACH_PANDA=y
 CONFIG_THUMB2_BAREBOX=y
-CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 CONFIG_PBL_IMAGE=y
@@ -11,55 +10,56 @@ CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
 CONFIG_PROMPT="barebox> "
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 # CONFIG_TIMESTAMP is not set
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/panda/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_LN=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/panda/env"
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_ARM_MMUINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_LN=y
+CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_SERIAL_NS16550=y
diff --git a/arch/arm/configs/panda_xload_defconfig b/arch/arm/configs/panda_xload_defconfig
index 29a2afd..935dfb5 100644
--- a/arch/arm/configs/panda_xload_defconfig
+++ b/arch/arm/configs/panda_xload_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_OMAP=y
 CONFIG_OMAP_BUILD_IFT=y
 CONFIG_MACH_PANDA=y
 CONFIG_THUMB2_BAREBOX=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x40300000
 CONFIG_MALLOC_SIZE=0x2000000
@@ -12,7 +11,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/phytec-phycard-omap3-xload_defconfig b/arch/arm/configs/phytec-phycard-omap3-xload_defconfig
index 5901ed1..0673fde 100644
--- a/arch/arm/configs/phytec-phycard-omap3-xload_defconfig
+++ b/arch/arm/configs/phytec-phycard-omap3-xload_defconfig
@@ -1,18 +1,13 @@
 CONFIG_ARCH_OMAP=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x0000f000
 CONFIG_OMAP_BUILD_IFT=y
 CONFIG_MACH_PCAAL1=y
-CONFIG_AEABI=y
 CONFIG_THUMB2_BAREBOX=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 # CONFIG_ARM_EXCEPTIONS is not set
 CONFIG_ENVIRONMENT_VARIABLES=y
 CONFIG_TEXT_BASE=0x40200000
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x0000f000
 CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0x0000f000
-CONFIG_MEMORY_LAYOUT_FIXED=y
-CONFIG_STACK_BASE=0x4020F000
 CONFIG_STACK_SIZE=0xc00
-CONFIG_MALLOC_BASE=0x84000000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_MALLOC_DUMMY=y
 CONFIG_PROMPT="X-load pca-a-l1>"
@@ -21,7 +16,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/phytec-phycard-omap3_defconfig b/arch/arm/configs/phytec-phycard-omap3_defconfig
index f811017..bfb7a52 100644
--- a/arch/arm/configs/phytec-phycard-omap3_defconfig
+++ b/arch/arm/configs/phytec-phycard-omap3_defconfig
@@ -1,177 +1,72 @@
-CONFIG_GENERIC_LINKER_SCRIPT=y
-CONFIG_ARM=y
-CONFIG_ARM_LINUX=y
 CONFIG_ARCH_OMAP=y
-CONFIG_CPU_32=y
-CONFIG_CPU_V7=y
-CONFIG_CPU_32v7=y
-CONFIG_ARCH_OMAP3=y
-CONFIG_OMAP_CLOCK_SOURCE_S32K=y
-CONFIG_OMAP3_COPY_CLOCK_SRAM=n
-CONFIG_OMAP_GPMC=y
 CONFIG_MACH_PCAAL1=y
 CONFIG_AEABI=y
-CONFIG_CMD_ARM_CPUINFO=y
-CONFIG_ARM_EXCEPTIONS=y
-CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
-CONFIG_GREGORIAN_CALENDER=y
-CONFIG_HAS_KALLSYMS=y
-CONFIG_HAS_MODULES=y
-CONFIG_COMPILE_MEMORY=y
-CONFIG_ENV_HANDLING=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_BLOCK=y
-CONFIG_BLOCK_WRITE=y
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_ENVIRONMENT_VARIABLES=y
-CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
 CONFIG_TEXT_BASE=0x85000000
-CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
-CONFIG_MEMORY_LAYOUT_DEFAULT=y
-CONFIG_STACK_SIZE=0x8000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_EXPERIMENTAL=y
-CONFIG_MALLOC_DLMALLOC=y
-CONFIG_ARCH_HAS_LOWLEVEL_INIT=y
 CONFIG_PROMPT="phyCARD-A-L1 >"
-CONFIG_BAUDRATE=115200
-CONFIG_LONGHELP=y
-CONFIG_CBSIZE=1024
-CONFIG_MAXARGS=16
-CONFIG_SHELL_HUSH=y
 CONFIG_GLOB=y
-CONFIG_PROMPT_HUSH_PS2="> "
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMD_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_PASSWORD=y
-CONFIG_PASSWD_SUM_MD5=y
-CONFIG_DYNAMIC_CRC_TABLE=y
-CONFIG_ERRNO_MESSAGES=y
-CONFIG_TIMESTAMP=y
-CONFIG_CONSOLE_FULL=y
-CONFIG_CONSOLE_ACTIVATE_FIRST=y
-CONFIG_PARTITION=y
-CONFIG_PARTITION_DISK=y
-CONFIG_PARTITION_DISK_DOS=y
-CONFIG_DEFAULT_ENVIRONMENT=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phytec-phycard-omap3/env"
-CONFIG_COMMAND_SUPPORT=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TRUE=y
-CONFIG_CMD_FALSE=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SHA224SUM=y
+CONFIG_CMD_SHA256SUM=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_GETOPT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
 CONFIG_PASSWD_MODE_STAR=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_LS=y
-CONFIG_CMD_RM=y
-CONFIG_CMD_CAT=y
-CONFIG_CMD_MKDIR=y
-CONFIG_CMD_RMDIR=y
-CONFIG_CMD_CP=y
-CONFIG_CMD_PWD=y
-CONFIG_CMD_CD=y
-CONFIG_CMD_MOUNT=y
-CONFIG_CMD_UMOUNT=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_CLEAR=y
-CONFIG_CMD_ECHO=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
 CONFIG_CMD_CRC_CMP=y
-CONFIG_COMPILE_DIGEST=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_SHA256SUM=y
-CONFIG_CMD_SHA224SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
 CONFIG_CMD_FLASH=y
-CONFIG_CMD_UBI=y
-CONFIG_CMD_BOOTM=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_IMINFO=y
-CONFIG_CMD_BOOTZ=n
-CONFIG_CMD_BOOTU=n
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_TEST=y
-CONFIG_CMD_VERSION=y
-CONFIG_CMD_HELP=y
-CONFIG_CMD_MAGICVAR=y
-CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_DEVINFO=y
-CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
-CONFIG_PHYLIB=y
 CONFIG_DRIVER_NET_SMC911X=y
-CONFIG_DRIVER_NET_SMC911X_ADDRESS_SHIFT=0
-CONFIG_SPI=n
+# CONFIG_SPI is not set
 CONFIG_MTD=y
 CONFIG_NAND=y
-CONFIG_NAND_WRITE=y
-CONFIG_NAND_ECC_SOFT=y
-CONFIG_NAND_ECC_HW=y
-CONFIG_NAND_ECC_HW_SYNDROME=y
-CONFIG_NAND_ECC_HW_NONE=y
-CONFIG_NAND_INFO=y
-CONFIG_NAND_READ_OOB=y
-CONFIG_NAND_BBT=y
-CONFIG_NAND_OOB_DEVICE=y
 CONFIG_NAND_OMAP_GPMC=y
-CONFIG_MTD_NAND_IDS=y
-CONFIG_UBI=y
-CONFIG_DISK=y
-CONFIG_DISK_WRITE=y
-CONFIG_DISK_ATA=y
 CONFIG_DISK_INTF_PLATFORM_IDE=y
 CONFIG_MCI=y
-CONFIG_MCI_INFO=y
-CONFIG_MCI_WRITE=y
 CONFIG_MCI_OMAP_HSMMC=y
 CONFIG_FS_CRAMFS=y
-CONFIG_FS_RAMFS=y
-CONFIG_FS_DEVFS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
-CONFIG_ZLIB=y
 CONFIG_BZLIB=y
-CONFIG_PROCESS_ESCAPE_SEQUENCE=y
 CONFIG_LZO_DECOMPRESS=y
-CONFIG_FDT=y
-CONFIG_OFTREE=y
-CONFIG_CRC32=y
-CONFIG_CRC16=y
-CONFIG_DIGEST=y
-CONFIG_MD5=y
-CONFIG_DIGEST_SHA1_GENERIC=y
-CONFIG_DIGEST_SHA224_GENERIC=y
-CONFIG_DIGEST_SHA256_GENERIC=y
diff --git a/arch/arm/configs/phytec-phycard-omap4-xload_defconfig b/arch/arm/configs/phytec-phycard-omap4-xload_defconfig
index 84160e3..3bd06c7 100644
--- a/arch/arm/configs/phytec-phycard-omap4-xload_defconfig
+++ b/arch/arm/configs/phytec-phycard-omap4-xload_defconfig
@@ -1,16 +1,10 @@
 CONFIG_ARCH_OMAP=y
-CONFIG_ARCH_OMAP4=y
 CONFIG_OMAP_BUILD_IFT=y
 CONFIG_MACH_PCAAXL2=y
-CONFIG_AEABI=y
 CONFIG_THUMB2_BAREBOX=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 # CONFIG_ARM_EXCEPTIONS is not set
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x40300000
-CONFIG_MEMORY_LAYOUT_FIXED=y
-CONFIG_STACK_BASE=0x8f000000
-CONFIG_MALLOC_BASE=0x84000000
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_MALLOC_DUMMY=y
 CONFIG_PROMPT="barebox> "
@@ -18,7 +12,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/phytec-phycard-omap4_defconfig b/arch/arm/configs/phytec-phycard-omap4_defconfig
index d9c89bb..9039307 100644
--- a/arch/arm/configs/phytec-phycard-omap4_defconfig
+++ b/arch/arm/configs/phytec-phycard-omap4_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARCH_OMAP=y
-CONFIG_ARCH_OMAP4=y
 CONFIG_MACH_PCAAXL2=y
 CONFIG_AEABI=y
 CONFIG_ARM_UNWIND=y
@@ -8,38 +7,34 @@ CONFIG_TEXT_BASE=0x8f000000
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_KALLSYMS=y
 CONFIG_PROMPT="barebox> "
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMD_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 # CONFIG_TIMESTAMP is not set
-CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_FLASH=y
-# CONFIG_CMD_BOOTM is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNLZO=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 CONFIG_DRIVER_NET_KS8851_MLL=y
@@ -47,9 +42,9 @@ CONFIG_DRIVER_NET_KS8851_MLL=y
 CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_OMAP_GPMC=y
-CONFIG_UBI=y
 CONFIG_MCI=y
 CONFIG_MCI_OMAP_HSMMC=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/phytec-phycore-imx31_defconfig b/arch/arm/configs/phytec-phycore-imx31_defconfig
index 2f9e499..858dc3b 100644
--- a/arch/arm/configs/phytec-phycore-imx31_defconfig
+++ b/arch/arm/configs/phytec-phycore-imx31_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARCH_IMX=y
 CONFIG_CACHE_L2X0=y
-CONFIG_ARCH_IMX31=y
 CONFIG_MACH_PCM037=y
 CONFIG_IMX_IIM=y
 CONFIG_IMX_IIM_FUSE_BLOW=y
@@ -11,71 +10,67 @@ CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x01000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_PARTITION=y
-CONFIG_PARTITION_DISK=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phytec-phycore-imx31/env"
 CONFIG_RESET_SOURCE=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_DIRNAME=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_LN=y
-CONFIG_CMD_READLINK=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_CMD_FILETYPE=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
 CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_MAGICVAR=y
-CONFIG_CMD_MAGICVAR_HELP=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_SPI=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_CLK=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_SMC911X=y
 CONFIG_NET_USB=y
 CONFIG_NET_USB_ASIX=y
+CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
-CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_IMX=y
-CONFIG_UBI=y
 CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
 CONFIG_FS_EXT4=y
diff --git a/arch/arm/configs/phytec-phycore-imx35_defconfig b/arch/arm/configs/phytec-phycore-imx35_defconfig
index b792b89..b1f8c39 100644
--- a/arch/arm/configs/phytec-phycore-imx35_defconfig
+++ b/arch/arm/configs/phytec-phycore-imx35_defconfig
@@ -12,65 +12,65 @@ CONFIG_TEXT_BASE=0x87E00000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phytec-phycore-imx35/env"
-CONFIG_RESET_SOURCE=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_READF=y
-CONFIG_CMD_LET=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_LN=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_FILETYPE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phytec-phycore-imx35/env"
+CONFIG_RESET_SOURCE=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_LN=y
+CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_READF=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
 CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DETECT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_WD=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/phytec-phycore-omap4460-xload-mmc_defconfig b/arch/arm/configs/phytec-phycore-omap4460-xload-mmc_defconfig
index 4e9e266..27bfbff 100644
--- a/arch/arm/configs/phytec-phycore-omap4460-xload-mmc_defconfig
+++ b/arch/arm/configs/phytec-phycore-omap4460-xload-mmc_defconfig
@@ -14,7 +14,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/phytec-phycore-omap4460-xload-nand_defconfig b/arch/arm/configs/phytec-phycore-omap4460-xload-nand_defconfig
index 14b8288..46e65b9 100644
--- a/arch/arm/configs/phytec-phycore-omap4460-xload-nand_defconfig
+++ b/arch/arm/configs/phytec-phycore-omap4460-xload-nand_defconfig
@@ -15,7 +15,6 @@ CONFIG_SHELL_NONE=y
 # CONFIG_TIMESTAMP is not set
 CONFIG_CONSOLE_SIMPLE=y
 CONFIG_PARTITION=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/phytec-phycore-omap4460_defconfig b/arch/arm/configs/phytec-phycore-omap4460_defconfig
index 54d7722..09a07b0 100644
--- a/arch/arm/configs/phytec-phycore-omap4460_defconfig
+++ b/arch/arm/configs/phytec-phycore-omap4460_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARCH_OMAP=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x80000
-CONFIG_ARCH_OMAP4=y
 CONFIG_MACH_PCM049=y
 CONFIG_AEABI=y
 CONFIG_ARM_UNWIND=y
@@ -9,62 +8,59 @@ CONFIG_TEXT_BASE=0x8f000000
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_KALLSYMS=y
 CONFIG_PROMPT="barebox> "
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 # CONFIG_TIMESTAMP is not set
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_AUTOMOUNT=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_SPLASH=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_AUTOMOUNT=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
-CONFIG_SMSC_PHY=y
 CONFIG_DRIVER_NET_SMC911X=y
+CONFIG_SMSC_PHY=y
 # CONFIG_SPI is not set
 CONFIG_I2C=y
 CONFIG_I2C_OMAP=y
 CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_OMAP_GPMC=y
-CONFIG_UBI=y
 CONFIG_USB_HOST=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_OMAP=y
-CONFIG_IMAGE_RENDERER=y
-CONFIG_BMP=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_OMAP_HSMMC=y
@@ -74,3 +70,4 @@ CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
 CONFIG_LZO_DECOMPRESS=y
+CONFIG_BMP=y
diff --git a/arch/arm/configs/phytec-phycore-pxa270_defconfig b/arch/arm/configs/phytec-phycore-pxa270_defconfig
index 7548c82..ed11169 100644
--- a/arch/arm/configs/phytec-phycore-pxa270_defconfig
+++ b/arch/arm/configs/phytec-phycore-pxa270_defconfig
@@ -11,6 +11,11 @@ CONFIG_KALLSYMS=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phytec-phycore-pxa270/env"
@@ -18,11 +23,6 @@ CONFIG_DEBUG_INFO=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
diff --git a/arch/arm/configs/pm9261_defconfig b/arch/arm/configs/pm9261_defconfig
index 4455d9c..61595ed 100644
--- a/arch/arm/configs/pm9261_defconfig
+++ b/arch/arm/configs/pm9261_defconfig
@@ -2,53 +2,49 @@ CONFIG_ARCH_AT91SAM9261=y
 CONFIG_MACH_PM9261=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PROMPT="PM9261:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_CMD_BOOTM_BZLIB=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_DM9K=y
 # CONFIG_SPI is not set
+CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
-CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_W1=y
 CONFIG_W1_MASTER_GPIO=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/pm9263_defconfig b/arch/arm/configs/pm9263_defconfig
index 482f008..254d2b9 100644
--- a/arch/arm/configs/pm9263_defconfig
+++ b/arch/arm/configs/pm9263_defconfig
@@ -1,36 +1,33 @@
 CONFIG_ARCH_AT91SAM9263=y
 CONFIG_MACH_PM9263=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/pm9263/env/"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_READLINE=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
 CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
 CONFIG_CMD_GPIO=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
 CONFIG_MTD=y
@@ -38,3 +35,4 @@ CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
 CONFIG_W1=y
 CONFIG_W1_MASTER_GPIO=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/pm9g45_defconfig b/arch/arm/configs/pm9g45_defconfig
index 7bb3b9e..c63a1c0 100644
--- a/arch/arm/configs/pm9g45_defconfig
+++ b/arch/arm/configs/pm9g45_defconfig
@@ -1,42 +1,42 @@
 CONFIG_ARCH_AT91SAM9G45=y
 CONFIG_MACH_PM9G45=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_MALLOC_TLSF=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_GLOB_SORT=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
-CONFIG_NET=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_DHCP=y
-CONFIG_NET_NFS=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_NET=y
+CONFIG_NET_NFS=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
@@ -47,11 +47,8 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_DISK_ATA=y
 CONFIG_USB_HOST=y
-CONFIG_USB_OHCI=y
-CONFIG_USB_OHCI_AT91=y
 CONFIG_USB_STORAGE=y
 CONFIG_MCI=y
 CONFIG_MCI_ATMEL=y
diff --git a/arch/arm/configs/qil_a9260_128mib_defconfig b/arch/arm/configs/qil_a9260_128mib_defconfig
index 7b6c352..3124a71 100644
--- a/arch/arm/configs/qil_a9260_128mib_defconfig
+++ b/arch/arm/configs/qil_a9260_128mib_defconfig
@@ -4,55 +4,53 @@ CONFIG_AT91_HAVE_SRAM_128M=y
 CONFIG_CALAO_MB_QIL_A9260=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_PROMPT="USB-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -64,7 +62,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
diff --git a/arch/arm/configs/qil_a9260_defconfig b/arch/arm/configs/qil_a9260_defconfig
index 6918abb..3f5eedb 100644
--- a/arch/arm/configs/qil_a9260_defconfig
+++ b/arch/arm/configs/qil_a9260_defconfig
@@ -3,55 +3,53 @@ CONFIG_MACH_QIL_A9260=y
 CONFIG_CALAO_MB_QIL_A9260=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_PROMPT="USB-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -63,7 +61,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
diff --git a/arch/arm/configs/qil_a9g20_128mib_defconfig b/arch/arm/configs/qil_a9g20_128mib_defconfig
index 7546a5b..0b2da05 100644
--- a/arch/arm/configs/qil_a9g20_128mib_defconfig
+++ b/arch/arm/configs/qil_a9g20_128mib_defconfig
@@ -4,55 +4,53 @@ CONFIG_AT91_HAVE_SRAM_128M=y
 CONFIG_CALAO_MB_QIL_A9260=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_PROMPT="USB-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -64,7 +62,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
diff --git a/arch/arm/configs/qil_a9g20_defconfig b/arch/arm/configs/qil_a9g20_defconfig
index bf9e8bb..5162eca 100644
--- a/arch/arm/configs/qil_a9g20_defconfig
+++ b/arch/arm/configs/qil_a9g20_defconfig
@@ -3,55 +3,53 @@ CONFIG_MACH_QIL_A9G20=y
 CONFIG_CALAO_MB_QIL_A9260=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_PROMPT="USB-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -63,7 +61,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
diff --git a/arch/arm/configs/rk3188_defconfig b/arch/arm/configs/rk3188_defconfig
index 1b6d4ff..78a47a3 100644
--- a/arch/arm/configs/rk3188_defconfig
+++ b/arch/arm/configs/rk3188_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ARCH_RK3188=y
 CONFIG_CACHE_L2X0=y
 CONFIG_MACH_RADXA_ROCK=y
 CONFIG_THUMB2_BAREBOX=y
@@ -16,6 +15,12 @@ CONFIG_PROMPT="radxa-rock:"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
+CONFIG_BOOTM_AIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_NONE=y
 CONFIG_DEFAULT_COMPRESSION_LZO=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
@@ -25,12 +30,6 @@ CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_BOOTM_AIMAGE=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
diff --git a/arch/arm/configs/rpi2_defconfig b/arch/arm/configs/rpi2_defconfig
index b03df5d..dbb31e6 100644
--- a/arch/arm/configs/rpi2_defconfig
+++ b/arch/arm/configs/rpi2_defconfig
@@ -10,16 +10,16 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_BLSPEC=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/raspberry-pi/env"
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADY=y
diff --git a/arch/arm/configs/rpi_defconfig b/arch/arm/configs/rpi_defconfig
index 8ff029f..386522d 100644
--- a/arch/arm/configs/rpi_defconfig
+++ b/arch/arm/configs/rpi_defconfig
@@ -10,16 +10,16 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_BLSPEC=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/raspberry-pi/env"
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADY=y
diff --git a/arch/arm/configs/sama5d3_xplained_defconfig b/arch/arm/configs/sama5d3_xplained_defconfig
index 773223e..c02ad3c 100644
--- a/arch/arm/configs/sama5d3_xplained_defconfig
+++ b/arch/arm/configs/sama5d3_xplained_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARCH_SAMA5D3=y
 CONFIG_MACH_SAMA5D3_XPLAINED=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x60000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
@@ -11,49 +10,49 @@ CONFIG_MALLOC_SIZE=0xA00000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="A5D3_XPLD:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_FILETYPE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_NET_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_NET_PING=y
 CONFIG_NET_NETCONSOLE=y
+CONFIG_NET_DHCP=y
 CONFIG_DRIVER_NET_MACB=y
 CONFIG_MICREL_PHY=y
 # CONFIG_SPI is not set
diff --git a/arch/arm/configs/sama5d3xek_defconfig b/arch/arm/configs/sama5d3xek_defconfig
index 48535e5..550691c 100644
--- a/arch/arm/configs/sama5d3xek_defconfig
+++ b/arch/arm/configs/sama5d3xek_defconfig
@@ -1,7 +1,6 @@
 CONFIG_ARCH_SAMA5D3=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x60000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
@@ -10,54 +9,53 @@ CONFIG_MALLOC_SIZE=0xA00000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="A5D3X-EK:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_FILETYPE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
 CONFIG_CMD_SPLASH=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_SPI=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
-CONFIG_MICREL_PHY=y
 CONFIG_DRIVER_NET_MACB=y
+CONFIG_MICREL_PHY=y
 CONFIG_DRIVER_SPI_ATMEL=y
 CONFIG_I2C=y
 CONFIG_I2C_GPIO=y
@@ -70,7 +68,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
 CONFIG_NAND_ATMEL_PMECC=y
-CONFIG_UBI=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_ATMEL_HLCD=y
 CONFIG_MCI=y
diff --git a/arch/arm/configs/sama5d4_xplained_defconfig b/arch/arm/configs/sama5d4_xplained_defconfig
index 6b1616e..648c813 100644
--- a/arch/arm/configs/sama5d4_xplained_defconfig
+++ b/arch/arm/configs/sama5d4_xplained_defconfig
@@ -14,6 +14,11 @@ CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/sama5d4_xplained/env"
@@ -21,11 +26,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
diff --git a/arch/arm/configs/sama5d4ek_defconfig b/arch/arm/configs/sama5d4ek_defconfig
index 25f488b..2aa38ba 100644
--- a/arch/arm/configs/sama5d4ek_defconfig
+++ b/arch/arm/configs/sama5d4ek_defconfig
@@ -13,6 +13,11 @@ CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/sama5d4ek/env"
@@ -20,11 +25,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
diff --git a/arch/arm/configs/scb9328_defconfig b/arch/arm/configs/scb9328_defconfig
index a707732..1a46464 100644
--- a/arch/arm/configs/scb9328_defconfig
+++ b/arch/arm/configs/scb9328_defconfig
@@ -1,53 +1,50 @@
 CONFIG_ARCH_IMX=y
-CONFIG_MACH_SCB9328=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 CONFIG_MMU=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_DM9K=y
@@ -58,5 +55,6 @@ CONFIG_CFI_BUFFER_WRITE=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_ZLIB=y
 CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/configs/socfpga-xload-2_defconfig b/arch/arm/configs/socfpga-xload-2_defconfig
index 97997cf..66cc777a 100644
--- a/arch/arm/configs/socfpga-xload-2_defconfig
+++ b/arch/arm/configs/socfpga-xload-2_defconfig
@@ -13,7 +13,6 @@ CONFIG_RELOCATABLE=y
 CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
diff --git a/arch/arm/configs/socfpga-xload_defconfig b/arch/arm/configs/socfpga-xload_defconfig
index 521f3f1..008ba64 100644
--- a/arch/arm/configs/socfpga-xload_defconfig
+++ b/arch/arm/configs/socfpga-xload_defconfig
@@ -13,7 +13,6 @@ CONFIG_RELOCATABLE=y
 CONFIG_SHELL_NONE=y
 # CONFIG_ERRNO_MESSAGES is not set
 # CONFIG_TIMESTAMP is not set
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index c6a969d..dbc33f9 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_MACH_SOCFPGA_EBV_SOCRATES=y
-CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC=y
+CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
@@ -15,16 +15,16 @@ CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 # CONFIG_TIMESTAMP is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_CONSOLE_ACTIVATE_NONE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
diff --git a/arch/arm/configs/tegra_v7_defconfig b/arch/arm/configs/tegra_v7_defconfig
index 6560334..66534a7 100644
--- a/arch/arm/configs/tegra_v7_defconfig
+++ b/arch/arm/configs/tegra_v7_defconfig
@@ -14,6 +14,8 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_BLSPEC=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_RESET_SOURCE=y
@@ -21,8 +23,6 @@ CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_EXPORT=y
diff --git a/arch/arm/configs/telit_evk_pro3_defconfig b/arch/arm/configs/telit_evk_pro3_defconfig
index 5fc114c..3bf5968 100644
--- a/arch/arm/configs/telit_evk_pro3_defconfig
+++ b/arch/arm/configs/telit_evk_pro3_defconfig
@@ -2,52 +2,49 @@ CONFIG_ARCH_AT91SAM9260=y
 CONFIG_MACH_GE863=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_PROMPT="EVK-PRO3:"
-CONFIG_LONGHELP=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/telit-evk-pro3/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_UBIFORMAT=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
@@ -58,7 +55,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
diff --git a/arch/arm/configs/tny_a9260_defconfig b/arch/arm/configs/tny_a9260_defconfig
index f288387..0886895 100644
--- a/arch/arm/configs/tny_a9260_defconfig
+++ b/arch/arm/configs/tny_a9260_defconfig
@@ -1,62 +1,57 @@
 CONFIG_ARCH_AT91SAM9260=y
 CONFIG_MACH_TNY_A9260=y
 CONFIG_CALAO_MOB_TNY_MD2=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="TNY-9260:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_MACB=y
 CONFIG_DRIVER_SPI_ATMEL=y
@@ -67,7 +62,7 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_EEPROM_AT25=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/tny_a9263_bootstrap_defconfig b/arch/arm/configs/tny_a9263_bootstrap_defconfig
index d968b6f..d7e541a 100644
--- a/arch/arm/configs/tny_a9263_bootstrap_defconfig
+++ b/arch/arm/configs/tny_a9263_bootstrap_defconfig
@@ -1,9 +1,7 @@
 CONFIG_ARCH_AT91SAM9263=y
 CONFIG_MACH_TNY_A9263=y
-CONFIG_AT91_BOOTSTRAP=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x12000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ENVIRONMENT_VARIABLES=y
 CONFIG_PBL_IMAGE=y
@@ -12,7 +10,6 @@ CONFIG_MALLOC_DUMMY=y
 CONFIG_PROMPT="USB-9263:"
 CONFIG_SHELL_NONE=y
 CONFIG_CONSOLE_SIMPLE=y
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 # CONFIG_SPI is not set
 CONFIG_MTD=y
 # CONFIG_MTD_WRITE is not set
@@ -23,4 +20,3 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
 # CONFIG_FS_RAMFS is not set
-CONFIG_BOOTSTRAP_DEVFS=y
diff --git a/arch/arm/configs/tny_a9263_defconfig b/arch/arm/configs/tny_a9263_defconfig
index cd955f7..e050b6d 100644
--- a/arch/arm/configs/tny_a9263_defconfig
+++ b/arch/arm/configs/tny_a9263_defconfig
@@ -1,62 +1,57 @@
 CONFIG_ARCH_AT91SAM9263=y
 CONFIG_MACH_TNY_A9263=y
 CONFIG_CALAO_MOB_TNY_MD2=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="TNY-9263:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_MACB=y
 CONFIG_DRIVER_SPI_ATMEL=y
@@ -68,7 +63,7 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_EEPROM_AT25=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/tny_a9g20_defconfig b/arch/arm/configs/tny_a9g20_defconfig
index dc3c13a..dc828a2 100644
--- a/arch/arm/configs/tny_a9g20_defconfig
+++ b/arch/arm/configs/tny_a9g20_defconfig
@@ -1,63 +1,58 @@
 CONFIG_ARCH_AT91SAM9G20=y
 CONFIG_MACH_TNY_A9G20=y
 CONFIG_CALAO_MOB_TNY_MD2=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="TNY-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_MACB=y
 CONFIG_DRIVER_SPI_ATMEL=y
@@ -68,7 +63,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_MCI=y
@@ -76,3 +70,4 @@ CONFIG_MCI_STARTUP=y
 CONFIG_MCI_SPI=y
 CONFIG_MMC_SPI_CRC_ON=y
 CONFIG_EEPROM_AT25=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/tqma53_defconfig b/arch/arm/configs/tqma53_defconfig
index b17fe72..f2025c8 100644
--- a/arch/arm/configs/tqma53_defconfig
+++ b/arch/arm/configs/tqma53_defconfig
@@ -12,51 +12,51 @@ CONFIG_MALLOC_SIZE=0x0
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
 CONFIG_RELOCATABLE=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_BLSPEC=y
-CONFIG_CONSOLE_ACTIVATE_NONE=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
+CONFIG_BLSPEC=y
+CONFIG_CONSOLE_ACTIVATE_NONE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEBUG_INFO=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
 CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DETECT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
diff --git a/arch/arm/configs/tx28stk5_defconfig b/arch/arm/configs/tx28stk5_defconfig
index 258840a..5045015 100644
--- a/arch/arm/configs/tx28stk5_defconfig
+++ b/arch/arm/configs/tx28stk5_defconfig
@@ -13,23 +13,23 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_BLSPEC=y
 CONFIG_IMD=y
+CONFIG_PBL_CONSOLE=y
 CONFIG_DEFAULT_COMPRESSION_LZO=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_RESET_SOURCE=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_LL=y
-CONFIG_PBL_CONSOLE=y
 CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_UIMAGE=y
diff --git a/arch/arm/configs/tx51stk5_defconfig b/arch/arm/configs/tx51stk5_defconfig
index dbc2cb3..47e848c 100644
--- a/arch/arm/configs/tx51stk5_defconfig
+++ b/arch/arm/configs/tx51stk5_defconfig
@@ -1,145 +1,57 @@
-CONFIG_GENERIC_LINKER_SCRIPT=y
-CONFIG_ARM=y
-CONFIG_ARM_LINUX=y
 CONFIG_ARCH_IMX=y
-CONFIG_CPU_32=y
-CONFIG_CPU_V7=y
-CONFIG_CPU_32v7=y
-CONFIG_ARCH_IMX51=y
 CONFIG_MACH_TX51=y
 CONFIG_IMX_IIM=y
 CONFIG_AEABI=y
-CONFIG_CMD_ARM_CPUINFO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_ARM_EXCEPTIONS=y
 CONFIG_ARM_UNWIND=y
-CONFIG_GREGORIAN_CALENDER=y
-CONFIG_HAS_KALLSYMS=y
-CONFIG_HAS_MODULES=y
-CONFIG_COMPILE_MEMORY=y
-CONFIG_ENV_HANDLING=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_BLOCK=y
-CONFIG_BLOCK_WRITE=y
-CONFIG_FILETYPE=y
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_BANNER=y
-CONFIG_ENVIRONMENT_VARIABLES=y
 CONFIG_MMU=y
-CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
-CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
-CONFIG_MEMORY_LAYOUT_DEFAULT=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
-CONFIG_SHELL_HUSH=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMD_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_DYNAMIC_CRC_TABLE=y
-CONFIG_ERRNO_MESSAGES=y
-CONFIG_TIMESTAMP=y
-CONFIG_CONSOLE_FULL=y
-CONFIG_CONSOLE_ACTIVATE_FIRST=y
-CONFIG_PARTITION=y
-CONFIG_PARTITION_DISK=y
-CONFIG_PARTITION_DISK_DOS=y
-CONFIG_DEFAULT_ENVIRONMENT=y
-CONFIG_DEFAULT_ENVIRONMENT_COMPRESSED=y
-CONFIG_DEFAULT_ENVIRONMENT_COMPRESSED_GZIP=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_COMMAND_SUPPORT=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_TRUE=y
-CONFIG_CMD_FALSE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_LS=y
-CONFIG_CMD_RM=y
-CONFIG_CMD_CAT=y
-CONFIG_CMD_MKDIR=y
-CONFIG_CMD_RMDIR=y
-CONFIG_CMD_CP=y
-CONFIG_CMD_PWD=y
-CONFIG_CMD_CD=y
-CONFIG_CMD_MOUNT=y
-CONFIG_CMD_UMOUNT=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_CLEAR=y
-CONFIG_CMD_ECHO=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_UBI=y
-CONFIG_CMD_BOOTM=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
-CONFIG_CMD_UIMAGE=y
-CONFIG_CMD_RESET=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_TEST=y
-CONFIG_CMD_VERSION=y
-CONFIG_CMD_HELP=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_DEVINFO=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_CMD_LED=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
-CONFIG_DRIVER_SERIAL_IMX=y
-CONFIG_ARCH_HAS_FEC_IMX=y
-CONFIG_PHYLIB=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_LED=y
+CONFIG_CMD_TIME=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_FEC_IMX=y
-CONFIG_DRIVER_SPI_IMX_2_3=y
 CONFIG_MTD=y
-CONFIG_MTD_WRITE=y
-CONFIG_MTD_OOB_DEVICE=y
 CONFIG_NAND=y
-CONFIG_NAND_ECC_SOFT=y
-CONFIG_NAND_ECC_HW=y
-CONFIG_NAND_ECC_HW_SYNDROME=y
-CONFIG_NAND_ECC_HW_NONE=y
-CONFIG_NAND_INFO=y
-CONFIG_NAND_READ_OOB=y
-CONFIG_NAND_BBT=y
 CONFIG_NAND_IMX=y
-CONFIG_MTD_NAND_IDS=y
-CONFIG_UBI=y
-CONFIG_DISK=y
-CONFIG_DISK_WRITE=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
-CONFIG_MCI_INFO=y
-CONFIG_MCI_WRITE=y
 CONFIG_MCI_IMX_ESDHC=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
-CONFIG_FS_RAMFS=y
-CONFIG_FS_DEVFS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
-CONFIG_PARAMETER=y
-CONFIG_UNCOMPRESS=y
 CONFIG_ZLIB=y
-CONFIG_PROCESS_ESCAPE_SEQUENCE=y
 CONFIG_LZO_DECOMPRESS=y
-CONFIG_CRC32=y
diff --git a/arch/arm/configs/tx53stk5_defconfig b/arch/arm/configs/tx53stk5_defconfig
index 0d991cf..8a9390e 100644
--- a/arch/arm/configs/tx53stk5_defconfig
+++ b/arch/arm/configs/tx53stk5_defconfig
@@ -1,9 +1,7 @@
 CONFIG_ARCH_IMX=y
-CONFIG_ARCH_IMX53=y
 CONFIG_MACH_TX53=y
 CONFIG_TX53_REV_XX30=y
 CONFIG_IMX_IIM=y
-CONFIG_AEABI=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
@@ -14,55 +12,51 @@ CONFIG_TEXT_BASE=0x87f00000
 CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_RESET_SOURCE=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_DIRNAME=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-CONFIG_CMD_RESET=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_RESET_SOURCE=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_CMD_LED=y
-CONFIG_NET=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_LED=y
+CONFIG_CMD_TIME=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_IMX=y
-CONFIG_UBI=y
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_IMX_ESDHC=y
diff --git a/arch/arm/configs/usb_a9260_defconfig b/arch/arm/configs/usb_a9260_defconfig
index 2a8d1a6..d87ebaa 100644
--- a/arch/arm/configs/usb_a9260_defconfig
+++ b/arch/arm/configs/usb_a9260_defconfig
@@ -1,65 +1,60 @@
 CONFIG_ARCH_AT91SAM9260=y
 CONFIG_MACH_USB_A9260=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="USB-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -71,10 +66,10 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/usb_a9263_128mib_bootstrap_defconfig b/arch/arm/configs/usb_a9263_128mib_bootstrap_defconfig
index 0411bd8..30794ee 100644
--- a/arch/arm/configs/usb_a9263_128mib_bootstrap_defconfig
+++ b/arch/arm/configs/usb_a9263_128mib_bootstrap_defconfig
@@ -4,7 +4,6 @@ CONFIG_AT91_HAVE_SRAM_128M=y
 CONFIG_AT91_BOOTSTRAP=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x12000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ENVIRONMENT_VARIABLES=y
 CONFIG_PBL_IMAGE=y
@@ -12,8 +11,6 @@ CONFIG_MMU=y
 CONFIG_MALLOC_DUMMY=y
 CONFIG_PROMPT="USB-9263:"
 CONFIG_SHELL_NONE=y
-# CONFIG_CONSOLE_FULL is not set
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 # CONFIG_SPI is not set
 CONFIG_MTD=y
 # CONFIG_MTD_WRITE is not set
diff --git a/arch/arm/configs/usb_a9263_128mib_defconfig b/arch/arm/configs/usb_a9263_128mib_defconfig
index c091a97..0795cac 100644
--- a/arch/arm/configs/usb_a9263_128mib_defconfig
+++ b/arch/arm/configs/usb_a9263_128mib_defconfig
@@ -1,66 +1,61 @@
 CONFIG_ARCH_AT91SAM9263=y
 CONFIG_MACH_USB_A9263=y
 CONFIG_AT91_HAVE_SRAM_128M=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="USB-9263:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -73,10 +68,10 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/usb_a9263_bootstrap_defconfig b/arch/arm/configs/usb_a9263_bootstrap_defconfig
index 78c1c8f..c922cc0 100644
--- a/arch/arm/configs/usb_a9263_bootstrap_defconfig
+++ b/arch/arm/configs/usb_a9263_bootstrap_defconfig
@@ -3,7 +3,6 @@ CONFIG_MACH_USB_A9263=y
 CONFIG_AT91_BOOTSTRAP=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x12000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ENVIRONMENT_VARIABLES=y
 CONFIG_PBL_IMAGE=y
@@ -11,8 +10,6 @@ CONFIG_MMU=y
 CONFIG_MALLOC_DUMMY=y
 CONFIG_PROMPT="USB-9263:"
 CONFIG_SHELL_NONE=y
-# CONFIG_CONSOLE_FULL is not set
-# CONFIG_DEFAULT_ENVIRONMENT is not set
 # CONFIG_SPI is not set
 CONFIG_MTD=y
 # CONFIG_MTD_WRITE is not set
diff --git a/arch/arm/configs/usb_a9263_defconfig b/arch/arm/configs/usb_a9263_defconfig
index 51234cd..89726a4 100644
--- a/arch/arm/configs/usb_a9263_defconfig
+++ b/arch/arm/configs/usb_a9263_defconfig
@@ -1,65 +1,60 @@
 CONFIG_ARCH_AT91SAM9263=y
 CONFIG_MACH_USB_A9263=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="USB-9263:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -72,10 +67,10 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
diff --git a/arch/arm/configs/usb_a9g20_128mib_defconfig b/arch/arm/configs/usb_a9g20_128mib_defconfig
index 7890776..fce3a10 100644
--- a/arch/arm/configs/usb_a9g20_128mib_defconfig
+++ b/arch/arm/configs/usb_a9g20_128mib_defconfig
@@ -1,67 +1,61 @@
 CONFIG_ARCH_AT91SAM9G20=y
 CONFIG_MACH_USB_A9G20=y
 CONFIG_AT91_HAVE_SRAM_128M=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="USB-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_SPI=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -73,7 +67,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
@@ -84,6 +77,7 @@ CONFIG_MMC_SPI_CRC_ON=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/usb_a9g20_defconfig b/arch/arm/configs/usb_a9g20_defconfig
index 0953aaf..61412d8 100644
--- a/arch/arm/configs/usb_a9g20_defconfig
+++ b/arch/arm/configs/usb_a9g20_defconfig
@@ -1,66 +1,60 @@
 CONFIG_ARCH_AT91SAM9G20=y
 CONFIG_MACH_USB_A9G20=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_AEABI=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PBL_IMAGE=y
 CONFIG_MMU=y
-CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="USB-9G20:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_PROMPT_HUSH_PS2="y"
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-# CONFIG_CONSOLE_ACTIVATE_FIRST is not set
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
-CONFIG_CMD_PASSWD=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_FLASH=y
 CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_BOOTM_VERBOSE=y
 CONFIG_BOOTM_INITRD=y
 CONFIG_BOOTM_OFTREE=y
 CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
+CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_SPI=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_NET_MACB=y
@@ -72,7 +66,6 @@ CONFIG_NAND=y
 # CONFIG_NAND_ECC_HW_SYNDROME is not set
 # CONFIG_NAND_ECC_HW_NONE is not set
 CONFIG_NAND_ATMEL=y
-CONFIG_UBI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DFU=y
 CONFIG_USB_GADGET_SERIAL=y
@@ -83,6 +76,7 @@ CONFIG_MMC_SPI_CRC_ON=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_TRIGGERS=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/configs/versatilepb_arm1176_defconfig b/arch/arm/configs/versatilepb_arm1176_defconfig
index 50e0983..f51689f 100644
--- a/arch/arm/configs/versatilepb_arm1176_defconfig
+++ b/arch/arm/configs/versatilepb_arm1176_defconfig
@@ -12,6 +12,11 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_COMPRESSION_GZIP=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
@@ -20,11 +25,6 @@ CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_RESET=y
@@ -66,8 +66,6 @@ CONFIG_NET_RESOLV=y
 CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_USB=y
-CONFIG_SERIAL_USB_FTDI=y
 CONFIG_DRIVER_NET_SMC91111=y
 CONFIG_I2C=y
 CONFIG_I2C_VERSATILE=y
@@ -81,12 +79,7 @@ CONFIG_USB_HOST=y
 CONFIG_USB_EHCI=y
 CONFIG_USB_STORAGE=y
 CONFIG_VIDEO=y
-CONFIG_DRIVER_VIDEO_ARMCLCD=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_SELF_REGISTER=y
-CONFIG_FONTS=y
-# CONFIG_FONT_8x8 is not set
-CONFIG_FONT_ACORN_8x8=y
 CONFIG_GPIO_PL061=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_DS1307=y
diff --git a/arch/arm/configs/versatilepb_defconfig b/arch/arm/configs/versatilepb_defconfig
index f8cbf94..56425db 100644
--- a/arch/arm/configs/versatilepb_defconfig
+++ b/arch/arm/configs/versatilepb_defconfig
@@ -10,6 +10,11 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_COMPRESSION_GZIP=y
@@ -19,11 +24,6 @@ CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_RESET=y
@@ -47,7 +47,6 @@ CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_SPLASH=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
diff --git a/arch/arm/configs/vexpress_ca9_defconfig b/arch/arm/configs/vexpress_ca9_defconfig
index fb40567..a1c4251 100644
--- a/arch/arm/configs/vexpress_ca9_defconfig
+++ b/arch/arm/configs/vexpress_ca9_defconfig
@@ -1,61 +1,52 @@
 CONFIG_ARCH_VEXPRESS=y
-CONFIG_MACH_VEXPRESS
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_TEXT_BASE=0x63f00000
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="vexpress: "
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_CMD_BOO
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_CLK=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_DRIVER_NET_SMC91111=y
 # CONFIG_SPI is not set
-CONFIG_DRIVER_CFI=y
-# CONFIG_DRIVER_CFI_AMD is not set
-# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
-# CONFIG_DRIVER_CFI_BANK_WIDTH_2 is not set
 CONFIG_FS_TFTP=y
 CONFIG_DIGEST_SHA1_GENERIC=y
 CONFIG_DIGEST_SHA256_GENERIC=y
diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig
index 9e74bb4..94fe1ea 100644
--- a/arch/arm/configs/vexpress_defconfig
+++ b/arch/arm/configs/vexpress_defconfig
@@ -1,60 +1,51 @@
 CONFIG_ARCH_VEXPRESS=y
-CONFIG_MACH_VEXPRESS
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="vexpress: "
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_CMD_BOO
-CONFIG_BOOTM_OFTREE_UIMAGE=y
-CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_UNCOMPRESS=y
 CONFIG_CMD_CLK=y
+CONFIG_CMD_OFTREE=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_DRIVER_NET_SMC91111=y
 # CONFIG_SPI is not set
-CONFIG_DRIVER_CFI=y
-# CONFIG_DRIVER_CFI_AMD is not set
-# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
-# CONFIG_DRIVER_CFI_BANK_WIDTH_2 is not set
 CONFIG_FS_TFTP=y
 CONFIG_DIGEST_SHA1_GENERIC=y
 CONFIG_DIGEST_SHA256_GENERIC=y
diff --git a/arch/arm/configs/vincell_defconfig b/arch/arm/configs/vincell_defconfig
index 81bfbed..1480a94 100644
--- a/arch/arm/configs/vincell_defconfig
+++ b/arch/arm/configs/vincell_defconfig
@@ -15,22 +15,21 @@ CONFIG_RELOCATABLE=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_NONE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_POLLER=y
 CONFIG_STATE=y
 CONFIG_RESET_SOURCE=y
-CONFIG_DEBUG_IMX_UART_PORT=2
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
@@ -57,7 +56,6 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
 CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_EDIT=y
-CONFIG_CMD_SPLASH=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
diff --git a/arch/arm/configs/virt2real_defconfig b/arch/arm/configs/virt2real_defconfig
index 0c686ca..b1b00c3 100644
--- a/arch/arm/configs/virt2real_defconfig
+++ b/arch/arm/configs/virt2real_defconfig
@@ -1,5 +1,4 @@
 CONFIG_BUILTIN_DTB=y
-CONFIG_BUILTIN_DTB_NAME="virt2real"
 CONFIG_ARCH_DAVINCI=y
 CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
@@ -7,7 +6,6 @@ CONFIG_TEXT_BASE=0x82300000
 CONFIG_MALLOC_SIZE=0x200000
 CONFIG_MALLOC_TLSF=y
 CONFIG_PROMPT="virt2real: "
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
@@ -15,29 +13,30 @@ CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 CONFIG_PASSWORD=y
 CONFIG_PARTITION=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_LOADY=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
-CONFIG_CMD_MM=y
+CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTM is not set
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
 CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_DRIVER_SERIAL_NS16550=y
diff --git a/arch/arm/configs/zedboard_defconfig b/arch/arm/configs/zedboard_defconfig
index 3960c02..bcd604f 100644
--- a/arch/arm/configs/zedboard_defconfig
+++ b/arch/arm/configs/zedboard_defconfig
@@ -11,6 +11,10 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/avnet-zedboard/env"
 CONFIG_DEBUG_INFO=y
@@ -18,10 +22,6 @@ CONFIG_DEBUG_LL=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_ARM_MMUINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
@@ -44,4 +44,3 @@ CONFIG_DRIVER_SERIAL_CADENCE=y
 # CONFIG_SPI is not set
 CONFIG_FS_TFTP=y
 CONFIG_DIGEST=y
-CONFIG_MD5=y
diff --git a/arch/arm/configs/zylonite310_defconfig b/arch/arm/configs/zylonite310_defconfig
index 9de4fff..f1cd92a 100644
--- a/arch/arm/configs/zylonite310_defconfig
+++ b/arch/arm/configs/zylonite310_defconfig
@@ -17,6 +17,10 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/zylonite/env"
@@ -27,10 +31,6 @@ CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADS=y
@@ -61,7 +61,6 @@ CONFIG_CMD_LOGIN=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
 CONFIG_CMD_PASSWD=y
-CONFIG_CMD_SPLASH=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_CRC=y
@@ -104,6 +103,4 @@ CONFIG_FS_UBIFS=y
 CONFIG_FS_UBIFS_COMPRESSION_LZO=y
 CONFIG_FS_UBIFS_COMPRESSION_ZLIB=y
 CONFIG_BZLIB=y
-CONFIG_BMP=y
-CONFIG_PNG=y
 CONFIG_DIGEST_SHA256_GENERIC=y
diff --git a/arch/blackfin/configs/ipe337_defconfig b/arch/blackfin/configs/ipe337_defconfig
index a9f2369..032bdad 100644
--- a/arch/blackfin/configs/ipe337_defconfig
+++ b/arch/blackfin/configs/ipe337_defconfig
@@ -1,30 +1,29 @@
 CONFIG_TEXT_BASE=0x03f00000
-CONFIG_LONGHELP=y
 CONFIG_CMDLINE_EDITING=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/blackfin/boards/ipe337/env"
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_NET=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_FLASH=y
+CONFIG_NET=y
 CONFIG_DRIVER_NET_SMC911X=y
 CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
 CONFIG_CFI_BUFFER_WRITE=y
+CONFIG_FS_TFTP=y
diff --git a/arch/efi/configs/efi_defconfig b/arch/efi/configs/efi_defconfig
index 8fe7e76..f24148d 100644
--- a/arch/efi/configs/efi_defconfig
+++ b/arch/efi/configs/efi_defconfig
@@ -7,6 +7,10 @@ CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 # CONFIG_TIMESTAMP is not set
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
 CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_ALL=y
 CONFIG_PARTITION_DISK_EFI=y
@@ -17,10 +21,6 @@ CONFIG_DEBUG_LL=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_RESET=y
diff --git a/arch/mips/configs/dlink-dir-320_defconfig b/arch/mips/configs/dlink-dir-320_defconfig
index ba535a8..ff0638a 100644
--- a/arch/mips/configs/dlink-dir-320_defconfig
+++ b/arch/mips/configs/dlink-dir-320_defconfig
@@ -7,13 +7,13 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 # CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_POLLER=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADY=y
diff --git a/arch/mips/configs/gxemul-malta_defconfig b/arch/mips/configs/gxemul-malta_defconfig
index f009f0e..75fc401 100644
--- a/arch/mips/configs/gxemul-malta_defconfig
+++ b/arch/mips/configs/gxemul-malta_defconfig
@@ -10,6 +10,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 # CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_POLLER=y
@@ -17,7 +18,6 @@ CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_IMD=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADY=y
diff --git a/arch/mips/configs/img-ci20_defconfig b/arch/mips/configs/img-ci20_defconfig
index f0347f6..ada82c6 100644
--- a/arch/mips/configs/img-ci20_defconfig
+++ b/arch/mips/configs/img-ci20_defconfig
@@ -7,17 +7,17 @@ CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_POLLER=y
 CONFIG_DEBUG_LL=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADS=y
diff --git a/arch/mips/configs/loongson-ls1b_defconfig b/arch/mips/configs/loongson-ls1b_defconfig
index 8e04170..25444e3 100644
--- a/arch/mips/configs/loongson-ls1b_defconfig
+++ b/arch/mips/configs/loongson-ls1b_defconfig
@@ -3,45 +3,44 @@ CONFIG_BUILTIN_DTB_NAME="loongson-ls1b"
 CONFIG_MACH_MIPS_LOONGSON=y
 CONFIG_PBL_IMAGE=y
 CONFIG_STACK_SIZE=0x7000
-CONFIG_BROKEN=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_MALLOC_TLSF=y
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMD_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_FLEXIBLE_BOOTARGS=y
 CONFIG_PARTITION=y
 # CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_POLLER=y
 CONFIG_RESET_SOURCE=y
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADS=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_SAVES=y
+# CONFIG_CMD_MOUNT is not set
+# CONFIG_CMD_UMOUNT is not set
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_GLOBAL=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_GETOPT=y
 CONFIG_CMD_LET=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_GLOBAL=y
-# CONFIG_CMD_MOUNT is not set
-# CONFIG_CMD_UMOUNT is not set
+CONFIG_CMD_SLEEP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_LOADY=y
-CONFIG_CMD_LOADS=y
-CONFIG_CMD_SAVES=y
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_IOMEM=y
-# CONFIG_CMD_BOOTM is not set
-CONFIG_FLEXIBLE_BOOTARGS=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
 CONFIG_OFDEVICE=y
 # CONFIG_SPI is not set
 CONFIG_ZLIB=y
diff --git a/arch/mips/configs/qemu-malta_defconfig b/arch/mips/configs/qemu-malta_defconfig
index 5389df4..004adac 100644
--- a/arch/mips/configs/qemu-malta_defconfig
+++ b/arch/mips/configs/qemu-malta_defconfig
@@ -8,6 +8,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 # CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_POLLER=y
@@ -16,7 +17,6 @@ CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_IMD=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADY=y
diff --git a/arch/mips/configs/ritmix-rzx50_defconfig b/arch/mips/configs/ritmix-rzx50_defconfig
index b143dff..3fb978a 100644
--- a/arch/mips/configs/ritmix-rzx50_defconfig
+++ b/arch/mips/configs/ritmix-rzx50_defconfig
@@ -8,17 +8,17 @@ CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
+CONFIG_BOOTM_INITRD=y
+CONFIG_BOOTM_OFTREE=y
+CONFIG_BOOTM_OFTREE_UIMAGE=y
 # CONFIG_DEFAULT_ENVIRONMENT is not set
 CONFIG_DEBUG_LL=y
 CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_IMD=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_BOOTM_INITRD=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_LOADS=y
diff --git a/arch/nios2/configs/generic_defconfig b/arch/nios2/configs/generic_defconfig
index 91d364f..44c040a 100644
--- a/arch/nios2/configs/generic_defconfig
+++ b/arch/nios2/configs/generic_defconfig
@@ -1,30 +1,30 @@
 CONFIG_EARLY_PRINTF=y
 CONFIG_BAUDRATE=9600
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
+CONFIG_BOOTM_VERBOSE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
 CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TFTP=y
 CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_FLASH=y
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_VERBOSE=y
-CONFIG_CMD_UIMAGE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
+CONFIG_CMD_FLASH=y
 CONFIG_NET=y
-CONFIG_CMD_PING=y
 CONFIG_DRIVER_NET_TSE=y
 CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
diff --git a/arch/ppc/configs/da923rc_defconfig b/arch/ppc/configs/da923rc_defconfig
index f873eb5..6c0a81e 100644
--- a/arch/ppc/configs/da923rc_defconfig
+++ b/arch/ppc/configs/da923rc_defconfig
@@ -1,64 +1,51 @@
 CONFIG_ARCH_MPC85XX=y
 CONFIG_DA923RC=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x80000
-CONFIG_BANNER=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_GETOPT=y
-CONFIG_LONGHELP=y
+CONFIG_MALLOC_SIZE=0x4000000
+CONFIG_RELOCATABLE=y
+CONFIG_PROMPT="GE> "
+CONFIG_BAUDRATE=9600
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+# CONFIG_CMD_VERSION is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_CMD_BOOTM_BZLIB=y
-CONFIG_ZLIB=y
-CONFIG_BZLIB=y
-CONFIG_CMD_EDIT=y
 CONFIG_CMD_EXPORT=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_GO=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=n
 CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_READLINK=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_NET=y
+CONFIG_CMD_GETOPT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MIITOOL=y
 CONFIG_CMD_PING=y
-CONFIG_NET_TFTP=y
-CONFIG_NET_TFTP_PUSH=y
-CONFIG_FS_TFTP=y
 CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_OFTREE=y
+CONFIG_NET=y
+CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_NET_GIANFAR=y
-CONFIG_CMD_MIITOOL=y
+# CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_IMX=y
+CONFIG_MTD=y
 CONFIG_DRIVER_CFI=y
-CONFIG_DRIVER_CFI_BANK_WIDTH_1=n
-CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
-CONFIG_DRIVER_CFI_BANK_WIDTH_4=n
+# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
 CONFIG_CFI_BUFFER_WRITE=y
-CONFIG_MTD=y
-CONFIG_MTD_WRITE=y
 CONFIG_MTD_UBI=y
-CONFIG_CMD_UBI=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_UBIFS=y
 CONFIG_FS_UBIFS_COMPRESSION_LZO=y
-CONFIG_CMD_UNLZO=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MALLOC_SIZE=0x4000000
-CONFIG_PROMPT="GE> "
-CONFIG_BAUDRATE=9600
-CONFIG_RELOCATABLE=y
-CONFIG_DRIVER_SERIAL_NS16550=y
-CONFIG_SPI=n
-CONFIG_I2C=y
-CONFIG_I2C_IMX=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_VERSION=n
-CONFIG_OFTREE=y
-CONFIG_CMD_OFTREE_PROBE=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_IOMEM=y
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
diff --git a/arch/ppc/configs/p1010rdb_defconfig b/arch/ppc/configs/p1010rdb_defconfig
index b1f1002..73c02c2 100644
--- a/arch/ppc/configs/p1010rdb_defconfig
+++ b/arch/ppc/configs/p1010rdb_defconfig
@@ -1,54 +1,39 @@
 CONFIG_ARCH_MPC85XX=y
-CONFIG_P1010RDB=y
-CONFIG_P101010=y
-CONFIG_LONGHELP=y
+CONFIG_MALLOC_SIZE=0x4000000
+CONFIG_RELOCATABLE=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_CMD_BOOTM_BZLIB=y
 CONFIG_BOOTM_VERBOSE=y
-CONFIG_ZLIB=y
-CONFIG_BZLIB=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
 CONFIG_CMD_GO=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=n
+CONFIG_CMD_RESET=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_EXPORT=y
 CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_SAVEENV=y
-CONFIG_DRIVER_CFI=y
-CONFIG_DRIVER_CFI_AMD=y
-CONFIG_DRIVER_CFI_INTEL=y
-CONFIG_DRIVER_CFI_BANK_WIDTH_1=n
-CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
-CONFIG_DRIVER_CFI_BANK_WIDTH_4=n
-CONFIG_CFI_BUFFER_WRITE=y
-CONFIG_MTD=y
-CONFIG_MTD_WRITE=y
-CONFIG_MALLOC_SIZE=0x4000000
-CONFIG_BAUDRATE=115200
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_OFTREE=y
+CONFIG_NET=y
 CONFIG_DRIVER_SERIAL_NS16550=y
-CONFIG_RELOCATABLE=y
 CONFIG_DRIVER_NET_GIANFAR=y
-CONFIG_NET=y
-CONFIG_NET_PING=y
-CONFIG_FS_TFTP=y
-CONFIG_NET_TFTP=y
-CONFIG_CMD_TFTP=y
-CONFIG_PING=y
 CONFIG_I2C=y
 CONFIG_I2C_IMX=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_EXPORT=y
-CONFIG_OFTREE=y
-CONFIG_CMD_OFTREE_PROBE=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_MEMTEST=y
+CONFIG_MTD=y
+CONFIG_DRIVER_CFI=y
+# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
+CONFIG_CFI_BUFFER_WRITE=y
+CONFIG_FS_TFTP=y
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
diff --git a/arch/ppc/configs/p1022ds_defconfig b/arch/ppc/configs/p1022ds_defconfig
index f517708..fce3eab 100644
--- a/arch/ppc/configs/p1022ds_defconfig
+++ b/arch/ppc/configs/p1022ds_defconfig
@@ -1,52 +1,39 @@
 CONFIG_ARCH_MPC85XX=y
 CONFIG_P1022DS=y
-CONFIG_P1022=y
-CONFIG_LONGHELP=y
+CONFIG_MALLOC_SIZE=0x4000000
+CONFIG_RELOCATABLE=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_CMD_BOOTM_BZLIB=y
 CONFIG_BOOTM_VERBOSE=y
-CONFIG_ZLIB=y
-CONFIG_BZLIB=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
 CONFIG_CMD_GO=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=n
+CONFIG_CMD_RESET=y
+CONFIG_CMD_EXPORT=y
 CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_SAVEENV=y
-CONFIG_FSL_ELBC=y
-CONFIG_DRIVER_CFI=y
-CONFIG_DRIVER_CFI_AMD=y
-CONFIG_DRIVER_CFI_INTEL=n
-CONFIG_DRIVER_CFI_BANK_WIDTH_1=n
-CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
-CONFIG_DRIVER_CFI_BANK_WIDTH_4=n
-CONFIG_MTD=y
-CONFIG_MTD_WRITE=y
-CONFIG_MALLOC_SIZE=0x4000000
-CONFIG_BAUDRATE=115200
-CONFIG_DRIVER_SERIAL_NS16550=y
-CONFIG_RELOCATABLE=y
-CONFIG_DRIVER_NET_GIANFAR=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MIITOOL=y
 CONFIG_CMD_PING=y
-CONFIG_FS_TFTP=y
-CONFIG_NET_TFTP=y
 CONFIG_CMD_TFTP=y
-CONFIG_PING=y
-CONFIG_I2C=y
-CONFIG_I2C_IMX=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_FLASH=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_EXPORT=y
-CONFIG_OFTREE=y
-CONFIG_CMD_OFTREE_PROBE=y
-CONFIG_CMD_OFTREE=y
 CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_OFTREE=y
+CONFIG_NET=y
+CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_DRIVER_NET_GIANFAR=y
+CONFIG_I2C=y
+CONFIG_I2C_IMX=y
+CONFIG_MTD=y
+CONFIG_DRIVER_CFI=y
+# CONFIG_DRIVER_CFI_INTEL is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
+CONFIG_FS_TFTP=y
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig
index d0b11b4..6cc0328 100644
--- a/arch/ppc/configs/p2020rdb_defconfig
+++ b/arch/ppc/configs/p2020rdb_defconfig
@@ -1,54 +1,42 @@
 CONFIG_ARCH_MPC85XX=y
 CONFIG_P2020RDB=y
-CONFIG_P2020=y
-CONFIG_LONGHELP=y
+CONFIG_MALLOC_SIZE=0x2800000
+CONFIG_RELOCATABLE=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_CMD_SLEEP=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+# CONFIG_CMD_VERSION is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_BOOTM_ZLIB=y
-CONFIG_CMD_BOOTM_BZLIB=y
-CONFIG_ZLIB=y
-CONFIG_BZLIB=y
-CONFIG_CMD_EDIT=y
 CONFIG_CMD_EXPORT=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=n
 CONFIG_CMD_LOADENV=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_READLINK=y
-CONFIG_FSL_ELBC=y
-CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_UNCOMPRESS=y
-CONFIG_DRIVER_CFI=y
-CONFIG_DRIVER_CFI_AMD=y
-CONFIG_DRIVER_CFI_INTEL=n
-CONFIG_DRIVER_CFI_BANK_WIDTH_1=n
-CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
-CONFIG_DRIVER_CFI_BANK_WIDTH_4=n
-CONFIG_MTD=y
-CONFIG_MALLOC_SIZE=0x2800000
-CONFIG_BAUDRATE=115200
-CONFIG_DRIVER_SERIAL_NS16550=y
-CONFIG_RELOCATABLE=y
-CONFIG_DRIVER_NET_GIANFAR=y
-CONFIG_NET=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MIITOOL=y
 CONFIG_CMD_PING=y
-CONFIG_FS_TFTP=y
-CONFIG_NET_TFTP=y
 CONFIG_CMD_TFTP=y
-CONFIG_PING=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_OFTREE=y
+CONFIG_NET=y
+CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_DRIVER_NET_GIANFAR=y
 CONFIG_I2C=y
 CONFIG_I2C_IMX=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_IOMEM=y
-CONFIG_CMD_VERSION=n
-CONFIG_OFTREE=y
-CONFIG_CMD_OFTREE_PROBE=y
-CONFIG_CMD_OFTREE=y
\ No newline at end of file
+CONFIG_MTD=y
+CONFIG_DRIVER_CFI=y
+# CONFIG_DRIVER_CFI_INTEL is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
+CONFIG_FS_TFTP=y
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
diff --git a/arch/ppc/configs/pcm030_defconfig b/arch/ppc/configs/pcm030_defconfig
index 96f35a1..bd83ff4 100644
--- a/arch/ppc/configs/pcm030_defconfig
+++ b/arch/ppc/configs/pcm030_defconfig
@@ -3,6 +3,7 @@ CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
+CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/ppc/boards/pcm030/env"
@@ -10,7 +11,6 @@ CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_REGINFO=y
-CONFIG_BOOTM_SHOW_TYPE=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_UIMAGE=y
diff --git a/arch/sandbox/configs/sandbox_defconfig b/arch/sandbox/configs/sandbox_defconfig
index d82579b..c20dd15 100644
--- a/arch/sandbox/configs/sandbox_defconfig
+++ b/arch/sandbox/configs/sandbox_defconfig
@@ -94,10 +94,4 @@ CONFIG_BAREBOX_LOGO_240=y
 CONFIG_BAREBOX_LOGO_320=y
 CONFIG_BAREBOX_LOGO_400=y
 CONFIG_BAREBOX_LOGO_640=y
-CONFIG_DIGEST_MD5_GENERIC=y
-CONFIG_DIGEST_SHA1_GENERIC=y
-CONFIG_DIGEST_SHA224_GENERIC=y
-CONFIG_DIGEST_SHA256_GENERIC=y
-CONFIG_DIGEST_SHA384_GENERIC=y
-CONFIG_DIGEST_SHA512_GENERIC=y
 CONFIG_DIGEST_HMAC_GENERIC=y
diff --git a/arch/x86/configs/generic_defconfig b/arch/x86/configs/generic_defconfig
index 57161f4..5ff7f53 100644
--- a/arch/x86/configs/generic_defconfig
+++ b/arch/x86/configs/generic_defconfig
@@ -1,31 +1,26 @@
 CONFIG_X86_HDBOOT=y
 CONFIG_STACK_SIZE=0x7000
-CONFIG_BROKEN=y
 CONFIG_EXPERIMENTAL=y
-CONFIG_PROMPT="barebox:"
-CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_PARTITION=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/x86/boards/x86_generic/env"
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-# CONFIG_CMD_TRUE is not set
-# CONFIG_CMD_FALSE is not set
+CONFIG_LONGHELP=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_BOOTM is not set
-CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_FALSE is not set
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TRUE is not set
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 # CONFIG_SPI is not set
-CONFIG_ATA=y
-CONFIG_ATA_DISK=y
-CONFIG_ATA_BIOS=y
-- 
2.9.3



From antonynpavlov at gmail.com  Thu Oct 13 02:11:27 2016
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Thu, 13 Oct 2016 12:11:27 +0300
Subject: [RFC] add riscv support
Message-ID: <20161013091127.3130-1-antonynpavlov@gmail.com>

This patch adds initial RISC-V architecture support for barebox.

At the moment only spike emulator is supported (see https://github.com/riscv/riscv-isa-sim
for details). Moreover barebox does not works with spike's emulated
serial port directly. Barebox runs on top of riscv proxy kernel
(pk, see https://github.com/riscv/riscv-pk). In many ways
RISC-V barebox modus operandi is very similar to sandbox barebox.

Current spike and qemu-riscv (https://github.com/riscv/riscv-isa-sim)
emulators support only HTIF (Host-Target InterFace) for serial console,
though adding 8250 UART port support for spike pull request
is exists (see https://github.com/riscv/riscv-isa-sim/pull/53).

Running RISC-V barebox mini-HOWTO
=================================

Obtain RISC-V GCC/Newlib Toolchain and pk (proxy kernel);
see https://github.com/riscv/riscv-tools/blob/master/README.md
for details, the build.sh script from riscv-tools should
create toolchain, pk ELF image and the spike emulator.

Next compile barebox:

    $ git clone -b 20161013.riscv https://github.com/frantony/barebox
    $ cd barebox
    $ make pk_defconfig ARCH=riscv
    ...
    $ make ARCH=riscv CROSS_COMPILE=riscv64-unknown-elf-

Run barebox:

    $ spike pk barebox

    Board: riscv proxy kernel
    Warning: Using dummy clocksource
    malloc space: 0x00067640 -> 0x0046763f (size 4 MiB)
    running /env/bin/init...
    /env/bin/init not found
    barebox:/

TIP: riscv-tools buils.sh script installs pk ELF image into
${TOOLCHAIN_INSTALL_PATH}/riscv64-unknown-elf/bin directory.

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/riscv/Kconfig                      |  17 +++++
 arch/riscv/Makefile                     |  84 +++++++++++++++++++++++
 arch/riscv/boards/pk/.gitignore         |   1 +
 arch/riscv/boards/pk/Makefile           |   5 ++
 arch/riscv/boards/pk/barebox.lds.S      |  40 +++++++++++
 arch/riscv/boards/pk/console.c          |  43 ++++++++++++
 arch/riscv/boards/pk/devices.c          |  36 ++++++++++
 arch/riscv/boards/pk/dtb.c              |  67 ++++++++++++++++++
 arch/riscv/configs/pk_defconfig         |  70 +++++++++++++++++++
 arch/riscv/dts/.gitignore               |   1 +
 arch/riscv/dts/Makefile                 |  11 +++
 arch/riscv/dts/pk.dts                   |   7 ++
 arch/riscv/dts/skeleton.dtsi            |  13 ++++
 arch/riscv/include/asm/barebox.h        |   1 +
 arch/riscv/include/asm/bitops.h         |  35 ++++++++++
 arch/riscv/include/asm/bitsperlong.h    |  10 +++
 arch/riscv/include/asm/byteorder.h      |  12 ++++
 arch/riscv/include/asm/common.h         |   6 ++
 arch/riscv/include/asm/elf.h            |  11 +++
 arch/riscv/include/asm/io.h             |   8 +++
 arch/riscv/include/asm/posix_types.h    |   1 +
 arch/riscv/include/asm/sections.h       |   1 +
 arch/riscv/include/asm/string.h         |   1 +
 arch/riscv/include/asm/swab.h           |   6 ++
 arch/riscv/include/asm/types.h          |  60 +++++++++++++++++
 arch/riscv/include/asm/unaligned.h      |  19 ++++++
 arch/riscv/lib/asm-offsets.c            |  12 ++++
 arch/riscv/mach-pk/Makefile             |  12 ++++
 arch/riscv/mach-pk/common.c             | 116 ++++++++++++++++++++++++++++++++
 arch/riscv/mach-pk/include/mach/linux.h |  22 ++++++
 drivers/of/Kconfig                      |   2 +-
 drivers/serial/Kconfig                  |   2 +-
 32 files changed, 730 insertions(+), 2 deletions(-)
 create mode 100644 arch/riscv/Kconfig
 create mode 100644 arch/riscv/Makefile
 create mode 100644 arch/riscv/boards/pk/.gitignore
 create mode 100644 arch/riscv/boards/pk/Makefile
 create mode 100644 arch/riscv/boards/pk/barebox.lds.S
 create mode 100644 arch/riscv/boards/pk/console.c
 create mode 100644 arch/riscv/boards/pk/devices.c
 create mode 100644 arch/riscv/boards/pk/dtb.c
 create mode 100644 arch/riscv/configs/pk_defconfig
 create mode 100644 arch/riscv/dts/.gitignore
 create mode 100644 arch/riscv/dts/Makefile
 create mode 100644 arch/riscv/dts/pk.dts
 create mode 100644 arch/riscv/dts/skeleton.dtsi
 create mode 100644 arch/riscv/include/asm/barebox.h
 create mode 100644 arch/riscv/include/asm/bitops.h
 create mode 100644 arch/riscv/include/asm/bitsperlong.h
 create mode 100644 arch/riscv/include/asm/byteorder.h
 create mode 100644 arch/riscv/include/asm/common.h
 create mode 100644 arch/riscv/include/asm/elf.h
 create mode 100644 arch/riscv/include/asm/io.h
 create mode 100644 arch/riscv/include/asm/posix_types.h
 create mode 100644 arch/riscv/include/asm/sections.h
 create mode 100644 arch/riscv/include/asm/string.h
 create mode 100644 arch/riscv/include/asm/swab.h
 create mode 100644 arch/riscv/include/asm/types.h
 create mode 100644 arch/riscv/include/asm/unaligned.h
 create mode 100644 arch/riscv/lib/asm-offsets.c
 create mode 100644 arch/riscv/mach-pk/Makefile
 create mode 100644 arch/riscv/mach-pk/common.c
 create mode 100644 arch/riscv/mach-pk/include/mach/linux.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
new file mode 100644
index 0000000..2bc49b9
--- /dev/null
+++ b/arch/riscv/Kconfig
@@ -0,0 +1,17 @@
+config RISCV
+	bool
+	select OFTREE
+	select GENERIC_FIND_NEXT_BIT
+	default y
+
+config ARCH_TEXT_BASE
+	hex
+	default 0x00000000
+
+source common/Kconfig
+source commands/Kconfig
+source net/Kconfig
+source drivers/Kconfig
+source fs/Kconfig
+source lib/Kconfig
+source crypto/Kconfig
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
new file mode 100644
index 0000000..7536411
--- /dev/null
+++ b/arch/riscv/Makefile
@@ -0,0 +1,84 @@
+KBUILD_DEFCONFIG := pk_defconfig
+
+CPPFLAGS += -fno-strict-aliasing
+
+machine-y := pk
+board-y := pk
+
+TEXT_BASE = $(CONFIG_TEXT_BASE)
+
+machdirs := $(patsubst %,arch/riscv/mach-%/,$(machine-y))
+
+ifeq ($(KBUILD_SRC),)
+CPPFLAGS += $(patsubst %,-I%include,$(machdirs))
+else
+CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
+endif
+
+archprepare: maketools
+
+PHONY += maketools
+
+cmd_barebox__ = $(CC) -o $@ -Wl,-T,$(barebox-lds) \
+	-Wl,--start-group $(barebox-common) -Wl,--end-group
+
+ifneq ($(machine-y),)
+MACH  := arch/riscv/mach-$(machine-y)/
+else
+MACH  :=
+endif
+
+ifneq ($(board-y),)
+BOARD := arch/riscv/boards/$(board-y)/
+else
+BOARD :=
+endif
+
+common-y += $(BOARD) $(MACH)
+
+common-$(CONFIG_OFTREE) += arch/riscv/dts/
+
+lds-y   := $(BOARD)/barebox.lds
+
+CLEAN_FILES += $(BOARD)/barebox.lds
+
+ifeq ($(machine-y),pk)
+CFLAGS += \
+	-Dmalloc=barebox_malloc \
+	-Dcalloc=barebox_calloc \
+	-Dfree=barebox_free \
+	-Drealloc=barebox_realloc \
+	-Dread=barebox_read \
+	-Dwrite=barebox_write \
+	-Dopen=barebox_open \
+	-Dclose=barebox_close \
+	-Dlseek=barebox_lseek \
+	-Dperror=barebox_perror \
+	-Derrno=barebox_errno \
+	-Dgetc=barebox_getc \
+	-Dputc=barebox_putc \
+	-Dfgetc=barebox_fgetc \
+	-Dfputc=barebox_fputc \
+	-Dfgets=barebox_fgets \
+	-Dfputs=barebox_fputs \
+	-Dsetenv=barebox_setenv \
+	-Dgetenv=barebox_getenv \
+	-Dprintf=barebox_printf \
+	-Dglob=barebox_glob \
+	-Dglobfree=barebox_globfree \
+	-Dioctl=barebox_ioctl \
+	-Dfstat=barebox_fstat \
+	-Dlstat=barebox_lstat \
+	-Dstat=barebox_stat \
+	-Dchdir=barebox_chdir \
+	-Dunlink=barebox_unlink \
+	-Dgetcwd=barebox_getcwd \
+	-Dsbrk=barebox_sbrk \
+	-Dgetopt=barebox_getopt \
+	-Doptarg=barebox_optarg \
+	-Doptind=barebox_optind \
+	-Dopterr=barebox_opterr \
+	-Doptopt=barebox_optopt \
+	-Dgetopt_context_store=barebox_getopt_context_store \
+	-Dgetopt_context_restore=barebox_getopt_context_restore
+endif
diff --git a/arch/riscv/boards/pk/.gitignore b/arch/riscv/boards/pk/.gitignore
new file mode 100644
index 0000000..d116578
--- /dev/null
+++ b/arch/riscv/boards/pk/.gitignore
@@ -0,0 +1 @@
+barebox.lds
diff --git a/arch/riscv/boards/pk/Makefile b/arch/riscv/boards/pk/Makefile
new file mode 100644
index 0000000..2f921e6
--- /dev/null
+++ b/arch/riscv/boards/pk/Makefile
@@ -0,0 +1,5 @@
+obj-y += console.o
+obj-y += devices.o
+obj-y += dtb.o
+
+extra-y += barebox.lds
diff --git a/arch/riscv/boards/pk/barebox.lds.S b/arch/riscv/boards/pk/barebox.lds.S
new file mode 100644
index 0000000..6ba2814
--- /dev/null
+++ b/arch/riscv/boards/pk/barebox.lds.S
@@ -0,0 +1,40 @@
+#include <asm-generic/barebox.lds.h>
+
+SECTIONS
+{
+	_stext = .;
+	_etext = .;			/* End of text and rodata section */
+	_sdata = .;
+
+	. = ALIGN(4);
+	.data : { *(.data*) }
+
+	. = ALIGN(64);
+	__barebox_initcalls_start = .;
+	__barebox_initcalls : { INITCALLS }
+	__barebox_initcalls_end = .;
+
+	. = ALIGN(64);
+	__barebox_exitcalls_start = .;
+	__barebox_exitcalls : { EXITCALLS }
+	__barebox_exitcalls_end = .;
+
+	. = ALIGN(64);
+	__barebox_magicvar_start = .;
+	.barebox_magicvar : { BAREBOX_MAGICVARS }
+	__barebox_magicvar_end = .;
+
+	. = ALIGN(64);
+	__barebox_cmd_start = .;
+	__barebox_cmd : { BAREBOX_CMDS }
+	__barebox_cmd_end = .;
+
+	_edata = .;
+	. = ALIGN(8);
+	__bss_start = .;
+	.bss : { *(.bss*) }
+	__bss_stop = .;
+	_end = .;
+}
+
+INSERT BEFORE .rodata;
diff --git a/arch/riscv/boards/pk/console.c b/arch/riscv/boards/pk/console.c
new file mode 100644
index 0000000..92399f5
--- /dev/null
+++ b/arch/riscv/boards/pk/console.c
@@ -0,0 +1,43 @@
+/*
+ * console.c - register a console device
+ *
+ * Copyright (c) 2007 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <mach/linux.h>
+#include <xfuncs.h>
+
+int barebox_register_console(char *name, int stdinfd, int stdoutfd)
+{
+	struct device_d *dev;
+	struct linux_console_data *data;
+
+	dev = xzalloc(sizeof(struct device_d) + sizeof(struct linux_console_data));
+
+	data = (struct linux_console_data *)(dev + 1);
+
+	dev->platform_data = data;
+	strcpy(dev->name, name);
+
+	strcpy(dev->name, "console");
+
+	data->stdoutfd = stdoutfd;
+	data->stdinfd  = stdinfd;
+
+	return sandbox_add_device(dev);
+}
diff --git a/arch/riscv/boards/pk/devices.c b/arch/riscv/boards/pk/devices.c
new file mode 100644
index 0000000..301446a
--- /dev/null
+++ b/arch/riscv/boards/pk/devices.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
+ *
+ * Under GPLv2 only
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+
+static LIST_HEAD(sandbox_device_list);
+
+int sandbox_add_device(struct device_d *dev)
+{
+	list_add(&dev->list, &sandbox_device_list);
+
+	return 0;
+}
+
+static int sandbox_device_init(void)
+{
+	struct device_d *dev, *tmp;
+
+	barebox_set_model("riscv proxy kernel");
+	barebox_set_hostname("barebox");
+
+	list_for_each_entry_safe(dev, tmp, &sandbox_device_list, list) {
+		/* reset the list_head before registering for real */
+		dev->list.prev = NULL;
+		dev->list.next = NULL;
+		platform_device_register(dev);
+	}
+
+	return 0;
+}
+postcore_initcall(sandbox_device_init);
diff --git a/arch/riscv/boards/pk/dtb.c b/arch/riscv/boards/pk/dtb.c
new file mode 100644
index 0000000..af4a64a
--- /dev/null
+++ b/arch/riscv/boards/pk/dtb.c
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2013 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
+ * Copyright (c) 2015 Marc Kleine-Budde <mkl at pengutronix.de>, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <of.h>
+
+#include <mach/linux.h>
+#include <linux/err.h>
+
+static const void *dtb;
+
+int barebox_register_dtb(const void *new_dtb)
+{
+	if (dtb)
+		return -EBUSY;
+
+	dtb = new_dtb;
+
+	return 0;
+}
+
+static int of_sandbox_init(void)
+{
+	struct device_node *root;
+	int ret;
+
+	if (dtb) {
+		root = of_unflatten_dtb(dtb);
+	} else {
+		root = of_new_node(NULL, NULL);
+
+		ret = of_property_write_u32(root, "#address-cells", 2);
+		if (ret)
+			return ret;
+
+		ret = of_property_write_u32(root, "#size-cells", 1);
+		if (ret)
+			return ret;
+	}
+
+	if (IS_ERR(root))
+		return PTR_ERR(root);
+
+	of_set_root_node(root);
+	of_fix_tree(root);
+	if (IS_ENABLED(CONFIG_OFDEVICE))
+		of_probe();
+
+	return 0;
+}
+core_initcall(of_sandbox_init);
diff --git a/arch/riscv/configs/pk_defconfig b/arch/riscv/configs/pk_defconfig
new file mode 100644
index 0000000..8440898
--- /dev/null
+++ b/arch/riscv/configs/pk_defconfig
@@ -0,0 +1,70 @@
+# CONFIG_GLOBALVAR is not set
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+# CONFIG_BOOTM is not set
+CONFIG_PARTITION=y
+# CONFIG_ENV_HANDLING is not set
+CONFIG_DEFAULT_COMPRESSION_GZIP=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_LL=y
+CONFIG_CMD_DMESG=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IMD=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_AUTOMOUNT=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_DEFAULTENV=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_BASENAME=y
+CONFIG_CMD_CMP=y
+CONFIG_CMD_DIRNAME=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_LN=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_READLINK=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SHA224SUM=y
+CONFIG_CMD_SHA256SUM=y
+CONFIG_CMD_SHA384SUM=y
+CONFIG_CMD_SHA512SUM=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_GETOPT=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_READF=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_MENUTREE=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_DETECT=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OF_DISPLAY_TIMINGS=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
+CONFIG_OFDEVICE=y
+# CONFIG_SPI is not set
+# CONFIG_PINCTRL is not set
+CONFIG_FS_BPKFS=y
+CONFIG_FS_UIMAGEFS=y
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_XZ_DECOMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DIGEST_HMAC_GENERIC=y
diff --git a/arch/riscv/dts/.gitignore b/arch/riscv/dts/.gitignore
new file mode 100644
index 0000000..077903c
--- /dev/null
+++ b/arch/riscv/dts/.gitignore
@@ -0,0 +1 @@
+*dtb*
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
new file mode 100644
index 0000000..898c3c3
--- /dev/null
+++ b/arch/riscv/dts/Makefile
@@ -0,0 +1,11 @@
+ifeq ($(CONFIG_OFTREE),y)
+dtb-y += \
+	pk.dtb
+endif
+
+# just to build a built-in.o. Otherwise compilation fails when no devicetree is
+# created.
+obj- += dummy.o
+
+always := $(dtb-y)
+clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts
diff --git a/arch/riscv/dts/pk.dts b/arch/riscv/dts/pk.dts
new file mode 100644
index 0000000..2595aa1
--- /dev/null
+++ b/arch/riscv/dts/pk.dts
@@ -0,0 +1,7 @@
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+
+};
diff --git a/arch/riscv/dts/skeleton.dtsi b/arch/riscv/dts/skeleton.dtsi
new file mode 100644
index 0000000..38ead82
--- /dev/null
+++ b/arch/riscv/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value.  The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	chosen { };
+	aliases { };
+	memory { device_type = "memory"; reg = <0 0 0>; };
+};
diff --git a/arch/riscv/include/asm/barebox.h b/arch/riscv/include/asm/barebox.h
new file mode 100644
index 0000000..2997587
--- /dev/null
+++ b/arch/riscv/include/asm/barebox.h
@@ -0,0 +1 @@
+/* dummy */
diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
new file mode 100644
index 0000000..e77ab83
--- /dev/null
+++ b/arch/riscv/include/asm/bitops.h
@@ -0,0 +1,35 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ */
+
+#ifndef _ASM_BITOPS_H_
+#define _ASM_BITOPS_H_
+
+#include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/ffs.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/hweight.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/find.h>
+#include <asm-generic/bitops/ops.h>
+
+#define set_bit(x, y)			__set_bit(x, y)
+#define clear_bit(x, y)			__clear_bit(x, y)
+#define change_bit(x, y)		__change_bit(x, y)
+#define test_and_set_bit(x, y)		__test_and_set_bit(x, y)
+#define test_and_clear_bit(x, y)	__test_and_clear_bit(x, y)
+#define test_and_change_bit(x, y)	__test_and_change_bit(x, y)
+
+#endif /* _ASM_BITOPS_H_ */
diff --git a/arch/riscv/include/asm/bitsperlong.h b/arch/riscv/include/asm/bitsperlong.h
new file mode 100644
index 0000000..4641e7e
--- /dev/null
+++ b/arch/riscv/include/asm/bitsperlong.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_BITSPERLONG_H
+#define __ASM_BITSPERLONG_H
+
+#ifdef __riscv64
+#define BITS_PER_LONG 64
+#else
+#define BITS_PER_LONG 32
+#endif
+
+#endif /* __ASM_BITSPERLONG_H */
diff --git a/arch/riscv/include/asm/byteorder.h b/arch/riscv/include/asm/byteorder.h
new file mode 100644
index 0000000..994a61a
--- /dev/null
+++ b/arch/riscv/include/asm/byteorder.h
@@ -0,0 +1,12 @@
+#ifndef _ASM_RISCV_BYTEORDER_H
+#define _ASM_RISCV_BYTEORDER_H
+
+#if defined(__RISCVEL__)
+#include <linux/byteorder/little_endian.h>
+#elif defined(__RISCVEB__)
+#include <linux/byteorder/big_endian.h>
+#else
+#error "Unknown endianness"
+#endif
+
+#endif /* _ASM_RISCV_BYTEORDER_H */
diff --git a/arch/riscv/include/asm/common.h b/arch/riscv/include/asm/common.h
new file mode 100644
index 0000000..9b8bd2d
--- /dev/null
+++ b/arch/riscv/include/asm/common.h
@@ -0,0 +1,6 @@
+#ifndef ASM_COMMON_H
+#define ASM_COMMON_H
+
+#define ARCH_HAS_CTRLC
+
+#endif /* ASM_COMMON_H */
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
new file mode 100644
index 0000000..3939336
--- /dev/null
+++ b/arch/riscv/include/asm/elf.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_SANDBOX_ELF_H__
+#define __ASM_SANDBOX_ELF_H__
+
+#if __SIZEOF_POINTER__ == 8
+#define ELF_CLASS	ELFCLASS64
+#define CONFIG_PHYS_ADDR_T_64BIT
+#else
+#define ELF_CLASS	ELFCLASS32
+#endif
+
+#endif /* __ASM_SANDBOX_ELF_H__ */
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
new file mode 100644
index 0000000..d9aca42
--- /dev/null
+++ b/arch/riscv/include/asm/io.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_RISCV_IO_H
+#define __ASM_RISCV_IO_H
+
+#include <asm-generic/io.h>
+
+#define IO_SPACE_LIMIT 0
+
+#endif /* __ASM_RISCV_IO_H */
diff --git a/arch/riscv/include/asm/posix_types.h b/arch/riscv/include/asm/posix_types.h
new file mode 100644
index 0000000..22cae62
--- /dev/null
+++ b/arch/riscv/include/asm/posix_types.h
@@ -0,0 +1 @@
+#include <asm-generic/posix_types.h>
diff --git a/arch/riscv/include/asm/sections.h b/arch/riscv/include/asm/sections.h
new file mode 100644
index 0000000..2b8c516
--- /dev/null
+++ b/arch/riscv/include/asm/sections.h
@@ -0,0 +1 @@
+#include <asm-generic/sections.h>
diff --git a/arch/riscv/include/asm/string.h b/arch/riscv/include/asm/string.h
new file mode 100644
index 0000000..2997587
--- /dev/null
+++ b/arch/riscv/include/asm/string.h
@@ -0,0 +1 @@
+/* dummy */
diff --git a/arch/riscv/include/asm/swab.h b/arch/riscv/include/asm/swab.h
new file mode 100644
index 0000000..60a9012
--- /dev/null
+++ b/arch/riscv/include/asm/swab.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SWAB_H
+#define _ASM_SWAB_H
+
+/* nothing. use generic functions */
+
+#endif /* _ASM_SWAB_H */
diff --git a/arch/riscv/include/asm/types.h b/arch/riscv/include/asm/types.h
new file mode 100644
index 0000000..ba386ab
--- /dev/null
+++ b/arch/riscv/include/asm/types.h
@@ -0,0 +1,60 @@
+#ifndef __ASM_RISCV_TYPES_H
+#define __ASM_RISCV_TYPES_H
+
+#ifdef __riscv64
+/*
+ * This is used in dlmalloc. On RISCV64 we need it to be 64 bit
+ */
+#define INTERNAL_SIZE_T unsigned long
+
+/*
+ * This is a Kconfig variable in the Kernel, but we want to detect
+ * this during compile time, so we set it here.
+ */
+#define CONFIG_PHYS_ADDR_T_64BIT
+
+#endif
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+#include <asm/bitsperlong.h>
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASM_RISCV_TYPES_H */
diff --git a/arch/riscv/include/asm/unaligned.h b/arch/riscv/include/asm/unaligned.h
new file mode 100644
index 0000000..d02da6e
--- /dev/null
+++ b/arch/riscv/include/asm/unaligned.h
@@ -0,0 +1,19 @@
+#ifndef _ASM_SANDBOX_UNALIGNED_H
+#define _ASM_SANDBOX_UNALIGNED_H
+
+/*
+ * The architecture sandbox is compiled on can do unaligned accesses itself.
+ */
+
+#include <linux/unaligned/access_ok.h>
+#include <linux/unaligned/generic.h>
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define get_unaligned __get_unaligned_le
+#define put_unaligned __put_unaligned_le
+#else
+#define get_unaligned __get_unaligned_be
+#define put_unaligned __put_unaligned_be
+#endif
+
+#endif /* _ASM_SANDBOX_UNALIGNED_H */
diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
new file mode 100644
index 0000000..22f382b
--- /dev/null
+++ b/arch/riscv/lib/asm-offsets.c
@@ -0,0 +1,12 @@
+/*
+ * Generate definitions needed by assembly language modules.
+ * This code generates raw asm output which is post-processed to extract
+ * and format the required data.
+ */
+
+#include <linux/kbuild.h>
+
+int main(void)
+{
+	return 0;
+}
diff --git a/arch/riscv/mach-pk/Makefile b/arch/riscv/mach-pk/Makefile
new file mode 100644
index 0000000..5f4c97b
--- /dev/null
+++ b/arch/riscv/mach-pk/Makefile
@@ -0,0 +1,12 @@
+machdirs := arch/riscv/mach-pk/
+
+ifeq ($(KBUILD_SRC),)
+CPPFLAGS := $(patsubst %,-I%include,$(machdirs))
+else
+CPPFLAGS := $(patsubst %,-I$(srctree)/%include,$(machdirs))
+endif
+
+CFLAGS := -W -Wall -DCONFIG_MALLOC_SIZE=$(CONFIG_MALLOC_SIZE)
+NOSTDINC_FLAGS :=
+
+obj-y = common.o
diff --git a/arch/riscv/mach-pk/common.c b/arch/riscv/mach-pk/common.c
new file mode 100644
index 0000000..e9b70b4
--- /dev/null
+++ b/arch/riscv/mach-pk/common.c
@@ -0,0 +1,116 @@
+
+/*
+ * common.c - common wrapper functions between barebox and the host
+ *
+ * Copyright (c) 2007 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/*
+ * These are host includes. Never include any barebox header
+ * files here...
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <unistd.h>
+#include <errno.h>
+
+/*
+ * ...except the ones needed to connect with barebox
+ */
+#include <mach/linux.h>
+
+static void cookmode(void)
+{
+	fflush(stdout);
+}
+
+int linux_tstc(int fd)
+{
+	(void)fd;
+
+	return 0;
+}
+
+int ctrlc(void)
+{
+	return 0;
+}
+
+void __attribute__((noreturn)) linux_exit(void)
+{
+	cookmode();
+	exit(0);
+}
+
+int linux_read(int fd, void *buf, size_t count)
+{
+	ssize_t ret;
+
+	if (count == 0)
+		return 0;
+
+	do {
+		ret = read(fd, buf, count);
+
+		if (ret == 0) {
+			printf("read on fd %d returned 0, device gone? - exiting\n", fd);
+			linux_exit();
+		} else if (ret == -1) {
+			if (errno == EAGAIN)
+				return -errno;
+			else if (errno == EINTR)
+				continue;
+			else {
+				printf("read on fd %d returned -1, errno %d - exiting\n", fd, errno);
+				linux_exit();
+			}
+		}
+	} while (ret <= 0);
+
+	return (int)ret;
+}
+
+ssize_t linux_write(int fd, const void *buf, size_t count)
+{
+	return write(fd, buf, count);
+}
+
+extern void start_barebox(void);
+extern void mem_malloc_init(void *start, void *end);
+
+int main(int argc, char *argv[])
+{
+	void *ram;
+	int malloc_size = CONFIG_MALLOC_SIZE;
+
+	(void)argc;
+	(void)argv;
+
+	ram = malloc(malloc_size);
+	if (!ram) {
+		printf("unable to get malloc space\n");
+		exit(1);
+	}
+	mem_malloc_init(ram, ram + malloc_size - 1);
+
+	barebox_register_console("console", fileno(stdin), fileno(stdout));
+
+	start_barebox();
+
+	/* never reached */
+	return 0;
+}
diff --git a/arch/riscv/mach-pk/include/mach/linux.h b/arch/riscv/mach-pk/include/mach/linux.h
new file mode 100644
index 0000000..627ee17
--- /dev/null
+++ b/arch/riscv/mach-pk/include/mach/linux.h
@@ -0,0 +1,22 @@
+#ifndef __ASM_ARCH_LINUX_H
+#define __ASM_ARCH_LINUX_H
+
+struct device_d;
+
+int sandbox_add_device(struct device_d *dev);
+
+int linux_register_device(const char *name, void *start, void *end);
+int linux_read(int fd, void *buf, size_t count);
+ssize_t linux_write(int fd, const void *buf, size_t count);
+int linux_tstc(int fd);
+
+int barebox_register_console(char *name_template, int stdinfd, int stdoutfd);
+
+int barebox_register_dtb(const void *dtb);
+
+struct linux_console_data {
+	int stdinfd;
+	int stdoutfd;
+};
+
+#endif /* __ASM_ARCH_LINUX_H */
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index d0a62bd..0824b04 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -4,7 +4,7 @@ config OFTREE
 
 config OFTREE_MEM_GENERIC
 	depends on OFTREE
-	depends on PPC || ARM || ARCH_EFI || OPENRISC || SANDBOX
+	depends on PPC || ARM || ARCH_EFI || OPENRISC || SANDBOX || RISCV
 	def_bool y
 
 config DTC
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b112d7e..85751a2 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -41,7 +41,7 @@ config DRIVER_SERIAL_NETX
 	bool "Netx serial driver"
 
 config DRIVER_SERIAL_LINUX_CONSOLE
-	depends on LINUX
+	depends on LINUX || RISCV
 	default y
 	bool "linux console driver"
 
-- 
2.9.3



From r.schwebel at pengutronix.de  Thu Oct 13 03:18:04 2016
From: r.schwebel at pengutronix.de (Robert Schwebel)
Date: Thu, 13 Oct 2016 12:18:04 +0200
Subject: [RFC] add riscv support
In-Reply-To: <20161013091127.3130-1-antonynpavlov@gmail.com>
References: <20161013091127.3130-1-antonynpavlov@gmail.com>
Message-ID: <20161013101804.pbszr2hzazsxs3nd@pengutronix.de>

On Thu, Oct 13, 2016 at 12:11:27PM +0300, Antony Pavlov wrote:
> This patch adds initial RISC-V architecture support for barebox.

Great to see this; could you add some documentation? We have a nice
documentation framework in the meantime. Most of your cover letter could
for example go into the docs.

rsc
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Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From daniel.krueger at systec-electronic.com  Thu Oct 13 03:32:31 2016
From: daniel.krueger at systec-electronic.com (=?UTF-8?Q?Daniel_Kr=c3=bcger?=)
Date: Thu, 13 Oct 2016 12:32:31 +0200
Subject: Compressed DTB - builtin DTB
Message-ID: <03214122-b05b-fc45-1e32-ad2832ca36d3@systec-electronic.com>

Hello,

I'm currently porting our board support to device tree. Currently, I 
don't use multi-PBL, but include the device tree via CONFIG_BUILTIN_DTB. 
This works, but the DTB seems to be included twice in the image: once as 
plain DTB and once as compressed DTB. I think this isn't intended this way.

Extract from System.map:
87e82b80 R __dtb_imx35_systec_hmi_start
87e82b80 R __dtb_start
87e8501c R __dtb_imx35_systec_hmi_end
87e85020 R __dtb_z_imx35_systec_hmi_start
87e85ad0 R __dtb_z_imx35_systec_hmi_end
87e85b00 B __bss_start
87e85b00 R __dtb_end

Just using the compressed DTB would be really good. Because it makes the 
image much smaller. However, how should that be done? The extract code 
might be simple. But I don't have an idea how to let the linker select 
the right version.

Thanks for any kind of support,
   Daniel

-- 

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund

Telefon : +49 (0) 3765 38600-0
Fax     : +49 (0) 3765 38600-4100
Email   : daniel.krueger at systec-electronic.com
Website : http://www.systec-electronic.com

Managing Directors  :
   Dipl.-Phys. Siegmar Schmidt, Dipl. Ing. (FH) Armin von Collrepp
Commercial registry : Amtsgericht Chemnitz, HRB 28082
USt.-Id Nr.         : DE150534010



From Alain.Trostel at haslerrail.com  Thu Oct 13 06:38:36 2016
From: Alain.Trostel at haslerrail.com (Trostel Alain)
Date: Thu, 13 Oct 2016 13:38:36 +0000
Subject: How to configure and enable the barebox state?
Message-ID: <F6D4D53A3E6A8043A8517794EE9C52320CE989@HRSRV03.haslerrail.net>

Hi,

I would like to configure and enable the barebox state. My assumption is
that I need to change the following device tree for my Phytec AM335x
SOM:

arch/arm/dts/am335x-phytec-phycore-som.dts

But from the documentation
(http://www.barebox.org/doc/latest/devicetree/bindings/barebox/barebox,state.html) it is not clear to me where exactly I need to add the variable node example. Furthermore, I have check that the 'CONFIG_OFDEVICE' is enabled.
So, where is the correct place to add the variable node configuration
and what needs to be enabled in barebox?

Best regards,
Alain

From s.trumtrar at pengutronix.de  Fri Oct 14 02:27:15 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Fri, 14 Oct 2016 11:27:15 +0200
Subject: [PATCH v2 3/3] ARM: socfpga: dtsi: add dw-wdt reset lines
In-Reply-To: <20161014092715.4257-1-s.trumtrar@pengutronix.de>
References: <20161014092715.4257-1-s.trumtrar@pengutronix.de>
Message-ID: <20161014092715.4257-3-s.trumtrar@pengutronix.de>

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 arch/arm/dts/socfpga.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index d16758fdab46..66d7f21dc6a3 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -49,3 +49,13 @@
 &f2s_sdram_ref_clk {
 	clock-frequency = <0>;
 };
+
+&watchdog0 {
+	resets = <&rst L4WD0_RESET>;
+	reset-names = "dw-wdt";
+};
+
+&watchdog1 {
+	resets = <&rst L4WD1_RESET>;
+	reset-names = "dw-wdt";
+};
-- 
2.9.3



From s.trumtrar at pengutronix.de  Fri Oct 14 02:27:13 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Fri, 14 Oct 2016 11:27:13 +0200
Subject: [PATCH v2 1/3] reset: import socfpga-reset driver from linux
Message-ID: <20161014092715.4257-1-s.trumtrar@pengutronix.de>

Port the linux v4.8-rc1 reset-socfpga driver to barebox.

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
Changes since v1:
  - use dev_request_mem_resource

 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-socfpga.c | 124 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+)
 create mode 100644 drivers/reset/reset-socfpga.c

diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 1e2d83f2b995..52b10cd48055 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
+obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
new file mode 100644
index 000000000000..9214197e627d
--- /dev/null
+++ b/drivers/reset/reset-socfpga.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright 2014 Steffen Trumtrar <s.trumtrar at pengutronix.de>
+ *
+ * based on
+ * Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard at free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <linux/err.h>
+#include <linux/reset-controller.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+#define NR_BANKS		4
+
+struct socfpga_reset_data {
+	spinlock_t			lock;
+	void __iomem			*membase;
+	u32				modrst_offset;
+	struct reset_controller_dev	rcdev;
+};
+
+static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS));
+	writel(reg | BIT(offset), data->membase + data->modrst_offset +
+				 (bank * NR_BANKS));
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
+				  unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS));
+	writel(reg & ~BIT(offset), data->membase + data->modrst_offset +
+				  (bank * NR_BANKS));
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static struct reset_control_ops socfpga_reset_ops = {
+	.assert		= socfpga_reset_assert,
+	.deassert	= socfpga_reset_deassert,
+};
+
+static int socfpga_reset_probe(struct device_d *dev)
+{
+	struct socfpga_reset_data *data;
+	struct resource *res;
+	struct device_node *np = dev->device_node;
+
+	data = xzalloc(sizeof(*data));
+
+	res = dev_request_mem_resource(dev, 0);
+	data->membase = IOMEM(res->start);
+	if (IS_ERR(data->membase))
+		return PTR_ERR(data->membase);
+
+	if (of_property_read_u32(np, "altr,modrst-offset", &data->modrst_offset)) {
+		dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n");
+		data->modrst_offset = 0x10;
+	}
+
+	spin_lock_init(&data->lock);
+
+	data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG;
+	data->rcdev.ops = &socfpga_reset_ops;
+	data->rcdev.of_node = np;
+
+	return reset_controller_register(&data->rcdev);
+}
+
+static const struct of_device_id socfpga_reset_dt_ids[] = {
+	{ .compatible = "altr,rst-mgr", },
+	{ /* sentinel */ },
+};
+
+static struct driver_d socfpga_reset_driver = {
+	.probe	= socfpga_reset_probe,
+	.of_compatible	= DRV_OF_COMPAT(socfpga_reset_dt_ids),
+};
+
+static int socfpga_reset_init(void)
+{
+	return platform_driver_register(&socfpga_reset_driver);
+}
+postcore_initcall(socfpga_reset_init);
-- 
2.9.3



From s.trumtrar at pengutronix.de  Fri Oct 14 02:27:14 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Fri, 14 Oct 2016 11:27:14 +0200
Subject: [PATCH v2 2/3] watchdog: add designware driver
In-Reply-To: <20161014092715.4257-1-s.trumtrar@pengutronix.de>
References: <20161014092715.4257-1-s.trumtrar@pengutronix.de>
Message-ID: <20161014092715.4257-2-s.trumtrar@pengutronix.de>

Port the linux v4.8-rc1 Synopsys DesignWare watchdog driver to barebox.

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
Changes since v1:
  - change usages of pr_warn in favor of dev_warn

 drivers/watchdog/Kconfig  |   6 ++
 drivers/watchdog/Makefile |   1 +
 drivers/watchdog/dw_wdt.c | 193 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 200 insertions(+)
 create mode 100644 drivers/watchdog/dw_wdt.c

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 60a56bf4b030..63fb1a8c5701 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -16,6 +16,12 @@ config WATCHDOG_DAVINCI
 	help
 	  Add support for watchdog on the TI Davinci SoC.
 
+config WATCHDOG_DW
+	bool "Synopsys DesignWare watchdog"
+	select RESET_CONTROLLER
+	help
+	  Add support for the Synopsys DesignWare watchdog timer.
+
 config WATCHDOG_MXS28
 	bool "i.MX28"
 	depends on ARCH_IMX28
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index e3afe1c27efb..5fca4c368c40 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -2,5 +2,6 @@ obj-$(CONFIG_WATCHDOG) += wd_core.o
 obj-$(CONFIG_WATCHDOG_DAVINCI) += davinci_wdt.o
 obj-$(CONFIG_WATCHDOG_OMAP) += omap_wdt.o
 obj-$(CONFIG_WATCHDOG_MXS28) += im28wd.o
+obj-$(CONFIG_WATCHDOG_DW) += dw_wdt.o
 obj-$(CONFIG_WATCHDOG_JZ4740) += jz4740.o
 obj-$(CONFIG_WATCHDOG_IMX_RESET_SOURCE) += imxwd.o
diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
new file mode 100644
index 000000000000..6de2b84356dc
--- /dev/null
+++ b/drivers/watchdog/dw_wdt.c
@@ -0,0 +1,193 @@
+/*
+ * Copyright 2010-2011 Picochip Ltd., Jamie Iles
+ * http://www.picochip.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * This file implements a driver for the Synopsys DesignWare watchdog device
+ * in the many subsystems. The watchdog has 16 different timeout periods
+ * and these are a function of the input clock frequency.
+ *
+ * The DesignWare watchdog cannot be stopped once it has been started so we
+ * do not implement a stop function. The watchdog core will continue to send
+ * heartbeat requests after the watchdog device has been closed.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <of.h>
+#include <restart.h>
+#include <watchdog.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/reset.h>
+
+#define WDOG_CONTROL_REG_OFFSET		    0x00
+#define WDOG_CONTROL_REG_WDT_EN_MASK	    0x01
+#define WDOG_TIMEOUT_RANGE_REG_OFFSET	    0x04
+#define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT    4
+#define WDOG_CURRENT_COUNT_REG_OFFSET	    0x08
+#define WDOG_COUNTER_RESTART_REG_OFFSET     0x0c
+#define WDOG_COUNTER_RESTART_KICK_VALUE	    0x76
+
+/* The maximum TOP (timeout period) value that can be set in the watchdog. */
+#define DW_WDT_MAX_TOP		15
+
+#define DW_WDT_DEFAULT_SECONDS	30
+
+struct dw_wdt {
+	void __iomem		*regs;
+	struct clk		*clk;
+	struct restart_handler	restart;
+	struct watchdog		wdd;
+	struct reset_control	*rst;
+};
+
+#define to_dw_wdt(wdd)	container_of(wdd, struct dw_wdt, wdd)
+
+static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
+{
+	/*
+	 * There are 16 possible timeout values in 0..15 where the number of
+	 * cycles is 2 ^ (16 + i) and the watchdog counts down.
+	 */
+	return (1U << (16 + top)) / clk_get_rate(dw_wdt->clk);
+}
+
+static int dw_wdt_start(struct watchdog *wdd)
+{
+	struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+
+	writel(WDOG_CONTROL_REG_WDT_EN_MASK,
+	       dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
+
+	return 0;
+}
+
+static int dw_wdt_stop(struct watchdog *wdd)
+{
+	struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+
+	if (IS_ERR(dw_wdt->rst)) {
+		dev_warn(dw_wdt->dev, "No reset line. Will not stop.\n");
+		return PTR_ERR(dw_wdt->rst);
+	}
+
+	reset_control_assert(dw_wdt->rst);
+	reset_control_deassert(dw_wdt->rst);
+
+	return 0;
+}
+
+static int dw_wdt_set_timeout(struct watchdog *wdd, unsigned int top_s)
+{
+	struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+	int i, top_val = DW_WDT_MAX_TOP;
+
+	if (top_s == 0)
+		return dw_wdt_stop(wdd);
+
+	/*
+	 * Iterate over the timeout values until we find the closest match. We
+	 * always look for >=.
+	 */
+	for (i = 0; i <= DW_WDT_MAX_TOP; ++i) {
+		if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
+			top_val = i;
+			break;
+		}
+	}
+
+	/*
+	 * Set the new value in the watchdog.  Some versions of dw_wdt
+	 * have have TOPINIT in the TIMEOUT_RANGE register (as per
+	 * CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1).  On those we
+	 * effectively get a pat of the watchdog right here.
+	 */
+	writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
+	       dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
+
+	dw_wdt_start(wdd);
+
+	return 0;
+}
+
+static void __noreturn dw_wdt_restart_handle(struct restart_handler *rst)
+{
+	struct dw_wdt *dw_wdt;
+
+	dw_wdt = container_of(rst, struct dw_wdt, restart);
+
+	dw_wdt->wdd.set_timeout(&dw_wdt->wdd, -1);
+
+	mdelay(1000);
+
+	hang();
+}
+
+static int dw_wdt_drv_probe(struct device_d *dev)
+{
+	struct watchdog *wdd;
+	struct dw_wdt *dw_wdt;
+	struct resource *mem;
+	int ret;
+
+	dw_wdt = xzalloc(sizeof(*dw_wdt));
+
+	mem = dev_request_mem_resource(dev, 0);
+	dw_wdt->regs = IOMEM(mem->start);
+	if (IS_ERR(dw_wdt->regs))
+		return PTR_ERR(dw_wdt->regs);
+
+	dw_wdt->clk = clk_get(dev, NULL);
+	if (IS_ERR(dw_wdt->clk))
+		return PTR_ERR(dw_wdt->clk);
+
+	ret = clk_enable(dw_wdt->clk);
+	if (ret)
+		return ret;
+
+	dw_wdt->rst = reset_control_get(dev, "dw-wdt");
+	if (IS_ERR(dw_wdt->rst))
+		dev_warn(dev, "No reset lines. Will not be able to stop once started.\n");
+
+	wdd = &dw_wdt->wdd;
+	wdd->name = "dw_wdt";
+	wdd->dev = dev;
+	wdd->set_timeout = dw_wdt_set_timeout;
+
+	ret = watchdog_register(wdd);
+	if (ret)
+		goto out_disable_clk;
+
+	dw_wdt->restart.name = "dw_wdt";
+	dw_wdt->restart.restart = dw_wdt_restart_handle;
+
+	ret = restart_handler_register(&dw_wdt->restart);
+	if (ret)
+		dev_warn(dev, "cannot register restart handler\n");
+
+	if (!IS_ERR(dw_wdt->rst))
+		reset_control_deassert(dw_wdt->rst);
+
+	return 0;
+
+out_disable_clk:
+	clk_disable(dw_wdt->clk);
+	return ret;
+}
+
+static struct of_device_id dw_wdt_of_match[] = {
+	{ .compatible = "snps,dw-wdt", },
+	{ /* sentinel */ }
+};
+
+static struct driver_d dw_wdt_driver = {
+	.probe		= dw_wdt_drv_probe,
+	.of_compatible	= DRV_OF_COMPAT(dw_wdt_of_match),
+};
+device_platform_driver(dw_wdt_driver);
-- 
2.9.3



From s.hauer at pengutronix.de  Fri Oct 14 02:52:19 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 14 Oct 2016 11:52:19 +0200
Subject: Compressed DTB - builtin DTB
In-Reply-To: <03214122-b05b-fc45-1e32-ad2832ca36d3@systec-electronic.com>
References: <03214122-b05b-fc45-1e32-ad2832ca36d3@systec-electronic.com>
Message-ID: <20161014095219.6qsyhajp2bffsc64@pengutronix.de>

Hi Daniel,

On Thu, Oct 13, 2016 at 12:32:31PM +0200, Daniel Kr?ger wrote:
> Hello,
> 
> I'm currently porting our board support to device tree. Currently, I don't
> use multi-PBL, but include the device tree via CONFIG_BUILTIN_DTB. This
> works, but the DTB seems to be included twice in the image: once as plain
> DTB and once as compressed DTB. I think this isn't intended this way.
> 
> Extract from System.map:
> 87e82b80 R __dtb_imx35_systec_hmi_start
> 87e82b80 R __dtb_start
> 87e8501c R __dtb_imx35_systec_hmi_end
> 87e85020 R __dtb_z_imx35_systec_hmi_start
> 87e85ad0 R __dtb_z_imx35_systec_hmi_end
> 87e85b00 B __bss_start
> 87e85b00 R __dtb_end

No, indeed that's not intended. Could you test the appended patch? It
should solve this.

> 
> Just using the compressed DTB would be really good. Because it makes the
> image much smaller. However, how should that be done? The extract code might
> be simple. But I don't have an idea how to let the linker select the right
> version.

If you are using uncompressed binary you should switch to PBL support to
get a compressed binary. Then, if you are using PBL the dtb is
compressed already as part of the whole binary.

Sascha

------------------------------------8<--------------------------------

>From c24a6bd6eabc3f73375080e6fc500aa955795a27 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer at pengutronix.de>
Date: Fri, 14 Oct 2016 11:42:00 +0200
Subject: [PATCH] gen-dtb-s: Put compressed dtb in different section

For builtin dtbs all compiled dtbs matching section .dtb.rodata.*
are collected in a single section. Since every dtb is compiled as
uncompressed and also as compressed binary each dtb ends up twice
in the section. Let's put the compressed variants in .dtbz.rodata.*
sections rather than .dtb.rodata.*.z so they end up in the binary
only once.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 scripts/gen-dtb-s | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/gen-dtb-s b/scripts/gen-dtb-s
index 40c6085..4215461 100755
--- a/scripts/gen-dtb-s
+++ b/scripts/gen-dtb-s
@@ -58,7 +58,7 @@ fi
 compressed=$(stat $dtb.lzo -c "%s")
 uncompressed=$(stat $dtb -c "%s")
 
-echo ".section .dtb.rodata.${name}.z,\"a\""
+echo ".section .dtbz.rodata.${name},\"a\""
 echo ".balign STRUCT_ALIGNMENT"
 echo ".global __dtb_z_${name}_start"
 echo "__dtb_z_${name}_start:"
-- 
2.9.3

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct 14 02:58:24 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 14 Oct 2016 11:58:24 +0200
Subject: How to configure and enable the barebox state?
In-Reply-To: <F6D4D53A3E6A8043A8517794EE9C52320CE989@HRSRV03.haslerrail.net>
References: <F6D4D53A3E6A8043A8517794EE9C52320CE989@HRSRV03.haslerrail.net>
Message-ID: <20161014095824.rlkpofx5bsvxfi3f@pengutronix.de>

Hi Alain,

On Thu, Oct 13, 2016 at 01:38:36PM +0000, Trostel Alain wrote:
> Hi,
> 
> I would like to configure and enable the barebox state. My assumption is
> that I need to change the following device tree for my Phytec AM335x
> SOM:
> 
> arch/arm/dts/am335x-phytec-phycore-som.dts
> 
> But from the documentation
> (http://www.barebox.org/doc/latest/devicetree/bindings/barebox/barebox,state.html)
> it is not clear to me where exactly I need to add the variable node
> example.

You can put it anywhere in the device tree that is parsed by the device
parser. I would recommend putting it directly in the root node.

> Furthermore, I have check that the 'CONFIG_OFDEVICE' is
> enabled.
> So, where is the correct place to add the variable node configuration
> and what needs to be enabled in barebox?

for using the state framework you'll need:

CONFIG_STATE
CONFIG_STATE_DRV
CONFIG_CMD_STATE

If you want to use the bootchooser ontop of state you'll also need:

CONFIG_BOOTCHOOSER
CONFIG_CMD_BOOTCHOOSER

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From info at kreditzentrale.com  Sun Oct 16 07:55:09 2016
From: info at kreditzentrale.com (Marcel Ziegler)
Date: Sun, 16 Oct 2016 16:55:09 +0200
Subject: E-Book zum Thema Kredit
Message-ID: <20161016145510.097FF1A00AF@relay648.mysmtp.mobi>

Hallo,

unter http://www.kreditzentrale.com/thema/kredit-angebote biete ich ein kostenloses E-Book zum Thema Kredit mit umfassenden Informationen zum Download an. Bei den Recherchen f?r das E-Book bin ich unter anderem auf Ihre Webseite gesto?en.

W?ren Sie bereit, meine Webseite bzw. das E-Book von Ihrer Webseite aus zu verlinken (z. B. von http://lists.infradead.org/pipermail/linux-mtd/2014-November/056230.html)?

(Das E-Book kann ?brigens ohne Anmeldung oder ?hnliche H?rden einfach im PDF-Format heruntergeladen werden, ohne weitere Verpflichtungen. Das wird auch dauerhaft so bleiben.)

Falls das f?r Sie interessant ist, kann ich Ihnen gerne einen (eigens geschriebenen) Artikel zum Thema zusenden, den Sie auf Ihrer Webseite ver?ffentlichen k?nnen.

Wenn Sie m?chten, kann ich im Gegenzug Ihre Webseite von einer meiner anderen Webseiten verlinken.


Freundliche Gr??e,
Marcel Ziegler


From javier.fileiv at gmail.com  Sun Oct 16 14:06:15 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Sun, 16 Oct 2016 23:06:15 +0200
Subject: Loading kernel issues
Message-ID: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>

Hi everyone, I've just flashed barebox on my Mini2440. I have 2
questions/issues now

1) When trying to load the kernel from TFTP, everything is ok but when
it's trying to mount the rootfs something is not working, even though
I set the rootdelay param to 5 secs.

2) I tried also the boot from nand and is working just fine, but there
no is auto boot when reseting the board... it just give me the barebox
prompt each time, and if i run from there boot nand it works OK, but
no automaGically. :)

Any suggestions? Thank you very much


LOG FOR TFTP BOOT:

mini2440:/ boot tftp
warning: No MAC address set. Using random address A2:50:1F:24:DF:AB
phy0: Link is up - 100/Full
T DHCP client bound to address 192.168.0.15
TFTP from server 192.168.0.10 ('uImage-mini2440' -> '/dev/ram0.kernel')
#################################################################
#################################################################
#################################################################
#################################################################
#################################################################
################################################
booting kernel of type uimage from /dev/ram0.kernel
   Verifying Checksum ... OK
   Image Name:   Linux-3.16.7-ptx-master
   Created:      2016-10-13  20:23:14 UTC
   Image Type:   <NULL> <NULL> <NULL> (<NULL>)
   Data Size:    1910288 Bytes =  1.8 MB
   Load Address: 30008000
   Entry Point:  30008000
OK
commandline: console=ttySAC0,115200 mini2440=0tbc rootdelay=5 ip=dhcp
root=/dev/nfs nfsroot=/path/to/nfs/root,v3,tcp noinitrd
mtdparts=nand:512k(barebox),384k(bareboxenv),2048k(kernel),-(root)
arch_number: 1999

Starting kernel ...

Booting Linux on physical CPU 0x0
Initializing cgroup subsys cpu
Linux version 3.16.7-ptx-master (fixp at fixp-XPS13-9333) (gcc version
4.9.2 (OSELAS.Toolchain-2014.12.0) ) #1 PREEMPT Thu Oct 13 21:51:02
CEST 2016
CPU: ARM920T [41129200] revision 0 (ARMv4T), cr=c000717f
CPU: VIVT data cache, VIVT instruction cache
Machine: MINI2440
Memory policy: Data cache writeback
CPU S3C2440A (id 0x32440001)
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 16256
Kernel command line: console=ttySAC0,115200 mini2440=0tbc rootdelay=5
ip=dhcp root=/dev/nfs nfsroot=/path/to/nfs/root,v3,tcp noinitrd
mtdparts=nand:512k(barebox),384k(bareboxenv),2048k(kernel),-(root)
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 60920K/65536K available (3043K kernel code, 174K rwdata, 496K
rodata, 127K init, 140K bss, 4616K reserved)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xffe00000   (2048 kB)
    vmalloc : 0xc4800000 - 0xff000000   ( 936 MB)
    lowmem  : 0xc0000000 - 0xc4000000   (  64 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .text : 0xc0008000 - 0xc037cdcc   (3540 kB)
      .init : 0xc037d000 - 0xc039cff4   ( 128 kB)
      .data : 0xc039e000 - 0xc03c9b80   ( 175 kB)
       .bss : 0xc03c9b8c - 0xc03ecc48   ( 141 kB)
SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Preemptible hierarchical RCU implementation.
Dump stacks of tasks blocking RCU-preempt GP.
NR_IRQS:103
S3C2440: IRQ Support
irq: clearing pending status 00000080
irq: clearing pending status 00000003
irq: clearing pending status 00000002
sched_clock: 16 bits at 1012kHz, resolution 987ns, wraps every 64725925ns
Calibrating delay loop... 201.52 BogoMIPS (lpj=503808)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x302ff560 - 0x302ff59c
devtmpfs: initialized
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor ladder
cpuidle: using governor menu
MINI2440: Option string mini2440=0tbc
MINI2440: LCD
 [0:240x320] 1:800x480
 2:1024x768 3:240x320
 4:640x480 5:240x320
 6:320x240 7:480x272

S3C2440: Initialising architecture
S3C24XX DMA Driver, Copyright 2003-2006 Simtec Electronics
DMA channel 0 at c4846000, irq 33
DMA channel 1 at c4846040, irq 34
DMA channel 2 at c4846080, irq 35
DMA channel 3 at c48460c0, irq 36
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
s3c-i2c s3c2440-i2c.0: slave address 0x10
s3c-i2c s3c2440-i2c.0: bus frequency set to 98 KHz
s3c-i2c s3c2440-i2c.0: i2c-0: S3C I2C adapter
S3C24XX CPU Frequency driver, s3c244x cpu support
Advanced Linux Sound Architecture Driver Initialized.
Switched to clocksource samsung_clocksource_timer
NET: Registered protocol family 2
TCP established hash table entries: 1024 (order: 0, 4096 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP: reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
s3c-adc s3c24xx-adc: attached adc driver
futex hash table entries: 256 (order: -1, 3072 bytes)
jffs2: version 2.2. (NAND) ? 2001-2006 Red Hat, Inc.
msgmni has been set to 118
io scheduler noop registered
io scheduler cfq registered (default)
s3c2410-lcd s3c2410-lcd: fb0: s3c2410fb frame buffer device
s3c2440-uart.0: ttySAC0 at MMIO 0x50000000 (irq = 74, base_baud = 0)
is a S3C2440
console [ttySAC0] enabled
s3c2440-uart.1: ttySAC1 at MMIO 0x50004000 (irq = 77, base_baud = 0)
is a S3C2440
s3c2440-uart.2: ttySAC2 at MMIO 0x50008000 (irq = 80, base_baud = 0)
is a S3C2440
at24 0-0050: 1024 byte 24c08 EEPROM, writable, 16 bytes/write
s3c24xx-nand s3c2440-nand: Tacls=1, 9ns Twrph0=3 29ns, Twrph1=2 19ns
s3c24xx-nand s3c2440-nand: NAND hardware ECC
nand: device found, Manufacturer ID: 0xec, Chip ID: 0xd3
nand: Samsung NAND 1GiB 3,3V 8-bit
nand: 1024MiB, SLC, page size: 2048, OOB size: 64
Bad block table found at page 524224, version 0x01
Bad block table found at page 524160, version 0x01
nand_read_bbt: bad block at 0x0000255a0000
4 cmdlinepart partitions found on MTD device nand
Creating 4 MTD partitions on "nand":
0x000000000000-0x000000080000 : "barebox"
0x000000080000-0x0000000e0000 : "bareboxenv"
0x0000000e0000-0x0000002e0000 : "kernel"
0x0000002e0000-0x000040000000 : "root"
s3c24xx-nand s3c2440-nand: clock idle support enabled
eth0: dm9000e at c48e2300,c48e4304 IRQ 55 MAC: a2:50:1f:24:df:ab (chip)
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ohci-s3c2410: OHCI S3C2410 driver
s3c2410-ohci s3c2410-ohci: OHCI Host Controller
s3c2410-ohci s3c2410-ohci: new USB bus registered, assigned bus number 1
s3c2410-ohci s3c2410-ohci: irq 42, io mem 0x49000000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
usbcore: registered new interface driver usb-storage
samsung-ts s3c2440-ts: driver attached, registering input device
input: S3C24XX TouchScreen as /devices/virtual/input/input0
input: pwm-beeper as /devices/platform/samsung-pwm/pwm-beeper/input/input1
s3c-rtc s3c2410-rtc: rtc disabled, re-enabling
s3c-rtc s3c2410-rtc: rtc core: registered s3c as rtc0
s3c2410-wdt s3c2410-wdt: watchdog inactive, reset disabled, irq disabled
s3c-sdi s3c2440-sdi: running at 0kHz (requested: 0kHz).
s3c-sdi s3c2440-sdi: running at 398kHz (requested: 400kHz).
s3c-sdi s3c2440-sdi: mmc0 - using pio, hw SDIO IRQ
s3c-sdi s3c2440-sdi: powered down.
S3C24XX_UDA134X SoC Audio driver
soc-audio soc-audio: ASoC: machine S3C24XX_UDA134X should use
snd_soc_register_card()
UDA134X SoC Audio Codec
soc-audio soc-audio: uda134x-hifi <-> s3c24xx-iis mapping ok
TCP: cubic registered
NET: Registered protocol family 17
input: gpio-keys as /devices/platform/gpio-keys/input/input2
s3c-rtc s3c2410-rtc: setting system clock to 2000-01-01 00:30:21 UTC (946686621)
dm9000 dm9000 eth0: link up, 100Mbps, full-duplex, lpa 0x41E1
Sending DHCP requests ., OK
IP-Config: Got DHCP answer from 192.168.0.254, my address is 192.168.0.15
IP-Config: Complete:
     device=eth0, hwaddr=a2:50:1f:24:df:ab, ipaddr=192.168.0.15,
mask=255.255.255.0, gw=192.168.0.254
     host=192.168.0.15, domain=, nis-domain=(none)
     bootserver=0.0.0.0, rootserver=0.0.0.0, rootpath=
     nameserver0=212.27.40.240, nameserver1=212.27.40.241
ALSA device list:
  #0: S3C24XX_UDA134X
Waiting 5 sec before mounting root device...
VFS: Unable to mount root fs via NFS, trying floppy.
VFS: Cannot open root device "nfs" or unknown-block(2,0): error -6
Please append a correct "root=" boot option; here are the available partitions:
1f00             512 mtdblock0  (driver?)
1f01             384 mtdblock1  (driver?)
1f02            2048 mtdblock2  (driver?)
1f03         1045632 mtdblock3  (driver?)
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0)
CPU: 0 PID: 1 Comm: swapper Not tainted 3.16.7-ptx-master #1
Backtrace:
Function entered at [<c000c288>] from [<c000c538>]
 r6:c3fedcc0 r5:c03ca4a8 r4:fffffffa r3:00204140
Function entered at [<c000c520>] from [<c02fbc20>]
Function entered at [<c02fbc00>] from [<c02f9fb8>]
Function entered at [<c02f9f24>] from [<c037e118>]
 r3:60000013 r2:00000000 r1:c3833ec0 r0:c0327087
 r7:c0327123
Function entered at [<c037df14>] from [<c037e244>]
 r10:00000000 r9:c03c9ba0 r8:c03c9ba0 r7:00000000 r6:c03c9bc8 r5:c03a7d68
 r4:00200000
Function entered at [<c037e15c>] from [<c037e390>]
 r7:c039cff0 r6:c039753c r5:c0397560 r4:c03c9bc8
Function entered at [<c037e26c>] from [<c037dccc>]
 r5:00000061 r4:00000008
Function entered at [<c037db58>] from [<c02f9000>]
 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c02f8ff0 r4:00000000
Function entered at [<c02f8ff0>] from [<c0009330>]
 r4:00000000 r3:c3832000
---[ end Kernel panic - not syncing: VFS: Unable to mount root fs on
unknown-block(2,0)


From s.hauer at pengutronix.de  Sun Oct 16 23:24:52 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 17 Oct 2016 08:24:52 +0200
Subject: [PATCH] ARM: i.MX Freescale Sabrelite: Use correct device tree for dl
 variant
Message-ID: <20161017062452.14988-1-s.hauer@pengutronix.de>

The i.MX6dl variant also uses the i.MX6q device tree which is wrong.
Use the correct one.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
index 3b51e01..c2d7a3c 100644
--- a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
+++ b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
@@ -53,9 +53,9 @@ static noinline void imx6dl_sabrelite_start(void)
 	imx6_uart_setup(uart);
 	pbl_set_putc(imx_uart_putc, uart);
 
-	pr_debug("Freescale i.MX6q SabreLite\n");
+	pr_debug("Freescale i.MX6dl SabreLite\n");
 
-	imx6q_barebox_entry(__dtb_imx6q_sabrelite_start);
+	imx6q_barebox_entry(__dtb_imx6dl_sabrelite_start);
 }
 
 ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
-- 
2.9.3



From s.trumtrar at pengutronix.de  Mon Oct 17 00:48:20 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Mon, 17 Oct 2016 09:48:20 +0200
Subject: [PATCH v2 2/3] watchdog: add designware driver
In-Reply-To: <20161014092715.4257-2-s.trumtrar@pengutronix.de>
References: <20161014092715.4257-1-s.trumtrar@pengutronix.de>
 <20161014092715.4257-2-s.trumtrar@pengutronix.de>
Message-ID: <20161017074820.225nlw6c2knd4j7r@pengutronix.de>

On Fri, Oct 14, 2016 at 11:27:14AM +0200, Steffen Trumtrar wrote:
> Port the linux v4.8-rc1 Synopsys DesignWare watchdog driver to barebox.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> ---
> Changes since v1:
>   - change usages of pr_warn in favor of dev_warn
> 
>  drivers/watchdog/Kconfig  |   6 ++
>  drivers/watchdog/Makefile |   1 +
>  drivers/watchdog/dw_wdt.c | 193 ++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 200 insertions(+)
>  create mode 100644 drivers/watchdog/dw_wdt.c
> 

(...)

> +struct dw_wdt {
> +	void __iomem		*regs;
> +	struct clk		*clk;
> +	struct restart_handler	restart;
> +	struct watchdog		wdd;
> +	struct reset_control	*rst;
> +};
> +

(...)

> +static int dw_wdt_stop(struct watchdog *wdd)
> +{
> +	struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
> +
> +	if (IS_ERR(dw_wdt->rst)) {
> +		dev_warn(dw_wdt->dev, "No reset line. Will not stop.\n");
                         ^^^^^^^^^^^

Meh, I sent the wrong version :-(
Let's try again.

Regards,
Steffen

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.trumtrar at pengutronix.de  Mon Oct 17 00:50:52 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Mon, 17 Oct 2016 09:50:52 +0200
Subject: [PATCH v3 3/3] ARM: socfpga: dtsi: add dw-wdt reset lines
In-Reply-To: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
References: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
Message-ID: <20161017075052.30802-3-s.trumtrar@pengutronix.de>

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 arch/arm/dts/socfpga.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index d16758fdab46..66d7f21dc6a3 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -49,3 +49,13 @@
 &f2s_sdram_ref_clk {
 	clock-frequency = <0>;
 };
+
+&watchdog0 {
+	resets = <&rst L4WD0_RESET>;
+	reset-names = "dw-wdt";
+};
+
+&watchdog1 {
+	resets = <&rst L4WD1_RESET>;
+	reset-names = "dw-wdt";
+};
-- 
2.9.3



From s.trumtrar at pengutronix.de  Mon Oct 17 00:50:50 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Mon, 17 Oct 2016 09:50:50 +0200
Subject: [PATCH v3 1/3] reset: import socfpga-reset driver from linux
Message-ID: <20161017075052.30802-1-s.trumtrar@pengutronix.de>

Port the linux v4.8-rc1 reset-socfpga driver to barebox.

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-socfpga.c | 124 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+)
 create mode 100644 drivers/reset/reset-socfpga.c

diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 1e2d83f2b995..52b10cd48055 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
+obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
new file mode 100644
index 000000000000..9214197e627d
--- /dev/null
+++ b/drivers/reset/reset-socfpga.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright 2014 Steffen Trumtrar <s.trumtrar at pengutronix.de>
+ *
+ * based on
+ * Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard at free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <linux/err.h>
+#include <linux/reset-controller.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+#define NR_BANKS		4
+
+struct socfpga_reset_data {
+	spinlock_t			lock;
+	void __iomem			*membase;
+	u32				modrst_offset;
+	struct reset_controller_dev	rcdev;
+};
+
+static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
+				unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS));
+	writel(reg | BIT(offset), data->membase + data->modrst_offset +
+				 (bank * NR_BANKS));
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
+				  unsigned long id)
+{
+	struct socfpga_reset_data *data = container_of(rcdev,
+						     struct socfpga_reset_data,
+						     rcdev);
+
+	int bank = id / BITS_PER_LONG;
+	int offset = id % BITS_PER_LONG;
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&data->lock, flags);
+
+	reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS));
+	writel(reg & ~BIT(offset), data->membase + data->modrst_offset +
+				  (bank * NR_BANKS));
+
+	spin_unlock_irqrestore(&data->lock, flags);
+
+	return 0;
+}
+
+static struct reset_control_ops socfpga_reset_ops = {
+	.assert		= socfpga_reset_assert,
+	.deassert	= socfpga_reset_deassert,
+};
+
+static int socfpga_reset_probe(struct device_d *dev)
+{
+	struct socfpga_reset_data *data;
+	struct resource *res;
+	struct device_node *np = dev->device_node;
+
+	data = xzalloc(sizeof(*data));
+
+	res = dev_request_mem_resource(dev, 0);
+	data->membase = IOMEM(res->start);
+	if (IS_ERR(data->membase))
+		return PTR_ERR(data->membase);
+
+	if (of_property_read_u32(np, "altr,modrst-offset", &data->modrst_offset)) {
+		dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n");
+		data->modrst_offset = 0x10;
+	}
+
+	spin_lock_init(&data->lock);
+
+	data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG;
+	data->rcdev.ops = &socfpga_reset_ops;
+	data->rcdev.of_node = np;
+
+	return reset_controller_register(&data->rcdev);
+}
+
+static const struct of_device_id socfpga_reset_dt_ids[] = {
+	{ .compatible = "altr,rst-mgr", },
+	{ /* sentinel */ },
+};
+
+static struct driver_d socfpga_reset_driver = {
+	.probe	= socfpga_reset_probe,
+	.of_compatible	= DRV_OF_COMPAT(socfpga_reset_dt_ids),
+};
+
+static int socfpga_reset_init(void)
+{
+	return platform_driver_register(&socfpga_reset_driver);
+}
+postcore_initcall(socfpga_reset_init);
-- 
2.9.3



From s.trumtrar at pengutronix.de  Mon Oct 17 00:50:51 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Mon, 17 Oct 2016 09:50:51 +0200
Subject: [PATCH v3 2/3] watchdog: add designware driver
In-Reply-To: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
References: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
Message-ID: <20161017075052.30802-2-s.trumtrar@pengutronix.de>

Port the linux v4.8-rc1 Synopsys DesignWare watchdog driver to barebox.

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 drivers/watchdog/Kconfig  |   6 ++
 drivers/watchdog/Makefile |   1 +
 drivers/watchdog/dw_wdt.c | 193 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 200 insertions(+)
 create mode 100644 drivers/watchdog/dw_wdt.c

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 60a56bf4b030..63fb1a8c5701 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -16,6 +16,12 @@ config WATCHDOG_DAVINCI
 	help
 	  Add support for watchdog on the TI Davinci SoC.
 
+config WATCHDOG_DW
+	bool "Synopsys DesignWare watchdog"
+	select RESET_CONTROLLER
+	help
+	  Add support for the Synopsys DesignWare watchdog timer.
+
 config WATCHDOG_MXS28
 	bool "i.MX28"
 	depends on ARCH_IMX28
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index e3afe1c27efb..5fca4c368c40 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -2,5 +2,6 @@ obj-$(CONFIG_WATCHDOG) += wd_core.o
 obj-$(CONFIG_WATCHDOG_DAVINCI) += davinci_wdt.o
 obj-$(CONFIG_WATCHDOG_OMAP) += omap_wdt.o
 obj-$(CONFIG_WATCHDOG_MXS28) += im28wd.o
+obj-$(CONFIG_WATCHDOG_DW) += dw_wdt.o
 obj-$(CONFIG_WATCHDOG_JZ4740) += jz4740.o
 obj-$(CONFIG_WATCHDOG_IMX_RESET_SOURCE) += imxwd.o
diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
new file mode 100644
index 000000000000..fa2752896c2f
--- /dev/null
+++ b/drivers/watchdog/dw_wdt.c
@@ -0,0 +1,193 @@
+/*
+ * Copyright 2010-2011 Picochip Ltd., Jamie Iles
+ * http://www.picochip.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * This file implements a driver for the Synopsys DesignWare watchdog device
+ * in the many subsystems. The watchdog has 16 different timeout periods
+ * and these are a function of the input clock frequency.
+ *
+ * The DesignWare watchdog cannot be stopped once it has been started so we
+ * do not implement a stop function. The watchdog core will continue to send
+ * heartbeat requests after the watchdog device has been closed.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <of.h>
+#include <restart.h>
+#include <watchdog.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/reset.h>
+
+#define WDOG_CONTROL_REG_OFFSET		    0x00
+#define WDOG_CONTROL_REG_WDT_EN_MASK	    0x01
+#define WDOG_TIMEOUT_RANGE_REG_OFFSET	    0x04
+#define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT    4
+#define WDOG_CURRENT_COUNT_REG_OFFSET	    0x08
+#define WDOG_COUNTER_RESTART_REG_OFFSET     0x0c
+#define WDOG_COUNTER_RESTART_KICK_VALUE	    0x76
+
+/* The maximum TOP (timeout period) value that can be set in the watchdog. */
+#define DW_WDT_MAX_TOP		15
+
+#define DW_WDT_DEFAULT_SECONDS	30
+
+struct dw_wdt {
+	void __iomem		*regs;
+	struct clk		*clk;
+	struct restart_handler	restart;
+	struct watchdog		wdd;
+	struct reset_control	*rst;
+};
+
+#define to_dw_wdt(wdd)	container_of(wdd, struct dw_wdt, wdd)
+
+static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
+{
+	/*
+	 * There are 16 possible timeout values in 0..15 where the number of
+	 * cycles is 2 ^ (16 + i) and the watchdog counts down.
+	 */
+	return (1U << (16 + top)) / clk_get_rate(dw_wdt->clk);
+}
+
+static int dw_wdt_start(struct watchdog *wdd)
+{
+	struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+
+	writel(WDOG_CONTROL_REG_WDT_EN_MASK,
+	       dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
+
+	return 0;
+}
+
+static int dw_wdt_stop(struct watchdog *wdd)
+{
+	struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+
+	if (IS_ERR(dw_wdt->rst)) {
+		dev_warn(dw_wdt->wdd.dev, "No reset line. Will not stop.\n");
+		return PTR_ERR(dw_wdt->rst);
+	}
+
+	reset_control_assert(dw_wdt->rst);
+	reset_control_deassert(dw_wdt->rst);
+
+	return 0;
+}
+
+static int dw_wdt_set_timeout(struct watchdog *wdd, unsigned int top_s)
+{
+	struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+	int i, top_val = DW_WDT_MAX_TOP;
+
+	if (top_s == 0)
+		return dw_wdt_stop(wdd);
+
+	/*
+	 * Iterate over the timeout values until we find the closest match. We
+	 * always look for >=.
+	 */
+	for (i = 0; i <= DW_WDT_MAX_TOP; ++i) {
+		if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
+			top_val = i;
+			break;
+		}
+	}
+
+	/*
+	 * Set the new value in the watchdog.  Some versions of dw_wdt
+	 * have have TOPINIT in the TIMEOUT_RANGE register (as per
+	 * CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1).  On those we
+	 * effectively get a pat of the watchdog right here.
+	 */
+	writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
+	       dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
+
+	dw_wdt_start(wdd);
+
+	return 0;
+}
+
+static void __noreturn dw_wdt_restart_handle(struct restart_handler *rst)
+{
+	struct dw_wdt *dw_wdt;
+
+	dw_wdt = container_of(rst, struct dw_wdt, restart);
+
+	dw_wdt->wdd.set_timeout(&dw_wdt->wdd, -1);
+
+	mdelay(1000);
+
+	hang();
+}
+
+static int dw_wdt_drv_probe(struct device_d *dev)
+{
+	struct watchdog *wdd;
+	struct dw_wdt *dw_wdt;
+	struct resource *mem;
+	int ret;
+
+	dw_wdt = xzalloc(sizeof(*dw_wdt));
+
+	mem = dev_request_mem_resource(dev, 0);
+	dw_wdt->regs = IOMEM(mem->start);
+	if (IS_ERR(dw_wdt->regs))
+		return PTR_ERR(dw_wdt->regs);
+
+	dw_wdt->clk = clk_get(dev, NULL);
+	if (IS_ERR(dw_wdt->clk))
+		return PTR_ERR(dw_wdt->clk);
+
+	ret = clk_enable(dw_wdt->clk);
+	if (ret)
+		return ret;
+
+	dw_wdt->rst = reset_control_get(dev, "dw-wdt");
+	if (IS_ERR(dw_wdt->rst))
+		dev_warn(dev, "No reset lines. Will not be able to stop once started.\n");
+
+	wdd = &dw_wdt->wdd;
+	wdd->name = "dw_wdt";
+	wdd->dev = dev;
+	wdd->set_timeout = dw_wdt_set_timeout;
+
+	ret = watchdog_register(wdd);
+	if (ret)
+		goto out_disable_clk;
+
+	dw_wdt->restart.name = "dw_wdt";
+	dw_wdt->restart.restart = dw_wdt_restart_handle;
+
+	ret = restart_handler_register(&dw_wdt->restart);
+	if (ret)
+		dev_warn(dev, "cannot register restart handler\n");
+
+	if (!IS_ERR(dw_wdt->rst))
+		reset_control_deassert(dw_wdt->rst);
+
+	return 0;
+
+out_disable_clk:
+	clk_disable(dw_wdt->clk);
+	return ret;
+}
+
+static struct of_device_id dw_wdt_of_match[] = {
+	{ .compatible = "snps,dw-wdt", },
+	{ /* sentinel */ }
+};
+
+static struct driver_d dw_wdt_driver = {
+	.probe		= dw_wdt_drv_probe,
+	.of_compatible	= DRV_OF_COMPAT(dw_wdt_of_match),
+};
+device_platform_driver(dw_wdt_driver);
-- 
2.9.3



From antonynpavlov at gmail.com  Mon Oct 17 04:57:58 2016
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Mon, 17 Oct 2016 14:57:58 +0300
Subject: [PATCH] of: fix typos
Message-ID: <20161017115758.7778-1-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 drivers/of/base.c | 2 +-
 drivers/of/fdt.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 1e6c33d..767d4e1 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1631,7 +1631,7 @@ struct device_node *of_get_next_available_child(const struct device_node *node,
 EXPORT_SYMBOL(of_get_next_available_child);
 
 /**
- *	of_get_next_child - Iterate a node childs
+ *	of_get_next_child - Iterate a node children
  *	@node:  parent node
  *	@prev:  previous child of the parent node, or NULL to get first
  *
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index b2253aa..614e136 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -525,7 +525,7 @@ void of_clean_reserve_map(void)
  * fdt_add_reserve_map - Add reserve map entries to a devicetree binary
  * @__fdt: The devicetree blob
  *
- * This adds the reservemap entries previously colllected in
+ * This adds the reservemap entries previously collected in
  * of_add_reserve_entry() to a devicetree binary blob. This also
  * adds the devicetree itself to the reserved list, so after calling
  * this function the tree should not be relocated anymore.
-- 
2.9.3



From m.grzeschik at pengutronix.de  Mon Oct 17 06:29:20 2016
From: m.grzeschik at pengutronix.de (Michael Grzeschik)
Date: Mon, 17 Oct 2016 15:29:20 +0200
Subject: [PATCH 1/4] partitions: add DEVFS_PARTITION_IN_PT flag
In-Reply-To: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
Message-ID: <20161017132923.31834-2-m.grzeschik@pengutronix.de>

This flag is used to represent the current status of the partition. When
it is set, the current partition layout is also available in the
partition table of the device. We use it after the partition table was
parsed.

Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
---
 common/partitions.c | 2 +-
 include/driver.h    | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/common/partitions.c b/common/partitions.c
index 69a2b1f..62ffaef 100644
--- a/common/partitions.c
+++ b/common/partitions.c
@@ -57,7 +57,7 @@ static int register_one_partition(struct block_device *blk,
 	dev_dbg(blk->dev, "Registering partition %s on drive %s\n",
 				partition_name, blk->cdev.name);
 	cdev = devfs_add_partition(blk->cdev.name,
-				start, size, 0, partition_name);
+				start, size, DEVFS_PARTITION_IN_PT, partition_name);
 	if (IS_ERR(cdev)) {
 		ret = PTR_ERR(cdev);
 		goto out;
diff --git a/include/driver.h b/include/driver.h
index 80aa8d8..4ff2f77 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -482,6 +482,7 @@ int cdev_erase(struct cdev *cdev, loff_t count, loff_t offset);
 #define DEVFS_PARTITION_READONLY	(1U << 1)
 #define DEVFS_IS_PARTITION		(1 << 2)
 #define DEVFS_IS_CHARACTER_DEV		(1 << 3)
+#define DEVFS_PARTITION_IN_PT		(1 << 4)
 
 struct cdev *devfs_add_partition(const char *devname, loff_t offset,
 		loff_t size, unsigned int flags, const char *name);
-- 
2.9.3



From m.grzeschik at pengutronix.de  Mon Oct 17 06:29:22 2016
From: m.grzeschik at pengutronix.de (Michael Grzeschik)
Date: Mon, 17 Oct 2016 15:29:22 +0200
Subject: [PATCH 3/4] partitions/dos: add function to write partition table
In-Reply-To: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
Message-ID: <20161017132923.31834-4-m.grzeschik@pengutronix.de>

The function can be used to write an partition layout to the block device
based on its cdev layout. Only cdevs with flag DEVFS_PARTITION_IN_PT set
get written. The function also adds an static offset of 0x200000 to
ensure the mbr and bootloader will not be overwritten.

Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
---
 common/partitions/dos.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++++
 include/disks.h         |  1 +
 2 files changed, 72 insertions(+)

diff --git a/common/partitions/dos.c b/common/partitions/dos.c
index 5f08e25..d7fa538 100644
--- a/common/partitions/dos.c
+++ b/common/partitions/dos.c
@@ -256,6 +256,77 @@ static void dos_partition(void *buf, struct block_device *blk,
 			&dsp->signature, "%08x", dsp);
 }
 
+static inline void hdimage_setup_chs(unsigned int lba, unsigned char *chs)
+{
+	const unsigned int hpc = 255;
+	const unsigned int spt = 63;
+	unsigned int s, c;
+
+	chs[0] = (lba/spt)%hpc;
+	c = (lba/(spt * hpc));
+	s = (lba > 0) ?(lba%spt + 1) : 0;
+	chs[1] = ((c & 0x300) >> 2) | (s & 0xff);
+	chs[2] = (c & 0xff);
+}
+
+int write_dos_partition_table(struct block_device *blk, struct list_head *cdevs)
+{
+	char part_table[6+4*sizeof(struct partition_entry)+2];
+	struct cdev *cdev, *ct;
+	void *buf;
+	int ret;
+	int n = 0;
+	char *ptr;
+
+	/* prepare partition table entry */
+	ptr = part_table;
+	memset(ptr, 0, sizeof(part_table));
+
+	/* skip disk signature */
+	ptr += 6;
+	list_for_each_entry_safe(cdev, ct, cdevs, devices_list) {
+		if ((cdev->flags & DEVFS_IS_PARTITION) &&
+			(cdev->flags & DEVFS_PARTITION_IN_PT)) {
+			struct partition_entry *entry;
+			entry = (struct partition_entry *)
+				(ptr + n * sizeof(struct partition_entry));
+
+			/* add static offset to skip the mbr and bootloader */
+			cdev->offset += 4096 * SECTOR_SIZE;
+
+			entry->type = 0x83;
+			entry->partition_start = cdev->offset / SECTOR_SIZE;
+			entry->partition_size = cdev->size / SECTOR_SIZE;
+
+			hdimage_setup_chs(entry->partition_start,
+						entry->chs_begin);
+			hdimage_setup_chs(entry->partition_start +
+						entry->partition_size - 1,
+						entry->chs_end);
+			n++;
+		}
+		if (n == 4)
+			break;
+	}
+
+	ptr += 4 * sizeof(struct partition_entry);
+	ptr[0] = 0x55;
+	ptr[1] = 0xaa;
+
+	buf = read_mbr(blk);
+	if (!buf)
+		return -EIO;
+
+	/* manipulate block with prepared partition table */
+	memcpy(buf + 440, part_table, sizeof(part_table));
+
+	ret = write_mbr(blk, buf);
+
+	free(buf);
+
+	return ret;
+}
+
 static struct partition_parser dos = {
 	.parse = dos_partition,
 	.type = filetype_mbr,
diff --git a/include/disks.h b/include/disks.h
index 9932750..432fb23 100644
--- a/include/disks.h
+++ b/include/disks.h
@@ -37,5 +37,6 @@ struct partition_entry {
 } __attribute__ ((packed));
 
 extern int parse_partition_table(struct block_device*);
+extern int write_dos_partition_table(struct block_device *blk, struct list_head *cdevs);
 
 #endif /* DISKS_H */
-- 
2.9.3



From m.grzeschik at pengutronix.de  Mon Oct 17 06:29:21 2016
From: m.grzeschik at pengutronix.de (Michael Grzeschik)
Date: Mon, 17 Oct 2016 15:29:21 +0200
Subject: [PATCH 2/4] cmdlinepart: add option to set DEVFS_PARTITION_IN_PT flag
In-Reply-To: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
Message-ID: <20161017132923.31834-3-m.grzeschik@pengutronix.de>

With this option it is possible to flag cdev partitions, which will also
be written to the partition table of its backing device.

Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
---
 include/cmdlinepart.h | 1 +
 lib/cmdlinepart.c     | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/include/cmdlinepart.h b/include/cmdlinepart.h
index bf8cdfa..3363a74 100644
--- a/include/cmdlinepart.h
+++ b/include/cmdlinepart.h
@@ -2,6 +2,7 @@
 #define __CMD_LINE_PART_H
 
 #define CMDLINEPART_ADD_DEVNAME (1 << 0)
+#define CMDLINEPART_ADD_TO_PT (2 << 0)
 
 int cmdlinepart_do_parse_one(const char *devname, const char *partstr,
 				 const char **endp, loff_t *offset,
diff --git a/lib/cmdlinepart.c b/lib/cmdlinepart.c
index d7d4441..8633e82 100644
--- a/lib/cmdlinepart.c
+++ b/lib/cmdlinepart.c
@@ -81,6 +81,9 @@ int cmdlinepart_do_parse_one(const char *devname, const char *partstr,
 		end = (char *)(partstr + 2);
 	}
 
+	if (partition_flags & CMDLINEPART_ADD_TO_PT)
+		flags |= DEVFS_PARTITION_IN_PT;
+
 	if (endp)
 		*endp = end;
 
-- 
2.9.3



From m.grzeschik at pengutronix.de  Mon Oct 17 06:29:19 2016
From: m.grzeschik at pengutronix.de (Michael Grzeschik)
Date: Mon, 17 Oct 2016 15:29:19 +0200
Subject: [PATCH 0/4] Add support to modify mbr partition layout
Message-ID: <20161017132923.31834-1-m.grzeschik@pengutronix.de>

This patchset adds the param dos_partitions to the mci device
node. By setting this param with the standard cmdlinepart notation,
it is possible to rewrite the MBR partition layout on runtime.

Michael Grzeschik (4):
  partitions: add DEVFS_PARTITION_IN_PT flag
  cmdlinepart: add option to set DEVFS_PARTITION_IN_PT flag
  partitions/dos: add function to write partition table
  mci: add MBR write and read function to block devices

 common/partitions.c     |   2 +-
 common/partitions/dos.c |  71 ++++++++++++++++++++++++++++
 drivers/mci/mci-core.c  | 122 ++++++++++++++++++++++++++++++++++++++++++++++++
 include/cmdlinepart.h   |   1 +
 include/disks.h         |   1 +
 include/driver.h        |   1 +
 lib/cmdlinepart.c       |   3 ++
 7 files changed, 200 insertions(+), 1 deletion(-)

-- 
2.9.3



From m.grzeschik at pengutronix.de  Mon Oct 17 06:29:23 2016
From: m.grzeschik at pengutronix.de (Michael Grzeschik)
Date: Mon, 17 Oct 2016 15:29:23 +0200
Subject: [PATCH 4/4] mci: add MBR write and read function to block devices
In-Reply-To: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
Message-ID: <20161017132923.31834-5-m.grzeschik@pengutronix.de>

With this patch it is possible to write an mbr partition table to the
mci block device. By setting the device property "dos_partitions" of the
mmc device node, it is possible to write back the new partition layout
in the common cmdlinepart notation. The property can also be read back.

Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
---
 drivers/mci/mci-core.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 122 insertions(+)

diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 4e176f7..c0013a1 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -33,9 +33,11 @@
 #include <asm-generic/div64.h>
 #include <asm/byteorder.h>
 #include <block.h>
+#include <fcntl.h>
 #include <disks.h>
 #include <of.h>
 #include <linux/err.h>
+#include <cmdlinepart.h>
 
 #define MAX_BUFFER_NUMBER 0xffffffff
 
@@ -1527,6 +1529,122 @@ static void mci_info(struct device_d *dev)
 		extract_mtd_year(mci));
 }
 
+static char *print_size(uint64_t s)
+{
+	if (!(s & ((1 << 20) - 1)))
+		return basprintf("%lldM", s >> 20);
+	if (!(s & ((1 << 10) - 1)))
+		return basprintf("%lldk", s >> 10);
+	return basprintf("0x%lld", s);
+}
+
+static int print_part(char *buf, int bufsize, struct cdev *cdev, int is_last)
+{
+	char *size = print_size(cdev->size);
+	int ret;
+
+	if (!size) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	ret = snprintf(buf, bufsize, "%s(%s)%s", size,
+			cdev->partname,
+			is_last ? "" : ",");
+out:
+	free(size);
+
+	return ret;
+}
+
+static int print_parts(char *buf, int bufsize, struct mci *mci)
+{
+	struct cdev *cdev, *ct;
+	int ret = 0;
+
+	list_for_each_entry_safe(cdev, ct, &mci->dev.cdevs, devices_list) {
+		if ((cdev->flags & DEVFS_IS_PARTITION) &&
+			(cdev->flags & DEVFS_PARTITION_IN_PT)) {
+			int now;
+			int is_last = 0;
+			struct list_head *nh = (cdev)->devices_list.next;
+			struct cdev *next = container_of(nh, typeof(*(cdev)), devices_list);
+
+			if (list_is_last(&cdev->devices_list, &mci->dev.cdevs) ||
+				!(next->flags & DEVFS_PARTITION_IN_PT))
+				is_last = 1;
+
+			now = print_part(buf, bufsize, cdev, is_last);
+			if (now < 0)
+				return now;
+
+			if (buf && bufsize) {
+				buf += now;
+				bufsize -= now;
+			}
+			ret += now;
+		}
+	}
+
+	return ret;
+}
+
+static const char *mci_partition_get(struct device_d *dev, struct param_d *p)
+{
+	struct mci *mci = container_of(dev, struct mci, dev);
+	int len = 0;
+
+	free(p->value);
+
+	len = print_parts(NULL, 0, mci);
+	p->value = xzalloc(len + 1);
+	print_parts(p->value, len + 1, mci);
+
+	return p->value;
+}
+
+#ifdef CONFIG_BLOCK_WRITE
+static int mci_partition_set(struct device_d *dev, struct param_d *p, const char *val)
+{
+	struct mci *mci = container_of(dev, struct mci, dev);
+	struct cdev *cdev, *ct;
+	int ret;
+
+	if (!val)
+		return -EINVAL;
+
+	/* remove all partition cdevs with DEVFS_IS_PARTITION set */
+	list_for_each_entry_safe(cdev, ct, &mci->dev.cdevs, devices_list) {
+		if ((cdev->flags & DEVFS_IS_PARTITION) &&
+			(cdev->flags & DEVFS_PARTITION_IN_PT))
+			ret = devfs_del_partition(cdev->name);
+			if (ret)
+				return ret;
+	}
+
+	/* read back the prepared partition layot from dos_partitions param */
+	ret = cmdlinepart_do_parse(mci->cdevname, val, mci->capacity,
+			CMDLINEPART_ADD_DEVNAME | CMDLINEPART_ADD_TO_PT);
+	if (ret)
+		return ret;
+
+	/* write the MBR partition layout based on cdevs with DEVFS_IS_PARTITION set  */
+	for (int i = 0; i < mci->nr_parts; i++) {
+		struct mci_part *part = &mci->part[i];
+		if (part->area_type == MMC_BLK_DATA_AREA_MAIN) {
+			ret = write_dos_partition_table(&part->blk,
+							&mci->dev.cdevs);
+			if (ret != 0) {
+				dev_warn(&mci->dev, "Could not write partition table\n");
+				return ret;
+			}
+		}
+	}
+
+	return ret;
+}
+#endif
+
 /**
  * Check if the MCI card is already probed
  * @param mci MCI device instance
@@ -1786,6 +1904,10 @@ int mci_register(struct mci_host *host)
 	mci->param_probe = dev_add_param_bool(&mci->dev, "probe",
 			mci_set_probe, NULL, &mci->probe, mci);
 
+#ifdef CONFIG_BLOCK_WRITE
+	dev_add_param(&mci->dev, "dos_partitions", mci_partition_set, mci_partition_get, 0);
+#endif
+
 	if (IS_ERR(mci->param_probe) && PTR_ERR(mci->param_probe) != -ENOSYS) {
 		ret = PTR_ERR(mci->param_probe);
 		dev_dbg(&mci->dev, "Failed to add 'probe' parameter to the MCI device\n");
-- 
2.9.3



From s.hauer at pengutronix.de  Mon Oct 17 22:37:05 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 18 Oct 2016 07:37:05 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
Message-ID: <20161018053705.lajqirng3w6wkb2x@pengutronix.de>

Hi Javier,

On Sun, Oct 16, 2016 at 11:06:15PM +0200, Javier Fileiv wrote:
> Hi everyone, I've just flashed barebox on my Mini2440. I have 2
> questions/issues now
> 
> 1) When trying to load the kernel from TFTP, everything is ok but when
> it's trying to mount the rootfs something is not working, even though
> I set the rootdelay param to 5 secs.
> 
> 2) I tried also the boot from nand and is working just fine, but there
> no is auto boot when reseting the board... it just give me the barebox
> prompt each time, and if i run from there boot nand it works OK, but
> no automaGically. :)
> 
> Any suggestions? Thank you very much
> 
> 
> LOG FOR TFTP BOOT:
> 
> mini2440:/ boot tftp
> warning: No MAC address set. Using random address A2:50:1F:24:DF:AB
> phy0: Link is up - 100/Full
> T DHCP client bound to address 192.168.0.15
> TFTP from server 192.168.0.10 ('uImage-mini2440' -> '/dev/ram0.kernel')
> #################################################################
> #################################################################
> #################################################################
> #################################################################
> #################################################################
> ################################################
> booting kernel of type uimage from /dev/ram0.kernel
>    Verifying Checksum ... OK
>    Image Name:   Linux-3.16.7-ptx-master
>    Created:      2016-10-13  20:23:14 UTC
>    Image Type:   <NULL> <NULL> <NULL> (<NULL>)
>    Data Size:    1910288 Bytes =  1.8 MB
>    Load Address: 30008000
>    Entry Point:  30008000
> OK
> commandline: console=ttySAC0,115200 mini2440=0tbc rootdelay=5 ip=dhcp
> root=/dev/nfs nfsroot=/path/to/nfs/root,v3,tcp noinitrd

You have to replace nfsroot=/path/to/nfs/root with some valid path.
Since your dhcp server does not pass a root server ip you'll have to add
that aswell, so your nfsroot should look like
nfsroot=192.168.x.y:/path/to/nfsroot. Try 'edit /env/config' to edit
the parameter to your needs. Do not forget saveenv afterwards.

To boot from Nand also edit /env/config and adjust the kernel_loc and
rootfs_loc variables.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct 17 22:39:32 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 18 Oct 2016 07:39:32 +0200
Subject: [PATCH v3 1/3] reset: import socfpga-reset driver from linux
In-Reply-To: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
References: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
Message-ID: <20161018053932.kvxoymqmlyttw3df@pengutronix.de>

On Mon, Oct 17, 2016 at 09:50:50AM +0200, Steffen Trumtrar wrote:
> Port the linux v4.8-rc1 reset-socfpga driver to barebox.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> ---
>  drivers/reset/Makefile        |   1 +
>  drivers/reset/reset-socfpga.c | 124 ++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 125 insertions(+)
>  create mode 100644 drivers/reset/reset-socfpga.c

Applied, thanks

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct 17 22:40:05 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 18 Oct 2016 07:40:05 +0200
Subject: [PATCH] of: fix typos
In-Reply-To: <20161017115758.7778-1-antonynpavlov@gmail.com>
References: <20161017115758.7778-1-antonynpavlov@gmail.com>
Message-ID: <20161018054005.5acthynviob6kdj2@pengutronix.de>

On Mon, Oct 17, 2016 at 02:57:58PM +0300, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  drivers/of/base.c | 2 +-
>  drivers/of/fdt.c  | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct 17 23:07:12 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 18 Oct 2016 08:07:12 +0200
Subject: [PATCH 3/4] partitions/dos: add function to write partition table
In-Reply-To: <20161017132923.31834-4-m.grzeschik@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
 <20161017132923.31834-4-m.grzeschik@pengutronix.de>
Message-ID: <20161018060712.kqtkwxx73to6m434@pengutronix.de>

Hi Michael,

On Mon, Oct 17, 2016 at 03:29:22PM +0200, Michael Grzeschik wrote:
> The function can be used to write an partition layout to the block device
> based on its cdev layout. Only cdevs with flag DEVFS_PARTITION_IN_PT set
> get written. The function also adds an static offset of 0x200000 to
> ensure the mbr and bootloader will not be overwritten.
> 
> Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
> ---
>  common/partitions/dos.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++++
>  include/disks.h         |  1 +
>  2 files changed, 72 insertions(+)
> 
> diff --git a/common/partitions/dos.c b/common/partitions/dos.c
> index 5f08e25..d7fa538 100644
> --- a/common/partitions/dos.c
> +++ b/common/partitions/dos.c
> @@ -256,6 +256,77 @@ static void dos_partition(void *buf, struct block_device *blk,
>  			&dsp->signature, "%08x", dsp);
>  }
>  
> +static inline void hdimage_setup_chs(unsigned int lba, unsigned char *chs)
> +{
> +	const unsigned int hpc = 255;
> +	const unsigned int spt = 63;
> +	unsigned int s, c;
> +
> +	chs[0] = (lba/spt)%hpc;

Please run checkpatch over this. There are some stylistic flaws like
missing whitespaces left and right of operators.

> +	c = (lba/(spt * hpc));
> +	s = (lba > 0) ?(lba%spt + 1) : 0;
> +	chs[1] = ((c & 0x300) >> 2) | (s & 0xff);
> +	chs[2] = (c & 0xff);
> +}
> +
> +int write_dos_partition_table(struct block_device *blk, struct list_head *cdevs)
> +{
> +	char part_table[6+4*sizeof(struct partition_entry)+2];
> +	struct cdev *cdev, *ct;
> +	void *buf;
> +	int ret;
> +	int n = 0;
> +	char *ptr;
> +
> +	/* prepare partition table entry */
> +	ptr = part_table;
> +	memset(ptr, 0, sizeof(part_table));
> +
> +	/* skip disk signature */
> +	ptr += 6;

It's even more important to skip this in the output buffer. This code
should not change the disk signature.

> +	list_for_each_entry_safe(cdev, ct, cdevs, devices_list) {

Why _safe? You do not remove entries, do you?

> +		if ((cdev->flags & DEVFS_IS_PARTITION) &&
> +			(cdev->flags & DEVFS_PARTITION_IN_PT)) {

In a multiline if clause the second line should either start directly
under the opening brace or indented with at least two more tabs than the
opening if(), but using the same indention level as the conditional code
makes it hard to read.

> +			struct partition_entry *entry;

Instead of the silent test below, do a:

			if (n == 4) {
				pr_warn("Only 4 partitions written to MBR\n");
				break;
			}

> +			entry = (struct partition_entry *)
> +				(ptr + n * sizeof(struct partition_entry));
> +
> +			/* add static offset to skip the mbr and bootloader */
> +			cdev->offset += 4096 * SECTOR_SIZE;
> +
> +			entry->type = 0x83;
> +			entry->partition_start = cdev->offset / SECTOR_SIZE;
> +			entry->partition_size = cdev->size / SECTOR_SIZE;

We should have a test if offset and/or size exceed the 32bit limit.

> +
> +			hdimage_setup_chs(entry->partition_start,
> +						entry->chs_begin);
> +			hdimage_setup_chs(entry->partition_start +
> +						entry->partition_size - 1,
> +						entry->chs_end);
> +			n++;
> +		}
> +		if (n == 4)
> +			break;
> +	}
> +
> +	ptr += 4 * sizeof(struct partition_entry);
> +	ptr[0] = 0x55;
> +	ptr[1] = 0xaa;
> +
> +	buf = read_mbr(blk);
> +	if (!buf)
> +		return -EIO;

You could move this to the top of the function and directly manipulate
the input buffer.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Oct 17 23:23:22 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 18 Oct 2016 08:23:22 +0200
Subject: [PATCH 4/4] mci: add MBR write and read function to block devices
In-Reply-To: <20161017132923.31834-5-m.grzeschik@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
 <20161017132923.31834-5-m.grzeschik@pengutronix.de>
Message-ID: <20161018062322.wje6gucvkt42v7oa@pengutronix.de>

On Mon, Oct 17, 2016 at 03:29:23PM +0200, Michael Grzeschik wrote:
> With this patch it is possible to write an mbr partition table to the
> mci block device. By setting the device property "dos_partitions" of the
> mmc device node, it is possible to write back the new partition layout
> in the common cmdlinepart notation. The property can also be read back.
> 
> Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
> ---
>  drivers/mci/mci-core.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 122 insertions(+)
> 
> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> index 4e176f7..c0013a1 100644
> --- a/drivers/mci/mci-core.c
> +++ b/drivers/mci/mci-core.c
> @@ -33,9 +33,11 @@
>  #include <asm-generic/div64.h>
>  #include <asm/byteorder.h>
>  #include <block.h>
> +#include <fcntl.h>
>  #include <disks.h>
>  #include <of.h>
>  #include <linux/err.h>
> +#include <cmdlinepart.h>
>  
>  #define MAX_BUFFER_NUMBER 0xffffffff
>  
> @@ -1527,6 +1529,122 @@ static void mci_info(struct device_d *dev)
>  		extract_mtd_year(mci));
>  }
>  
> +static char *print_size(uint64_t s)
> +{
> +	if (!(s & ((1 << 20) - 1)))
> +		return basprintf("%lldM", s >> 20);
> +	if (!(s & ((1 << 10) - 1)))
> +		return basprintf("%lldk", s >> 10);
> +	return basprintf("0x%lld", s);

s/lld/llx/

> +}
> +
> +static int print_part(char *buf, int bufsize, struct cdev *cdev, int is_last)
> +{
> +	char *size = print_size(cdev->size);
> +	int ret;
> +
> +	if (!size) {
> +		ret = -ENOMEM;
> +		goto out;
> +	}
> +
> +	ret = snprintf(buf, bufsize, "%s(%s)%s", size,
> +			cdev->partname,
> +			is_last ? "" : ",");
> +out:
> +	free(size);
> +
> +	return ret;
> +}
> +
> +static int print_parts(char *buf, int bufsize, struct mci *mci)
> +{
> +	struct cdev *cdev, *ct;
> +	int ret = 0;
> +
> +	list_for_each_entry_safe(cdev, ct, &mci->dev.cdevs, devices_list) {

safe_?

> +		if ((cdev->flags & DEVFS_IS_PARTITION) &&
> +			(cdev->flags & DEVFS_PARTITION_IN_PT)) {
> +			int now;
> +			int is_last = 0;
> +			struct list_head *nh = (cdev)->devices_list.next;
> +			struct cdev *next = container_of(nh, typeof(*(cdev)), devices_list);
> +
> +			if (list_is_last(&cdev->devices_list, &mci->dev.cdevs) ||
> +				!(next->flags & DEVFS_PARTITION_IN_PT))
> +				is_last = 1;

Is this test safe? What if the next partition does not have the
DEVFS_PARTITION_IN_PT flag set, but the one after that has? Maybe you
have to count the number of partitions in a first pass.

> +
> +			now = print_part(buf, bufsize, cdev, is_last);
> +			if (now < 0)
> +				return now;
> +
> +			if (buf && bufsize) {
> +				buf += now;
> +				bufsize -= now;
> +			}
> +			ret += now;
> +		}
> +	}
> +
> +	return ret;
> +}
> +
> +static const char *mci_partition_get(struct device_d *dev, struct param_d *p)
> +{
> +	struct mci *mci = container_of(dev, struct mci, dev);
> +	int len = 0;
> +
> +	free(p->value);
> +
> +	len = print_parts(NULL, 0, mci);
> +	p->value = xzalloc(len + 1);
> +	print_parts(p->value, len + 1, mci);
> +
> +	return p->value;
> +}
> +
> +#ifdef CONFIG_BLOCK_WRITE
> +static int mci_partition_set(struct device_d *dev, struct param_d *p, const char *val)
> +{
> +	struct mci *mci = container_of(dev, struct mci, dev);
> +	struct cdev *cdev, *ct;
> +	int ret;
> +
> +	if (!val)
> +		return -EINVAL;
> +
> +	/* remove all partition cdevs with DEVFS_IS_PARTITION set */
> +	list_for_each_entry_safe(cdev, ct, &mci->dev.cdevs, devices_list) {
> +		if ((cdev->flags & DEVFS_IS_PARTITION) &&
> +			(cdev->flags & DEVFS_PARTITION_IN_PT))
> +			ret = devfs_del_partition(cdev->name);
> +			if (ret)
> +				return ret;
> +	}
> +
> +	/* read back the prepared partition layot from dos_partitions param */

s/layot/layout/

> +	ret = cmdlinepart_do_parse(mci->cdevname, val, mci->capacity,
> +			CMDLINEPART_ADD_DEVNAME | CMDLINEPART_ADD_TO_PT);
> +	if (ret)
> +		return ret;
> +
> +	/* write the MBR partition layout based on cdevs with DEVFS_IS_PARTITION set  */
> +	for (int i = 0; i < mci->nr_parts; i++) {
> +		struct mci_part *part = &mci->part[i];
> +		if (part->area_type == MMC_BLK_DATA_AREA_MAIN) {
> +			ret = write_dos_partition_table(&part->blk,
> +							&mci->dev.cdevs);
> +			if (ret != 0) {
> +				dev_warn(&mci->dev, "Could not write partition table\n");
> +				return ret;
> +			}
> +		}
> +	}
> +
> +	return ret;
> +}
> +#endif
> +
>  /**
>   * Check if the MCI card is already probed
>   * @param mci MCI device instance
> @@ -1786,6 +1904,10 @@ int mci_register(struct mci_host *host)
>  	mci->param_probe = dev_add_param_bool(&mci->dev, "probe",
>  			mci_set_probe, NULL, &mci->probe, mci);
>  
> +#ifdef CONFIG_BLOCK_WRITE
> +	dev_add_param(&mci->dev, "dos_partitions", mci_partition_set, mci_partition_get, 0);
> +#endif

Use IS_ENABLED()

Other than that this code should be attached to parse_partition_table()
rather than making this mci specific.
We probably can safely write a dos partition table to an unpartitioned
device, but should refuse to create/manipulate a dos partition table
when a EFI partition table exists.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Oct 18 00:50:05 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 18 Oct 2016 09:50:05 +0200
Subject: [PATCH] ARM: bootm: Fix free_mem calculation when initrd is given
Message-ID: <20161018075005.4536-1-s.hauer@pengutronix.de>

When a initrd is given we calculate the next free memory position
as:
free_mem = PAGE_ALIGN(initrd_end);
This is wrong when initrd_end exactly falls on a page boundary.
In this case PAGE_ALIGN() does nothing and free_mem becomes
initrd_end and the following bootm_load_devicetree() and thus
booting fails with -ENOMEM.

Fix this by correctly advancing to the next free memory position.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/lib/bootm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 56663fe..9f3d950 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -158,7 +158,7 @@ static int __do_bootm_linux(struct image_data *data, unsigned long free_mem, int
 		initrd_start = data->initrd_res->start;
 		initrd_end = data->initrd_res->end;
 		initrd_size = resource_size(data->initrd_res);
-		free_mem = PAGE_ALIGN(initrd_end);
+		free_mem = PAGE_ALIGN(initrd_end + 1);
 	}
 
 	ret = bootm_load_devicetree(data, free_mem);
-- 
2.9.3



From jbe at pengutronix.de  Tue Oct 18 01:17:27 2016
From: jbe at pengutronix.de (Juergen Borleis)
Date: Tue, 18 Oct 2016 10:17:27 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
Message-ID: <201610181017.27843.jbe@pengutronix.de>

Hi Javier,

On Sunday 16 October 2016 23:06:15 Javier Fileiv wrote:
> I've just flashed barebox on my Mini2440. I have 2 questions/issues now
>
> 1) When trying to load the kernel from TFTP, everything is ok but when
> it's trying to mount the rootfs something is not working, even though
> I set the rootdelay param to 5 secs.
>
> 2) I tried also the boot from nand and is working just fine, but there
> no is auto boot when reseting the board... it just give me the barebox
> prompt each time, and if i run from there boot nand it works OK, but
> no automaGically. :)

Did you modify the "/env/config"[1] file to define the default boot source?

Cheers,
Juergen

[1] "kernel_loc" and "rootfs_loc"

-- 
Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| Juergen Borleis ? ? ? ? ? ? |
Industrial Linux Solutions ? ? ? ? ? ? ? ? ? ?| http://www.pengutronix.de/ ?|


From javier.fileiv at gmail.com  Tue Oct 18 01:24:37 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Tue, 18 Oct 2016 10:24:37 +0200
Subject: Loading kernel issues
In-Reply-To: <201610181017.27843.jbe@pengutronix.de>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610181017.27843.jbe@pengutronix.de>
Message-ID: <CABvwO2AvfKwc==BhRfw14CzeX4ALwAFp5Zxn1t0MEj2bsn50zQ@mail.gmail.com>

Yes I did it and the values are ok. When I get home I'll send my config file!

Thanks

2016-10-18 10:17 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
> Hi Javier,
>
> On Sunday 16 October 2016 23:06:15 Javier Fileiv wrote:
>> I've just flashed barebox on my Mini2440. I have 2 questions/issues now
>>
>> 1) When trying to load the kernel from TFTP, everything is ok but when
>> it's trying to mount the rootfs something is not working, even though
>> I set the rootdelay param to 5 secs.
>>
>> 2) I tried also the boot from nand and is working just fine, but there
>> no is auto boot when reseting the board... it just give me the barebox
>> prompt each time, and if i run from there boot nand it works OK, but
>> no automaGically. :)
>
> Did you modify the "/env/config"[1] file to define the default boot source?
>
> Cheers,
> Juergen
>
> [1] "kernel_loc" and "rootfs_loc"
>
> --
> Pengutronix e.K.                              | Juergen Borleis             |
> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From yegorslists at googlemail.com  Tue Oct 18 05:24:03 2016
From: yegorslists at googlemail.com (yegorslists at googlemail.com)
Date: Tue, 18 Oct 2016 14:24:03 +0200
Subject: [PATCH] arm: Baltos: setup MPU PLL to run at 600MHz
Message-ID: <1476793443-27586-1-git-send-email-yegorslists@googlemail.com>

From: Yegor Yefremov <yegorslists at googlemail.com>

Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
---
 arch/arm/boards/vscom-baltos/lowlevel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c
index 8bce91a..87f2a74 100644
--- a/arch/arm/boards/vscom-baltos/lowlevel.c
+++ b/arch/arm/boards/vscom-baltos/lowlevel.c
@@ -93,7 +93,7 @@ static noinline int baltos_sram_init(void)
 	while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
 
 	/* Setup the PLLs and the clocks for the peripherals */
-	am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_400);
+	am33xx_pll_init(MPUPLL_M_600, DDRPLL_M_400);
 	am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data);
 	sdram_size = get_ram_size((void *)0x80000000, (1024 << 20));
 	if (sdram_size == SZ_256M)
-- 
2.1.4



From javier.fileiv at gmail.com  Tue Oct 18 09:56:03 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Tue, 18 Oct 2016 18:56:03 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2AvfKwc==BhRfw14CzeX4ALwAFp5Zxn1t0MEj2bsn50zQ@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610181017.27843.jbe@pengutronix.de>
 <CABvwO2AvfKwc==BhRfw14CzeX4ALwAFp5Zxn1t0MEj2bsn50zQ@mail.gmail.com>
Message-ID: <CABvwO2A6jNWz7_MOcxxAdJh_fAoV06uA9qk28dKZ5icfV07kQg@mail.gmail.com>

Hi all!
Trying to autoboot from nand, I set my /env/config file like that (and
after that a "saveenv"). Although it doesn't work automaGically! :)

What do you think about this guys?
Thanks a lot!
(I'm gonna try the nfs mounting right now!)
mini2440:/ cat env/config
#!/bin/sh

machine=mini2440
user=

# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp

# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
#eth0.netmask=a.b.c.d
#eth0.gateway=a.b.c.d
eth0.serverip=192.168.0.10
#eth0.ethaddr=a:b:b:d:e:f

# autoboot settings
# can be either 'tftp', 'nfs', 'nand' or 'mmc'
kernel_loc=nand
# can be either 'net', 'nand', 'initrd' or 'mmc'
rootfs_loc=nand
# can be either 'jffs2' or 'ubifs' for flash or 'ext3' for mmc
rootfs_type=jffs2

rootfsimage=root-${machine}.${rootfs_type}

# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
#kernelimage_type=zimage
#kernelimage=zImage-${machine}
kernelimage_type=uimage
kernelimage=uImage-$machine
#kernelimage_type=raw
#kernelimage=Image-$machine
#kernelimage_type=raw_lzo
#kernelimage=Image-$machine.lzo

# the name of the barebox image used by the update script
bareboximage=barebox-$machine

# the name of the barebox default environment used by the update script
bareboxenvimage=barebox-environment-$machine

if [ -n $user ]; then
kernelimage="${user}"-"${kernelimage}"
nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
rootfsimage="${user}"-"${rootfsimage}"
else
nfsroot="/path/to/nfs/root"
fi

autoboot_timeout=3

if [ -e /dev/nor0 ]; then
       nor_parts="512k(barebox)"

       # Skip autoboot if not booting from NAND
       autoboot_disable=1
fi

#
# "mini2440" kernel parameter
# 0 .. 9 = screen type
# b = backlight enabled
# t = touch enabled
# c = camera enabled
# Note: can be "mini2440= " if nothing of these components are connected
#
bootargs="console=ttySAC0,115200 mini2440=0tbc rootdelay=5"

# NAND boot settings
# Device name used by the kernel
nand_device="nand"
# partition definition in the NAND
nand_parts="512k(barebox),384k(bareboxenv),2048k(kernel),-(root)"
# rootfs's partition number in the NAND
rootfs_mtdblock_nand=3
# used when manually booting with "boot nand" command
rootfs_mtdblock_type=jffs2

# MMC/SD boot settings
# partition number to read the kernel from
# (starting with # 0, Barebox's counting scheme)
kernel_mmc_part=0
# rootfs's partition number
# (starting with # 1, Kernel's counting scheme)
rootfs_mmc_part=2
# used when manually booting with "boot mmc" command
rootfs_mmc_type=ext2

2016-10-18 10:24 GMT+02:00 Javier Fileiv <javier.fileiv at gmail.com>:
> Yes I did it and the values are ok. When I get home I'll send my config file!
>
> Thanks
>
> 2016-10-18 10:17 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
>> Hi Javier,
>>
>> On Sunday 16 October 2016 23:06:15 Javier Fileiv wrote:
>>> I've just flashed barebox on my Mini2440. I have 2 questions/issues now
>>>
>>> 1) When trying to load the kernel from TFTP, everything is ok but when
>>> it's trying to mount the rootfs something is not working, even though
>>> I set the rootdelay param to 5 secs.
>>>
>>> 2) I tried also the boot from nand and is working just fine, but there
>>> no is auto boot when reseting the board... it just give me the barebox
>>> prompt each time, and if i run from there boot nand it works OK, but
>>> no automaGically. :)
>>
>> Did you modify the "/env/config"[1] file to define the default boot source?
>>
>> Cheers,
>> Juergen
>>
>> [1] "kernel_loc" and "rootfs_loc"
>>
>> --
>> Pengutronix e.K.                              | Juergen Borleis             |
>> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Tue Oct 18 12:47:19 2016
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Tue, 18 Oct 2016 21:47:19 +0200
Subject: [PATCH] pinctrl: mvebu: sync mpp names to Linux 4.9-rc1
Message-ID: <20161018194719.30707-1-u.kleine-koenig@pengutronix.de>

Linux changed several mpp names in commits:

	a526973e0291 (pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio))
	438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description)
	bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins)
	80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions)
	100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions)
	7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins)
	dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins)
	d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins)
	f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins)
	a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins)
	bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet)
	9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming)
	50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0)
	88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function)
	fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function)
	b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions)

Adapt the barebox mvebu drivers accordingly.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
Hello,

this superseeds patch

	pinctrl: mvebu: armada-370 fix gpio name for mpp63

which currently sits in next as 8aed8106c2ec.

Best regards
Uwe

 drivers/pinctrl/mvebu/armada-370.c | 24 +++++-----
 drivers/pinctrl/mvebu/armada-xp.c  | 93 ++++++++++++++++++++------------------
 2 files changed, 60 insertions(+), 57 deletions(-)

diff --git a/drivers/pinctrl/mvebu/armada-370.c b/drivers/pinctrl/mvebu/armada-370.c
index 1c79bd62af92..2fd07a7b8737 100644
--- a/drivers/pinctrl/mvebu/armada-370.c
+++ b/drivers/pinctrl/mvebu/armada-370.c
@@ -50,12 +50,12 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x2, "uart0", "rxd")),
 	MPP_MODE(4, "mpp4", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
-	   MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
+	   MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
 	MPP_MODE(5, "mpp5", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "ge0", "txclko"),
+	   MPP_FUNCTION(0x1, "ge0", "txclkout"),
 	   MPP_FUNCTION(0x2, "uart1", "txd"),
-	   MPP_FUNCTION(0x4, "spi1", "clk"),
+	   MPP_FUNCTION(0x4, "spi1", "sck"),
 	   MPP_FUNCTION(0x5, "audio", "mclk")),
 	MPP_MODE(6, "mpp6", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
@@ -66,7 +66,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	MPP_MODE(7, "mpp7", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
 	   MPP_FUNCTION(0x1, "ge0", "txd1"),
-	   MPP_FUNCTION(0x4, "tdm", "tdx"),
+	   MPP_FUNCTION(0x4, "tdm", "dtx"),
 	   MPP_FUNCTION(0x5, "audio", "lrclk")),
 	MPP_MODE(8, "mpp8", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
@@ -205,11 +205,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x2, "spi0", "cs0")),
 	MPP_MODE(34, "mpp34", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "wen0"),
+	   MPP_FUNCTION(0x1, "dev", "we0"),
 	   MPP_FUNCTION(0x2, "spi0", "mosi")),
 	MPP_MODE(35, "mpp35", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "oen"),
+	   MPP_FUNCTION(0x1, "dev", "oe"),
 	   MPP_FUNCTION(0x2, "spi0", "sck")),
 	MPP_MODE(36, "mpp36", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
@@ -346,13 +346,13 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x1, "dev", "ale1"),
 	   MPP_FUNCTION(0x2, "uart1", "rxd"),
 	   MPP_FUNCTION(0x3, "sata0", "prsnt"),
-	   MPP_FUNCTION(0x4, "pcie", "rst-out"),
+	   MPP_FUNCTION(0x4, "pcie", "rstout"),
 	   MPP_FUNCTION(0x5, "audio", "sdi")),
 	MPP_MODE(61, "mpp61", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "wen1"),
+	   MPP_FUNCTION(0x1, "dev", "we1"),
 	   MPP_FUNCTION(0x2, "uart1", "txd"),
-	   MPP_FUNCTION(0x5, "audio", "rclk")),
+	   MPP_FUNCTION(0x5, "audio", "lrclk")),
 	MPP_MODE(62, "mpp62", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "dev", "a2"),
@@ -362,17 +362,17 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x5, "audio", "mclk"),
 	   MPP_FUNCTION(0x6, "uart0", "cts")),
 	MPP_MODE(63, "mpp63", armada_370_mpp_ctrl,
-	   MPP_FUNCTION(0x0, "gpo", NULL),
+	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "sck"),
 	   MPP_FUNCTION(0x2, "tclk", NULL)),
 	MPP_MODE(64, "mpp64", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "miso"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs1")),
+	   MPP_FUNCTION(0x2, "spi0", "cs1")),
 	MPP_MODE(65, "mpp65", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "mosi"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs2")),
+	   MPP_FUNCTION(0x2, "spi0", "cs2")),
 };
 
 static struct mvebu_pinctrl_soc_info mv88f6710_pinctrl_info = {
diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c
index f1bc8b498aac..b9c2aa47f1e5 100644
--- a/drivers/pinctrl/mvebu/armada-xp.c
+++ b/drivers/pinctrl/mvebu/armada-xp.c
@@ -53,7 +53,7 @@ enum armada_xp_variant {
 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(0, "mpp0", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "ge0", "txclko",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "ge0", "txclkout",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d0",         V_MV78230_PLUS)),
 	MPP_MODE(1, "mpp1", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -102,17 +102,19 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(12, "mpp12", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd4",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "ge1", "clkout",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x2, "ge1", "txclkout",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d12",        V_MV78230_PLUS)),
 	MPP_MODE(13, "mpp13", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd5",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd0",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "mosi",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d13",        V_MV78230_PLUS)),
 	MPP_MODE(14, "mpp14", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd6",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd1",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "sck",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d14",        V_MV78230_PLUS)),
 	MPP_MODE(15, "mpp15", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -123,11 +125,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txclk",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd3",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "cs0",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d16",        V_MV78230_PLUS)),
 	MPP_MODE(17, "mpp17", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "col",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txctl",      V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "miso",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d17",        V_MV78230_PLUS)),
 	MPP_MODE(18, "mpp18", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -151,7 +155,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "rxd5",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "rxd3",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "mem", "bat",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "dram", "bat",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d21",        V_MV78230_PLUS)),
 	MPP_MODE(22, "mpp22", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -168,20 +172,17 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(24, "mpp24", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sata1", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "nf", "bootcs-re",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "hsync",      V_MV78230_PLUS)),
 	MPP_MODE(25, "mpp25", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sata0", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "nf", "bootcs-we",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vsync",      V_MV78230_PLUS)),
 	MPP_MODE(26, "mpp26", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "fsync",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS)),
 	MPP_MODE(27, "mpp27", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ptp", "trig",       V_MV78230_PLUS),
@@ -196,8 +197,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ptp", "clk",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int0",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS)),
 	MPP_MODE(30, "mpp30", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "clk",        V_MV78230_PLUS),
@@ -205,23 +205,23 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(31, "mpp31", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "cmd",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS)),
 	MPP_MODE(32, "mpp32", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d0",         V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS)),
 	MPP_MODE(33, "mpp33", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d1",         V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int4",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS)),
 	MPP_MODE(34, "mpp34", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d2",         V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "sata0", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "dram", "deccerr",   V_MV78230_PLUS)),
 	MPP_MODE(35, "mpp35", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d3",         V_MV78230_PLUS),
@@ -229,74 +229,80 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int6",       V_MV78230_PLUS)),
 	MPP_MODE(36, "mpp36", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "mosi",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "mosi",      V_MV78230_PLUS)),
 	MPP_MODE(37, "mpp37", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "miso",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "miso",      V_MV78230_PLUS)),
 	MPP_MODE(38, "mpp38", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "sck",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "sck",       V_MV78230_PLUS)),
 	MPP_MODE(39, "mpp39", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs0",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs0",       V_MV78230_PLUS)),
 	MPP_MODE(40, "mpp40", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs1",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs1",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart2", "cts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "vdd", "cpu1-pd",    V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync",  V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs1",       V_MV78230_PLUS)),
 	MPP_MODE(41, "mpp41", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs2",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs2",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart2", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync",  V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs2",       V_MV78230_PLUS)),
 	MPP_MODE(42, "mpp42", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "rxd",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart0", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int7",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "tdm-1", "timer",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "tdm", "timer",      V_MV78230_PLUS)),
 	MPP_MODE(43, "mpp43", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "txd",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart0", "rts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs3",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs3",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "pcie", "rstout",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu2-3-pd",  V_MV78460)),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs3",       V_MV78230_PLUS)),
 	MPP_MODE(44, "mpp44", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart3", "rxd",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs4",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs4",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs4",       V_MV78230_PLUS)),
 	MPP_MODE(45, "mpp45", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart3", "txd",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs5",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs5",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs5",       V_MV78230_PLUS)),
 	MPP_MODE(46, "mpp46", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart3", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart1", "rts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs6",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs6",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs6",       V_MV78230_PLUS)),
 	MPP_MODE(47, "mpp47", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart3", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart1", "cts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs7",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs7",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "ref", "clkout",     V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs7",       V_MV78230_PLUS)),
 	MPP_MODE(48, "mpp48", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "tclk", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "clkout",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "nand", "rb",        V_MV78230_PLUS)),
 	MPP_MODE(49, "mpp49", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "dev", "we3",        V_MV78260_PLUS)),
@@ -317,16 +323,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x1, "dev", "ad19",       V_MV78260_PLUS)),
 	MPP_MODE(55, "mpp55", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu0-pd",    V_MV78260_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS)),
 	MPP_MODE(56, "mpp56", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu1-pd",    V_MV78260_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS)),
 	MPP_MODE(57, "mpp57", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu2-3-pd",  V_MV78460)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS)),
 	MPP_MODE(58, "mpp58", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "dev", "ad23",       V_MV78260_PLUS)),
-- 
2.9.3



From s.hauer at pengutronix.de  Tue Oct 18 23:39:20 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 08:39:20 +0200
Subject: [PATCH 1/2] linux/list.h: Add missing include
Message-ID: <20161019063921.13247-1-s.hauer@pengutronix.de>

linux/list.h needs linux/kernel.h for container_of(). Add it.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 include/linux/list.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/list.h b/include/linux/list.h
index bc63ece..af5edc9 100644
--- a/include/linux/list.h
+++ b/include/linux/list.h
@@ -2,6 +2,7 @@
 #define _LINUX_LIST_H
 
 #include <linux/stddef.h> /* for NULL */
+#include <linux/kernel.h>
 
 /*
  * Simple doubly linked list implementation.
-- 
2.9.3



From s.hauer at pengutronix.de  Tue Oct 18 23:39:21 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 08:39:21 +0200
Subject: [PATCH 2/2] complete: Add completion for nv and globalvar commands
In-Reply-To: <20161019063921.13247-1-s.hauer@pengutronix.de>
References: <20161019063921.13247-1-s.hauer@pengutronix.de>
Message-ID: <20161019063921.13247-2-s.hauer@pengutronix.de>

The 'nv' command is often used to create a nv variable
for an existing global variable, so add a command completion
function for this.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/global.c   |  2 ++
 commands/nv.c       |  2 ++
 common/globalvar.c  | 28 ++++++++++++++++++++++++++++
 include/globalvar.h |  2 ++
 4 files changed, 34 insertions(+)

diff --git a/commands/global.c b/commands/global.c
index d21b829..fc68716 100644
--- a/commands/global.c
+++ b/commands/global.c
@@ -22,6 +22,7 @@
 #include <globalvar.h>
 #include <environment.h>
 #include <getopt.h>
+#include <complete.h>
 
 static int do_global(int argc, char *argv[])
 {
@@ -77,4 +78,5 @@ BAREBOX_CMD_START(global)
 	BAREBOX_CMD_OPTS("[-r] VAR[=VALUE] ...")
 	BAREBOX_CMD_GROUP(CMD_GRP_ENV)
 	BAREBOX_CMD_HELP(cmd_global_help)
+	BAREBOX_CMD_COMPLETE(nv_global_complete)
 BAREBOX_CMD_END
diff --git a/commands/nv.c b/commands/nv.c
index a1fb095..37cdb96 100644
--- a/commands/nv.c
+++ b/commands/nv.c
@@ -22,6 +22,7 @@
 #include <globalvar.h>
 #include <environment.h>
 #include <getopt.h>
+#include <complete.h>
 
 static int do_nv(int argc, char *argv[])
 {
@@ -90,4 +91,5 @@ BAREBOX_CMD_START(nv)
 	BAREBOX_CMD_OPTS("[-r] VAR[=VALUE] ...")
 	BAREBOX_CMD_GROUP(CMD_GRP_ENV)
 	BAREBOX_CMD_HELP(cmd_nv_help)
+	BAREBOX_CMD_COMPLETE(nv_global_complete)
 BAREBOX_CMD_END
diff --git a/common/globalvar.c b/common/globalvar.c
index fb69db9..e75cac9 100644
--- a/common/globalvar.c
+++ b/common/globalvar.c
@@ -626,3 +626,31 @@ static void nv_exit(void)
 	nvvar_save();
 }
 predevshutdown_exitcall(nv_exit);
+
+static int nv_global_param_complete(struct device_d *dev, struct string_list *sl,
+				 char *instr, int eval)
+{
+	struct param_d *param;
+	int len;
+
+	len = strlen(instr);
+
+	list_for_each_entry(param, &dev->parameters, list) {
+		if (strncmp(instr, param->name, len))
+			continue;
+
+		string_list_add_asprintf(sl, "%s%c",
+			param->name,
+			eval ? ' ' : '=');
+	}
+
+	return 0;
+}
+
+int nv_global_complete(struct string_list *sl, char *instr)
+{
+	nv_global_param_complete(&global_device, sl, instr, 0);
+	nv_global_param_complete(&nv_device, sl, instr, 0);
+
+	return 0;
+}
diff --git a/include/globalvar.h b/include/globalvar.h
index 2a5d8a1..ecd9f1d 100644
--- a/include/globalvar.h
+++ b/include/globalvar.h
@@ -4,6 +4,7 @@
 #include <param.h>
 #include <driver.h>
 #include <linux/err.h>
+#include <stringlist.h>
 
 extern struct device_d global_device;
 
@@ -123,5 +124,6 @@ static inline void dev_param_init_from_nv(struct device_d *dev, const char *name
 
 void nv_var_set_clean(void);
 int nvvar_save(void);
+int nv_global_complete(struct string_list *sl, char *instr);
 
 #endif /* __GLOBALVAR_H */
-- 
2.9.3



From s.hauer at pengutronix.de  Tue Oct 18 23:54:46 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 08:54:46 +0200
Subject: [PATCH] mtd: Make UBI detection more robust
Message-ID: <20161019065446.3580-1-s.hauer@pengutronix.de>

When we want to detect if a mtd device contains an UBI image then
testing the first block is not enough since it can always happen that
UBI has just erased the block before the power failed during last boot.
Since UBI only ever erases one block at a time and directly writes the
ec header to it afterwards, it shouldn't be necessary to scan the whole
device for UBI data. Scan the first 64 blocks. The first non-empty block
then must contain UBI data, if instead we find foreign data we assume
that no UBI is on that mtd device.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/core.c | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c
index 6d04b88..90b800c 100644
--- a/drivers/mtd/core.c
+++ b/drivers/mtd/core.c
@@ -18,6 +18,7 @@
 #include <common.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/mtd.h>
+#include <mtd/mtd-peb.h>
 #include <mtd/ubi-user.h>
 #include <cmdlinepart.h>
 #include <filetype.h>
@@ -622,9 +623,11 @@ static int mtd_detect(struct device_d *dev)
 	struct mtd_info *mtd = container_of(dev, struct mtd_info, class_dev);
 	int bufsize = 512;
 	void *buf;
-	int ret;
+	int ret = 0, i;
 	enum filetype filetype;
-	size_t retlen;
+	int npebs = mtd_div_by_eb(mtd->size, mtd);
+
+	npebs = max(npebs, 64);
 
 	/*
 	 * Do not try to attach an UBI device if this device has partitions
@@ -636,17 +639,27 @@ static int mtd_detect(struct device_d *dev)
 
 	buf = xmalloc(bufsize);
 
-	ret = mtd_read(mtd, 0, bufsize, &retlen, buf);
-	if (ret)
-		goto out;
+	for (i = 0; i < npebs; i++) {
+		if (mtd_peb_is_bad(mtd, i))
+			continue;
 
-	filetype = file_detect_type(buf, bufsize);
-	if (filetype == filetype_ubi) {
-		ret = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 20);
-		if (ret == -EEXIST)
-			ret = 0;
+		ret = mtd_peb_read(mtd, buf, i, 0, 512);
+		if (ret)
+			continue;
+
+		if (mtd_buf_all_ff(buf, 512))
+			continue;
+
+		filetype = file_detect_type(buf, bufsize);
+		if (filetype == filetype_ubi) {
+			ret = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 20);
+			if (ret == -EEXIST)
+				ret = 0;
+		}
+
+		break;
 	}
-out:
+
 	free(buf);
 
 	return ret;
-- 
2.9.3



From u.kleine-koenig at pengutronix.de  Wed Oct 19 00:30:45 2016
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Wed, 19 Oct 2016 09:30:45 +0200
Subject: [PATCH] spi: mvebu: make more than one device on a bus work
Message-ID: <20161019073045.15747-1-u.kleine-koenig@pengutronix.de>

The mvebu socs support up to 8 chip selects. Make use of them.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 drivers/spi/mvebu_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/mvebu_spi.c b/drivers/spi/mvebu_spi.c
index c679e64c4248..335774d4c609 100644
--- a/drivers/spi/mvebu_spi.c
+++ b/drivers/spi/mvebu_spi.c
@@ -361,7 +361,7 @@ static int mvebu_spi_probe(struct device_d *dev)
 	master->bus_num = dev->id;
 	master->setup = mvebu_spi_setup;
 	master->transfer = mvebu_spi_transfer;
-	master->num_chipselect = 1;
+	master->num_chipselect = 8;
 
 	ret = spi_register_master(master);
 	if (!ret)
-- 
2.9.3



From jbe at pengutronix.de  Wed Oct 19 00:53:40 2016
From: jbe at pengutronix.de (Juergen Borleis)
Date: Wed, 19 Oct 2016 09:53:40 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2A6jNWz7_MOcxxAdJh_fAoV06uA9qk28dKZ5icfV07kQg@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2AvfKwc==BhRfw14CzeX4ALwAFp5Zxn1t0MEj2bsn50zQ@mail.gmail.com>
 <CABvwO2A6jNWz7_MOcxxAdJh_fAoV06uA9qk28dKZ5icfV07kQg@mail.gmail.com>
Message-ID: <201610190953.41081.jbe@pengutronix.de>

Hi Javier,

On Tuesday 18 October 2016 18:56:03 Javier Fileiv wrote:
> Trying to autoboot from nand, I set my /env/config file like that (and
> after that a "saveenv"). Although it doesn't work automaGically! :)

Can you also send the output of barebox from power on up to the point it falls 
into the prompt?

Cheers,
Juergen

-- 
Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| Juergen Borleis ? ? ? ? ? ? |
Industrial Linux Solutions ? ? ? ? ? ? ? ? ? ?| http://www.pengutronix.de/ ?|


From antonynpavlov at gmail.com  Wed Oct 19 01:44:37 2016
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Wed, 19 Oct 2016 11:44:37 +0300
Subject: [PATCH] sandbox: eliminate sdl_init()
Message-ID: <20161019084437.7533-1-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/sandbox/mach-sandbox/include/mach/linux.h | 1 -
 arch/sandbox/os/sdl.c                          | 7 +------
 2 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/arch/sandbox/mach-sandbox/include/mach/linux.h b/arch/sandbox/mach-sandbox/include/mach/linux.h
index 1e53f69..1f11ed4 100644
--- a/arch/sandbox/mach-sandbox/include/mach/linux.h
+++ b/arch/sandbox/mach-sandbox/include/mach/linux.h
@@ -30,7 +30,6 @@ struct linux_console_data {
 
 extern int sdl_xres;
 extern int sdl_yres;
-int sdl_init(void);
 void sdl_close(void);
 int sdl_open(int xres, int yres, int bpp, void* buf);
 void sdl_stop_timer(void);
diff --git a/arch/sandbox/os/sdl.c b/arch/sandbox/os/sdl.c
index ec538e9..9a35279 100644
--- a/arch/sandbox/os/sdl.c
+++ b/arch/sandbox/os/sdl.c
@@ -23,11 +23,6 @@ static SDL_Surface *real_screen;
 static void *buffer = NULL;
 pthread_t th;
 
-int sdl_init(void)
-{
-	return SDL_Init(SDL_INIT_VIDEO | SDL_INIT_NOPARACHUTE);
-}
-
 static void sdl_copy_buffer(SDL_Surface *screen)
 {
 	if (SDL_MUSTLOCK(screen)) {
@@ -84,7 +79,7 @@ int sdl_open(int xres, int yres, int bpp, void* buf)
 {
 	int flags = SDL_HWSURFACE | SDL_ASYNCBLIT | SDL_HWACCEL;
 
-	if (sdl_init() < 0) {
+	if (SDL_Init(SDL_INIT_VIDEO | SDL_INIT_NOPARACHUTE) < 0) {
 		printf("Could not initialize SDL: %s.\n", SDL_GetError());
 		return -1;
 	}
-- 
2.9.3



From s.hauer at pengutronix.de  Wed Oct 19 03:07:58 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 12:07:58 +0200
Subject: [PATCH] arm: Baltos: setup MPU PLL to run at 600MHz
In-Reply-To: <1476793443-27586-1-git-send-email-yegorslists@googlemail.com>
References: <1476793443-27586-1-git-send-email-yegorslists@googlemail.com>
Message-ID: <20161019100758.gkn3lijfpuxqpdes@pengutronix.de>

On Tue, Oct 18, 2016 at 02:24:03PM +0200, yegorslists at googlemail.com wrote:
> From: Yegor Yefremov <yegorslists at googlemail.com>
> 
> Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
> ---
>  arch/arm/boards/vscom-baltos/lowlevel.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c
> index 8bce91a..87f2a74 100644
> --- a/arch/arm/boards/vscom-baltos/lowlevel.c
> +++ b/arch/arm/boards/vscom-baltos/lowlevel.c
> @@ -93,7 +93,7 @@ static noinline int baltos_sram_init(void)
>  	while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
>  
>  	/* Setup the PLLs and the clocks for the peripherals */
> -	am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_400);
> +	am33xx_pll_init(MPUPLL_M_600, DDRPLL_M_400);
>  	am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data);
>  	sdram_size = get_ram_size((void *)0x80000000, (1024 << 20));
>  	if (sdram_size == SZ_256M)
> -- 
> 2.1.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Oct 19 03:14:07 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 12:14:07 +0200
Subject: [PATCH] spi: mvebu: make more than one device on a bus work
In-Reply-To: <20161019073045.15747-1-u.kleine-koenig@pengutronix.de>
References: <20161019073045.15747-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161019101407.kvibmtez5vnlqoar@pengutronix.de>

On Wed, Oct 19, 2016 at 09:30:45AM +0200, Uwe Kleine-K?nig wrote:
> The mvebu socs support up to 8 chip selects. Make use of them.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
>  drivers/spi/mvebu_spi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha

> 
> diff --git a/drivers/spi/mvebu_spi.c b/drivers/spi/mvebu_spi.c
> index c679e64c4248..335774d4c609 100644
> --- a/drivers/spi/mvebu_spi.c
> +++ b/drivers/spi/mvebu_spi.c
> @@ -361,7 +361,7 @@ static int mvebu_spi_probe(struct device_d *dev)
>  	master->bus_num = dev->id;
>  	master->setup = mvebu_spi_setup;
>  	master->transfer = mvebu_spi_transfer;
> -	master->num_chipselect = 1;
> +	master->num_chipselect = 8;
>  
>  	ret = spi_register_master(master);
>  	if (!ret)
> -- 
> 2.9.3
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Oct 19 03:21:23 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 12:21:23 +0200
Subject: [PATCH] pinctrl: mvebu: sync mpp names to Linux 4.9-rc1
In-Reply-To: <20161018194719.30707-1-u.kleine-koenig@pengutronix.de>
References: <20161018194719.30707-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161019102123.vibu2i6p3rlu7ye4@pengutronix.de>

On Tue, Oct 18, 2016 at 09:47:19PM +0200, Uwe Kleine-K?nig wrote:
> Linux changed several mpp names in commits:
> 
> 	a526973e0291 (pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio))
> 	438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description)
> 	bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins)
> 	80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions)
> 	100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions)
> 	7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins)
> 	dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins)
> 	d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins)
> 	f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins)
> 	a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins)
> 	bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet)
> 	9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming)
> 	50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0)
> 	88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function)
> 	fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function)
> 	b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions)
> 
> Adapt the barebox mvebu drivers accordingly.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
> Hello,
> 
> this superseeds patch
> 
> 	pinctrl: mvebu: armada-370 fix gpio name for mpp63
> 
> which currently sits in next as 8aed8106c2ec.

This is not in next anymore, it's in master since the last release.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Oct 19 03:22:28 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 12:22:28 +0200
Subject: [PATCH] sandbox: eliminate sdl_init()
In-Reply-To: <20161019084437.7533-1-antonynpavlov@gmail.com>
References: <20161019084437.7533-1-antonynpavlov@gmail.com>
Message-ID: <20161019102228.ojcfnvuhzora3dyp@pengutronix.de>

On Wed, Oct 19, 2016 at 11:44:37AM +0300, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/sandbox/mach-sandbox/include/mach/linux.h | 1 -
>  arch/sandbox/os/sdl.c                          | 7 +------
>  2 files changed, 1 insertion(+), 7 deletions(-)

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From u.kleine-koenig at pengutronix.de  Wed Oct 19 05:32:29 2016
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Wed, 19 Oct 2016 14:32:29 +0200
Subject: [PATCH v2] pinctrl: mvebu: sync mpp names to Linux 4.9-rc1
In-Reply-To: <20161019102123.vibu2i6p3rlu7ye4@pengutronix.de>
References: <20161019102123.vibu2i6p3rlu7ye4@pengutronix.de>
Message-ID: <20161019123229.11583-1-u.kleine-koenig@pengutronix.de>

Linux changed several mpp names in commits:

	438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description)
	bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins)
	80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions)
	100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions)
	7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins)
	dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins)
	d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins)
	f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins)
	a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins)
	bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet)
	9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming)
	50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0)
	88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function)
	fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function)
	b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions)

Adapt the barebox mvebu drivers accordingly.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
Changes since (implict) v1:
 - rebase to master

 drivers/pinctrl/mvebu/armada-370.c | 22 ++++-----
 drivers/pinctrl/mvebu/armada-xp.c  | 93 ++++++++++++++++++++------------------
 2 files changed, 59 insertions(+), 56 deletions(-)

diff --git a/drivers/pinctrl/mvebu/armada-370.c b/drivers/pinctrl/mvebu/armada-370.c
index c2c1a0fa6399..2fd07a7b8737 100644
--- a/drivers/pinctrl/mvebu/armada-370.c
+++ b/drivers/pinctrl/mvebu/armada-370.c
@@ -50,12 +50,12 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x2, "uart0", "rxd")),
 	MPP_MODE(4, "mpp4", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
-	   MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
+	   MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
 	MPP_MODE(5, "mpp5", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "ge0", "txclko"),
+	   MPP_FUNCTION(0x1, "ge0", "txclkout"),
 	   MPP_FUNCTION(0x2, "uart1", "txd"),
-	   MPP_FUNCTION(0x4, "spi1", "clk"),
+	   MPP_FUNCTION(0x4, "spi1", "sck"),
 	   MPP_FUNCTION(0x5, "audio", "mclk")),
 	MPP_MODE(6, "mpp6", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
@@ -66,7 +66,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	MPP_MODE(7, "mpp7", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
 	   MPP_FUNCTION(0x1, "ge0", "txd1"),
-	   MPP_FUNCTION(0x4, "tdm", "tdx"),
+	   MPP_FUNCTION(0x4, "tdm", "dtx"),
 	   MPP_FUNCTION(0x5, "audio", "lrclk")),
 	MPP_MODE(8, "mpp8", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
@@ -205,11 +205,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x2, "spi0", "cs0")),
 	MPP_MODE(34, "mpp34", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "wen0"),
+	   MPP_FUNCTION(0x1, "dev", "we0"),
 	   MPP_FUNCTION(0x2, "spi0", "mosi")),
 	MPP_MODE(35, "mpp35", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "oen"),
+	   MPP_FUNCTION(0x1, "dev", "oe"),
 	   MPP_FUNCTION(0x2, "spi0", "sck")),
 	MPP_MODE(36, "mpp36", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
@@ -346,13 +346,13 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x1, "dev", "ale1"),
 	   MPP_FUNCTION(0x2, "uart1", "rxd"),
 	   MPP_FUNCTION(0x3, "sata0", "prsnt"),
-	   MPP_FUNCTION(0x4, "pcie", "rst-out"),
+	   MPP_FUNCTION(0x4, "pcie", "rstout"),
 	   MPP_FUNCTION(0x5, "audio", "sdi")),
 	MPP_MODE(61, "mpp61", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "wen1"),
+	   MPP_FUNCTION(0x1, "dev", "we1"),
 	   MPP_FUNCTION(0x2, "uart1", "txd"),
-	   MPP_FUNCTION(0x5, "audio", "rclk")),
+	   MPP_FUNCTION(0x5, "audio", "lrclk")),
 	MPP_MODE(62, "mpp62", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "dev", "a2"),
@@ -368,11 +368,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	MPP_MODE(64, "mpp64", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "miso"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs1")),
+	   MPP_FUNCTION(0x2, "spi0", "cs1")),
 	MPP_MODE(65, "mpp65", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "mosi"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs2")),
+	   MPP_FUNCTION(0x2, "spi0", "cs2")),
 };
 
 static struct mvebu_pinctrl_soc_info mv88f6710_pinctrl_info = {
diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c
index f1bc8b498aac..b9c2aa47f1e5 100644
--- a/drivers/pinctrl/mvebu/armada-xp.c
+++ b/drivers/pinctrl/mvebu/armada-xp.c
@@ -53,7 +53,7 @@ enum armada_xp_variant {
 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(0, "mpp0", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "ge0", "txclko",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "ge0", "txclkout",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d0",         V_MV78230_PLUS)),
 	MPP_MODE(1, "mpp1", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -102,17 +102,19 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(12, "mpp12", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd4",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "ge1", "clkout",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x2, "ge1", "txclkout",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d12",        V_MV78230_PLUS)),
 	MPP_MODE(13, "mpp13", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd5",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd0",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "mosi",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d13",        V_MV78230_PLUS)),
 	MPP_MODE(14, "mpp14", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd6",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd1",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "sck",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d14",        V_MV78230_PLUS)),
 	MPP_MODE(15, "mpp15", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -123,11 +125,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txclk",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd3",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "cs0",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d16",        V_MV78230_PLUS)),
 	MPP_MODE(17, "mpp17", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "col",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txctl",      V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "miso",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d17",        V_MV78230_PLUS)),
 	MPP_MODE(18, "mpp18", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -151,7 +155,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "rxd5",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "rxd3",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "mem", "bat",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "dram", "bat",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d21",        V_MV78230_PLUS)),
 	MPP_MODE(22, "mpp22", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -168,20 +172,17 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(24, "mpp24", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sata1", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "nf", "bootcs-re",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "hsync",      V_MV78230_PLUS)),
 	MPP_MODE(25, "mpp25", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sata0", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "nf", "bootcs-we",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vsync",      V_MV78230_PLUS)),
 	MPP_MODE(26, "mpp26", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "fsync",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS)),
 	MPP_MODE(27, "mpp27", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ptp", "trig",       V_MV78230_PLUS),
@@ -196,8 +197,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ptp", "clk",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int0",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS)),
 	MPP_MODE(30, "mpp30", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "clk",        V_MV78230_PLUS),
@@ -205,23 +205,23 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(31, "mpp31", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "cmd",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS)),
 	MPP_MODE(32, "mpp32", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d0",         V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS)),
 	MPP_MODE(33, "mpp33", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d1",         V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int4",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS)),
 	MPP_MODE(34, "mpp34", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d2",         V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "sata0", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "dram", "deccerr",   V_MV78230_PLUS)),
 	MPP_MODE(35, "mpp35", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d3",         V_MV78230_PLUS),
@@ -229,74 +229,80 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int6",       V_MV78230_PLUS)),
 	MPP_MODE(36, "mpp36", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "mosi",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "mosi",      V_MV78230_PLUS)),
 	MPP_MODE(37, "mpp37", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "miso",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "miso",      V_MV78230_PLUS)),
 	MPP_MODE(38, "mpp38", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "sck",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "sck",       V_MV78230_PLUS)),
 	MPP_MODE(39, "mpp39", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs0",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs0",       V_MV78230_PLUS)),
 	MPP_MODE(40, "mpp40", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs1",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs1",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart2", "cts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "vdd", "cpu1-pd",    V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync",  V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs1",       V_MV78230_PLUS)),
 	MPP_MODE(41, "mpp41", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs2",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs2",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart2", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync",  V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs2",       V_MV78230_PLUS)),
 	MPP_MODE(42, "mpp42", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "rxd",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart0", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int7",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "tdm-1", "timer",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "tdm", "timer",      V_MV78230_PLUS)),
 	MPP_MODE(43, "mpp43", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "txd",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart0", "rts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs3",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs3",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "pcie", "rstout",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu2-3-pd",  V_MV78460)),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs3",       V_MV78230_PLUS)),
 	MPP_MODE(44, "mpp44", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart3", "rxd",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs4",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs4",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs4",       V_MV78230_PLUS)),
 	MPP_MODE(45, "mpp45", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart3", "txd",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs5",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs5",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs5",       V_MV78230_PLUS)),
 	MPP_MODE(46, "mpp46", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart3", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart1", "rts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs6",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs6",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs6",       V_MV78230_PLUS)),
 	MPP_MODE(47, "mpp47", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart3", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart1", "cts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs7",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs7",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "ref", "clkout",     V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs7",       V_MV78230_PLUS)),
 	MPP_MODE(48, "mpp48", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "tclk", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "clkout",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "nand", "rb",        V_MV78230_PLUS)),
 	MPP_MODE(49, "mpp49", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "dev", "we3",        V_MV78260_PLUS)),
@@ -317,16 +323,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x1, "dev", "ad19",       V_MV78260_PLUS)),
 	MPP_MODE(55, "mpp55", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu0-pd",    V_MV78260_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS)),
 	MPP_MODE(56, "mpp56", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu1-pd",    V_MV78260_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS)),
 	MPP_MODE(57, "mpp57", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu2-3-pd",  V_MV78460)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS)),
 	MPP_MODE(58, "mpp58", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "dev", "ad23",       V_MV78260_PLUS)),
-- 
2.9.3



From s.hauer at pengutronix.de  Wed Oct 19 05:49:18 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 14:49:18 +0200
Subject: [PATCH] mtd: ubi: enable thread earlier
Message-ID: <20161019124918.5950-1-s.hauer@pengutronix.de>

Since "57cebc4 mtd: ubi: Fix scrubbing during attach" we make sure
that the wear level worker does not start too early. However, now
there are cases when the worker starts too late. When a ubi image is
freshly written a volume may be autoresized. This has to be done
after the wear level worker is started because otherwise the initial
fastmap update will not be able to find any anchor PEBs.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/ubi/build.c | 14 +++++---------
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index 617c63e..dd90e17 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -622,6 +622,11 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num,
 		goto out_free;
 	}
 
+	ubi->thread_enabled = 1;
+
+	/* No threading, call ubi_thread directly */
+	ubi_thread(ubi);
+
 	if (ubi->autoresize_vol_id != -1) {
 		err = autoresize(ubi, ubi->autoresize_vol_id);
 		if (err)
@@ -663,15 +668,6 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num,
 	dev_add_param_int_ro(&ubi->dev, "available_pebs", ubi->avail_pebs, "%d");
 	dev_add_param_int_ro(&ubi->dev, "reserved_pebs", ubi->rsvd_pebs, "%d");
 
-	/*
-	 * The below lock makes sure we do not race with 'ubi_thread()' which
-	 * checks @ubi->thread_enabled. Otherwise we may fail to wake it up.
-	 */
-	ubi->thread_enabled = 1;
-
-	/* No threading, call ubi_thread directly */
-	ubi_thread(ubi);
-
 	ubi_devices[ubi_num] = ubi;
 
 	return ubi_num;
-- 
2.9.3



From s.hauer at pengutronix.de  Wed Oct 19 06:54:34 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 19 Oct 2016 15:54:34 +0200
Subject: [PATCH v2] pinctrl: mvebu: sync mpp names to Linux 4.9-rc1
In-Reply-To: <20161019123229.11583-1-u.kleine-koenig@pengutronix.de>
References: <20161019102123.vibu2i6p3rlu7ye4@pengutronix.de>
 <20161019123229.11583-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161019135434.wmyenu5irgymn3ho@pengutronix.de>

On Wed, Oct 19, 2016 at 02:32:29PM +0200, Uwe Kleine-K?nig wrote:
> Linux changed several mpp names in commits:
> 
> 	438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description)
> 	bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins)
> 	80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions)
> 	100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions)
> 	7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins)
> 	dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins)
> 	d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins)
> 	f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins)
> 	a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins)
> 	bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet)
> 	9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming)
> 	50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0)
> 	88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function)
> 	fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function)
> 	b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions)
> 
> Adapt the barebox mvebu drivers accordingly.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
> Changes since (implict) v1:
>  - rebase to master

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From javier.fileiv at gmail.com  Wed Oct 19 11:17:39 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Wed, 19 Oct 2016 20:17:39 +0200
Subject: Loading kernel issues
In-Reply-To: <201610190953.41081.jbe@pengutronix.de>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2AvfKwc==BhRfw14CzeX4ALwAFp5Zxn1t0MEj2bsn50zQ@mail.gmail.com>
 <CABvwO2A6jNWz7_MOcxxAdJh_fAoV06uA9qk28dKZ5icfV07kQg@mail.gmail.com>
 <201610190953.41081.jbe@pengutronix.de>
Message-ID: <CABvwO2BoCQs-XoSNsYG8Uo8+odKcZ6o5dWoFzk_nQjTJGerYLw@mail.gmail.com>

Hello Juergen,

Here is my power up output, thanks you very much

Terminal ready


barebox 2011.05.0-ptx-2014.11.0 (Oct 13 2016 - 21:53:08)

Board: Mini 2440
NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit)
Bad block table found at page 524224, version 0x01
Bad block table found at page 524160, version 0x01
nand_read_bbt: Bad block at 0x255a0000
dm9000 i/o: 0x20000300, id: 0x90000a46
eth at eth0: got MAC address from EEPROM: 00:00:00:00:00:00
cfi_probe: cfi_flash base: 0x00000000 size: 0x00200000
## Unknown FLASH on Bank at 0x00000000 - Size = 0x00000000 = 0 MB
refclk:    12000 kHz
mpll:     405000 kHz
upll:      48000 kHz
fclk:     405000 kHz
hclk:     101250 kHz
pclk:      50625 kHz
SDRAM1:   CL2 at 101MHz
Malloc space: 0x33a00000 -> 0x33e00000 (size  4 MB)
Stack space : 0x339f8000 -> 0x33a00000 (size 32 kB)
running /env/bin/init...

2016-10-19 9:53 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
> Hi Javier,
>
> On Tuesday 18 October 2016 18:56:03 Javier Fileiv wrote:
>> Trying to autoboot from nand, I set my /env/config file like that (and
>> after that a "saveenv"). Although it doesn't work automaGically! :)
>
> Can you also send the output of barebox from power on up to the point it falls
> into the prompt?
>
> Cheers,
> Juergen
>
> --
> Pengutronix e.K.                              | Juergen Borleis             |
> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From javier.fileiv at gmail.com  Wed Oct 19 11:18:38 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Wed, 19 Oct 2016 20:18:38 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2BoCQs-XoSNsYG8Uo8+odKcZ6o5dWoFzk_nQjTJGerYLw@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2AvfKwc==BhRfw14CzeX4ALwAFp5Zxn1t0MEj2bsn50zQ@mail.gmail.com>
 <CABvwO2A6jNWz7_MOcxxAdJh_fAoV06uA9qk28dKZ5icfV07kQg@mail.gmail.com>
 <201610190953.41081.jbe@pengutronix.de>
 <CABvwO2BoCQs-XoSNsYG8Uo8+odKcZ6o5dWoFzk_nQjTJGerYLw@mail.gmail.com>
Message-ID: <CABvwO2BZoNwdZJsWmygcjsAUXsmexDPU5cTpEoVd-sW9y5T_Rw@mail.gmail.com>

just in case...my /env/config as well

mini2440:/ cat /env/config
#!/bin/sh

machine=mini2440
user=

# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp

# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
#eth0.netmask=a.b.c.d
#eth0.gateway=a.b.c.d
eth0.serverip=192.168.0.10
#eth0.ethaddr=a:b:b:d:e:f

# autoboot settings
# can be either 'tftp', 'nfs', 'nand' or 'mmc'
kernel_loc=nand
# can be either 'net', 'nand', 'initrd' or 'mmc'
rootfs_loc=nand
# can be either 'jffs2' or 'ubifs' for flash or 'ext3' for mmc
rootfs_type=jffs2

rootfsimage=root-${machine}.${rootfs_type}

# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
#kernelimage_type=zimage
#kernelimage=zImage-${machine}
kernelimage_type=uimage
kernelimage=uImage-$machine
#kernelimage_type=raw
#kernelimage=Image-$machine
#kernelimage_type=raw_lzo
#kernelimage=Image-$machine.lzo

# the name of the barebox image used by the update script
bareboximage=barebox-$machine

# the name of the barebox default environment used by the update script
bareboxenvimage=barebox-environment-$machine

if [ -n $user ]; then
kernelimage="${user}"-"${kernelimage}"
nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
rootfsimage="${user}"-"${rootfsimage}"
else
nfsroot="/path/to/nfs/root"
fi

autoboot_timeout=3

if [ -e /dev/nor0 ]; then
       nor_parts="512k(barebox)"

       # Skip autoboot if not booting from NAND
       autoboot_disable=1
fi

#
# "mini2440" kernel parameter
# 0 .. 9 = screen type
# b = backlight enabled
# t = touch enabled
# c = camera enabled
# Note: can be "mini2440= " if nothing of these components are connected
#
bootargs="console=ttySAC0,115200 mini2440=0tbc rootdelay=5"

# NAND boot settings
# Device name used by the kernel
nand_device="nand"
# partition definition in the NAND
nand_parts="512k(barebox),384k(bareboxenv),2048k(kernel),-(root)"
# rootfs's partition number in the NAND
rootfs_mtdblock_nand=3
# used when manually booting with "boot nand" command
rootfs_mtdblock_type=jffs2

# MMC/SD boot settings
# partition number to read the kernel from
# (starting with # 0, Barebox's counting scheme)
kernel_mmc_part=0
# rootfs's partition number
# (starting with # 1, Kernel's counting scheme)
rootfs_mmc_part=2
# used when manually booting with "boot mmc" command
rootfs_mmc_type=ext2

2016-10-19 20:17 GMT+02:00 Javier Fileiv <javier.fileiv at gmail.com>:
> Hello Juergen,
>
> Here is my power up output, thanks you very much
>
> Terminal ready
>
>
> barebox 2011.05.0-ptx-2014.11.0 (Oct 13 2016 - 21:53:08)
>
> Board: Mini 2440
> NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit)
> Bad block table found at page 524224, version 0x01
> Bad block table found at page 524160, version 0x01
> nand_read_bbt: Bad block at 0x255a0000
> dm9000 i/o: 0x20000300, id: 0x90000a46
> eth at eth0: got MAC address from EEPROM: 00:00:00:00:00:00
> cfi_probe: cfi_flash base: 0x00000000 size: 0x00200000
> ## Unknown FLASH on Bank at 0x00000000 - Size = 0x00000000 = 0 MB
> refclk:    12000 kHz
> mpll:     405000 kHz
> upll:      48000 kHz
> fclk:     405000 kHz
> hclk:     101250 kHz
> pclk:      50625 kHz
> SDRAM1:   CL2 at 101MHz
> Malloc space: 0x33a00000 -> 0x33e00000 (size  4 MB)
> Stack space : 0x339f8000 -> 0x33a00000 (size 32 kB)
> running /env/bin/init...
>
> 2016-10-19 9:53 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
>> Hi Javier,
>>
>> On Tuesday 18 October 2016 18:56:03 Javier Fileiv wrote:
>>> Trying to autoboot from nand, I set my /env/config file like that (and
>>> after that a "saveenv"). Although it doesn't work automaGically! :)
>>
>> Can you also send the output of barebox from power on up to the point it falls
>> into the prompt?
>>
>> Cheers,
>> Juergen
>>
>> --
>> Pengutronix e.K.                              | Juergen Borleis             |
>> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Thu Oct 20 00:31:22 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 20 Oct 2016 09:31:22 +0200
Subject: [PATCH 3/3] of_path: handle no driver for device
In-Reply-To: <20161020073122.19295-1-s.hauer@pengutronix.de>
References: <20161020073122.19295-1-s.hauer@pengutronix.de>
Message-ID: <20161020073122.19295-3-s.hauer@pengutronix.de>

in __of_find_path it can happen that there is a device, but there
is no driver for this device because it hasn't been probed yet.
Return -ENODEV in this case to let the caller know that it has to
try later again.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/of/of_path.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/of/of_path.c b/drivers/of/of_path.c
index 8e1931f..12a7c02 100644
--- a/drivers/of/of_path.c
+++ b/drivers/of/of_path.c
@@ -61,6 +61,9 @@ static int __of_find_path(struct device_node *node, const char *part, char **out
 			return -ENODEV;
 	}
 
+	if (!dev->driver)
+		return -ENODEV;
+
 	device_detect(dev);
 
 	if (part)
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 00:31:21 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 20 Oct 2016 09:31:21 +0200
Subject: [PATCH 2/3] state: driver: handle EPROBE_DEFER
In-Reply-To: <20161020073122.19295-1-s.hauer@pengutronix.de>
References: <20161020073122.19295-1-s.hauer@pengutronix.de>
Message-ID: <20161020073122.19295-2-s.hauer@pengutronix.de>

When state_new_from_node() returns -ENODEV that means that there
is no device available for the node, so return -EPROBE_DEFER in this
case and hope a device is there later.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/misc/state.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/state.c b/drivers/misc/state.c
index b9eb1b7..b43aee6 100644
--- a/drivers/misc/state.c
+++ b/drivers/misc/state.c
@@ -28,8 +28,12 @@ static int state_probe(struct device_d *dev)
 	bool readonly = false;
 
 	state = state_new_from_node(np, NULL, 0, 0, readonly);
-	if (IS_ERR(state))
-		return PTR_ERR(state);
+	if (IS_ERR(state)) {
+		int ret = PTR_ERR(state);
+		if (ret == -ENODEV)
+			ret = -EPROBE_DEFER;
+		return ret;
+	}
 
 	return 0;
 }
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 00:31:20 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 20 Oct 2016 09:31:20 +0200
Subject: [PATCH 1/3] state: pass error code instead of inventing new one
Message-ID: <20161020073122.19295-1-s.hauer@pengutronix.de>

Both of_find_path() and of_find_path_by_node() return a meaningful
error code, so forward it instead of inventing a new one. Do this
especially for the -EPROBE_DEFER case which currently does not work.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/state/state.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/common/state/state.c b/common/state/state.c
index 075618e..2be3c8c 100644
--- a/common/state/state.c
+++ b/common/state/state.c
@@ -466,9 +466,10 @@ struct state *state_new_from_node(struct device_node *node, char *path,
 			of_path = partition_node->full_name;
 			ret = of_find_path_by_node(partition_node, &path, 0);
 		}
-		if (!path) {
-			pr_err("state failed to parse path to backend\n");
-			ret = -EINVAL;
+		if (ret) {
+			if (ret != -EPROBE_DEFER)
+				pr_err("state failed to parse path to backend: %s\n",
+				       strerror(-ret));
 			goto out_release_state;
 		}
 	}
-- 
2.9.3



From jbe at pengutronix.de  Thu Oct 20 02:13:07 2016
From: jbe at pengutronix.de (Juergen Borleis)
Date: Thu, 20 Oct 2016 11:13:07 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2BZoNwdZJsWmygcjsAUXsmexDPU5cTpEoVd-sW9y5T_Rw@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2BoCQs-XoSNsYG8Uo8+odKcZ6o5dWoFzk_nQjTJGerYLw@mail.gmail.com>
 <CABvwO2BZoNwdZJsWmygcjsAUXsmexDPU5cTpEoVd-sW9y5T_Rw@mail.gmail.com>
Message-ID: <201610201113.08285.jbe@pengutronix.de>

Hi Javier,

On Wednesday 19 October 2016 20:18:38 Javier Fileiv wrote:
> just in case...my /env/config as well
> [...]

Sorry, no idea. I do not even have the hardware anymore, so I cannot test it.

Keep a look into the "env/bin/boot" script, what it tries to do with the 
configuration from your "env/config". Maybe it could help you to make it work 
again.

Cheers,
Juergen

-- 
Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| Juergen Borleis ? ? ? ? ? ? |
Industrial Linux Solutions ? ? ? ? ? ? ? ? ? ?| http://www.pengutronix.de/ ?|


From javier.fileiv at gmail.com  Thu Oct 20 02:17:18 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Thu, 20 Oct 2016 11:17:18 +0200
Subject: Loading kernel issues
In-Reply-To: <201610201113.08285.jbe@pengutronix.de>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2BoCQs-XoSNsYG8Uo8+odKcZ6o5dWoFzk_nQjTJGerYLw@mail.gmail.com>
 <CABvwO2BZoNwdZJsWmygcjsAUXsmexDPU5cTpEoVd-sW9y5T_Rw@mail.gmail.com>
 <201610201113.08285.jbe@pengutronix.de>
Message-ID: <CABvwO2DgadsiAhdVaSb+teN8MPJMwpLNF0RXWyvOf98=hOSo9Q@mail.gmail.com>

Thank you very much.... maybe I just to put on /env/config a "boot nand" line...

I'll try it.

Regards

2016-10-20 11:13 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
> Hi Javier,
>
> On Wednesday 19 October 2016 20:18:38 Javier Fileiv wrote:
>> just in case...my /env/config as well
>> [...]
>
> Sorry, no idea. I do not even have the hardware anymore, so I cannot test it.
>
> Keep a look into the "env/bin/boot" script, what it tries to do with the
> configuration from your "env/config". Maybe it could help you to make it work
> again.
>
> Cheers,
> Juergen
>
> --
> Pengutronix e.K.                              | Juergen Borleis             |
> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From yegorslists at googlemail.com  Thu Oct 20 04:00:48 2016
From: yegorslists at googlemail.com (yegorslists at googlemail.com)
Date: Thu, 20 Oct 2016 13:00:48 +0200
Subject: [PATCH] arm: Baltos: don't invoke baltos_read_eeprom in MLO
Message-ID: <1476961248-24425-1-git-send-email-yegorslists@googlemail.com>

From: Yegor Yefremov <yegorslists at googlemail.com>

EEPROM information is needed in barebox.bin in order to setup MACs and
select appropriate DTB from kernel-fit.itb, so disable this initcall
in MLO.

Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
---
 arch/arm/boards/vscom-baltos/board.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boards/vscom-baltos/board.c b/arch/arm/boards/vscom-baltos/board.c
index dc08ed5..fea992d 100644
--- a/arch/arm/boards/vscom-baltos/board.c
+++ b/arch/arm/boards/vscom-baltos/board.c
@@ -47,6 +47,7 @@ static struct omap_barebox_part baltos_barebox_part = {
 	.nand_size = 0x1e0000,
 };
 
+#ifndef CONFIG_OMAP_BUILD_IFT
 struct bsp_vs_hwparam {
 	uint32_t Magic;
 	uint32_t HwRev;
@@ -111,6 +112,7 @@ static int baltos_read_eeprom(void)
 	return 0;
 }
 environment_initcall(baltos_read_eeprom);
+#endif
 
 static int baltos_devices_init(void)
 {
-- 
2.1.4



From c.hemp at phytec.de  Thu Oct 20 06:40:07 2016
From: c.hemp at phytec.de (Christian Hemp)
Date: Thu, 20 Oct 2016 15:40:07 +0200
Subject: [PATCH 2/2] mtd: nand: nand_mxs: Fix readtotal calculation
In-Reply-To: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
References: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
Message-ID: <1476970807-43811-2-git-send-email-c.hemp@phytec.de>

The calculation of readtotal must be bit alligend. If not the bch core
finds bit flips in every page, because readtotal is too small.
This bug was mostly introduced since commit "51061a9 mtd: nand: nand_mxs:
Add subpage read support".

Tested with:
nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
S34ML08G2), 1024MiB, page size: 2048, OOB size: 128

nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron
MT29F4G08ABADAWP), 512MiB, page size: 2048, OOB size: 64

nand: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND
1GiB 3,3V 8-bit), 1024MiB, page size: 2048, OOB size: 64

Signed-off-by: Christian Hemp <c.hemp at phytec.de>
Signed-off-by: Stefan Lengfeld <s.lengfeld at phytec.de>
---
 drivers/mtd/nand/nand_mxs.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index fe955e8..cba0bee 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -728,15 +728,15 @@ static int __mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand
 	uint32_t corrected = 0, failed = 0;
 	uint8_t	*status;
 	unsigned int  max_bitflips = 0;
-	int i, ret, readtotal, nchunks, eccstrength, ecc_parity_size;
+	int i, ret, readtotal, nchunks, eccstrength;
 
 	eccstrength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
 
 	readlen = roundup(readlen, MXS_NAND_CHUNK_DATA_CHUNK_SIZE);
 	nchunks = mxs_nand_ecc_chunk_cnt(readlen);
-	ecc_parity_size = 13 * eccstrength / 8;
-	readtotal = MXS_NAND_METADATA_SIZE +
-		(MXS_NAND_CHUNK_DATA_CHUNK_SIZE + ecc_parity_size) * nchunks;
+	readtotal =  MXS_NAND_METADATA_SIZE;
+	readtotal += MXS_NAND_CHUNK_DATA_CHUNK_SIZE * nchunks;
+	readtotal += DIV_ROUND_UP(13 * eccstrength * nchunks, 8);
 
 	mxs_nand_config_bch(mtd, readtotal);
 
-- 
1.9.1



From c.hemp at phytec.de  Thu Oct 20 06:40:06 2016
From: c.hemp at phytec.de (Christian Hemp)
Date: Thu, 20 Oct 2016 15:40:06 +0200
Subject: [PATCH 1/2] nand: imx6: Changed default NAND clock
Message-ID: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>

From: Daniel Schultz <d.schultz at phytec.de>

The Barebox recognized false bad erase blocks while booting from a
Spansion NAND (1). This error occurred due a to high clock. The
Kernel sets the default NAND clock to 22Mhz. So, to fix this error and
to be more identical with the Kernel, the Barebox should be too.

1: nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
S34ML08G2), 1024MiB, page size: 2048, OOB size: 128

Signed-off-by: Daniel Schultz <d.schultz at phytec.de>
Tested-by: Stefan Lengfeld <s.lengfeld at phytec.de>
Signed-off-by: Christian Hemp <c.hemp at phytec.de>
---
 drivers/mtd/nand/nand_mxs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index 01aa063..fe955e8 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -2145,7 +2145,7 @@ static int mxs_nand_probe(struct device_d *dev)
 
 	if (mxs_nand_is_imx6(nand_info)) {
 		clk_disable(nand_info->clk);
-		clk_set_rate(nand_info->clk, 96000000);
+		clk_set_rate(nand_info->clk, 22000000);
 		clk_enable(nand_info->clk);
 		nand_info->dma_channel_base = 0;
 	} else {
-- 
1.9.1



From javier.fileiv at gmail.com  Thu Oct 20 10:59:54 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Thu, 20 Oct 2016 19:59:54 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2DgadsiAhdVaSb+teN8MPJMwpLNF0RXWyvOf98=hOSo9Q@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2BoCQs-XoSNsYG8Uo8+odKcZ6o5dWoFzk_nQjTJGerYLw@mail.gmail.com>
 <CABvwO2BZoNwdZJsWmygcjsAUXsmexDPU5cTpEoVd-sW9y5T_Rw@mail.gmail.com>
 <201610201113.08285.jbe@pengutronix.de>
 <CABvwO2DgadsiAhdVaSb+teN8MPJMwpLNF0RXWyvOf98=hOSo9Q@mail.gmail.com>
Message-ID: <CABvwO2ByvooXXYw+KKZSKvX0CPf43XABHn1-CUNd+qguCkRTeA@mail.gmail.com>

ups... I think Ive broken everything... I just put at the end of the
env/config file "boot nand" and now is looping and at some point it
says "ERROR: out of memory".
Another thing... I changed vivibootloader in NOR for the barebox, and
even if I change to NOR it's looping again and again... What do I do?
HELP!

2016-10-20 11:17 GMT+02:00 Javier Fileiv <javier.fileiv at gmail.com>:
> Thank you very much.... maybe I just to put on /env/config a "boot nand" line...
>
> I'll try it.
>
> Regards
>
> 2016-10-20 11:13 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
>> Hi Javier,
>>
>> On Wednesday 19 October 2016 20:18:38 Javier Fileiv wrote:
>>> just in case...my /env/config as well
>>> [...]
>>
>> Sorry, no idea. I do not even have the hardware anymore, so I cannot test it.
>>
>> Keep a look into the "env/bin/boot" script, what it tries to do with the
>> configuration from your "env/config". Maybe it could help you to make it work
>> again.
>>
>> Cheers,
>> Juergen
>>
>> --
>> Pengutronix e.K.                              | Juergen Borleis             |
>> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Thu Oct 20 12:03:55 2016
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Thu, 20 Oct 2016 21:03:55 +0200
Subject: [PATCH] pinctrl: mvebu: fix a comment about mv78460
Message-ID: <20161020190355.20181-1-u.kleine-koenig@pengutronix.de>

It's pin mpp57 that has function vdd/cpu2-3-pd

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 drivers/pinctrl/mvebu/armada-xp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c
index f1bc8b498aac..f2e6b0d38f7b 100644
--- a/drivers/pinctrl/mvebu/armada-xp.c
+++ b/drivers/pinctrl/mvebu/armada-xp.c
@@ -16,7 +16,7 @@
  * both have 67 MPP pins (more GPIOs and address lines for the memory
  * bus mainly). The only difference between the mv78260 and the
  * mv78460 in terms of pin muxing is the addition of two functions on
- * pins 43 and 56 to access the VDD of the CPU2 and 3 (mv78260 has two
+ * pins 43 and 57 to access the VDD of the CPU2 and 3 (mv78260 has two
  * cores, mv78460 has four cores).
  */
 
-- 
2.8.1



From yegorslists at googlemail.com  Thu Oct 20 23:04:35 2016
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Fri, 21 Oct 2016 08:04:35 +0200
Subject: [PATCH 3/5] fs: squashfs: port zlib compression support from
 kernel
In-Reply-To: <20161004194020.vmmm35546csmbvnv@pengutronix.de>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-4-ejo@pengutronix.de>
 <20161004194020.vmmm35546csmbvnv@pengutronix.de>
Message-ID: <CAGm1_ksWRAVPV3JSzxZvap_B=O7oUFw7CV93druAFF8ZGir4Og@mail.gmail.com>

Hi Enrico,

On Tue, Oct 4, 2016 at 9:40 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Tue, Oct 04, 2016 at 12:10:46PM +0200, Enrico Jorns wrote:
>> As this is the default compression method for squashfs, make this the
>> default in kconfig selection, too
>>
>> Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
>> ---
>>  fs/squashfs/Kconfig        |  20 ++++++-
>>  fs/squashfs/Makefile       |   1 +
>>  fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
>>  3 files changed, 152 insertions(+), 1 deletion(-)
>>  create mode 100644 fs/squashfs/zlib_wrapper.c
>>
>> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
>> index d2de168..1cb1ac5 100644
>> --- a/fs/squashfs/Kconfig
>> +++ b/fs/squashfs/Kconfig
>> @@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
>>         embedded systems where low overhead is needed.  Further information
>>         and tools are available from http://squashfs.sourceforge.net.
>>
>> +config SQUASHFS_ZLIB
>> +     bool "Include support for ZLIB compressed file systems"
>> +     depends on FS_SQUASHFS
>> +     select ZLIB
>> +     default y
>> +     help
>> +       ZLIB compression is the standard compression used by Squashfs
>> +       file systems.  It offers a good trade-off between compression
>> +       achieved and the amount of CPU time and memory necessary to
>> +       compress and decompress.
>> +
>> +       If unsure, say Y.
>> +
>>  config SQUASHFS_LZ4
>>       bool "Include support for LZ4 compressed file systems"
>>       depends on FS_SQUASHFS
>> @@ -30,9 +43,10 @@ config SQUASHFS_LZ4
>>         LZ4 is not the standard compression used in Squashfs and so most
>>         file systems will be readable without selecting this option.
>>
>> +       If unsure, say N.
>> +
>>  config SQUASHFS_LZO
>>       bool "Include support for LZO compressed file systems"
>> -     default y
>>       depends on FS_SQUASHFS
>>       select LZO_DECOMPRESS
>>       help
>> @@ -44,6 +58,8 @@ config SQUASHFS_LZO
>>         LZO is not the standard compression used in Squashfs and so most
>>         file systems will be readable without selecting this option.
>>
>> +       If unsure, say N.
>> +
>>  config SQUASHFS_XZ
>>       bool "Include support for XZ compressed file systems"
>>       default y
>> @@ -57,3 +73,5 @@ config SQUASHFS_XZ
>>
>>         XZ is not the standard compression used in Squashfs and so most
>>         file systems will be readable without selecting this option.
>> +
>> +       If unsure, say N.
>
> Here unrelated Kconfig entries are changed. Also in the end we get
> "default y" for SQUASHFS_XZ along with the help "If unsure, say N."
> which seems inconsistent.

Care to send v2?

@Sascha what is the plan as to the default compression selection?
Leave XZ or set it to ZLIB? I'm open for both options.

Thanks.

Yegor


From s.hauer at pengutronix.de  Thu Oct 20 23:51:22 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:51:22 +0200
Subject: [PATCH 4/6] Add filetype and detection for squashfs images
In-Reply-To: <20161021065124.7328-1-s.hauer@pengutronix.de>
References: <20161021065124.7328-1-s.hauer@pengutronix.de>
Message-ID: <20161021065124.7328-4-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

This adds `filetype_squashfs` to the list of known filetypes and adds a
detection for squashfs files to file_detect_type(). This currently
matches on the `hsqs` start sequence of an image file.

Additionally, the newly introduced filetype is registered as the type of
the squashfs_driver which allows, for example, to mount squashfs without
the need to specify a type parameter.

This changes enable booting a squashfs with the simple `boot` command
pointing to the location (device) that holds the squashfs.

Note that booting with blspec is limited as the current squashfs driver
is not capable of handling symbolic links.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/filetype.c      | 4 ++++
 fs/squashfs/squashfs.c | 1 +
 include/filetype.h     | 1 +
 3 files changed, 6 insertions(+)

diff --git a/common/filetype.c b/common/filetype.c
index 4728f87..8d72933 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -40,6 +40,7 @@ static const struct filetype_str filetype_str[] = {
 	[filetype_uimage] = { "U-Boot uImage", "u-boot" },
 	[filetype_ubi] = { "UBI image", "ubi" },
 	[filetype_jffs2] = { "JFFS2 image", "jffs2" },
+	[filetype_squashfs] = { "Squashfs image", "squashfs" },
 	[filetype_gzip] = { "GZIP compressed", "gzip" },
 	[filetype_bzip2] = { "BZIP2 compressed", "bzip2" },
 	[filetype_oftree] = { "open firmware Device Tree flattened Binary", "dtb" },
@@ -278,6 +279,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
 	if (buf8[0] == 0xfd && buf8[1] == 0x37 && buf8[2] == 0x7a &&
 			buf8[3] == 0x58 && buf8[4] == 0x5a && buf8[5] == 0x00)
 		return filetype_xz_compressed;
+	if (buf8[0] == 'h' && buf8[1] == 's' && buf8[2] == 'q' &&
+			buf8[3] == 's')
+		return filetype_squashfs;
 	if (buf[0] == be32_to_cpu(0xd00dfeed))
 		return filetype_oftree;
 	if (strncmp(buf8, "ANDROID!", 8) == 0)
diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
index d00dee6..6d04681 100644
--- a/fs/squashfs/squashfs.c
+++ b/fs/squashfs/squashfs.c
@@ -353,6 +353,7 @@ static struct fs_driver_d squashfs_driver = {
 	.readdir	= squashfs_readdir,
 	.closedir	= squashfs_closedir,
 	.stat		= squashfs_stat,
+	.type		= filetype_squashfs,
 	.drv = {
 		.probe = squashfs_probe,
 		.remove = squashfs_remove,
diff --git a/include/filetype.h b/include/filetype.h
index cde73c1..65bd6ef 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -16,6 +16,7 @@ enum filetype {
 	filetype_uimage,
 	filetype_ubi,
 	filetype_jffs2,
+	filetype_squashfs,
 	filetype_gzip,
 	filetype_bzip2,
 	filetype_oftree,
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 23:51:23 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:51:23 +0200
Subject: [PATCH 5/6] fs: squashfs: append linux rootarg for ubi volume
In-Reply-To: <20161021065124.7328-1-s.hauer@pengutronix.de>
References: <20161021065124.7328-1-s.hauer@pengutronix.de>
Message-ID: <20161021065124.7328-5-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

If squashfs runs from an ubi volume, append appropriate root kernel
options.

Note that ubiblock support is required in the kernel for that.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/squashfs.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
index 6d04681..c4d0bac 100644
--- a/fs/squashfs/squashfs.c
+++ b/fs/squashfs/squashfs.c
@@ -9,12 +9,16 @@
 #include <linux/fs.h>
 #include <linux/stat.h>
 #include <linux/pagemap.h>
+#include <linux/mtd/ubi.h>
+#include <linux/mtd/mtd.h>
 
 #include "squashfs_fs.h"
 #include "squashfs_fs_sb.h"
 #include "squashfs_fs_i.h"
 #include "squashfs.h"
 
+struct ubi_volume_desc;
+
 char *squashfs_devread(struct squashfs_sb_info *fs, int byte_offset,
 		int byte_len)
 {
@@ -108,6 +112,31 @@ static struct inode *squashfs_findfile(struct super_block *sb,
 	return NULL;
 }
 
+void squashfs_set_rootarg(struct squashfs_priv *priv, struct fs_device_d *fsdev)
+{
+	struct ubi_volume_desc *ubi_vol;
+	struct ubi_volume_info vi = {};
+	struct ubi_device_info di = {};
+	struct mtd_info *mtd;
+	char *str;
+
+	ubi_vol = ubi_open_volume_cdev(fsdev->cdev, UBI_READONLY);
+
+	if (IS_ERR(ubi_vol))
+		return;
+
+	ubi_get_volume_info(ubi_vol, &vi);
+	ubi_get_device_info(vi.ubi_num, &di);
+	mtd = di.mtd;
+
+	str = basprintf("root=/dev/ubiblock%d_%d ubi.mtd=%s ubi.block=%d,%d rootfstype=squashfs",
+			vi.ubi_num, vi.vol_id, mtd->cdev.partname, vi.ubi_num, vi.vol_id);
+
+	fsdev_set_linux_rootarg(fsdev, str);
+
+	free(str);
+}
+
 static int squashfs_probe(struct device_d *dev)
 {
 	struct fs_device_d *fsdev;
@@ -130,6 +159,8 @@ static int squashfs_probe(struct device_d *dev)
 		goto err_out;
 	}
 
+	squashfs_set_rootarg(priv, fsdev);
+
 	return 0;
 
 err_out:
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 23:51:20 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:51:20 +0200
Subject: [PATCH 2/6] fs: squashfs: port lz4 compression support from kernel
In-Reply-To: <20161021065124.7328-1-s.hauer@pengutronix.de>
References: <20161021065124.7328-1-s.hauer@pengutronix.de>
Message-ID: <20161021065124.7328-2-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig       |  14 +++++
 fs/squashfs/Makefile      |   1 +
 fs/squashfs/lz4_wrapper.c | 140 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 155 insertions(+)
 create mode 100644 fs/squashfs/lz4_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index 7a6e5a2..9af34c0 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,20 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_LZ4
+	bool "Include support for LZ4 compressed file systems"
+	default y if LZ4_DECOMPRESS
+	depends on FS_SQUASHFS
+	select LZ4_DECOMPRESS
+	help
+	  Saying Y here includes support for reading Squashfs file systems
+	  compressed with LZ4 compression.  LZ4 compression is mainly
+	  aimed at embedded systems with slower CPUs where the overheads
+	  of zlib are too high.
+
+	  LZ4 is not the standard compression used in Squashfs and so most
+	  file systems will be readable without selecting this option.
+
 config SQUASHFS_LZO
 	bool "Include support for LZO compressed file systems"
 	default y if LZO_DECOMPRESS
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 447e15e..8590b09 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -12,3 +12,4 @@ obj-y	+= namei.o
 obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
+obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
diff --git a/fs/squashfs/lz4_wrapper.c b/fs/squashfs/lz4_wrapper.c
new file mode 100644
index 0000000..6ca6a32
--- /dev/null
+++ b/fs/squashfs/lz4_wrapper.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2013, 2014
+ * Phillip Lougher <phillip at squashfs.org.uk>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <types.h>
+#include <linux/mutex.h>
+#include <linux/lz4.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+#define LZ4_LEGACY	1
+
+struct lz4_comp_opts {
+	__le32 version;
+	__le32 flags;
+};
+
+struct squashfs_lz4 {
+	void *input;
+	void *output;
+};
+
+
+static void *lz4_comp_opts(struct squashfs_sb_info *msblk,
+	void *buff, int len)
+{
+	struct lz4_comp_opts *comp_opts = buff;
+
+	/* LZ4 compressed filesystems always have compression options */
+	if (comp_opts == NULL || len < sizeof(*comp_opts))
+		return ERR_PTR(-EIO);
+
+	if (le32_to_cpu(comp_opts->version) != LZ4_LEGACY) {
+		/* LZ4 format currently used by the kernel is the 'legacy'
+		 * format */
+		ERROR("Unknown LZ4 version\n");
+		return ERR_PTR(-EINVAL);
+	}
+
+	return NULL;
+}
+
+
+static void *lz4_init(struct squashfs_sb_info *msblk, void *buff)
+{
+	int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
+	struct squashfs_lz4 *stream;
+
+	stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->input = vmalloc(block_size);
+	if (stream->input == NULL)
+		goto failed2;
+	stream->output = vmalloc(block_size);
+	if (stream->output == NULL)
+		goto failed3;
+
+	return stream;
+
+failed3:
+	vfree(stream->input);
+failed2:
+	kfree(stream);
+failed:
+	ERROR("Failed to initialise LZ4 decompressor\n");
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void lz4_free(void *strm)
+{
+	struct squashfs_lz4 *stream = strm;
+
+	if (stream) {
+		vfree(stream->input);
+		vfree(stream->output);
+	}
+	kfree(stream);
+}
+
+
+static int lz4_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	struct squashfs_lz4 *stream = strm;
+	void *buff = stream->input, *data;
+	int avail, i, bytes = length, res;
+	size_t dest_len = output->length;
+
+	for (i = 0; i < b; i++) {
+		avail = min(bytes, msblk->devblksize - offset);
+		memcpy(buff, bh[i] + offset, avail);
+		buff += avail;
+		bytes -= avail;
+		offset = 0;
+		kfree(bh[i]);
+	}
+
+	res = lz4_decompress_unknownoutputsize(stream->input, length,
+					stream->output, &dest_len);
+	if (res)
+		return -EIO;
+
+	bytes = dest_len;
+	data = squashfs_first_page(output);
+	buff = stream->output;
+	while (data) {
+		if (bytes <= PAGE_CACHE_SIZE) {
+			memcpy(data, buff, bytes);
+			break;
+		}
+		memcpy(data, buff, PAGE_CACHE_SIZE);
+		buff += PAGE_CACHE_SIZE;
+		bytes -= PAGE_CACHE_SIZE;
+		data = squashfs_next_page(output);
+	}
+	squashfs_finish_page(output);
+
+	return dest_len;
+}
+
+const struct squashfs_decompressor squashfs_lz4_comp_ops = {
+	.init = lz4_init,
+	.comp_opts = lz4_comp_opts,
+	.free = lz4_free,
+	.decompress = lz4_uncompress,
+	.id = LZ4_COMPRESSION,
+	.name = "lz4",
+	.supported = 1
+};
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 23:51:19 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:51:19 +0200
Subject: [PATCH 1/6] fs: squashfs: port lzo compression support from kernel
Message-ID: <20161021065124.7328-1-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

This ports lzo_wrapper from kernel code and adds some minimal adaptions
to make squashfs lzo compression work in barebox.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Tested-by: Yegor Yefremov <yegorslists at googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig       |  14 +++++
 fs/squashfs/Makefile      |   1 +
 fs/squashfs/lzo_wrapper.c | 129 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 144 insertions(+)
 create mode 100644 fs/squashfs/lzo_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index dc25d93..7a6e5a2 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,20 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_LZO
+	bool "Include support for LZO compressed file systems"
+	default y if LZO_DECOMPRESS
+	depends on FS_SQUASHFS
+	select LZO_DECOMPRESS
+	help
+	  Saying Y here includes support for reading Squashfs file systems
+	  compressed with LZO compression.  LZO compression is mainly
+	  aimed at embedded systems with slower CPUs where the overheads
+	  of zlib are too high.
+
+	  LZO is not the standard compression used in Squashfs and so most
+	  file systems will be readable without selecting this option.
+
 config SQUASHFS_XZ
 	bool "Include support for XZ compressed file systems"
 	default y
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index c0d024c..447e15e 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -11,3 +11,4 @@ obj-y	+= inode.o
 obj-y	+= namei.o
 obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
+obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c
new file mode 100644
index 0000000..834ee29
--- /dev/null
+++ b/fs/squashfs/lzo_wrapper.c
@@ -0,0 +1,129 @@
+/*
+ * Squashfs - a compressed read only filesystem for Linux
+ *
+ * Copyright (c) 2010 LG Electronics
+ * Chan Jeong <chan.jeong at lge.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * lzo_wrapper.c
+ */
+
+#include <common.h>
+#include <linux/mutex.h>
+#include <lzo.h>
+#include <types.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+struct squashfs_lzo {
+	void	*input;
+	void	*output;
+};
+
+static void *lzo_init(struct squashfs_sb_info *msblk, void *buff)
+{
+	int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
+
+	struct squashfs_lzo *stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->input = vmalloc(block_size);
+	if (stream->input == NULL)
+		goto failed;
+	stream->output = vmalloc(block_size);
+	if (stream->output == NULL)
+		goto failed2;
+
+	return stream;
+
+failed2:
+	vfree(stream->input);
+failed:
+	ERROR("Failed to allocate lzo workspace\n");
+	kfree(stream);
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void lzo_free(void *strm)
+{
+	struct squashfs_lzo *stream = strm;
+
+	if (stream) {
+		vfree(stream->input);
+		vfree(stream->output);
+	}
+	kfree(stream);
+}
+
+
+static int lzo_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	struct squashfs_lzo *stream = strm;
+	void *buff = stream->input, *data;
+	int avail, i, bytes = length, res;
+	size_t out_len = output->length;
+
+	for (i = 0; i < b; i++) {
+		avail = min(bytes, msblk->devblksize - offset);
+		memcpy(buff, bh[i] + offset, avail);
+		buff += avail;
+		bytes -= avail;
+		offset = 0;
+		kfree(bh[i]);
+	}
+
+	res = lzo1x_decompress_safe(stream->input, (size_t)length,
+					stream->output, &out_len);
+	if (res != LZO_E_OK)
+		goto failed;
+
+	res = bytes = (int)out_len;
+	data = squashfs_first_page(output);
+	buff = stream->output;
+	while (data) {
+		if (bytes <= PAGE_CACHE_SIZE) {
+			memcpy(data, buff, bytes);
+			break;
+		} else {
+			memcpy(data, buff, PAGE_CACHE_SIZE);
+			buff += PAGE_CACHE_SIZE;
+			bytes -= PAGE_CACHE_SIZE;
+			data = squashfs_next_page(output);
+		}
+	}
+	squashfs_finish_page(output);
+
+	return res;
+
+failed:
+	return -EIO;
+}
+
+const struct squashfs_decompressor squashfs_lzo_comp_ops = {
+	.init = lzo_init,
+	.free = lzo_free,
+	.decompress = lzo_uncompress,
+	.id = LZO_COMPRESSION,
+	.name = "lzo",
+	.supported = 1
+};
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 23:51:21 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:51:21 +0200
Subject: [PATCH 3/6] fs: squashfs: port zlib compression support from kernel
In-Reply-To: <20161021065124.7328-1-s.hauer@pengutronix.de>
References: <20161021065124.7328-1-s.hauer@pengutronix.de>
Message-ID: <20161021065124.7328-3-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

As this is the default compression method for squashfs, make this the
default in kconfig selection, too

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig        |  13 +++++
 fs/squashfs/Makefile       |   1 +
 fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 146 insertions(+)
 create mode 100644 fs/squashfs/zlib_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index 9af34c0..2e28e90 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_ZLIB
+	bool "Include support for ZLIB compressed file systems"
+	depends on FS_SQUASHFS
+	select ZLIB
+	default y if ZLIB
+	help
+	  ZLIB compression is the standard compression used by Squashfs
+	  file systems.  It offers a good trade-off between compression
+	  achieved and the amount of CPU time and memory necessary to
+	  compress and decompress.
+
+	  If unsure, say Y.
+
 config SQUASHFS_LZ4
 	bool "Include support for LZ4 compressed file systems"
 	default y if LZ4_DECOMPRESS
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 8590b09..7976e3f 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -13,3 +13,4 @@ obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
+obj-$(CONFIG_SQUASHFS_ZLIB) += zlib_wrapper.o
diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c
new file mode 100644
index 0000000..f422515
--- /dev/null
+++ b/fs/squashfs/zlib_wrapper.c
@@ -0,0 +1,132 @@
+/*
+ * Squashfs - a compressed read only filesystem for Linux
+ *
+ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ * Phillip Lougher <phillip at squashfs.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * zlib_wrapper.c
+ */
+
+
+#include <linux/mutex.h>
+#include <linux/zlib.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+static void *zlib_init(struct squashfs_sb_info *dummy, void *buff)
+{
+	z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->workspace = vmalloc(zlib_inflate_workspacesize());
+	if (stream->workspace == NULL)
+		goto failed;
+
+	return stream;
+
+failed:
+	ERROR("Failed to allocate zlib workspace\n");
+	kfree(stream);
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void zlib_free(void *strm)
+{
+	z_stream *stream = strm;
+
+	if (stream)
+		vfree(stream->workspace);
+	kfree(stream);
+}
+
+
+static int zlib_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	int zlib_err, zlib_init = 0, k = 0;
+	z_stream *stream = strm;
+
+	stream->avail_out = PAGE_CACHE_SIZE;
+	stream->next_out = squashfs_first_page(output);
+	stream->avail_in = 0;
+
+	do {
+		if (stream->avail_in == 0 && k < b) {
+			int avail = min(length, msblk->devblksize - offset);
+			length -= avail;
+			stream->next_in = bh[k] + offset;
+			stream->avail_in = avail;
+			offset = 0;
+		}
+
+		if (stream->avail_out == 0) {
+			stream->next_out = squashfs_next_page(output);
+			if (stream->next_out != NULL)
+				stream->avail_out = PAGE_CACHE_SIZE;
+		}
+
+		if (!zlib_init) {
+			zlib_err = zlib_inflateInit(stream);
+			if (zlib_err != Z_OK) {
+				squashfs_finish_page(output);
+				goto out;
+			}
+			zlib_init = 1;
+		}
+
+		zlib_err = zlib_inflate(stream, Z_SYNC_FLUSH);
+
+		if (stream->avail_in == 0 && k < b)
+			kfree(bh[k++]);
+	} while (zlib_err == Z_OK);
+
+	squashfs_finish_page(output);
+
+	if (zlib_err != Z_STREAM_END)
+		goto out;
+
+	zlib_err = zlib_inflateEnd(stream);
+	if (zlib_err != Z_OK)
+		goto out;
+
+	if (k < b)
+		goto out;
+
+	return stream->total_out;
+
+out:
+	for (; k < b; k++)
+		kfree(bh[k]);
+
+	return -EIO;
+}
+
+const struct squashfs_decompressor squashfs_zlib_comp_ops = {
+	.init = zlib_init,
+	.free = zlib_free,
+	.decompress = zlib_uncompress,
+	.id = ZLIB_COMPRESSION,
+	.name = "zlib",
+	.supported = 1
+};
+
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 23:51:24 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:51:24 +0200
Subject: [PATCH 6/6] fs: squashfs: Do not default on xz
In-Reply-To: <20161021065124.7328-1-s.hauer@pengutronix.de>
References: <20161021065124.7328-1-s.hauer@pengutronix.de>
Message-ID: <20161021065124.7328-6-s.hauer@pengutronix.de>

The default compression algorithm for squashfs is zlib, so only
do a 'default y' there. For xz change to 'default y if the algorithm
is enabled anyway' likke the other compression algorithms do.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index 2e28e90..b84ef75 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -60,7 +60,7 @@ config SQUASHFS_LZO
 
 config SQUASHFS_XZ
 	bool "Include support for XZ compressed file systems"
-	default y
+	default y if XZ_DECOMPRESS
 	depends on FS_SQUASHFS
 	select XZ_DECOMPRESS
 	help
-- 
2.9.3



From s.hauer at pengutronix.de  Thu Oct 20 23:53:02 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:53:02 +0200
Subject: [PATCH 3/5] fs: squashfs: port zlib compression support from
 kernel
In-Reply-To: <CAGm1_ksWRAVPV3JSzxZvap_B=O7oUFw7CV93druAFF8ZGir4Og@mail.gmail.com>
References: <20161004101048.12970-1-ejo@pengutronix.de>
 <20161004101048.12970-4-ejo@pengutronix.de>
 <20161004194020.vmmm35546csmbvnv@pengutronix.de>
 <CAGm1_ksWRAVPV3JSzxZvap_B=O7oUFw7CV93druAFF8ZGir4Og@mail.gmail.com>
Message-ID: <20161021065302.kgbeqbzl36qk7aya@pengutronix.de>

On Fri, Oct 21, 2016 at 08:04:35AM +0200, Yegor Yefremov wrote:
> Hi Enrico,
> 
> On Tue, Oct 4, 2016 at 9:40 PM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> > On Tue, Oct 04, 2016 at 12:10:46PM +0200, Enrico Jorns wrote:
> >> As this is the default compression method for squashfs, make this the
> >> default in kconfig selection, too
> >>
> >> Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
> >> ---
> >>  fs/squashfs/Kconfig        |  20 ++++++-
> >>  fs/squashfs/Makefile       |   1 +
> >>  fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
> >>  3 files changed, 152 insertions(+), 1 deletion(-)
> >>  create mode 100644 fs/squashfs/zlib_wrapper.c
> >>
> >> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
> >> index d2de168..1cb1ac5 100644
> >> --- a/fs/squashfs/Kconfig
> >> +++ b/fs/squashfs/Kconfig
> >> @@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
> >>         embedded systems where low overhead is needed.  Further information
> >>         and tools are available from http://squashfs.sourceforge.net.
> >>
> >> +config SQUASHFS_ZLIB
> >> +     bool "Include support for ZLIB compressed file systems"
> >> +     depends on FS_SQUASHFS
> >> +     select ZLIB
> >> +     default y
> >> +     help
> >> +       ZLIB compression is the standard compression used by Squashfs
> >> +       file systems.  It offers a good trade-off between compression
> >> +       achieved and the amount of CPU time and memory necessary to
> >> +       compress and decompress.
> >> +
> >> +       If unsure, say Y.
> >> +
> >>  config SQUASHFS_LZ4
> >>       bool "Include support for LZ4 compressed file systems"
> >>       depends on FS_SQUASHFS
> >> @@ -30,9 +43,10 @@ config SQUASHFS_LZ4
> >>         LZ4 is not the standard compression used in Squashfs and so most
> >>         file systems will be readable without selecting this option.
> >>
> >> +       If unsure, say N.
> >> +
> >>  config SQUASHFS_LZO
> >>       bool "Include support for LZO compressed file systems"
> >> -     default y
> >>       depends on FS_SQUASHFS
> >>       select LZO_DECOMPRESS
> >>       help
> >> @@ -44,6 +58,8 @@ config SQUASHFS_LZO
> >>         LZO is not the standard compression used in Squashfs and so most
> >>         file systems will be readable without selecting this option.
> >>
> >> +       If unsure, say N.
> >> +
> >>  config SQUASHFS_XZ
> >>       bool "Include support for XZ compressed file systems"
> >>       default y
> >> @@ -57,3 +73,5 @@ config SQUASHFS_XZ
> >>
> >>         XZ is not the standard compression used in Squashfs and so most
> >>         file systems will be readable without selecting this option.
> >> +
> >> +       If unsure, say N.
> >
> > Here unrelated Kconfig entries are changed. Also in the end we get
> > "default y" for SQUASHFS_XZ along with the help "If unsure, say N."
> > which seems inconsistent.
> 
> Care to send v2?

Enrico is on holiday, so I just did.

> 
> @Sascha what is the plan as to the default compression selection?
> Leave XZ or set it to ZLIB? I'm open for both options.

In the new series I enabled zlib as default since this is what the
kconfig help text says. For the others I chose a "Enable it when the
algorithm is enabled anyway"

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Oct 20 23:54:04 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 08:54:04 +0200
Subject: [PATCH] arm: Baltos: don't invoke baltos_read_eeprom in MLO
In-Reply-To: <1476961248-24425-1-git-send-email-yegorslists@googlemail.com>
References: <1476961248-24425-1-git-send-email-yegorslists@googlemail.com>
Message-ID: <20161021065404.g7riycmcbkw3ligo@pengutronix.de>

On Thu, Oct 20, 2016 at 01:00:48PM +0200, yegorslists at googlemail.com wrote:
> From: Yegor Yefremov <yegorslists at googlemail.com>
> 
> EEPROM information is needed in barebox.bin in order to setup MACs and
> select appropriate DTB from kernel-fit.itb, so disable this initcall
> in MLO.
> 
> Signed-off-by: Yegor Yefremov <yegorslists at googlemail.com>
> ---
>  arch/arm/boards/vscom-baltos/board.c | 2 ++
>  1 file changed, 2 insertions(+)

Applied, thanks

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct 21 00:11:47 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 09:11:47 +0200
Subject: [PATCH 1/2] nand: imx6: Changed default NAND clock
In-Reply-To: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
References: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
Message-ID: <20161021071147.iacxwcdqz7sx7gs2@pengutronix.de>

On Thu, Oct 20, 2016 at 03:40:06PM +0200, Christian Hemp wrote:
> From: Daniel Schultz <d.schultz at phytec.de>
> 
> The Barebox recognized false bad erase blocks while booting from a
> Spansion NAND (1). This error occurred due a to high clock. The
> Kernel sets the default NAND clock to 22Mhz. So, to fix this error and
> to be more identical with the Kernel, the Barebox should be too.

The timing is changed afterwards to a faster mode and the clock is
changed again. Does that work for you properly?

Sascha

> 
> 1: nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
> S34ML08G2), 1024MiB, page size: 2048, OOB size: 128
> 
> Signed-off-by: Daniel Schultz <d.schultz at phytec.de>
> Tested-by: Stefan Lengfeld <s.lengfeld at phytec.de>
> Signed-off-by: Christian Hemp <c.hemp at phytec.de>
> ---
>  drivers/mtd/nand/nand_mxs.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
> index 01aa063..fe955e8 100644
> --- a/drivers/mtd/nand/nand_mxs.c
> +++ b/drivers/mtd/nand/nand_mxs.c
> @@ -2145,7 +2145,7 @@ static int mxs_nand_probe(struct device_d *dev)
>  
>  	if (mxs_nand_is_imx6(nand_info)) {
>  		clk_disable(nand_info->clk);
> -		clk_set_rate(nand_info->clk, 96000000);
> +		clk_set_rate(nand_info->clk, 22000000);
>  		clk_enable(nand_info->clk);
>  		nand_info->dma_channel_base = 0;
>  	} else {
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct 21 00:18:08 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 09:18:08 +0200
Subject: [PATCH 2/2] mtd: nand: nand_mxs: Fix readtotal calculation
In-Reply-To: <1476970807-43811-2-git-send-email-c.hemp@phytec.de>
References: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
 <1476970807-43811-2-git-send-email-c.hemp@phytec.de>
Message-ID: <20161021071808.ygaw53zjn3x5ns6f@pengutronix.de>

On Thu, Oct 20, 2016 at 03:40:07PM +0200, Christian Hemp wrote:
> The calculation of readtotal must be bit alligend. If not the bch core
> finds bit flips in every page, because readtotal is too small.
> This bug was mostly introduced since commit "51061a9 mtd: nand: nand_mxs:
> Add subpage read support".

Is this somehow related to:

http://lists.infradead.org/pipermail/linux-mtd/2016-June/068243.html

Or is this another topic?

Sascha

> 
> Tested with:
> nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
> S34ML08G2), 1024MiB, page size: 2048, OOB size: 128
> 
> nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron
> MT29F4G08ABADAWP), 512MiB, page size: 2048, OOB size: 64
> 
> nand: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND
> 1GiB 3,3V 8-bit), 1024MiB, page size: 2048, OOB size: 64
> 
> Signed-off-by: Christian Hemp <c.hemp at phytec.de>
> Signed-off-by: Stefan Lengfeld <s.lengfeld at phytec.de>
> ---
>  drivers/mtd/nand/nand_mxs.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
> index fe955e8..cba0bee 100644
> --- a/drivers/mtd/nand/nand_mxs.c
> +++ b/drivers/mtd/nand/nand_mxs.c
> @@ -728,15 +728,15 @@ static int __mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand
>  	uint32_t corrected = 0, failed = 0;
>  	uint8_t	*status;
>  	unsigned int  max_bitflips = 0;
> -	int i, ret, readtotal, nchunks, eccstrength, ecc_parity_size;
> +	int i, ret, readtotal, nchunks, eccstrength;
>  
>  	eccstrength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
>  
>  	readlen = roundup(readlen, MXS_NAND_CHUNK_DATA_CHUNK_SIZE);
>  	nchunks = mxs_nand_ecc_chunk_cnt(readlen);
> -	ecc_parity_size = 13 * eccstrength / 8;
> -	readtotal = MXS_NAND_METADATA_SIZE +
> -		(MXS_NAND_CHUNK_DATA_CHUNK_SIZE + ecc_parity_size) * nchunks;
> +	readtotal =  MXS_NAND_METADATA_SIZE;
> +	readtotal += MXS_NAND_CHUNK_DATA_CHUNK_SIZE * nchunks;
> +	readtotal += DIV_ROUND_UP(13 * eccstrength * nchunks, 8);
>  
>  	mxs_nand_config_bch(mtd, readtotal);
>  
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct 21 00:18:49 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 09:18:49 +0200
Subject: [PATCH] pinctrl: mvebu: fix a comment about mv78460
In-Reply-To: <20161020190355.20181-1-u.kleine-koenig@pengutronix.de>
References: <20161020190355.20181-1-u.kleine-koenig@pengutronix.de>
Message-ID: <20161021071849.gt4a7i65gk4mooiz@pengutronix.de>

On Thu, Oct 20, 2016 at 09:03:55PM +0200, Uwe Kleine-K?nig wrote:
> It's pin mpp57 that has function vdd/cpu2-3-pd
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
>  drivers/pinctrl/mvebu/armada-xp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha

> 
> diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c
> index f1bc8b498aac..f2e6b0d38f7b 100644
> --- a/drivers/pinctrl/mvebu/armada-xp.c
> +++ b/drivers/pinctrl/mvebu/armada-xp.c
> @@ -16,7 +16,7 @@
>   * both have 67 MPP pins (more GPIOs and address lines for the memory
>   * bus mainly). The only difference between the mv78260 and the
>   * mv78460 in terms of pin muxing is the addition of two functions on
> - * pins 43 and 56 to access the VDD of the CPU2 and 3 (mv78260 has two
> + * pins 43 and 57 to access the VDD of the CPU2 and 3 (mv78260 has two
>   * cores, mv78460 has four cores).
>   */
>  
> -- 
> 2.8.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Fri Oct 21 00:39:59 2016
From: jbe at pengutronix.de (Juergen Borleis)
Date: Fri, 21 Oct 2016 09:39:59 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2ByvooXXYw+KKZSKvX0CPf43XABHn1-CUNd+qguCkRTeA@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2DgadsiAhdVaSb+teN8MPJMwpLNF0RXWyvOf98=hOSo9Q@mail.gmail.com>
 <CABvwO2ByvooXXYw+KKZSKvX0CPf43XABHn1-CUNd+qguCkRTeA@mail.gmail.com>
Message-ID: <201610210939.59537.jbe@pengutronix.de>

Hi Javier,

On Thursday 20 October 2016 19:59:54 Javier Fileiv wrote:
> ups... I think Ive broken everything... I just put at the end of the
> env/config file "boot nand" and now is looping and at some point it
> says "ERROR: out of memory".
> Another thing... I changed vivibootloader in NOR for the barebox, and
> even if I change to NOR it's looping again and again... What do I do?
> HELP!

Seems you configured your board into a brick. You now can boot from NOR and 
short some data lines pins at the NAND device to make barebox fail to read its 
environment from NAND and fall back to the built-in default environment 
without that loop.
Or you need some JTAG equipment to make the SoC working again.

Cheers,
Juergen

-- 
Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| Juergen Borleis ? ? ? ? ? ? |
Industrial Linux Solutions ? ? ? ? ? ? ? ? ? ?| http://www.pengutronix.de/ ?|


From javier.fileiv at gmail.com  Fri Oct 21 00:41:15 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Fri, 21 Oct 2016 09:41:15 +0200
Subject: Loading kernel issues
In-Reply-To: <201610210939.59537.jbe@pengutronix.de>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <CABvwO2DgadsiAhdVaSb+teN8MPJMwpLNF0RXWyvOf98=hOSo9Q@mail.gmail.com>
 <CABvwO2ByvooXXYw+KKZSKvX0CPf43XABHn1-CUNd+qguCkRTeA@mail.gmail.com>
 <201610210939.59537.jbe@pengutronix.de>
Message-ID: <CABvwO2C0MZGk2CC-v=67-Og7n4SZqSpdCfiZBz0QZTTfeckp1w@mail.gmail.com>

Hello Juerguen, I was looking to buy an ARM9 Jtag because it's what I
though... I would need a JTAG.

Regarding shorting the data lines... do you know exactly what would I
need to do?

Regarding JTAG, which ones are the steps?


Thank you so much

2016-10-21 9:39 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
> Hi Javier,
>
> On Thursday 20 October 2016 19:59:54 Javier Fileiv wrote:
>> ups... I think Ive broken everything... I just put at the end of the
>> env/config file "boot nand" and now is looping and at some point it
>> says "ERROR: out of memory".
>> Another thing... I changed vivibootloader in NOR for the barebox, and
>> even if I change to NOR it's looping again and again... What do I do?
>> HELP!
>
> Seems you configured your board into a brick. You now can boot from NOR and
> short some data lines pins at the NAND device to make barebox fail to read its
> environment from NAND and fall back to the built-in default environment
> without that loop.
> Or you need some JTAG equipment to make the SoC working again.
>
> Cheers,
> Juergen
>
> --
> Pengutronix e.K.                              | Juergen Borleis             |
> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From jbe at pengutronix.de  Fri Oct 21 00:53:45 2016
From: jbe at pengutronix.de (Juergen Borleis)
Date: Fri, 21 Oct 2016 09:53:45 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2C0MZGk2CC-v=67-Og7n4SZqSpdCfiZBz0QZTTfeckp1w@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610210939.59537.jbe@pengutronix.de>
 <CABvwO2C0MZGk2CC-v=67-Og7n4SZqSpdCfiZBz0QZTTfeckp1w@mail.gmail.com>
Message-ID: <201610210953.45417.jbe@pengutronix.de>

Hi Javier,

On Friday 21 October 2016 09:41:15 Javier Fileiv wrote:
> I was looking to buy an ARM9 Jtag because it's what I
> though... I would need a JTAG.
>
> Regarding shorting the data lines... do you know exactly what would I
> need to do?

Reading the datasheet of the used NAND device, find its datalines, find them on 
the Mini2440, configure the board to boot from NOR, short two of the eight 
datalines and power the board.

> Regarding JTAG, which ones are the steps?

Sorry, no idea. Never used it on Mini2440.

Cheers,
Juergen

-- 
Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| Juergen Borleis ? ? ? ? ? ? |
Industrial Linux Solutions ? ? ? ? ? ? ? ? ? ?| http://www.pengutronix.de/ ?|


From javier.fileiv at gmail.com  Fri Oct 21 00:54:04 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Fri, 21 Oct 2016 09:54:04 +0200
Subject: Loading kernel issues
In-Reply-To: <201610210953.45417.jbe@pengutronix.de>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610210939.59537.jbe@pengutronix.de>
 <CABvwO2C0MZGk2CC-v=67-Og7n4SZqSpdCfiZBz0QZTTfeckp1w@mail.gmail.com>
 <201610210953.45417.jbe@pengutronix.de>
Message-ID: <CABvwO2A6_mU3DzbWp9p=9NcvWeZGpni8GPL7x0qaLT2K1vXaog@mail.gmail.com>

Thanks Juergen, shoul I short them between them, short them to GND or
short them to VDD?

Thank you again

2016-10-21 9:53 GMT+02:00 Juergen Borleis <jbe at pengutronix.de>:
> Hi Javier,
>
> On Friday 21 October 2016 09:41:15 Javier Fileiv wrote:
>> I was looking to buy an ARM9 Jtag because it's what I
>> though... I would need a JTAG.
>>
>> Regarding shorting the data lines... do you know exactly what would I
>> need to do?
>
> Reading the datasheet of the used NAND device, find its datalines, find them on
> the Mini2440, configure the board to boot from NOR, short two of the eight
> datalines and power the board.
>
>> Regarding JTAG, which ones are the steps?
>
> Sorry, no idea. Never used it on Mini2440.
>
> Cheers,
> Juergen
>
> --
> Pengutronix e.K.                              | Juergen Borleis             |
> Industrial Linux Solutions                    | http://www.pengutronix.de/  |


From gianlucarenzi at eurekelettronica.it  Fri Oct 21 01:02:44 2016
From: gianlucarenzi at eurekelettronica.it (gianluca)
Date: Fri, 21 Oct 2016 10:02:44 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2A6_mU3DzbWp9p=9NcvWeZGpni8GPL7x0qaLT2K1vXaog@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610210939.59537.jbe@pengutronix.de>
 <CABvwO2C0MZGk2CC-v=67-Og7n4SZqSpdCfiZBz0QZTTfeckp1w@mail.gmail.com>
 <201610210953.45417.jbe@pengutronix.de>
 <CABvwO2A6_mU3DzbWp9p=9NcvWeZGpni8GPL7x0qaLT2K1vXaog@mail.gmail.com>
Message-ID: <335f085d-3435-c643-5cef-ba19e477b6ae@eurekelettronica.it>

On 10/21/2016 09:54 AM, Javier Fileiv wrote:
> Thanks Juergen, shoul I short them between them, short them to GND or
> short them to VDD?
>

Short them together. Does not care if they are tied to GND or VCC, the 
results are surely invalid. ;-)

Best regards,
-- 
Eurek s.r.l.                          |
Electronic Engineering                | http://www.eurek.it
via Celletta 8/B, 40026 Imola, Italy  | Phone: +39-(0)542-609120
p.iva 00690621206 - c.f. 04020030377  | Fax:   +39-(0)542-609212


From jbe at pengutronix.de  Fri Oct 21 01:05:05 2016
From: jbe at pengutronix.de (Juergen Borleis)
Date: Fri, 21 Oct 2016 10:05:05 +0200
Subject: Loading kernel issues
In-Reply-To: <CABvwO2A6_mU3DzbWp9p=9NcvWeZGpni8GPL7x0qaLT2K1vXaog@mail.gmail.com>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610210953.45417.jbe@pengutronix.de>
 <CABvwO2A6_mU3DzbWp9p=9NcvWeZGpni8GPL7x0qaLT2K1vXaog@mail.gmail.com>
Message-ID: <201610211005.05443.jbe@pengutronix.de>

Hi Javier,

On Friday 21 October 2016 09:54:04 Javier Fileiv wrote:
> shoul I short them between them, short them to GND or
> short them to VDD?

"short two of them" means between them. D2 and D3 for example...

Cheers,
Juergen

-- 
Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| Juergen Borleis ? ? ? ? ? ? |
Industrial Linux Solutions ? ? ? ? ? ? ? ? ? ?| http://www.pengutronix.de/ ?|

From s.hauer at pengutronix.de  Fri Oct 21 01:07:28 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 10:07:28 +0200
Subject: Loading kernel issues
In-Reply-To: <201610210953.45417.jbe@pengutronix.de>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610210939.59537.jbe@pengutronix.de>
 <CABvwO2C0MZGk2CC-v=67-Og7n4SZqSpdCfiZBz0QZTTfeckp1w@mail.gmail.com>
 <201610210953.45417.jbe@pengutronix.de>
Message-ID: <20161021080728.4i3bulijw7wtxdqs@pengutronix.de>

On Fri, Oct 21, 2016 at 09:53:45AM +0200, Juergen Borleis wrote:
> Hi Javier,
> 
> On Friday 21 October 2016 09:41:15 Javier Fileiv wrote:
> > I was looking to buy an ARM9 Jtag because it's what I
> > though... I would need a JTAG.
> >
> > Regarding shorting the data lines... do you know exactly what would I
> > need to do?
> 
> Reading the datasheet of the used NAND device, find its datalines, find them on 
> the Mini2440, configure the board to boot from NOR, short two of the eight 
> datalines and power the board.

The best would be to find two which are exactly next to each other so
you can short circuit them with a knitting needle or similar.

When you flash a new barebox to NOR flash make sure you flash one that
doesn't get its environment from NAND, so comment out the following
lines in the board file:

	devfs_del_partition("env_raw");
	devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
	dev_add_bb_dev("env_raw", "env0");

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From javier.fileiv at gmail.com  Fri Oct 21 01:11:55 2016
From: javier.fileiv at gmail.com (Javier Fileiv)
Date: Fri, 21 Oct 2016 10:11:55 +0200
Subject: Loading kernel issues
In-Reply-To: <20161021080728.4i3bulijw7wtxdqs@pengutronix.de>
References: <CABvwO2ARpHSzYE6Y3JrfFAQ2jEzw3EXfP36goL6kPogcBbNLKQ@mail.gmail.com>
 <201610210939.59537.jbe@pengutronix.de>
 <CABvwO2C0MZGk2CC-v=67-Og7n4SZqSpdCfiZBz0QZTTfeckp1w@mail.gmail.com>
 <201610210953.45417.jbe@pengutronix.de>
 <20161021080728.4i3bulijw7wtxdqs@pengutronix.de>
Message-ID: <CABvwO2B_vjaFkyKZXx-gzCdwXVVJ-UeodD6MOsBLvPBT_6P7iw@mail.gmail.com>

I thought that, by default, the NOR bootloader was setting it's config
files in NOR as well. But it seems that both bootloader are getting
the same config file.
I will switch to NOR, short the two right data lines, short them,
start the mini board. And at that point I will change back the
/env/config file. After that will re build barebox with that lines you
told me, commented out. And re flash barebox to NOR!

Thank you very much guys, will tell you my advance.

2016-10-21 10:07 GMT+02:00 Sascha Hauer <s.hauer at pengutronix.de>:
> On Fri, Oct 21, 2016 at 09:53:45AM +0200, Juergen Borleis wrote:
>> Hi Javier,
>>
>> On Friday 21 October 2016 09:41:15 Javier Fileiv wrote:
>> > I was looking to buy an ARM9 Jtag because it's what I
>> > though... I would need a JTAG.
>> >
>> > Regarding shorting the data lines... do you know exactly what would I
>> > need to do?
>>
>> Reading the datasheet of the used NAND device, find its datalines, find them on
>> the Mini2440, configure the board to boot from NOR, short two of the eight
>> datalines and power the board.
>
> The best would be to find two which are exactly next to each other so
> you can short circuit them with a knitting needle or similar.
>
> When you flash a new barebox to NOR flash make sure you flash one that
> doesn't get its environment from NAND, so comment out the following
> lines in the board file:
>
>         devfs_del_partition("env_raw");
>         devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
>         dev_add_bb_dev("env_raw", "env0");
>
> Sascha
>
> --
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From daniel.krueger at systec-electronic.com  Fri Oct 21 01:16:53 2016
From: daniel.krueger at systec-electronic.com (=?UTF-8?Q?Daniel_Kr=c3=bcger?=)
Date: Fri, 21 Oct 2016 10:16:53 +0200
Subject: Compressed DTB - builtin DTB
In-Reply-To: <20161014095219.6qsyhajp2bffsc64@pengutronix.de>
References: <03214122-b05b-fc45-1e32-ad2832ca36d3@systec-electronic.com>
 <20161014095219.6qsyhajp2bffsc64@pengutronix.de>
Message-ID: <d6c5169f-788e-ff34-1953-fb9014822a72@systec-electronic.com>

Hi Sascha,

Am 14.10.2016 um 11:52 schrieb Sascha Hauer:
>
> No, indeed that's not intended. Could you test the appended patch? It
> should solve this.

Thanks. The patch works for me.


>> Just using the compressed DTB would be really good. Because it makes the
>> image much smaller. However, how should that be done? The extract code might
>> be simple. But I don't have an idea how to let the linker select the right
>> version.
>
> If you are using uncompressed binary you should switch to PBL support to
> get a compressed binary. Then, if you are using PBL the dtb is
> compressed already as part of the whole binary.

I will try that.

Best regards,
   Daniel

-- 

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund

Telefon : +49 (0) 3765 38600-0
Fax     : +49 (0) 3765 38600-4100
Email   : daniel.krueger at systec-electronic.com
Website : http://www.systec-electronic.com

Managing Directors  :
   Dipl.-Phys. Siegmar Schmidt, Dipl. Ing. (FH) Armin von Collrepp
Commercial registry : Amtsgericht Chemnitz, HRB 28082
USt.-Id Nr.         : DE150534010



From daniel.krueger at systec-electronic.com  Fri Oct 21 01:23:55 2016
From: daniel.krueger at systec-electronic.com (=?UTF-8?Q?Daniel_Kr=c3=bcger?=)
Date: Fri, 21 Oct 2016 10:23:55 +0200
Subject: [PATCH 6/6] fs: squashfs: Do not default on xz
In-Reply-To: <20161021065124.7328-6-s.hauer@pengutronix.de>
References: <20161021065124.7328-1-s.hauer@pengutronix.de>
 <20161021065124.7328-6-s.hauer@pengutronix.de>
Message-ID: <fa561303-8330-208b-3588-bf9f4807d8cd@systec-electronic.com>

Hi Sascha,

I tried this patch series, because I need Squashfs zlib support.

I get the following output during configuration/build:
 >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
scripts/kconfig/conf --silentoldconfig Kconfig
lib/lzo/Kconfig:1:error: recursive dependency detected!
lib/lzo/Kconfig:1:	symbol LZO_DECOMPRESS is selected by SQUASHFS_LZO
fs/squashfs/Kconfig:49:	symbol SQUASHFS_LZO depends on LZO_DECOMPRESS
lib/Kconfig:21:error: recursive dependency detected!
lib/Kconfig:21:	symbol XZ_DECOMPRESS is selected by SQUASHFS_XZ
fs/squashfs/Kconfig:63:	symbol SQUASHFS_XZ depends on XZ_DECOMPRESS
lib/Kconfig:9:error: recursive dependency detected!
lib/Kconfig:9:	symbol ZLIB is selected by SQUASHFS_ZLIB
fs/squashfs/Kconfig:24:	symbol SQUASHFS_ZLIB depends on ZLIB
lib/Kconfig:17:error: recursive dependency detected!
lib/Kconfig:17:	symbol LZ4_DECOMPRESS is selected by SQUASHFS_LZ4
fs/squashfs/Kconfig:35:	symbol SQUASHFS_LZ4 depends on LZ4_DECOMPRESS
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<

cu,
   Daniel

Am 21.10.2016 um 08:51 schrieb Sascha Hauer:
> The default compression algorithm for squashfs is zlib, so only
> do a 'default y' there. For xz change to 'default y if the algorithm
> is enabled anyway' likke the other compression algorithms do.
>
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>  fs/squashfs/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
> index 2e28e90..b84ef75 100644
> --- a/fs/squashfs/Kconfig
> +++ b/fs/squashfs/Kconfig
> @@ -60,7 +60,7 @@ config SQUASHFS_LZO
>
>  config SQUASHFS_XZ
>  	bool "Include support for XZ compressed file systems"
> -	default y
> +	default y if XZ_DECOMPRESS
>  	depends on FS_SQUASHFS
>  	select XZ_DECOMPRESS
>  	help
>

-- 

SYS TEC electronic GmbH
Am Windrad 2
08468 Heinsdorfergrund

Telefon : +49 (0) 3765 38600-0
Fax     : +49 (0) 3765 38600-4100
Email   : daniel.krueger at systec-electronic.com
Website : http://www.systec-electronic.com

Managing Directors  :
   Dipl.-Phys. Siegmar Schmidt, Dipl. Ing. (FH) Armin von Collrepp
Commercial registry : Amtsgericht Chemnitz, HRB 28082
USt.-Id Nr.         : DE150534010



From t.remmet at phytec.de  Fri Oct 21 02:45:41 2016
From: t.remmet at phytec.de (Teresa Remmet)
Date: Fri, 21 Oct 2016 11:45:41 +0200
Subject: [PATCH 2/2] ARM: dts: am33xx.dtsi: Add spi aliases
In-Reply-To: <1477043141-27884-1-git-send-email-t.remmet@phytec.de>
References: <1477043141-27884-1-git-send-email-t.remmet@phytec.de>
Message-ID: <1477043141-27884-2-git-send-email-t.remmet@phytec.de>

We need to add the spi aliases to set the bus number correct in
the driver.

Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
---
 arch/arm/dts/am33xx.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index 7ba0a0b..f1ee7b3 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -18,5 +18,7 @@
 		mmc0 = &mmc1;
 		mmc1 = &mmc2;
 		mmc2 = &mmc3;
+		spi0 = &spi0;
+		spi1 = &spi1;
 	};
 };
-- 
1.9.1



From t.remmet at phytec.de  Fri Oct 21 02:45:40 2016
From: t.remmet at phytec.de (Teresa Remmet)
Date: Fri, 21 Oct 2016 11:45:40 +0200
Subject: [PATCH 1/2] ARM: dts: am33xx: Make am33xx-strip.dtsi independent
Message-ID: <1477043141-27884-1-git-send-email-t.remmet@phytec.de>

am33xx-strip.dtsi was used to remove unused nodes in the MLO device tree.
It always required the am33xx.dtsi include. But if we add aliases to the
am33xx.dtsi, where the nodes are beeing deleted in the am33xx-strip.dtsi
we get compile errors. So made am33xx-strip.dtsi independent from am33xx.dtsi
and renamed it to am33xx-mlo.dtsi.

Also added spi0 alias to am33xx-mlo.dtsi.

Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
---
 arch/arm/dts/am335x-bone-common.dts                 | 3 +--
 arch/arm/dts/am335x-phytec-phycard-som-mlo.dts      | 3 +--
 arch/arm/dts/am335x-phytec-phycore-som-mlo.dts      | 3 +--
 arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts      | 3 +--
 arch/arm/dts/{am33xx-strip.dtsi => am33xx-mlo.dtsi} | 9 ++++++++-
 5 files changed, 12 insertions(+), 9 deletions(-)
 rename arch/arm/dts/{am33xx-strip.dtsi => am33xx-mlo.dtsi} (87%)

diff --git a/arch/arm/dts/am335x-bone-common.dts b/arch/arm/dts/am335x-bone-common.dts
index 0488cbe..63962df 100644
--- a/arch/arm/dts/am335x-bone-common.dts
+++ b/arch/arm/dts/am335x-bone-common.dts
@@ -7,8 +7,7 @@
  * all we need for the MLO
  */
 
-#include "am33xx.dtsi"
-#include "am33xx-strip.dtsi"
+#include "am33xx-mlo.dtsi"
 #include "am33xx-clocks-strip.dtsi"
 #include "am335x-bone-common.dtsi"
 
diff --git a/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts b/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts
index a1755fd..817093b 100644
--- a/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts
+++ b/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts
@@ -7,9 +7,8 @@
  */
 /dts-v1/;
 
-#include "am33xx.dtsi"
+#include "am33xx-mlo.dtsi"
 #include "am335x-phytec-phycard-som.dtsi"
-#include "am33xx-strip.dtsi"
 #include "am33xx-clocks-strip.dtsi"
 
 / {
diff --git a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
index f7bc462..817b672 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
@@ -7,9 +7,8 @@
  */
 /dts-v1/;
 
-#include "am33xx.dtsi"
+#include "am33xx-mlo.dtsi"
 #include "am335x-phytec-phycore-som.dtsi"
-#include "am33xx-strip.dtsi"
 #include "am33xx-clocks-strip.dtsi"
 
 / {
diff --git a/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
index e848a29..cf36c4c 100644
--- a/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
+++ b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
@@ -7,9 +7,8 @@
  */
 /dts-v1/;
 
-#include "am33xx.dtsi"
+#include "am33xx-mlo.dtsi"
 #include "am335x-phytec-phyflex-som.dtsi"
-#include "am33xx-strip.dtsi"
 #include "am33xx-clocks-strip.dtsi"
 
 / {
diff --git a/arch/arm/dts/am33xx-strip.dtsi b/arch/arm/dts/am33xx-mlo.dtsi
similarity index 87%
rename from arch/arm/dts/am33xx-strip.dtsi
rename to arch/arm/dts/am33xx-mlo.dtsi
index 2943fd1..36f137b 100644
--- a/arch/arm/dts/am33xx-strip.dtsi
+++ b/arch/arm/dts/am33xx-mlo.dtsi
@@ -6,12 +6,19 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include <arm/am33xx.dtsi>
 
 / {
 	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
+		mmc0 = &mmc1;
+		mmc1 = &mmc2;
+		spi0 = &spi0;
 		/delete-property/ i2c1;
 		/delete-property/ i2c2;
-		/delete-property/ mmc2;
 		/delete-property/ d_can0;
 		/delete-property/ d_can1;
 	};
-- 
1.9.1



From s.hauer at pengutronix.de  Fri Oct 21 02:48:58 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 21 Oct 2016 11:48:58 +0200
Subject: [PATCH 6/6] fs: squashfs: Do not default on xz
In-Reply-To: <fa561303-8330-208b-3588-bf9f4807d8cd@systec-electronic.com>
References: <20161021065124.7328-1-s.hauer@pengutronix.de>
 <20161021065124.7328-6-s.hauer@pengutronix.de>
 <fa561303-8330-208b-3588-bf9f4807d8cd@systec-electronic.com>
Message-ID: <20161021094858.6ttowohdw5n3mrfk@pengutronix.de>

On Fri, Oct 21, 2016 at 10:23:55AM +0200, Daniel Kr?ger wrote:
> Hi Sascha,
> 
> I tried this patch series, because I need Squashfs zlib support.
> 
> I get the following output during configuration/build:
> >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
> scripts/kconfig/conf --silentoldconfig Kconfig
> lib/lzo/Kconfig:1:error: recursive dependency detected!
> lib/lzo/Kconfig:1:	symbol LZO_DECOMPRESS is selected by SQUASHFS_LZO
> fs/squashfs/Kconfig:49:	symbol SQUASHFS_LZO depends on LZO_DECOMPRESS
> lib/Kconfig:21:error: recursive dependency detected!
> lib/Kconfig:21:	symbol XZ_DECOMPRESS is selected by SQUASHFS_XZ
> fs/squashfs/Kconfig:63:	symbol SQUASHFS_XZ depends on XZ_DECOMPRESS
> lib/Kconfig:9:error: recursive dependency detected!
> lib/Kconfig:9:	symbol ZLIB is selected by SQUASHFS_ZLIB
> fs/squashfs/Kconfig:24:	symbol SQUASHFS_ZLIB depends on ZLIB
> lib/Kconfig:17:error: recursive dependency detected!
> lib/Kconfig:17:	symbol LZ4_DECOMPRESS is selected by SQUASHFS_LZ4
> fs/squashfs/Kconfig:35:	symbol SQUASHFS_LZ4 depends on LZ4_DECOMPRESS
> <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<

What a pity, then this does not work like this. I'll rework it.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Sun Oct 23 22:51:42 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 07:51:42 +0200
Subject: Compressed DTB - builtin DTB
In-Reply-To: <d6c5169f-788e-ff34-1953-fb9014822a72@systec-electronic.com>
References: <03214122-b05b-fc45-1e32-ad2832ca36d3@systec-electronic.com>
 <20161014095219.6qsyhajp2bffsc64@pengutronix.de>
 <d6c5169f-788e-ff34-1953-fb9014822a72@systec-electronic.com>
Message-ID: <20161024055142.fg43lakiw3jawnfc@pengutronix.de>

On Fri, Oct 21, 2016 at 10:16:53AM +0200, Daniel Kr?ger wrote:
> Hi Sascha,
> 
> Am 14.10.2016 um 11:52 schrieb Sascha Hauer:
> > 
> > No, indeed that's not intended. Could you test the appended patch? It
> > should solve this.
> 
> Thanks. The patch works for me.

Ok, applied that with your tested-by.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From t.remmet at phytec.de  Sun Oct 23 23:07:53 2016
From: t.remmet at phytec.de (Teresa Remmet)
Date: Mon, 24 Oct 2016 08:07:53 +0200
Subject: [PATCH 1/2] ARM: dts: am33xx: Make am33xx-strip.dtsi independent
In-Reply-To: <1477043141-27884-1-git-send-email-t.remmet@phytec.de>
References: <1477043141-27884-1-git-send-email-t.remmet@phytec.de>
Message-ID: <1477289273.3313.1.camel@lws-tremmet.phytec.de>

Please forget about this one. There is a far more easier way to go.
I will send a new patch.

Teresa

Am Freitag, den 21.10.2016, 11:45 +0200 schrieb Teresa Remmet:
> am33xx-strip.dtsi was used to remove unused nodes in the MLO device tree.
> It always required the am33xx.dtsi include. But if we add aliases to the
> am33xx.dtsi, where the nodes are beeing deleted in the am33xx-strip.dtsi
> we get compile errors. So made am33xx-strip.dtsi independent from am33xx.dtsi
> and renamed it to am33xx-mlo.dtsi.
> 
> Also added spi0 alias to am33xx-mlo.dtsi.
> 
> Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
> ---
>  arch/arm/dts/am335x-bone-common.dts                 | 3 +--
>  arch/arm/dts/am335x-phytec-phycard-som-mlo.dts      | 3 +--
>  arch/arm/dts/am335x-phytec-phycore-som-mlo.dts      | 3 +--
>  arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts      | 3 +--
>  arch/arm/dts/{am33xx-strip.dtsi => am33xx-mlo.dtsi} | 9 ++++++++-
>  5 files changed, 12 insertions(+), 9 deletions(-)
>  rename arch/arm/dts/{am33xx-strip.dtsi => am33xx-mlo.dtsi} (87%)
> 
> diff --git a/arch/arm/dts/am335x-bone-common.dts b/arch/arm/dts/am335x-bone-common.dts
> index 0488cbe..63962df 100644
> --- a/arch/arm/dts/am335x-bone-common.dts
> +++ b/arch/arm/dts/am335x-bone-common.dts
> @@ -7,8 +7,7 @@
>   * all we need for the MLO
>   */
>  
> -#include "am33xx.dtsi"
> -#include "am33xx-strip.dtsi"
> +#include "am33xx-mlo.dtsi"
>  #include "am33xx-clocks-strip.dtsi"
>  #include "am335x-bone-common.dtsi"
>  
> diff --git a/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts b/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts
> index a1755fd..817093b 100644
> --- a/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts
> +++ b/arch/arm/dts/am335x-phytec-phycard-som-mlo.dts
> @@ -7,9 +7,8 @@
>   */
>  /dts-v1/;
>  
> -#include "am33xx.dtsi"
> +#include "am33xx-mlo.dtsi"
>  #include "am335x-phytec-phycard-som.dtsi"
> -#include "am33xx-strip.dtsi"
>  #include "am33xx-clocks-strip.dtsi"
>  
>  / {
> diff --git a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
> index f7bc462..817b672 100644
> --- a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
> +++ b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts
> @@ -7,9 +7,8 @@
>   */
>  /dts-v1/;
>  
> -#include "am33xx.dtsi"
> +#include "am33xx-mlo.dtsi"
>  #include "am335x-phytec-phycore-som.dtsi"
> -#include "am33xx-strip.dtsi"
>  #include "am33xx-clocks-strip.dtsi"
>  
>  / {
> diff --git a/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
> index e848a29..cf36c4c 100644
> --- a/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
> +++ b/arch/arm/dts/am335x-phytec-phyflex-som-mlo.dts
> @@ -7,9 +7,8 @@
>   */
>  /dts-v1/;
>  
> -#include "am33xx.dtsi"
> +#include "am33xx-mlo.dtsi"
>  #include "am335x-phytec-phyflex-som.dtsi"
> -#include "am33xx-strip.dtsi"
>  #include "am33xx-clocks-strip.dtsi"
>  
>  / {
> diff --git a/arch/arm/dts/am33xx-strip.dtsi b/arch/arm/dts/am33xx-mlo.dtsi
> similarity index 87%
> rename from arch/arm/dts/am33xx-strip.dtsi
> rename to arch/arm/dts/am33xx-mlo.dtsi
> index 2943fd1..36f137b 100644
> --- a/arch/arm/dts/am33xx-strip.dtsi
> +++ b/arch/arm/dts/am33xx-mlo.dtsi
> @@ -6,12 +6,19 @@
>   * it under the terms of the GNU General Public License version 2 as
>   * published by the Free Software Foundation.
>   */
> +#include <arm/am33xx.dtsi>
>  
>  / {
>  	aliases {
> +		gpio0 = &gpio0;
> +		gpio1 = &gpio1;
> +		gpio2 = &gpio2;
> +		gpio3 = &gpio3;
> +		mmc0 = &mmc1;
> +		mmc1 = &mmc2;
> +		spi0 = &spi0;
>  		/delete-property/ i2c1;
>  		/delete-property/ i2c2;
> -		/delete-property/ mmc2;
>  		/delete-property/ d_can0;
>  		/delete-property/ d_can1;
>  	};




From s.hauer at pengutronix.de  Sun Oct 23 23:28:43 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 08:28:43 +0200
Subject: [PATCH 6/6] fs: squashfs: Enable squashfs XZ support when XZ is
 enabled
In-Reply-To: <20161024062843.2796-1-s.hauer@pengutronix.de>
References: <20161024062843.2796-1-s.hauer@pengutronix.de>
Message-ID: <20161024062843.2796-7-s.hauer@pengutronix.de>

XZ support itself is much more expensive than the squashfs XZ wrapper,
so it makes sense to just compile XZ support into barebox when XZ
support is available. No need to ask the user for it.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index 085bfb6..2362ba1 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -48,15 +48,12 @@ if !SQUASHFS_LZO
 endif
 
 config SQUASHFS_XZ
-	bool "Include support for XZ compressed file systems"
-	default y
+	bool
 	depends on FS_SQUASHFS
-	select XZ_DECOMPRESS
-	help
-	  Saying Y here includes support for reading Squashfs file systems
-	  compressed with XZ compression.  XZ gives better compression than
-	  the default zlib compression, at the expense of greater CPU and
-	  memory overhead.
+	depends on XZ_DECOMPRESS
+	default y
+
+if !SQUASHFS_XZ
+	comment "XZ support disabled"
+endif
 
-	  XZ is not the standard compression used in Squashfs and so most
-	  file systems will be readable without selecting this option.
-- 
2.9.3



From s.hauer at pengutronix.de  Sun Oct 23 23:28:37 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 08:28:37 +0200
Subject: [PATCH v2] squashfs additional decompressors
Message-ID: <20161024062843.2796-1-s.hauer@pengutronix.de>

This series enables additional decompressors for squashfs.

Changes since v1:
- Enable the squashfs decompression wrapper for a decompression method
  always when the corresponding decompression library is enabled. The
  rationale is that the wrapper is cheap compared to the decompression
  library, so when the library is enabled we can also enable the wrapper.

----------------------------------------------------------------
Enrico Jorns (5):
      fs: squashfs: port lzo compression support from kernel
      fs: squashfs: port lz4 compression support from kernel
      fs: squashfs: port zlib compression support from kernel
      Add filetype and detection for squashfs images
      fs: squashfs: append linux rootarg for ubi volume

Sascha Hauer (1):
      fs: squashfs: Enable squashfs XZ support when XZ is enabled

 common/filetype.c          |   4 ++
 fs/squashfs/Kconfig        |  47 +++++++++++----
 fs/squashfs/Makefile       |   3 +
 fs/squashfs/lz4_wrapper.c  | 140 +++++++++++++++++++++++++++++++++++++++++++++
 fs/squashfs/lzo_wrapper.c  | 129 +++++++++++++++++++++++++++++++++++++++++
 fs/squashfs/squashfs.c     |  32 +++++++++++
 fs/squashfs/zlib_wrapper.c | 132 ++++++++++++++++++++++++++++++++++++++++++
 include/filetype.h         |   1 +
 8 files changed, 478 insertions(+), 10 deletions(-)
 create mode 100644 fs/squashfs/lz4_wrapper.c
 create mode 100644 fs/squashfs/lzo_wrapper.c
 create mode 100644 fs/squashfs/zlib_wrapper.c


From s.hauer at pengutronix.de  Sun Oct 23 23:28:41 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 08:28:41 +0200
Subject: [PATCH 4/6] Add filetype and detection for squashfs images
In-Reply-To: <20161024062843.2796-1-s.hauer@pengutronix.de>
References: <20161024062843.2796-1-s.hauer@pengutronix.de>
Message-ID: <20161024062843.2796-5-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

This adds `filetype_squashfs` to the list of known filetypes and adds a
detection for squashfs files to file_detect_type(). This currently
matches on the `hsqs` start sequence of an image file.

Additionally, the newly introduced filetype is registered as the type of
the squashfs_driver which allows, for example, to mount squashfs without
the need to specify a type parameter.

This changes enable booting a squashfs with the simple `boot` command
pointing to the location (device) that holds the squashfs.

Note that booting with blspec is limited as the current squashfs driver
is not capable of handling symbolic links.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/filetype.c      | 4 ++++
 fs/squashfs/squashfs.c | 1 +
 include/filetype.h     | 1 +
 3 files changed, 6 insertions(+)

diff --git a/common/filetype.c b/common/filetype.c
index 4728f87..8d72933 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -40,6 +40,7 @@ static const struct filetype_str filetype_str[] = {
 	[filetype_uimage] = { "U-Boot uImage", "u-boot" },
 	[filetype_ubi] = { "UBI image", "ubi" },
 	[filetype_jffs2] = { "JFFS2 image", "jffs2" },
+	[filetype_squashfs] = { "Squashfs image", "squashfs" },
 	[filetype_gzip] = { "GZIP compressed", "gzip" },
 	[filetype_bzip2] = { "BZIP2 compressed", "bzip2" },
 	[filetype_oftree] = { "open firmware Device Tree flattened Binary", "dtb" },
@@ -278,6 +279,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
 	if (buf8[0] == 0xfd && buf8[1] == 0x37 && buf8[2] == 0x7a &&
 			buf8[3] == 0x58 && buf8[4] == 0x5a && buf8[5] == 0x00)
 		return filetype_xz_compressed;
+	if (buf8[0] == 'h' && buf8[1] == 's' && buf8[2] == 'q' &&
+			buf8[3] == 's')
+		return filetype_squashfs;
 	if (buf[0] == be32_to_cpu(0xd00dfeed))
 		return filetype_oftree;
 	if (strncmp(buf8, "ANDROID!", 8) == 0)
diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
index d00dee6..6d04681 100644
--- a/fs/squashfs/squashfs.c
+++ b/fs/squashfs/squashfs.c
@@ -353,6 +353,7 @@ static struct fs_driver_d squashfs_driver = {
 	.readdir	= squashfs_readdir,
 	.closedir	= squashfs_closedir,
 	.stat		= squashfs_stat,
+	.type		= filetype_squashfs,
 	.drv = {
 		.probe = squashfs_probe,
 		.remove = squashfs_remove,
diff --git a/include/filetype.h b/include/filetype.h
index cde73c1..65bd6ef 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -16,6 +16,7 @@ enum filetype {
 	filetype_uimage,
 	filetype_ubi,
 	filetype_jffs2,
+	filetype_squashfs,
 	filetype_gzip,
 	filetype_bzip2,
 	filetype_oftree,
-- 
2.9.3



From s.hauer at pengutronix.de  Sun Oct 23 23:28:38 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 08:28:38 +0200
Subject: [PATCH 1/6] fs: squashfs: port lzo compression support from kernel
In-Reply-To: <20161024062843.2796-1-s.hauer@pengutronix.de>
References: <20161024062843.2796-1-s.hauer@pengutronix.de>
Message-ID: <20161024062843.2796-2-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

This ports lzo_wrapper from kernel code and adds some minimal adaptions
to make squashfs lzo compression work in barebox.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Tested-by: Yegor Yefremov <yegorslists at googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig       |  10 ++++
 fs/squashfs/Makefile      |   1 +
 fs/squashfs/lzo_wrapper.c | 129 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 140 insertions(+)
 create mode 100644 fs/squashfs/lzo_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index dc25d93..239682d 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,16 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_LZO
+	bool
+	depends on FS_SQUASHFS
+	depends on LZO_DECOMPRESS
+	default y
+
+if !SQUASHFS_LZO
+	comment "LZO support disabled"
+endif
+
 config SQUASHFS_XZ
 	bool "Include support for XZ compressed file systems"
 	default y
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index c0d024c..447e15e 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -11,3 +11,4 @@ obj-y	+= inode.o
 obj-y	+= namei.o
 obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
+obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c
new file mode 100644
index 0000000..834ee29
--- /dev/null
+++ b/fs/squashfs/lzo_wrapper.c
@@ -0,0 +1,129 @@
+/*
+ * Squashfs - a compressed read only filesystem for Linux
+ *
+ * Copyright (c) 2010 LG Electronics
+ * Chan Jeong <chan.jeong at lge.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * lzo_wrapper.c
+ */
+
+#include <common.h>
+#include <linux/mutex.h>
+#include <lzo.h>
+#include <types.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+struct squashfs_lzo {
+	void	*input;
+	void	*output;
+};
+
+static void *lzo_init(struct squashfs_sb_info *msblk, void *buff)
+{
+	int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
+
+	struct squashfs_lzo *stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->input = vmalloc(block_size);
+	if (stream->input == NULL)
+		goto failed;
+	stream->output = vmalloc(block_size);
+	if (stream->output == NULL)
+		goto failed2;
+
+	return stream;
+
+failed2:
+	vfree(stream->input);
+failed:
+	ERROR("Failed to allocate lzo workspace\n");
+	kfree(stream);
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void lzo_free(void *strm)
+{
+	struct squashfs_lzo *stream = strm;
+
+	if (stream) {
+		vfree(stream->input);
+		vfree(stream->output);
+	}
+	kfree(stream);
+}
+
+
+static int lzo_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	struct squashfs_lzo *stream = strm;
+	void *buff = stream->input, *data;
+	int avail, i, bytes = length, res;
+	size_t out_len = output->length;
+
+	for (i = 0; i < b; i++) {
+		avail = min(bytes, msblk->devblksize - offset);
+		memcpy(buff, bh[i] + offset, avail);
+		buff += avail;
+		bytes -= avail;
+		offset = 0;
+		kfree(bh[i]);
+	}
+
+	res = lzo1x_decompress_safe(stream->input, (size_t)length,
+					stream->output, &out_len);
+	if (res != LZO_E_OK)
+		goto failed;
+
+	res = bytes = (int)out_len;
+	data = squashfs_first_page(output);
+	buff = stream->output;
+	while (data) {
+		if (bytes <= PAGE_CACHE_SIZE) {
+			memcpy(data, buff, bytes);
+			break;
+		} else {
+			memcpy(data, buff, PAGE_CACHE_SIZE);
+			buff += PAGE_CACHE_SIZE;
+			bytes -= PAGE_CACHE_SIZE;
+			data = squashfs_next_page(output);
+		}
+	}
+	squashfs_finish_page(output);
+
+	return res;
+
+failed:
+	return -EIO;
+}
+
+const struct squashfs_decompressor squashfs_lzo_comp_ops = {
+	.init = lzo_init,
+	.free = lzo_free,
+	.decompress = lzo_uncompress,
+	.id = LZO_COMPRESSION,
+	.name = "lzo",
+	.supported = 1
+};
-- 
2.9.3



From s.hauer at pengutronix.de  Sun Oct 23 23:28:42 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 08:28:42 +0200
Subject: [PATCH 5/6] fs: squashfs: append linux rootarg for ubi volume
In-Reply-To: <20161024062843.2796-1-s.hauer@pengutronix.de>
References: <20161024062843.2796-1-s.hauer@pengutronix.de>
Message-ID: <20161024062843.2796-6-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

If squashfs runs from an ubi volume, append appropriate root kernel
options.

Note that ubiblock support is required in the kernel for that.

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/squashfs.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
index 6d04681..c4d0bac 100644
--- a/fs/squashfs/squashfs.c
+++ b/fs/squashfs/squashfs.c
@@ -9,12 +9,16 @@
 #include <linux/fs.h>
 #include <linux/stat.h>
 #include <linux/pagemap.h>
+#include <linux/mtd/ubi.h>
+#include <linux/mtd/mtd.h>
 
 #include "squashfs_fs.h"
 #include "squashfs_fs_sb.h"
 #include "squashfs_fs_i.h"
 #include "squashfs.h"
 
+struct ubi_volume_desc;
+
 char *squashfs_devread(struct squashfs_sb_info *fs, int byte_offset,
 		int byte_len)
 {
@@ -108,6 +112,31 @@ static struct inode *squashfs_findfile(struct super_block *sb,
 	return NULL;
 }
 
+void squashfs_set_rootarg(struct squashfs_priv *priv, struct fs_device_d *fsdev)
+{
+	struct ubi_volume_desc *ubi_vol;
+	struct ubi_volume_info vi = {};
+	struct ubi_device_info di = {};
+	struct mtd_info *mtd;
+	char *str;
+
+	ubi_vol = ubi_open_volume_cdev(fsdev->cdev, UBI_READONLY);
+
+	if (IS_ERR(ubi_vol))
+		return;
+
+	ubi_get_volume_info(ubi_vol, &vi);
+	ubi_get_device_info(vi.ubi_num, &di);
+	mtd = di.mtd;
+
+	str = basprintf("root=/dev/ubiblock%d_%d ubi.mtd=%s ubi.block=%d,%d rootfstype=squashfs",
+			vi.ubi_num, vi.vol_id, mtd->cdev.partname, vi.ubi_num, vi.vol_id);
+
+	fsdev_set_linux_rootarg(fsdev, str);
+
+	free(str);
+}
+
 static int squashfs_probe(struct device_d *dev)
 {
 	struct fs_device_d *fsdev;
@@ -130,6 +159,8 @@ static int squashfs_probe(struct device_d *dev)
 		goto err_out;
 	}
 
+	squashfs_set_rootarg(priv, fsdev);
+
 	return 0;
 
 err_out:
-- 
2.9.3



From s.hauer at pengutronix.de  Sun Oct 23 23:28:40 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 08:28:40 +0200
Subject: [PATCH 3/6] fs: squashfs: port zlib compression support from kernel
In-Reply-To: <20161024062843.2796-1-s.hauer@pengutronix.de>
References: <20161024062843.2796-1-s.hauer@pengutronix.de>
Message-ID: <20161024062843.2796-4-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

As this is the default compression method for squashfs, make this the
default in kconfig selection, too

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig        |  10 ++++
 fs/squashfs/Makefile       |   1 +
 fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 143 insertions(+)
 create mode 100644 fs/squashfs/zlib_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index 928e3bb..085bfb6 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,16 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_ZLIB
+	bool
+	depends on FS_SQUASHFS
+	depends on ZLIB
+	default y
+
+if !SQUASHFS_ZLIB
+	comment "ZLIB support disabled"
+endif
+
 config SQUASHFS_LZ4
 	bool
 	depends on FS_SQUASHFS
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 8590b09..7976e3f 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -13,3 +13,4 @@ obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
+obj-$(CONFIG_SQUASHFS_ZLIB) += zlib_wrapper.o
diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c
new file mode 100644
index 0000000..f422515
--- /dev/null
+++ b/fs/squashfs/zlib_wrapper.c
@@ -0,0 +1,132 @@
+/*
+ * Squashfs - a compressed read only filesystem for Linux
+ *
+ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ * Phillip Lougher <phillip at squashfs.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * zlib_wrapper.c
+ */
+
+
+#include <linux/mutex.h>
+#include <linux/zlib.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+static void *zlib_init(struct squashfs_sb_info *dummy, void *buff)
+{
+	z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->workspace = vmalloc(zlib_inflate_workspacesize());
+	if (stream->workspace == NULL)
+		goto failed;
+
+	return stream;
+
+failed:
+	ERROR("Failed to allocate zlib workspace\n");
+	kfree(stream);
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void zlib_free(void *strm)
+{
+	z_stream *stream = strm;
+
+	if (stream)
+		vfree(stream->workspace);
+	kfree(stream);
+}
+
+
+static int zlib_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	int zlib_err, zlib_init = 0, k = 0;
+	z_stream *stream = strm;
+
+	stream->avail_out = PAGE_CACHE_SIZE;
+	stream->next_out = squashfs_first_page(output);
+	stream->avail_in = 0;
+
+	do {
+		if (stream->avail_in == 0 && k < b) {
+			int avail = min(length, msblk->devblksize - offset);
+			length -= avail;
+			stream->next_in = bh[k] + offset;
+			stream->avail_in = avail;
+			offset = 0;
+		}
+
+		if (stream->avail_out == 0) {
+			stream->next_out = squashfs_next_page(output);
+			if (stream->next_out != NULL)
+				stream->avail_out = PAGE_CACHE_SIZE;
+		}
+
+		if (!zlib_init) {
+			zlib_err = zlib_inflateInit(stream);
+			if (zlib_err != Z_OK) {
+				squashfs_finish_page(output);
+				goto out;
+			}
+			zlib_init = 1;
+		}
+
+		zlib_err = zlib_inflate(stream, Z_SYNC_FLUSH);
+
+		if (stream->avail_in == 0 && k < b)
+			kfree(bh[k++]);
+	} while (zlib_err == Z_OK);
+
+	squashfs_finish_page(output);
+
+	if (zlib_err != Z_STREAM_END)
+		goto out;
+
+	zlib_err = zlib_inflateEnd(stream);
+	if (zlib_err != Z_OK)
+		goto out;
+
+	if (k < b)
+		goto out;
+
+	return stream->total_out;
+
+out:
+	for (; k < b; k++)
+		kfree(bh[k]);
+
+	return -EIO;
+}
+
+const struct squashfs_decompressor squashfs_zlib_comp_ops = {
+	.init = zlib_init,
+	.free = zlib_free,
+	.decompress = zlib_uncompress,
+	.id = ZLIB_COMPRESSION,
+	.name = "zlib",
+	.supported = 1
+};
+
-- 
2.9.3



From s.hauer at pengutronix.de  Sun Oct 23 23:28:39 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 24 Oct 2016 08:28:39 +0200
Subject: [PATCH 2/6] fs: squashfs: port lz4 compression support from kernel
In-Reply-To: <20161024062843.2796-1-s.hauer@pengutronix.de>
References: <20161024062843.2796-1-s.hauer@pengutronix.de>
Message-ID: <20161024062843.2796-3-s.hauer@pengutronix.de>

From: Enrico Jorns <ejo at pengutronix.de>

Signed-off-by: Enrico Jorns <ejo at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/squashfs/Kconfig       |  10 ++++
 fs/squashfs/Makefile      |   1 +
 fs/squashfs/lz4_wrapper.c | 140 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 151 insertions(+)
 create mode 100644 fs/squashfs/lz4_wrapper.c

diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index 239682d..928e3bb 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,16 @@ menuconfig FS_SQUASHFS
 	  embedded systems where low overhead is needed.  Further information
 	  and tools are available from http://squashfs.sourceforge.net.
 
+config SQUASHFS_LZ4
+	bool
+	depends on FS_SQUASHFS
+	depends on LZ4_DECOMPRESS
+	default y
+
+if !SQUASHFS_LZ4
+	comment "LZ4 support disabled"
+endif
+
 config SQUASHFS_LZO
 	bool
 	depends on FS_SQUASHFS
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 447e15e..8590b09 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -12,3 +12,4 @@ obj-y	+= namei.o
 obj-y	+= super.o
 obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
 obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
+obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
diff --git a/fs/squashfs/lz4_wrapper.c b/fs/squashfs/lz4_wrapper.c
new file mode 100644
index 0000000..6ca6a32
--- /dev/null
+++ b/fs/squashfs/lz4_wrapper.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2013, 2014
+ * Phillip Lougher <phillip at squashfs.org.uk>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <types.h>
+#include <linux/mutex.h>
+#include <linux/lz4.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+#define LZ4_LEGACY	1
+
+struct lz4_comp_opts {
+	__le32 version;
+	__le32 flags;
+};
+
+struct squashfs_lz4 {
+	void *input;
+	void *output;
+};
+
+
+static void *lz4_comp_opts(struct squashfs_sb_info *msblk,
+	void *buff, int len)
+{
+	struct lz4_comp_opts *comp_opts = buff;
+
+	/* LZ4 compressed filesystems always have compression options */
+	if (comp_opts == NULL || len < sizeof(*comp_opts))
+		return ERR_PTR(-EIO);
+
+	if (le32_to_cpu(comp_opts->version) != LZ4_LEGACY) {
+		/* LZ4 format currently used by the kernel is the 'legacy'
+		 * format */
+		ERROR("Unknown LZ4 version\n");
+		return ERR_PTR(-EINVAL);
+	}
+
+	return NULL;
+}
+
+
+static void *lz4_init(struct squashfs_sb_info *msblk, void *buff)
+{
+	int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
+	struct squashfs_lz4 *stream;
+
+	stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+	if (stream == NULL)
+		goto failed;
+	stream->input = vmalloc(block_size);
+	if (stream->input == NULL)
+		goto failed2;
+	stream->output = vmalloc(block_size);
+	if (stream->output == NULL)
+		goto failed3;
+
+	return stream;
+
+failed3:
+	vfree(stream->input);
+failed2:
+	kfree(stream);
+failed:
+	ERROR("Failed to initialise LZ4 decompressor\n");
+	return ERR_PTR(-ENOMEM);
+}
+
+
+static void lz4_free(void *strm)
+{
+	struct squashfs_lz4 *stream = strm;
+
+	if (stream) {
+		vfree(stream->input);
+		vfree(stream->output);
+	}
+	kfree(stream);
+}
+
+
+static int lz4_uncompress(struct squashfs_sb_info *msblk, void *strm,
+	char **bh, int b, int offset, int length,
+	struct squashfs_page_actor *output)
+{
+	struct squashfs_lz4 *stream = strm;
+	void *buff = stream->input, *data;
+	int avail, i, bytes = length, res;
+	size_t dest_len = output->length;
+
+	for (i = 0; i < b; i++) {
+		avail = min(bytes, msblk->devblksize - offset);
+		memcpy(buff, bh[i] + offset, avail);
+		buff += avail;
+		bytes -= avail;
+		offset = 0;
+		kfree(bh[i]);
+	}
+
+	res = lz4_decompress_unknownoutputsize(stream->input, length,
+					stream->output, &dest_len);
+	if (res)
+		return -EIO;
+
+	bytes = dest_len;
+	data = squashfs_first_page(output);
+	buff = stream->output;
+	while (data) {
+		if (bytes <= PAGE_CACHE_SIZE) {
+			memcpy(data, buff, bytes);
+			break;
+		}
+		memcpy(data, buff, PAGE_CACHE_SIZE);
+		buff += PAGE_CACHE_SIZE;
+		bytes -= PAGE_CACHE_SIZE;
+		data = squashfs_next_page(output);
+	}
+	squashfs_finish_page(output);
+
+	return dest_len;
+}
+
+const struct squashfs_decompressor squashfs_lz4_comp_ops = {
+	.init = lz4_init,
+	.comp_opts = lz4_comp_opts,
+	.free = lz4_free,
+	.decompress = lz4_uncompress,
+	.id = LZ4_COMPRESSION,
+	.name = "lz4",
+	.supported = 1
+};
-- 
2.9.3



From t.remmet at phytec.de  Mon Oct 24 01:36:24 2016
From: t.remmet at phytec.de (Teresa Remmet)
Date: Mon, 24 Oct 2016 10:36:24 +0200
Subject: [PATCH v2] ARM: dts: am33xx.dtsi: Add spi aliases
Message-ID: <1477298184-32928-1-git-send-email-t.remmet@phytec.de>

We need to add the spi aliases to set the bus number correct in
the driver.

Delete the spi1 alias again in the am33xx-strip.dtsi for MLO as
the node is deleted there also.

Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
---
Changes in v2:
- Removed the first patch completly
- Delete now spi1 alias in strip file
- Updated commit message

 arch/arm/dts/am33xx-strip.dtsi | 1 +
 arch/arm/dts/am33xx.dtsi       | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/arch/arm/dts/am33xx-strip.dtsi b/arch/arm/dts/am33xx-strip.dtsi
index 2943fd1..83d23a8 100644
--- a/arch/arm/dts/am33xx-strip.dtsi
+++ b/arch/arm/dts/am33xx-strip.dtsi
@@ -14,6 +14,7 @@
 		/delete-property/ mmc2;
 		/delete-property/ d_can0;
 		/delete-property/ d_can1;
+		/delete-property/ spi1;
 	};
 };
 
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index 7ba0a0b..f1ee7b3 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -18,5 +18,7 @@
 		mmc0 = &mmc1;
 		mmc1 = &mmc2;
 		mmc2 = &mmc3;
+		spi0 = &spi0;
+		spi1 = &spi1;
 	};
 };
-- 
1.9.1



From s.lengfeld at phytec.de  Mon Oct 24 01:51:30 2016
From: s.lengfeld at phytec.de (Stefan Lengfeld)
Date: Mon, 24 Oct 2016 10:51:30 +0200
Subject: [PATCH 2/2] mtd: nand: nand_mxs: Fix readtotal calculation
In-Reply-To: <20161021071808.ygaw53zjn3x5ns6f@pengutronix.de>
References: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
 <1476970807-43811-2-git-send-email-c.hemp@phytec.de>
 <20161021071808.ygaw53zjn3x5ns6f@pengutronix.de>
Message-ID: <20161024085130.GA3862@lws-christ>

Hi Sascha,

On Fri, Oct 21, 2016 at 09:18:08AM +0200, Sascha Hauer wrote:
> On Thu, Oct 20, 2016 at 03:40:07PM +0200, Christian Hemp wrote:
> > The calculation of readtotal must be bit alligend. If not the bch core
> > finds bit flips in every page, because readtotal is too small.
> > This bug was mostly introduced since commit "51061a9 mtd: nand: nand_mxs:
> > Add subpage read support".
> 
> Is this somehow related to:
> 
> http://lists.infradead.org/pipermail/linux-mtd/2016-June/068243.html
> 
> Or is this another topic?
> 
> Sascha

Yes, this patch fixes the same wrong assumption as in the patch above.  In the
above patch on the kernel list the assumption is that every block of
chunk+eccbits is byte aligned on the flash. So if the eccbits are not divisible
by 8, there are unused bits in the last byte of every block of chunk+eccbits.
That's not the case. In fact the second, third,... chunk will not be byte
aligned on the flash anymore. The blocks are bit shifted.

    AFAIR, the GPMI/ECC engine operates at the bit level (which is a pain
    to deal with BTW), and is only requiring a byte alignment on the total
    number of ECC bits. So here, DIV_ROUND_UP(18 * 13 * 4, 8) = 117, which
    fits in the 118 bytes (128 bytes - 10 bytes of 'metadata').
    [Source: http://lists.infradead.org/pipermail/linux-mtd/2016-June/068244.html]


In the patch below the line

> > -	ecc_parity_size = 13 * eccstrength / 8;

is the culprit. If the eccbits per chunk are not divisible by 8, a rounding
error occurs. Since C integer division truncates the fractional part, the byte
size in 'ecc_parity_size' underestimates the real size of the eccbits on the
flash.

The correct solution is to calculate all sizes in bits and then round up to the
next byte. So the code only overestimates the required read size.

I can only agree to Boris statement:

    AFAIR, the GPMI/ECC engine operates at the bit level (which is a pain
    to deal with BTW),

Dealing with bit aligned stuff is really awful.

Mit freundlichen Gr??en / Kind regards,
	Stefan Lengfeld

> 
> > 
> > Tested with:
> > nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
> > S34ML08G2), 1024MiB, page size: 2048, OOB size: 128
> > 
> > nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron
> > MT29F4G08ABADAWP), 512MiB, page size: 2048, OOB size: 64
> > 
> > nand: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND
> > 1GiB 3,3V 8-bit), 1024MiB, page size: 2048, OOB size: 64
> > 
> > Signed-off-by: Christian Hemp <c.hemp at phytec.de>
> > Signed-off-by: Stefan Lengfeld <s.lengfeld at phytec.de>
> > ---
> >  drivers/mtd/nand/nand_mxs.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
> > index fe955e8..cba0bee 100644
> > --- a/drivers/mtd/nand/nand_mxs.c
> > +++ b/drivers/mtd/nand/nand_mxs.c
> > @@ -728,15 +728,15 @@ static int __mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand
> >  	uint32_t corrected = 0, failed = 0;
> >  	uint8_t	*status;
> >  	unsigned int  max_bitflips = 0;
> > -	int i, ret, readtotal, nchunks, eccstrength, ecc_parity_size;
> > +	int i, ret, readtotal, nchunks, eccstrength;
> >  
> >  	eccstrength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
> >  
> >  	readlen = roundup(readlen, MXS_NAND_CHUNK_DATA_CHUNK_SIZE);
> >  	nchunks = mxs_nand_ecc_chunk_cnt(readlen);
> > -	ecc_parity_size = 13 * eccstrength / 8;
> > -	readtotal = MXS_NAND_METADATA_SIZE +
> > -		(MXS_NAND_CHUNK_DATA_CHUNK_SIZE + ecc_parity_size) * nchunks;
> > +	readtotal =  MXS_NAND_METADATA_SIZE;
> > +	readtotal += MXS_NAND_CHUNK_DATA_CHUNK_SIZE * nchunks;
> > +	readtotal += DIV_ROUND_UP(13 * eccstrength * nchunks, 8);
> >  
> >  	mxs_nand_config_bch(mtd, readtotal);
> >  
> > -- 
> > 1.9.1
> > 
> > 
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> > 
> 
> -- 
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From s.lengfeld at phytec.de  Mon Oct 24 02:20:07 2016
From: s.lengfeld at phytec.de (Stefan Lengfeld)
Date: Mon, 24 Oct 2016 11:20:07 +0200
Subject: [PATCH 1/2] nand: imx6: Changed default NAND clock
In-Reply-To: <20161021071147.iacxwcdqz7sx7gs2@pengutronix.de>
References: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
 <20161021071147.iacxwcdqz7sx7gs2@pengutronix.de>
Message-ID: <20161024092007.GB3862@lws-christ>

Hi Sascha,

On Fri, Oct 21, 2016 at 09:11:47AM +0200, Sascha Hauer wrote:
> On Thu, Oct 20, 2016 at 03:40:06PM +0200, Christian Hemp wrote:
> > From: Daniel Schultz <d.schultz at phytec.de>
> > 
> > The Barebox recognized false bad erase blocks while booting from a
> > Spansion NAND (1). This error occurred due a to high clock. The
> > Kernel sets the default NAND clock to 22Mhz. So, to fix this error and
> > to be more identical with the Kernel, the Barebox should be too.
> 
> The timing is changed afterwards to a faster mode and the clock is
> changed again. Does that work for you properly?
> 
> Sascha

Yes, if the NAND chip supports EDO mode, the clock is changed to 80/100Mhz
correctly. Here is the driver output with additional debug messages:

    nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron MT29F4G08ABADAWP), 512MiB, page size: 2048, OOB size: 64
    mxs_nand_setup_timing: mode 5
    mxs_nand_setup_timing: mxs_nand_compute_edo_timing
    mxs_nand_setup_timing: clock is 96000000

The patch fixes the case, when the NAND chip does not support EDO mode.
Instead of function 'mxs_nand_compute_edo_timing' the function
'mxs_nand_compute_hardware_timing' is called here.

        mode = mxs_nand_enable_edo_mode(info);
        if (mode >= 0)
                mxs_nand_compute_edo_timing(info, &hw, mode);
        else
                mxs_nand_compute_hardware_timing(info, &hw);

Since 'mxs_nand_compute_hardware_timing' does not change the clock, the clock
is too fast for the NAND chip.

Here is the output of two different NAND chips without EDO mode. The patch to
set the clock to 22Mhz was already applied:

    nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion S34ML08G2), 1024MiB, page size: 2048, OOB size: 128
    mxs_nand_setup_timing: mode -22
    mxs_nand_setup_timing: mxs_nand_compute_hardware_timing
    mxs_nand_setup_timing: clock is 21818181
    
    nand: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit), 1024MiB, page size: 2048, OOB size: 64
    mxs_nand_setup_timing: mode -2
    mxs_nand_setup_timing: mxs_nand_compute_hardware_timing
    mxs_nand_setup_timing: clock is 21818181

Mit freundlichen Gr??en / Kind regards,
	Stefan Lengfeld

> 
> > 
> > 1: nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
> > S34ML08G2), 1024MiB, page size: 2048, OOB size: 128
> > 
> > Signed-off-by: Daniel Schultz <d.schultz at phytec.de>
> > Tested-by: Stefan Lengfeld <s.lengfeld at phytec.de>
> > Signed-off-by: Christian Hemp <c.hemp at phytec.de>
> > ---
> >  drivers/mtd/nand/nand_mxs.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
> > index 01aa063..fe955e8 100644
> > --- a/drivers/mtd/nand/nand_mxs.c
> > +++ b/drivers/mtd/nand/nand_mxs.c
> > @@ -2145,7 +2145,7 @@ static int mxs_nand_probe(struct device_d *dev)
> >  
> >  	if (mxs_nand_is_imx6(nand_info)) {
> >  		clk_disable(nand_info->clk);
> > -		clk_set_rate(nand_info->clk, 96000000);
> > +		clk_set_rate(nand_info->clk, 22000000);
> >  		clk_enable(nand_info->clk);
> >  		nand_info->dma_channel_base = 0;
> >  	} else {
> > -- 
> > 1.9.1
> > 
> > 
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> > 
> 
> -- 
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From s.hauer at pengutronix.de  Mon Oct 24 23:21:15 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 25 Oct 2016 08:21:15 +0200
Subject: [PATCH 1/2] nand: imx6: Changed default NAND clock
In-Reply-To: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
References: <1476970807-43811-1-git-send-email-c.hemp@phytec.de>
Message-ID: <20161025062115.lj7cacy2nfobltcu@pengutronix.de>

On Thu, Oct 20, 2016 at 03:40:06PM +0200, Christian Hemp wrote:
> From: Daniel Schultz <d.schultz at phytec.de>
> 
> The Barebox recognized false bad erase blocks while booting from a
> Spansion NAND (1). This error occurred due a to high clock. The
> Kernel sets the default NAND clock to 22Mhz. So, to fix this error and
> to be more identical with the Kernel, the Barebox should be too.
> 
> 1: nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
> S34ML08G2), 1024MiB, page size: 2048, OOB size: 128

Applied both, thanks

Sascha

> 
> Signed-off-by: Daniel Schultz <d.schultz at phytec.de>
> Tested-by: Stefan Lengfeld <s.lengfeld at phytec.de>
> Signed-off-by: Christian Hemp <c.hemp at phytec.de>
> ---
>  drivers/mtd/nand/nand_mxs.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
> index 01aa063..fe955e8 100644
> --- a/drivers/mtd/nand/nand_mxs.c
> +++ b/drivers/mtd/nand/nand_mxs.c
> @@ -2145,7 +2145,7 @@ static int mxs_nand_probe(struct device_d *dev)
>  
>  	if (mxs_nand_is_imx6(nand_info)) {
>  		clk_disable(nand_info->clk);
> -		clk_set_rate(nand_info->clk, 96000000);
> +		clk_set_rate(nand_info->clk, 22000000);
>  		clk_enable(nand_info->clk);
>  		nand_info->dma_channel_base = 0;
>  	} else {
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mgr at pengutronix.de  Wed Oct 26 02:09:33 2016
From: mgr at pengutronix.de (Michael Grzeschik)
Date: Wed, 26 Oct 2016 11:09:33 +0200
Subject: [PATCH 4/4] mci: add MBR write and read function to block devices
In-Reply-To: <20161018062322.wje6gucvkt42v7oa@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
 <20161017132923.31834-5-m.grzeschik@pengutronix.de>
 <20161018062322.wje6gucvkt42v7oa@pengutronix.de>
Message-ID: <20161026090933.qdzlqhv4blwx5idq@pengutronix.de>

On Tue, Oct 18, 2016 at 08:23:22AM +0200, Sascha Hauer wrote:
> On Mon, Oct 17, 2016 at 03:29:23PM +0200, Michael Grzeschik wrote:
> > With this patch it is possible to write an mbr partition table to the
> > mci block device. By setting the device property "dos_partitions" of the
> > mmc device node, it is possible to write back the new partition layout
> > in the common cmdlinepart notation. The property can also be read back.
> > 
> > Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
> > ---
> >  drivers/mci/mci-core.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 122 insertions(+)
> > 
> > diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> > index 4e176f7..c0013a1 100644
> > --- a/drivers/mci/mci-core.c
> > +++ b/drivers/mci/mci-core.c
> > @@ -33,9 +33,11 @@
> >  #include <asm-generic/div64.h>
> >  #include <asm/byteorder.h>
> >  #include <block.h>
> > +#include <fcntl.h>
> >  #include <disks.h>
> >  #include <of.h>
> >  #include <linux/err.h>
> > +#include <cmdlinepart.h>
> >  
> >  #define MAX_BUFFER_NUMBER 0xffffffff
> >  
> > @@ -1527,6 +1529,122 @@ static void mci_info(struct device_d *dev)
> >  		extract_mtd_year(mci));
> >  }
> >  
> > +static char *print_size(uint64_t s)
> > +{
> > +	if (!(s & ((1 << 20) - 1)))
> > +		return basprintf("%lldM", s >> 20);
> > +	if (!(s & ((1 << 10) - 1)))
> > +		return basprintf("%lldk", s >> 10);
> > +	return basprintf("0x%lld", s);
> 
> s/lld/llx/

Why that? This will break the typical layout compared
to all other users of the kernelcmdline syntax.

> > +}
> > +
> > +static int print_part(char *buf, int bufsize, struct cdev *cdev, int is_last)
> > +{
> > +	char *size = print_size(cdev->size);
> > +	int ret;
> > +
> > +	if (!size) {
> > +		ret = -ENOMEM;
> > +		goto out;
> > +	}
> > +
> > +	ret = snprintf(buf, bufsize, "%s(%s)%s", size,
> > +			cdev->partname,
> > +			is_last ? "" : ",");
> > +out:
> > +	free(size);
> > +
> > +	return ret;
> > +}
> > +
> > +static int print_parts(char *buf, int bufsize, struct mci *mci)
> > +{
> > +	struct cdev *cdev, *ct;
> > +	int ret = 0;
> > +
> > +	list_for_each_entry_safe(cdev, ct, &mci->dev.cdevs, devices_list) {
> 
> safe_?

Sure. We don't change the list.

> > +		if ((cdev->flags & DEVFS_IS_PARTITION) &&
> > +			(cdev->flags & DEVFS_PARTITION_IN_PT)) {
> > +			int now;
> > +			int is_last = 0;
> > +			struct list_head *nh = (cdev)->devices_list.next;
> > +			struct cdev *next = container_of(nh, typeof(*(cdev)), devices_list);
> > +
> > +			if (list_is_last(&cdev->devices_list, &mci->dev.cdevs) ||
> > +				!(next->flags & DEVFS_PARTITION_IN_PT))
> > +				is_last = 1;
> 
> Is this test safe? What if the next partition does not have the
> DEVFS_PARTITION_IN_PT flag set, but the one after that has? Maybe you
> have to count the number of partitions in a first pass.


Yes. That's a good point. Will fix that.

> > +
> > +			now = print_part(buf, bufsize, cdev, is_last);
> > +			if (now < 0)
> > +				return now;
> > +
> > +			if (buf && bufsize) {
> > +				buf += now;
> > +				bufsize -= now;
> > +			}
> > +			ret += now;
> > +		}
> > +	}
> > +
> > +	return ret;
> > +}
> > +
> > +static const char *mci_partition_get(struct device_d *dev, struct param_d *p)
> > +{
> > +	struct mci *mci = container_of(dev, struct mci, dev);
> > +	int len = 0;
> > +
> > +	free(p->value);
> > +
> > +	len = print_parts(NULL, 0, mci);
> > +	p->value = xzalloc(len + 1);
> > +	print_parts(p->value, len + 1, mci);
> > +
> > +	return p->value;
> > +}
> > +
> > +#ifdef CONFIG_BLOCK_WRITE
> > +static int mci_partition_set(struct device_d *dev, struct param_d *p, const char *val)
> > +{
> > +	struct mci *mci = container_of(dev, struct mci, dev);
> > +	struct cdev *cdev, *ct;
> > +	int ret;
> > +
> > +	if (!val)
> > +		return -EINVAL;
> > +
> > +	/* remove all partition cdevs with DEVFS_IS_PARTITION set */
> > +	list_for_each_entry_safe(cdev, ct, &mci->dev.cdevs, devices_list) {
> > +		if ((cdev->flags & DEVFS_IS_PARTITION) &&
> > +			(cdev->flags & DEVFS_PARTITION_IN_PT))
> > +			ret = devfs_del_partition(cdev->name);
> > +			if (ret)
> > +				return ret;
> > +	}
> > +
> > +	/* read back the prepared partition layot from dos_partitions param */
> 
> s/layot/layout/
> 

Jupp.

> > +	ret = cmdlinepart_do_parse(mci->cdevname, val, mci->capacity,
> > +			CMDLINEPART_ADD_DEVNAME | CMDLINEPART_ADD_TO_PT);
> > +	if (ret)
> > +		return ret;
> > +
> > +	/* write the MBR partition layout based on cdevs with DEVFS_IS_PARTITION set  */
> > +	for (int i = 0; i < mci->nr_parts; i++) {
> > +		struct mci_part *part = &mci->part[i];
> > +		if (part->area_type == MMC_BLK_DATA_AREA_MAIN) {
> > +			ret = write_dos_partition_table(&part->blk,
> > +							&mci->dev.cdevs);
> > +			if (ret != 0) {
> > +				dev_warn(&mci->dev, "Could not write partition table\n");
> > +				return ret;
> > +			}
> > +		}
> > +	}
> > +
> > +	return ret;
> > +}
> > +#endif
> > +
> >  /**
> >   * Check if the MCI card is already probed
> >   * @param mci MCI device instance
> > @@ -1786,6 +1904,10 @@ int mci_register(struct mci_host *host)
> >  	mci->param_probe = dev_add_param_bool(&mci->dev, "probe",
> >  			mci_set_probe, NULL, &mci->probe, mci);
> >  
> > +#ifdef CONFIG_BLOCK_WRITE
> > +	dev_add_param(&mci->dev, "dos_partitions", mci_partition_set, mci_partition_get, 0);
> > +#endif
> 
> Use IS_ENABLED()
> 
> Other than that this code should be attached to parse_partition_table()
> rather than making this mci specific.
> We probably can safely write a dos partition table to an unpartitioned
> device, but should refuse to create/manipulate a dos partition table
> when a EFI partition table exists.

I will have that fixed in v2, until I figured out how to integrate that properly.

Thanks,
Michael


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mgr at pengutronix.de  Wed Oct 26 02:12:41 2016
From: mgr at pengutronix.de (Michael Grzeschik)
Date: Wed, 26 Oct 2016 11:12:41 +0200
Subject: [PATCH 3/4] partitions/dos: add function to write partition table
In-Reply-To: <20161018060712.kqtkwxx73to6m434@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
 <20161017132923.31834-4-m.grzeschik@pengutronix.de>
 <20161018060712.kqtkwxx73to6m434@pengutronix.de>
Message-ID: <20161026091241.lkk5wnj4k4cmjvts@pengutronix.de>

On Tue, Oct 18, 2016 at 08:07:12AM +0200, Sascha Hauer wrote:
> Hi Michael,
> 
> On Mon, Oct 17, 2016 at 03:29:22PM +0200, Michael Grzeschik wrote:
> > The function can be used to write an partition layout to the block device
> > based on its cdev layout. Only cdevs with flag DEVFS_PARTITION_IN_PT set
> > get written. The function also adds an static offset of 0x200000 to
> > ensure the mbr and bootloader will not be overwritten.
> > 
> > Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
> > ---
> >  common/partitions/dos.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++++
> >  include/disks.h         |  1 +
> >  2 files changed, 72 insertions(+)
> > 
> > diff --git a/common/partitions/dos.c b/common/partitions/dos.c
> > index 5f08e25..d7fa538 100644
> > --- a/common/partitions/dos.c
> > +++ b/common/partitions/dos.c
> > @@ -256,6 +256,77 @@ static void dos_partition(void *buf, struct block_device *blk,
> >  			&dsp->signature, "%08x", dsp);
> >  }
> >  
> > +static inline void hdimage_setup_chs(unsigned int lba, unsigned char *chs)
> > +{
> > +	const unsigned int hpc = 255;
> > +	const unsigned int spt = 63;
> > +	unsigned int s, c;
> > +
> > +	chs[0] = (lba/spt)%hpc;
> 
> Please run checkpatch over this. There are some stylistic flaws like
> missing whitespaces left and right of operators.

Thanks. I forgot to do that. It was an badly formatet template I used
here for reference. Will fix it.

> > +	c = (lba/(spt * hpc));
> > +	s = (lba > 0) ?(lba%spt + 1) : 0;
> > +	chs[1] = ((c & 0x300) >> 2) | (s & 0xff);
> > +	chs[2] = (c & 0xff);
> > +}
> > +
> > +int write_dos_partition_table(struct block_device *blk, struct list_head *cdevs)
> > +{
> > +	char part_table[6+4*sizeof(struct partition_entry)+2];
> > +	struct cdev *cdev, *ct;
> > +	void *buf;
> > +	int ret;
> > +	int n = 0;
> > +	char *ptr;
> > +
> > +	/* prepare partition table entry */
> > +	ptr = part_table;
> > +	memset(ptr, 0, sizeof(part_table));
> > +
> > +	/* skip disk signature */
> > +	ptr += 6;
> 
> It's even more important to skip this in the output buffer. This code
> should not change the disk signature.
> 
> > +	list_for_each_entry_safe(cdev, ct, cdevs, devices_list) {
> 
> Why _safe? You do not remove entries, do you?

No elements get changed in the iteration. I will change it.

> > +		if ((cdev->flags & DEVFS_IS_PARTITION) &&
> > +			(cdev->flags & DEVFS_PARTITION_IN_PT)) {
> 
> In a multiline if clause the second line should either start directly
> under the opening brace or indented with at least two more tabs than the
> opening if(), but using the same indention level as the conditional code
> makes it hard to read.

Will be changed.

> 
> > +			struct partition_entry *entry;
> 
> Instead of the silent test below, do a:
> 
> 			if (n == 4) {
> 				pr_warn("Only 4 partitions written to MBR\n");
> 				break;
> 			}
> 

Good thought. Will change.


> > +			entry = (struct partition_entry *)
> > +				(ptr + n * sizeof(struct partition_entry));
> > +
> > +			/* add static offset to skip the mbr and bootloader */
> > +			cdev->offset += 4096 * SECTOR_SIZE;
> > +
> > +			entry->type = 0x83;
> > +			entry->partition_start = cdev->offset / SECTOR_SIZE;
> > +			entry->partition_size = cdev->size / SECTOR_SIZE;
> 
> We should have a test if offset and/or size exceed the 32bit limit.
> 

Good point. Will add in v2.

> > +
> > +			hdimage_setup_chs(entry->partition_start,
> > +						entry->chs_begin);
> > +			hdimage_setup_chs(entry->partition_start +
> > +						entry->partition_size - 1,
> > +						entry->chs_end);
> > +			n++;
> > +		}
> > +		if (n == 4)
> > +			break;
> > +	}
> > +
> > +	ptr += 4 * sizeof(struct partition_entry);
> > +	ptr[0] = 0x55;
> > +	ptr[1] = 0xaa;
> > +
> > +	buf = read_mbr(blk);
> > +	if (!buf)
> > +		return -EIO;
> 
> You could move this to the top of the function and directly manipulate
> the input buffer.

Already prepared for v2.

Thanks,
Michael

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mgr at pengutronix.de  Wed Oct 26 02:40:51 2016
From: mgr at pengutronix.de (Michael Grzeschik)
Date: Wed, 26 Oct 2016 11:40:51 +0200
Subject: [PATCH 4/4] mci: add MBR write and read function to block devices
In-Reply-To: <20161026090933.qdzlqhv4blwx5idq@pengutronix.de>
References: <20161017132923.31834-1-m.grzeschik@pengutronix.de>
 <20161017132923.31834-5-m.grzeschik@pengutronix.de>
 <20161018062322.wje6gucvkt42v7oa@pengutronix.de>
 <20161026090933.qdzlqhv4blwx5idq@pengutronix.de>
Message-ID: <20161026094051.ph6wwuwl3qitxntg@pengutronix.de>

On Wed, Oct 26, 2016 at 11:09:33AM +0200, Michael Grzeschik wrote:
> On Tue, Oct 18, 2016 at 08:23:22AM +0200, Sascha Hauer wrote:
> > On Mon, Oct 17, 2016 at 03:29:23PM +0200, Michael Grzeschik wrote:
> > > With this patch it is possible to write an mbr partition table to the
> > > mci block device. By setting the device property "dos_partitions" of the
> > > mmc device node, it is possible to write back the new partition layout
> > > in the common cmdlinepart notation. The property can also be read back.
> > > 
> > > Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
> > > ---
> > >  drivers/mci/mci-core.c | 122 +++++++++++++++++++++++++++++++++++++++++++++++++
> > >  1 file changed, 122 insertions(+)
> > > 
> > > diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> > > index 4e176f7..c0013a1 100644
> > > --- a/drivers/mci/mci-core.c
> > > +++ b/drivers/mci/mci-core.c
> > > @@ -33,9 +33,11 @@
> > >  #include <asm-generic/div64.h>
> > >  #include <asm/byteorder.h>
> > >  #include <block.h>
> > > +#include <fcntl.h>
> > >  #include <disks.h>
> > >  #include <of.h>
> > >  #include <linux/err.h>
> > > +#include <cmdlinepart.h>
> > >  
> > >  #define MAX_BUFFER_NUMBER 0xffffffff
> > >  
> > > @@ -1527,6 +1529,122 @@ static void mci_info(struct device_d *dev)
> > >  		extract_mtd_year(mci));
> > >  }
> > >  
> > > +static char *print_size(uint64_t s)
> > > +{
> > > +	if (!(s & ((1 << 20) - 1)))
> > > +		return basprintf("%lldM", s >> 20);
> > > +	if (!(s & ((1 << 10) - 1)))
> > > +		return basprintf("%lldk", s >> 10);
> > > +	return basprintf("0x%lld", s);
> > 
> > s/lld/llx/
> 
> Why that? This will break the typical layout compared
> to all other users of the kernelcmdline syntax.

As I now realize you only ment the last line, this sure makes
sense. I will fix it. But the mtd layer I copied this from
has the same issue. Will fix that aswell.

Thanks,
Michael

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From tpiepho at kymetacorp.com  Wed Oct 26 13:12:07 2016
From: tpiepho at kymetacorp.com (Trent Piepho)
Date: Wed, 26 Oct 2016 20:12:07 +0000
Subject: [PATCH v3 3/3] ARM: socfpga: dtsi: add dw-wdt reset lines
In-Reply-To: <20161017075052.30802-3-s.trumtrar@pengutronix.de>
References: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
 <20161017075052.30802-3-s.trumtrar@pengutronix.de>
Message-ID: <1477512729.14501.14.camel@rtred1test09.kymeta.local>

On Mon, 2016-10-17 at 09:50 +0200, Steffen Trumtrar wrote:
> Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> ---
>  arch/arm/dts/socfpga.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> index d16758fdab46..66d7f21dc6a3 100644
> --- a/arch/arm/dts/socfpga.dtsi
> +++ b/arch/arm/dts/socfpga.dtsi
> @@ -49,3 +49,13 @@
>  &f2s_sdram_ref_clk {
>  	clock-frequency = <0>;
>  };
> +
> +&watchdog0 {
> +	resets = <&rst L4WD0_RESET>;
> +	reset-names = "dw-wdt";

This is the official binding?  The reset-names property is supposed to
be the name of the reset from the perspective of the device being
described, e.g. the watchdog.  Not the name from the perspective of the
reset controller.  Rather than "dw-wdt", the name should something like
"reset", which clearly doesn't add much information, which is why the
reset-names property is supposed to be optional.

> +};
> +
> +&watchdog1 {
> +	resets = <&rst L4WD1_RESET>;
> +	reset-names = "dw-wdt";
> +};


From s.trumtrar at pengutronix.de  Wed Oct 26 23:58:56 2016
From: s.trumtrar at pengutronix.de (Steffen Trumtrar)
Date: Thu, 27 Oct 2016 08:58:56 +0200
Subject: [PATCH v3 3/3] ARM: socfpga: dtsi: add dw-wdt reset lines
In-Reply-To: <1477512729.14501.14.camel@rtred1test09.kymeta.local>
References: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
 <20161017075052.30802-3-s.trumtrar@pengutronix.de>
 <1477512729.14501.14.camel@rtred1test09.kymeta.local>
Message-ID: <20161027065856.tn4tdwtev5aexxyg@pengutronix.de>

On Wed, Oct 26, 2016 at 08:12:07PM +0000, Trent Piepho wrote:
> On Mon, 2016-10-17 at 09:50 +0200, Steffen Trumtrar wrote:
> > Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> > ---
> >  arch/arm/dts/socfpga.dtsi | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> > index d16758fdab46..66d7f21dc6a3 100644
> > --- a/arch/arm/dts/socfpga.dtsi
> > +++ b/arch/arm/dts/socfpga.dtsi
> > @@ -49,3 +49,13 @@
> >  &f2s_sdram_ref_clk {
> >  	clock-frequency = <0>;
> >  };
> > +
> > +&watchdog0 {
> > +	resets = <&rst L4WD0_RESET>;
> > +	reset-names = "dw-wdt";
> 
> This is the official binding?  The reset-names property is supposed to
> be the name of the reset from the perspective of the device being
> described, e.g. the watchdog.  Not the name from the perspective of the
> reset controller.  Rather than "dw-wdt", the name should something like
> "reset", which clearly doesn't add much information, which is why the
> reset-names property is supposed to be optional.
> 

There is no "official" binding. I wasn't really sure about this property
and just tried to derive from other bindings. I don't care for this one,
so I'm okay with removing it.

Thanks,
Steffen

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From guille.rodriguez at gmail.com  Thu Oct 27 00:10:02 2016
From: guille.rodriguez at gmail.com (Guillermo Rodriguez Garcia)
Date: Thu, 27 Oct 2016 09:10:02 +0200
Subject: Read kernel from static UBI volume
Message-ID: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>

Hello all,

I know Barebox can load files from UBIFS. However, is there support
from booting a kernel directly from a static UBI volume?.

Thanks,

Guillermo Rodriguez Garcia
guille.rodriguez at gmail.com


From u.kleine-koenig at pengutronix.de  Thu Oct 27 00:18:10 2016
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Thu, 27 Oct 2016 09:18:10 +0200
Subject: Read kernel from static UBI volume
In-Reply-To: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>
References: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>
Message-ID: <20161027071810.g7web5cjygjqnus5@pengutronix.de>

On Thu, Oct 27, 2016 at 09:10:02AM +0200, Guillermo Rodriguez Garcia wrote:
> I know Barebox can load files from UBIFS. However, is there support
> from booting a kernel directly from a static UBI volume?.

Are you using ptxdist? If so, enable BLSPEC which results in the kernel
being installed (together with a dtb if configured) in the rootfs and
barebox can boot this easily.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From guille.rodriguez at gmail.com  Thu Oct 27 00:29:03 2016
From: guille.rodriguez at gmail.com (Guillermo Rodriguez Garcia)
Date: Thu, 27 Oct 2016 09:29:03 +0200
Subject: Read kernel from static UBI volume
In-Reply-To: <20161027071810.g7web5cjygjqnus5@pengutronix.de>
References: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>
 <20161027071810.g7web5cjygjqnus5@pengutronix.de>
Message-ID: <CABDcavaiBzwe=BgxK946By4vA7X_sZPn6oOUiTO99ObapfPv8Q@mail.gmail.com>

Hello,

2016-10-27 9:18 GMT+02:00 Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>:
> On Thu, Oct 27, 2016 at 09:10:02AM +0200, Guillermo Rodriguez Garcia wrote:
>> I know Barebox can load files from UBIFS. However, is there support
>> from booting a kernel directly from a static UBI volume?.
>
> Are you using ptxdist? If so, enable BLSPEC which results in the kernel
> being installed (together with a dtb if configured) in the rootfs and
> barebox can boot this easily.

Yes, but this is not what I want: I want to be able to read a kernel
from a static UBI volume, not from the rootfs. Is this possible ?

Guillermo Rodriguez Garcia
guille.rodriguez at gmail.com


From s.hauer at pengutronix.de  Thu Oct 27 00:31:57 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 27 Oct 2016 09:31:57 +0200
Subject: Read kernel from static UBI volume
In-Reply-To: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>
References: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>
Message-ID: <20161027073157.u6jmv6ux3xs4x46i@pengutronix.de>

On Thu, Oct 27, 2016 at 09:10:02AM +0200, Guillermo Rodriguez Garcia wrote:
> Hello all,
> 
> I know Barebox can load files from UBIFS. However, is there support
> from booting a kernel directly from a static UBI volume?.

bootm /dev/nand0.ubi.whatever should do.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From guille.rodriguez at gmail.com  Thu Oct 27 00:34:20 2016
From: guille.rodriguez at gmail.com (Guillermo Rodriguez Garcia)
Date: Thu, 27 Oct 2016 09:34:20 +0200
Subject: Read kernel from static UBI volume
In-Reply-To: <20161027073157.u6jmv6ux3xs4x46i@pengutronix.de>
References: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>
 <20161027073157.u6jmv6ux3xs4x46i@pengutronix.de>
Message-ID: <CABDcava4zzJBLtku87=bmp5PdYy0TMejDgTpsoP8Z2zB5vQV-Q@mail.gmail.com>

2016-10-27 9:31 GMT+02:00 Sascha Hauer <s.hauer at pengutronix.de>:
> On Thu, Oct 27, 2016 at 09:10:02AM +0200, Guillermo Rodriguez Garcia wrote:
>> Hello all,
>>
>> I know Barebox can load files from UBIFS. However, is there support
>> from booting a kernel directly from a static UBI volume?.
>
> bootm /dev/nand0.ubi.whatever should do.

That easy?

This is one of the reasons why I like barebox so much better than u-boot..

I assume this will just read the whole volume (as opposed to checking
the zImage size and so on). Correct?

Also will this do the UBI static volume CRC check?

Guillermo Rodriguez Garcia
guille.rodriguez at gmail.com


From s.hauer at pengutronix.de  Thu Oct 27 00:39:48 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 27 Oct 2016 09:39:48 +0200
Subject: Read kernel from static UBI volume
In-Reply-To: <CABDcava4zzJBLtku87=bmp5PdYy0TMejDgTpsoP8Z2zB5vQV-Q@mail.gmail.com>
References: <CABDcavZ08eW8scP2zi_5hUp7J8ex-xj17-n7SRx_5YNC3q-8eQ@mail.gmail.com>
 <20161027073157.u6jmv6ux3xs4x46i@pengutronix.de>
 <CABDcava4zzJBLtku87=bmp5PdYy0TMejDgTpsoP8Z2zB5vQV-Q@mail.gmail.com>
Message-ID: <20161027073948.26b4slsy6na5bi2i@pengutronix.de>

On Thu, Oct 27, 2016 at 09:34:20AM +0200, Guillermo Rodriguez Garcia wrote:
> 2016-10-27 9:31 GMT+02:00 Sascha Hauer <s.hauer at pengutronix.de>:
> > On Thu, Oct 27, 2016 at 09:10:02AM +0200, Guillermo Rodriguez Garcia wrote:
> >> Hello all,
> >>
> >> I know Barebox can load files from UBIFS. However, is there support
> >> from booting a kernel directly from a static UBI volume?.
> >
> > bootm /dev/nand0.ubi.whatever should do.
> 
> That easy?
> 
> This is one of the reasons why I like barebox so much better than u-boot..
> 
> I assume this will just read the whole volume (as opposed to checking
> the zImage size and so on). Correct?

The bootm code only reads the actual image size.

> 
> Also will this do the UBI static volume CRC check?

You read a UBI volume using the UBI code which is more or less identical
to the Kernel, so I'd assume the code does whatever is necessary,
including the crc check.
I'm speaking a bit nebulous because I never used static UBI volumes
myself.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Oct 27 23:53:00 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 28 Oct 2016 08:53:00 +0200
Subject: [PATCH v2] ARM: dts: am33xx.dtsi: Add spi aliases
In-Reply-To: <1477298184-32928-1-git-send-email-t.remmet@phytec.de>
References: <1477298184-32928-1-git-send-email-t.remmet@phytec.de>
Message-ID: <20161028065259.nn2trhf73yae2ble@pengutronix.de>

On Mon, Oct 24, 2016 at 10:36:24AM +0200, Teresa Remmet wrote:
> We need to add the spi aliases to set the bus number correct in
> the driver.
> 
> Delete the spi1 alias again in the am33xx-strip.dtsi for MLO as
> the node is deleted there also.
> 
> Signed-off-by: Teresa Remmet <t.remmet at phytec.de>

Applied, thanks

Sascha

> ---
> Changes in v2:
> - Removed the first patch completly
> - Delete now spi1 alias in strip file
> - Updated commit message
> 
>  arch/arm/dts/am33xx-strip.dtsi | 1 +
>  arch/arm/dts/am33xx.dtsi       | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/arch/arm/dts/am33xx-strip.dtsi b/arch/arm/dts/am33xx-strip.dtsi
> index 2943fd1..83d23a8 100644
> --- a/arch/arm/dts/am33xx-strip.dtsi
> +++ b/arch/arm/dts/am33xx-strip.dtsi
> @@ -14,6 +14,7 @@
>  		/delete-property/ mmc2;
>  		/delete-property/ d_can0;
>  		/delete-property/ d_can1;
> +		/delete-property/ spi1;
>  	};
>  };
>  
> diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
> index 7ba0a0b..f1ee7b3 100644
> --- a/arch/arm/dts/am33xx.dtsi
> +++ b/arch/arm/dts/am33xx.dtsi
> @@ -18,5 +18,7 @@
>  		mmc0 = &mmc1;
>  		mmc1 = &mmc2;
>  		mmc2 = &mmc3;
> +		spi0 = &spi0;
> +		spi1 = &spi1;
>  	};
>  };
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
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-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Oct 28 00:20:25 2016
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 28 Oct 2016 09:20:25 +0200
Subject: [PATCH v3 3/3] ARM: socfpga: dtsi: add dw-wdt reset lines
In-Reply-To: <20161027065856.tn4tdwtev5aexxyg@pengutronix.de>
References: <20161017075052.30802-1-s.trumtrar@pengutronix.de>
 <20161017075052.30802-3-s.trumtrar@pengutronix.de>
 <1477512729.14501.14.camel@rtred1test09.kymeta.local>
 <20161027065856.tn4tdwtev5aexxyg@pengutronix.de>
Message-ID: <20161028072025.aqd4lfooikwwq62o@pengutronix.de>

On Thu, Oct 27, 2016 at 08:58:56AM +0200, Steffen Trumtrar wrote:
> On Wed, Oct 26, 2016 at 08:12:07PM +0000, Trent Piepho wrote:
> > On Mon, 2016-10-17 at 09:50 +0200, Steffen Trumtrar wrote:
> > > Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> > > ---
> > >  arch/arm/dts/socfpga.dtsi | 10 ++++++++++
> > >  1 file changed, 10 insertions(+)
> > > 
> > > diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> > > index d16758fdab46..66d7f21dc6a3 100644
> > > --- a/arch/arm/dts/socfpga.dtsi
> > > +++ b/arch/arm/dts/socfpga.dtsi
> > > @@ -49,3 +49,13 @@
> > >  &f2s_sdram_ref_clk {
> > >  	clock-frequency = <0>;
> > >  };
> > > +
> > > +&watchdog0 {
> > > +	resets = <&rst L4WD0_RESET>;
> > > +	reset-names = "dw-wdt";
> > 
> > This is the official binding?  The reset-names property is supposed to
> > be the name of the reset from the perspective of the device being
> > described, e.g. the watchdog.  Not the name from the perspective of the
> > reset controller.  Rather than "dw-wdt", the name should something like
> > "reset", which clearly doesn't add much information, which is why the
> > reset-names property is supposed to be optional.
> > 
> 
> There is no "official" binding. I wasn't really sure about this property
> and just tried to derive from other bindings. I don't care for this one,
> so I'm okay with removing it.

Could you send a fixup patch for this?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From l.stach at pengutronix.de  Mon Oct 31 09:55:45 2016
From: l.stach at pengutronix.de (Lucas Stach)
Date: Mon, 31 Oct 2016 17:55:45 +0100
Subject: [PATCH] net: e1000: fix i210 register remapping
Message-ID: <20161031165545.5834-1-l.stach@pengutronix.de>

Don't mask out the remapping flag before checking the register offset,
otherwise none of the switch statements will ever match.

Fixes: ff6a64d42ffc (e1000: Consolidate register offset fixups)
Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
---
 drivers/net/e1000/regio.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/regio.c b/drivers/net/e1000/regio.c
index b2e9d7b6a7df..17d08da3b8a2 100644
--- a/drivers/net/e1000/regio.c
+++ b/drivers/net/e1000/regio.c
@@ -5,8 +5,6 @@
 static uint32_t e1000_true_offset(struct e1000_hw *hw, uint32_t reg)
 {
 	if (reg & E1000_MIGHT_BE_REMAPPED) {
-		reg &= ~E1000_MIGHT_BE_REMAPPED;
-
 		if (hw->mac_type == e1000_igb) {
 			switch (reg) {
 			case E1000_EEWR:
@@ -19,7 +17,9 @@ static uint32_t e1000_true_offset(struct e1000_hw *hw, uint32_t reg)
 				reg = E1000_I210_EEMNGCTL;
 				break;
 			}
-		};
+		} else {
+			reg &= ~E1000_MIGHT_BE_REMAPPED;
+		}
 	}
 
 	return reg;
-- 
2.10.1



From l.stach at pengutronix.de  Mon Oct 31 09:58:12 2016
From: l.stach at pengutronix.de (Lucas Stach)
Date: Mon, 31 Oct 2016 17:58:12 +0100
Subject: [PATCH v2] net: e1000: fix i210 register remapping
Message-ID: <20161031165812.9958-1-l.stach@pengutronix.de>

Don't mask out the remapping flag before checking the register offset,
otherwise none of the switch statements will ever match.

Fixes: ff6a64d42ffc (e1000: Consolidate register offset fixups)
Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
---
v2: don't break it the other way around
---
 drivers/net/e1000/regio.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/regio.c b/drivers/net/e1000/regio.c
index b2e9d7b6a7df..1610d5851f05 100644
--- a/drivers/net/e1000/regio.c
+++ b/drivers/net/e1000/regio.c
@@ -5,8 +5,6 @@
 static uint32_t e1000_true_offset(struct e1000_hw *hw, uint32_t reg)
 {
 	if (reg & E1000_MIGHT_BE_REMAPPED) {
-		reg &= ~E1000_MIGHT_BE_REMAPPED;
-
 		if (hw->mac_type == e1000_igb) {
 			switch (reg) {
 			case E1000_EEWR:
@@ -19,7 +17,8 @@ static uint32_t e1000_true_offset(struct e1000_hw *hw, uint32_t reg)
 				reg = E1000_I210_EEMNGCTL;
 				break;
 			}
-		};
+		}
+		reg &= ~E1000_MIGHT_BE_REMAPPED;
 	}
 
 	return reg;
-- 
2.10.1



From dev at lynxeye.de  Mon Oct 31 14:20:19 2016
From: dev at lynxeye.de (Lucas Stach)
Date: Mon, 31 Oct 2016 22:20:19 +0100
Subject: [PATCH] ARM: riotboard: fix barebox partition size
Message-ID: <1477948819-13931-1-git-send-email-dev@lynxeye.de>

This was missed when updating all the partition sizes. The
environment partition has been moved to the correct location,
but the barebox partition size remained unchanged.

Signed-off-by: Lucas Stach <dev at lynxeye.de>
---
 arch/arm/dts/imx6s-riotboard.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/imx6s-riotboard.dts b/arch/arm/dts/imx6s-riotboard.dts
index 7193f28..5758872 100644
--- a/arch/arm/dts/imx6s-riotboard.dts
+++ b/arch/arm/dts/imx6s-riotboard.dts
@@ -29,7 +29,7 @@
 
 	partition at 0 {
 		label = "barebox";
-		reg = <0x0 0x80000>;
+		reg = <0x0 0xe0000>;
 	};
 
 	environment_usdhc4: partition at e0000 {
-- 
2.7.4



