[PATCH] arm/cpu/lowlevel: fix: possible processor mode change
Uwe Kleine-König
u.kleine-koenig at pengutronix.de
Fri Mar 4 01:18:38 PST 2016
On Fri, Mar 04, 2016 at 08:04:48AM +0100, Sascha Hauer wrote:
> Hi Alexander,
>
> On Wed, Mar 02, 2016 at 11:51:28PM +0100, Alexander Kurz wrote:
> > This is a re-application of fix 17644b55.
> > arm_cpu_lowlevel_init() will set the processor mode to 0x13 (supervisor).
> > When this function is entered via a different processor mode, register
> > banking will happen to lr (r14), resulting in an invalid return address.
> > This fix will preserve the return address manually.
> >
> > Signed-off-by: Alexander Kurz <akurz at blala.de>
> > ---
> > arch/arm/cpu/lowlevel.S | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
> > index b76222d..e5baa12 100644
> > --- a/arch/arm/cpu/lowlevel.S
> > +++ b/arch/arm/cpu/lowlevel.S
> > @@ -4,6 +4,8 @@
> >
> > .section ".text_bare_init_","ax"
> > ENTRY(arm_cpu_lowlevel_init)
> > + /* save lr, since it may be banked away with a processor mode change */
> > + mov r2, lr
>
> Thanks for fixing this and for adding a comment why this is done. This
> hopefully prevents us from breaking it again.
>
> Out of interest, what system are you using where this fix is necesssary?
arch/arm/boot/compressed/head.S in Linux has:
/*
* Booting from Angel - need to enter SVC mode and disable
* FIQs/IRQs (numeric definitions from angel arm.h source).
* We only do this if we were in user mode on entry.
*/
mrs r2, cpsr @ get current mode
tst r2, #3 @ not user?
bne not_angel
mov r0, #0x17 @ angel_SWIreason_EnterSVC
ARM( swi 0x123456 ) @ angel_SWI_ARM
THUMB( svc 0xab ) @ angel_SWI_THUMB
not_angel:
Not that the patch under discussion would fix running barebox from
Angel, but it seems that this is another situation where the image is
not started in SVC.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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