[PATCH] arm/cpu/lowlevel: fix: possible processor mode change

[Uwe Kleine-König]

Hello Sascha,

On Fri, Mar 04, 2016 at 08:04:48AM +0100, Sascha Hauer wrote:
> Hi Alexander,
> 
> On Wed, Mar 02, 2016 at 11:51:28PM +0100, Alexander Kurz wrote:
> > This is a re-application of fix 17644b55.
> > arm_cpu_lowlevel_init() will set the processor mode to 0x13 (supervisor).
> > When this function is entered via a different processor mode, register
> > banking will happen to lr (r14), resulting in an invalid return address.
> > This fix will preserve the return address manually.
> > 
> > Signed-off-by: Alexander Kurz <akurz at blala.de>
> > ---
> >  arch/arm/cpu/lowlevel.S | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
> > index b76222d..e5baa12 100644
> > --- a/arch/arm/cpu/lowlevel.S
> > +++ b/arch/arm/cpu/lowlevel.S
> > @@ -4,6 +4,8 @@
> >  
> >  .section ".text_bare_init_","ax"
> >  ENTRY(arm_cpu_lowlevel_init)
> > +	/* save lr, since it may be banked away with a processor mode change */
> > +	mov	r2, lr

Acked-by: Uwe Kleine-König <u.kleine-koenig at pengutronix.de>

> Thanks for fixing this and for adding a comment why this is done. This
> hopefully prevents us from breaking it again.
> 
> Out of interest, what system are you using where this fix is necesssary?
> 
> Uwe, now we know why that was done and why e190bcf (arm/cpu/lowlevel:
> Don't save the return address in another register) was a bad idea.

Right. :-) But even if I had seen
17644b55cae9c234b26213d644e9fd939b0ec815 back then I would have wondered
because the commit log isn't that verbose :-(

Best regards
Uwe

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