[PATCH v2 0/8] Socfpga: QSPI support

[Sascha Hauer]

On Thu, May 28, 2015 at 05:55:59PM +0200, Steffen Trumtrar wrote:
> Hi!
> 
> This series adds support for reading,writing and booting from Quad SPI
> flash chips on the SoCFPFGA platform.
> 
> The driver is based on a patch for linux, which is still in development.
> As this driver uses the spi-nor framework, this is imported into barebox, too.
> To deduplicate the code base, the m25p80 is also converted to use the spi-nor
> framework.
> 
> With the QSPI driver in place, support for booting from it is also added.
> As the preloader barebox doesn't have a devicetree to go from, the driver doesn't
> touch the registers that have already been set up successfully by the Boot ROM code.
> If there ever is any other user of the Cadence QSPI core, that does not have a
> devicetree to probe from, platform code might have to be added for this initialization.
> As there isn't at the moment, I chose to not bother with this.
> 
> The cadence-qspi was tested on the Socrates, Sockit and Socdk.
> The m25p80 was tested as "m25p80" on a Phycore AM335x SOM.

Applied, thanks.

Please look out for trailing blank lines next time. There are some of
them in the dts changes I manually fixed up this time.

Sascha

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