[PATCH] ARM: i.MX6: use generic calculation in nand bbu handler
Stefan Christ
s.christ at phytec.de
Tue Jan 27 05:14:19 PST 2015
The parameters ECC Strength, BadBlockMarkerByte and BadBlockMarkerStartBit in
the FCB structure depends on the nand chip's pagesize and oobsize. Instead of
hardcoding these values into the imx6 bbu handler calculate these values on the
fly. Therefore we export the necessary functions from the nand_mxs driver to
use them in the bbu handler.
Signed-off-by: Stefan Christ <s.christ at phytec.de>
---
arch/arm/mach-imx/Kconfig | 1 +
arch/arm/mach-imx/imx6-bbu-nand.c | 28 +++++------------------
arch/arm/mach-imx/include/mach/nand_mxs.h | 37 +++++++++++++++++++++++++++++++
drivers/mtd/nand/nand_mxs.c | 7 +++---
4 files changed, 48 insertions(+), 25 deletions(-)
create mode 100644 arch/arm/mach-imx/include/mach/nand_mxs.h
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 9ac36e1..42074a2 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -119,6 +119,7 @@ config BAREBOX_UPDATE_IMX6_NAND
depends on BAREBOX_UPDATE
depends on MTD
depends on MTD_WRITE
+ select NAND_MXS
default y
comment "Freescale i.MX System-on-Chip"
diff --git a/arch/arm/mach-imx/imx6-bbu-nand.c b/arch/arm/mach-imx/imx6-bbu-nand.c
index 1b46e51..fb7224c 100644
--- a/arch/arm/mach-imx/imx6-bbu-nand.c
+++ b/arch/arm/mach-imx/imx6-bbu-nand.c
@@ -32,6 +32,7 @@
#include <linux/mtd/mtd-abi.h>
#include <linux/mtd/mtd.h>
#include <linux/stat.h>
+#include <mach/nand_mxs.h>
struct dbbt_block {
uint32_t Checksum;
@@ -235,22 +236,9 @@ static int fcb_create(struct fcb_block *fcb, struct mtd_info *mtd)
fcb->TotalPageSize = mtd->writesize + mtd->oobsize;
fcb->SectorsPerBlock = mtd->erasesize / mtd->writesize;
- if (mtd->writesize == 2048) {
- fcb->EccBlock0EccType = 4;
- } else if (mtd->writesize == 4096) {
- if (mtd->oobsize == 218) {
- fcb->EccBlock0EccType = 8;
- } else if (mtd->oobsize == 128) {
- fcb->EccBlock0EccType = 4;
- } else {
- pr_err("Illegal oobsize %d\n", mtd->oobsize);
- return -EINVAL;
- }
- } else {
- pr_err("Illegal writesize %d\n", mtd->writesize);
- return -EINVAL;
- }
-
+ /* Divide ECC strength by two and save the value into FCB structure. */
+ fcb->EccBlock0EccType =
+ mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1;
fcb->EccBlockNEccType = fcb->EccBlock0EccType;
/* Also hardcoded in kobs-ng */
@@ -267,12 +255,8 @@ static int fcb_create(struct fcb_block *fcb, struct mtd_info *mtd)
/* DBBT search area starts at third block */
fcb->DBBTSearchAreaStartAddress = mtd->erasesize / mtd->writesize * 2;
- if (mtd->writesize == 2048) {
- fcb->BadBlockMarkerByte = 0x000007cf;
- } else {
- pr_err("BadBlockMarkerByte unknown for writesize %d\n", mtd->writesize);
- return -EINVAL;
- }
+ fcb->BadBlockMarkerByte = mxs_nand_mark_byte_offset(mtd);
+ fcb->BadBlockMarkerStartBit = mxs_nand_mark_bit_offset(mtd);
fcb->BBMarkerPhysicalOffset = mtd->writesize;
diff --git a/arch/arm/mach-imx/include/mach/nand_mxs.h b/arch/arm/mach-imx/include/mach/nand_mxs.h
new file mode 100644
index 0000000..eca3177
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/nand_mxs.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2015 PHYTEC Messtechnik GmbH,
+ * Author: Stefan Christ <s.christ at phytec.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __NAND_MXS_H
+#define __NAND_MXS_H
+
+/*
+ * Functions are definied in drivers/mtd/nand/nand_mxs.c. They are used to
+ * calculate the ECC Strength, BadBlockMarkerByte and BadBlockMarkerStartBit
+ * which are placed into the FCB structure. The i.MX6 ROM needs these
+ * parameters to read the firmware from NAND.
+ *
+ * The parameters depends on the pagesize and oobsize of NAND chips and are
+ * different for each combination. To avoid placing hardcoded values in the bbu
+ * update handler code, the generic calculation from the driver code is used.
+ */
+
+uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
+ uint32_t page_oob_size);
+
+uint32_t mxs_nand_mark_byte_offset(struct mtd_info *mtd);
+
+uint32_t mxs_nand_mark_bit_offset(struct mtd_info *mtd);
+
+#endif /* __NAND_MXS_H */
diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index 94101a3..4c5bdfa 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -34,6 +34,7 @@
#include <stmp-device.h>
#include <asm/mmu.h>
#include <mach/generic.h>
+#include <mach/nand_mxs.h>
#define MX28_BLOCK_SFTRST (1 << 31)
#define MX28_BLOCK_CLKGATE (1 << 30)
@@ -231,7 +232,7 @@ static uint32_t mxs_nand_aux_status_offset(void)
return (MXS_NAND_METADATA_SIZE + 0x3) & ~0x3;
}
-static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
+uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
uint32_t page_oob_size)
{
int ecc_chunk_count = mxs_nand_ecc_chunk_cnt(page_data_size);
@@ -294,14 +295,14 @@ static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
return block_mark_bit_offset;
}
-static uint32_t mxs_nand_mark_byte_offset(struct mtd_info *mtd)
+uint32_t mxs_nand_mark_byte_offset(struct mtd_info *mtd)
{
uint32_t ecc_strength;
ecc_strength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
return mxs_nand_get_mark_offset(mtd->writesize, ecc_strength) >> 3;
}
-static uint32_t mxs_nand_mark_bit_offset(struct mtd_info *mtd)
+uint32_t mxs_nand_mark_bit_offset(struct mtd_info *mtd)
{
uint32_t ecc_strength;
ecc_strength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
--
1.9.1
More information about the barebox
mailing list