[PATCH] mtd: nand: fix marvell nand driver

Sascha Hauer s.hauer at pengutronix.de
Mon Jan 19 00:02:51 PST 2015


On Sat, Jan 17, 2015 at 04:00:01PM +0100, Robert Jarzmik wrote:
> This fixes 4 small bugs :
> 
>  - too small timings
>    The calculated timings should be rounded up, ie. a minimum timing of
>    3.2 nand clock cycles should be programmed as a 4 cycles timing, and
>    not as 3 nand clock cycles
> 
>  - the interrupts should be masked all the time
>    Writing 0 to NDCR unmasked interrupts, which is unnecessary and fools
>    the linux kernel pxa3xx driver which is not yet hardened enough.
> 
>  - the command should only be launched once the controller is ready
>    This fixes transient bugs where a command is not actually
>    launched. The WRCMDREQ bit is asserted after setting NDCR_ND_RUN bit
>    once the NFC is ready to acquire a command.
> 
>  - column calculation
>    Column number was divided by 2 in 16 bits flash devices. Even if this
>    is correct for NAND array addressing, it is incorrect for READID, and
>    prevents an ONFI scan identification (as address is 0x10 instead of
>    the 0x20 required by ONFI).
> 
> All these bugs except the second are drained from the linux kernel driver.
> 
> Signed-off-by: Robert Jarzmik <robert.jarzmik at free.fr>
> ---
>  drivers/mtd/nand/nand_mrvl_nfc.c | 57 ++++++++++++++++++++++++++--------------
>  1 file changed, 37 insertions(+), 20 deletions(-)

Squashed into the original commit.

Sascha

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