[PATCH 1/3] ARM Samsung: fix booting from NAND without pbl
Michael Olbrich
m.olbrich at pengutronix.de
Tue Feb 24 06:53:48 PST 2015
This was broken in 558d72dc5116 (ARM Samsung: fix booting from NAND with
pbl). '_text' is TEXT_BASE when building without pbl and (TEXT_BASE -
SZ_2M) when building with pbl, so this works in both cases.
Signed-off-by: Michael Olbrich <m.olbrich at pengutronix.de>
---
I hope I understood how this should work and this is correct now. It worked
for me with and without pbl. Anything else that could mess this up?
Michael
arch/arm/mach-samsung/lowlevel-s3c24x0.S | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-samsung/lowlevel-s3c24x0.S b/arch/arm/mach-samsung/lowlevel-s3c24x0.S
index 626ad0418778..d43cdff52863 100644
--- a/arch/arm/mach-samsung/lowlevel-s3c24x0.S
+++ b/arch/arm/mach-samsung/lowlevel-s3c24x0.S
@@ -15,7 +15,6 @@
*/
#include <config.h>
-#include <linux/sizes.h>
#include <mach/s3c-iomap.h>
.section ".text_bare_init.s3c24x0_disable_wd","ax"
@@ -251,7 +250,7 @@ s3c24x0_nand_boot:
beq 2f
mov pc, lr /* NOR case: nothing to do here */
-2: ldr sp, =(TEXT_BASE - SZ_2M) /* Setup a temporary stack in SDRAM */
+2: ldr sp, =_text /* Setup a temporary stack in SDRAM */
/*
* We still run at a location we are not linked to. But lets still running
* from the internal SRAM, this may speed up the boot
@@ -262,7 +261,7 @@ s3c24x0_nand_boot:
/*
* Adjust the return address to the correct address in SDRAM
*/
- ldr r1, =(TEXT_BASE - SZ_2M)
+ ldr r1, =_text
add lr, lr, r1
mov pc, lr
--
2.1.4
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