[PATCH v3 02/10] ARM: socfpga: avoid using external regulator for PLL

[Steffen Trumtrar]

>From Altera U-Boot:
	FogBugz #210587: Fixing PLL HW configuration issue

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 arch/arm/mach-socfpga/clock-manager.c              | 20 +++++++++++++-------
 arch/arm/mach-socfpga/include/mach/clock-manager.h |  5 +++++
 2 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-socfpga/clock-manager.c b/arch/arm/mach-socfpga/clock-manager.c
index 13ca69b977a0..dc81301efd01 100644
--- a/arch/arm/mach-socfpga/clock-manager.c
+++ b/arch/arm/mach-socfpga/clock-manager.c
@@ -123,11 +123,14 @@ void socfpga_cm_basic_init(const struct socfpga_cm_config *cfg)
 	 * Put all plls VCO registers back to reset value.
 	 * Some code might have messed with them.
 	 */
-	writel(CLKMGR_MAINPLLGRP_VCO_RESET_VALUE,
+	writel(CLKMGR_MAINPLLGRP_VCO_RESET_VALUE &
+		~CLKMGR_MAINPLLGRP_VCO_REGEXTSEL_MASK,
 		cm + CLKMGR_MAINPLLGRP_VCO_ADDRESS);
-	writel(CLKMGR_PERPLLGRP_VCO_RESET_VALUE,
+	writel(CLKMGR_PERPLLGRP_VCO_RESET_VALUE &
+		~CLKMGR_PERPLLGRP_VCO_REGEXTSEL_MASK,
 		cm + CLKMGR_PERPLLGRP_VCO_ADDRESS);
-	writel(CLKMGR_SDRPLLGRP_VCO_RESET_VALUE,
+	writel(CLKMGR_SDRPLLGRP_VCO_RESET_VALUE &
+		~CLKMGR_SDRPLLGRP_VCO_REGEXTSEL_MASK,
 		cm + CLKMGR_SDRPLLGRP_VCO_ADDRESS);
 
 	/*
@@ -151,12 +154,15 @@ void socfpga_cm_basic_init(const struct socfpga_cm_config *cfg)
 	 * We made sure bgpwr down was assert for 5 us. Now deassert BG PWR DN
 	 * with numerator and denominator.
 	 */
-	writel(cfg->main_vco_base | CLKMGR_MAINPLLGRP_VCO_REGEXTSEL_MASK,
+	writel(cfg->main_vco_base | CLEAR_BGP_EN_PWRDN,
 		cm + CLKMGR_MAINPLLGRP_VCO_ADDRESS);
-	writel(cfg->peri_vco_base | CLKMGR_PERPLLGRP_VCO_REGEXTSEL_MASK,
+	writel(cfg->peri_vco_base | CLEAR_BGP_EN_PWRDN,
 		cm + CLKMGR_PERPLLGRP_VCO_ADDRESS);
-	writel(cfg->sdram_vco_base | CLKMGR_SDRPLLGRP_VCO_REGEXTSEL_MASK,
-		cm + CLKMGR_SDRPLLGRP_VCO_ADDRESS);
+	writel(cfg->sdram_vco_base |
+	       CLKMGR_SDRPLLGRP_VCO_OUTRESET_SET(0) |
+	       CLKMGR_SDRPLLGRP_VCO_OUTRESETALL_SET(0) |
+	       CLEAR_BGP_EN_PWRDN,
+	       cm + CLKMGR_SDRPLLGRP_VCO_ADDRESS);
 
 	writel(cfg->mpuclk, cm + CLKMGR_MAINPLLGRP_MPUCLK_ADDRESS);
 	writel(cfg->mainclk, cm + CLKMGR_MAINPLLGRP_MAINCLK_ADDRESS);
diff --git a/arch/arm/mach-socfpga/include/mach/clock-manager.h b/arch/arm/mach-socfpga/include/mach/clock-manager.h
index a2b697561aeb..b67f256091d4 100644
--- a/arch/arm/mach-socfpga/include/mach/clock-manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock-manager.h
@@ -185,4 +185,9 @@ void socfpga_cm_basic_init(const struct socfpga_cm_config *cfg);
 #define CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_MASK 0x000001ff
 #define CLKMGR_SDRPLLGRP_S2FUSER2CLK_CNT_MASK 0x000001ff
 
+#define CLEAR_BGP_EN_PWRDN \
+	(CLKMGR_MAINPLLGRP_VCO_PWRDN_SET(0)| \
+	CLKMGR_MAINPLLGRP_VCO_EN_SET(0)| \
+	CLKMGR_MAINPLLGRP_VCO_BGPWRDN_SET(0))
+
 #endif /* _CLOCK_MANAGER_H_ */
-- 
2.1.4