[PATCH] PL310 support

[Sascha Hauer]

This series has some fixes for the cache-l2x0 driver and implements PL310
support. Finally the 2nd level cache on i.MX6 is enabled.

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Sascha Hauer (5):
      ARM: MMU: Fix order when flushing inner/outer cache
      ARM: l2x0: Flush cache before disabling it
      ARM: l2x0: Implement L310 support
      ARM: l2x0: Add some informational debug messages
      ARM: i.MX6: Enable l2 cache

 arch/arm/cpu/cache-l2x0.c  | 48 +++++++++++++++++++++++++++++++++++++++++++---
 arch/arm/cpu/cache.c       |  2 ++
 arch/arm/cpu/cpu.c         |  3 +--
 arch/arm/cpu/mmu.c         |  2 +-
 arch/arm/include/asm/mmu.h |  1 +
 arch/arm/mach-imx/Kconfig  |  1 +
 arch/arm/mach-imx/imx6.c   | 35 +++++++++++++++++++++++++++++++++
 7 files changed, 86 insertions(+), 6 deletions(-)