[PATCH 00/15] PCI bridges and Tegra PCI stuff

Lucas Stach dev at lynxeye.de
Thu Sep 25 13:46:55 PDT 2014

Am Donnerstag, den 25.09.2014, 23:02 +0400 schrieb Antony Pavlov:
> On Thu, 25 Sep 2014 19:04:54 +0200
> Lucas Stach <dev at lynxeye.de> wrote:
> > Ok, I'm sending this out before it gathers any more dust.
> > 
> > This still doesn't work on Tegra K1 and I also haven't got
> > around to finish the rtl8169 network driver, but it seems
> > this pile is already a worthwile improvement.
> > 
> > First 7 patches are general barebox PCI improvements for
> > better tracking of PCI resources and handling bridge setup.
> I have tryed this series.
> I have got several 
>   'BAR does not fit within bus IO res'
> messages on qemu-malta. So not all available pci devices were registered.
I think that's because patch 2 fixes a problem where IO resources would
be populated from the host controllers MEM resource. IO resources are
now properly accounted.

>From a quick look at the code it seems you aren't properly assigning the
resource.end for the IO region on malta. Can you please check this?
Otherwise please post the PCI debug messages.


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