[PATCH 6/9] MIPS: dts: add jz4780.dtsi

[Antony Pavlov]

Based on file from https://github.com/MIPS/CI20_linux/tree/ci20-v3.16

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/dts/jz4780.dtsi | 56 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/mips/dts/jz4780.dtsi b/arch/mips/dts/jz4780.dtsi
new file mode 100644
index 0000000..9f0de5d
--- /dev/null
+++ b/arch/mips/dts/jz4780.dtsi
@@ -0,0 +1,56 @@
+#include "skeleton.dtsi"
+
+/ {
+	soc {
+		model = "Ingenic JZ4780";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges = <>;
+
+		wdt: wdt at 10002000 {
+			compatible = "ingenic,jz4740-wdt";
+			reg = <0x10002000 0x10>;
+		};
+
+		uart0: serial at 10030000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10030000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <48000000>;
+			status = "disabled";
+		};
+
+		uart1: serial at 10031000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10031000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <48000000>;
+			status = "disabled";
+		};
+
+		uart2: serial at 10032000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10032000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <48000000>;
+			status = "disabled";
+		};
+
+		uart3: serial at 10033000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10033000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <48000000>;
+			status = "disabled";
+		};
+
+		uart4: serial at 10034000 {
+			compatible = "ingenic,jz4740-uart";
+			reg = <0x10034000 0x100>;
+			reg-shift = <2>;
+			clock-frequency = <48000000>;
+			status = "disabled";
+		};
+	};
+};
-- 
2.1.0