[PATCH v2 7/7] Documentation: add OpenRISC or1ksim emulator section
Franck Jullien
franck.jullien at gmail.com
Mon Sep 8 00:12:06 PDT 2014
Hi Antony,
2014-09-08 8:53 GMT+02:00 Antony Pavlov <antonynpavlov at gmail.com>:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> Cc: Franck Jullien <franck.jullien at gmail.com>
> ---
> Documentation/boards/openrisc.rst | 51 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 51 insertions(+)
>
> diff --git a/Documentation/boards/openrisc.rst b/Documentation/boards/openrisc.rst
> new file mode 100644
> index 0000000..0b36712
> --- /dev/null
> +++ b/Documentation/boards/openrisc.rst
> @@ -0,0 +1,51 @@
> +OpenRISC
> +========
> +
> +or1ksim
> +-------
> +
> +Compile or1ksim emulator::
> +
> + $ cd ~/
> + $ git clone https://github.com/fjullien/or1ksim
You should use this repo: https://github.com/openrisc/or1ksim
> + $ cd or1ksim
> + $ ./configure
> + $ make
> +
> +Create minimal or1ksim.cfg file::
> +
> + section cpu
> + ver = 0x12
> + cfgr = 0x20
> + rev = 0x0001
> + end
> +
> + section memory
> + name = "RAM"
> + type = unknown
> + baseaddr = 0x00000000
> + size = 0x02000000
> + delayr = 1
> + delayw = 2
> + end
> +
> + section uart
> + enabled = 1
> + baseaddr = 0x90000000
> + irq = 2
> + 16550 = 1
> + /* channel = "tcp:10084" */
> + channel = "xterm:"
> + end
> +
> + section ethernet
> + enabled = 1
> + baseaddr = 0x92000000
> + irq = 4
> + rtx_type = "tap"
> + tap_dev = "tap0"
> + end
> +
> +Run or1ksim::
> +
> + $ ~/or1ksim/sim -f or1ksim.cfg barebox
> --
> 2.1.0
>
Franck.
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