[PATCH v2 4/7] openrisc: dts: import or1ksim.dts from linux-3.16
Antony Pavlov
antonynpavlov at gmail.com
Sun Sep 7 23:53:06 PDT 2014
There are some minor changes with original linux-3.16 file:
* the 'model' attribute is added (it used for barebox banner board name);
* all "opencores,*-rtlsvn*" 'compatible' attribute values are dropped;
these values are not actually used in the device drivers.
Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
Cc: Franck Jullien <franck.jullien at gmail.com>
---
arch/openrisc/dts/or1ksim.dts | 51 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/openrisc/dts/or1ksim.dts b/arch/openrisc/dts/or1ksim.dts
new file mode 100644
index 0000000..7316cc6
--- /dev/null
+++ b/arch/openrisc/dts/or1ksim.dts
@@ -0,0 +1,51 @@
+/dts-v1/;
+/ {
+ model = "or1ksim";
+ compatible = "opencores,or1ksim";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&pic>;
+
+ chosen {
+ bootargs = "console=uart,mmio,0x90000000,115200";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu at 0 {
+ compatible = "opencores,or1200-rtlsvn481";
+ reg = <0>;
+ clock-frequency = <20000000>;
+ };
+ };
+
+ /*
+ * OR1K PIC is built into CPU and accessed via special purpose
+ * registers. It is not addressable and, hence, has no 'reg'
+ * property.
+ */
+ pic: pic {
+ compatible = "opencores,or1k-pic";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+
+ serial0: serial at 90000000 {
+ compatible = "ns16550a";
+ reg = <0x90000000 0x100>;
+ interrupts = <2>;
+ clock-frequency = <50000000>;
+ };
+
+ enet0: ethoc at 92000000 {
+ compatible = "opencores,ethoc";
+ reg = <0x92000000 0x100>;
+ interrupts = <4>;
+ };
+};
--
2.1.0
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