[PATCH 4/6] net: phy: Support Marvell 88EE1545 PHY
ezequiel.garcia at free-electrons.com
Sat Aug 2 10:40:21 PDT 2014
On 31 Jul 07:25 PM, Sebastian Hesselbarth wrote:
> On 29.07.2014 23:37, Ezequiel Garcia wrote:
> >On 29 Jul 05:44 PM, Ezequiel Garcia wrote:
> >>This commit adds support for Marvell's 88E1545 PHY chip. In particular, this
> >>allows to support QSGMII interfaces.
> >>Signed-off-by: Ezequiel Garcia <ezequiel.garcia at free-electrons.com>
> >> drivers/net/phy/marvell.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++
> >> 1 file changed, 59 insertions(+)
> >>diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
> >>index 34f852e..ad8854d 100644
> >>--- a/drivers/net/phy/marvell.c
> >>+++ b/drivers/net/phy/marvell.c
> >>@@ -23,6 +23,7 @@
> >> #define MARVELL_PHY_ID_88E1318S 0x01410e90
> >> #define MARVELL_PHY_ID_88E1116R 0x01410e40
> >> #define MARVELL_PHY_ID_88E1510 0x01410dd0
> >>+#define MARVELL_PHY_ID_88E154x 0x01410eb1
> >> /* Mask used for ID comparisons */
> >> #define MARVELL_PHY_ID_MASK 0xfffffff0
> >Small erratum: given this mask, the ID for the new PHY device should be
> >0x0x01410eb0 instead of 0x01410eb1.
> >And by the way, Mirabox and Openblocks AX3 network support is not working.
> >The link is not detected, so it seems there's some more PHY work to be done.
I've been doing some more tests and it seems that Openblocks AX3 works fine
after all (last time I wasn't setting the parameters properly).
I need to do some more tests for Mirabox, but we probably need to setup the
pinctrl to make it work. Currently, the board hangs when trying to bring up
the network interface.
> I just confirmed that (after adding support for 88e1318), driver works
> on Armada XP ix4-300d on both RGMII ports.
> Armada XP requires some additional magic foo in some retarded register
> to enable RGMII:
> #define ARMADA_XP_PUP_ENABLE_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x1864c)
> /* Enable GBE0, GBE1, LCD and NFC PUP */
> reg = readl(ARMADA_XP_PUP_ENABLE_BASE);
> reg |= 0x17;
> writel(reg, ARMADA_XP_PUP_ENABLE_BASE);
Thanks a lot for this test! Do you think it's OK to just add that
initialization to armada_370_xp_init_soc() ?
> I am not yet sure if that is also true for Armada 370 nor if it is also
> true for SGMII/QSGMII ports. Took me a while to hunt this down, but
> without above foo, there is no txclk on RGMII.
The register is documented only on Armada XP, and it seems it's not needed
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
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