[PATCH] Phytec phyCORE AM335x updates

[Sascha Hauer]

The Phytec phyCORE-AM335x comes in various different RAM settings.
This series adds support for the 128MB and 256MB configurations.
Also the NAND ECC mode setting is fixed, it is now compatible to
the Kernel.

With this the phyBOARD WEGA is working. Some of the devices are
different from the phyCORE on the RDK, so we'll need a different
device tree in the future, but for now it's enough to get something
started.

Sascha

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Sascha Hauer (7):
      ARM: AM33xx: Add SDRAM size detection
      ARM: phyCORE-am335x: read back SDRAM controller settings
      ARM: phyCORE-am335x: Add support for more SDRAM configurations
      mtd: omap gpmc: fix ecc bytes/size
      mtd: omap gpmc: reserve 14 byte/subpage for ECC in BCH8 romcode
      mtd: omap gpmc: fix bch8 nand-ecc-opt property
      ARM: AM3355x: Update defconfig

 arch/arm/boards/phytec-phycore-am335x/lowlevel.c | 113 ++++++++++++++++++-----
 arch/arm/configs/am335x_defconfig                |  83 +++++++++--------
 arch/arm/dts/am335x-phytec-phycore.dts           |   5 -
 arch/arm/mach-omap/Makefile                      |   1 +
 arch/arm/mach-omap/am33xx_generic.c              |  56 +++++++++++
 arch/arm/mach-omap/am33xx_scrm.c                 |  51 ++++++++++
 arch/arm/mach-omap/include/mach/am33xx-silicon.h |   2 +
 drivers/bus/omap-gpmc.c                          |   3 -
 drivers/mtd/nand/nand_omap_gpmc.c                |  20 ++--
 images/Makefile.am33xx                           |  14 ++-
 10 files changed, 261 insertions(+), 87 deletions(-)
 create mode 100644 arch/arm/mach-omap/am33xx_scrm.c