Freescale P1020 Startup

Renaud Barbier renaud.barbier at ge.com
Tue Apr 29 03:38:15 PDT 2014


Hello Tobias,
I was away for a week, hence the late answer.

Have you made any progress since you sent this email?

As far as I know, this early in the code there is no difference.

If you have more information on your debug step, I may be able to find
something.

What tool do you use?

cheers,
REnaud


On 22/04/2014 13:34, Tobias Waldekranz wrote:
> Hi, I'm currently trying to bring up a P1020 based board which boots
> from a NOR flash. My board config is based on the existing P2020RDB
> board.
> 
> The code faults very early with an instruction TLB error when
> transitioning from the boot page (0xfffff000) to the flash's address
> space (0xeffff000). The TLB has the same valid entries that U-Boot has
> setup at the corresponding point in the code (at the end of
> create_init_ram_area).
> 
> I have tried to compare start.S with its U-Boot cousin but alas, my
> PPC assembler fu fails me. Are there any differences between the E500
> cores in the P1020 vs. P2020 that must be taken in to consideration in
> start.S?
> 




More information about the barebox mailing list