[PATCH 00/18] Tegra 3 support

Sascha Hauer s.hauer at pengutronix.de
Wed Apr 23 02:41:25 PDT 2014


On Sun, Apr 13, 2014 at 03:27:30PM +0200, Lucas Stach wrote:
> Ok, this one took me a little longer than I would
> have wished for, but now it's good enough to post.
> 
> This series adds support for the Tegra 3 line of
> SoCs. This includes a clock driver that sets up the
> PLLs and peripheral clocks and a pinctrl driver to
> bring the external muxing into a sane state.
> 
> There is still a lot to do here, but with this
> series barebox starts up on an NVidia Beaver board
> and the eMMC is usable.
> 
> Next step would be to integrate BCT writing into
> the Tegra image process so barebox is able to write
> itself to MMC as a bootable image.
> 
> Lucas Stach (18):
>   gpio: tegra: remove dead code
>   mmc: tegra: fix typo
>   tegra: disable more lowlevel unsafe switch optimizations
>   tegra: source MSELECT clock from CLK_M
>   tegra: add Tegra3 kconfig symbol
>   tegra: add Tegra3 ramsize detection
>   tegra: add Tegra3 mem initcall
>   tegra: recognize T30 in debug UART code
>   dt-bindings: add pinctrl-tegra.h
>   pinctrl: tegra: add Tegra3 driver
>   dt-bindings: add tegra30-car.h
>   clk: tegra: consider new T30 clock registers
>   clk: tegra: add Tegra3 driver
>   gpio: tegra: add Tegra3 setup
>   ARM: tegra: add basic Tegra3 DT
>   ARM: tegra: add NVidia Beaver board support
>   ARM: dts: tegra: add full Beaver pinmux
>   defconfig: tegra: add some useful options

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



More information about the barebox mailing list