[PATCH] MIPS: qemu-malta: add CBUS UART support

[Antony Pavlov]

This patch adds CBUS UART dts support;
also it adds the necessary macros for DEBUG_LL.

qemu-malta supports three serial interfaces:

  * two ports are provided by the FDC37M817
    Super I/O; this chip is connected via LPC bus
    to Intel 82371EB (PIIX4E) South Bridge;

  * the third serial port is provided by
    the discrete TI 16C550C (CBUS UART);
    this chip is connected via CBUS directly
    to the board's GT64120 North Bridge.

See Malta User's Manual (MD00048) for details.

CBUS UART Instructions for use:

  1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config
     (or disable uart0 in dts) and compile barebox;

  2. run qemu:

     qemu-system-mips -nographic -nodefaults \
        -monitor null -M malta -m 256 \
        -serial null -serial null -serial stdio \
        -bios barebox-flash-image

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/dts/qemu-malta.dts                 | 8 ++++++++
 arch/mips/mach-malta/include/mach/hardware.h | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/arch/mips/dts/qemu-malta.dts b/arch/mips/dts/qemu-malta.dts
index b6b69c4..67fe591 100644
--- a/arch/mips/dts/qemu-malta.dts
+++ b/arch/mips/dts/qemu-malta.dts
@@ -25,6 +25,14 @@
 		clock-frequency = <1843200>;
 	};
 
+	uart2: serial at bf000900 {
+		compatible = "ns16550a";
+		reg = <0xbf000900 0x40>;
+		reg-shift = <3>;
+		/* no matter for emulated port */
+		clock-frequency = <1843200>;
+	};
+
 	nor0: flash at be000000 {
 		#address-cells = <1>;
 		#size-cells = <1>;
diff --git a/arch/mips/mach-malta/include/mach/hardware.h b/arch/mips/mach-malta/include/mach/hardware.h
index 9345a67..ba28cb8 100644
--- a/arch/mips/mach-malta/include/mach/hardware.h
+++ b/arch/mips/mach-malta/include/mach/hardware.h
@@ -20,6 +20,9 @@
 
 #define MALTA_PIIX4_UART0	0xb80003f8
 
+#define MALTA_CBUS_UART	0xbf000900
+#define MALTA_CBUS_UART_SHIFT	3
+
 /*
  * Reset register.
  */
-- 
1.9.0