[PATCH] gpio: Add designware gpio controller support

[Sebastian Hesselbarth]

On 09/10/2013 09:48 AM, Sascha Hauer wrote:
> On Mon, Sep 09, 2013 at 06:28:48PM +0200, Sebastian Hesselbarth wrote:
>> I have seen this driver and think it can be improved by exploiting
>> its config1/2 registers where synthesis settings are stored. Please
>> also look at [1] pp.1229; you can read out number of ports, port
>> width, interrupt, and debounce features.
>
> Ok, the port width feature is easy enough to implement. Will add it in
> the next version.
>
> I also added a check for multiple ports, but just ignore the additional
> ports for now since I don't know the register offsets and also have no
> hardware to actually test it (The SoCFPGA only has one port)

Ok, fair enough. IIRC the Armada 1500 uses multiple instances instead
of multiple ports, too.

>> Unfortunately, I am not ready to run barebox on Armada 1500 and I
>> don't have a socfpga to test. So if you are not eager to modify it now,
>> I can add config reg based read-out later.
>>
>> [1] http://www.altera.com/literature/hb/arria-v/hps.pdf
>>
>> [...]
>>> +static __maybe_unused struct of_device_id dwgpio_match[] = {
>>> +	{
>>> +		.compatible = "snps,dw-gpio",
>>> +	}, {
>>
>> Please add "snps,dw-apb-gpio", that's what the linux driver
>> will look for if make to pick it up for Armada 1500.
>
> I'll better just change it to "snps,dw-apb-gpio". There already is a
> dtsi file in the kernel which uses this binding (although it looks like
> it hasn't been approved by anyone)

The driver got Acks, but must have slipped through. I have seen your
v2 but it still uses "snps,dw-gpio".

Sebastian