NAND + imx53, BBT/timings?

[Vanhauwaert Wouter]

> -----Original Message-----
> From: Alexander Aring [mailto:alex.aring at gmail.com]
> Sent: vrijdag 14 juni 2013 9:02
> To: Vanhauwaert Wouter
> Cc: barebox at lists.infradead.org
> Subject: Re: NAND + imx53, BBT/timings?
> 
> Hi,
> 
> On Thu, Jun 13, 2013 at 09:09:11AM +0200, Vanhauwaert Wouter wrote:
> > Hi all,
> >
> > I'm working on a custom design which has an imx53 and a 1GB NAND flash
> (Samsung k9k8g08u0d) via an 8 bit bus.
> > So I added this imx_nand_platform_data structure with a .width=1, .hw_ecc=1
> and .flash_bbt=1.
> > The flash gets detected at startup (also loads the bootloader from it).
> >
> > nand: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V
> > 8-bit), page size 2048, OOB size:64 but then
> > nand: Bad block table not found for chip 0
> > nand: Bad block table not found for chip 0
> >
> > etc
> >
> > and when I do imx_nand_bbm, I get:
> > Bad eraseblock 0 at 0x00000000
> > Bad eraseblock 1 at 0x00020000
> > And for the rest UnCorrectable RS-ECC errors
> >
> > This is a barenew flash, so I suppose I should find a factory bad block table?
> No, this is a another bad block table. [1] You need to generate the bbt.
> Factories only marks block as bad(with an mark pattern).
> 
> > I'm using the barebox 2013.05.1 stable release from git
> >
> 
> You can "try" to generate a bbt when you generate a nand bad block aware
> device, nand command "nand -a", then run "nandtest -t -m /dev/nand#.bb" to fill
> this bbt with "current" badblocks.
> 
> I don't know if this generates a bbt for you. But give it a try, I think it should do :/
> 
> [1] http://www.linux-mtd.infradead.org/tech/mtdnand/x144.html

No, that did not what I expected

In the meantime, I merged with v2013.10 but still have these issues...

Imx_nand_bbm gives me:
UnCorrectable RS-ECC Error
UnCorrectable RS-ECC Error
UnCorrectable RS-ECC Error
UnCorrectable RS-ECC Error

And 
erase /dev/nand0 gives me:
erase: I/O error

What is happening?