[PATCH 2/2] net: macb: turn off endian_swp_pkt_en

Jean-Christophe PLAGNIOL-VILLARD plagnioj at jcrosoft.com
Wed Mar 13 05:04:45 EDT 2013


On 09:48 Wed 13 Mar     , Steffen Trumtrar wrote:
> The core has a bit for swapping packet data endianism.
> Reset default from Cadence is off. Xilinx however, that uses this core on the
> Zynq SoCs, opted for on. Turn it off for all devices.

is this xilinx specifc?

on at91 and other we do not need it

Best Regards,
J.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
> Cc: Nicolas Ferre <nicolas.ferre at atmel.com>
> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
>  drivers/net/macb.c | 1 +
>  drivers/net/macb.h | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/drivers/net/macb.c b/drivers/net/macb.c
> index a12eea7..005234e 100644
> --- a/drivers/net/macb.c
> +++ b/drivers/net/macb.c
> @@ -277,6 +277,7 @@ static void macb_configure_dma(struct macb_device *bp)
>  		dmacfg |= GEM_BF(FBLDO, 16);
>  		dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
>  		dmacfg |= GEM_BIT(DDRP);
> +		dmacfg &= ~GEM_BIT(ENDIA);
>  		gem_writel(bp, DMACFG, dmacfg);
>  	}
>  }
> diff --git a/drivers/net/macb.h b/drivers/net/macb.h
> index cadd561..1be9ff9 100644
> --- a/drivers/net/macb.h
> +++ b/drivers/net/macb.h
> @@ -168,6 +168,8 @@
>  /* Bitfields in DMACFG. */
>  #define GEM_FBLDO_OFFSET			0
>  #define GEM_FBLDO_SIZE				5
> +#define GEM_ENDIA_OFFSET			7
> +#define GEM_ENDIA_SIZE				1
>  #define GEM_RXBMS_OFFSET			8
>  #define GEM_RXBMS_SIZE				2
>  #define GEM_TXPBMS_OFFSET			10
> -- 
> 1.8.2.rc2
> 



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