[PATCH 5/7] tegra: add driver for the clock and reset module

[Lucas Stach]

Am Freitag, den 01.03.2013, 18:26 +0100 schrieb Sascha Hauer:

> > +
> > +static unsigned long get_osc_frequency(void)
> > +{
> > +	u32 osc_ctrl = readl(car_base + OSC_CTRL);
> > +
> > +	switch (osc_ctrl & OSC_CTRL_OSC_FREQ_MASK) {
> 
> OSC_CTRL_OSC_FREQ_MASK is defined as 3 << 30, The result will never be
> one of the values below.
> 
> > +	case 0:
> > +		return 13000000;
> > +	case 1:
> > +		return 19200000;
> > +	case 2:
> > +		return 12000000;
> > +	case 3:
> > +		return 26000000;
> > +	default:
> > +		return 0;
> > +	}
> > +}
> > +
> 
Grr, correct. Thanks for spotting. Just got bitten by my system using a
13MHz crystal.

Regards,
Lucas