[PATCH 1/1] arm: add generic smp twd timer

Jean-Christophe PLAGNIOL-VILLARD plagnioj at jcrosoft.com
Thu Oct 4 05:54:15 EDT 2012


On 09:24 Thu 04 Oct     , Sascha Hauer wrote:
> On Thu, Oct 04, 2012 at 09:01:33AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > on Cortex A9 and Cortex A5 we have a generic timer which we can use as
> > clocksource
> > 
> > Limit the timer frequency to < 25Mhz
> > 
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > ---
> >  arch/arm/cpu/Kconfig           |    3 ++
> >  arch/arm/cpu/Makefile          |    1 +
> >  arch/arm/cpu/smp_twd.c         |   93 ++++++++++++++++++++++++++++++++++++++++
> >  arch/arm/include/asm/smp_twd.h |   23 ++++++++++
> >  4 files changed, 120 insertions(+)
> >  create mode 100644 arch/arm/cpu/smp_twd.c
> >  create mode 100644 arch/arm/include/asm/smp_twd.h
> > 
> > diff --git a/arch/arm/cpu/Kconfig b/arch/arm/cpu/Kconfig
> > index f55e862..a7a1cdb 100644
> > --- a/arch/arm/cpu/Kconfig
> > +++ b/arch/arm/cpu/Kconfig
> > @@ -94,3 +94,6 @@ config CACHE_L2X0
> >  	bool "Enable L2x0 PrimeCell"
> >  	depends on MMU && ARCH_HAS_L2X0
> >  
> > +config ARM_SMP_TWD
> > +	bool
> > +	depends on CPU_V7
> > diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
> > index f7ab276..c5cbdfb 100644
> > --- a/arch/arm/cpu/Makefile
> > +++ b/arch/arm/cpu/Makefile
> > @@ -18,5 +18,6 @@ pbl-$(CONFIG_CPU_32v6) += cache-armv6.o
> >  obj-$(CONFIG_CPU_32v7) += cache-armv7.o
> >  pbl-$(CONFIG_CPU_32v7) += cache-armv7.o
> >  obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
> > +obj-$(CONFIG_ARM_SMP_TWD) += smp_twd.o
> >  
> >  pbl-y += start-pbl.o
> > diff --git a/arch/arm/cpu/smp_twd.c b/arch/arm/cpu/smp_twd.c
> 
> I was thinking about a drivers/clocksource directory. Maybe this would
> be a good opportunity to start it?
I was thining about it too as I've the same timer on SH and ARM and nomadik
and ux5x0

Best Regards,
J.



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