From marek.belisko at gmail.com  Sun Jul  1 18:53:06 2012
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 2 Jul 2012 00:53:06 +0200
Subject: panda board crash when detecting usb devices
Message-ID: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>

In current next there is issue with usb command on panda board:

barebox at Texas Instrument's Panda:/ usb
USB: scanning bus for devices...
unable to handle NULL pointer dereference at address 0x00000004
pc : [<8f00ac10>]    lr : [<8f00a41c>]
sp : 8cfffde0  ip : 8d001ce8  fp : 00000000
r10: 00000000  r9 : 8cffff44  r8 : 8f033a34
r7 : 00100100  r6 : 00200200  r5 : 8d014160  r4 : 8d01416c
r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : 8d01416c
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
[<8f00ac10>] (ehci_init+0x1c/0x128) from [<8f00a41c>] (usb_rescan+0xa4/0xfc)
[<8f00a41c>] (usb_rescan+0xa4/0xfc) from [<8f01332c>] (do_usb+0x4c/0x64)
[<8f01332c>] (do_usb+0x4c/0x64) from [<8f0053e0>] (execute_command+0x38/0x7c)
[<8f0053e0>] (execute_command+0x38/0x7c) from [<8f001aac>]
(run_list_real+0x8b8/0x9b0)
[<8f001aac>] (run_list_real+0x8b8/0x9b0) from [<8f001cec>]
(parse_stream_outer+0x148/0x238)
[<8f001cec>] (parse_stream_outer+0x148/0x238) from [<8f002074>]
(run_shell+0x3c/0x7c)
[<8f002074>] (run_shell+0x3c/0x7c) from [<8f006a1c>] (start_barebox+0xd4/0x10c)
[<8f006a1c>] (start_barebox+0xd4/0x10c) from [<84081164>] (0x84081164)

[<8f023898>] (unwind_backtrace+0x0/0xa8) from [<8f0144bc>] (panic+0x28/0x48)
[<8f0144bc>] (panic+0x28/0x48) from [<8f023e38>] (do_exception+0x10/0x14)
[<8f023e38>] (do_exception+0x10/0x14) from [<8f023ec4>]
(do_data_abort+0x2c/0x38)
[<8f023ec4>] (do_data_abort+0x2c/0x38) from [<8f023ad0>] (data_abort+0x50/0x60)


It is crashing in ehci_halt() in first ehci_read call. IMO ehci_read
access wrong memory (that is reason do data_abort?)
I have rev. A2. Any ideas?

Thanks,

Marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com


From marek.belisko at gmail.com  Sun Jul  1 19:47:49 2012
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 2 Jul 2012 01:47:49 +0200
Subject: panda board crash when detecting usb devices
In-Reply-To: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>
References: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>
Message-ID: <CAAfyv37eSHJnDDoOJgJLggxa4BLvNAZXho87L56DzZ2QV36mMA@mail.gmail.com>

Similar issue when shutdown barebox (before kernel startup):

barebox at Texas Instrument's Panda:/ bootm /boot/uImage
   Image Name:   Linux-3.5.0-rc5-00035-g3a9049e-d
   OS:           Linux
   Architecture: ARM
   Type:         Kernel Image
   Compression:  uncompressed
   Data Size:    3868768 Bytes =  3.7 MB
   Load Address: 80008000
   Entry Point:  80008000
commandline: console=ttyO2,115200
arch_number: 2791
Here1.1
unable to handle NULL pointer dereference at address 0x00000004
pc : [<8f00ab84>]    lr : [<8f00ab74>]
sp : 8cfffd48  ip : 8d001ce8  fp : 8d00ffb0
r10: 00000000  r9 : 8d00e2dd  r8 : 8f03ba94
r7 : 8d00e2dd  r6 : 80000100  r5 : 00000000  r4 : 8d014160
r3 : 00000000  r2 : 00000000  r1 : 0000000a  r0 : 8f02820a
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
[<8f00ab84>] (ehci_halt+0x24/0x98) from [<8f00796c>]
(devices_shutdown+0x28/0x44)
[<8f00796c>] (devices_shutdown+0x28/0x44) from [<8f006a74>]
(shutdown_barebox+0x8/0x10)
[<8f006a74>] (shutdown_barebox+0x8/0x10) from [<8f022ef4>]
(start_linux+0x1dc/0x238)
[<8f022ef4>] (start_linux+0x1dc/0x238) from [<8f02313c>]
(__do_bootm_linux+0x198/0x1c4)
[<8f02313c>] (__do_bootm_linux+0x198/0x1c4) from [<8f00e668>]
(do_bootm+0x6dc/0x7f8)
[<8f00e668>] (do_bootm+0x6dc/0x7f8) from [<8f0053e0>]
(execute_command+0x38/0x7c)
[<8f0053e0>] (execute_command+0x38/0x7c) from [<8f001aac>]
(run_list_real+0x8b8/0x9b0)
[<8f001aac>] (run_list_real+0x8b8/0x9b0) from [<8f001cec>]
(parse_stream_outer+0x148/0x238)
[<8f001cec>] (parse_stream_outer+0x148/0x238) from [<8f002074>]
(run_shell+0x3c/0x7c)
[<8f002074>] (run_shell+0x3c/0x7c) from [<8f006a1c>] (start_barebox+0xd4/0x10c)
[<8f006a1c>] (start_barebox+0xd4/0x10c) from [<84081164>] (0x84081164)

[<8f0238f8>] (unwind_backtrace+0x0/0xa8) from [<8f014520>] (panic+0x28/0x48)
[<8f014520>] (panic+0x28/0x48) from [<8f023e98>] (do_exception+0x10/0x14)
[<8f023e98>] (do_exception+0x10/0x14) from [<8f023f24>]
(do_data_abort+0x2c/0x38)
[<8f023f24>] (do_data_abort+0x2c/0x38) from [<8f023b30>] (data_abort+0x50/0x60)


barebox 2012.06.0-00148-ga6e358b #0 Sun Jul 1 23:49:04 CEST 2012


On Mon, Jul 2, 2012 at 12:53 AM, Belisko Marek <marek.belisko at gmail.com> wrote:
> In current next there is issue with usb command on panda board:
>
> barebox at Texas Instrument's Panda:/ usb
> USB: scanning bus for devices...
> unable to handle NULL pointer dereference at address 0x00000004
> pc : [<8f00ac10>]    lr : [<8f00a41c>]
> sp : 8cfffde0  ip : 8d001ce8  fp : 00000000
> r10: 00000000  r9 : 8cffff44  r8 : 8f033a34
> r7 : 00100100  r6 : 00200200  r5 : 8d014160  r4 : 8d01416c
> r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : 8d01416c
> Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
> [<8f00ac10>] (ehci_init+0x1c/0x128) from [<8f00a41c>] (usb_rescan+0xa4/0xfc)
> [<8f00a41c>] (usb_rescan+0xa4/0xfc) from [<8f01332c>] (do_usb+0x4c/0x64)
> [<8f01332c>] (do_usb+0x4c/0x64) from [<8f0053e0>] (execute_command+0x38/0x7c)
> [<8f0053e0>] (execute_command+0x38/0x7c) from [<8f001aac>]
> (run_list_real+0x8b8/0x9b0)
> [<8f001aac>] (run_list_real+0x8b8/0x9b0) from [<8f001cec>]
> (parse_stream_outer+0x148/0x238)
> [<8f001cec>] (parse_stream_outer+0x148/0x238) from [<8f002074>]
> (run_shell+0x3c/0x7c)
> [<8f002074>] (run_shell+0x3c/0x7c) from [<8f006a1c>] (start_barebox+0xd4/0x10c)
> [<8f006a1c>] (start_barebox+0xd4/0x10c) from [<84081164>] (0x84081164)
>
> [<8f023898>] (unwind_backtrace+0x0/0xa8) from [<8f0144bc>] (panic+0x28/0x48)
> [<8f0144bc>] (panic+0x28/0x48) from [<8f023e38>] (do_exception+0x10/0x14)
> [<8f023e38>] (do_exception+0x10/0x14) from [<8f023ec4>]
> (do_data_abort+0x2c/0x38)
> [<8f023ec4>] (do_data_abort+0x2c/0x38) from [<8f023ad0>] (data_abort+0x50/0x60)
>
>
> It is crashing in ehci_halt() in first ehci_read call. IMO ehci_read
> access wrong memory (that is reason do data_abort?)
> I have rev. A2. Any ideas?
>
> Thanks,
>
> Marek
>
> --
> as simple and primitive as possible
> -------------------------------------------------
> Marek Belisko - OPEN-NANDRA
> Freelance Developer
>
> Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
> Tel: +421 915 052 184
> skype: marekwhite
> twitter: #opennandra
> web: http://open-nandra.com

Marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com


From jlu at pengutronix.de  Mon Jul  2 04:01:15 2012
From: jlu at pengutronix.de (Jan =?ISO-8859-1?Q?L=FCbbe?=)
Date: Mon, 02 Jul 2012 10:01:15 +0200
Subject: panda board crash when detecting usb devices
In-Reply-To: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>
References: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>
Message-ID: <1341216075.3376.14.camel@coredoba.hi.pengutronix.de>

Hi,

On Mon, 2012-07-02 at 00:53 +0200, Belisko Marek wrote:
> In current next there is issue with usb command on panda board:
*snip*
> It is crashing in ehci_halt() in first ehci_read call. IMO ehci_read
> access wrong memory (that is reason do data_abort?)
> I have rev. A2. Any ideas?

I had a problem with USB on the BeagleBoard: 
Message-id: <20120623232159.GA30515 at pengutronix.de>
Subject: Regression for the Beagle Board

For the BeagleBoard this change results in conflicting resource ranges.

Sascha added a check in a6e358b2f5b219fda18a7bc9348cb969043c19d5, maybe
a NULL return value from dev_request_mem_region is not handled correctly
in the driver?

Regards,
Jan

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



From s.hauer at pengutronix.de  Mon Jul  2 04:23:23 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 2 Jul 2012 10:23:23 +0200
Subject: panda board crash when detecting usb devices
In-Reply-To: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>
References: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>
Message-ID: <20120702082323.GH2698@pengutronix.de>

On Mon, Jul 02, 2012 at 12:53:06AM +0200, Belisko Marek wrote:
> In current next there is issue with usb command on panda board:
> 
> barebox at Texas Instrument's Panda:/ usb
> USB: scanning bus for devices...
> unable to handle NULL pointer dereference at address 0x00000004
> pc : [<8f00ac10>]    lr : [<8f00a41c>]
> sp : 8cfffde0  ip : 8d001ce8  fp : 00000000
> r10: 00000000  r9 : 8cffff44  r8 : 8f033a34
> r7 : 00100100  r6 : 00200200  r5 : 8d014160  r4 : 8d01416c
> r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : 8d01416c
> Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
> [<8f00ac10>] (ehci_init+0x1c/0x128) from [<8f00a41c>] (usb_rescan+0xa4/0xfc)
> [<8f00a41c>] (usb_rescan+0xa4/0xfc) from [<8f01332c>] (do_usb+0x4c/0x64)
> [<8f01332c>] (do_usb+0x4c/0x64) from [<8f0053e0>] (execute_command+0x38/0x7c)
> [<8f0053e0>] (execute_command+0x38/0x7c) from [<8f001aac>]
> (run_list_real+0x8b8/0x9b0)
> [<8f001aac>] (run_list_real+0x8b8/0x9b0) from [<8f001cec>]
> (parse_stream_outer+0x148/0x238)
> [<8f001cec>] (parse_stream_outer+0x148/0x238) from [<8f002074>]
> (run_shell+0x3c/0x7c)
> [<8f002074>] (run_shell+0x3c/0x7c) from [<8f006a1c>] (start_barebox+0xd4/0x10c)
> [<8f006a1c>] (start_barebox+0xd4/0x10c) from [<84081164>] (0x84081164)
> 
> [<8f023898>] (unwind_backtrace+0x0/0xa8) from [<8f0144bc>] (panic+0x28/0x48)
> [<8f0144bc>] (panic+0x28/0x48) from [<8f023e38>] (do_exception+0x10/0x14)
> [<8f023e38>] (do_exception+0x10/0x14) from [<8f023ec4>]
> (do_data_abort+0x2c/0x38)
> [<8f023ec4>] (do_data_abort+0x2c/0x38) from [<8f023ad0>] (data_abort+0x50/0x60)
> 
> 
> It is crashing in ehci_halt() in first ehci_read call. IMO ehci_read
> access wrong memory (that is reason do data_abort?)
> I have rev. A2. Any ideas?

My bad, sorry. Try the following patch.

Sascha

8<---------------------------------------------------------

ehci: Fix resource size

We now have a resource size for the ehci hccr register space. This
was assumed to be 0x40 in size. On OMAP though it is only 0x10 and
then the hccr resource conflicts with the hcor resource which results
in a non working ehci port on beagle and panda boards. This patch
adds a nonintrusive workaround, it limits the hccr resource to 0x10,
which then also works on OMAP.

Later we should drop the multiple resources for the ehci port and
make the resource as specified in the datasheets.

This is broken since:

commit 08845e41fba2b16dd3050b6b910c615e1bb8e57c
Author: Sascha Hauer <s.hauer at pengutronix.de>
Date:   Wed May 23 12:54:24 2012 +0200

    usb ehci: Add resource sizes

    add_usb_ehci_device registers resources with size 0. Fix this.

    Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/base/resource.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/base/resource.c b/drivers/base/resource.c
index 347b2f0..9844d1a 100644
--- a/drivers/base/resource.c
+++ b/drivers/base/resource.c
@@ -113,7 +113,7 @@ struct device_d *add_usb_ehci_device(int id, resource_size_t hccr,
 
 	res = xzalloc(sizeof(struct resource) * 2);
 	res[0].start = hccr;
-	res[0].size = 0x40;
+	res[0].size = 0x10;
 	res[0].flags = IORESOURCE_MEM;
 	res[1].start = hcor;
 	res[1].size = 0xc0;
-- 
1.7.10

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul  2 04:33:00 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 2 Jul 2012 10:33:00 +0200
Subject: [PATCH] commands: uncompress: fix description
In-Reply-To: <1341028561-13963-1-git-send-email-shc_work@mail.ru>
References: <1341028561-13963-1-git-send-email-shc_work@mail.ru>
Message-ID: <20120702083300.GI2698@pengutronix.de>

On Sat, Jun 30, 2012 at 07:56:01AM +0400, Alexander Shiyan wrote:
> Command "uncompress" can handle not only with LZO-format, so we just
> changed description for command.
> 
> Signed-off-by: Alexander Shiyan <shc_work at mail.ru>

Applied, thanks

Sascha

> ---
>  commands/uncompress.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/commands/uncompress.c b/commands/uncompress.c
> index e96928b..179d525 100644
> --- a/commands/uncompress.c
> +++ b/commands/uncompress.c
> @@ -1,5 +1,5 @@
>  /*
> - * uncompress.c - uncompress a lzo compressed file
> + * uncompress.c - uncompress a compressed file
>   *
>   * Copyright (c) 2010 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
>   *
> @@ -64,7 +64,7 @@ static const __maybe_unused char cmd_uncompress_help[] =
>  
>  BAREBOX_CMD_START(uncompress)
>          .cmd            = do_uncompress,
> -        .usage          = "lzop <infile> <outfile>",
> +        .usage          = "uncompress a compressed file",
>          BAREBOX_CMD_HELP(cmd_uncompress_help)
>  BAREBOX_CMD_END
>  
> -- 
> 1.7.3.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul  2 05:23:14 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 2 Jul 2012 11:23:14 +0200
Subject: v2012.07.0
Message-ID: <20120702092314.GJ2698@pengutronix.de>

Hi all,

Time for a july release. Here is what happened since the last
release.

Sascha

The following changes since commit 94418c2d0d3d7dbaa6995fb53f00a5d5fc9f4028:

  Release v2012.06.0 (2012-06-06 14:10:34 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/barebox.git tags/v2012.07.0

for you to fetch changes up to 9d0b51ea7e5b3fece57f91e17349b79a5b4b37e7:

  Release v2012.07.0 (2012-07-02 10:31:52 +0200)

----------------------------------------------------------------
Release v2012.07.0

----------------------------------------------------------------
Alan Ott (2):
      common: Make MENU depend on PROCESS_ESCAPE_SEQUENCE
      README: change path to sandbox environment

Alexander Shiyan (20):
      i2c: Added switch for allowing usage 16bit register addresses
      PCM038: Update board description
      PCM038: Call power_init() after initializing SPI.
      PCM038: Remove unused includes
      PCM038: Initial PCM970 development board support
      Removed duplicate definition for DEVFS_PARTITION_xxx
      Add compressed barebox_default_env to .gitignore
      PCM038: Move USBH2 initialization to PCM970
      PCM038: Removed unnecessary call to gpio_set_value
      i.MX SPI: Setup SPI chipselect to inactive state while initializing device
      PCM038: Remove now unused preset for SPI chipselect.
      i.MX51: Changed naming registers and procedures for SPI
      i.MX51: Added helper for SDHC3 registration.
      PCM970: Added support for CompactFlash
      i.MX51: Raise frequency for SDHC by switch to PLL2 source
      i.MX51 clock: Added lp_apm clock support for frequency calculations.
      i.MX51 clock: Added USB clock to dump_clocks command.
      block: Fix printf warning
      Unused files removed
      commands: uncompress: fix description

Alexey Galakhov (6):
      Support most Samsung SoCs in S3C serial driver
      Make S3C24xx config options available for all S3Cs
      Split S3C generic and S3C24xx specific code
      Add support for Samsung S5P architecture (S5PV210)
      S5P boot header and image generator
      S5P lowlevel clock init

Anand Gadiyar (3):
      panda: add i2c and twlcore to panda
      panda: add LED support
      panda: update defconfig for i2c and led support

Antony Pavlov (19):
      MIPS: start.S: add "barebox" label at _start + 0x10
      MIPS: bootm: add "MIPS barebox" handler
      MIPS: add common header file for DEBUG_LL via NS16550
      MIPS: malta: use common DEBUG_LL code for NS16550
      fix typo funtion -> function
      MIPS: add XBurst processor family support
      MIPS: XBurst: add JZ4755 CPU support
      MIPS: XBurst: add Ritmix RZX-50 board support
      MIPS: add defconfig for Ritmix RZX-50 board
      MIPS: introduce C architecture-specific low-level init
      MIPS: import CPU and cache detection code from Linux 3.4
      MIPS: cpuinfo: import CPU message from Linux 3.4
      ARM: initial Tegra support
      ARM: Tegra: add Toshiba AC100 support
      usb: set MAXINTERFACES = 16
      toshiba_ac100: add USB host support
      toshiba_ac100: add defconfig
      MIPS: make possible board-specific header files
      MIPS: XBurst: suitable solution for per-board debug_ll

Dirk H?rner (3):
      hostcc tools: include "compiler.h", fix included headers
      scripts/compiler.h: fixup endianess defines on OS X
      scripts/genenv: always pass template to mktemp

Eric B?nard (9):
      eukrea_cpuimx25: workaround ENGcm09152
      eukrea_cpuimx25: add display choice in environment
      eukrea_cpuimx35: add display choice in environment
      eukrea_cpuimx51: updated env
      eukrea_cpuimx25/35/51: update defconfig
      eukrea_cpuimx25&35: use switch action to launch usbserial or dfu
      iim: fix compilation when NET is not selected
      eukrea_cpuimx25: fix PHY address
      eukrea_cpuimx35: fix PHY address and clean code

Jan Luebbe (3):
      arm: update mach-types
      ohci-hcd: use dma_flush/inv_range to allow using the driver with enabled MMU
      drivers/spi/spi.c: use DEVICE_ID_DYNAMIC when allocating a struct device_d

Jan Weitzel (1):
      ramfs: rember last accessed chunk

Johannes Stezenbach (5):
      m25p80: prevent endless loop in erase
      m25p80: allow erase to be interrupted
      m25p80: progressbar tweak
      devfs: don't erase past the end of the partition
      fs: limit flash erase and protect to the partiton boundary

Krzysztof Halasa (7):
      ARM: remove unused struct param_struct and related info.
      Fix big endian MMIO primitives.
      ARM: put a valid "barebox" signature in the header on big-endian systems.
      NOR flash: reduce size of cfiword_t if not using 64-bit bus.
      Fix sha224sum panic by registering SHA224 hash name.
      Fix a panic in crypto hash calculations due to uninitialized variable.
      Fix SHA224 to produce 28 bytes of hash (instead of 32).

Renaud Barbier (12):
      ppc io.h: update following MMIO primitives fix
      ppc reloc.S: use a common trap relocation function
      linux/types.h: define phys_size_t
      Initial Freescale 85xx Headers.
      Initial e500v2 start up code
      e500v2 traps and TLB support code
      85xx: LAW and LBC initialization
      85xx clocking support
      MPC85xx start-up support code
      Set _text_base to the firmware relocation address
      85xx core support build files
      Minimal P2020RDB platform support and configuration file

Robert Jarzmik (5):
      arm/board: mioa701 align kernel options with kernel mtd
      arch/arm: mioa701 make autoboot of Linux work
      arch/arm: mioa701 add IPL and DPS1 updater
      arch/arm: mioa701 use maximum CPU frequency
      arch/arm: mioa701 improve barebox_update script

Sam Ravnborg (1):
      kbuild: Use Elfnn_Half as replacement for Elfnn_Section

Sascha Hauer (54):
      ARM startup: invalidate I-cache before jumping to relocated binary
      parameter: return empty string for unset parameters
      parameter: remove unused struct member
      Merge branch 'pu/parameter' into next
      Make errno a positive value
      fs: Add NFS support
      timeout: allow to set a variable with the key pressed
      add 'global' command
      booting: more flexible Linux bootargs generation
      Merge branch 'pu/globalvar' into next
      add qsort support
      glob: Add sorted output support
      fs readdir: check for NULL pointer again
      magicvar: Add magicvar macro with additional name argument
      flexible bootargs: Add magicvar descriptions
      Merge branch 'pu/globsort' into next
      Merge branch 'pu/magicvar' into next
      edit: Add a status line
      Merge branch 'pu/edit' into next
      Merge branch 'master' into next
      lseek: return -1 instead of -errno
      bootm: Add default images variables
      Add next generation default environment template
      ARM pcm038: Switch to new environment
      Merge branch 'ppc' into next
      run_shell: run again on ctrl-c
      Merge branch 'pu/defenv-2' into next
      ARM Freescale i.MX51 babbage: switch to new default env
      Merge branch 'pu/hush' into next
      hush: do not convert to return code too early
      defaultenv-2: automount script: run mount only when ifup succeeds
      ARM startup: Do call __mmu_cache_flush during startup
      Merge branch 'pu/defenv-2' into next
      usb storage: fix driver name
      usb ehci: Use zalloc to allocate ehci structure
      Merge branch 'pu/cache' into next
      Merge branch 'pu/hush' into next
      ppc 85xx: Fix whitespaces
      ARM samsung: disable board selection
      block: propagate error code from block_get
      block: do not BUG() on failed block_get
      usb ehci: Add resource sizes
      Merge branch 'next'
      ARM qil-a9260: Fix PARTITION_FIXED compilation
      blackfin: Fix build due to missing __raw_* io accessors
      openrisc: fix build due to redefined phys_size_t
      fs tftp: Fix short file transfers
      sandbox: fix 64bit build
      x86 linux16 command: Add missing include
      print out resource_size_t correctly
      Merge branch 'pu/sandbox-fixes'
      drivers/base: bail out if request_iomem_region fails
      ehci: Fix resource size
      Release v2012.07.0

Uwe Kleine-K?nig (2):
      fix typo addreee -> address
      defaultenv: don't overwrite $user in config

 .gitignore                                         |    4 +-
 Documentation/boards.dox                           |    2 +
 Makefile                                           |    4 +-
 README                                             |    2 +-
 arch/arm/Kconfig                                   |   12 +
 arch/arm/Makefile                                  |    9 +
 arch/arm/boards/a9m2410/a9m2410.c                  |    6 +-
 arch/arm/boards/a9m2410/config.h                   |    2 +-
 arch/arm/boards/a9m2410/lowlevel_init.S            |    2 +-
 arch/arm/boards/a9m2440/a9m2440.c                  |    6 +-
 arch/arm/boards/a9m2440/config.h                   |    2 +-
 arch/arm/boards/a9m2440/lowlevel_init.S            |    2 +-
 arch/arm/boards/at91rm9200ek/init.c                |    4 +-
 arch/arm/boards/at91sam9260ek/init.c               |    8 +-
 arch/arm/boards/at91sam9261ek/init.c               |    8 +-
 arch/arm/boards/at91sam9263ek/init.c               |   12 +-
 arch/arm/boards/at91sam9m10g45ek/init.c            |    8 +-
 arch/arm/boards/at91sam9x5ek/init.c                |    8 +-
 arch/arm/boards/dss11/init.c                       |    6 +-
 arch/arm/boards/edb93xx/edb93xx.c                  |    4 +-
 arch/arm/boards/eukrea_cpuimx25/env/bin/init_board |   21 +
 arch/arm/boards/eukrea_cpuimx25/env/config         |    4 +-
 arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c  |   15 +-
 arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c  |    4 +-
 arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S    |    2 +-
 arch/arm/boards/eukrea_cpuimx35/env/bin/init_board |   21 +
 arch/arm/boards/eukrea_cpuimx35/env/config         |    4 +-
 arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c  |   88 +-
 arch/arm/boards/eukrea_cpuimx51/env/config         |   10 +-
 arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c  |    4 +-
 arch/arm/boards/freescale-mx25-3-stack/3stack.c    |    4 +-
 .../boards/freescale-mx25-3-stack/lowlevel_init.S  |    2 +-
 arch/arm/boards/freescale-mx35-3-stack/3stack.c    |    8 +-
 .../boards/freescale-mx35-3-stack/lowlevel_init.S  |    2 +-
 arch/arm/boards/freescale-mx51-pdk/board.c         |    4 +-
 arch/arm/boards/freescale-mx51-pdk/env/config      |   47 -
 .../freescale-mx51-pdk/env/init/bootargs-base      |    8 +
 .../boards/freescale-mx51-pdk/env/init/hostname    |    8 +
 arch/arm/boards/freescale-mx53-loco/board.c        |    4 +-
 arch/arm/boards/freescale-mx53-smd/board.c         |    4 +-
 arch/arm/boards/freescale-mx6-arm2/board.c         |    4 +-
 arch/arm/boards/guf-cupid/board.c                  |    4 +-
 arch/arm/boards/guf-neso/board.c                   |    4 +-
 arch/arm/boards/imx21ads/lowlevel_init.S           |    2 +-
 arch/arm/boards/imx27ads/imx27ads.c                |    4 +-
 arch/arm/boards/karo-tx25/board.c                  |    4 +-
 arch/arm/boards/karo-tx51/tx51.c                   |    4 +-
 arch/arm/boards/mini2440/config.h                  |    2 +-
 arch/arm/boards/mini2440/lowlevel_init.S           |    2 +-
 arch/arm/boards/mini2440/mini2440.c                |    6 +-
 arch/arm/boards/mioa701/board.c                    |   13 +-
 arch/arm/boards/mioa701/env/bin/barebox_update     |    5 +
 arch/arm/boards/mioa701/env/bin/dps1_unlock        |   12 +
 arch/arm/boards/mioa701/env/bin/dps1_update        |   12 +
 arch/arm/boards/mioa701/env/bin/init               |   19 +-
 arch/arm/boards/mioa701/env/data/dps1.raw.gz       |  Bin 0 -> 1239 bytes
 arch/arm/boards/mmccpu/init.c                      |    4 +-
 arch/arm/boards/netx/netx.c                        |    4 +-
 arch/arm/boards/nhk8815/setup.c                    |    8 +-
 arch/arm/boards/panda/board.c                      |   32 +
 arch/arm/boards/pcm027/board.c                     |    4 +-
 arch/arm/boards/pcm037/lowlevel_init.S             |    2 +-
 arch/arm/boards/pcm037/pcm037.c                    |    4 +-
 arch/arm/boards/pcm038/Makefile                    |    5 +-
 arch/arm/boards/pcm038/env/boot/nand-ubi           |   10 +
 arch/arm/boards/pcm038/env/config                  |   52 -
 arch/arm/boards/pcm038/env/init/bootargs-base      |    8 +
 arch/arm/boards/pcm038/env/init/hostname           |    8 +
 arch/arm/boards/pcm038/env/init/mtdparts-nand      |   11 +
 arch/arm/boards/pcm038/env/init/mtdparts-nor       |   11 +
 arch/arm/boards/pcm038/pcm038.c                    |  183 ++--
 arch/arm/boards/pcm038/pcm038.dox                  |    5 +-
 arch/arm/boards/pcm038/pcm970.c                    |  187 ++++
 arch/arm/boards/pcm043/pcm043.c                    |    8 +-
 arch/arm/boards/pcm049/board.c                     |    6 +-
 arch/arm/boards/phycard-a-l1/pca-a-l1.c            |    6 +-
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c          |    6 +-
 arch/arm/boards/phycard-i.MX27/lowlevel_init.S     |    2 +-
 arch/arm/boards/phycard-i.MX27/pca100.c            |    4 +-
 arch/arm/boards/pm9261/init.c                      |    4 +-
 arch/arm/boards/pm9263/init.c                      |    4 +-
 arch/arm/boards/pm9g45/init.c                      |    4 +-
 arch/arm/boards/qil-a9260/init.c                   |    8 +-
 arch/arm/boards/scb9328/scb9328.c                  |    4 +-
 arch/arm/boards/tny-a926x/init.c                   |    8 +-
 arch/arm/boards/toshiba-ac100/Kconfig              |    9 +
 arch/arm/boards/toshiba-ac100/Makefile             |    2 +
 arch/arm/boards/toshiba-ac100/board.c              |   49 +
 arch/arm/boards/toshiba-ac100/config.h             |    5 +
 arch/arm/boards/toshiba-ac100/serial.c             |   43 +
 arch/arm/boards/toshiba-ac100/toshiba-ac100.dox    |   37 +
 arch/arm/boards/tqma53/board.c                     |    4 +-
 arch/arm/boards/usb-a926x/init.c                   |    8 +-
 arch/arm/boards/versatile/versatilepb.c            |    4 +-
 arch/arm/configs/a9m2410_defconfig                 |    2 +-
 arch/arm/configs/a9m2440_defconfig                 |    4 +-
 arch/arm/configs/eukrea_cpuimx25_defconfig         |   17 +-
 arch/arm/configs/eukrea_cpuimx35_defconfig         |   19 +-
 arch/arm/configs/eukrea_cpuimx51_defconfig         |   19 +-
 arch/arm/configs/freescale_mx51_babbage_defconfig  |   16 +-
 arch/arm/configs/mini2440_defconfig                |    2 +-
 arch/arm/configs/panda_defconfig                   |    8 +-
 arch/arm/configs/pcm038_defconfig                  |   14 +-
 arch/arm/configs/toshiba_ac100_defconfig           |   39 +
 arch/arm/cpu/cache-armv4.S                         |    1 -
 arch/arm/cpu/cache-armv5.S                         |    1 -
 arch/arm/cpu/cache-armv6.S                         |    1 -
 arch/arm/cpu/cache-armv7.S                         |    1 -
 arch/arm/cpu/start.c                               |   11 +-
 arch/arm/include/asm/barebox-arm-head.h            |    3 +-
 arch/arm/include/asm/setup.h                       |   53 -
 arch/arm/lib/armlinux.c                            |    2 +-
 arch/arm/lib/bootm.c                               |    3 +-
 arch/arm/mach-imx/Kconfig                          |   10 +
 arch/arm/mach-imx/imx51.c                          |    2 +-
 arch/arm/mach-imx/include/mach/devices-imx51.h     |   13 +-
 arch/arm/mach-imx/include/mach/imx27-regs.h        |   13 +
 arch/arm/mach-imx/include/mach/imx51-regs.h        |    6 +-
 arch/arm/mach-imx/speed-imx51.c                    |   50 +-
 arch/arm/mach-omap/devices-gpmc-nand.c             |    2 +-
 arch/arm/mach-omap/xload.c                         |    2 +-
 arch/arm/mach-samsung/Kconfig                      |   50 +-
 arch/arm/mach-samsung/Makefile                     |    7 +-
 arch/arm/mach-samsung/clocks-s5pcxx.c              |   98 ++
 arch/arm/mach-samsung/generic.c                    |  113 --
 arch/arm/mach-samsung/gpio-s5pcxx.c                |  123 +++
 arch/arm/mach-samsung/include/mach/gpio.h          |    3 +
 arch/arm/mach-samsung/include/mach/iomux-s5pcxx.h  |  798 ++++++++++++++
 arch/arm/mach-samsung/include/mach/s3c-clocks.h    |   25 +-
 arch/arm/mach-samsung/include/mach/s3c-generic.h   |    9 +
 arch/arm/mach-samsung/include/mach/s3c-iomap.h     |   56 +-
 .../arm/mach-samsung/include/mach/s3c24xx-clocks.h |   24 +
 arch/arm/mach-samsung/include/mach/s3c24xx-gpio.h  |    6 +-
 arch/arm/mach-samsung/include/mach/s3c24xx-iomap.h |   69 ++
 arch/arm/mach-samsung/include/mach/s3c24xx-nand.h  |    2 +-
 arch/arm/mach-samsung/include/mach/s5pcxx-clocks.h |   55 +
 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h  |   49 +
 .../{lowlevel-init.S => lowlevel-s3c24x0.S}        |   12 +-
 arch/arm/mach-samsung/lowlevel-s5pcxx.c            |   61 ++
 arch/arm/mach-samsung/mem-s3c24x0.c                |  143 +++
 arch/arm/mach-samsung/s3c24xx-clocks.c             |   17 +
 arch/arm/mach-tegra/Kconfig                        |   19 +
 arch/arm/mach-tegra/Makefile                       |    2 +
 arch/arm/mach-tegra/clock.c                        |   59 ++
 arch/arm/mach-tegra/include/mach/debug_ll.h        |   45 +
 arch/arm/mach-tegra/include/mach/iomap.h           |  292 ++++++
 arch/arm/mach-tegra/reset.c                        |   42 +
 arch/arm/tools/mach-types                          |  193 +++-
 arch/blackfin/boards/ipe337/ipe337.c               |    4 +-
 arch/blackfin/include/asm/io.h                     |    7 +
 arch/blackfin/lib/blackfin_linux.c                 |    2 +-
 arch/mips/Kconfig                                  |    8 +
 arch/mips/Makefile                                 |    5 +
 arch/mips/boards/qemu-malta/init.c                 |    4 +-
 arch/mips/boards/rzx50/Kconfig                     |    6 +
 arch/mips/boards/rzx50/Makefile                    |    1 +
 arch/mips/boards/rzx50/config.h                    |   19 +
 arch/mips/boards/rzx50/include/board/debug_ll.h    |   29 +
 arch/mips/boards/rzx50/rzx50.dox                   |   46 +
 arch/mips/boards/rzx50/serial.c                    |   66 ++
 arch/mips/boot/Makefile                            |    1 +
 arch/mips/boot/main_entry.c                        |   52 +
 arch/mips/boot/start.S                             |   26 +-
 arch/mips/configs/rzx50_defconfig                  |   29 +
 arch/mips/include/asm/bitops.h                     |    2 +-
 arch/mips/include/asm/cpu-features.h               |  254 +++++
 arch/mips/include/asm/cpu-info.h                   |   71 ++
 arch/mips/include/asm/cpu.h                        |  143 +++
 arch/mips/include/debug_ll_ns16550.h               |   40 +
 arch/mips/lib/Makefile                             |    5 +
 arch/mips/lib/bootm.c                              |   43 +
 arch/mips/lib/c-r4k.c                              |   97 ++
 arch/mips/lib/cpu-probe.c                          |  143 +++
 arch/mips/lib/cpuinfo.c                            |   27 +-
 arch/mips/mach-malta/include/mach/debug_ll.h       |   11 +-
 arch/mips/mach-malta/include/mach/hardware.h       |    1 +
 arch/mips/mach-mips.dox                            |    4 +
 arch/mips/mach-xburst/Kconfig                      |   21 +
 arch/mips/mach-xburst/Makefile                     |    1 +
 arch/mips/mach-xburst/csrc-jz4750.c                |   61 ++
 arch/mips/mach-xburst/include/mach/debug_ll.h      |   30 +
 arch/mips/mach-xburst/include/mach/jz4750d_regs.h  |   80 ++
 arch/mips/mach-xburst/mach-xburst.dox              |    7 +
 arch/mips/mach-xburst/reset-jz4750.c               |   46 +
 arch/nios2/boards/generic/generic.c                |    4 +-
 arch/nios2/lib/bootm.c                             |    2 +-
 arch/openrisc/include/asm/types.h                  |    2 -
 arch/ppc/Kconfig                                   |    3 +
 arch/ppc/Makefile                                  |    8 +
 arch/ppc/boards/freescale-p2020rdb/Makefile        |    4 +
 arch/ppc/boards/freescale-p2020rdb/barebox.lds.S   |  144 +++
 arch/ppc/boards/freescale-p2020rdb/config.h        |   98 ++
 arch/ppc/boards/freescale-p2020rdb/law.c           |   31 +
 arch/ppc/boards/freescale-p2020rdb/p2020rdb.c      |  230 +++++
 arch/ppc/boards/freescale-p2020rdb/tlb.c           |   62 ++
 arch/ppc/boards/pcm030/pcm030.c                    |    4 +-
 arch/ppc/configs/p2020rdb_defconfig                |   23 +
 arch/ppc/cpu-85xx/Makefile                         |    4 +
 arch/ppc/cpu-85xx/fixed_ivor.S                     |   61 ++
 arch/ppc/cpu-85xx/resetvec.S                       |    2 +
 arch/ppc/cpu-85xx/start.S                          | 1085 ++++++++++++++++++++
 arch/ppc/cpu-85xx/tlb.c                            |  175 ++++
 arch/ppc/cpu-85xx/traps.c                          |  272 +++++
 arch/ppc/include/asm/cache.h                       |    2 +
 arch/ppc/include/asm/config.h                      |   44 +
 arch/ppc/include/asm/fsl_ddr_sdram.h               |   33 +
 arch/ppc/include/asm/fsl_law.h                     |   91 ++
 arch/ppc/include/asm/fsl_lbc.h                     |   61 ++
 arch/ppc/include/asm/io.h                          |   28 +
 arch/ppc/lib/Makefile                              |    1 +
 arch/ppc/lib/board.c                               |    4 +
 arch/ppc/lib/reloc.S                               |   47 +
 arch/ppc/mach-mpc5xxx/start.S                      |   14 -
 arch/ppc/mach-mpc85xx/Kconfig                      |   41 +
 arch/ppc/mach-mpc85xx/Makefile                     |    8 +
 arch/ppc/mach-mpc85xx/cpu.c                        |   85 ++
 arch/ppc/mach-mpc85xx/cpu_init.c                   |  127 +++
 arch/ppc/mach-mpc85xx/cpuid.c                      |   73 ++
 arch/ppc/mach-mpc85xx/fsl_law.c                    |  160 +++
 arch/ppc/mach-mpc85xx/fsl_lbc.c                    |   17 +
 arch/ppc/mach-mpc85xx/include/mach/clocks.h        |   18 +
 .../ppc/mach-mpc85xx/include/mach/config_mpc85xx.h |   39 +
 arch/ppc/mach-mpc85xx/include/mach/early_udelay.h  |   40 +
 arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h    |  132 +++
 arch/ppc/mach-mpc85xx/include/mach/mmu.h           |   47 +
 arch/ppc/mach-mpc85xx/include/mach/mpc85xx.h       |   23 +
 arch/ppc/mach-mpc85xx/speed.c                      |  104 ++
 arch/ppc/mach-mpc85xx/time.c                       |   53 +
 arch/sandbox/include/asm/types.h                   |    7 +
 commands/Kconfig                                   |   20 +
 commands/Makefile                                  |    1 +
 commands/bootm.c                                   |   66 +-
 commands/edit.c                                    |   17 +-
 commands/global.c                                  |   62 ++
 commands/i2c.c                                     |   26 +-
 commands/iomem.c                                   |    3 +-
 commands/linux16.c                                 |    3 +-
 commands/ls.c                                      |    6 +-
 commands/mem.c                                     |   10 +-
 commands/partition.c                               |    2 +-
 commands/saveenv.c                                 |    6 +-
 commands/timeout.c                                 |   16 +-
 commands/uncompress.c                              |    4 +-
 common/Kconfig                                     |   29 +-
 common/Makefile                                    |    9 +
 common/block.c                                     |   30 +-
 common/bootargs.c                                  |   83 ++
 common/digest.c                                    |    2 +-
 common/env.c                                       |    2 +-
 common/environment.c                               |    6 +-
 common/filetype.c                                  |    2 +
 common/globalvar.c                                 |   65 ++
 common/hush.c                                      |   26 +-
 common/misc.c                                      |    2 +-
 common/oftree.c                                    |    3 +-
 crypto/sha2.c                                      |    4 +-
 defaultenv-2/base/bin/boot                         |   18 +
 defaultenv-2/base/bin/bootargs-ip                  |   11 +
 defaultenv-2/base/bin/bootargs-ip-barebox          |    7 +
 defaultenv-2/base/bin/bootargs-ip-dhcp             |    5 +
 defaultenv-2/base/bin/bootargs-ip-none             |    5 +
 defaultenv-2/base/bin/bootargs-root-initrd         |   11 +
 defaultenv-2/base/bin/bootargs-root-jffs2          |    9 +
 defaultenv-2/base/bin/bootargs-root-nfs            |   15 +
 defaultenv-2/base/bin/bootargs-root-ubi            |   13 +
 defaultenv-2/base/bin/ifup                         |   59 ++
 defaultenv-2/base/bin/init                         |   46 +
 defaultenv-2/base/bin/mtdparts-add                 |   49 +
 defaultenv-2/base/boot/initrd                      |   16 +
 defaultenv-2/base/boot/net                         |   12 +
 defaultenv-2/base/data/ansi-colors                 |   26 +
 defaultenv-2/base/data/boot-template               |   16 +
 defaultenv-2/base/init/automount                   |   27 +
 defaultenv-2/base/init/bootargs-base               |    8 +
 defaultenv-2/base/init/general                     |   18 +
 defaultenv-2/base/init/hostname                    |    8 +
 defaultenv-2/base/init/prompt                      |    7 +
 defaultenv-2/base/network/eth0                     |   15 +
 defaultenv-2/menu/menu/boot-entries-collect        |   13 +
 defaultenv-2/menu/menu/boot-entries-edit           |   20 +
 defaultenv-2/menu/menu/boot-entries-remove         |   18 +
 defaultenv-2/menu/menu/boot-menu-add-entry         |    5 +
 defaultenv-2/menu/menu/boot-menu-new-boot-entry    |   21 +
 defaultenv-2/menu/menu/init-entries-collect        |    9 +
 defaultenv-2/menu/menu/init-entries-edit           |   20 +
 defaultenv-2/menu/menu/init-menu-add-entry         |    3 +
 defaultenv-2/menu/menu/mainmenu                    |   28 +
 defaultenv/config                                  |    4 +-
 drivers/base/driver.c                              |    5 +-
 drivers/base/resource.c                            |    2 +
 drivers/mtd/nand/nand_imx.c                        |    2 +-
 drivers/mtd/nand/nand_s3c24xx.c                    |   10 +-
 drivers/nor/cfi_flash.h                            |   10 +
 drivers/nor/m25p80.c                               |    8 +-
 drivers/serial/Kconfig                             |    2 +-
 drivers/serial/serial_s3c.c                        |   55 +-
 drivers/spi/imx_spi.c                              |    4 +
 drivers/spi/spi.c                                  |    2 +
 drivers/usb/host/ehci-hcd.c                        |    2 +-
 drivers/usb/host/ohci-hcd.c                        |    4 +
 drivers/usb/storage/usb.c                          |    2 +-
 fs/Kconfig                                         |    4 +
 fs/Makefile                                        |    1 +
 fs/devfs.c                                         |    3 +
 fs/fs.c                                            |  363 ++++---
 fs/nfs.c                                           | 1054 +++++++++++++++++++
 fs/ramfs.c                                         |   47 +-
 fs/tftp.c                                          |    3 +-
 include/boot.h                                     |   16 +
 include/envfs.h                                    |    2 +
 include/filetype.h                                 |    1 +
 include/globalvar.h                                |   12 +
 include/image.h                                    |    2 +-
 include/io.h                                       |   21 +-
 include/linux/ioport.h                             |    6 +
 include/linux/mtd/nand.h                           |    2 +-
 include/linux/types.h                              |    2 +
 include/magicvar.h                                 |    8 +-
 include/net.h                                      |    7 +-
 include/param.h                                    |    1 -
 include/partition.h                                |    3 -
 include/qsort.h                                    |    7 +
 include/usb/usb.h                                  |    2 +-
 lib/Kconfig                                        |    3 +
 lib/Makefile                                       |    1 +
 lib/glob.c                                         |   11 +-
 lib/lzo/modules.builtin                            |    2 -
 lib/make_directory.c                               |   13 +-
 lib/parameter.c                                    |   18 +-
 lib/qsort.c                                        |   79 ++
 lib/zlib_inflate/modules.builtin                   |    1 -
 scripts/Makefile                                   |    1 +
 scripts/bareboxenv.c                               |    2 +
 scripts/compiler.h                                 |    3 +
 scripts/genenv                                     |    2 +-
 scripts/mod/modpost.c                              |    2 +-
 scripts/mod/modpost.h                              |    4 +-
 scripts/s5p_cksum.c                                |  140 +++
 338 files changed, 10728 insertions(+), 1102 deletions(-)
 delete mode 100644 arch/arm/boards/freescale-mx51-pdk/env/config
 create mode 100644 arch/arm/boards/freescale-mx51-pdk/env/init/bootargs-base
 create mode 100644 arch/arm/boards/freescale-mx51-pdk/env/init/hostname
 create mode 100644 arch/arm/boards/mioa701/env/bin/dps1_unlock
 create mode 100644 arch/arm/boards/mioa701/env/bin/dps1_update
 create mode 100644 arch/arm/boards/mioa701/env/data/dps1.raw.gz
 create mode 100644 arch/arm/boards/pcm038/env/boot/nand-ubi
 delete mode 100644 arch/arm/boards/pcm038/env/config
 create mode 100644 arch/arm/boards/pcm038/env/init/bootargs-base
 create mode 100644 arch/arm/boards/pcm038/env/init/hostname
 create mode 100644 arch/arm/boards/pcm038/env/init/mtdparts-nand
 create mode 100644 arch/arm/boards/pcm038/env/init/mtdparts-nor
 create mode 100644 arch/arm/boards/pcm038/pcm970.c
 create mode 100644 arch/arm/boards/toshiba-ac100/Kconfig
 create mode 100644 arch/arm/boards/toshiba-ac100/Makefile
 create mode 100644 arch/arm/boards/toshiba-ac100/board.c
 create mode 100644 arch/arm/boards/toshiba-ac100/config.h
 create mode 100644 arch/arm/boards/toshiba-ac100/serial.c
 create mode 100644 arch/arm/boards/toshiba-ac100/toshiba-ac100.dox
 create mode 100644 arch/arm/configs/toshiba_ac100_defconfig
 create mode 100644 arch/arm/mach-samsung/clocks-s5pcxx.c
 create mode 100644 arch/arm/mach-samsung/gpio-s5pcxx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/iomux-s5pcxx.h
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c24xx-clocks.h
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c24xx-iomap.h
 create mode 100644 arch/arm/mach-samsung/include/mach/s5pcxx-clocks.h
 create mode 100644 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
 rename arch/arm/mach-samsung/{lowlevel-init.S => lowlevel-s3c24x0.S} (96%)
 create mode 100644 arch/arm/mach-samsung/lowlevel-s5pcxx.c
 create mode 100644 arch/arm/mach-samsung/mem-s3c24x0.c
 create mode 100644 arch/arm/mach-tegra/Kconfig
 create mode 100644 arch/arm/mach-tegra/Makefile
 create mode 100644 arch/arm/mach-tegra/clock.c
 create mode 100644 arch/arm/mach-tegra/include/mach/debug_ll.h
 create mode 100644 arch/arm/mach-tegra/include/mach/iomap.h
 create mode 100644 arch/arm/mach-tegra/reset.c
 create mode 100644 arch/mips/boards/rzx50/Kconfig
 create mode 100644 arch/mips/boards/rzx50/Makefile
 create mode 100644 arch/mips/boards/rzx50/config.h
 create mode 100644 arch/mips/boards/rzx50/include/board/debug_ll.h
 create mode 100644 arch/mips/boards/rzx50/rzx50.dox
 create mode 100644 arch/mips/boards/rzx50/serial.c
 create mode 100644 arch/mips/boot/main_entry.c
 create mode 100644 arch/mips/configs/rzx50_defconfig
 create mode 100644 arch/mips/include/asm/cpu-features.h
 create mode 100644 arch/mips/include/asm/cpu-info.h
 create mode 100644 arch/mips/include/asm/cpu.h
 create mode 100644 arch/mips/include/debug_ll_ns16550.h
 create mode 100644 arch/mips/lib/bootm.c
 create mode 100644 arch/mips/lib/c-r4k.c
 create mode 100644 arch/mips/lib/cpu-probe.c
 create mode 100644 arch/mips/mach-xburst/Kconfig
 create mode 100644 arch/mips/mach-xburst/Makefile
 create mode 100644 arch/mips/mach-xburst/csrc-jz4750.c
 create mode 100644 arch/mips/mach-xburst/include/mach/debug_ll.h
 create mode 100644 arch/mips/mach-xburst/include/mach/jz4750d_regs.h
 create mode 100644 arch/mips/mach-xburst/mach-xburst.dox
 create mode 100644 arch/mips/mach-xburst/reset-jz4750.c
 create mode 100644 arch/ppc/boards/freescale-p2020rdb/Makefile
 create mode 100644 arch/ppc/boards/freescale-p2020rdb/barebox.lds.S
 create mode 100644 arch/ppc/boards/freescale-p2020rdb/config.h
 create mode 100644 arch/ppc/boards/freescale-p2020rdb/law.c
 create mode 100644 arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
 create mode 100644 arch/ppc/boards/freescale-p2020rdb/tlb.c
 create mode 100644 arch/ppc/configs/p2020rdb_defconfig
 create mode 100644 arch/ppc/cpu-85xx/Makefile
 create mode 100644 arch/ppc/cpu-85xx/fixed_ivor.S
 create mode 100644 arch/ppc/cpu-85xx/resetvec.S
 create mode 100644 arch/ppc/cpu-85xx/start.S
 create mode 100644 arch/ppc/cpu-85xx/tlb.c
 create mode 100644 arch/ppc/cpu-85xx/traps.c
 create mode 100644 arch/ppc/include/asm/config.h
 create mode 100644 arch/ppc/include/asm/fsl_ddr_sdram.h
 create mode 100644 arch/ppc/include/asm/fsl_law.h
 create mode 100644 arch/ppc/include/asm/fsl_lbc.h
 create mode 100644 arch/ppc/lib/reloc.S
 create mode 100644 arch/ppc/mach-mpc85xx/Kconfig
 create mode 100644 arch/ppc/mach-mpc85xx/Makefile
 create mode 100644 arch/ppc/mach-mpc85xx/cpu.c
 create mode 100644 arch/ppc/mach-mpc85xx/cpu_init.c
 create mode 100644 arch/ppc/mach-mpc85xx/cpuid.c
 create mode 100644 arch/ppc/mach-mpc85xx/fsl_law.c
 create mode 100644 arch/ppc/mach-mpc85xx/fsl_lbc.c
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/clocks.h
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/config_mpc85xx.h
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/early_udelay.h
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/mmu.h
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/mpc85xx.h
 create mode 100644 arch/ppc/mach-mpc85xx/speed.c
 create mode 100644 arch/ppc/mach-mpc85xx/time.c
 create mode 100644 commands/global.c
 create mode 100644 common/bootargs.c
 create mode 100644 common/globalvar.c
 create mode 100644 defaultenv-2/base/bin/boot
 create mode 100644 defaultenv-2/base/bin/bootargs-ip
 create mode 100644 defaultenv-2/base/bin/bootargs-ip-barebox
 create mode 100644 defaultenv-2/base/bin/bootargs-ip-dhcp
 create mode 100644 defaultenv-2/base/bin/bootargs-ip-none
 create mode 100644 defaultenv-2/base/bin/bootargs-root-initrd
 create mode 100644 defaultenv-2/base/bin/bootargs-root-jffs2
 create mode 100644 defaultenv-2/base/bin/bootargs-root-nfs
 create mode 100644 defaultenv-2/base/bin/bootargs-root-ubi
 create mode 100644 defaultenv-2/base/bin/ifup
 create mode 100644 defaultenv-2/base/bin/init
 create mode 100644 defaultenv-2/base/bin/mtdparts-add
 create mode 100644 defaultenv-2/base/boot/initrd
 create mode 100644 defaultenv-2/base/boot/net
 create mode 100644 defaultenv-2/base/data/ansi-colors
 create mode 100644 defaultenv-2/base/data/boot-template
 create mode 100644 defaultenv-2/base/init/automount
 create mode 100644 defaultenv-2/base/init/bootargs-base
 create mode 100644 defaultenv-2/base/init/general
 create mode 100644 defaultenv-2/base/init/hostname
 create mode 100644 defaultenv-2/base/init/prompt
 create mode 100644 defaultenv-2/base/network/eth0
 create mode 100644 defaultenv-2/menu/menu/boot-entries-collect
 create mode 100644 defaultenv-2/menu/menu/boot-entries-edit
 create mode 100644 defaultenv-2/menu/menu/boot-entries-remove
 create mode 100644 defaultenv-2/menu/menu/boot-menu-add-entry
 create mode 100644 defaultenv-2/menu/menu/boot-menu-new-boot-entry
 create mode 100644 defaultenv-2/menu/menu/init-entries-collect
 create mode 100644 defaultenv-2/menu/menu/init-entries-edit
 create mode 100644 defaultenv-2/menu/menu/init-menu-add-entry
 create mode 100644 defaultenv-2/menu/menu/mainmenu
 create mode 100644 fs/nfs.c
 create mode 100644 include/globalvar.h
 create mode 100644 include/qsort.h
 delete mode 100644 lib/lzo/modules.builtin
 create mode 100644 lib/qsort.c
 delete mode 100644 lib/zlib_inflate/modules.builtin
 create mode 100644 scripts/s5p_cksum.c
-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul  2 05:27:05 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 2 Jul 2012 11:27:05 +0200
Subject: [PATCH] Unused files removed
In-Reply-To: <1340990360-5716-1-git-send-email-shc_work@mail.ru>
References: <1340990360-5716-1-git-send-email-shc_work@mail.ru>
Message-ID: <20120702092705.GL2698@pengutronix.de>

On Fri, Jun 29, 2012 at 09:19:20PM +0400, Alexander Shiyan wrote:
> Files "modules.builtin" probably have been copied from kernel tree.
> This files not used by barebox and can be removed safely.
> 
> Signed-off-by: Alexander Shiyan <shc_work at mail.ru>

Applied, thanks

Sascha

> ---
>  lib/lzo/modules.builtin          |    2 --
>  lib/zlib_inflate/modules.builtin |    1 -
>  2 files changed, 0 insertions(+), 3 deletions(-)
>  delete mode 100644 lib/lzo/modules.builtin
>  delete mode 100644 lib/zlib_inflate/modules.builtin
> 
> diff --git a/lib/lzo/modules.builtin b/lib/lzo/modules.builtin
> deleted file mode 100644
> index d860562..0000000
> --- a/lib/lzo/modules.builtin
> +++ /dev/null
> @@ -1,2 +0,0 @@
> -kernel/lib/lzo/lzo_compress.ko
> -kernel/lib/lzo/lzo_decompress.ko
> diff --git a/lib/zlib_inflate/modules.builtin b/lib/zlib_inflate/modules.builtin
> deleted file mode 100644
> index 7206225..0000000
> --- a/lib/zlib_inflate/modules.builtin
> +++ /dev/null
> @@ -1 +0,0 @@
> -kernel/lib/zlib_inflate/zlib_inflate.ko
> -- 
> 1.7.3.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From steve at scheftech.com  Mon Jul  2 09:08:35 2012
From: steve at scheftech.com (Steve Schefter)
Date: Mon, 02 Jul 2012 09:08:35 -0400
Subject: patch for SDRAM remap bug
Message-ID: <4FF19D53.5030708@scheftech.com>

An embedded and charset-unspecified text was scrubbed...
Name: 0014-When-remapping-the-SDRAM-with-the-MMU-enabled-we-nee.patch
URL: <http://lists.infradead.org/pipermail/barebox/attachments/20120702/31e0fdfc/attachment.ksh>

From antonynpavlov at gmail.com  Mon Jul  2 09:19:41 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Mon, 2 Jul 2012 17:19:41 +0400
Subject: patch for SDRAM remap bug
In-Reply-To: <4FF19D53.5030708@scheftech.com>
References: <4FF19D53.5030708@scheftech.com>
Message-ID: <CAA4bVAFF6xuu=T7PzRpr+1r_8oNGWQ1YkDSQ+oa8HvzGX_3dcQ@mail.gmail.com>

You have attached your patch to your mail message. Please, don't do that!

Use 'git send-email' for mailing patches to the maillist.


On 2 July 2012 17:08, Steve Schefter <steve at scheftech.com> wrote:
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>



-- 
Best regards,
  Antony Pavlov


From maxime.ripard at free-electrons.com  Mon Jul  2 10:14:53 2012
From: maxime.ripard at free-electrons.com (Maxime Ripard)
Date: Mon,  2 Jul 2012 16:14:53 +0200
Subject: [PATCH 1/2] Add support for kernel and device tree images stored in a
 partition
Message-ID: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>

It is a quite common setup to have a partition with all you need to boot
from the bootloader, ie the kernel image, the device tree blob, etc.

This patch introduces a new "file" location for these two images, which
uses in turn the *_part and the new *_part_type variable specifying the
fs type used by mount.

Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
Cc: Brian Lilly <brian at crystalfontz.com>
---
 defaultenv/bin/boot |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot
index 61b893a..26360ed 100644
--- a/defaultenv/bin/boot
+++ b/defaultenv/bin/boot
@@ -114,6 +114,12 @@ elif [ x$kernel_loc = xnand ]; then
 	kdev="/dev/nand0.kernel.bb"
 elif [ x$kernel_loc = xdisk ]; then
 	kdev="/dev/$kernel_part"
+elif [ x$kernel_loc = xfile ]; then
+	if [ ! -d $kernel_part ]; then
+		mkdir $kernel_part
+		mount /dev/$kernel_part $kernel_part_type $kernel_part
+	fi
+	kdev="$kernel_part/$kernelimage"
 else
 	echo "error: set kernel_loc to one of 'tftp', 'nfs', 'nand', 'nor' or 'disk'"
 	exit 1
@@ -128,6 +134,12 @@ elif [ x$oftree_loc = xnand ]; then
 	odev="/dev/nand0.oftree.bb"
 elif [ x$oftree_loc = xdisk ]; then
 	odev="/dev/$oftree_part"
+elif [ x$oftree_loc = xfile ]; then
+	if [ ! -d $oftree_part ]; then
+		mkdir $oftree_loc
+		mount /dev/$oftree_part $oftree_part_type $oftree_part
+	fi
+	odev="$oftree_part/$oftreeimage"
 fi
 
 [ x$odev = x ] || bootm_opt="$bootm_opt -o $odev"
-- 
1.7.9.5



From maxime.ripard at free-electrons.com  Mon Jul  2 10:14:54 2012
From: maxime.ripard at free-electrons.com (Maxime Ripard)
Date: Mon,  2 Jul 2012 16:14:54 +0200
Subject: [PATCH 2/2] Add support for the Crystalfontz CFA-10036 board
In-Reply-To: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
References: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
Message-ID: <1341238494-30914-2-git-send-email-maxime.ripard@free-electrons.com>

This patch adds initial support for the CFA-10036 module.

The module basically has a iMX28 SoC, plus a micro-SD slot, 3 pins to
access the DUART, a USB OTG port, a OLED screen using the Solomon
SSD1307 controller over I2C and a 200-pins SODIMM port to plug an
expansion board.

Support for this board and the additional devices will come
eventually.

For now, only the DUART and the MMC controller are used.

Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
Cc: Brian Lilly <brian at crystalfontz.com>
---
 arch/arm/Makefile                                |    1 +
 arch/arm/boards/crystalfontz-cfa10036/Makefile   |    1 +
 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c |  106 ++++++++++++++++++++++
 arch/arm/boards/crystalfontz-cfa10036/config.h   |   16 ++++
 arch/arm/boards/crystalfontz-cfa10036/env/config |   47 ++++++++++
 arch/arm/configs/cfa10036_defconfig              |   40 ++++++++
 arch/arm/mach-mxs/Kconfig                        |    7 ++
 7 files changed, 218 insertions(+)
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/Makefile
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/config.h
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/config
 create mode 100644 arch/arm/configs/cfa10036_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bd684dc..b8280fe 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -118,6 +118,7 @@ board-$(CONFIG_MACH_MX23EVK)			:= freescale-mx23-evk
 board-$(CONFIG_MACH_CHUMBY)			:= chumby_falconwing
 board-$(CONFIG_MACH_TX28)			:= karo-tx28
 board-$(CONFIG_MACH_MX28EVK)			:= freescale-mx28-evk
+board-$(CONFIG_MACH_CFA10036)			:= crystalfontz-cfa10036
 board-$(CONFIG_MACH_FREESCALE_MX51_PDK)		:= freescale-mx51-pdk
 board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
 board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
diff --git a/arch/arm/boards/crystalfontz-cfa10036/Makefile b/arch/arm/boards/crystalfontz-cfa10036/Makefile
new file mode 100644
index 0000000..75f0020
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/Makefile
@@ -0,0 +1 @@
+obj-y += cfa10036.o
diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
new file mode 100644
index 0000000..e454afd
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2010 Juergen Beisert, Pengutronix <kernel at pengutronix.de>
+ * Copyright (C) 2011 Marc Kleine-Budde, Pengutronix <mkl at pengutronix.de>
+ * Copyright (C) 2011 Wolfram Sang, Pengutronix <w.sang at pengutronix.de>
+ * Copyright (C) 2012 Maxime Ripard, Free Electrons <maxime.ripard at free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <environment.h>
+#include <errno.h>
+#include <fec.h>
+#include <gpio.h>
+#include <init.h>
+#include <mci.h>
+#include <io.h>
+
+#include <mach/clock.h>
+#include <mach/imx-regs.h>
+#include <mach/iomux-imx28.h>
+#include <mach/mci.h>
+
+#include <asm/armlinux.h>
+#include <asm/mmu.h>
+
+#include <mach/fb.h>
+
+#include <generated/mach-types.h>
+
+/* setup the CPU card internal signals */
+static const uint32_t cfa10036_pads[] = {
+	/* duart */
+	FUNC(2) | PORTF(3, 2) | VE_3_3V,
+	FUNC(2) | PORTF(3, 3) | VE_3_3V,
+
+	/* mmc0 */
+	SSP0_D0 | VE_3_3V | PULLUP(1),
+	SSP0_D1 | VE_3_3V | PULLUP(1),
+	SSP0_D2 | VE_3_3V | PULLUP(1),
+	SSP0_D3 | VE_3_3V | PULLUP(1),
+	SSP0_D4 | VE_3_3V | PULLUP(1),
+	SSP0_D5 | VE_3_3V | PULLUP(1),
+	SSP0_D6 | VE_3_3V | PULLUP(1),
+	SSP0_D7 | VE_3_3V | PULLUP(1),
+	SSP0_CMD | VE_3_3V | PULLUP(1),
+	SSP0_CD | VE_3_3V | PULLUP(1),
+	SSP0_SCK | VE_3_3V | BITKEEPER(0),
+	/* MCI slot power control 1 = off */
+	PWM3_GPIO | VE_3_3V | GPIO_OUT | GPIO_VALUE(0),
+};
+
+static struct mxs_mci_platform_data mci_pdata = {
+	.caps = MMC_MODE_8BIT,
+	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,	/* fixed to 3.3 V */
+	.f_min = 400 * 1000,
+	.f_max = 25000000,
+};
+
+static int cfa10036_mem_init(void)
+{
+	arm_add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024);
+
+	return 0;
+}
+mem_initcall(cfa10036_mem_init);
+
+static int cfa10036_devices_init(void)
+{
+	int i;
+
+	/* initizalize muxing */
+	for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++)
+		imx_gpio_mode(cfa10036_pads[i]);
+
+	/* enable IOCLK0 to run at the PLL frequency */
+	imx_set_ioclk(0, 480000000);
+	/* run the SSP unit clock at 100 MHz */
+	imx_set_sspclk(0, 100000000, 1);
+
+	armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_CFA10036);
+
+	add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, 0,
+			   IORESOURCE_MEM, &mci_pdata);
+
+	return 0;
+}
+device_initcall(cfa10036_devices_init);
+
+static int cfa10036_console_init(void)
+{
+	add_generic_device("stm_serial", 0, NULL, IMX_DBGUART_BASE, 8192,
+			   IORESOURCE_MEM, NULL);
+
+	return 0;
+}
+console_initcall(cfa10036_console_init);
diff --git a/arch/arm/boards/crystalfontz-cfa10036/config.h b/arch/arm/boards/crystalfontz-cfa10036/config.h
new file mode 100644
index 0000000..8f18fda
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/config.h
@@ -0,0 +1,16 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CONFIG_H_
+# define _CONFIG_H_
+
+#endif /* _CONFIG_H_ */
diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/config b/arch/arm/boards/crystalfontz-cfa10036/env/config
new file mode 100644
index 0000000..5d1bd48
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/env/config
@@ -0,0 +1,47 @@
+#!/bin/sh
+
+hostname=cfa10036
+#user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=none
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.serverip=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.ethaddr=de:ad:be:ef:00:00
+
+# can be either 'tftp', 'nfs', 'nand', 'nor', 'file' or 'disk'
+kernel_loc=file
+# can be either 'net', 'nand', 'nor', 'file', 'disk' or 'initrd'
+rootfs_loc=disk
+# can be either 'nand', 'nor', 'nfs', 'tftp', 'disk', 'file' or 'empty'
+oftree_loc=file
+
+# for flash based rootfs: 'jffs2' or 'ubifs'
+# in case of disk any regular filesystem like 'ext2', 'ext3', 'reiserfs'
+rootfs_type=ext3
+# where is the rootfs in case of 'rootfs_loc=disk' (linux name)
+rootfs_part_linux_dev=mmcblk0p3
+rootfsimage=rootfs-${hostname}.$rootfs_type
+
+# where is the kernel image in case of 'kernel_loc=disk'
+kernel_part=disk0.1
+oftree_part=disk0.1
+kernel_part_type=fat
+kernel_part_type=fat
+
+kernelimage=zImage-$hostname
+oftreeimage=oftree-$hostname
+
+bareboxenvimage=barebox-${hostname}.bin
+
+autoboot_timeout=3
+
+bootargs="console=ttyAMA0,115200"
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
diff --git a/arch/arm/configs/cfa10036_defconfig b/arch/arm/configs/cfa10036_defconfig
new file mode 100644
index 0000000..4c35c6b
--- /dev/null
+++ b/arch/arm/configs/cfa10036_defconfig
@@ -0,0 +1,40 @@
+CONFIG_ARCH_MXS=y
+CONFIG_ARCH_IMX28=y
+CONFIG_MACH_CFA10036=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_MMU=y
+CONFIG_TEXT_BASE=0x43000000
+CONFIG_MALLOC_SIZE=0x800000
+CONFIG_BROKEN=y
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/crystalfontz-cfa10036/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_GPIO=y
+# CONFIG_SPI is not set
+CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
+CONFIG_MCI_MXS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 3348a3c..7502a01 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -6,12 +6,14 @@ config ARCH_TEXT_BASE
 	default 0x42000000 if MACH_CHUMBY
 	default 0x47000000 if MACH_TX28
 	default 0x47000000 if MACH_MX28EVK
+	default 0x47000000 if MACH_CFA10036
 
 config BOARDINFO
 	default "Freescale i.MX23-EVK" if MACH_MX23EVK
 	default "Chumby Falconwing" if MACH_CHUMBY
 	default "Karo TX28" if MACH_TX28
 	default "Freescale i.MX28-EVK" if MACH_MX28EVK
+	default "Crystalfontz CFA-10036" if MACH_CFA10036
 
 comment "Freescale i.MX System-on-Chip"
 
@@ -64,6 +66,11 @@ config MACH_MX28EVK
 	help
 	  Say Y here if you are using the Freescale i.MX28-EVK board
 
+config MACH_CFA10036
+	bool "cfa-10036"
+	help
+	  Say Y here if you are using the Crystalfontz CFA-10036 module
+
 endchoice
 
 endif
-- 
1.7.9.5



From agalakhov at gmail.com  Mon Jul  2 11:53:38 2012
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Mon,  2 Jul 2012 21:53:38 +0600
Subject: [PATCH 0/2] Very minimal support S5PV210 board (Tiny210)
Message-ID: <1341244420-15338-1-git-send-email-agalakhov@gmail.com>

This is the revised versions of patches appeared on the list some time ago.
It supports very minimal subset of Tiny210 functions. It is currently
bootable from SD card only.

Alexey Galakhov (2):
  S5P DRAM support
  Add FriendlyArm Tiny210 board (S5PV210)

 arch/arm/Makefile                                 |    1 +
 arch/arm/boards/tiny210/Makefile                  |    1 +
 arch/arm/boards/tiny210/config.h                  |   19 ++
 arch/arm/boards/tiny210/lowlevel.c                |   72 +++++
 arch/arm/boards/tiny210/tiny210.c                 |  113 ++++++++
 arch/arm/configs/tiny210_defconfig                |   17 ++
 arch/arm/mach-samsung/Kconfig                     |   20 +-
 arch/arm/mach-samsung/Makefile                    |    2 +-
 arch/arm/mach-samsung/include/mach/s3c-generic.h  |    6 +
 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h |    3 +
 arch/arm/mach-samsung/mem-s5pcxx.c                |  320 +++++++++++++++++++++
 11 files changed, 567 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/boards/tiny210/Makefile
 create mode 100644 arch/arm/boards/tiny210/config.h
 create mode 100644 arch/arm/boards/tiny210/lowlevel.c
 create mode 100644 arch/arm/boards/tiny210/tiny210.c
 create mode 100644 arch/arm/configs/tiny210_defconfig
 create mode 100644 arch/arm/mach-samsung/mem-s5pcxx.c

-- 
1.7.10



From agalakhov at gmail.com  Mon Jul  2 11:53:40 2012
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Mon,  2 Jul 2012 21:53:40 +0600
Subject: [PATCH 2/2] Add FriendlyArm Tiny210 board (S5PV210)
In-Reply-To: <1341244420-15338-1-git-send-email-agalakhov@gmail.com>
References: <1341244420-15338-1-git-send-email-agalakhov@gmail.com>
Message-ID: <1341244420-15338-3-git-send-email-agalakhov@gmail.com>

Signed-off-by: Alexey Galakhov <agalakhov at gmail.com>
---
 arch/arm/Makefile                  |    1 +
 arch/arm/boards/tiny210/Makefile   |    1 +
 arch/arm/boards/tiny210/config.h   |   19 ++++++
 arch/arm/boards/tiny210/lowlevel.c |   72 +++++++++++++++++++++++
 arch/arm/boards/tiny210/tiny210.c  |  113 ++++++++++++++++++++++++++++++++++++
 arch/arm/configs/tiny210_defconfig |   17 ++++++
 arch/arm/mach-samsung/Kconfig      |   20 +++++--
 7 files changed, 237 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/boards/tiny210/Makefile
 create mode 100644 arch/arm/boards/tiny210/config.h
 create mode 100644 arch/arm/boards/tiny210/lowlevel.c
 create mode 100644 arch/arm/boards/tiny210/tiny210.c
 create mode 100644 arch/arm/configs/tiny210_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..89cd1cb 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -137,6 +137,7 @@ board-$(CONFIG_MACH_TX51)			:= karo-tx51
 board-$(CONFIG_MACH_MX6Q_ARM2)			:= freescale-mx6-arm2
 board-$(CONFIG_MACH_TOSHIBA_AC100)		:= toshiba-ac100
 board-$(CONFIG_MACH_CCMX51)			:= ccxmx51
+board-$(CONFIG_MACH_TINY210)			:= tiny210
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
diff --git a/arch/arm/boards/tiny210/Makefile b/arch/arm/boards/tiny210/Makefile
new file mode 100644
index 0000000..9c38e60
--- /dev/null
+++ b/arch/arm/boards/tiny210/Makefile
@@ -0,0 +1 @@
+obj-y += tiny210.o lowlevel.o
diff --git a/arch/arm/boards/tiny210/config.h b/arch/arm/boards/tiny210/config.h
new file mode 100644
index 0000000..86aedf0
--- /dev/null
+++ b/arch/arm/boards/tiny210/config.h
@@ -0,0 +1,19 @@
+#define S5PCXX_CLOCK_REFERENCE 24000000
+
+#define set_pll(mdiv, pdiv, sdiv)	(1<<31 | mdiv<<16 | pdiv<<8 | sdiv)
+
+#define BOARD_APLL_VAL	set_pll(0x7d, 0x3, 0x1)
+#define BOARD_MPLL_VAL	set_pll(0x29b, 0xc, 0x1)
+#define BOARD_EPLL_VAL	set_pll(0x60, 0x6, 0x2)
+#define BOARD_VPLL_VAL	set_pll(0x6c, 0x6, 0x3)
+
+#define BOARD_CLK_DIV0_MASK	0xFFFFFFFF
+#define BOARD_CLK_DIV0_VAL	0x14131440
+#define BOARD_APLL_LOCKTIME	0x2cf
+
+#define S5P_DRAM_WR	3
+#define S5P_DRAM_CAS	4
+#define DMC_TIMING_AREF	0x00000618
+#define DMC_TIMING_ROW	0x2B34438A
+#define DMC_TIMING_DATA	0x24240000
+#define DMC_TIMING_PWR	0x0BDC0343
diff --git a/arch/arm/boards/tiny210/lowlevel.c b/arch/arm/boards/tiny210/lowlevel.c
new file mode 100644
index 0000000..19739d8
--- /dev/null
+++ b/arch/arm/boards/tiny210/lowlevel.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2012 Alexey Galakhov
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <asm/barebox-arm.h>
+#include <asm/sections.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-clocks.h>
+#include <mach/s3c-generic.h>
+
+/*
+ * iROM boot from MMC
+ * TODO: replace this by native boot
+ */
+
+#define ADDR_V210_SDMMC_BASE	0xD0037488
+#define ADDR_CopySDMMCtoMem	0xD0037F98
+
+int __bare_init s5p_irom_load_mmc(void *dest, uint32_t start_block, uint16_t block_count)
+{
+	typedef uint32_t (*func_t) (int32_t, uint32_t, uint16_t, uint32_t*, int8_t);
+	uint32_t chbase = readl(ADDR_V210_SDMMC_BASE);
+	func_t func = (func_t)readl(ADDR_CopySDMMCtoMem);
+	int chan = (chbase - 0xEB000000) >> 20;
+	if (chan != 0 && chan != 2)
+		return 0;
+	return func(chan, start_block, block_count, (uint32_t*)dest, 0) ? 1 : 0;
+}
+
+
+void __bare_init board_init_lowlevel(void)
+{
+	uint32_t r;
+
+#ifdef CONFIG_S3C_PLL_INIT
+	s5p_init_pll();
+#endif
+
+	if (get_pc() < 0xD0000000) /* Are we running from iRAM? */
+		return; /* No, we don't. */
+
+	s5p_init_dram_bank_ddr2(S5P_DMC0_BASE, 0x20E00323, 0, 0);
+
+	if (! s5p_irom_load_mmc((void*)TEXT_BASE - 16, 1, (barebox_image_size + 16 + 511) / 512))
+		while (1) { } /* hang */
+
+	/* Jump to SDRAM */
+	r = (unsigned)TEXT_BASE;
+	__asm__ __volatile__("mov pc, %0" : : "r"(r));
+	while (1) { } /* hang */
+}
diff --git a/arch/arm/boards/tiny210/tiny210.c b/arch/arm/boards/tiny210/tiny210.c
new file mode 100644
index 0000000..1277649
--- /dev/null
+++ b/arch/arm/boards/tiny210/tiny210.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2012 Alexey Galakhov
+ * Based on Mini6410 code by Juergen Beisert
+ *
+ * Copyright (C) 2012 Juergen Beisert, Pengutronix
+ *
+ * In some ways inspired by code
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger at sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller at elsoft.ch>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <sizes.h>
+#include <generated/mach-types.h>
+#include <dm9000.h>
+#include <gpio.h>
+#include <led.h>
+#include <io.h>
+#include <nand.h>
+#include <asm/armlinux.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-clocks.h>
+#include <mach/s3c-generic.h>
+
+
+static const unsigned pin_usage[] = {
+	/* TODO */
+};
+
+static struct gpio_led leds[] = {
+	{
+		.gpio = GPJ20,
+		.led = {
+			.name = "led1",
+		}
+	}, {
+		.gpio = GPJ21,
+		.led = {
+			.name = "led2",
+		}
+	}, {
+		.gpio = GPJ22,
+		.led = {
+			.name = "led3",
+		}
+	}, {
+		.gpio = GPJ23,
+		.led = {
+			.name = "led4",
+		}
+	}
+};
+
+static int tiny210_mem_init(void)
+{
+	arm_add_mem_device("ram0", S3C_SDRAM_BASE, s5p_get_memory_size());
+	return 0;
+}
+mem_initcall(tiny210_mem_init);
+
+static int tiny210_console_init(void)
+{
+	/*
+	 * configure the UART1 right now, as barebox will
+	 * start to send data immediately
+	 */
+	s3c_gpio_mode(GPA00_RXD0 | ENABLE_PU);
+	s3c_gpio_mode(GPA01_TXD0);
+	s3c_gpio_mode(GPA02_NCTS0 | ENABLE_PU);
+	s3c_gpio_mode(GPA03_NRTS0);
+
+	add_generic_device("s3c_serial", -1, NULL,
+			   S3C_UART1_BASE, S3C_UART1_SIZE,
+			   IORESOURCE_MEM, NULL);
+	return 0;
+}
+console_initcall(tiny210_console_init);
+
+static int tiny210_devices_init(void)
+{
+	int i;
+	for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
+		s3c_gpio_mode(pin_usage[i]);
+
+	for (i = 0; i < ARRAY_SIZE(leds); i++) {
+		leds[i].active_low = 1;
+		gpio_direction_output(leds[i].gpio, leds[i].active_low);
+		led_gpio_register(&leds[i]);
+	}
+
+	armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_MINI210);
+
+	return 0;
+}
+device_initcall(tiny210_devices_init);
diff --git a/arch/arm/configs/tiny210_defconfig b/arch/arm/configs/tiny210_defconfig
new file mode 100644
index 0000000..e9708bf
--- /dev/null
+++ b/arch/arm/configs/tiny210_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARCH_S5PCxx=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_BOARDINFO="Tiny 210"
+CONFIG_ARCH_BAREBOX_MAX_BARE_INIT_SIZE=0x1ff0
+CONFIG_ARCH_SAMSUNG=y
+CONFIG_CPU_S5PV210=y
+CONFIG_MACH_TINY210=y
+CONFIG_S3C_LOWLEVEL_INIT=y
+CONFIG_S3C_PLL_INIT=y
+CONFIG_S3C_SDRAM_INIT=y
+CONFIG_CMD_LED=y
+CONFIG_CMD_LED_TRIGGER=y
+CONFIG_DRIVER_SERIAL_S3C=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_LED_TRIGGERS=y
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index c60f5ed..90cda30 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -8,11 +8,13 @@ config ARCH_TEXT_BASE
 	default 0x31fc0000 if MACH_MINI2440
 	default 0x31fc0000 if MACH_A9M2440
 	default 0x31fc0000 if MACH_A9M2410
+	default 0x23e00000 if MACH_TINY210
 
 config BOARDINFO
 	default "Mini 2440"    if MACH_MINI2440
 	default "Digi A9M2440" if MACH_A9M2440
 	default "Digi A9M2410" if MACH_A9M2410
+	default "Tiny 210"     if MACH_TINY210
 
 config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
 	hex
@@ -92,12 +94,18 @@ config CPU_S5PC110
 config CPU_S5PV210
 	bool
 
-#choice
-#
-#	prompt "S5PCxx board type"
-#
-#
-#endchoice
+choice
+
+	prompt "S5PCxx board type"
+
+config MACH_TINY210
+	bool "Tiny 210"
+	select CPU_S5PV210
+	select MACH_HAS_LOWLEVEL_INIT
+	select MACH_DO_LOWLEVEL_INIT
+	select S3C_SDRAM_INIT
+
+endchoice
 
 endif
 
-- 
1.7.10



From agalakhov at gmail.com  Mon Jul  2 11:53:39 2012
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Mon,  2 Jul 2012 21:53:39 +0600
Subject: [PATCH 1/2] S5P DRAM support
In-Reply-To: <1341244420-15338-1-git-send-email-agalakhov@gmail.com>
References: <1341244420-15338-1-git-send-email-agalakhov@gmail.com>
Message-ID: <1341244420-15338-2-git-send-email-agalakhov@gmail.com>

Signed-off-by: Alexey Galakhov <agalakhov at gmail.com>
---
 arch/arm/mach-samsung/Makefile                    |    2 +-
 arch/arm/mach-samsung/include/mach/s3c-generic.h  |    6 +
 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h |    3 +
 arch/arm/mach-samsung/mem-s5pcxx.c                |  320 +++++++++++++++++++++
 4 files changed, 330 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-samsung/mem-s5pcxx.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index d7344c8..6020587 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -2,5 +2,5 @@ obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o
+obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o mem-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/include/mach/s3c-generic.h b/arch/arm/mach-samsung/include/mach/s3c-generic.h
index 11b083d..329c2b4 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-generic.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-generic.h
@@ -24,6 +24,8 @@
  * MA 02111-1307 USA
  */
 
+#include <common.h>
+
 uint32_t s3c_get_mpllclk(void);
 uint32_t s3c_get_upllclk(void);
 uint32_t s3c_get_fclk(void);
@@ -40,4 +42,8 @@ void s3c24xx_disable_second_sdram_bank(void);
 
 #ifdef CONFIG_ARCH_S5PCxx
 void s5p_init_pll(void);
+void s5p_init_dram_bank_lpddr(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16);
+void s5p_init_dram_bank_lpddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16);
+void s5p_init_dram_bank_ddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16);
+uint32_t s5p_get_memory_size(void);
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
index cb05527..248f868 100644
--- a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
@@ -47,3 +47,6 @@
 #define S3C_UART3_SIZE 0x400
 #define S3C_UART_HAS_UBRDIVSLOT
 #define S3C_UART_HAS_UINTM
+
+#define S5P_DMC0_BASE 0xF0000000
+#define S5P_DMC1_BASE 0xF1400000
diff --git a/arch/arm/mach-samsung/mem-s5pcxx.c b/arch/arm/mach-samsung/mem-s5pcxx.c
new file mode 100644
index 0000000..943f691
--- /dev/null
+++ b/arch/arm/mach-samsung/mem-s5pcxx.c
@@ -0,0 +1,320 @@
+/*
+ * Copyright (C) 2012 Alexey Galakhov
+ *
+ * Based on code from u-boot found somewhere on the web
+ * that seems to originate from Samsung
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <io.h>
+#include <init.h>
+#include <mach/s3c-generic.h>
+#include <mach/s3c-iomap.h>
+
+#define S5P_DMC_CONCONTROL	0x00
+#define S5P_DMC_MEMCONTROL	0x04
+#define S5P_DMC_MEMCONFIG0	0x08
+#define S5P_DMC_MEMCONFIG1	0x0C
+#define S5P_DMC_DIRECTCMD	0x10
+#define S5P_DMC_PRECHCONFIG	0x14
+#define S5P_DMC_PHYCONTROL0	0x18
+#define S5P_DMC_PHYCONTROL1	0x1C
+#define S5P_DMC_PWRDNCONFIG	0x28
+#define S5P_DMC_TIMINGAREF	0x30
+#define S5P_DMC_TIMINGROW	0x34
+#define S5P_DMC_TIMINGDATA	0x38
+#define S5P_DMC_TIMINGPOWER	0x3C
+#define S5P_DMC_PHYSTATUS	0x40
+#define S5P_DMC_MRSTATUS	0x54
+
+/* DRAM commands */
+#define CMD(x)  ((x) << 24)
+#define BANK(x) ((x) << 16)
+#define CHIP(x) ((x) << 20)
+#define ADDR(x) (x)
+
+/**
+ *  MR definition:
+ *  1 11
+ *  2 1098 7654 3210
+ *      |     |  ^^^- burst length, 010=4, 011=8
+ *      |     | ^- burst type 0=sequnential, 1=interleaved
+ *      |   ^^^-- CAS latency
+ *      |  ^----- test, 0=normal, 1=test
+ *      |^---- DLL reset, 1=yes
+ *    ^^^----- WR, 1=2, 2=3 etc.
+ *  ^------- PD, 0=fast exit, 1=low power
+ *
+ *  EMR1 definition:
+ *  1 11
+ *  2 1098 7654 3210
+ *         |       ^- DLL, 0=enable
+ *         |      ^-- output strength, 0=full, 1=reduced
+ *         |^.. .^--- Rtt, 00=off, 01=75, 10=150, 11=50 Ohm
+ *         | ^^ ^-- Posted CAS# AL, 0-6
+ *      ^^ ^------ OCD: 000=OCD exit, 111=enable defaults
+ *     ^------ DQS#, 0=enable, 1=disable
+ *    ^------- RDQS enable, 0=no, 1=yes
+ *  ^-------- outputs, 0=enabled, 1=disabled
+ *
+ *  EMR2 definition:
+ *  bit 7
+ *  1 1
+ *  2 1098 7654 3210
+ *         ^-- SRT, 0=1x (0-85 deg.C), 1=2x (>85 deg.C)
+ *  all other bits = 0
+ *
+ *  EMR3 definition: all bits 0
+ */
+
+#define MRS	CMD(0x0)
+#define PALL	CMD(0x1)
+#define PRE	CMD(0x2)
+#define DPD	CMD(0x3)
+#define REFS	CMD(0x4)
+#define REFA	CMD(0x5)
+#define CKEL	CMD(0x6)
+#define NOP	CMD(0x7)
+#define REFSX	CMD(0x8)
+#define MRR	CMD(0x9)
+
+#define EMRS1 (MRS | BANK(1))
+#define EMRS2 (MRS | BANK(2))
+#define EMRS3 (MRS | BANK(3))
+
+/* Burst is (1 << S5P_DRAM_BURST), i.e. S5P_DRAM_BURST=2 for burst 4 */
+#ifndef S5P_DRAM_BURST
+/* (LP)DDR2 supports burst 4 only, make it default */
+# define S5P_DRAM_BURST 2
+#endif
+
+/**
+ * Initialization sequences for different kinds of DRAM
+ */
+#define dcmd(x) writel((x) | CHIP(chip), base + S5P_DMC_DIRECTCMD)
+
+static void __bare_init s5p_dram_init_seq_lpddr(phys_addr_t base, unsigned chip)
+{
+	const uint32_t emr = 0x400; /* DQS disable */
+	const uint32_t mr = (((S5P_DRAM_WR) - 1) << 9)
+			  | ((S5P_DRAM_CAS) << 4)
+			  | (S5P_DRAM_BURST);
+	/* TODO this sequence is untested */
+	dcmd(PALL); dcmd(REFA); dcmd(REFA);
+	dcmd(MRS   | ADDR(mr));
+	dcmd(EMRS1 | ADDR(emr));
+}
+
+static void __bare_init s5p_dram_init_seq_lpddr2(phys_addr_t base, unsigned chip)
+{
+	const uint32_t mr = (((S5P_DRAM_WR) - 1) << 9)
+			  | ((S5P_DRAM_CAS) << 4)
+			  | (S5P_DRAM_BURST);
+	/* TODO this sequence is untested */
+	dcmd(NOP);
+	dcmd(MRS | ADDR(mr));
+	do {
+		dcmd(MRR);
+	} while (readl(base + S5P_DMC_MRSTATUS) & 0x01); /* poll DAI */
+}
+
+static void __bare_init s5p_dram_init_seq_ddr2(phys_addr_t base, unsigned chip)
+{
+	const uint32_t emr = 0x400; /* DQS disable */
+	const uint32_t mr = (((S5P_DRAM_WR) - 1) << 9)
+			  | ((S5P_DRAM_CAS) << 4)
+			  | (S5P_DRAM_BURST);
+	dcmd(NOP);
+	/* FIXME wait here? JEDEC recommends but nobody does */
+	dcmd(PALL); dcmd(EMRS2); dcmd(EMRS3);
+	dcmd(EMRS1 | ADDR(emr));         /* DQS disable */
+	dcmd(MRS   | ADDR(mr | 0x100));  /* DLL reset */
+	dcmd(PALL); dcmd(REFA); dcmd(REFA);
+	dcmd(MRS   | ADDR(mr));          /* DLL no reset */
+	dcmd(EMRS1 | ADDR(emr | 0x380)); /* OCD defaults */
+	dcmd(EMRS1 | ADDR(emr));         /* OCD exit */
+}
+
+#undef dcmd
+
+static inline void __bare_init s5p_dram_start_dll(phys_addr_t base, uint32_t phycon1)
+{
+	uint32_t pc0 = 0x00101000; /* the only legal initial value */
+	uint32_t lv;
+
+	/* Init DLL */
+	writel(pc0, base + S5P_DMC_PHYCONTROL0);
+	writel(phycon1, base + S5P_DMC_PHYCONTROL1);
+
+	/* DLL on */
+	pc0 |= 0x2;
+	writel(pc0, base + S5P_DMC_PHYCONTROL0);
+
+	/* DLL start */
+	pc0 |= 0x1;
+	writel(pc0, base + S5P_DMC_PHYCONTROL0);
+
+	/* Find lock val */
+	do {
+		lv = readl(base + S5P_DMC_PHYSTATUS);
+	} while ((lv & 0x7) != 0x7);
+
+	lv >>= 6;
+	lv &= 0xff; /* ctrl_lock_value[9:2] - coarse */
+	pc0 |= (lv << 24); /* ctrl_force */
+	writel(pc0, base + S5P_DMC_PHYCONTROL0); /* force value locking */
+}
+
+static inline void __bare_init s5p_dram_setup(phys_addr_t base, uint32_t mc0, uint32_t mc1,
+				       int bus16, uint32_t mcon)
+{
+	mcon |= (S5P_DRAM_BURST) << 20;
+	/* 16 or 32-bit bus ? */
+	mcon |= bus16 ? 0x1000 : 0x2000;
+	if (mc1)
+		mcon |= 0x10000; /* two chips */
+
+	writel(mcon, base + S5P_DMC_MEMCONTROL);
+
+	/* Set up memory layout */
+	writel(mc0, base + S5P_DMC_MEMCONFIG0);
+	if (mc1)
+		writel(mc1, base + S5P_DMC_MEMCONFIG1);
+
+	/* Open page precharge policy - reasonable defaults */
+	writel(0xFF000000, base + S5P_DMC_PRECHCONFIG);
+
+	/* Set up timings */
+	writel(DMC_TIMING_AREF, base + S5P_DMC_TIMINGAREF);
+	writel(DMC_TIMING_ROW,  base + S5P_DMC_TIMINGROW);
+	writel(DMC_TIMING_DATA, base + S5P_DMC_TIMINGDATA);
+	writel(DMC_TIMING_PWR,  base + S5P_DMC_TIMINGPOWER);
+}
+
+static inline void __bare_init s5p_dram_start(phys_addr_t base)
+{
+	/* Reasonable defaults and auto-refresh on */
+	writel(0x0FFF1070, base + S5P_DMC_CONCONTROL);
+	/* Reasonable defaults */
+	writel(0xFFFF00FF, base + S5P_DMC_PWRDNCONFIG);
+}
+
+/*
+ * Initialize LPDDR memory bank
+ * TODO: this function is untested, see also init_seq function
+ */
+void __bare_init s5p_init_dram_bank_lpddr(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16)
+{
+	/* refcount 8, 90 deg. shift */
+	s5p_dram_start_dll(base, 0x00000085);
+	/* LPDDR type */
+	s5p_dram_setup(base, mc0, mc1, bus16, 0x100);
+
+	/* Start-Up Commands */
+	s5p_dram_init_seq_lpddr(base, 0);
+	if (mc1)
+		s5p_dram_init_seq_lpddr(base, 1);
+
+	s5p_dram_start(base);
+}
+
+/*
+ * Initialize LPDDR2 memory bank
+ * TODO: this function is untested, see also init_seq function
+ */
+void __bare_init s5p_init_dram_bank_lpddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16)
+{
+	/* refcount 8, 90 deg. shift */
+	s5p_dram_start_dll(base, 0x00000085);
+	/* LPDDR2 type */
+	s5p_dram_setup(base, mc0, mc1, bus16, 0x200);
+
+	/* Start-Up Commands */
+	s5p_dram_init_seq_lpddr2(base, 0);
+	if (mc1)
+		s5p_dram_init_seq_lpddr2(base, 1);
+
+	s5p_dram_start(base);
+}
+
+/*
+ * Initialize DDR2 memory bank
+ */
+void __bare_init s5p_init_dram_bank_ddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16)
+{
+	/* refcount 8, 180 deg. shift */
+	s5p_dram_start_dll(base, 0x00000086);
+	/* DDR2 type */
+	s5p_dram_setup(base, mc0, mc1, bus16, 0x400);
+
+	/* Start-Up Commands */
+	s5p_dram_init_seq_ddr2(base, 0);
+	if (mc1)
+		s5p_dram_init_seq_ddr2(base, 1);
+
+	s5p_dram_start(base);
+}
+
+
+#define BANK_ENABLED(base) (readl((base) + S5P_DMC_PHYCONTROL0) & 1)
+#define NUM_EXTRA_CHIPS(base) ((readl((base) + S5P_DMC_MEMCONTROL) >> 16) & 0xF)
+
+#define BANK_START(x) ((x) & 0xFF000000)
+#define BANK_END(x) (BANK_START(x) | ~(((x) & 0x00FF0000) << 8))
+#define BANK_LEN(x) (BANK_END(x) - BANK_START(x) + 1)
+
+static inline void sortswap(uint32_t *x, uint32_t *y)
+{
+	if (*y < *x) {
+		*x ^= *y;
+		*y ^= *x;
+		*x ^= *y;
+	}
+}
+
+uint32_t s5p_get_memory_size(void)
+{
+	int i;
+	uint32_t len;
+	uint32_t mc[4] = { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF };
+	/* Read MEMCONFIG registers */
+	if (BANK_ENABLED(S5P_DMC0_BASE)) {
+		mc[0] = readl(S5P_DMC0_BASE + S5P_DMC_MEMCONFIG0);
+		if (NUM_EXTRA_CHIPS(S5P_DMC0_BASE) > 0)
+			mc[1] = readl(S5P_DMC0_BASE + S5P_DMC_MEMCONFIG1);
+	}
+	if (BANK_ENABLED(S5P_DMC1_BASE)) {
+		mc[2] = readl(S5P_DMC1_BASE + S5P_DMC_MEMCONFIG0);
+		if (NUM_EXTRA_CHIPS(S5P_DMC1_BASE) > 0)
+			mc[3] = readl(S5P_DMC1_BASE + S5P_DMC_MEMCONFIG1);
+	}
+	/* Sort using a sorting network */
+	sortswap(mc + 0, mc + 2);
+	sortswap(mc + 1, mc + 3);
+	sortswap(mc + 0, mc + 1);
+	sortswap(mc + 2, mc + 3);
+	sortswap(mc + 1, mc + 2);
+	/* Is at least one chip enabled? */
+	if (mc[0] == 0xFFFFFFFF)
+		return 0;
+	/* Determine maximum continuous region at start */
+	len = BANK_LEN(mc[0]);
+	for (i = 1; i < 4; ++i) {
+		if (BANK_START(mc[i]) == BANK_END(mc[i - 1]) + 1)
+			len += BANK_LEN(mc[i]);
+		else
+			break;
+	}
+	return len;
+}
-- 
1.7.10



From marek.belisko at gmail.com  Mon Jul  2 12:52:05 2012
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 2 Jul 2012 18:52:05 +0200
Subject: panda board crash when detecting usb devices
In-Reply-To: <20120702082323.GH2698@pengutronix.de>
References: <CAAfyv37Xm7MAuTToGeDr56gTYBVy6ZJTnXf=vcX3HmZfCoNkZw@mail.gmail.com>
 <20120702082323.GH2698@pengutronix.de>
Message-ID: <CAAfyv34_Lw1T2Jc1-tX52QWdahPQ=zB67KYdEA8GKPrgU8tabQ@mail.gmail.com>

On Mon, Jul 2, 2012 at 10:23 AM, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> On Mon, Jul 02, 2012 at 12:53:06AM +0200, Belisko Marek wrote:
>> In current next there is issue with usb command on panda board:
>>
>> barebox at Texas Instrument's Panda:/ usb
>> USB: scanning bus for devices...
>> unable to handle NULL pointer dereference at address 0x00000004
>> pc : [<8f00ac10>]    lr : [<8f00a41c>]
>> sp : 8cfffde0  ip : 8d001ce8  fp : 00000000
>> r10: 00000000  r9 : 8cffff44  r8 : 8f033a34
>> r7 : 00100100  r6 : 00200200  r5 : 8d014160  r4 : 8d01416c
>> r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : 8d01416c
>> Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
>> [<8f00ac10>] (ehci_init+0x1c/0x128) from [<8f00a41c>] (usb_rescan+0xa4/0xfc)
>> [<8f00a41c>] (usb_rescan+0xa4/0xfc) from [<8f01332c>] (do_usb+0x4c/0x64)
>> [<8f01332c>] (do_usb+0x4c/0x64) from [<8f0053e0>] (execute_command+0x38/0x7c)
>> [<8f0053e0>] (execute_command+0x38/0x7c) from [<8f001aac>]
>> (run_list_real+0x8b8/0x9b0)
>> [<8f001aac>] (run_list_real+0x8b8/0x9b0) from [<8f001cec>]
>> (parse_stream_outer+0x148/0x238)
>> [<8f001cec>] (parse_stream_outer+0x148/0x238) from [<8f002074>]
>> (run_shell+0x3c/0x7c)
>> [<8f002074>] (run_shell+0x3c/0x7c) from [<8f006a1c>] (start_barebox+0xd4/0x10c)
>> [<8f006a1c>] (start_barebox+0xd4/0x10c) from [<84081164>] (0x84081164)
>>
>> [<8f023898>] (unwind_backtrace+0x0/0xa8) from [<8f0144bc>] (panic+0x28/0x48)
>> [<8f0144bc>] (panic+0x28/0x48) from [<8f023e38>] (do_exception+0x10/0x14)
>> [<8f023e38>] (do_exception+0x10/0x14) from [<8f023ec4>]
>> (do_data_abort+0x2c/0x38)
>> [<8f023ec4>] (do_data_abort+0x2c/0x38) from [<8f023ad0>] (data_abort+0x50/0x60)
>>
>>
>> It is crashing in ehci_halt() in first ehci_read call. IMO ehci_read
>> access wrong memory (that is reason do data_abort?)
>> I have rev. A2. Any ideas?
>
> My bad, sorry. Try the following patch.
It's OK now. Seems it also in 2012.07. Thanks.
>
> Sascha
>
> 8<---------------------------------------------------------
>
> ehci: Fix resource size
>
> We now have a resource size for the ehci hccr register space. This
> was assumed to be 0x40 in size. On OMAP though it is only 0x10 and
> then the hccr resource conflicts with the hcor resource which results
> in a non working ehci port on beagle and panda boards. This patch
> adds a nonintrusive workaround, it limits the hccr resource to 0x10,
> which then also works on OMAP.
>
> Later we should drop the multiple resources for the ehci port and
> make the resource as specified in the datasheets.
>
> This is broken since:
>
> commit 08845e41fba2b16dd3050b6b910c615e1bb8e57c
> Author: Sascha Hauer <s.hauer at pengutronix.de>
> Date:   Wed May 23 12:54:24 2012 +0200
>
>     usb ehci: Add resource sizes
>
>     add_usb_ehci_device registers resources with size 0. Fix this.
>
>     Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
>
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>  drivers/base/resource.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/base/resource.c b/drivers/base/resource.c
> index 347b2f0..9844d1a 100644
> --- a/drivers/base/resource.c
> +++ b/drivers/base/resource.c
> @@ -113,7 +113,7 @@ struct device_d *add_usb_ehci_device(int id, resource_size_t hccr,
>
>         res = xzalloc(sizeof(struct resource) * 2);
>         res[0].start = hccr;
> -       res[0].size = 0x40;
> +       res[0].size = 0x10;
>         res[0].flags = IORESOURCE_MEM;
>         res[1].start = hcor;
>         res[1].size = 0xc0;
> --
> 1.7.10
>
> --
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com


From steve at scheftech.com  Mon Jul  2 13:22:33 2012
From: steve at scheftech.com (steve at scheftech.com)
Date: Mon,  2 Jul 2012 13:22:33 -0400
Subject: [PATCH] Avoid SDRAM access crash
Message-ID: <1341249753-5480-1-git-send-email-steve@scheftech.com>

From: Steve Schefter <steve at scheftech.com>

When remapping the SDRAM with the MMU enabled, we need to ensure
that the translation tables are not still in cache before
invalidating the TLB.  Failure to do so will result in the following
crash approximately 50% of the time:

booting kernel from /dev/nand0.kernel.bb
   Image Name:   Linux-3.3.0PD12.0.0
   OS:           Linux
   Architecture: ARM
   Type:         Kernel Image
   Compression:  uncompressed
   Data Size:    3384824 Bytes =  3.2 MB
   Load Address: 80008000
   Entry Point:  80008000
unable to handle paging request at address 0x80028000
pc : [<8f01f280>]    lr : [<8f005330>]
sp : 8cfff9b0  ip : 0000003f  fp : 00000000
r10: 00001000  r9 : 00000000  r8 : 8d2a8f70
r7 : 8f043818  r6 : 0033a5f8  r5 : 8f04381c  r4 : 00001000
r3 : 80028000  r2 : 00000fff  r1 : 8d2a8f71  r0 : 80028000
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
[<8f01f280>] (memcpy+0x18/0x20) from [<8f005330>] (uimage_sdram_flush+0x90/0xb8)
[<8f005330>] (uimage_sdram_flush+0x90/0xb8) from [<8f0053a4>] (uncompress_copy+0x4c/0x74)

Signed-off-by: Steve Schefter <steve at scheftech.com>
---
 arch/arm/cpu/mmu.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index c19f931..4ff0430 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -165,6 +165,12 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
 		pte += 256;
 	}
 
+	asm volatile (
+		"bl __mmu_cache_flush;"
+		:
+		:
+		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
+	);
 	tlb_invalidate();
 
 	return 0;
-- 
1.7.4.1



From marek.belisko at gmail.com  Mon Jul  2 13:30:20 2012
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 2 Jul 2012 19:30:20 +0200
Subject: [PATCH 1/2] Add support for kernel and device tree images stored
 in a partition
In-Reply-To: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
References: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
Message-ID: <CAAfyv35OtZycyLLcZm+PAt9Wxxiq1_O2XJyTsYqBDZU5LfDBNQ@mail.gmail.com>

On Mon, Jul 2, 2012 at 4:14 PM, Maxime Ripard
<maxime.ripard at free-electrons.com> wrote:
> It is a quite common setup to have a partition with all you need to boot
> from the bootloader, ie the kernel image, the device tree blob, etc.
>
> This patch introduces a new "file" location for these two images, which
> uses in turn the *_part and the new *_part_type variable specifying the
> fs type used by mount.
>
> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
> Cc: Brian Lilly <brian at crystalfontz.com>
> ---
>  defaultenv/bin/boot |   12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot
> index 61b893a..26360ed 100644
> --- a/defaultenv/bin/boot
> +++ b/defaultenv/bin/boot
> @@ -114,6 +114,12 @@ elif [ x$kernel_loc = xnand ]; then
>         kdev="/dev/nand0.kernel.bb"
>  elif [ x$kernel_loc = xdisk ]; then
>         kdev="/dev/$kernel_part"
> +elif [ x$kernel_loc = xfile ]; then
> +       if [ ! -d $kernel_part ]; then
> +               mkdir $kernel_part
> +               mount /dev/$kernel_part $kernel_part_type $kernel_part
> +       fi
> +       kdev="$kernel_part/$kernelimage"
This really helps also pandaboard because pandaboard kernel is still
on mmc and I was looking
for such solution (thx). Maybe one remark there should be also update
for file option in _boot_help script.
>  else
>         echo "error: set kernel_loc to one of 'tftp', 'nfs', 'nand', 'nor' or 'disk'"
>         exit 1
> @@ -128,6 +134,12 @@ elif [ x$oftree_loc = xnand ]; then
>         odev="/dev/nand0.oftree.bb"
>  elif [ x$oftree_loc = xdisk ]; then
>         odev="/dev/$oftree_part"
> +elif [ x$oftree_loc = xfile ]; then
> +       if [ ! -d $oftree_part ]; then
> +               mkdir $oftree_loc
> +               mount /dev/$oftree_part $oftree_part_type $oftree_part
> +       fi
> +       odev="$oftree_part/$oftreeimage"
>  fi
>
>  [ x$odev = x ] || bootm_opt="$bootm_opt -o $odev"
> --
> 1.7.9.5
>
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

regards,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com


From s.hauer at pengutronix.de  Tue Jul  3 03:36:05 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 3 Jul 2012 09:36:05 +0200
Subject: [PATCH] Avoid SDRAM access crash
In-Reply-To: <1341249753-5480-1-git-send-email-steve@scheftech.com>
References: <1341249753-5480-1-git-send-email-steve@scheftech.com>
Message-ID: <20120703073605.GT2698@pengutronix.de>

Hi Steve,

On Mon, Jul 02, 2012 at 01:22:33PM -0400, steve at scheftech.com wrote:
> From: Steve Schefter <steve at scheftech.com>
> 
> When remapping the SDRAM with the MMU enabled, we need to ensure
> that the translation tables are not still in cache before
> invalidating the TLB.  Failure to do so will result in the following
> crash approximately 50% of the time:
> 
> booting kernel from /dev/nand0.kernel.bb
>    Image Name:   Linux-3.3.0PD12.0.0
>    OS:           Linux
>    Architecture: ARM
>    Type:         Kernel Image
>    Compression:  uncompressed
>    Data Size:    3384824 Bytes =  3.2 MB
>    Load Address: 80008000
>    Entry Point:  80008000
> unable to handle paging request at address 0x80028000
> pc : [<8f01f280>]    lr : [<8f005330>]
> sp : 8cfff9b0  ip : 0000003f  fp : 00000000
> r10: 00001000  r9 : 00000000  r8 : 8d2a8f70
> r7 : 8f043818  r6 : 0033a5f8  r5 : 8f04381c  r4 : 00001000
> r3 : 80028000  r2 : 00000fff  r1 : 8d2a8f71  r0 : 80028000
> Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
> [<8f01f280>] (memcpy+0x18/0x20) from [<8f005330>] (uimage_sdram_flush+0x90/0xb8)
> [<8f005330>] (uimage_sdram_flush+0x90/0xb8) from [<8f0053a4>] (uncompress_copy+0x4c/0x74)

I wonder why this has never hit me. On what hardware did you see this?

Does the following patch solve your problem aswell?

8<----------------------------------------------------

ARM mmu: flush page tables in arm_mmu_remap_sdram()

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/cpu/mmu.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 55b07a4..607f357 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -147,7 +147,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
 	if ((phys & (SZ_1M - 1)) || (bank->size & (SZ_1M - 1)))
 		return -EINVAL;
 
-	ptes = memalign(0x400, num_ptes * sizeof(u32));
+	ptes = memalign(PAGE_SIZE, num_ptes * sizeof(u32));
 
 	debug("ptes: 0x%p ttb_start: 0x%08lx ttb_end: 0x%08lx\n",
 			ptes, ttb_start, ttb_end);
@@ -165,6 +165,9 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
 		pte += 256;
 	}
 
+	dma_flush_range((unsigned long)ttb, (unsigned long)ttb + 0x4000);
+	dma_flush_range((unsigned long)ptes, num_ptes * sizeof(u32));
+
 	tlb_invalidate();
 
 	return 0;
-- 
1.7.10


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Jul  3 03:39:26 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 3 Jul 2012 09:39:26 +0200
Subject: [PATCH 1/2] Add support for kernel and device tree images stored
 in a partition
In-Reply-To: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
References: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
Message-ID: <20120703073926.GU2698@pengutronix.de>

Hi Maxime,

On Mon, Jul 02, 2012 at 04:14:53PM +0200, Maxime Ripard wrote:
> It is a quite common setup to have a partition with all you need to boot
> from the bootloader, ie the kernel image, the device tree blob, etc.
> 
> This patch introduces a new "file" location for these two images, which
> uses in turn the *_part and the new *_part_type variable specifying the
> fs type used by mount.

That was one of the major shortcomings of the default environment and
one of the main reasons I created a new environment template. Have you
considered using it?

Sascha

> 
> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
> Cc: Brian Lilly <brian at crystalfontz.com>
> ---
>  defaultenv/bin/boot |   12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot
> index 61b893a..26360ed 100644
> --- a/defaultenv/bin/boot
> +++ b/defaultenv/bin/boot
> @@ -114,6 +114,12 @@ elif [ x$kernel_loc = xnand ]; then
>  	kdev="/dev/nand0.kernel.bb"
>  elif [ x$kernel_loc = xdisk ]; then
>  	kdev="/dev/$kernel_part"
> +elif [ x$kernel_loc = xfile ]; then
> +	if [ ! -d $kernel_part ]; then
> +		mkdir $kernel_part
> +		mount /dev/$kernel_part $kernel_part_type $kernel_part
> +	fi
> +	kdev="$kernel_part/$kernelimage"
>  else
>  	echo "error: set kernel_loc to one of 'tftp', 'nfs', 'nand', 'nor' or 'disk'"
>  	exit 1
> @@ -128,6 +134,12 @@ elif [ x$oftree_loc = xnand ]; then
>  	odev="/dev/nand0.oftree.bb"
>  elif [ x$oftree_loc = xdisk ]; then
>  	odev="/dev/$oftree_part"
> +elif [ x$oftree_loc = xfile ]; then
> +	if [ ! -d $oftree_part ]; then
> +		mkdir $oftree_loc
> +		mount /dev/$oftree_part $oftree_part_type $oftree_part
> +	fi
> +	odev="$oftree_part/$oftreeimage"
>  fi
>  
>  [ x$odev = x ] || bootm_opt="$bootm_opt -o $odev"
> -- 
> 1.7.9.5
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Jul  3 04:21:17 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue,  3 Jul 2012 10:21:17 +0200
Subject: [PATCH] fs: fix standard zero, full devices
Message-ID: <1341303677-4498-1-git-send-email-s.hauer@pengutronix.de>

The standard devices are currently broken since they have
the size ~0. As now files use loff_t as file size which is a signed
type the read implementation gets confused and now returns -1.

The current implementation also has the (somewhat theorical) problem
that we do not have real streaming devices, so /dev/zero went out
of zeroes after reading 4GB (or now LLONG_MAX).

This patch introduces a new cdev flag DEVFS_IS_CHARACTER_DEV and a new
file size flag FILE_SIZE_STREAM which makes it possible to create
real stream devices instead.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/stddev.c |    6 +++---
 fs/devfs.c        |    3 ++-
 fs/fs.c           |    8 ++++----
 include/driver.h  |    1 +
 include/fs.h      |    1 +
 5 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/commands/stddev.c b/commands/stddev.c
index 97080eb..098aea8 100644
--- a/commands/stddev.c
+++ b/commands/stddev.c
@@ -40,7 +40,7 @@ static int zero_init(void)
 	cdev = xzalloc(sizeof (*cdev));
 
 	cdev->name = "zero";
-	cdev->size = ~0;
+	cdev->flags = DEVFS_IS_CHARACTER_DEV;
 	cdev->ops = &zeroops;
 
 	devfs_create(cdev);
@@ -68,7 +68,7 @@ static int full_init(void)
 	cdev = xzalloc(sizeof (*cdev));
 
 	cdev->name = "full";
-	cdev->size = ~0;
+	cdev->flags = DEVFS_IS_CHARACTER_DEV;
 	cdev->ops = &fullops;
 
 	devfs_create(cdev);
@@ -95,7 +95,7 @@ static int null_init(void)
 	cdev = xzalloc(sizeof (*cdev));
 
 	cdev->name = "null";
-	cdev->size = 0;
+	cdev->flags = DEVFS_IS_CHARACTER_DEV;
 	cdev->ops = &nullops;
 
 	devfs_create(cdev);
diff --git a/fs/devfs.c b/fs/devfs.c
index ea8b250..fccf25a 100644
--- a/fs/devfs.c
+++ b/fs/devfs.c
@@ -121,7 +121,8 @@ static int devfs_open(struct device_d *_dev, FILE *f, const char *filename)
 	if (!cdev)
 		return -ENOENT;
 
-	f->size = cdev->size;
+	f->size = cdev->flags & DEVFS_IS_CHARACTER_DEV ?
+			FILE_SIZE_STREAM : cdev->size;
 	f->inode = cdev;
 
 	if (cdev->ops->open) {
diff --git a/fs/fs.c b/fs/fs.c
index 1774fb7..0b376a5 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -643,7 +643,7 @@ int read(int fd, void *buf, size_t count)
 
 	fsdrv = dev_to_fs_driver(dev);
 
-	if (f->pos + count > f->size)
+	if (f->size != FILE_SIZE_STREAM && f->pos + count > f->size)
 		count = f->size - f->pos;
 
 	if (!count)
@@ -672,7 +672,7 @@ ssize_t write(int fd, const void *buf, size_t count)
 	dev = f->dev;
 
 	fsdrv = dev_to_fs_driver(dev);
-	if (f->pos + count > f->size) {
+	if (f->size != FILE_SIZE_STREAM && f->pos + count > f->size) {
 		ret = fsdrv->truncate(dev, f, f->pos + count);
 		if (ret) {
 			if (ret != -ENOSPC)
@@ -740,12 +740,12 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 
 	switch (whence) {
 	case SEEK_SET:
-		if (offset > f->size)
+		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
 		pos = offset;
 		break;
 	case SEEK_CUR:
-		if (offset + f->pos > f->size)
+		if (f->size != FILE_SIZE_STREAM && offset + f->pos > f->size)
 			goto out;
 		pos = f->pos + offset;
 		break;
diff --git a/include/driver.h b/include/driver.h
index a5e3f44..7d597b4 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -417,6 +417,7 @@ int cdev_erase(struct cdev *cdev, size_t count, loff_t offset);
 #define DEVFS_PARTITION_FIXED		(1 << 0)
 #define DEVFS_PARTITION_READONLY	(1 << 1)
 #define DEVFS_IS_PARTITION		(1 << 2)
+#define DEVFS_IS_CHARACTER_DEV		(1 << 3)
 
 int devfs_add_partition(const char *devname, loff_t offset, loff_t size,
 		int flags, const char *name);
diff --git a/include/fs.h b/include/fs.h
index 2b1023e..c0b9f71 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -24,6 +24,7 @@ typedef struct dir {
 typedef struct filep {
 	struct device_d *dev; /* The device this FILE belongs to              */
 	loff_t pos;            /* current position in stream                   */
+#define FILE_SIZE_STREAM	((loff_t) -1)
 	loff_t size;           /* The size of this inode                       */
 	ulong flags;          /* the O_* flags from open                      */
 
-- 
1.7.10



From maxime.ripard at free-electrons.com  Tue Jul  3 07:18:49 2012
From: maxime.ripard at free-electrons.com (Maxime Ripard)
Date: Tue, 03 Jul 2012 13:18:49 +0200
Subject: [PATCH 1/2] Add support for kernel and device tree images stored
 in a partition
In-Reply-To: <20120703073926.GU2698@pengutronix.de>
References: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
 <20120703073926.GU2698@pengutronix.de>
Message-ID: <4FF2D519.60305@free-electrons.com>

Hi Sascha,

Le 03/07/2012 09:39, Sascha Hauer a ?crit :
> On Mon, Jul 02, 2012 at 04:14:53PM +0200, Maxime Ripard wrote:
>> It is a quite common setup to have a partition with all you need to boot
>> from the bootloader, ie the kernel image, the device tree blob, etc.
>>
>> This patch introduces a new "file" location for these two images, which
>> uses in turn the *_part and the new *_part_type variable specifying the
>> fs type used by mount.
> 
> That was one of the major shortcomings of the default environment and
> one of the main reasons I created a new environment template. Have you
> considered using it?

Ha, I think I missed it :)
It looks quite useful indeed.
I will drop this patch then and send an updated version once I'll be
able to use it properly.

Thanks!
Maxime


-- 
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com




From steve at scheftech.com  Tue Jul  3 07:22:57 2012
From: steve at scheftech.com (Steve Schefter)
Date: Tue, 03 Jul 2012 07:22:57 -0400
Subject: [PATCH] Avoid SDRAM access crash
In-Reply-To: <20120703073605.GT2698@pengutronix.de>
References: <1341249753-5480-1-git-send-email-steve@scheftech.com>
 <20120703073605.GT2698@pengutronix.de>
Message-ID: <4FF2D611.2040207@scheftech.com>

Hi Sascha.

> I wonder why this has never hit me. On what hardware did you see this?

Me too.  All I can say is that the timing is tight.  I see crashes at 
various DRAM addresses, all depending on how much was left in cache when 
the tlb invalidate was done.

I'm using the Phytec phyCORE-OMAP44xx card.

> Does the following patch solve your problem aswell?

It does.  I see that routine contains a cache flush as well.

Regards,
	Steve

>
> 8<----------------------------------------------------
>
> ARM mmu: flush page tables in arm_mmu_remap_sdram()
>
> Signed-off-by: Sascha Hauer<s.hauer at pengutronix.de>
> ---
>   arch/arm/cpu/mmu.c |    5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
> index 55b07a4..607f357 100644
> --- a/arch/arm/cpu/mmu.c
> +++ b/arch/arm/cpu/mmu.c
> @@ -147,7 +147,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
>   	if ((phys&  (SZ_1M - 1)) || (bank->size&  (SZ_1M - 1)))
>   		return -EINVAL;
>
> -	ptes = memalign(0x400, num_ptes * sizeof(u32));
> +	ptes = memalign(PAGE_SIZE, num_ptes * sizeof(u32));
>
>   	debug("ptes: 0x%p ttb_start: 0x%08lx ttb_end: 0x%08lx\n",
>   			ptes, ttb_start, ttb_end);
> @@ -165,6 +165,9 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
>   		pte += 256;
>   	}
>
> +	dma_flush_range((unsigned long)ttb, (unsigned long)ttb + 0x4000);
> +	dma_flush_range((unsigned long)ptes, num_ptes * sizeof(u32));
> +
>   	tlb_invalidate();
>
>   	return 0;


From s.hauer at pengutronix.de  Tue Jul  3 14:07:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue,  3 Jul 2012 20:07:37 +0200
Subject: [PATCH] fs: fix standard zero, full devices
Message-ID: <1341338857-29138-1-git-send-email-s.hauer@pengutronix.de>

The standard devices are currently broken since they have
the size ~0. As now files use loff_t as file size which is a signed
type the read implementation gets confused and now returns -1.

The current implementation also has the (somewhat theorical) problem
that we do not have real streaming devices, so /dev/zero went out
of zeroes after reading 4GB (or now LLONG_MAX).

This patch introduces a new cdev flag DEVFS_IS_CHARACTER_DEV and a new
file size flag FILE_SIZE_STREAM which makes it possible to create
real stream devices instead.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/stddev.c |    6 +++---
 fs/devfs.c        |    3 ++-
 fs/fs.c           |    8 ++++----
 include/driver.h  |    1 +
 include/fs.h      |    1 +
 5 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/commands/stddev.c b/commands/stddev.c
index 97080eb..098aea8 100644
--- a/commands/stddev.c
+++ b/commands/stddev.c
@@ -40,7 +40,7 @@ static int zero_init(void)
 	cdev = xzalloc(sizeof (*cdev));
 
 	cdev->name = "zero";
-	cdev->size = ~0;
+	cdev->flags = DEVFS_IS_CHARACTER_DEV;
 	cdev->ops = &zeroops;
 
 	devfs_create(cdev);
@@ -68,7 +68,7 @@ static int full_init(void)
 	cdev = xzalloc(sizeof (*cdev));
 
 	cdev->name = "full";
-	cdev->size = ~0;
+	cdev->flags = DEVFS_IS_CHARACTER_DEV;
 	cdev->ops = &fullops;
 
 	devfs_create(cdev);
@@ -95,7 +95,7 @@ static int null_init(void)
 	cdev = xzalloc(sizeof (*cdev));
 
 	cdev->name = "null";
-	cdev->size = 0;
+	cdev->flags = DEVFS_IS_CHARACTER_DEV;
 	cdev->ops = &nullops;
 
 	devfs_create(cdev);
diff --git a/fs/devfs.c b/fs/devfs.c
index ea8b250..fccf25a 100644
--- a/fs/devfs.c
+++ b/fs/devfs.c
@@ -121,7 +121,8 @@ static int devfs_open(struct device_d *_dev, FILE *f, const char *filename)
 	if (!cdev)
 		return -ENOENT;
 
-	f->size = cdev->size;
+	f->size = cdev->flags & DEVFS_IS_CHARACTER_DEV ?
+			FILE_SIZE_STREAM : cdev->size;
 	f->inode = cdev;
 
 	if (cdev->ops->open) {
diff --git a/fs/fs.c b/fs/fs.c
index 1774fb7..0b376a5 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -643,7 +643,7 @@ int read(int fd, void *buf, size_t count)
 
 	fsdrv = dev_to_fs_driver(dev);
 
-	if (f->pos + count > f->size)
+	if (f->size != FILE_SIZE_STREAM && f->pos + count > f->size)
 		count = f->size - f->pos;
 
 	if (!count)
@@ -672,7 +672,7 @@ ssize_t write(int fd, const void *buf, size_t count)
 	dev = f->dev;
 
 	fsdrv = dev_to_fs_driver(dev);
-	if (f->pos + count > f->size) {
+	if (f->size != FILE_SIZE_STREAM && f->pos + count > f->size) {
 		ret = fsdrv->truncate(dev, f, f->pos + count);
 		if (ret) {
 			if (ret != -ENOSPC)
@@ -740,12 +740,12 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 
 	switch (whence) {
 	case SEEK_SET:
-		if (offset > f->size)
+		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
 		pos = offset;
 		break;
 	case SEEK_CUR:
-		if (offset + f->pos > f->size)
+		if (f->size != FILE_SIZE_STREAM && offset + f->pos > f->size)
 			goto out;
 		pos = f->pos + offset;
 		break;
diff --git a/include/driver.h b/include/driver.h
index a5e3f44..7d597b4 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -417,6 +417,7 @@ int cdev_erase(struct cdev *cdev, size_t count, loff_t offset);
 #define DEVFS_PARTITION_FIXED		(1 << 0)
 #define DEVFS_PARTITION_READONLY	(1 << 1)
 #define DEVFS_IS_PARTITION		(1 << 2)
+#define DEVFS_IS_CHARACTER_DEV		(1 << 3)
 
 int devfs_add_partition(const char *devname, loff_t offset, loff_t size,
 		int flags, const char *name);
diff --git a/include/fs.h b/include/fs.h
index 2b1023e..c0b9f71 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -24,6 +24,7 @@ typedef struct dir {
 typedef struct filep {
 	struct device_d *dev; /* The device this FILE belongs to              */
 	loff_t pos;            /* current position in stream                   */
+#define FILE_SIZE_STREAM	((loff_t) -1)
 	loff_t size;           /* The size of this inode                       */
 	ulong flags;          /* the O_* flags from open                      */
 
-- 
1.7.10



From s.hauer at pengutronix.de  Tue Jul  3 14:07:54 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue,  3 Jul 2012 20:07:54 +0200
Subject: [PATCH] ARM i.MX51 babbage: Use correct select for new environment
Message-ID: <1341338874-29223-1-git-send-email-s.hauer@pengutronix.de>

It's HAVE_DEFAULT_ENVIRONMENT_NEW, not  DEFAULT_ENVIRONMENT_GENERIC_NEW

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/Kconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 647120d..5b77245 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -393,7 +393,7 @@ choice
 	prompt "i.MX51 Board Type"
 
 config MACH_FREESCALE_MX51_PDK
-	select DEFAULT_ENVIRONMENT_GENERIC_NEW
+	select HAVE_DEFAULT_ENVIRONMENT_NEW
 	bool "Freescale i.MX51 PDK"
 
 config MACH_EUKREA_CPUIMX51SD
-- 
1.7.10



From s.hauer at pengutronix.de  Tue Jul  3 14:08:20 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue,  3 Jul 2012 20:08:20 +0200
Subject: [PATCH] ARM tqma53: Add standard flash header
Message-ID: <1341338900-29304-1-git-send-email-s.hauer@pengutronix.de>

So that bootm detects the image as a barebox image.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/tqma53/flash_header.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boards/tqma53/flash_header.c b/arch/arm/boards/tqma53/flash_header.c
index f5e817c..d912b38 100644
--- a/arch/arm/boards/tqma53/flash_header.c
+++ b/arch/arm/boards/tqma53/flash_header.c
@@ -15,11 +15,12 @@
 
 #include <common.h>
 #include <asm/byteorder.h>
+#include <asm/barebox-arm-head.h>
 #include <mach/imx-flash-header.h>
 
 void __naked __flash_header_start go(void)
 {
-	__asm__ __volatile__("b exception_vectors\n");
+	barebox_arm_head();
 }
 
 struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
-- 
1.7.10



From s.hauer at pengutronix.de  Tue Jul  3 14:12:04 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 3 Jul 2012 20:12:04 +0200
Subject: [PATCH 2/2] Add support for the Crystalfontz CFA-10036 board
In-Reply-To: <1341238494-30914-2-git-send-email-maxime.ripard@free-electrons.com>
References: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
 <1341238494-30914-2-git-send-email-maxime.ripard@free-electrons.com>
Message-ID: <20120703181204.GX2698@pengutronix.de>

Hi Maxime,

The patch looks good. I can apply it as is if you wish to or wait until
you had a look at the new defenv.

Sascha

On Mon, Jul 02, 2012 at 04:14:54PM +0200, Maxime Ripard wrote:
> This patch adds initial support for the CFA-10036 module.
> 
> The module basically has a iMX28 SoC, plus a micro-SD slot, 3 pins to
> access the DUART, a USB OTG port, a OLED screen using the Solomon
> SSD1307 controller over I2C and a 200-pins SODIMM port to plug an
> expansion board.
> 
> Support for this board and the additional devices will come
> eventually.
> 
> For now, only the DUART and the MMC controller are used.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
> Cc: Brian Lilly <brian at crystalfontz.com>
> ---
>  arch/arm/Makefile                                |    1 +
>  arch/arm/boards/crystalfontz-cfa10036/Makefile   |    1 +
>  arch/arm/boards/crystalfontz-cfa10036/cfa10036.c |  106 ++++++++++++++++++++++
>  arch/arm/boards/crystalfontz-cfa10036/config.h   |   16 ++++
>  arch/arm/boards/crystalfontz-cfa10036/env/config |   47 ++++++++++
>  arch/arm/configs/cfa10036_defconfig              |   40 ++++++++
>  arch/arm/mach-mxs/Kconfig                        |    7 ++
>  7 files changed, 218 insertions(+)
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/Makefile
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/config.h
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/config
>  create mode 100644 arch/arm/configs/cfa10036_defconfig
> 
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index bd684dc..b8280fe 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -118,6 +118,7 @@ board-$(CONFIG_MACH_MX23EVK)			:= freescale-mx23-evk
>  board-$(CONFIG_MACH_CHUMBY)			:= chumby_falconwing
>  board-$(CONFIG_MACH_TX28)			:= karo-tx28
>  board-$(CONFIG_MACH_MX28EVK)			:= freescale-mx28-evk
> +board-$(CONFIG_MACH_CFA10036)			:= crystalfontz-cfa10036
>  board-$(CONFIG_MACH_FREESCALE_MX51_PDK)		:= freescale-mx51-pdk
>  board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
>  board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
> diff --git a/arch/arm/boards/crystalfontz-cfa10036/Makefile b/arch/arm/boards/crystalfontz-cfa10036/Makefile
> new file mode 100644
> index 0000000..75f0020
> --- /dev/null
> +++ b/arch/arm/boards/crystalfontz-cfa10036/Makefile
> @@ -0,0 +1 @@
> +obj-y += cfa10036.o
> diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
> new file mode 100644
> index 0000000..e454afd
> --- /dev/null
> +++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
> @@ -0,0 +1,106 @@
> +/*
> + * Copyright (C) 2010 Juergen Beisert, Pengutronix <kernel at pengutronix.de>
> + * Copyright (C) 2011 Marc Kleine-Budde, Pengutronix <mkl at pengutronix.de>
> + * Copyright (C) 2011 Wolfram Sang, Pengutronix <w.sang at pengutronix.de>
> + * Copyright (C) 2012 Maxime Ripard, Free Electrons <maxime.ripard at free-electrons.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <common.h>
> +#include <environment.h>
> +#include <errno.h>
> +#include <fec.h>
> +#include <gpio.h>
> +#include <init.h>
> +#include <mci.h>
> +#include <io.h>
> +
> +#include <mach/clock.h>
> +#include <mach/imx-regs.h>
> +#include <mach/iomux-imx28.h>
> +#include <mach/mci.h>
> +
> +#include <asm/armlinux.h>
> +#include <asm/mmu.h>
> +
> +#include <mach/fb.h>
> +
> +#include <generated/mach-types.h>
> +
> +/* setup the CPU card internal signals */
> +static const uint32_t cfa10036_pads[] = {
> +	/* duart */
> +	FUNC(2) | PORTF(3, 2) | VE_3_3V,
> +	FUNC(2) | PORTF(3, 3) | VE_3_3V,
> +
> +	/* mmc0 */
> +	SSP0_D0 | VE_3_3V | PULLUP(1),
> +	SSP0_D1 | VE_3_3V | PULLUP(1),
> +	SSP0_D2 | VE_3_3V | PULLUP(1),
> +	SSP0_D3 | VE_3_3V | PULLUP(1),
> +	SSP0_D4 | VE_3_3V | PULLUP(1),
> +	SSP0_D5 | VE_3_3V | PULLUP(1),
> +	SSP0_D6 | VE_3_3V | PULLUP(1),
> +	SSP0_D7 | VE_3_3V | PULLUP(1),
> +	SSP0_CMD | VE_3_3V | PULLUP(1),
> +	SSP0_CD | VE_3_3V | PULLUP(1),
> +	SSP0_SCK | VE_3_3V | BITKEEPER(0),
> +	/* MCI slot power control 1 = off */
> +	PWM3_GPIO | VE_3_3V | GPIO_OUT | GPIO_VALUE(0),
> +};
> +
> +static struct mxs_mci_platform_data mci_pdata = {
> +	.caps = MMC_MODE_8BIT,
> +	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,	/* fixed to 3.3 V */
> +	.f_min = 400 * 1000,
> +	.f_max = 25000000,
> +};
> +
> +static int cfa10036_mem_init(void)
> +{
> +	arm_add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024);
> +
> +	return 0;
> +}
> +mem_initcall(cfa10036_mem_init);
> +
> +static int cfa10036_devices_init(void)
> +{
> +	int i;
> +
> +	/* initizalize muxing */
> +	for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++)
> +		imx_gpio_mode(cfa10036_pads[i]);
> +
> +	/* enable IOCLK0 to run at the PLL frequency */
> +	imx_set_ioclk(0, 480000000);
> +	/* run the SSP unit clock at 100 MHz */
> +	imx_set_sspclk(0, 100000000, 1);
> +
> +	armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100);
> +	armlinux_set_architecture(MACH_TYPE_CFA10036);
> +
> +	add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, 0,
> +			   IORESOURCE_MEM, &mci_pdata);
> +
> +	return 0;
> +}
> +device_initcall(cfa10036_devices_init);
> +
> +static int cfa10036_console_init(void)
> +{
> +	add_generic_device("stm_serial", 0, NULL, IMX_DBGUART_BASE, 8192,
> +			   IORESOURCE_MEM, NULL);
> +
> +	return 0;
> +}
> +console_initcall(cfa10036_console_init);
> diff --git a/arch/arm/boards/crystalfontz-cfa10036/config.h b/arch/arm/boards/crystalfontz-cfa10036/config.h
> new file mode 100644
> index 0000000..8f18fda
> --- /dev/null
> +++ b/arch/arm/boards/crystalfontz-cfa10036/config.h
> @@ -0,0 +1,16 @@
> +/*
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef _CONFIG_H_
> +# define _CONFIG_H_
> +
> +#endif /* _CONFIG_H_ */
> diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/config b/arch/arm/boards/crystalfontz-cfa10036/env/config
> new file mode 100644
> index 0000000..5d1bd48
> --- /dev/null
> +++ b/arch/arm/boards/crystalfontz-cfa10036/env/config
> @@ -0,0 +1,47 @@
> +#!/bin/sh
> +
> +hostname=cfa10036
> +#user=
> +
> +# use 'dhcp' to do dhcp in barebox and in kernel
> +# use 'none' if you want to skip kernel ip autoconfiguration
> +ip=none
> +
> +# or set your networking parameters here
> +#eth0.ipaddr=a.b.c.d
> +#eth0.netmask=a.b.c.d
> +#eth0.serverip=a.b.c.d
> +#eth0.gateway=a.b.c.d
> +#eth0.ethaddr=de:ad:be:ef:00:00
> +
> +# can be either 'tftp', 'nfs', 'nand', 'nor', 'file' or 'disk'
> +kernel_loc=file
> +# can be either 'net', 'nand', 'nor', 'file', 'disk' or 'initrd'
> +rootfs_loc=disk
> +# can be either 'nand', 'nor', 'nfs', 'tftp', 'disk', 'file' or 'empty'
> +oftree_loc=file
> +
> +# for flash based rootfs: 'jffs2' or 'ubifs'
> +# in case of disk any regular filesystem like 'ext2', 'ext3', 'reiserfs'
> +rootfs_type=ext3
> +# where is the rootfs in case of 'rootfs_loc=disk' (linux name)
> +rootfs_part_linux_dev=mmcblk0p3
> +rootfsimage=rootfs-${hostname}.$rootfs_type
> +
> +# where is the kernel image in case of 'kernel_loc=disk'
> +kernel_part=disk0.1
> +oftree_part=disk0.1
> +kernel_part_type=fat
> +kernel_part_type=fat
> +
> +kernelimage=zImage-$hostname
> +oftreeimage=oftree-$hostname
> +
> +bareboxenvimage=barebox-${hostname}.bin
> +
> +autoboot_timeout=3
> +
> +bootargs="console=ttyAMA0,115200"
> +
> +# set a fancy prompt (if support is compiled in)
> +PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
> diff --git a/arch/arm/configs/cfa10036_defconfig b/arch/arm/configs/cfa10036_defconfig
> new file mode 100644
> index 0000000..4c35c6b
> --- /dev/null
> +++ b/arch/arm/configs/cfa10036_defconfig
> @@ -0,0 +1,40 @@
> +CONFIG_ARCH_MXS=y
> +CONFIG_ARCH_IMX28=y
> +CONFIG_MACH_CFA10036=y
> +CONFIG_AEABI=y
> +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
> +CONFIG_MMU=y
> +CONFIG_TEXT_BASE=0x43000000
> +CONFIG_MALLOC_SIZE=0x800000
> +CONFIG_BROKEN=y
> +CONFIG_LONGHELP=y
> +CONFIG_GLOB=y
> +CONFIG_HUSH_FANCY_PROMPT=y
> +CONFIG_CMDLINE_EDITING=y
> +CONFIG_AUTO_COMPLETE=y
> +CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
> +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/crystalfontz-cfa10036/env"
> +CONFIG_DEBUG_INFO=y
> +CONFIG_CMD_EDIT=y
> +CONFIG_CMD_SLEEP=y
> +CONFIG_CMD_SAVEENV=y
> +CONFIG_CMD_EXPORT=y
> +CONFIG_CMD_PRINTENV=y
> +CONFIG_CMD_READLINE=y
> +CONFIG_CMD_ECHO_E=y
> +CONFIG_CMD_MTEST=y
> +CONFIG_CMD_MTEST_ALTERNATIVE=y
> +CONFIG_CMD_BOOTM_SHOW_TYPE=y
> +CONFIG_CMD_BOOTM_OFTREE=y
> +CONFIG_CMD_RESET=y
> +CONFIG_CMD_GO=y
> +CONFIG_CMD_OFTREE=y
> +CONFIG_CMD_TIMEOUT=y
> +CONFIG_CMD_PARTITION=y
> +CONFIG_CMD_GPIO=y
> +# CONFIG_SPI is not set
> +CONFIG_MCI=y
> +CONFIG_MCI_STARTUP=y
> +CONFIG_MCI_MXS=y
> +CONFIG_FS_FAT=y
> +CONFIG_FS_FAT_LFN=y
> diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
> index 3348a3c..7502a01 100644
> --- a/arch/arm/mach-mxs/Kconfig
> +++ b/arch/arm/mach-mxs/Kconfig
> @@ -6,12 +6,14 @@ config ARCH_TEXT_BASE
>  	default 0x42000000 if MACH_CHUMBY
>  	default 0x47000000 if MACH_TX28
>  	default 0x47000000 if MACH_MX28EVK
> +	default 0x47000000 if MACH_CFA10036
>  
>  config BOARDINFO
>  	default "Freescale i.MX23-EVK" if MACH_MX23EVK
>  	default "Chumby Falconwing" if MACH_CHUMBY
>  	default "Karo TX28" if MACH_TX28
>  	default "Freescale i.MX28-EVK" if MACH_MX28EVK
> +	default "Crystalfontz CFA-10036" if MACH_CFA10036
>  
>  comment "Freescale i.MX System-on-Chip"
>  
> @@ -64,6 +66,11 @@ config MACH_MX28EVK
>  	help
>  	  Say Y here if you are using the Freescale i.MX28-EVK board
>  
> +config MACH_CFA10036
> +	bool "cfa-10036"
> +	help
> +	  Say Y here if you are using the Crystalfontz CFA-10036 module
> +
>  endchoice
>  
>  endif
> -- 
> 1.7.9.5
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul  4 02:39:42 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed,  4 Jul 2012 08:39:42 +0200
Subject: [PATCH] ARM tqma53: switch to new environment
Message-ID: <1341383982-27692-1-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/tqma53/env/config             |   43 -------------------------
 arch/arm/boards/tqma53/env/init/bootargs-base |    8 +++++
 arch/arm/boards/tqma53/env/init/hostname      |    8 +++++
 arch/arm/configs/tqma53_defconfig             |   14 ++++----
 arch/arm/mach-imx/Kconfig                     |    1 +
 5 files changed, 25 insertions(+), 49 deletions(-)
 delete mode 100644 arch/arm/boards/tqma53/env/config
 create mode 100644 arch/arm/boards/tqma53/env/init/bootargs-base
 create mode 100644 arch/arm/boards/tqma53/env/init/hostname

diff --git a/arch/arm/boards/tqma53/env/config b/arch/arm/boards/tqma53/env/config
deleted file mode 100644
index 723b094..0000000
--- a/arch/arm/boards/tqma53/env/config
+++ /dev/null
@@ -1,43 +0,0 @@
-#!/bin/sh
-
-hostname=tqma53
-serverip=
-user=
-
-# use 'dhcp' to do dhcp in barebox and in kernel
-# use 'none' if you want to skip kernel ip autoconfiguration
-ip=dhcp
-
-# or set your networking parameters here
-#eth0.ipaddr=a.b.c.d
-#eth0.netmask=a.b.c.d
-#eth0.gateway=a.b.c.d
-#eth0.serverip=a.b.c.d
-
-# can be either 'nfs', 'tftp', 'nor' or 'nand'
-kernel_loc=tftp
-# can be either 'net', 'nor', 'nand' or 'initrd'
-rootfs_loc=net
-
-# can be either 'jffs2' or 'ubifs'
-rootfs_type=ubifs
-rootfsimage=root-$hostname.$rootfs_type
-
-kernelimage=zImage-$hostname
-
-if [ -n $user ]; then
-	kernelimage="$user"-"$kernelimage"
-	nfsroot="$serverip:/home/$user/nfsroot/$hostname"
-	rootfsimage="$user"-"$rootfsimage"
-else
-	nfsroot="$serverip:/path/to/nfs/root"
-fi
-
-autoboot_timeout=3
-
-bootargs="console=ttymxc0,115200"
-
-disk_parts="1M(barebox)ro,1M(bareboxenv),4M(kernel),-(root)"
-
-# set a fancy prompt (if support is compiled in)
-PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
diff --git a/arch/arm/boards/tqma53/env/init/bootargs-base b/arch/arm/boards/tqma53/env/init/bootargs-base
new file mode 100644
index 0000000..d869754
--- /dev/null
+++ b/arch/arm/boards/tqma53/env/init/bootargs-base
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "Base bootargs"
+	exit
+fi
+
+global.linux.bootargs.base="console=ttymxc0,115200"
diff --git a/arch/arm/boards/tqma53/env/init/hostname b/arch/arm/boards/tqma53/env/init/hostname
new file mode 100644
index 0000000..c56ac6a
--- /dev/null
+++ b/arch/arm/boards/tqma53/env/init/hostname
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "hostname"
+	exit
+fi
+
+global.hostname=tqma53
diff --git a/arch/arm/configs/tqma53_defconfig b/arch/arm/configs/tqma53_defconfig
index a126f30..fedd368 100644
--- a/arch/arm/configs/tqma53_defconfig
+++ b/arch/arm/configs/tqma53_defconfig
@@ -11,24 +11,27 @@ CONFIG_MALLOC_SIZE=0x2000000
 CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
 CONFIG_LONGHELP=y
-CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/tqma53/env/"
 CONFIG_DEBUG_INFO=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MSLEEP=y
 CONFIG_CMD_SAVEENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_BASENAME=y
+CONFIG_CMD_DIRNAME=y
 CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_IOMEM=y
-CONFIG_CMD_FLASH=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
 CONFIG_CMD_BOOTM_SHOW_TYPE=y
 CONFIG_CMD_BOOTM_VERBOSE=y
 CONFIG_CMD_BOOTM_INITRD=y
@@ -47,16 +50,15 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_UNCOMPRESS=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
-CONFIG_NET_NFS=y
 CONFIG_NET_PING=y
-CONFIG_NET_TFTP=y
-CONFIG_NET_TFTP_PUSH=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
 CONFIG_MCI=y
 CONFIG_MCI_STARTUP=y
 CONFIG_MCI_IMX_ESDHC=y
+CONFIG_FS_TFTP=y
+CONFIG_FS_NFS=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b77245..49173e4 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -444,6 +444,7 @@ config MACH_FREESCALE_MX53_SMD
 	bool "Freescale i.MX53 SMD"
 
 config MACH_TQMA53
+	select HAVE_DEFAULT_ENVIRONMENT_NEW
 	bool "TQ i.MX53 TQMA53"
 
 config MACH_TQMA53_1GB_RAM
-- 
1.7.10



From s.hauer at pengutronix.de  Wed Jul  4 02:51:01 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 4 Jul 2012 08:51:01 +0200
Subject: [PATCH] Avoid SDRAM access crash
In-Reply-To: <4FF2D611.2040207@scheftech.com>
References: <1341249753-5480-1-git-send-email-steve@scheftech.com>
 <20120703073605.GT2698@pengutronix.de>
 <4FF2D611.2040207@scheftech.com>
Message-ID: <20120704065101.GD2698@pengutronix.de>

On Tue, Jul 03, 2012 at 07:22:57AM -0400, Steve Schefter wrote:
> Hi Sascha.
> 
> >I wonder why this has never hit me. On what hardware did you see this?
> 
> Me too.  All I can say is that the timing is tight.  I see crashes
> at various DRAM addresses, all depending on how much was left in
> cache when the tlb invalidate was done.
> 
> I'm using the Phytec phyCORE-OMAP44xx card.
> 
> >Does the following patch solve your problem aswell?
> 
> It does.  I see that routine contains a cache flush as well.

Ok, thanks for testing. I applied my version because it flushes only
the relevant parts of the cache and looks more like C ;)

Sascha

> 
> Regards,
> 	Steve
> 
> >
> >8<----------------------------------------------------
> >
> >ARM mmu: flush page tables in arm_mmu_remap_sdram()
> >
> >Signed-off-by: Sascha Hauer<s.hauer at pengutronix.de>
> >---
> >  arch/arm/cpu/mmu.c |    5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> >diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
> >index 55b07a4..607f357 100644
> >--- a/arch/arm/cpu/mmu.c
> >+++ b/arch/arm/cpu/mmu.c
> >@@ -147,7 +147,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
> >  	if ((phys&  (SZ_1M - 1)) || (bank->size&  (SZ_1M - 1)))
> >  		return -EINVAL;
> >
> >-	ptes = memalign(0x400, num_ptes * sizeof(u32));
> >+	ptes = memalign(PAGE_SIZE, num_ptes * sizeof(u32));
> >
> >  	debug("ptes: 0x%p ttb_start: 0x%08lx ttb_end: 0x%08lx\n",
> >  			ptes, ttb_start, ttb_end);
> >@@ -165,6 +165,9 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
> >  		pte += 256;
> >  	}
> >
> >+	dma_flush_range((unsigned long)ttb, (unsigned long)ttb + 0x4000);
> >+	dma_flush_range((unsigned long)ptes, num_ptes * sizeof(u32));
> >+
> >  	tlb_invalidate();
> >
> >  	return 0;
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul  4 02:51:22 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 4 Jul 2012 08:51:22 +0200
Subject: [PATCH 0/2] Very minimal support S5PV210 board (Tiny210)
In-Reply-To: <1341244420-15338-1-git-send-email-agalakhov@gmail.com>
References: <1341244420-15338-1-git-send-email-agalakhov@gmail.com>
Message-ID: <20120704065122.GE2698@pengutronix.de>

On Mon, Jul 02, 2012 at 09:53:38PM +0600, Alexey Galakhov wrote:
> This is the revised versions of patches appeared on the list some time ago.
> It supports very minimal subset of Tiny210 functions. It is currently
> bootable from SD card only.

Applied, thanks

Sascha

> 
> Alexey Galakhov (2):
>   S5P DRAM support
>   Add FriendlyArm Tiny210 board (S5PV210)
> 
>  arch/arm/Makefile                                 |    1 +
>  arch/arm/boards/tiny210/Makefile                  |    1 +
>  arch/arm/boards/tiny210/config.h                  |   19 ++
>  arch/arm/boards/tiny210/lowlevel.c                |   72 +++++
>  arch/arm/boards/tiny210/tiny210.c                 |  113 ++++++++
>  arch/arm/configs/tiny210_defconfig                |   17 ++
>  arch/arm/mach-samsung/Kconfig                     |   20 +-
>  arch/arm/mach-samsung/Makefile                    |    2 +-
>  arch/arm/mach-samsung/include/mach/s3c-generic.h  |    6 +
>  arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h |    3 +
>  arch/arm/mach-samsung/mem-s5pcxx.c                |  320 +++++++++++++++++++++
>  11 files changed, 567 insertions(+), 7 deletions(-)
>  create mode 100644 arch/arm/boards/tiny210/Makefile
>  create mode 100644 arch/arm/boards/tiny210/config.h
>  create mode 100644 arch/arm/boards/tiny210/lowlevel.c
>  create mode 100644 arch/arm/boards/tiny210/tiny210.c
>  create mode 100644 arch/arm/configs/tiny210_defconfig
>  create mode 100644 arch/arm/mach-samsung/mem-s5pcxx.c
> 
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul  4 03:13:47 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 4 Jul 2012 09:13:47 +0200
Subject: [PATCH] scripts/mkublheader: add program to produce an UBL image
 header
In-Reply-To: <1340895137-19689-1-git-send-email-jlu@pengutronix.de>
References: <1340895137-19689-1-git-send-email-jlu@pengutronix.de>
Message-ID: <20120704071347.GK2698@pengutronix.de>

On Thu, Jun 28, 2012 at 04:52:17PM +0200, Jan Luebbe wrote:
> This image header is used for booting from SPI using the TI User
> Boot Loader (UBL).
> 
> Signed-off-by: Jan Luebbe <jlu at pengutronix.de>

Applied, thanks

Sascha

> ---
>  .gitignore            |    1 +
>  arch/arm/Makefile     |    9 +++++
>  scripts/.gitignore    |    5 ++-
>  scripts/Makefile      |    1 +
>  scripts/mkublheader.c |   99 +++++++++++++++++++++++++++++++++++++++++++++++++
>  5 files changed, 113 insertions(+), 2 deletions(-)
>  create mode 100644 scripts/mkublheader.c
> 
> diff --git a/.gitignore b/.gitignore
> index df0ed2c..c75b9ce 100644
> --- a/.gitignore
> +++ b/.gitignore
> @@ -34,6 +34,7 @@ barebox.bin
>  barebox.srec
>  barebox.netx
>  barebox.s5p
> +barebox.ubl
>  barebox.map
>  System.map
>  Module.symvers
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index bd684dc..53fbd0c 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -183,6 +183,15 @@ ifeq ($(CONFIG_OMAP_BUILD_IFT),y)
>  KBUILD_IMAGE := MLO
>  endif
>  
> +barebox.ubl: barebox.bin
> +	@echo "  UBL    " $@
> +	$(Q)scripts/mkublheader barebox.bin > barebox.ubl
> +	$(Q)cat barebox.bin >> barebox.ubl
> +
> +ifeq ($(CONFIG_ARCH_DAVINCI),y)
> +KBUILD_IMAGE := barebox.ubl
> +endif
> +
>  all: $(KBUILD_IMAGE)
>  
>  archprepare: maketools
> diff --git a/scripts/.gitignore b/scripts/.gitignore
> index 11fd2df..6e63f85 100644
> --- a/scripts/.gitignore
> +++ b/scripts/.gitignore
> @@ -1,6 +1,7 @@
>  bareboxenv
>  bin2c
> -mkimage
> -kallsyms
>  gen_netx_image
> +kallsyms
> +mkimage
> +mkublheader
>  omap_signGP
> diff --git a/scripts/Makefile b/scripts/Makefile
> index 784d205..7ca5e29 100644
> --- a/scripts/Makefile
> +++ b/scripts/Makefile
> @@ -11,6 +11,7 @@ hostprogs-y                      += bareboxenv
>  hostprogs-$(CONFIG_ARCH_NETX)    += gen_netx_image
>  hostprogs-$(CONFIG_ARCH_OMAP)    += omap_signGP
>  hostprogs-$(CONFIG_ARCH_S5PCxx)  += s5p_cksum
> +hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader
>  
>  always		:= $(hostprogs-y) $(hostprogs-m)
>  
> diff --git a/scripts/mkublheader.c b/scripts/mkublheader.c
> new file mode 100644
> index 0000000..b61630a
> --- /dev/null
> +++ b/scripts/mkublheader.c
> @@ -0,0 +1,99 @@
> +/*
> + * mkublheader.c - produce the header needed to load barebox on OMAP-L138
> + *
> + * Copyright (C) 2012 Jan Luebbe <j.luebbe at pengutronix.de>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, write to the Free Software Foundation, Inc.,
> + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
> + */
> +
> +#define _BSD_SOURCE
> +
> +#include <stdio.h>
> +#include <sys/types.h>
> +#include <sys/stat.h>
> +#include <fcntl.h>
> +#include <unistd.h>
> +#include <stdint.h>
> +#include <limits.h>
> +#include <errno.h>
> +#include <stdlib.h>
> +#include <string.h>
> +#include <getopt.h>
> +#include <endian.h>
> +
> +#define MAGICNUM 0xa1aced00
> +
> +struct ubl_header
> +{
> +  uint32_t magicNum; /* Expected magic number */
> +  uint32_t epAddr;   /* Entry point of the user application */
> +  uint32_t imgSize;  /* Number of bytes of the application image */
> +  uint32_t imgAddr;  /* SPI memory offset where application image is located */
> +  uint32_t ldAddr;   /* Address where image is copied to */
> +};
> +
> +void usage(char *prgname)
> +{
> +	printf( "Usage : %s [OPTION] FILE > HEADER\n"
> +		"\n"
> +		"options:\n"
> +		"  -a <address> image flash address\n"
> +		"  -e <address> entry point memory address\n"
> +		"  -l <address> load memory address\n",
> +		prgname);
> +}
> +
> +int main(int argc, char *argv[])
> +{
> +	struct stat sb;
> +	struct ubl_header uh;
> +	int opt;
> +	uint32_t imgAddr = 0x00040000 + sizeof(uh);
> +	uint32_t epAddr = 0xc1080000, ldAddr = 0xc1080000;
> +
> +	while((opt = getopt(argc, argv, "ael:")) != -1) {
> +		switch (opt) {
> +		case 'a':
> +			imgAddr = strtoul(optarg, NULL, 0);
> +			break;
> +		case 'e':
> +			epAddr = strtoul(optarg, NULL, 0);
> +			break;
> +		case 'l':
> +			ldAddr = strtoul(optarg, NULL, 0);
> +			break;
> +		}
> +	}
> +
> +	if (optind >= argc) {
> +		usage(argv[0]);
> +		exit(1);
> +	}
> +
> +	if (stat(argv[optind], &sb) == -1) {
> +		perror("stat");
> +		exit(EXIT_FAILURE);
> +	}
> +
> +	uh.magicNum = htole32(MAGICNUM);
> +	uh.epAddr = htole32(epAddr);
> +	uh.imgSize = htole32((uint32_t)sb.st_size);
> +	uh.imgAddr = htole32(imgAddr);
> +	uh.ldAddr = htole32(ldAddr);
> +
> +	fwrite(&uh, sizeof(uh), 1, stdout);
> +
> +	exit(EXIT_SUCCESS);
> +}
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul  4 03:15:43 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 4 Jul 2012 09:15:43 +0200
Subject: [PATCH] ARM mxs: Clear USB boot mode during startup
In-Reply-To: <1340974442-1687-1-git-send-email-s.hauer@pengutronix.de>
References: <1340974442-1687-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120704071543.GL2698@pengutronix.de>

On Fri, Jun 29, 2012 at 02:54:02PM +0200, Sascha Hauer wrote:
> When the i.MX28 boots from USB, the ROM code sets this bit. When
> after a reset the ROM code detects that this bit is set it will
> boot from USB again. This means that if we boot once from USB the
> chip will continue to boot from USB until the next power cycle.
> 
> To prevent this (and boot from the configured bootsource instead)
> clear this bit here. This bit is not documented in the datasheets,
> it was figured out the hard way. Whether this is the same on i.MX23
> is currently not known.
> 
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>  arch/arm/mach-mxs/imx.c |   26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/arch/arm/mach-mxs/imx.c b/arch/arm/mach-mxs/imx.c
> index c64f23c..63b8889 100644
> --- a/arch/arm/mach-mxs/imx.c
> +++ b/arch/arm/mach-mxs/imx.c
> @@ -20,6 +20,32 @@
>  #include <common.h>
>  #include <command.h>
>  #include <complete.h>
> +#include <init.h>
> +#include <io.h>
> +#include <mach/imx-regs.h>
> +
> +#define HW_RTC_PERSISTENT1     0x070
> +
> +static int imx_reset_usb_bootstrap(void)
> +{
> +	/*
> +	 * Clear USB boot mode.
> +	 *
> +	 * When the i.MX28 boots from USB, the ROM code sets this bit. When
> +	 * after a reset the ROM code detects that this bit is set it will
> +	 * boot from USB again. This means that if we boot once from USB the
> +	 * chip will continue to boot from USB until the next power cycle.
> +	 *
> +	 * To prevent this (and boot from the configured bootsource instead)
> +	 * clear this bit here. This bit is not documented in the datasheets,

It turned out this bit is indeed documented, but in the boot chapter,
not in the rtc chapter.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From steve at scheftech.com  Wed Jul  4 07:18:20 2012
From: steve at scheftech.com (Steve Schefter)
Date: Wed, 04 Jul 2012 07:18:20 -0400
Subject: [PATCH] Avoid SDRAM access crash
In-Reply-To: <20120704065101.GD2698@pengutronix.de>
References: <1341249753-5480-1-git-send-email-steve@scheftech.com>
 <20120703073605.GT2698@pengutronix.de> <4FF2D611.2040207@scheftech.com>
 <20120704065101.GD2698@pengutronix.de>
Message-ID: <4FF4267C.2080702@scheftech.com>

On 7/4/2012 2:51 AM, Sascha Hauer wrote:
>  I applied my version because it flushes only
> the relevant parts of the cache and looks more like C ;)

That's fine by me.  Thanks Sascha.

Regards,
	Steve


From F.Vanalme at TELEVIC.com  Wed Jul  4 07:53:39 2012
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Wed, 4 Jul 2012 13:53:39 +0200
Subject: starting ethernet switch in SMI mode
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9019FCE5B1DAE@SRV-VS06.TELEVIC.COM>

Hi,

On our board with i.MX27 processor, we have a Micrel 5-port Managed Ethernet switch (ksz8895mq). When starting in normal MII mode, from the Barebox prompt, I can get an IP address by executing the dhcp command.
When I change the switch's mode to SPI (via hardware strapping), I'm not able to get an IP address anymore via DHCP. In this mode, one has to write to a register in the switch to make the switch start. So, within our startup code, I added some code to start the switch. Reading back the register, I see that the bit is set, so I assume the switch sould be running at that moment. However, when executing the dhcp command, I get "phy0: Autonegotiation timeout".
That's strange, because, when I boot to Linux kernel, the kernel starts up without any problem and gets an IP address via DHCP. So in Linux, it's doing OK.
Because it is working in Linux, I'm quite sure the switch was started in a correct way.
I don't understand why Barebox is unable to contact the switch while there's no problem in Linux to do the same. Anyone any idea on this problem ?

Thanks in advance !

Filip

[cid:image003.png at 01CD59EC.6A109D00]

Filip Vanalme

Senior Development Engineer





Tel. +32 51 30.30.45

Fax +32 51 33.18.86

www.televic.com





Televic NV * Leo Bekaertlaan 1 * 8870 Izegem * Belgium
Company number 0402.757.955 * RPR Kortrijk



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From maxime.ripard at free-electrons.com  Wed Jul  4 08:28:57 2012
From: maxime.ripard at free-electrons.com (Maxime Ripard)
Date: Wed, 04 Jul 2012 14:28:57 +0200
Subject: [PATCH 2/2] Add support for the Crystalfontz CFA-10036 board
In-Reply-To: <20120703181204.GX2698@pengutronix.de>
References: <1341238494-30914-1-git-send-email-maxime.ripard@free-electrons.com>
 <1341238494-30914-2-git-send-email-maxime.ripard@free-electrons.com>
 <20120703181204.GX2698@pengutronix.de>
Message-ID: <4FF43709.8000400@free-electrons.com>

Hi Sascha,

Le 03/07/2012 20:12, Sascha Hauer a ?crit :
> Hi Maxime,
> 
> The patch looks good. I can apply it as is if you wish to or wait until
> you had a look at the new defenv.

I began to work on the new defenv. It definitely looks more flexible :)
I'll resend a new version of this patch using it once I'll be done, so I
guess you'll have to wait a little :)

Thanks,
Maxime

> On Mon, Jul 02, 2012 at 04:14:54PM +0200, Maxime Ripard wrote:
>> This patch adds initial support for the CFA-10036 module.
>>
>> The module basically has a iMX28 SoC, plus a micro-SD slot, 3 pins to
>> access the DUART, a USB OTG port, a OLED screen using the Solomon
>> SSD1307 controller over I2C and a 200-pins SODIMM port to plug an
>> expansion board.
>>
>> Support for this board and the additional devices will come
>> eventually.
>>
>> For now, only the DUART and the MMC controller are used.
>>
>> Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
>> Cc: Brian Lilly <brian at crystalfontz.com>
>> ---
>>  arch/arm/Makefile                                |    1 +
>>  arch/arm/boards/crystalfontz-cfa10036/Makefile   |    1 +
>>  arch/arm/boards/crystalfontz-cfa10036/cfa10036.c |  106 ++++++++++++++++++++++
>>  arch/arm/boards/crystalfontz-cfa10036/config.h   |   16 ++++
>>  arch/arm/boards/crystalfontz-cfa10036/env/config |   47 ++++++++++
>>  arch/arm/configs/cfa10036_defconfig              |   40 ++++++++
>>  arch/arm/mach-mxs/Kconfig                        |    7 ++
>>  7 files changed, 218 insertions(+)
>>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/Makefile
>>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
>>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/config.h
>>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/config
>>  create mode 100644 arch/arm/configs/cfa10036_defconfig
>>
>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>> index bd684dc..b8280fe 100644
>> --- a/arch/arm/Makefile
>> +++ b/arch/arm/Makefile
>> @@ -118,6 +118,7 @@ board-$(CONFIG_MACH_MX23EVK)			:= freescale-mx23-evk
>>  board-$(CONFIG_MACH_CHUMBY)			:= chumby_falconwing
>>  board-$(CONFIG_MACH_TX28)			:= karo-tx28
>>  board-$(CONFIG_MACH_MX28EVK)			:= freescale-mx28-evk
>> +board-$(CONFIG_MACH_CFA10036)			:= crystalfontz-cfa10036
>>  board-$(CONFIG_MACH_FREESCALE_MX51_PDK)		:= freescale-mx51-pdk
>>  board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
>>  board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
>> diff --git a/arch/arm/boards/crystalfontz-cfa10036/Makefile b/arch/arm/boards/crystalfontz-cfa10036/Makefile
>> new file mode 100644
>> index 0000000..75f0020
>> --- /dev/null
>> +++ b/arch/arm/boards/crystalfontz-cfa10036/Makefile
>> @@ -0,0 +1 @@
>> +obj-y += cfa10036.o
>> diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
>> new file mode 100644
>> index 0000000..e454afd
>> --- /dev/null
>> +++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
>> @@ -0,0 +1,106 @@
>> +/*
>> + * Copyright (C) 2010 Juergen Beisert, Pengutronix <kernel at pengutronix.de>
>> + * Copyright (C) 2011 Marc Kleine-Budde, Pengutronix <mkl at pengutronix.de>
>> + * Copyright (C) 2011 Wolfram Sang, Pengutronix <w.sang at pengutronix.de>
>> + * Copyright (C) 2012 Maxime Ripard, Free Electrons <maxime.ripard at free-electrons.com>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <common.h>
>> +#include <environment.h>
>> +#include <errno.h>
>> +#include <fec.h>
>> +#include <gpio.h>
>> +#include <init.h>
>> +#include <mci.h>
>> +#include <io.h>
>> +
>> +#include <mach/clock.h>
>> +#include <mach/imx-regs.h>
>> +#include <mach/iomux-imx28.h>
>> +#include <mach/mci.h>
>> +
>> +#include <asm/armlinux.h>
>> +#include <asm/mmu.h>
>> +
>> +#include <mach/fb.h>
>> +
>> +#include <generated/mach-types.h>
>> +
>> +/* setup the CPU card internal signals */
>> +static const uint32_t cfa10036_pads[] = {
>> +	/* duart */
>> +	FUNC(2) | PORTF(3, 2) | VE_3_3V,
>> +	FUNC(2) | PORTF(3, 3) | VE_3_3V,
>> +
>> +	/* mmc0 */
>> +	SSP0_D0 | VE_3_3V | PULLUP(1),
>> +	SSP0_D1 | VE_3_3V | PULLUP(1),
>> +	SSP0_D2 | VE_3_3V | PULLUP(1),
>> +	SSP0_D3 | VE_3_3V | PULLUP(1),
>> +	SSP0_D4 | VE_3_3V | PULLUP(1),
>> +	SSP0_D5 | VE_3_3V | PULLUP(1),
>> +	SSP0_D6 | VE_3_3V | PULLUP(1),
>> +	SSP0_D7 | VE_3_3V | PULLUP(1),
>> +	SSP0_CMD | VE_3_3V | PULLUP(1),
>> +	SSP0_CD | VE_3_3V | PULLUP(1),
>> +	SSP0_SCK | VE_3_3V | BITKEEPER(0),
>> +	/* MCI slot power control 1 = off */
>> +	PWM3_GPIO | VE_3_3V | GPIO_OUT | GPIO_VALUE(0),
>> +};
>> +
>> +static struct mxs_mci_platform_data mci_pdata = {
>> +	.caps = MMC_MODE_8BIT,
>> +	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,	/* fixed to 3.3 V */
>> +	.f_min = 400 * 1000,
>> +	.f_max = 25000000,
>> +};
>> +
>> +static int cfa10036_mem_init(void)
>> +{
>> +	arm_add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024);
>> +
>> +	return 0;
>> +}
>> +mem_initcall(cfa10036_mem_init);
>> +
>> +static int cfa10036_devices_init(void)
>> +{
>> +	int i;
>> +
>> +	/* initizalize muxing */
>> +	for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++)
>> +		imx_gpio_mode(cfa10036_pads[i]);
>> +
>> +	/* enable IOCLK0 to run at the PLL frequency */
>> +	imx_set_ioclk(0, 480000000);
>> +	/* run the SSP unit clock at 100 MHz */
>> +	imx_set_sspclk(0, 100000000, 1);
>> +
>> +	armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100);
>> +	armlinux_set_architecture(MACH_TYPE_CFA10036);
>> +
>> +	add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, 0,
>> +			   IORESOURCE_MEM, &mci_pdata);
>> +
>> +	return 0;
>> +}
>> +device_initcall(cfa10036_devices_init);
>> +
>> +static int cfa10036_console_init(void)
>> +{
>> +	add_generic_device("stm_serial", 0, NULL, IMX_DBGUART_BASE, 8192,
>> +			   IORESOURCE_MEM, NULL);
>> +
>> +	return 0;
>> +}
>> +console_initcall(cfa10036_console_init);
>> diff --git a/arch/arm/boards/crystalfontz-cfa10036/config.h b/arch/arm/boards/crystalfontz-cfa10036/config.h
>> new file mode 100644
>> index 0000000..8f18fda
>> --- /dev/null
>> +++ b/arch/arm/boards/crystalfontz-cfa10036/config.h
>> @@ -0,0 +1,16 @@
>> +/*
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#ifndef _CONFIG_H_
>> +# define _CONFIG_H_
>> +
>> +#endif /* _CONFIG_H_ */
>> diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/config b/arch/arm/boards/crystalfontz-cfa10036/env/config
>> new file mode 100644
>> index 0000000..5d1bd48
>> --- /dev/null
>> +++ b/arch/arm/boards/crystalfontz-cfa10036/env/config
>> @@ -0,0 +1,47 @@
>> +#!/bin/sh
>> +
>> +hostname=cfa10036
>> +#user=
>> +
>> +# use 'dhcp' to do dhcp in barebox and in kernel
>> +# use 'none' if you want to skip kernel ip autoconfiguration
>> +ip=none
>> +
>> +# or set your networking parameters here
>> +#eth0.ipaddr=a.b.c.d
>> +#eth0.netmask=a.b.c.d
>> +#eth0.serverip=a.b.c.d
>> +#eth0.gateway=a.b.c.d
>> +#eth0.ethaddr=de:ad:be:ef:00:00
>> +
>> +# can be either 'tftp', 'nfs', 'nand', 'nor', 'file' or 'disk'
>> +kernel_loc=file
>> +# can be either 'net', 'nand', 'nor', 'file', 'disk' or 'initrd'
>> +rootfs_loc=disk
>> +# can be either 'nand', 'nor', 'nfs', 'tftp', 'disk', 'file' or 'empty'
>> +oftree_loc=file
>> +
>> +# for flash based rootfs: 'jffs2' or 'ubifs'
>> +# in case of disk any regular filesystem like 'ext2', 'ext3', 'reiserfs'
>> +rootfs_type=ext3
>> +# where is the rootfs in case of 'rootfs_loc=disk' (linux name)
>> +rootfs_part_linux_dev=mmcblk0p3
>> +rootfsimage=rootfs-${hostname}.$rootfs_type
>> +
>> +# where is the kernel image in case of 'kernel_loc=disk'
>> +kernel_part=disk0.1
>> +oftree_part=disk0.1
>> +kernel_part_type=fat
>> +kernel_part_type=fat
>> +
>> +kernelimage=zImage-$hostname
>> +oftreeimage=oftree-$hostname
>> +
>> +bareboxenvimage=barebox-${hostname}.bin
>> +
>> +autoboot_timeout=3
>> +
>> +bootargs="console=ttyAMA0,115200"
>> +
>> +# set a fancy prompt (if support is compiled in)
>> +PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
>> diff --git a/arch/arm/configs/cfa10036_defconfig b/arch/arm/configs/cfa10036_defconfig
>> new file mode 100644
>> index 0000000..4c35c6b
>> --- /dev/null
>> +++ b/arch/arm/configs/cfa10036_defconfig
>> @@ -0,0 +1,40 @@
>> +CONFIG_ARCH_MXS=y
>> +CONFIG_ARCH_IMX28=y
>> +CONFIG_MACH_CFA10036=y
>> +CONFIG_AEABI=y
>> +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
>> +CONFIG_MMU=y
>> +CONFIG_TEXT_BASE=0x43000000
>> +CONFIG_MALLOC_SIZE=0x800000
>> +CONFIG_BROKEN=y
>> +CONFIG_LONGHELP=y
>> +CONFIG_GLOB=y
>> +CONFIG_HUSH_FANCY_PROMPT=y
>> +CONFIG_CMDLINE_EDITING=y
>> +CONFIG_AUTO_COMPLETE=y
>> +CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
>> +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/crystalfontz-cfa10036/env"
>> +CONFIG_DEBUG_INFO=y
>> +CONFIG_CMD_EDIT=y
>> +CONFIG_CMD_SLEEP=y
>> +CONFIG_CMD_SAVEENV=y
>> +CONFIG_CMD_EXPORT=y
>> +CONFIG_CMD_PRINTENV=y
>> +CONFIG_CMD_READLINE=y
>> +CONFIG_CMD_ECHO_E=y
>> +CONFIG_CMD_MTEST=y
>> +CONFIG_CMD_MTEST_ALTERNATIVE=y
>> +CONFIG_CMD_BOOTM_SHOW_TYPE=y
>> +CONFIG_CMD_BOOTM_OFTREE=y
>> +CONFIG_CMD_RESET=y
>> +CONFIG_CMD_GO=y
>> +CONFIG_CMD_OFTREE=y
>> +CONFIG_CMD_TIMEOUT=y
>> +CONFIG_CMD_PARTITION=y
>> +CONFIG_CMD_GPIO=y
>> +# CONFIG_SPI is not set
>> +CONFIG_MCI=y
>> +CONFIG_MCI_STARTUP=y
>> +CONFIG_MCI_MXS=y
>> +CONFIG_FS_FAT=y
>> +CONFIG_FS_FAT_LFN=y
>> diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
>> index 3348a3c..7502a01 100644
>> --- a/arch/arm/mach-mxs/Kconfig
>> +++ b/arch/arm/mach-mxs/Kconfig
>> @@ -6,12 +6,14 @@ config ARCH_TEXT_BASE
>>  	default 0x42000000 if MACH_CHUMBY
>>  	default 0x47000000 if MACH_TX28
>>  	default 0x47000000 if MACH_MX28EVK
>> +	default 0x47000000 if MACH_CFA10036
>>  
>>  config BOARDINFO
>>  	default "Freescale i.MX23-EVK" if MACH_MX23EVK
>>  	default "Chumby Falconwing" if MACH_CHUMBY
>>  	default "Karo TX28" if MACH_TX28
>>  	default "Freescale i.MX28-EVK" if MACH_MX28EVK
>> +	default "Crystalfontz CFA-10036" if MACH_CFA10036
>>  
>>  comment "Freescale i.MX System-on-Chip"
>>  
>> @@ -64,6 +66,11 @@ config MACH_MX28EVK
>>  	help
>>  	  Say Y here if you are using the Freescale i.MX28-EVK board
>>  
>> +config MACH_CFA10036
>> +	bool "cfa-10036"
>> +	help
>> +	  Say Y here if you are using the Crystalfontz CFA-10036 module
>> +
>>  endchoice
>>  
>>  endif
>> -- 
>> 1.7.9.5
>>
>>
>> _______________________________________________
>> barebox mailing list
>> barebox at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox
>>
> 


-- 
Maxime Ripard, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com




From maxime.ripard at free-electrons.com  Wed Jul  4 09:07:51 2012
From: maxime.ripard at free-electrons.com (Maxime Ripard)
Date: Wed,  4 Jul 2012 15:07:51 +0200
Subject: [PATCHv2 0/2] Add support for the Crystalfontz CFA-10036 module
Message-ID: <1341407274-11848-1-git-send-email-maxime.ripard@free-electrons.com>

Hi everyone,

This is the second version of the initial support of the CFA-10036 module.

The module basically has a iMX28 SoC, plus a micro-SD slot, 3 pins to
access the DUART, a USB OTG port, a OLED screen using the Solomon
SSD1307 controller over I2C and a 200-pins SODIMM port to plug an
expansion board.

Support for this board and the additional devices will come
eventually.

Changes from v1:
  * Switched to the new default environment

Maxime Ripard (2):
  Add bootargs script to boot on ext filesystems
  Add support for the Crystalfontz CFA-10036 board

 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/crystalfontz-cfa10036/Makefile     |    1 +
 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c   |  106 ++++++++++++++++++++
 arch/arm/boards/crystalfontz-cfa10036/config.h     |   16 +++
 .../boards/crystalfontz-cfa10036/env/boot/mmc-ext3 |   10 ++
 .../crystalfontz-cfa10036/env/init/automount       |    9 ++
 .../crystalfontz-cfa10036/env/init/bootargs-base   |    8 ++
 .../boards/crystalfontz-cfa10036/env/init/general  |   12 +++
 .../boards/crystalfontz-cfa10036/env/init/hostname |    8 ++
 arch/arm/configs/cfa10036_defconfig                |   42 ++++++++
 arch/arm/mach-mxs/Kconfig                          |    8 ++
 defaultenv-2/base/bin/bootargs-root-ext            |   12 +++
 12 files changed, 233 insertions(+)
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/Makefile
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/config.h
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/boot/mmc-ext3
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/automount
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/bootargs-base
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/general
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/hostname
 create mode 100644 arch/arm/configs/cfa10036_defconfig
 create mode 100644 defaultenv-2/base/bin/bootargs-root-ext

-- 
1.7.9.5



From maxime.ripard at free-electrons.com  Wed Jul  4 09:07:52 2012
From: maxime.ripard at free-electrons.com (Maxime Ripard)
Date: Wed,  4 Jul 2012 15:07:52 +0200
Subject: [PATCH 1/2] Add bootargs script to boot on ext filesystems
In-Reply-To: <1341407274-11848-1-git-send-email-maxime.ripard@free-electrons.com>
References: <1341407274-11848-1-git-send-email-maxime.ripard@free-electrons.com>
Message-ID: <1341407274-11848-2-git-send-email-maxime.ripard@free-electrons.com>

Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
Cc: Brian Lilly <brian at crystalfontz.com>
---
 defaultenv-2/base/bin/bootargs-root-ext |   12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 defaultenv-2/base/bin/bootargs-root-ext

diff --git a/defaultenv-2/base/bin/bootargs-root-ext b/defaultenv-2/base/bin/bootargs-root-ext
new file mode 100644
index 0000000..45fcd5a
--- /dev/null
+++ b/defaultenv-2/base/bin/bootargs-root-ext
@@ -0,0 +1,12 @@
+#!/bin/sh
+
+while getopt "m:r:" opt; do
+	if [ ${opt} = m ]; then
+		part=${OPTARG}
+	fi
+	if [ ${opt} = r ]; then
+		type=${OPTARG}
+	fi
+done
+
+global.linux.bootargs.root="root=/dev/$part rootfstype=ext$type rootwait"
-- 
1.7.9.5



From maxime.ripard at free-electrons.com  Wed Jul  4 09:07:53 2012
From: maxime.ripard at free-electrons.com (Maxime Ripard)
Date: Wed,  4 Jul 2012 15:07:53 +0200
Subject: [PATCH 2/2] Add support for the Crystalfontz CFA-10036 board
In-Reply-To: <1341407274-11848-1-git-send-email-maxime.ripard@free-electrons.com>
References: <1341407274-11848-1-git-send-email-maxime.ripard@free-electrons.com>
Message-ID: <1341407274-11848-3-git-send-email-maxime.ripard@free-electrons.com>

Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
Cc: Brian Lilly <brian at crystalfontz.com>
---
 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/crystalfontz-cfa10036/Makefile     |    1 +
 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c   |  106 ++++++++++++++++++++
 arch/arm/boards/crystalfontz-cfa10036/config.h     |   16 +++
 .../boards/crystalfontz-cfa10036/env/boot/mmc-ext3 |   10 ++
 .../crystalfontz-cfa10036/env/init/automount       |    9 ++
 .../crystalfontz-cfa10036/env/init/bootargs-base   |    8 ++
 .../boards/crystalfontz-cfa10036/env/init/general  |   12 +++
 .../boards/crystalfontz-cfa10036/env/init/hostname |    8 ++
 arch/arm/configs/cfa10036_defconfig                |   42 ++++++++
 arch/arm/mach-mxs/Kconfig                          |    8 ++
 11 files changed, 221 insertions(+)
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/Makefile
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/config.h
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/boot/mmc-ext3
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/automount
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/bootargs-base
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/general
 create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/hostname
 create mode 100644 arch/arm/configs/cfa10036_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bd684dc..b8280fe 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -118,6 +118,7 @@ board-$(CONFIG_MACH_MX23EVK)			:= freescale-mx23-evk
 board-$(CONFIG_MACH_CHUMBY)			:= chumby_falconwing
 board-$(CONFIG_MACH_TX28)			:= karo-tx28
 board-$(CONFIG_MACH_MX28EVK)			:= freescale-mx28-evk
+board-$(CONFIG_MACH_CFA10036)			:= crystalfontz-cfa10036
 board-$(CONFIG_MACH_FREESCALE_MX51_PDK)		:= freescale-mx51-pdk
 board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
 board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
diff --git a/arch/arm/boards/crystalfontz-cfa10036/Makefile b/arch/arm/boards/crystalfontz-cfa10036/Makefile
new file mode 100644
index 0000000..75f0020
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/Makefile
@@ -0,0 +1 @@
+obj-y += cfa10036.o
diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
new file mode 100644
index 0000000..e454afd
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2010 Juergen Beisert, Pengutronix <kernel at pengutronix.de>
+ * Copyright (C) 2011 Marc Kleine-Budde, Pengutronix <mkl at pengutronix.de>
+ * Copyright (C) 2011 Wolfram Sang, Pengutronix <w.sang at pengutronix.de>
+ * Copyright (C) 2012 Maxime Ripard, Free Electrons <maxime.ripard at free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <environment.h>
+#include <errno.h>
+#include <fec.h>
+#include <gpio.h>
+#include <init.h>
+#include <mci.h>
+#include <io.h>
+
+#include <mach/clock.h>
+#include <mach/imx-regs.h>
+#include <mach/iomux-imx28.h>
+#include <mach/mci.h>
+
+#include <asm/armlinux.h>
+#include <asm/mmu.h>
+
+#include <mach/fb.h>
+
+#include <generated/mach-types.h>
+
+/* setup the CPU card internal signals */
+static const uint32_t cfa10036_pads[] = {
+	/* duart */
+	FUNC(2) | PORTF(3, 2) | VE_3_3V,
+	FUNC(2) | PORTF(3, 3) | VE_3_3V,
+
+	/* mmc0 */
+	SSP0_D0 | VE_3_3V | PULLUP(1),
+	SSP0_D1 | VE_3_3V | PULLUP(1),
+	SSP0_D2 | VE_3_3V | PULLUP(1),
+	SSP0_D3 | VE_3_3V | PULLUP(1),
+	SSP0_D4 | VE_3_3V | PULLUP(1),
+	SSP0_D5 | VE_3_3V | PULLUP(1),
+	SSP0_D6 | VE_3_3V | PULLUP(1),
+	SSP0_D7 | VE_3_3V | PULLUP(1),
+	SSP0_CMD | VE_3_3V | PULLUP(1),
+	SSP0_CD | VE_3_3V | PULLUP(1),
+	SSP0_SCK | VE_3_3V | BITKEEPER(0),
+	/* MCI slot power control 1 = off */
+	PWM3_GPIO | VE_3_3V | GPIO_OUT | GPIO_VALUE(0),
+};
+
+static struct mxs_mci_platform_data mci_pdata = {
+	.caps = MMC_MODE_8BIT,
+	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,	/* fixed to 3.3 V */
+	.f_min = 400 * 1000,
+	.f_max = 25000000,
+};
+
+static int cfa10036_mem_init(void)
+{
+	arm_add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024);
+
+	return 0;
+}
+mem_initcall(cfa10036_mem_init);
+
+static int cfa10036_devices_init(void)
+{
+	int i;
+
+	/* initizalize muxing */
+	for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++)
+		imx_gpio_mode(cfa10036_pads[i]);
+
+	/* enable IOCLK0 to run at the PLL frequency */
+	imx_set_ioclk(0, 480000000);
+	/* run the SSP unit clock at 100 MHz */
+	imx_set_sspclk(0, 100000000, 1);
+
+	armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_CFA10036);
+
+	add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, 0,
+			   IORESOURCE_MEM, &mci_pdata);
+
+	return 0;
+}
+device_initcall(cfa10036_devices_init);
+
+static int cfa10036_console_init(void)
+{
+	add_generic_device("stm_serial", 0, NULL, IMX_DBGUART_BASE, 8192,
+			   IORESOURCE_MEM, NULL);
+
+	return 0;
+}
+console_initcall(cfa10036_console_init);
diff --git a/arch/arm/boards/crystalfontz-cfa10036/config.h b/arch/arm/boards/crystalfontz-cfa10036/config.h
new file mode 100644
index 0000000..8f18fda
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/config.h
@@ -0,0 +1,16 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CONFIG_H_
+# define _CONFIG_H_
+
+#endif /* _CONFIG_H_ */
diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/boot/mmc-ext3 b/arch/arm/boards/crystalfontz-cfa10036/env/boot/mmc-ext3
new file mode 100644
index 0000000..7d7eb50
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/env/boot/mmc-ext3
@@ -0,0 +1,10 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	boot-menu-add-entry "$0" "MMC (ext)"
+	exit
+fi
+
+global.bootm.image="/mnt/disk0.1/zImage-cfa10036"
+global.bootm.oftree="/mnt/disk0.1/oftree-cfa10036"
+bootargs-root-ext -r 3 -m mmcblk0p3
diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/init/automount b/arch/arm/boards/crystalfontz-cfa10036/env/init/automount
new file mode 100644
index 0000000..fe67e55
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/env/init/automount
@@ -0,0 +1,9 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "Automountpoints"
+	exit
+fi
+
+mkdir -p /mnt/disk0.1
+automount -d /mnt/disk0.1 '[ -e /dev/disk0.1 ] && mount /dev/disk0.1 fat /mnt/disk0.1'
diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/init/bootargs-base b/arch/arm/boards/crystalfontz-cfa10036/env/init/bootargs-base
new file mode 100644
index 0000000..4dda550
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/env/init/bootargs-base
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "Base bootargs"
+	exit
+fi
+
+global.linux.bootargs.base="console=ttyAMA0,115200"
diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/init/general b/arch/arm/boards/crystalfontz-cfa10036/env/init/general
new file mode 100644
index 0000000..5cb3a75
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/env/init/general
@@ -0,0 +1,12 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "general config settings"
+	exit
+fi
+
+# timeout in seconds before the default boot entry is started
+global.autoboot_timeout=3
+
+# default boot entry (one of /env/boot/*)
+global.boot.default=mmc-ext3
diff --git a/arch/arm/boards/crystalfontz-cfa10036/env/init/hostname b/arch/arm/boards/crystalfontz-cfa10036/env/init/hostname
new file mode 100644
index 0000000..1dbe346
--- /dev/null
+++ b/arch/arm/boards/crystalfontz-cfa10036/env/init/hostname
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "hostname"
+	exit
+fi
+
+global.hostname=cfa10036
diff --git a/arch/arm/configs/cfa10036_defconfig b/arch/arm/configs/cfa10036_defconfig
new file mode 100644
index 0000000..67a0e8f
--- /dev/null
+++ b/arch/arm/configs/cfa10036_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARCH_MXS=y
+CONFIG_ARCH_IMX28=y
+CONFIG_MACH_CFA10036=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_MMU=y
+CONFIG_TEXT_BASE=0x43000000
+CONFIG_MALLOC_SIZE=0x800000
+CONFIG_BROKEN=y
+CONFIG_LONGHELP=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/crystalfontz-cfa10036/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_GPIO=y
+# CONFIG_SPI is not set
+CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
+CONFIG_MCI_MXS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 3348a3c..aa5f241 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -6,12 +6,14 @@ config ARCH_TEXT_BASE
 	default 0x42000000 if MACH_CHUMBY
 	default 0x47000000 if MACH_TX28
 	default 0x47000000 if MACH_MX28EVK
+	default 0x47000000 if MACH_CFA10036
 
 config BOARDINFO
 	default "Freescale i.MX23-EVK" if MACH_MX23EVK
 	default "Chumby Falconwing" if MACH_CHUMBY
 	default "Karo TX28" if MACH_TX28
 	default "Freescale i.MX28-EVK" if MACH_MX28EVK
+	default "Crystalfontz CFA-10036" if MACH_CFA10036
 
 comment "Freescale i.MX System-on-Chip"
 
@@ -64,6 +66,12 @@ config MACH_MX28EVK
 	help
 	  Say Y here if you are using the Freescale i.MX28-EVK board
 
+config MACH_CFA10036
+	bool "cfa-10036"
+	select HAVE_DEFAULT_ENVIRONMENT_NEW
+	help
+	  Say Y here if you are using the Crystalfontz CFA-10036 module
+
 endchoice
 
 endif
-- 
1.7.9.5



From s.hauer at pengutronix.de  Wed Jul  4 16:23:40 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 4 Jul 2012 22:23:40 +0200
Subject: starting ethernet switch in SMI mode
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9019FCE5B1DAE@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9019FCE5B1DAE@SRV-VS06.TELEVIC.COM>
Message-ID: <20120704202340.GF30009@pengutronix.de>

On Wed, Jul 04, 2012 at 01:53:39PM +0200, Vanalme Filip wrote:
> Hi,
> 
> On our board with i.MX27 processor, we have a Micrel 5-port Managed
> Ethernet switch (ksz8895mq). When starting in normal MII mode, from
> the Barebox prompt, I can get an IP address by executing the dhcp
> command.  When I change the switch's mode to SPI (via hardware
> strapping), I'm not able to get an IP address anymore via DHCP. In
> this mode, one has to write to a register in the switch to make the
> switch start. So, within our startup code, I added some code to start
> the switch. Reading back the register, I see that the bit is set, so I
> assume the switch sould be running at that moment. However, when
> executing the dhcp command, I get "phy0: Autonegotiation timeout".
> That's strange, because, when I boot to Linux kernel, the kernel
> starts up without any problem and gets an IP address via DHCP. So in
> Linux, it's doing OK.  Because it is working in Linux, I'm quite sure
> the switch was started in a correct way.  I don't understand why
> Barebox is unable to contact the switch while there's no problem in
> Linux to do the same. Anyone any idea on this problem ?

Have you tried ignoring the return result from miidev_wait_aneg? I
assume barebox just can't communicate with the phy because the phy is in
SPI mode.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul  4 17:28:45 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 4 Jul 2012 23:28:45 +0200
Subject: [PATCHv2 0/2] Add support for the Crystalfontz CFA-10036 module
In-Reply-To: <1341407274-11848-1-git-send-email-maxime.ripard@free-electrons.com>
References: <1341407274-11848-1-git-send-email-maxime.ripard@free-electrons.com>
Message-ID: <20120704212845.GH30009@pengutronix.de>

On Wed, Jul 04, 2012 at 03:07:51PM +0200, Maxime Ripard wrote:
> Hi everyone,
> 
> This is the second version of the initial support of the CFA-10036 module.
> 
> The module basically has a iMX28 SoC, plus a micro-SD slot, 3 pins to
> access the DUART, a USB OTG port, a OLED screen using the Solomon
> SSD1307 controller over I2C and a 200-pins SODIMM port to plug an
> expansion board.
> 
> Support for this board and the additional devices will come
> eventually.
> 
> Changes from v1:
>   * Switched to the new default environment
> 
> Maxime Ripard (2):
>   Add bootargs script to boot on ext filesystems
>   Add support for the Crystalfontz CFA-10036 board
> 

Applied, thanks

Sascha

>  arch/arm/Makefile                                  |    1 +
>  arch/arm/boards/crystalfontz-cfa10036/Makefile     |    1 +
>  arch/arm/boards/crystalfontz-cfa10036/cfa10036.c   |  106 ++++++++++++++++++++
>  arch/arm/boards/crystalfontz-cfa10036/config.h     |   16 +++
>  .../boards/crystalfontz-cfa10036/env/boot/mmc-ext3 |   10 ++
>  .../crystalfontz-cfa10036/env/init/automount       |    9 ++
>  .../crystalfontz-cfa10036/env/init/bootargs-base   |    8 ++
>  .../boards/crystalfontz-cfa10036/env/init/general  |   12 +++
>  .../boards/crystalfontz-cfa10036/env/init/hostname |    8 ++
>  arch/arm/configs/cfa10036_defconfig                |   42 ++++++++
>  arch/arm/mach-mxs/Kconfig                          |    8 ++
>  defaultenv-2/base/bin/bootargs-root-ext            |   12 +++
>  12 files changed, 233 insertions(+)
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/Makefile
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/cfa10036.c
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/config.h
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/boot/mmc-ext3
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/automount
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/bootargs-base
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/general
>  create mode 100644 arch/arm/boards/crystalfontz-cfa10036/env/init/hostname
>  create mode 100644 arch/arm/configs/cfa10036_defconfig
>  create mode 100644 defaultenv-2/base/bin/bootargs-root-ext
> 
> -- 
> 1.7.9.5
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul  5 03:14:57 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 09:14:57 +0200
Subject: [PATCH] mem md: bail out without arguments
Message-ID: <1341472497-2356-1-git-send-email-s.hauer@pengutronix.de>

Without arguments the 'md' command defaults to show address 0 which
likely results in a NULL pointer exception, so only three keystrokes
are necessary to crash barebox. Show usage instead if 'md' is invoked
without arguments, so that it at least requires an address to be given
to crash barebox. This increases the stability of barebox by 66%. Hurray!

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/mem.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/commands/mem.c b/commands/mem.c
index c1a3a54..5322def 100644
--- a/commands/mem.c
+++ b/commands/mem.c
@@ -180,6 +180,8 @@ static int do_mem_md(int argc, char *argv[])
 		}
 		if (size == ~0)
 			size = 0x100;
+	} else {
+		return COMMAND_ERROR_USAGE;
 	}
 
 	fd = open_and_lseek(filename, mode | O_RDONLY, start);
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 03:18:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 09:18:37 +0200
Subject: [PATCH] defenv-2 updates
Message-ID: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>

Hi all,

The following contains some defenv-2 updates like more usage informations
for the scripts and it makes the boot script a bit more flexible.

Sascha

----------------------------------------------------------------
Sascha Hauer (3):
      hush getopt: shift argv arguments
      defenv-2: Add usage information for bootargs scripts
      defenv-2: improve boot script

 common/Kconfig                             |    1 +
 common/hush.c                              |    5 +++-
 defaultenv-2/base/bin/boot                 |   42 ++++++++++++++++++++++++++--
 defaultenv-2/base/bin/bootargs-root-initrd |    7 ++++-
 defaultenv-2/base/bin/bootargs-root-jffs2  |   16 ++++++++++-
 defaultenv-2/base/bin/bootargs-root-nfs    |    7 ++++-
 defaultenv-2/base/bin/bootargs-root-ubi    |   13 ++++++++-
 7 files changed, 83 insertions(+), 8 deletions(-)


From s.hauer at pengutronix.de  Thu Jul  5 03:18:40 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 09:18:40 +0200
Subject: [PATCH 3/3] defenv-2: improve boot script
In-Reply-To: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
References: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341472720-3248-4-git-send-email-s.hauer@pengutronix.de>

- add usage information
- add option parsing:
  -v verbose
  -v -v more verbose
  -l list b?possible boot sources
  -d dryrun

The dryrun option sets the global variables necessary for booting
but does not actually boot the system. This way it is possible to
make additional adjustments to the boot variables and then invoke
bootm manually.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/Kconfig             |    1 +
 defaultenv-2/base/bin/boot |   42 +++++++++++++++++++++++++++++++++++++++---
 2 files changed, 40 insertions(+), 3 deletions(-)

diff --git a/common/Kconfig b/common/Kconfig
index b776031..763983e 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -508,6 +508,7 @@ config DEFAULT_ENVIRONMENT_GENERIC_NEW
 	select GLOB_SORT
 	select CMD_GLOBAL
 	select CMD_AUTOMOUNT
+	select CMD_BASENAME
 	select FLEXIBLE_BOOTARGS
 	prompt "Generic environment template"
 
diff --git a/defaultenv-2/base/bin/boot b/defaultenv-2/base/bin/boot
index c5ad73d..4ebda3f 100644
--- a/defaultenv-2/base/bin/boot
+++ b/defaultenv-2/base/bin/boot
@@ -1,5 +1,38 @@
 #!/bin/sh
 
+verbose=
+dryrun=
+
+usage="
+$0 [OPTIONS] [source]\n
+ -v  verbose\n
+ -d  dryrun\n
+ -l  list boot sources\n
+ -h  help"
+
+for i in /env/boot/*; do
+	basename $i s
+	sources="$sources$s "
+done
+
+while getopt "vdhl" opt; do
+	if [ ${opt} = v ]; then
+		if [ -n "$verbose" ]; then
+			verbose="-v -v"
+		else
+			verbose="-v"
+		fi
+	elif [ ${opt} = d ]; then
+		dryrun=1
+	elif [ ${opt} = l ]; then
+		echo -e "boot sources:\n$sources"
+		exit 0
+	elif [ ${opt} = h ]; then
+		echo -e "$usage"
+		exit 0
+	fi
+done
+
 if [ $# = 0 ]; then
 	scr="$global.boot.default"
 else
@@ -8,11 +41,14 @@ fi
 
 if [ -n "$scr" ]; then
 	if [ ! -f /env/boot/$scr ]; then
-		echo -e "/env/boot/$scr does not exist.\nValid choices:"
-		ls /env/boot
+		echo -e "/env/boot/$scr does not exist.Valid choices:\n$sources"
 		exit
 	fi
 	/env/boot/$scr
 fi
 
-bootm
+if [ -n "$dryrun" ]; then
+	exit 0
+fi
+
+bootm $verbose
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 03:18:38 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 09:18:38 +0200
Subject: [PATCH 1/3] hush getopt: shift argv arguments
In-Reply-To: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
References: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341472720-3248-2-git-send-email-s.hauer@pengutronix.de>

Make the nonopt arguments to a script available starting from $1
after running getopt. This allows for scripts which use option
parsing but also have nonopts.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/hush.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/common/hush.c b/common/hush.c
index 3ac1d10..8200931 100644
--- a/common/hush.c
+++ b/common/hush.c
@@ -521,6 +521,8 @@ static int builtin_getopt(struct p_context *ctx, struct child_prog *child,
 			o->optarg = xstrdup(optarg);
 			list_add_tail(&o->list, &ctx->options);
 		}
+		ctx->global_argv += optind - 1;
+		ctx->global_argc -= optind - 1;
 	}
 
 	ctx->options_parsed = 1;
@@ -1899,7 +1901,8 @@ static const __maybe_unused char cmd_getopt_help[] =
 "hush option parser. <optstring> is a string with valid options. Add\n"
 "a colon to an options if this option has a required argument or two\n"
 "colons for an optional argument. The current option is saved in <var>,\n"
-"arguments are saved in OPTARG.\n";
+"arguments are saved in OPTARG. After this command additional nonopts\n"
+"can be accessed starting from $1\n";
 
 BAREBOX_CMD_START(getopt)
 	.cmd		= do_getopt,
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 03:18:39 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 09:18:39 +0200
Subject: [PATCH 2/3] defenv-2: Add usage information for bootargs scripts
In-Reply-To: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
References: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341472720-3248-3-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 defaultenv-2/base/bin/bootargs-root-initrd |    7 ++++++-
 defaultenv-2/base/bin/bootargs-root-jffs2  |   16 +++++++++++++++-
 defaultenv-2/base/bin/bootargs-root-nfs    |    7 ++++++-
 defaultenv-2/base/bin/bootargs-root-ubi    |   13 ++++++++++++-
 4 files changed, 39 insertions(+), 4 deletions(-)

diff --git a/defaultenv-2/base/bin/bootargs-root-initrd b/defaultenv-2/base/bin/bootargs-root-initrd
index 4c59625..7072cea 100644
--- a/defaultenv-2/base/bin/bootargs-root-initrd
+++ b/defaultenv-2/base/bin/bootargs-root-initrd
@@ -2,9 +2,14 @@
 
 rdinit="/sbin/init"
 
-while getopt "i:" opt; do
+usage="$0 [OPTIONS]\n -i <rdinitpath> (/sbin/init)"
+
+while getopt "i:h" opt; do
 	if [ ${opt} = i ]; then
 		rdinit=${OPTARG}
+	elif [ ${opt} = h ]; then
+		echo -e "$usage"
+		exit 0
 	fi
 done
 
diff --git a/defaultenv-2/base/bin/bootargs-root-jffs2 b/defaultenv-2/base/bin/bootargs-root-jffs2
index db036da..ac9a4bd 100644
--- a/defaultenv-2/base/bin/bootargs-root-jffs2
+++ b/defaultenv-2/base/bin/bootargs-root-jffs2
@@ -1,9 +1,23 @@
 #!/bin/sh
 
-while getopt "m:" opt; do
+mtd=
+
+usage="$0 [OPTIONS]\n -m <mtd>"
+
+while getopt "m:h" opt; do
 	if [ ${opt} = m ]; then
 		mtd=${OPTARG}
+	elif [ ${opt} = h ]; then
+		echo -e "$usage"
+		exit 0
 	fi
 done
 
+echo "huhu; $1"
+
+if [ -z "$mtd" ]; then
+	echo -e "$usage"
+	exit 1
+fi
+
 global.linux.bootargs.root="root=$mtd rootfstype=jffs2"
diff --git a/defaultenv-2/base/bin/bootargs-root-nfs b/defaultenv-2/base/bin/bootargs-root-nfs
index bf97555..27bb6c4 100644
--- a/defaultenv-2/base/bin/bootargs-root-nfs
+++ b/defaultenv-2/base/bin/bootargs-root-nfs
@@ -1,10 +1,15 @@
 #!/bin/sh
 
-while getopt "n:s:" opt; do
+usage="$0 [OPTIONS]\n -n <nfspath>\n -s <serverip>"
+
+while getopt "n:s:h" opt; do
 	if [ ${opt} = n ]; then
 		nfsroot=${OPTARG}
 	elif [ ${opt} = s ]; then
 		serverip=${OPTARG}
+	elif [ ${opt} = h ]; then
+		echo -e "$usage"
+		exit 0
 	fi
 done
 
diff --git a/defaultenv-2/base/bin/bootargs-root-ubi b/defaultenv-2/base/bin/bootargs-root-ubi
index ef89104..fb7f328 100644
--- a/defaultenv-2/base/bin/bootargs-root-ubi
+++ b/defaultenv-2/base/bin/bootargs-root-ubi
@@ -1,13 +1,24 @@
 #!/bin/sh
 
 ubiroot=root
+mtd=
 
-while getopt "m:r:" opt; do
+usage="$0 [OPTIONS]\n -r <ubiroot> (root)\n -m <mtd>"
+
+while getopt "m:r:h" opt; do
 	if [ ${opt} = r ]; then
 		ubiroot=${OPTARG}
 	elif [ ${opt} = m ]; then
 		mtd=${OPTARG}
+	elif [ ${opt} = h ]; then
+		echo -e "$usage"
+		exit 0
 	fi
 done
 
+if [ -z "$mtd" ]; then
+	echo -e "$usage"
+	exit 1
+fi
+
 global.linux.bootargs.root="root=ubi0:$ubiroot ubi.mtd=$mtd rootfstype=ubifs"
-- 
1.7.10



From eric at eukrea.com  Thu Jul  5 03:22:47 2012
From: eric at eukrea.com (Eric =?ISO-8859-1?B?QuluYXJk?=)
Date: Thu, 5 Jul 2012 09:22:47 +0200
Subject: [PATCH 2/3] defenv-2: Add usage information for bootargs scripts
In-Reply-To: <1341472720-3248-3-git-send-email-s.hauer@pengutronix.de>
References: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
 <1341472720-3248-3-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120705092247.00cebe79@eb-e6520>

Hi Sascha,

Le Thu,  5 Jul 2012 09:18:39 +0200,
Sascha Hauer <s.hauer at pengutronix.de> a ?crit :

> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>  defaultenv-2/base/bin/bootargs-root-initrd |    7 ++++++-
>  defaultenv-2/base/bin/bootargs-root-jffs2  |   16 +++++++++++++++-
>  defaultenv-2/base/bin/bootargs-root-nfs    |    7 ++++++-
>  defaultenv-2/base/bin/bootargs-root-ubi    |   13 ++++++++++++-
>  4 files changed, 39 insertions(+), 4 deletions(-)
> 
> diff --git a/defaultenv-2/base/bin/bootargs-root-initrd b/defaultenv-2/base/bin/bootargs-root-initrd
> index 4c59625..7072cea 100644
> --- a/defaultenv-2/base/bin/bootargs-root-initrd
> +++ b/defaultenv-2/base/bin/bootargs-root-initrd
> @@ -2,9 +2,14 @@
>  
>  rdinit="/sbin/init"
>  
> -while getopt "i:" opt; do
> +usage="$0 [OPTIONS]\n -i <rdinitpath> (/sbin/init)"
> +
> +while getopt "i:h" opt; do
>  	if [ ${opt} = i ]; then
>  		rdinit=${OPTARG}
> +	elif [ ${opt} = h ]; then
> +		echo -e "$usage"
> +		exit 0
>  	fi
>  done
>  
> diff --git a/defaultenv-2/base/bin/bootargs-root-jffs2 b/defaultenv-2/base/bin/bootargs-root-jffs2
> index db036da..ac9a4bd 100644
> --- a/defaultenv-2/base/bin/bootargs-root-jffs2
> +++ b/defaultenv-2/base/bin/bootargs-root-jffs2
> @@ -1,9 +1,23 @@
>  #!/bin/sh
>  
> -while getopt "m:" opt; do
> +mtd=
> +
> +usage="$0 [OPTIONS]\n -m <mtd>"
> +
> +while getopt "m:h" opt; do
>  	if [ ${opt} = m ]; then
>  		mtd=${OPTARG}
> +	elif [ ${opt} = h ]; then
> +		echo -e "$usage"
> +		exit 0
>  	fi
>  done
>  
> +echo "huhu; $1"

is that huhu expected here ? ;-)

Eric


From s.hauer at pengutronix.de  Thu Jul  5 03:35:05 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 5 Jul 2012 09:35:05 +0200
Subject: [PATCH 2/3] defenv-2: Add usage information for bootargs scripts
In-Reply-To: <20120705092247.00cebe79@eb-e6520>
References: <1341472720-3248-1-git-send-email-s.hauer@pengutronix.de>
 <1341472720-3248-3-git-send-email-s.hauer@pengutronix.de>
 <20120705092247.00cebe79@eb-e6520>
Message-ID: <20120705073505.GP30009@pengutronix.de>

Hi Eric,

On Thu, Jul 05, 2012 at 09:22:47AM +0200, Eric B?nard wrote:
> Hi Sascha,
> 
> Le Thu,  5 Jul 2012 09:18:39 +0200,
> Sascha Hauer <s.hauer at pengutronix.de> a ?crit :
> 
> > +while getopt "m:h" opt; do
> >  	if [ ${opt} = m ]; then
> >  		mtd=${OPTARG}
> > +	elif [ ${opt} = h ]; then
> > +		echo -e "$usage"
> > +		exit 0
> >  	fi
> >  done
> >  
> > +echo "huhu; $1"
> 
> is that huhu expected here ? ;-)

Just to check if someone actually reads my patches ;)

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From eric at eukrea.com  Thu Jul  5 06:22:46 2012
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Thu,  5 Jul 2012 12:22:46 +0200
Subject: [PATCH 2/3] nand_base: add ONFI flash detection
In-Reply-To: <1341483767-20487-1-git-send-email-eric@eukrea.com>
References: <1341483767-20487-1-git-send-email-eric@eukrea.com>
Message-ID: <1341483767-20487-2-git-send-email-eric@eukrea.com>

the code is taken from linux & u-boot implementations
Validated on an i.MX53 which gives the following log :
ONFI flash detected ... ONFI param page 0 valid
NAND device: Manufacturer ID: 0x2c, Chip ID: 0x38 (Micron MT29F8G08ABABAWP), page size: 4096, OOB size: 224

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 drivers/mtd/nand/nand_base.c |  174 ++++++++++++++++++++++++++++++++++++------
 include/linux/mtd/mtd-abi.h  |    7 +-
 include/linux/mtd/nand.h     |   74 ++++++++++++++++++-
 3 files changed, 226 insertions(+), 29 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c4eca0d..a5bf757 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1027,6 +1027,108 @@ static void nand_set_defaults(struct nand_chip *chip, int busw)
 }
 
 /*
+ * sanitize ONFI strings so we can safely print them
+ */
+static void sanitize_string(char *s, size_t len)
+{
+	ssize_t i;
+
+	/* null terminate */
+	s[len - 1] = 0;
+
+	/* remove non printable chars */
+	for (i = 0; i < len - 1; i++) {
+		if (s[i] < ' ' || s[i] > 127)
+			s[i] = '?';
+	}
+
+	/* remove trailing spaces */
+	strim(s);
+}
+
+static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
+{
+	int i;
+	while (len--) {
+		crc ^= *p++ << 8;
+		for (i = 0; i < 8; i++)
+			crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
+	}
+
+	return crc;
+}
+
+/*
+ * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise
+ */
+static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
+					int *busw)
+{
+	struct nand_onfi_params *p = &chip->onfi_params;
+	int i;
+	int val;
+
+	/* try ONFI for unknow chip or LP */
+	chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
+	if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
+		chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
+		return 0;
+
+	printk(KERN_INFO "ONFI flash detected ... ");
+	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
+	for (i = 0; i < 3; i++) {
+		chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
+		if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
+				le16_to_cpu(p->crc)) {
+			printk(KERN_INFO "ONFI param page %d valid\n", i);
+			break;
+		}
+	}
+
+	if (i == 3) {
+		printk(KERN_INFO "no valid ONFI param page found\n");
+		return 0;
+	}
+
+	/* check version */
+	val = le16_to_cpu(p->revision);
+	if (val & (1 << 5))
+		chip->onfi_version = 23;
+	else if (val & (1 << 4))
+		chip->onfi_version = 22;
+	else if (val & (1 << 3))
+		chip->onfi_version = 21;
+	else if (val & (1 << 2))
+		chip->onfi_version = 20;
+	else if (val & (1 << 1))
+		chip->onfi_version = 10;
+	else
+		chip->onfi_version = 0;
+
+	if (!chip->onfi_version) {
+		printk(KERN_INFO "unsupported ONFI version: %d\n", val);
+		return 0;
+	}
+
+	sanitize_string(p->manufacturer, sizeof(p->manufacturer));
+	sanitize_string(p->model, sizeof(p->model));
+	if (!mtd->name)
+		mtd->name = p->model;
+	mtd->writesize = le32_to_cpu(p->byte_per_page);
+	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
+	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
+	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
+	*busw = 0;
+	if (le16_to_cpu(p->features) & 1)
+		*busw = NAND_BUSWIDTH_16;
+
+	chip->options &= ~NAND_CHIPOPTIONS_MSK;
+	chip->options |= NAND_NO_READRDY & NAND_CHIPOPTIONS_MSK;
+
+	return 1;
+}
+
+/*
  * Get the flash and manufacturer id and lookup if the type is supported
  */
 static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
@@ -1036,6 +1138,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 	struct nand_flash_dev *type = NULL;
 	int i, dev_id, maf_idx;
 	int tmp_id, tmp_manf;
+	int ret;
 
 	/* Select the device */
 	chip->select_chip(mtd, 0);
@@ -1081,9 +1184,16 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 		}
 	}
 
+	chip->onfi_version = 0;
 	if (!type) {
-		printk(KERN_ERR "NAND type unknown: %02x,%02x\n", *maf_id, dev_id);
-		return ERR_PTR(-ENODEV);
+		/* Check is chip is ONFI compliant */
+		ret = nand_flash_detect_onfi(mtd, chip, &busw);
+		if (ret)
+			goto ident_done;
+		else {
+			printk(KERN_ERR "NAND type unknown: %02x,%02x\n", *maf_id, dev_id);
+			return ERR_PTR(-ENODEV);
+		}
 	}
 
 	if (!mtd->name)
@@ -1126,17 +1236,39 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 			break;
 	}
 
+	/* Get chip options, preserve non chip based options */
+	chip->options &= ~NAND_CHIPOPTIONS_MSK;
+	chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
+
+	/* Check if chip is a not a samsung device. Do not clear the
+	 * options for chips which are not having an extended id.
+	 */
+	if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
+		chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
+
+ident_done:
+	/*
+	 * Set chip as a default. Board drivers can override it, if necessary
+	 */
+	chip->options |= NAND_NO_AUTOINCR;
+
+	/* Try to identify manufacturer */
+	for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
+		if (nand_manuf_ids[maf_idx].id == *maf_id)
+			break;
+	}
+
 	/*
 	 * Check, if buswidth is correct. Hardware drivers should set
 	 * chip correct !
 	 */
 	if (busw != (chip->options & NAND_BUSWIDTH_16)) {
 		printk(KERN_INFO "NAND device: Manufacturer ID:"
-		       " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
-		       dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
+			" 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
+			dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
 		printk(KERN_WARNING "NAND bus width %d instead %d bit\n",
-		       (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
-		       busw ? 16 : 8);
+			(chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
+			busw ? 16 : 8);
 		return ERR_PTR(-EINVAL);
 	}
 
@@ -1147,27 +1279,17 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 
 	chip->bbt_erase_shift = chip->phys_erase_shift =
 		ffs(mtd->erasesize) - 1;
-	chip->chip_shift = ffs(chip->chipsize) - 1;
+	if (chip->chipsize & 0xffffffff)
+		chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
+	else {
+		chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
+		chip->chip_shift += 32 - 1;
+	}
 
 	/* Set the bad block position */
 	chip->badblockpos = mtd->writesize > 512 ?
 		NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
 
-	/* Get chip options, preserve non chip based options */
-	chip->options &= ~NAND_CHIPOPTIONS_MSK;
-	chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
-
-	/*
-	 * Set chip as a default. Board drivers can override it, if necessary
-	 */
-	chip->options |= NAND_NO_AUTOINCR;
-
-	/* Check if chip is a not a samsung device. Do not clear the
-	 * options for chips which are not having an extended id.
-	 */
-	if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
-		chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
-
 #ifdef CONFIG_MTD_WRITE
 	/* Check for AND chips with 4 page planes */
 	if (chip->options & NAND_4PAGE_ARRAY)
@@ -1179,9 +1301,11 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 	if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
 		chip->cmdfunc = nand_command_lp;
 
-	printk(KERN_INFO "NAND device: Manufacturer ID:"
-	       " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id,
-	       nand_manuf_ids[maf_idx].name, type->name);
+	printk("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
+		" page size: %d, OOB size: %d\n",
+		*maf_id, dev_id, nand_manuf_ids[maf_idx].name,
+		chip->onfi_version ? chip->onfi_params.model : type->name,
+		mtd->writesize, mtd->oobsize);
 
 	return type;
 }
diff --git a/include/linux/mtd/mtd-abi.h b/include/linux/mtd/mtd-abi.h
index 33e1fe2..90dee7e 100644
--- a/include/linux/mtd/mtd-abi.h
+++ b/include/linux/mtd/mtd-abi.h
@@ -115,16 +115,17 @@ struct nand_oobfree {
 	uint32_t length;
 };
 
-#define MTD_MAX_OOBFREE_ENTRIES	8
+#define MTD_MAX_OOBFREE_ENTRIES_LARGE  32
+#define MTD_MAX_ECCPOS_ENTRIES_LARGE   128 /* FIXME : understand why 448 is not working */
 /*
  * ECC layout control structure. Exported to userspace for
  * diagnosis and to allow creation of raw images
  */
 struct nand_ecclayout {
 	uint32_t eccbytes;
-	uint32_t eccpos[64];
+	uint32_t eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE];
 	uint32_t oobavail;
-	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
+	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE];
 };
 
 /**
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 2a1c4ff..4a492b5 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -80,6 +80,7 @@ extern void nand_wait_ready(struct mtd_info *mtd);
 #define NAND_CMD_RNDIN		0x85
 #define NAND_CMD_READID		0x90
 #define NAND_CMD_ERASE2		0xd0
+#define NAND_CMD_PARAM		0xec
 #define NAND_CMD_RESET		0xff
 
 /* Extended commands for large page devices */
@@ -217,6 +218,70 @@ typedef enum {
 /* Keep gcc happy */
 struct nand_chip;
 
+struct nand_onfi_params {
+	/* rev info and features block */
+	/* 'O' 'N' 'F' 'I'  */
+	u8 sig[4];
+	__le16 revision;
+	__le16 features;
+	__le16 opt_cmd;
+	u8 reserved[22];
+
+	/* manufacturer information block */
+	char manufacturer[12];
+	char model[20];
+	u8 jedec_id;
+	__le16 date_code;
+	u8 reserved2[13];
+
+	/* memory organization block */
+	__le32 byte_per_page;
+	__le16 spare_bytes_per_page;
+	__le32 data_bytes_per_ppage;
+	__le16 spare_bytes_per_ppage;
+	__le32 pages_per_block;
+	__le32 blocks_per_lun;
+	u8 lun_count;
+	u8 addr_cycles;
+	u8 bits_per_cell;
+	__le16 bb_per_lun;
+	__le16 block_endurance;
+	u8 guaranteed_good_blocks;
+	__le16 guaranteed_block_endurance;
+	u8 programs_per_page;
+	u8 ppage_attr;
+	u8 ecc_bits;
+	u8 interleaved_bits;
+	u8 interleaved_ops;
+	u8 reserved3[13];
+
+	/* electrical parameter block */
+	u8 io_pin_capacitance_max;
+	__le16 async_timing_mode;
+	__le16 program_cache_timing_mode;
+	__le16 t_prog;
+	__le16 t_bers;
+	__le16 t_r;
+	__le16 t_ccs;
+	__le16 src_sync_timing_mode;
+	__le16 src_ssync_features;
+	__le16 clk_pin_capacitance_typ;
+	__le16 io_pin_capacitance_typ;
+	__le16 input_pin_capacitance_typ;
+	u8 input_pin_capacitance_max;
+	u8 driver_strenght_support;
+	__le16 t_int_r;
+	__le16 t_ald;
+	u8 reserved4[7];
+
+	/* vendor */
+	u8 reserved5[90];
+
+	__le16 crc;
+} __attribute__((packed));
+
+#define ONFI_CRC_BASE	0x4F4E
+
 /**
  * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
  * @lock:               protection lock
@@ -347,6 +412,10 @@ struct nand_buffers {
  * @pagemask:		[INTERN] page number mask = number of (pages / chip) - 1
  * @pagebuf:		[INTERN] holds the pagenumber which is currently in data_buf
  * @subpagesize:	[INTERN] holds the subpagesize
+ * @onfi_version:	[INTERN] holds the chip ONFI version (BCD encoded),
+ *			non 0 if ONFI supported.
+ * @onfi_params:	[INTERN] holds the ONFI page parameter when ONFI is
+ *			supported, 0 otherwise.
  * @ecclayout:		[REPLACEABLE] the default ecc placement scheme
  * @bbt:		[INTERN] bad block table pointer
  * @bbt_td:		[REPLACEABLE] bad block table descriptor for flash lookup
@@ -391,13 +460,16 @@ struct nand_chip {
 	int		bbt_erase_shift;
 	int		chip_shift;
 	int		numchips;
-	unsigned long	chipsize;
+	uint64_t	chipsize;
 	int		pagemask;
 	int		pagebuf;
 	int		subpagesize;
 	uint8_t		cellinfo;
 	int		badblockpos;
 
+	int onfi_version;
+	struct nand_onfi_params onfi_params;
+
 	nand_state_t	state;
 
 	uint8_t		*oob_poi;
-- 
1.7.7.6



From eric at eukrea.com  Thu Jul  5 06:22:45 2012
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Thu,  5 Jul 2012 12:22:45 +0200
Subject: [PATCH 1/3] string: add strim for ONFI code
Message-ID: <1341483767-20487-1-git-send-email-eric@eukrea.com>

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 include/linux/string.h |    3 +++
 lib/string.c           |   39 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 0 deletions(-)

diff --git a/include/linux/string.h b/include/linux/string.h
index 62d743e..afd0aa6 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -93,6 +93,9 @@ extern int memcmp(const void *,const void *,__kernel_size_t);
 #ifndef __HAVE_ARCH_MEMCHR
 extern void * memchr(const void *,int,__kernel_size_t);
 #endif
+extern char * skip_spaces(const char *);
+
+extern char *strim(char *);
 
 #ifdef __cplusplus
 }
diff --git a/lib/string.c b/lib/string.c
index 2865088..db4f2ae 100644
--- a/lib/string.c
+++ b/lib/string.c
@@ -567,3 +567,42 @@ void *memchr(const void *s, int c, size_t n)
 #endif
 EXPORT_SYMBOL(memchr);
 
+/**
+ * skip_spaces - Removes leading whitespace from @str.
+ * @str: The string to be stripped.
+ *
+ * Returns a pointer to the first non-whitespace character in @str.
+ */
+char *skip_spaces(const char *str)
+{
+	while (isspace(*str))
+		++str;
+	return (char *)str;
+}
+
+/**
+ * strim - Removes leading and trailing whitespace from @s.
+ * @s: The string to be stripped.
+ *
+ * Note that the first trailing whitespace is replaced with a %NUL-terminator
+ * in the given string @s. Returns a pointer to the first non-whitespace
+ * character in @s.
+ */
+char *strim(char *s)
+{
+	size_t size;
+	char *end;
+
+	s = skip_spaces(s);
+	size = strlen(s);
+	if (!size)
+		return s;
+
+	end = s + size - 1;
+	while (end >= s && isspace(*end))
+		end--;
+	*(end + 1) = '\0';
+
+	return s;
+}
+EXPORT_SYMBOL(strim);
-- 
1.7.7.6



From eric at eukrea.com  Thu Jul  5 06:22:47 2012
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Thu,  5 Jul 2012 12:22:47 +0200
Subject: [PATCH 3/3] nand_imx: update to support onfi & 4k flashs
In-Reply-To: <1341483767-20487-1-git-send-email-eric@eukrea.com>
References: <1341483767-20487-1-git-send-email-eric@eukrea.com>
Message-ID: <1341483767-20487-3-git-send-email-eric@eukrea.com>

- add CMD_PARAM and read_param to get the ONFI structure
- fix OOB size for flash with 224 OOB on i.MX51/3
- add the same ecc layout as the one in the kernel for
  4k page flashs

Tested on an i.MX53.

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 drivers/mtd/nand/nand_imx.c |   98 ++++++++++++++++++++++++++++++++++++++++--
 1 files changed, 93 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c
index e75ffbc..83b49e3 100644
--- a/drivers/mtd/nand/nand_imx.c
+++ b/drivers/mtd/nand/nand_imx.c
@@ -106,6 +106,7 @@ struct imx_nand_host {
 	void			(*send_addr)(struct imx_nand_host *, uint16_t);
 	void			(*send_page)(struct imx_nand_host *, unsigned int);
 	void			(*send_read_id)(struct imx_nand_host *);
+	void			(*send_read_param)(struct imx_nand_host *);
 	uint16_t		(*get_dev_status)(struct imx_nand_host *);
 	int			(*check_int)(struct imx_nand_host *);
 };
@@ -154,6 +155,31 @@ static struct nand_ecclayout nandv2_hw_eccoob_largepage = {
 	}
 };
 
+/* OOB description for 4096 byte pages with 128 byte OOB */
+static struct nand_ecclayout nandv2_hw_eccoob_4k = {
+	.eccbytes = 8 * 9,
+	.eccpos = {
+		7,  8,  9, 10, 11, 12, 13, 14, 15,
+		23, 24, 25, 26, 27, 28, 29, 30, 31,
+		39, 40, 41, 42, 43, 44, 45, 46, 47,
+		55, 56, 57, 58, 59, 60, 61, 62, 63,
+		71, 72, 73, 74, 75, 76, 77, 78, 79,
+		87, 88, 89, 90, 91, 92, 93, 94, 95,
+		103, 104, 105, 106, 107, 108, 109, 110, 111,
+		119, 120, 121, 122, 123, 124, 125, 126, 127,
+	},
+	.oobfree = {
+		{.offset = 2, .length = 4},
+		{.offset = 16, .length = 7},
+		{.offset = 32, .length = 7},
+		{.offset = 48, .length = 7},
+		{.offset = 64, .length = 7},
+		{.offset = 80, .length = 7},
+		{.offset = 96, .length = 7},
+		{.offset = 112, .length = 7},
+	}
+};
+
 static void memcpy32(void *trg, const void *src, int size)
 {
 	int i;
@@ -335,6 +361,16 @@ static void send_read_id_v3(struct imx_nand_host *host)
 	memcpy(host->data_buf, host->main_area0, 16);
 }
 
+static void send_read_param_v3(struct imx_nand_host *host)
+{
+	/* Read ID into main buffer */
+	writel(NFC_OUTPUT, NFC_V3_LAUNCH);
+
+	wait_op_done(host);
+
+	memcpy(host->data_buf, host->main_area0, 1024);
+}
+
 static void send_read_id_v1_v2(struct imx_nand_host *host)
 {
 	struct nand_chip *this = &host->nand;
@@ -363,6 +399,34 @@ static void send_read_id_v1_v2(struct imx_nand_host *host)
 	memcpy32(host->data_buf, host->main_area0, 16);
 }
 
+/* FIXME : to check on real HW */
+static void send_read_param_v1_v2(struct imx_nand_host *host)
+{
+	struct nand_chip *this = &host->nand;
+
+	/* NANDFC buffer 0 is used for device ID output */
+	writew(0x0, host->regs + NFC_V1_V2_BUF_ADDR);
+
+	writew(NFC_OUTPUT, host->regs + NFC_V1_V2_CONFIG2);
+
+	/* Wait for operation to complete */
+	wait_op_done(host);
+
+	if (this->options & NAND_BUSWIDTH_16) {
+		volatile u16 *mainbuf = host->main_area0;
+
+		/*
+		 * Pack the every-other-byte result for 16-bit ID reads
+		 * into every-byte as the generic code expects and various
+		 * chips implement.
+		 */
+
+		mainbuf[0] = (mainbuf[0] & 0xff) | ((mainbuf[1] & 0xff) << 8);
+		mainbuf[1] = (mainbuf[2] & 0xff) | ((mainbuf[3] & 0xff) << 8);
+		mainbuf[2] = (mainbuf[4] & 0xff) | ((mainbuf[5] & 0xff) << 8);
+	}
+	memcpy32(host->data_buf, host->main_area0, 1024);
+}
 /*
  * This function requests the NANDFC to perform a read of the
  * NAND device status and returns the current status.
@@ -579,6 +643,10 @@ static void imx_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len)
 
 	n = min(n, len);
 
+	/* handle the read param special case */
+	if ((mtd->writesize == 0) && (len != 0))
+		n = len;
+
 	memcpy(buf, host->data_buf + col, n);
 
 	host->buf_start += n;
@@ -677,8 +745,11 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
 		 * layers perform a read/write buf operation,
 		 * we will used the saved column adress to index into
 		 * the full page.
+		 *
+		 * The colum address must be sent to the flash in
+		 * order to get the ONFI header (0x20)
 		 */
-		host->send_addr(host, 0);
+		host->send_addr(host, column);
 		if (host->pagesize_2k)
 			/* another col addr cycle for 2k page */
 			host->send_addr(host, 0);
@@ -790,9 +861,11 @@ static void preset_v3(struct mtd_info *mtd)
 
 	writel(0, NFC_V3_IPC);
 
+	/* if the flash has a 224 oob, the NFC must be configured to 218 */
 	config2 = NFC_V3_CONFIG2_ONE_CYCLE |
 		NFC_V3_CONFIG2_2CMD_PHASES |
-		NFC_V3_CONFIG2_SPAS(mtd->oobsize >> 1) |
+		NFC_V3_CONFIG2_SPAS(((mtd->oobsize > 218) ?
+			218 : mtd->oobsize) >> 1) |
 		NFC_V3_CONFIG2_ST_CMD(0x70) |
 		NFC_V3_CONFIG2_NUM_ADDR_PHASE0;
 
@@ -944,8 +1017,15 @@ static void imx_nand_command(struct mtd_info *mtd, unsigned command,
 	case NAND_CMD_READID:
 		host->send_cmd(host, command);
 		mxc_do_addr_cycle(mtd, column, page_addr);
-		host->buf_start = 0;
 		host->send_read_id(host);
+		host->buf_start = 0;
+		break;
+
+	case NAND_CMD_PARAM:
+		host->send_cmd(host, command);
+		mxc_do_addr_cycle(mtd, column, page_addr);
+		host->send_read_param(host);
+		host->buf_start = 0;
 		break;
 
 	case NAND_CMD_ERASE1:
@@ -1024,7 +1104,7 @@ static int __init imxnd_probe(struct device_d *dev)
 	struct mtd_info *mtd;
 	struct imx_nand_platform_data *pdata = dev->platform_data;
 	struct imx_nand_host *host;
-	struct nand_ecclayout *oob_smallpage, *oob_largepage;
+	struct nand_ecclayout *oob_smallpage, *oob_largepage, *oob_4kpage;
 	int err = 0;
 
 #ifdef CONFIG_ARCH_IMX27
@@ -1047,6 +1127,7 @@ static int __init imxnd_probe(struct device_d *dev)
 		host->send_addr = send_addr_v1_v2;
 		host->send_page = send_page_v1_v2;
 		host->send_read_id = send_read_id_v1_v2;
+		host->send_read_param = send_read_param_v1_v2; /* FIXME : to check */
 		host->get_dev_status = get_dev_status_v1_v2;
 		host->check_int = check_int_v1_v2;
 	}
@@ -1059,6 +1140,7 @@ static int __init imxnd_probe(struct device_d *dev)
 		host->spare_len = 64;
 		oob_smallpage = &nandv2_hw_eccoob_smallpage;
 		oob_largepage = &nandv2_hw_eccoob_largepage;
+		oob_4kpage = &nandv2_hw_eccoob_4k; /* FIXME : to check */
 	} else if (nfc_is_v1()) {
 		host->base = dev_request_mem_region(dev, 0);
 		host->main_area0 = host->base;
@@ -1067,6 +1149,7 @@ static int __init imxnd_probe(struct device_d *dev)
 		host->spare_len = 16;
 		oob_smallpage = &nandv1_hw_eccoob_smallpage;
 		oob_largepage = &nandv1_hw_eccoob_largepage;
+		oob_4kpage = &nandv1_hw_eccoob_smallpage; /* FIXME : to check  */
 	} else if (nfc_is_v3_2()) {
 		host->regs_ip = dev_request_mem_region(dev, 0);
 		host->base = dev_request_mem_region(dev, 1);
@@ -1086,10 +1169,12 @@ static int __init imxnd_probe(struct device_d *dev)
 		host->send_addr = send_addr_v3;
 		host->send_page = send_page_v3;
 		host->send_read_id = send_read_id_v3;
+		host->send_read_param = send_read_param_v3;
 		host->get_dev_status = get_dev_status_v3;
 		host->check_int = check_int_v3;
 		oob_smallpage = &nandv2_hw_eccoob_smallpage;
 		oob_largepage = &nandv2_hw_eccoob_largepage;
+		oob_4kpage = &nandv2_hw_eccoob_4k;
 	}
 
 	host->dev = dev;
@@ -1161,7 +1246,10 @@ static int __init imxnd_probe(struct device_d *dev)
 	imx_nand_set_layout(mtd->writesize, pdata->width == 2 ? 16 : 8);
 
 	if (mtd->writesize >= 2048) {
-		this->ecc.layout = oob_largepage;
+		if (mtd->writesize == 2048)
+			this->ecc.layout = oob_largepage;
+		else
+			this->ecc.layout = oob_4kpage;
 		host->pagesize_2k = 1;
 		if (nfc_is_v21())
 			writew(NFC_V2_SPAS_SPARESIZE(64), host->regs + NFC_V2_SPAS);
-- 
1.7.7.6



From s.hauer at pengutronix.de  Thu Jul  5 15:02:40 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 5 Jul 2012 21:02:40 +0200
Subject: [PATCH 2/3] nand_base: add ONFI flash detection
In-Reply-To: <1341483767-20487-2-git-send-email-eric@eukrea.com>
References: <1341483767-20487-1-git-send-email-eric@eukrea.com>
 <1341483767-20487-2-git-send-email-eric@eukrea.com>
Message-ID: <20120705190240.GY30009@pengutronix.de>

On Thu, Jul 05, 2012 at 12:22:46PM +0200, Eric B?nard wrote:
> the code is taken from linux & u-boot implementations
> Validated on an i.MX53 which gives the following log :
> ONFI flash detected ... ONFI param page 0 valid
> NAND device: Manufacturer ID: 0x2c, Chip ID: 0x38 (Micron MT29F8G08ABABAWP), page size: 4096, OOB size: 224
> 
> Signed-off-by: Eric B?nard <eric at eukrea.com>
> ---
>  drivers/mtd/nand/nand_base.c |  174 ++++++++++++++++++++++++++++++++++++------
>  include/linux/mtd/mtd-abi.h  |    7 +-
>  include/linux/mtd/nand.h     |   74 ++++++++++++++++++-
>  3 files changed, 226 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
>  #ifdef CONFIG_MTD_WRITE
>  	/* Check for AND chips with 4 page planes */
>  	if (chip->options & NAND_4PAGE_ARRAY)
> @@ -1179,9 +1301,11 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
>  	if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
>  		chip->cmdfunc = nand_command_lp;
>  
> -	printk(KERN_INFO "NAND device: Manufacturer ID:"
> -	       " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id,
> -	       nand_manuf_ids[maf_idx].name, type->name);
> +	printk("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
> +		" page size: %d, OOB size: %d\n",
> +		*maf_id, dev_id, nand_manuf_ids[maf_idx].name,
> +		chip->onfi_version ? chip->onfi_params.model : type->name,
> +		mtd->writesize, mtd->oobsize);

Do we need to output writesize and oobsize here? 'devinfo nand0' will
give the same information.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul  5 15:07:53 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:07:53 +0200
Subject: [PATCH 1/3] USB: Fix typo tranceiver -> transceiver
Message-ID: <1341515275-3464-1-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

Conflicts:

	drivers/usb/otg/Kconfig

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/usb/otg/Kconfig |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index 2c5b789..d871677 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -1,7 +1,7 @@
 config USB_ULPI
-	bool "ULPI Tranceiver support"
+	bool "ULPI Transceiver support"
 	help
-	  Support for tranceivers that conforms ULPI specification.
+	  Support for transceivers that conforms ULPI specification.
 
 config USB_TWL4030
-	bool "TWL4030 Tranceiver support"
+	bool "TWL4030 Transceiver support"
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:07:54 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:07:54 +0200
Subject: [PATCH 2/3] ARM: remove mx1ads leftovers
In-Reply-To: <1341515275-3464-1-git-send-email-s.hauer@pengutronix.de>
References: <1341515275-3464-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341515275-3464-2-git-send-email-s.hauer@pengutronix.de>

We have no mx1ads support in the tree, so remove the remaining bits from
Kconfig.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/Makefile         |    1 -
 arch/arm/mach-imx/Kconfig |    7 -------
 2 files changed, 8 deletions(-)

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..b2f4ce6 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -94,7 +94,6 @@ board-$(CONFIG_MACH_IMX21ADS)			:= imx21ads
 board-$(CONFIG_MACH_IMX27ADS)			:= imx27ads
 board-$(CONFIG_MACH_MIOA701)			:= mioa701
 board-$(CONFIG_MACH_MMCCPU)			:= mmccpu
-board-$(CONFIG_MACH_MX1ADS)			:= mx1ads
 board-$(CONFIG_MACH_NOMADIK_8815NHK)		:= nhk8815
 board-$(CONFIG_MACH_NXDB500)			:= netx
 board-$(CONFIG_MACH_OMAP343xSDP)		:= omap343xdsp
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b77245..aa4ab7b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -6,7 +6,6 @@ config ARCH_TEXT_BASE
 	default 0xa0000000 if MACH_EUKREA_CPUIMX27
 	default 0x87f00000 if MACH_EUKREA_CPUIMX35
 	default 0x97f00000 if MACH_EUKREA_CPUIMX51SD
-	default 0x08f00000 if MACH_MX1ADS
 	default 0xc0000000 if MACH_IMX21ADS
 	default 0xa0000000 if MACH_IMX27ADS
 	default 0x83f00000 if MACH_FREESCALE_MX25_3STACK && FREESCALE_MX25_3STACK_SDRAM_64MB_DDR2
@@ -186,12 +185,6 @@ choice
 
 	prompt "i.MX1 Board Type"
 
-config MACH_MX1ADS
-	bool "mx1ads"
-	select HAS_CS8900
-	help
-	  Say Y here if you are using the Motorola MX1ADS board
-
 config MACH_SCB9328
 	bool "Synertronixx scb9328"
 	select HAS_DM9000
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:07:55 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:07:55 +0200
Subject: [PATCH 3/3] mtd: remove dead disk-on-chip support
In-Reply-To: <1341515275-3464-1-git-send-email-s.hauer@pengutronix.de>
References: <1341515275-3464-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341515275-3464-3-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/nand/Kconfig      |   32 -
 drivers/mtd/nand/Makefile     |    1 -
 drivers/mtd/nand/diskonchip.c | 1787 -----------------------------------------
 3 files changed, 1820 deletions(-)
 delete mode 100644 drivers/mtd/nand/diskonchip.c

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 3f90643..6889b44 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -105,38 +105,6 @@ config MTD_NAND_MUSEUM_IDS
 config MTD_NAND_IDS
 	tristate
 
-config MTD_NAND_DISKONCHIP
-	tristate "DiskOnChip 2000, Millennium and Millennium Plus"
-	depends on EXPERIMENTAL && BROKEN
-	help
-	  This is a reimplementation of M-Systems DiskOnChip 2000,
-	  Millennium and Millennium Plus as a standard NAND device driver,
-	  as opposed to the earlier self-contained MTD device drivers.
-	  This should enable, among other things, proper JFFS2 operation on
-	  these devices.
-
-config MTD_NAND_DISKONCHIP_BBTWRITE
-	bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
-	depends on MTD_NAND_DISKONCHIP
-	help
-	  On DiskOnChip devices shipped with the INFTL filesystem (Millennium
-	  and 2000 TSOP/Alon), Linux reserves some space at the end of the
-	  device for the Bad Block Table (BBT).  If you have existing INFTL
-	  data on your device (created by non-Linux tools such as M-Systems'
-	  DOS drivers), your data might overlap the area Linux wants to use for
-	  the BBT.  If this is a concern for you, leave this option disabled and
-	  Linux will not write BBT data into this area.
-	  The downside of leaving this option disabled is that if bad blocks
-	  are detected by Linux, they will not be recorded in the BBT, which
-	  could cause future problems.
-	  Once you enable this option, new filesystems (INFTL or others, created
-	  in Linux or other operating systems) will not use the reserved area.
-	  The only reason not to enable this option is to prevent damage to
-	  preexisting filesystems.
-	  Even if you leave this disabled, you can enable BBT writes at module
-	  load time (assuming you build diskonchip as a module) with the module
-	  parameter "inftl_bbt_write=1".
-
 config MTD_NAND_NOMADIK
 	tristate "ST Nomadik 8815 NAND support"
 	depends on ARCH_NOMADIK
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 4179618..9d46bc0 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_MTD_NAND_IDS)		+= nand_ids.o
 obj-$(CONFIG_NAND)			+= nand_base.o nand-bb.o
 obj-$(CONFIG_NAND_BBT)			+= nand_bbt.o
 
-obj-$(CONFIG_MTD_NAND_DISKONCHIP)	+= diskonchip.o
 obj-$(CONFIG_MTD_NAND_NOMADIK)		+= nomadik_nand.o
 obj-$(CONFIG_NAND_IMX)			+= nand_imx.o
 obj-$(CONFIG_NAND_OMAP_GPMC)		+= nand_omap_gpmc.o nand_omap_bch_decoder.o
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
deleted file mode 100644
index 6da68dc..0000000
--- a/drivers/mtd/nand/diskonchip.c
+++ /dev/null
@@ -1,1787 +0,0 @@
-/*
- * drivers/mtd/nand/diskonchip.c
- *
- * (C) 2003 Red Hat, Inc.
- * (C) 2004 Dan Brown <dan_brown at ieee.org>
- * (C) 2004 Kalev Lember <kalev at smartlink.ee>
- *
- * Author: David Woodhouse <dwmw2 at infradead.org>
- * Additional Diskonchip 2000 and Millennium support by Dan Brown <dan_brown at ieee.org>
- * Diskonchip Millennium Plus support by Kalev Lember <kalev at smartlink.ee>
- *
- * Error correction code lifted from the old docecc code
- * Author: Fabrice Bellard (fabrice.bellard at netgem.com)
- * Copyright (C) 2000 Netgem S.A.
- * converted to the generic Reed-Solomon library by Thomas Gleixner <tglx at linutronix.de>
- *
- * Interface to generic NAND code for M-Systems DiskOnChip devices
- *
- * $Id: diskonchip.c,v 1.45 2005/01/05 18:05:14 dwmw2 Exp $
- */
-
-#include <common.h>
-
-#if !defined(CFG_NAND_LEGACY)
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <linux/rslib.h>
-#include <linux/moduleparam.h>
-#include <io.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/doc2000.h>
-#include <linux/mtd/compatmac.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/inftl.h>
-
-/* Where to look for the devices? */
-#ifndef CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS
-#define CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS 0
-#endif
-
-static unsigned long __initdata doc_locations[] = {
-#if defined (__alpha__) || defined(__i386__) || defined(__x86_64__)
-#ifdef CONFIG_MTD_DISKONCHIP_PROBE_HIGH
-	0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000,
-	0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000,
-	0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000,
-	0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000,
-	0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000,
-#else /*  CONFIG_MTD_DOCPROBE_HIGH */
-	0xc8000, 0xca000, 0xcc000, 0xce000,
-	0xd0000, 0xd2000, 0xd4000, 0xd6000,
-	0xd8000, 0xda000, 0xdc000, 0xde000,
-	0xe0000, 0xe2000, 0xe4000, 0xe6000,
-	0xe8000, 0xea000, 0xec000, 0xee000,
-#endif /*  CONFIG_MTD_DOCPROBE_HIGH */
-#elif defined(__PPC__)
-	0xe4000000,
-#elif defined(CONFIG_MOMENCO_OCELOT)
-	0x2f000000,
-	0xff000000,
-#elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
-	0xff000000,
-##else
-#warning Unknown architecture for DiskOnChip. No default probe locations defined
-#endif
-	0xffffffff };
-
-static struct mtd_info *doclist = NULL;
-
-struct doc_priv {
-	void __iomem *virtadr;
-	unsigned long physadr;
-	u_char ChipID;
-	u_char CDSNControl;
-	int chips_per_floor; /* The number of chips detected on each floor */
-	int curfloor;
-	int curchip;
-	int mh0_page;
-	int mh1_page;
-	struct mtd_info *nextdoc;
-};
-
-/* Max number of eraseblocks to scan (from start of device) for the (I)NFTL
-   MediaHeader.  The spec says to just keep going, I think, but that's just
-   silly. */
-#define MAX_MEDIAHEADER_SCAN 8
-
-/* This is the syndrome computed by the HW ecc generator upon reading an empty
-   page, one with all 0xff for data and stored ecc code. */
-static u_char empty_read_syndrome[6] = { 0x26, 0xff, 0x6d, 0x47, 0x73, 0x7a };
-/* This is the ecc value computed by the HW ecc generator upon writing an empty
-   page, one with all 0xff for data. */
-static u_char empty_write_ecc[6] = { 0x4b, 0x00, 0xe2, 0x0e, 0x93, 0xf7 };
-
-#define INFTL_BBT_RESERVED_BLOCKS 4
-
-#define DoC_is_MillenniumPlus(doc) ((doc)->ChipID == DOC_ChipID_DocMilPlus16 || (doc)->ChipID == DOC_ChipID_DocMilPlus32)
-#define DoC_is_Millennium(doc) ((doc)->ChipID == DOC_ChipID_DocMil)
-#define DoC_is_2000(doc) ((doc)->ChipID == DOC_ChipID_Doc2k)
-
-static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd);
-static void doc200x_select_chip(struct mtd_info *mtd, int chip);
-
-static int debug=0;
-module_param(debug, int, 0);
-
-static int try_dword=1;
-module_param(try_dword, int, 0);
-
-static int no_ecc_failures=0;
-module_param(no_ecc_failures, int, 0);
-
-#ifdef CONFIG_MTD_PARTITIONS
-static int no_autopart=0;
-module_param(no_autopart, int, 0);
-#endif
-
-#ifdef CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE
-static int inftl_bbt_write=1;
-#else
-static int inftl_bbt_write=0;
-#endif
-module_param(inftl_bbt_write, int, 0);
-
-static unsigned long doc_config_location = CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS;
-module_param(doc_config_location, ulong, 0);
-MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip");
-
-
-/* Sector size for HW ECC */
-#define SECTOR_SIZE 512
-/* The sector bytes are packed into NB_DATA 10 bit words */
-#define NB_DATA (((SECTOR_SIZE + 1) * 8 + 6) / 10)
-/* Number of roots */
-#define NROOTS 4
-/* First consective root */
-#define FCR 510
-/* Number of symbols */
-#define NN 1023
-
-/* the Reed Solomon control structure */
-static struct rs_control *rs_decoder;
-
-/*
- * The HW decoder in the DoC ASIC's provides us a error syndrome,
- * which we must convert to a standard syndrom usable by the generic
- * Reed-Solomon library code.
- *
- * Fabrice Bellard figured this out in the old docecc code. I added
- * some comments, improved a minor bit and converted it to make use
- * of the generic Reed-Solomon libary. tglx
- */
-static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
-{
-	int i, j, nerr, errpos[8];
-	uint8_t parity;
-	uint16_t ds[4], s[5], tmp, errval[8], syn[4];
-
-	/* Convert the ecc bytes into words */
-	ds[0] = ((ecc[4] & 0xff) >> 0) | ((ecc[5] & 0x03) << 8);
-	ds[1] = ((ecc[5] & 0xfc) >> 2) | ((ecc[2] & 0x0f) << 6);
-	ds[2] = ((ecc[2] & 0xf0) >> 4) | ((ecc[3] & 0x3f) << 4);
-	ds[3] = ((ecc[3] & 0xc0) >> 6) | ((ecc[0] & 0xff) << 2);
-	parity = ecc[1];
-
-	/* Initialize the syndrom buffer */
-	for (i = 0; i < NROOTS; i++)
-		s[i] = ds[0];
-	/*
-	 *  Evaluate
-	 *  s[i] = ds[3]x^3 + ds[2]x^2 + ds[1]x^1 + ds[0]
-	 *  where x = alpha^(FCR + i)
-	 */
-	for(j = 1; j < NROOTS; j++) {
-		if(ds[j] == 0)
-			continue;
-		tmp = rs->index_of[ds[j]];
-		for(i = 0; i < NROOTS; i++)
-			s[i] ^= rs->alpha_to[rs_modnn(rs, tmp + (FCR + i) * j)];
-	}
-
-	/* Calc s[i] = s[i] / alpha^(v + i) */
-	for (i = 0; i < NROOTS; i++) {
-		if (syn[i])
- 			syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
-	}
-	/* Call the decoder library */
-	nerr = decode_rs16(rs, NULL, NULL, 1019, syn, 0, errpos, 0, errval);
-
-	/* Incorrectable errors ? */
-	if (nerr < 0)
-		return nerr;
-
-	/*
-	 * Correct the errors. The bitpositions are a bit of magic,
-	 * but they are given by the design of the de/encoder circuit
-	 * in the DoC ASIC's.
-	 */
-	for(i = 0;i < nerr; i++) {
-		int index, bitpos, pos = 1015 - errpos[i];
-		uint8_t val;
-		if (pos >= NB_DATA && pos < 1019)
-			continue;
-		if (pos < NB_DATA) {
-			/* extract bit position (MSB first) */
-			pos = 10 * (NB_DATA - 1 - pos) - 6;
-			/* now correct the following 10 bits. At most two bytes
-			   can be modified since pos is even */
-			index = (pos >> 3) ^ 1;
-			bitpos = pos & 7;
-			if ((index >= 0 && index < SECTOR_SIZE) ||
-			    index == (SECTOR_SIZE + 1)) {
-				val = (uint8_t) (errval[i] >> (2 + bitpos));
-				parity ^= val;
-				if (index < SECTOR_SIZE)
-					data[index] ^= val;
-			}
-			index = ((pos >> 3) + 1) ^ 1;
-			bitpos = (bitpos + 10) & 7;
-			if (bitpos == 0)
-				bitpos = 8;
-			if ((index >= 0 && index < SECTOR_SIZE) ||
-			    index == (SECTOR_SIZE + 1)) {
-				val = (uint8_t)(errval[i] << (8 - bitpos));
-				parity ^= val;
-				if (index < SECTOR_SIZE)
-					data[index] ^= val;
-			}
-		}
-	}
-	/* If the parity is wrong, no rescue possible */
-	return parity ? -1 : nerr;
-}
-
-static void DoC_Delay(struct doc_priv *doc, unsigned short cycles)
-{
-	volatile char dummy;
-	int i;
-
-	for (i = 0; i < cycles; i++) {
-		if (DoC_is_Millennium(doc))
-			dummy = ReadDOC(doc->virtadr, NOP);
-		else if (DoC_is_MillenniumPlus(doc))
-			dummy = ReadDOC(doc->virtadr, Mplus_NOP);
-		else
-			dummy = ReadDOC(doc->virtadr, DOCStatus);
-	}
-
-}
-
-#define CDSN_CTRL_FR_B_MASK	(CDSN_CTRL_FR_B0 | CDSN_CTRL_FR_B1)
-
-/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
-static int _DoC_WaitReady(struct doc_priv *doc)
-{
-	void __iomem *docptr = doc->virtadr;
-	unsigned long timeo = jiffies + (HZ * 10);
-
-	if(debug) printk("_DoC_WaitReady...\n");
-	/* Out-of-line routine to wait for chip response */
-	if (DoC_is_MillenniumPlus(doc)) {
-		while ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
-			if (time_after(jiffies, timeo)) {
-				printk("_DoC_WaitReady timed out.\n");
-				return -EIO;
-			}
-			udelay(1);
-			cond_resched();
-		}
-	} else {
-		while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
-			if (time_after(jiffies, timeo)) {
-				printk("_DoC_WaitReady timed out.\n");
-				return -EIO;
-			}
-			udelay(1);
-			cond_resched();
-		}
-	}
-
-	return 0;
-}
-
-static inline int DoC_WaitReady(struct doc_priv *doc)
-{
-	void __iomem *docptr = doc->virtadr;
-	int ret = 0;
-
-	if (DoC_is_MillenniumPlus(doc)) {
-		DoC_Delay(doc, 4);
-
-		if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK)
-			/* Call the out-of-line routine to wait */
-			ret = _DoC_WaitReady(doc);
-	} else {
-		DoC_Delay(doc, 4);
-
-		if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
-			/* Call the out-of-line routine to wait */
-			ret = _DoC_WaitReady(doc);
-		DoC_Delay(doc, 2);
-	}
-
-	if(debug) printk("DoC_WaitReady OK\n");
-	return ret;
-}
-
-static void doc2000_write_byte(struct mtd_info *mtd, u_char datum)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	if(debug)printk("write_byte %02x\n", datum);
-	WriteDOC(datum, docptr, CDSNSlowIO);
-	WriteDOC(datum, docptr, 2k_CDSN_IO);
-}
-
-static u_char doc2000_read_byte(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	u_char ret;
-
-	ReadDOC(docptr, CDSNSlowIO);
-	DoC_Delay(doc, 2);
-	ret = ReadDOC(docptr, 2k_CDSN_IO);
-	if (debug) printk("read_byte returns %02x\n", ret);
-	return ret;
-}
-
-static void doc2000_writebuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-	if (debug)printk("writebuf of %d bytes: ", len);
-	for (i=0; i < len; i++) {
-		WriteDOC_(buf[i], docptr, DoC_2k_CDSN_IO + i);
-		if (debug && i < 16)
-			printk("%02x ", buf[i]);
-	}
-	if (debug) printk("\n");
-}
-
-static void doc2000_readbuf(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
- 	int i;
-
-	if (debug)printk("readbuf of %d bytes: ", len);
-
-	for (i=0; i < len; i++) {
-		buf[i] = ReadDOC(docptr, 2k_CDSN_IO + i);
-	}
-}
-
-static void doc2000_readbuf_dword(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
- 	int i;
-
-	if (debug) printk("readbuf_dword of %d bytes: ", len);
-
-	if (unlikely((((unsigned long)buf)|len) & 3)) {
-		for (i=0; i < len; i++) {
-			*(uint8_t *)(&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i);
-		}
-	} else {
-		for (i=0; i < len; i+=4) {
-			*(uint32_t*)(&buf[i]) = readl(docptr + DoC_2k_CDSN_IO + i);
-		}
-	}
-}
-
-static int doc2000_verifybuf(struct mtd_info *mtd,
-			      const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	for (i=0; i < len; i++)
-		if (buf[i] != ReadDOC(docptr, 2k_CDSN_IO))
-			return -EFAULT;
-	return 0;
-}
-
-static uint16_t __init doc200x_ident_chip(struct mtd_info *mtd, int nr)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	uint16_t ret;
-
-	doc200x_select_chip(mtd, nr);
-	doc200x_hwcontrol(mtd, NAND_CTL_SETCLE);
-	this->write_byte(mtd, NAND_CMD_READID);
-	doc200x_hwcontrol(mtd, NAND_CTL_CLRCLE);
-	doc200x_hwcontrol(mtd, NAND_CTL_SETALE);
-	this->write_byte(mtd, 0);
-	doc200x_hwcontrol(mtd, NAND_CTL_CLRALE);
-
-	ret = this->read_byte(mtd) << 8;
-	ret |= this->read_byte(mtd);
-
-	if (doc->ChipID == DOC_ChipID_Doc2k && try_dword && !nr) {
-		/* First chip probe. See if we get same results by 32-bit access */
-		union {
-			uint32_t dword;
-			uint8_t byte[4];
-		} ident;
-		void __iomem *docptr = doc->virtadr;
-
-		doc200x_hwcontrol(mtd, NAND_CTL_SETCLE);
-		doc2000_write_byte(mtd, NAND_CMD_READID);
-		doc200x_hwcontrol(mtd, NAND_CTL_CLRCLE);
-		doc200x_hwcontrol(mtd, NAND_CTL_SETALE);
-		doc2000_write_byte(mtd, 0);
-		doc200x_hwcontrol(mtd, NAND_CTL_CLRALE);
-
-		ident.dword = readl(docptr + DoC_2k_CDSN_IO);
-		if (((ident.byte[0] << 8) | ident.byte[1]) == ret) {
-			printk(KERN_INFO "DiskOnChip 2000 responds to DWORD access\n");
-			this->read_buf = &doc2000_readbuf_dword;
-		}
-	}
-
-	return ret;
-}
-
-static void __init doc2000_count_chips(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	uint16_t mfrid;
-	int i;
-
-	/* Max 4 chips per floor on DiskOnChip 2000 */
-	doc->chips_per_floor = 4;
-
-	/* Find out what the first chip is */
-	mfrid = doc200x_ident_chip(mtd, 0);
-
-	/* Find how many chips in each floor. */
-	for (i = 1; i < 4; i++) {
-		if (doc200x_ident_chip(mtd, i) != mfrid)
-			break;
-	}
-	doc->chips_per_floor = i;
-	printk(KERN_DEBUG "Detected %d chips per floor.\n", i);
-}
-
-static int doc200x_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
-{
-	struct doc_priv *doc = this->priv;
-
-	int status;
-
-	DoC_WaitReady(doc);
-	this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
-	DoC_WaitReady(doc);
-	status = (int)this->read_byte(mtd);
-
-	return status;
-}
-
-static void doc2001_write_byte(struct mtd_info *mtd, u_char datum)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	WriteDOC(datum, docptr, CDSNSlowIO);
-	WriteDOC(datum, docptr, Mil_CDSN_IO);
-	WriteDOC(datum, docptr, WritePipeTerm);
-}
-
-static u_char doc2001_read_byte(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/*ReadDOC(docptr, CDSNSlowIO); */
-	/* 11.4.5 -- delay twice to allow extended length cycle */
-	DoC_Delay(doc, 2);
-	ReadDOC(docptr, ReadPipeInit);
-	/*return ReadDOC(docptr, Mil_CDSN_IO); */
-	return ReadDOC(docptr, LastDataRead);
-}
-
-static void doc2001_writebuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	for (i=0; i < len; i++)
-		WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
-	/* Terminate write pipeline */
-	WriteDOC(0x00, docptr, WritePipeTerm);
-}
-
-static void doc2001_readbuf(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	/* Start read pipeline */
-	ReadDOC(docptr, ReadPipeInit);
-
-	for (i=0; i < len-1; i++)
-		buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
-
-	/* Terminate read pipeline */
-	buf[i] = ReadDOC(docptr, LastDataRead);
-}
-
-static int doc2001_verifybuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	/* Start read pipeline */
-	ReadDOC(docptr, ReadPipeInit);
-
-	for (i=0; i < len-1; i++)
-		if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
-			ReadDOC(docptr, LastDataRead);
-			return i;
-		}
-	if (buf[i] != ReadDOC(docptr, LastDataRead))
-		return i;
-	return 0;
-}
-
-static u_char doc2001plus_read_byte(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	u_char ret;
-
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ret = ReadDOC(docptr, Mplus_LastDataRead);
-	if (debug) printk("read_byte returns %02x\n", ret);
-	return ret;
-}
-
-static void doc2001plus_writebuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	if (debug)printk("writebuf of %d bytes: ", len);
-	for (i=0; i < len; i++) {
-		WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
-		if (debug && i < 16)
-			printk("%02x ", buf[i]);
-	}
-	if (debug) printk("\n");
-}
-
-static void doc2001plus_readbuf(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	if (debug)printk("readbuf of %d bytes: ", len);
-
-	/* Start read pipeline */
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-
-	for (i=0; i < len-2; i++) {
-		buf[i] = ReadDOC(docptr, Mil_CDSN_IO);
-		if (debug && i < 16)
-			printk("%02x ", buf[i]);
-	}
-
-	/* Terminate read pipeline */
-	buf[len-2] = ReadDOC(docptr, Mplus_LastDataRead);
-	if (debug && i < 16)
-		printk("%02x ", buf[len-2]);
-	buf[len-1] = ReadDOC(docptr, Mplus_LastDataRead);
-	if (debug && i < 16)
-		printk("%02x ", buf[len-1]);
-	if (debug) printk("\n");
-}
-
-static int doc2001plus_verifybuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	if (debug)printk("verifybuf of %d bytes: ", len);
-
-	/* Start read pipeline */
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-
-	for (i=0; i < len-2; i++)
-		if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
-			ReadDOC(docptr, Mplus_LastDataRead);
-			ReadDOC(docptr, Mplus_LastDataRead);
-			return i;
-		}
-	if (buf[len-2] != ReadDOC(docptr, Mplus_LastDataRead))
-		return len-2;
-	if (buf[len-1] != ReadDOC(docptr, Mplus_LastDataRead))
-		return len-1;
-	return 0;
-}
-
-static void doc2001plus_select_chip(struct mtd_info *mtd, int chip)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int floor = 0;
-
-	if(debug)printk("select chip (%d)\n", chip);
-
-	if (chip == -1) {
-		/* Disable flash internally */
-		WriteDOC(0, docptr, Mplus_FlashSelect);
-		return;
-	}
-
-	floor = chip / doc->chips_per_floor;
-	chip -= (floor *  doc->chips_per_floor);
-
-	/* Assert ChipEnable and deassert WriteProtect */
-	WriteDOC((DOC_FLASH_CE), docptr, Mplus_FlashSelect);
-	this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
-
-	doc->curchip = chip;
-	doc->curfloor = floor;
-}
-
-static void doc200x_select_chip(struct mtd_info *mtd, int chip)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int floor = 0;
-
-	if(debug)printk("select chip (%d)\n", chip);
-
-	if (chip == -1)
-		return;
-
-	floor = chip / doc->chips_per_floor;
-	chip -= (floor *  doc->chips_per_floor);
-
-	/* 11.4.4 -- deassert CE before changing chip */
-	doc200x_hwcontrol(mtd, NAND_CTL_CLRNCE);
-
-	WriteDOC(floor, docptr, FloorSelect);
-	WriteDOC(chip, docptr, CDSNDeviceSelect);
-
-	doc200x_hwcontrol(mtd, NAND_CTL_SETNCE);
-
-	doc->curchip = chip;
-	doc->curfloor = floor;
-}
-
-static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	switch(cmd) {
-	case NAND_CTL_SETNCE:
-		doc->CDSNControl |= CDSN_CTRL_CE;
-		break;
-	case NAND_CTL_CLRNCE:
-		doc->CDSNControl &= ~CDSN_CTRL_CE;
-		break;
-	case NAND_CTL_SETCLE:
-		doc->CDSNControl |= CDSN_CTRL_CLE;
-		break;
-	case NAND_CTL_CLRCLE:
-		doc->CDSNControl &= ~CDSN_CTRL_CLE;
-		break;
-	case NAND_CTL_SETALE:
-		doc->CDSNControl |= CDSN_CTRL_ALE;
-		break;
-	case NAND_CTL_CLRALE:
-		doc->CDSNControl &= ~CDSN_CTRL_ALE;
-		break;
-	case NAND_CTL_SETWP:
-		doc->CDSNControl |= CDSN_CTRL_WP;
-		break;
-	case NAND_CTL_CLRWP:
-		doc->CDSNControl &= ~CDSN_CTRL_WP;
-		break;
-	}
-	if (debug)printk("hwcontrol(%d): %02x\n", cmd, doc->CDSNControl);
-	WriteDOC(doc->CDSNControl, docptr, CDSNControl);
-	/* 11.4.3 -- 4 NOPs after CSDNControl write */
-	DoC_Delay(doc, 4);
-}
-
-static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/*
-	 * Must terminate write pipeline before sending any commands
-	 * to the device.
-	 */
-	if (command == NAND_CMD_PAGEPROG) {
-		WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
-		WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
-	}
-
-	/*
-	 * Write out the command to the device.
-	 */
-	if (command == NAND_CMD_SEQIN) {
-		int readcmd;
-
-		if (column >= mtd->oobblock) {
-			/* OOB area */
-			column -= mtd->oobblock;
-			readcmd = NAND_CMD_READOOB;
-		} else if (column < 256) {
-			/* First 256 bytes --> READ0 */
-			readcmd = NAND_CMD_READ0;
-		} else {
-			column -= 256;
-			readcmd = NAND_CMD_READ1;
-		}
-		WriteDOC(readcmd, docptr, Mplus_FlashCmd);
-	}
-	WriteDOC(command, docptr, Mplus_FlashCmd);
-	WriteDOC(0, docptr, Mplus_WritePipeTerm);
-	WriteDOC(0, docptr, Mplus_WritePipeTerm);
-
-	if (column != -1 || page_addr != -1) {
-		/* Serially input address */
-		if (column != -1) {
-			/* Adjust columns for 16 bit buswidth */
-			if (this->options & NAND_BUSWIDTH_16)
-				column >>= 1;
-			WriteDOC(column, docptr, Mplus_FlashAddress);
-		}
-		if (page_addr != -1) {
-			WriteDOC((unsigned char) (page_addr & 0xff), docptr, Mplus_FlashAddress);
-			WriteDOC((unsigned char) ((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);
-			/* One more address cycle for higher density devices */
-			if (this->chipsize & 0x0c000000) {
-				WriteDOC((unsigned char) ((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);
-				printk("high density\n");
-			}
-		}
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		/* deassert ALE */
-		if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || command == NAND_CMD_READOOB || command == NAND_CMD_READID)
-			WriteDOC(0, docptr, Mplus_FlashControl);
-	}
-
-	/*
-	 * program and erase have their own busy handlers
-	 * status and sequential in needs no delay
-	*/
-	switch (command) {
-
-	case NAND_CMD_PAGEPROG:
-	case NAND_CMD_ERASE1:
-	case NAND_CMD_ERASE2:
-	case NAND_CMD_SEQIN:
-	case NAND_CMD_STATUS:
-		return;
-
-	case NAND_CMD_RESET:
-		if (this->dev_ready)
-			break;
-		udelay(this->chip_delay);
-		WriteDOC(NAND_CMD_STATUS, docptr, Mplus_FlashCmd);
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		while ( !(this->read_byte(mtd) & 0x40));
-		return;
-
-	/* This applies to read commands */
-	default:
-		/*
-		 * If we don't have access to the busy pin, we apply the given
-		 * command delay
-		*/
-		if (!this->dev_ready) {
-			udelay (this->chip_delay);
-			return;
-		}
-	}
-
-	/* Apply this short delay always to ensure that we do wait tWB in
-	 * any case on any machine. */
-	ndelay (100);
-	/* wait until command is processed */
-	while (!this->dev_ready(mtd));
-}
-
-static int doc200x_dev_ready(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	if (DoC_is_MillenniumPlus(doc)) {
-		/* 11.4.2 -- must NOP four times before checking FR/B# */
-		DoC_Delay(doc, 4);
-		if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
-			if(debug)
-				printk("not ready\n");
-			return 0;
-		}
-		if (debug)printk("was ready\n");
-		return 1;
-	} else {
-		/* 11.4.2 -- must NOP four times before checking FR/B# */
-		DoC_Delay(doc, 4);
-		if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
-			if(debug)
-				printk("not ready\n");
-			return 0;
-		}
-		/* 11.4.2 -- Must NOP twice if it's ready */
-		DoC_Delay(doc, 2);
-		if (debug)printk("was ready\n");
-		return 1;
-	}
-}
-
-static int doc200x_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
-{
-	/* This is our last resort if we couldn't find or create a BBT.  Just
-	   pretend all blocks are good. */
-	return 0;
-}
-
-static void doc200x_enable_hwecc(struct mtd_info *mtd, int mode)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/* Prime the ECC engine */
-	switch(mode) {
-	case NAND_ECC_READ:
-		WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
-		WriteDOC(DOC_ECC_EN, docptr, ECCConf);
-		break;
-	case NAND_ECC_WRITE:
-		WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
-		WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
-		break;
-	}
-}
-
-static void doc2001plus_enable_hwecc(struct mtd_info *mtd, int mode)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/* Prime the ECC engine */
-	switch(mode) {
-	case NAND_ECC_READ:
-		WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
-		WriteDOC(DOC_ECC_EN, docptr, Mplus_ECCConf);
-		break;
-	case NAND_ECC_WRITE:
-		WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
-		WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, Mplus_ECCConf);
-		break;
-	}
-}
-
-/* This code is only called on write */
-static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
-				 unsigned char *ecc_code)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-	int emptymatch = 1;
-
-	/* flush the pipeline */
-	if (DoC_is_2000(doc)) {
-		WriteDOC(doc->CDSNControl & ~CDSN_CTRL_FLASH_IO, docptr, CDSNControl);
-		WriteDOC(0, docptr, 2k_CDSN_IO);
-		WriteDOC(0, docptr, 2k_CDSN_IO);
-		WriteDOC(0, docptr, 2k_CDSN_IO);
-		WriteDOC(doc->CDSNControl, docptr, CDSNControl);
-	} else if (DoC_is_MillenniumPlus(doc)) {
-		WriteDOC(0, docptr, Mplus_NOP);
-		WriteDOC(0, docptr, Mplus_NOP);
-		WriteDOC(0, docptr, Mplus_NOP);
-	} else {
-		WriteDOC(0, docptr, NOP);
-		WriteDOC(0, docptr, NOP);
-		WriteDOC(0, docptr, NOP);
-	}
-
-	for (i = 0; i < 6; i++) {
-		if (DoC_is_MillenniumPlus(doc))
-			ecc_code[i] = ReadDOC_(docptr, DoC_Mplus_ECCSyndrome0 + i);
-		else
-			ecc_code[i] = ReadDOC_(docptr, DoC_ECCSyndrome0 + i);
-		if (ecc_code[i] != empty_write_ecc[i])
-			emptymatch = 0;
-	}
-	if (DoC_is_MillenniumPlus(doc))
-		WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf);
-	else
-		WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
-#if 0
-	/* If emptymatch=1, we might have an all-0xff data buffer.  Check. */
-	if (emptymatch) {
-		/* Note: this somewhat expensive test should not be triggered
-		   often.  It could be optimized away by examining the data in
-		   the writebuf routine, and remembering the result. */
-		for (i = 0; i < 512; i++) {
-			if (dat[i] == 0xff) continue;
-			emptymatch = 0;
-			break;
-		}
-	}
-	/* If emptymatch still =1, we do have an all-0xff data buffer.
-	   Return all-0xff ecc value instead of the computed one, so
-	   it'll look just like a freshly-erased page. */
-	if (emptymatch) memset(ecc_code, 0xff, 6);
-#endif
-	return 0;
-}
-
-static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
-{
-	int i, ret = 0;
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	volatile u_char dummy;
-	int emptymatch = 1;
-
-	/* flush the pipeline */
-	if (DoC_is_2000(doc)) {
-		dummy = ReadDOC(docptr, 2k_ECCStatus);
-		dummy = ReadDOC(docptr, 2k_ECCStatus);
-		dummy = ReadDOC(docptr, 2k_ECCStatus);
-	} else if (DoC_is_MillenniumPlus(doc)) {
-		dummy = ReadDOC(docptr, Mplus_ECCConf);
-		dummy = ReadDOC(docptr, Mplus_ECCConf);
-		dummy = ReadDOC(docptr, Mplus_ECCConf);
-	} else {
-		dummy = ReadDOC(docptr, ECCConf);
-		dummy = ReadDOC(docptr, ECCConf);
-		dummy = ReadDOC(docptr, ECCConf);
-	}
-
-	/* Error occured ? */
-	if (dummy & 0x80) {
-		for (i = 0; i < 6; i++) {
-			if (DoC_is_MillenniumPlus(doc))
-				calc_ecc[i] = ReadDOC_(docptr, DoC_Mplus_ECCSyndrome0 + i);
-			else
-				calc_ecc[i] = ReadDOC_(docptr, DoC_ECCSyndrome0 + i);
-			if (calc_ecc[i] != empty_read_syndrome[i])
-				emptymatch = 0;
-		}
-		/* If emptymatch=1, the read syndrome is consistent with an
-		   all-0xff data and stored ecc block.  Check the stored ecc. */
-		if (emptymatch) {
-			for (i = 0; i < 6; i++) {
-				if (read_ecc[i] == 0xff) continue;
-				emptymatch = 0;
-				break;
-			}
-		}
-		/* If emptymatch still =1, check the data block. */
-		if (emptymatch) {
-		/* Note: this somewhat expensive test should not be triggered
-		   often.  It could be optimized away by examining the data in
-		   the readbuf routine, and remembering the result. */
-			for (i = 0; i < 512; i++) {
-				if (dat[i] == 0xff) continue;
-				emptymatch = 0;
-				break;
-			}
-		}
-		/* If emptymatch still =1, this is almost certainly a freshly-
-		   erased block, in which case the ECC will not come out right.
-		   We'll suppress the error and tell the caller everything's
-		   OK.  Because it is. */
-		if (!emptymatch) ret = doc_ecc_decode (rs_decoder, dat, calc_ecc);
-		if (ret > 0)
-			printk(KERN_ERR "doc200x_correct_data corrected %d errors\n", ret);
-	}
-	if (DoC_is_MillenniumPlus(doc))
-		WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf);
-	else
-		WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
-	if (no_ecc_failures && (ret == -1)) {
-		printk(KERN_ERR "suppressing ECC failure\n");
-		ret = 0;
-	}
-	return ret;
-}
-
-/*u_char mydatabuf[528]; */
-
-static struct nand_oobinfo doc200x_oobinfo = {
-	.useecc = MTD_NANDECC_AUTOPLACE,
-	.eccbytes = 6,
-	.eccpos = {0, 1, 2, 3, 4, 5},
-	.oobfree = { {8, 8} }
-};
-
-/* Find the (I)NFTL Media Header, and optionally also the mirror media header.
-   On sucessful return, buf will contain a copy of the media header for
-   further processing.  id is the string to scan for, and will presumably be
-   either "ANAND" or "BNAND".  If findmirror=1, also look for the mirror media
-   header.  The page #s of the found media headers are placed in mh0_page and
-   mh1_page in the DOC private structure. */
-static int __init find_media_headers(struct mtd_info *mtd, u_char *buf,
-				     const char *id, int findmirror)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	unsigned offs, end = (MAX_MEDIAHEADER_SCAN << this->phys_erase_shift);
-	int ret;
-	size_t retlen;
-
-	end = min(end, mtd->size); /* paranoia */
-	for (offs = 0; offs < end; offs += mtd->erasesize) {
-		ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
-		if (retlen != mtd->oobblock) continue;
-		if (ret) {
-			printk(KERN_WARNING "ECC error scanning DOC at 0x%x\n",
-				offs);
-		}
-		if (memcmp(buf, id, 6)) continue;
-		printk(KERN_INFO "Found DiskOnChip %s Media Header at 0x%x\n", id, offs);
-		if (doc->mh0_page == -1) {
-			doc->mh0_page = offs >> this->page_shift;
-			if (!findmirror) return 1;
-			continue;
-		}
-		doc->mh1_page = offs >> this->page_shift;
-		return 2;
-	}
-	if (doc->mh0_page == -1) {
-		printk(KERN_WARNING "DiskOnChip %s Media Header not found.\n", id);
-		return 0;
-	}
-	/* Only one mediaheader was found.  We want buf to contain a
-	   mediaheader on return, so we'll have to re-read the one we found. */
-	offs = doc->mh0_page << this->page_shift;
-	ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
-	if (retlen != mtd->oobblock) {
-		/* Insanity.  Give up. */
-		printk(KERN_ERR "Read DiskOnChip Media Header once, but can't reread it???\n");
-		return 0;
-	}
-	return 1;
-}
-
-static inline int __init nftl_partscan(struct mtd_info *mtd,
-				struct mtd_partition *parts)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	int ret = 0;
-	u_char *buf;
-	struct NFTLMediaHeader *mh;
-	const unsigned psize = 1 << this->page_shift;
-	unsigned blocks, maxblocks;
-	int offs, numheaders;
-
-	buf = kmalloc(mtd->oobblock, GFP_KERNEL);
-	if (!buf) {
-		printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
-		return 0;
-	}
-	if (!(numheaders=find_media_headers(mtd, buf, "ANAND", 1))) goto out;
-	mh = (struct NFTLMediaHeader *) buf;
-
-/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
-/*	if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
-	printk(KERN_INFO "    DataOrgID        = %s\n"
-			 "    NumEraseUnits    = %d\n"
-			 "    FirstPhysicalEUN = %d\n"
-			 "    FormattedSize    = %d\n"
-			 "    UnitSizeFactor   = %d\n",
-		mh->DataOrgID, mh->NumEraseUnits,
-		mh->FirstPhysicalEUN, mh->FormattedSize,
-		mh->UnitSizeFactor);
-/*#endif */
-
-	blocks = mtd->size >> this->phys_erase_shift;
-	maxblocks = min(32768U, mtd->erasesize - psize);
-
-	if (mh->UnitSizeFactor == 0x00) {
-		/* Auto-determine UnitSizeFactor.  The constraints are:
-		   - There can be at most 32768 virtual blocks.
-		   - There can be at most (virtual block size - page size)
-		     virtual blocks (because MediaHeader+BBT must fit in 1).
-		*/
-		mh->UnitSizeFactor = 0xff;
-		while (blocks > maxblocks) {
-			blocks >>= 1;
-			maxblocks = min(32768U, (maxblocks << 1) + psize);
-			mh->UnitSizeFactor--;
-		}
-		printk(KERN_WARNING "UnitSizeFactor=0x00 detected.  Correct value is assumed to be 0x%02x.\n", mh->UnitSizeFactor);
-	}
-
-	/* NOTE: The lines below modify internal variables of the NAND and MTD
-	   layers; variables with have already been configured by nand_scan.
-	   Unfortunately, we didn't know before this point what these values
-	   should be.  Thus, this code is somewhat dependant on the exact
-	   implementation of the NAND layer.  */
-	if (mh->UnitSizeFactor != 0xff) {
-		this->bbt_erase_shift += (0xff - mh->UnitSizeFactor);
-		mtd->erasesize <<= (0xff - mh->UnitSizeFactor);
-		printk(KERN_INFO "Setting virtual erase size to %d\n", mtd->erasesize);
-		blocks = mtd->size >> this->bbt_erase_shift;
-		maxblocks = min(32768U, mtd->erasesize - psize);
-	}
-
-	if (blocks > maxblocks) {
-		printk(KERN_ERR "UnitSizeFactor of 0x%02x is inconsistent with device size.  Aborting.\n", mh->UnitSizeFactor);
-		goto out;
-	}
-
-	/* Skip past the media headers. */
-	offs = max(doc->mh0_page, doc->mh1_page);
-	offs <<= this->page_shift;
-	offs += mtd->erasesize;
-
-	/*parts[0].name = " DiskOnChip Boot / Media Header partition"; */
-	/*parts[0].offset = 0; */
-	/*parts[0].size = offs; */
-
-	parts[0].name = " DiskOnChip BDTL partition";
-	parts[0].offset = offs;
-	parts[0].size = (mh->NumEraseUnits - numheaders) << this->bbt_erase_shift;
-
-	offs += parts[0].size;
-	if (offs < mtd->size) {
-		parts[1].name = " DiskOnChip Remainder partition";
-		parts[1].offset = offs;
-		parts[1].size = mtd->size - offs;
-		ret = 2;
-		goto out;
-	}
-	ret = 1;
-out:
-	kfree(buf);
-	return ret;
-}
-
-/* This is a stripped-down copy of the code in inftlmount.c */
-static inline int __init inftl_partscan(struct mtd_info *mtd,
-				 struct mtd_partition *parts)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	int ret = 0;
-	u_char *buf;
-	struct INFTLMediaHeader *mh;
-	struct INFTLPartition *ip;
-	int numparts = 0;
-	int blocks;
-	int vshift, lastvunit = 0;
-	int i;
-	int end = mtd->size;
-
-	if (inftl_bbt_write)
-		end -= (INFTL_BBT_RESERVED_BLOCKS << this->phys_erase_shift);
-
-	buf = kmalloc(mtd->oobblock, GFP_KERNEL);
-	if (!buf) {
-		printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
-		return 0;
-	}
-
-	if (!find_media_headers(mtd, buf, "BNAND", 0)) goto out;
-	doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift);
-	mh = (struct INFTLMediaHeader *) buf;
-
-	mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks);
-	mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions);
-	mh->NoOfBDTLPartitions = le32_to_cpu(mh->NoOfBDTLPartitions);
-	mh->BlockMultiplierBits = le32_to_cpu(mh->BlockMultiplierBits);
-	mh->FormatFlags = le32_to_cpu(mh->FormatFlags);
-	mh->PercentUsed = le32_to_cpu(mh->PercentUsed);
-
-/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
-/*	if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
-	printk(KERN_INFO "    bootRecordID          = %s\n"
-			 "    NoOfBootImageBlocks   = %d\n"
-			 "    NoOfBinaryPartitions  = %d\n"
-			 "    NoOfBDTLPartitions    = %d\n"
-			 "    BlockMultiplerBits    = %d\n"
-			 "    FormatFlgs            = %d\n"
-			 "    OsakVersion           = %d.%d.%d.%d\n"
-			 "    PercentUsed           = %d\n",
-		mh->bootRecordID, mh->NoOfBootImageBlocks,
-		mh->NoOfBinaryPartitions,
-		mh->NoOfBDTLPartitions,
-		mh->BlockMultiplierBits, mh->FormatFlags,
-		((unsigned char *) &mh->OsakVersion)[0] & 0xf,
-		((unsigned char *) &mh->OsakVersion)[1] & 0xf,
-		((unsigned char *) &mh->OsakVersion)[2] & 0xf,
-		((unsigned char *) &mh->OsakVersion)[3] & 0xf,
-		mh->PercentUsed);
-/*#endif */
-
-	vshift = this->phys_erase_shift + mh->BlockMultiplierBits;
-
-	blocks = mtd->size >> vshift;
-	if (blocks > 32768) {
-		printk(KERN_ERR "BlockMultiplierBits=%d is inconsistent with device size.  Aborting.\n", mh->BlockMultiplierBits);
-		goto out;
-	}
-
-	blocks = doc->chips_per_floor << (this->chip_shift - this->phys_erase_shift);
-	if (inftl_bbt_write && (blocks > mtd->erasesize)) {
-		printk(KERN_ERR "Writeable BBTs spanning more than one erase block are not yet supported.  FIX ME!\n");
-		goto out;
-	}
-
-	/* Scan the partitions */
-	for (i = 0; (i < 4); i++) {
-		ip = &(mh->Partitions[i]);
-		ip->virtualUnits = le32_to_cpu(ip->virtualUnits);
-		ip->firstUnit = le32_to_cpu(ip->firstUnit);
-		ip->lastUnit = le32_to_cpu(ip->lastUnit);
-		ip->flags = le32_to_cpu(ip->flags);
-		ip->spareUnits = le32_to_cpu(ip->spareUnits);
-		ip->Reserved0 = le32_to_cpu(ip->Reserved0);
-
-/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
-/*		if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
-		printk(KERN_INFO	"    PARTITION[%d] ->\n"
-			"        virtualUnits    = %d\n"
-			"        firstUnit       = %d\n"
-			"        lastUnit        = %d\n"
-			"        flags           = 0x%x\n"
-			"        spareUnits      = %d\n",
-			i, ip->virtualUnits, ip->firstUnit,
-			ip->lastUnit, ip->flags,
-			ip->spareUnits);
-/*#endif */
-
-/*
-		if ((i == 0) && (ip->firstUnit > 0)) {
-			parts[0].name = " DiskOnChip IPL / Media Header partition";
-			parts[0].offset = 0;
-			parts[0].size = mtd->erasesize * ip->firstUnit;
-			numparts = 1;
-		}
-*/
-
-		if (ip->flags & INFTL_BINARY)
-			parts[numparts].name = " DiskOnChip BDK partition";
-		else
-			parts[numparts].name = " DiskOnChip BDTL partition";
-		parts[numparts].offset = ip->firstUnit << vshift;
-		parts[numparts].size = (1 + ip->lastUnit - ip->firstUnit) << vshift;
-		numparts++;
-		if (ip->lastUnit > lastvunit) lastvunit = ip->lastUnit;
-		if (ip->flags & INFTL_LAST) break;
-	}
-	lastvunit++;
-	if ((lastvunit << vshift) < end) {
-		parts[numparts].name = " DiskOnChip Remainder partition";
-		parts[numparts].offset = lastvunit << vshift;
-		parts[numparts].size = end - parts[numparts].offset;
-		numparts++;
-	}
-	ret = numparts;
-out:
-	kfree(buf);
-	return ret;
-}
-
-static int __init nftl_scan_bbt(struct mtd_info *mtd)
-{
-	int ret, numparts;
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	struct mtd_partition parts[2];
-
-	memset((char *) parts, 0, sizeof(parts));
-	/* On NFTL, we have to find the media headers before we can read the
-	   BBTs, since they're stored in the media header eraseblocks. */
-	numparts = nftl_partscan(mtd, parts);
-	if (!numparts) return -EIO;
-	this->bbt_td->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
-				NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
-				NAND_BBT_VERSION;
-	this->bbt_td->veroffs = 7;
-	this->bbt_td->pages[0] = doc->mh0_page + 1;
-	if (doc->mh1_page != -1) {
-		this->bbt_md->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
-					NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
-					NAND_BBT_VERSION;
-		this->bbt_md->veroffs = 7;
-		this->bbt_md->pages[0] = doc->mh1_page + 1;
-	} else {
-		this->bbt_md = NULL;
-	}
-
-	/* It's safe to set bd=NULL below because NAND_BBT_CREATE is not set.
-	   At least as nand_bbt.c is currently written. */
-	if ((ret = nand_scan_bbt(mtd, NULL)))
-		return ret;
-	add_mtd_device(mtd, "nand");
-#ifdef CONFIG_MTD_PARTITIONS
-	if (!no_autopart)
-		add_mtd_partitions(mtd, parts, numparts);
-#endif
-	return 0;
-}
-
-static int __init inftl_scan_bbt(struct mtd_info *mtd)
-{
-	int ret, numparts;
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	struct mtd_partition parts[5];
-
-	if (this->numchips > doc->chips_per_floor) {
-		printk(KERN_ERR "Multi-floor INFTL devices not yet supported.\n");
-		return -EIO;
-	}
-
-	if (DoC_is_MillenniumPlus(doc)) {
-		this->bbt_td->options = NAND_BBT_2BIT | NAND_BBT_ABSPAGE;
-		if (inftl_bbt_write)
-			this->bbt_td->options |= NAND_BBT_WRITE;
-		this->bbt_td->pages[0] = 2;
-		this->bbt_md = NULL;
-	} else {
-		this->bbt_td->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
-					NAND_BBT_VERSION;
-		if (inftl_bbt_write)
-			this->bbt_td->options |= NAND_BBT_WRITE;
-		this->bbt_td->offs = 8;
-		this->bbt_td->len = 8;
-		this->bbt_td->veroffs = 7;
-		this->bbt_td->maxblocks = INFTL_BBT_RESERVED_BLOCKS;
-		this->bbt_td->reserved_block_code = 0x01;
-		this->bbt_td->pattern = "MSYS_BBT";
-
-		this->bbt_md->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
-					NAND_BBT_VERSION;
-		if (inftl_bbt_write)
-			this->bbt_md->options |= NAND_BBT_WRITE;
-		this->bbt_md->offs = 8;
-		this->bbt_md->len = 8;
-		this->bbt_md->veroffs = 7;
-		this->bbt_md->maxblocks = INFTL_BBT_RESERVED_BLOCKS;
-		this->bbt_md->reserved_block_code = 0x01;
-		this->bbt_md->pattern = "TBB_SYSM";
-	}
-
-	/* It's safe to set bd=NULL below because NAND_BBT_CREATE is not set.
-	   At least as nand_bbt.c is currently written. */
-	if ((ret = nand_scan_bbt(mtd, NULL)))
-		return ret;
-	memset((char *) parts, 0, sizeof(parts));
-	numparts = inftl_partscan(mtd, parts);
-	/* At least for now, require the INFTL Media Header.  We could probably
-	   do without it for non-INFTL use, since all it gives us is
-	   autopartitioning, but I want to give it more thought. */
-	if (!numparts) return -EIO;
-	add_mtd_device(mtd, "nand");
-#ifdef CONFIG_MTD_PARTITIONS
-	if (!no_autopart)
-		add_mtd_partitions(mtd, parts, numparts);
-#endif
-	return 0;
-}
-
-static inline int __init doc2000_init(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-
-	this->write_byte = doc2000_write_byte;
-	this->read_byte = doc2000_read_byte;
-	this->write_buf = doc2000_writebuf;
-	this->read_buf = doc2000_readbuf;
-	this->verify_buf = doc2000_verifybuf;
-	this->scan_bbt = nftl_scan_bbt;
-
-	doc->CDSNControl = CDSN_CTRL_FLASH_IO | CDSN_CTRL_ECC_IO;
-	doc2000_count_chips(mtd);
-	mtd->name = "DiskOnChip 2000 (NFTL Model)";
-	return (4 * doc->chips_per_floor);
-}
-
-static inline int __init doc2001_init(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-
-	this->write_byte = doc2001_write_byte;
-	this->read_byte = doc2001_read_byte;
-	this->write_buf = doc2001_writebuf;
-	this->read_buf = doc2001_readbuf;
-	this->verify_buf = doc2001_verifybuf;
-
-	ReadDOC(doc->virtadr, ChipID);
-	ReadDOC(doc->virtadr, ChipID);
-	ReadDOC(doc->virtadr, ChipID);
-	if (ReadDOC(doc->virtadr, ChipID) != DOC_ChipID_DocMil) {
-		/* It's not a Millennium; it's one of the newer
-		   DiskOnChip 2000 units with a similar ASIC.
-		   Treat it like a Millennium, except that it
-		   can have multiple chips. */
-		doc2000_count_chips(mtd);
-		mtd->name = "DiskOnChip 2000 (INFTL Model)";
-		this->scan_bbt = inftl_scan_bbt;
-		return (4 * doc->chips_per_floor);
-	} else {
-		/* Bog-standard Millennium */
-		doc->chips_per_floor = 1;
-		mtd->name = "DiskOnChip Millennium";
-		this->scan_bbt = nftl_scan_bbt;
-		return 1;
-	}
-}
-
-static inline int __init doc2001plus_init(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-
-	this->write_byte = NULL;
-	this->read_byte = doc2001plus_read_byte;
-	this->write_buf = doc2001plus_writebuf;
-	this->read_buf = doc2001plus_readbuf;
-	this->verify_buf = doc2001plus_verifybuf;
-	this->scan_bbt = inftl_scan_bbt;
-	this->hwcontrol = NULL;
-	this->select_chip = doc2001plus_select_chip;
-	this->cmdfunc = doc2001plus_command;
-	this->enable_hwecc = doc2001plus_enable_hwecc;
-
-	doc->chips_per_floor = 1;
-	mtd->name = "DiskOnChip Millennium Plus";
-
-	return 1;
-}
-
-static inline int __init doc_probe(unsigned long physadr)
-{
-	unsigned char ChipID;
-	struct mtd_info *mtd;
-	struct nand_chip *nand;
-	struct doc_priv *doc;
-	void __iomem *virtadr;
-	unsigned char save_control;
-	unsigned char tmp, tmpb, tmpc;
-	int reg, len, numchips;
-	int ret = 0;
-
-	virtadr = ioremap(physadr, DOC_IOREMAP_LEN);
-	if (!virtadr) {
-		printk(KERN_ERR "Diskonchip ioremap failed: 0x%x bytes at 0x%lx\n", DOC_IOREMAP_LEN, physadr);
-		return -EIO;
-	}
-
-	/* It's not possible to cleanly detect the DiskOnChip - the
-	 * bootup procedure will put the device into reset mode, and
-	 * it's not possible to talk to it without actually writing
-	 * to the DOCControl register. So we store the current contents
-	 * of the DOCControl register's location, in case we later decide
-	 * that it's not a DiskOnChip, and want to put it back how we
-	 * found it.
-	 */
-	save_control = ReadDOC(virtadr, DOCControl);
-
-	/* Reset the DiskOnChip ASIC */
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
-		 virtadr, DOCControl);
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
-		 virtadr, DOCControl);
-
-	/* Enable the DiskOnChip ASIC */
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
-		 virtadr, DOCControl);
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
-		 virtadr, DOCControl);
-
-	ChipID = ReadDOC(virtadr, ChipID);
-
-	switch(ChipID) {
-	case DOC_ChipID_Doc2k:
-		reg = DoC_2k_ECCStatus;
-		break;
-	case DOC_ChipID_DocMil:
-		reg = DoC_ECCConf;
-		break;
-	case DOC_ChipID_DocMilPlus16:
-	case DOC_ChipID_DocMilPlus32:
-	case 0:
-		/* Possible Millennium Plus, need to do more checks */
-		/* Possibly release from power down mode */
-		for (tmp = 0; (tmp < 4); tmp++)
-			ReadDOC(virtadr, Mplus_Power);
-
-		/* Reset the Millennium Plus ASIC */
-		tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
-			DOC_MODE_BDECT;
-		WriteDOC(tmp, virtadr, Mplus_DOCControl);
-		WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
-
-		mdelay(1);
-		/* Enable the Millennium Plus ASIC */
-		tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
-			DOC_MODE_BDECT;
-		WriteDOC(tmp, virtadr, Mplus_DOCControl);
-		WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
-		mdelay(1);
-
-		ChipID = ReadDOC(virtadr, ChipID);
-
-		switch (ChipID) {
-		case DOC_ChipID_DocMilPlus16:
-			reg = DoC_Mplus_Toggle;
-			break;
-		case DOC_ChipID_DocMilPlus32:
-			printk(KERN_ERR "DiskOnChip Millennium Plus 32MB is not supported, ignoring.\n");
-		default:
-			ret = -ENODEV;
-			goto notfound;
-		}
-		break;
-
-	default:
-		ret = -ENODEV;
-		goto notfound;
-	}
-	/* Check the TOGGLE bit in the ECC register */
-	tmp  = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
-	tmpb = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
-	tmpc = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
-	if ((tmp == tmpb) || (tmp != tmpc)) {
-		printk(KERN_WARNING "Possible DiskOnChip at 0x%lx failed TOGGLE test, dropping.\n", physadr);
-		ret = -ENODEV;
-		goto notfound;
-	}
-
-	for (mtd = doclist; mtd; mtd = doc->nextdoc) {
-		unsigned char oldval;
-		unsigned char newval;
-		nand = mtd->priv;
-		doc = nand->priv;
-		/* Use the alias resolution register to determine if this is
-		   in fact the same DOC aliased to a new address.  If writes
-		   to one chip's alias resolution register change the value on
-		   the other chip, they're the same chip. */
-		if (ChipID == DOC_ChipID_DocMilPlus16) {
-			oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
-			newval = ReadDOC(virtadr, Mplus_AliasResolution);
-		} else {
-			oldval = ReadDOC(doc->virtadr, AliasResolution);
-			newval = ReadDOC(virtadr, AliasResolution);
-		}
-		if (oldval != newval)
-			continue;
-		if (ChipID == DOC_ChipID_DocMilPlus16) {
-			WriteDOC(~newval, virtadr, Mplus_AliasResolution);
-			oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
-			WriteDOC(newval, virtadr, Mplus_AliasResolution); /* restore it */
-		} else {
-			WriteDOC(~newval, virtadr, AliasResolution);
-			oldval = ReadDOC(doc->virtadr, AliasResolution);
-			WriteDOC(newval, virtadr, AliasResolution); /* restore it */
-		}
-		newval = ~newval;
-		if (oldval == newval) {
-			printk(KERN_DEBUG "Found alias of DOC at 0x%lx to 0x%lx\n", doc->physadr, physadr);
-			goto notfound;
-		}
-	}
-
-	printk(KERN_NOTICE "DiskOnChip found at 0x%lx\n", physadr);
-
-	len = sizeof(struct mtd_info) +
-	      sizeof(struct nand_chip) +
-	      sizeof(struct doc_priv) +
-	      (2 * sizeof(struct nand_bbt_descr));
-	mtd =  kmalloc(len, GFP_KERNEL);
-	if (!mtd) {
-		printk(KERN_ERR "DiskOnChip kmalloc (%d bytes) failed!\n", len);
-		ret = -ENOMEM;
-		goto fail;
-	}
-	memset(mtd, 0, len);
-
-	nand			= (struct nand_chip *) (mtd + 1);
-	doc			= (struct doc_priv *) (nand + 1);
-	nand->bbt_td		= (struct nand_bbt_descr *) (doc + 1);
-	nand->bbt_md		= nand->bbt_td + 1;
-
-	mtd->priv		= nand;
-	mtd->owner		= THIS_MODULE;
-
-	nand->priv		= doc;
-	nand->select_chip	= doc200x_select_chip;
-	nand->hwcontrol		= doc200x_hwcontrol;
-	nand->dev_ready		= doc200x_dev_ready;
-	nand->waitfunc		= doc200x_wait;
-	nand->block_bad		= doc200x_block_bad;
-	nand->enable_hwecc	= doc200x_enable_hwecc;
-	nand->calculate_ecc	= doc200x_calculate_ecc;
-	nand->correct_data	= doc200x_correct_data;
-
-	nand->autooob		= &doc200x_oobinfo;
-	nand->eccmode		= NAND_ECC_HW6_512;
-	nand->options		= NAND_USE_FLASH_BBT | NAND_HWECC_SYNDROME;
-
-	doc->physadr		= physadr;
-	doc->virtadr		= virtadr;
-	doc->ChipID		= ChipID;
-	doc->curfloor		= -1;
-	doc->curchip		= -1;
-	doc->mh0_page		= -1;
-	doc->mh1_page		= -1;
-	doc->nextdoc		= doclist;
-
-	if (ChipID == DOC_ChipID_Doc2k)
-		numchips = doc2000_init(mtd);
-	else if (ChipID == DOC_ChipID_DocMilPlus16)
-		numchips = doc2001plus_init(mtd);
-	else
-		numchips = doc2001_init(mtd);
-
-	if ((ret = nand_scan(mtd, numchips))) {
-		/* DBB note: i believe nand_release is necessary here, as
-		   buffers may have been allocated in nand_base.  Check with
-		   Thomas. FIX ME! */
-		/* nand_release will call del_mtd_device, but we haven't yet
-		   added it.  This is handled without incident by
-		   del_mtd_device, as far as I can tell. */
-		nand_release(mtd);
-		kfree(mtd);
-		goto fail;
-	}
-
-	/* Success! */
-	doclist = mtd;
-	return 0;
-
-notfound:
-	/* Put back the contents of the DOCControl register, in case it's not
-	   actually a DiskOnChip.  */
-	WriteDOC(save_control, virtadr, DOCControl);
-fail:
-	iounmap(virtadr);
-	return ret;
-}
-
-static void release_nanddoc(void)
-{
- 	struct mtd_info *mtd, *nextmtd;
-	struct nand_chip *nand;
-	struct doc_priv *doc;
-
-	for (mtd = doclist; mtd; mtd = nextmtd) {
-		nand = mtd->priv;
-		doc = nand->priv;
-
-		nextmtd = doc->nextdoc;
-		nand_release(mtd);
-		iounmap(doc->virtadr);
-		kfree(mtd);
-	}
-}
-
-static int __init init_nanddoc(void)
-{
-	int i, ret = 0;
-
-	/* We could create the decoder on demand, if memory is a concern.
-	 * This way we have it handy, if an error happens
-	 *
-	 * Symbolsize is 10 (bits)
-	 * Primitve polynomial is x^10+x^3+1
-	 * first consecutive root is 510
-	 * primitve element to generate roots = 1
-	 * generator polinomial degree = 4
-	 */
-	rs_decoder = init_rs(10, 0x409, FCR, 1, NROOTS);
- 	if (!rs_decoder) {
-		printk (KERN_ERR "DiskOnChip: Could not create a RS decoder\n");
-		return -ENOMEM;
-	}
-
-	if (doc_config_location) {
-		printk(KERN_INFO "Using configured DiskOnChip probe address 0x%lx\n", doc_config_location);
-		ret = doc_probe(doc_config_location);
-		if (ret < 0)
-			goto outerr;
-	} else {
-		for (i=0; (doc_locations[i] != 0xffffffff); i++) {
-			doc_probe(doc_locations[i]);
-		}
-	}
-	/* No banner message any more. Print a message if no DiskOnChip
-	   found, so the user knows we at least tried. */
-	if (!doclist) {
-		printk(KERN_INFO "No valid DiskOnChip devices found\n");
-		ret = -ENODEV;
-		goto outerr;
-	}
-	return 0;
-outerr:
-	free_rs(rs_decoder);
-	return ret;
-}
-
-static void __exit cleanup_nanddoc(void)
-{
-	/* Cleanup the nand/DoC resources */
-	release_nanddoc();
-
-	/* Free the reed solomon resources */
-	if (rs_decoder) {
-		free_rs(rs_decoder);
-	}
-}
-
-module_init(init_nanddoc);
-module_exit(cleanup_nanddoc);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("David Woodhouse <dwmw2 at infradead.org>");
-MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n");
-#endif
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:36 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:36 +0200
Subject: [PATCH 06/30] Add missing semicolons at end of EXPORT_SYMBOL
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-6-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mfd/mc34704.c  |    4 ++--
 drivers/mfd/mc9sdz60.c |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/mfd/mc34704.c b/drivers/mfd/mc34704.c
index 20c01e2..0432a98 100644
--- a/drivers/mfd/mc34704.c
+++ b/drivers/mfd/mc34704.c
@@ -52,7 +52,7 @@ int mc34704_reg_read(struct mc34704 *mc34704, u8 reg, u8 *val)
 
 	return ret == 1 ? 0 : ret;
 }
-EXPORT_SYMBOL(mc34704_reg_read)
+EXPORT_SYMBOL(mc34704_reg_read);
 
 int mc34704_reg_write(struct mc34704 *mc34704, u8 reg, u8 val)
 {
@@ -62,7 +62,7 @@ int mc34704_reg_write(struct mc34704 *mc34704, u8 reg, u8 val)
 
 	return ret == 1 ? 0 : ret;
 }
-EXPORT_SYMBOL(mc34704_reg_write)
+EXPORT_SYMBOL(mc34704_reg_write);
 
 static ssize_t mc34704_read(struct cdev *cdev, void *_buf, size_t count,
 		loff_t offset, ulong flags)
diff --git a/drivers/mfd/mc9sdz60.c b/drivers/mfd/mc9sdz60.c
index 0cd5007..75d0789 100644
--- a/drivers/mfd/mc9sdz60.c
+++ b/drivers/mfd/mc9sdz60.c
@@ -51,7 +51,7 @@ int mc9sdz60_reg_read(struct mc9sdz60 *mc9sdz60, enum mc9sdz60_reg reg, u8 *val)
 
 	return ret == 1 ? 0 : ret;
 }
-EXPORT_SYMBOL(mc9sdz60_reg_read)
+EXPORT_SYMBOL(mc9sdz60_reg_read);
 
 int mc9sdz60_reg_write(struct mc9sdz60 *mc9sdz60, enum mc9sdz60_reg reg, u8 val)
 {
@@ -61,7 +61,7 @@ int mc9sdz60_reg_write(struct mc9sdz60 *mc9sdz60, enum mc9sdz60_reg reg, u8 val)
 
 	return ret == 1 ? 0 : ret;
 }
-EXPORT_SYMBOL(mc9sdz60_reg_write)
+EXPORT_SYMBOL(mc9sdz60_reg_write);
 
 int mc9sdz60_set_bits(struct mc9sdz60 *mc9sdz60, enum mc9sdz60_reg reg, u8 mask, u8 val)
 {
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:40 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:40 +0200
Subject: [PATCH 10/30] mfd TWL4030: Fix Kconfig dependencies
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-10-git-send-email-s.hauer@pengutronix.de>

The twl core does not depend on the twl usb support. It's the other
way round.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mfd/Kconfig     |    1 -
 drivers/usb/otg/Kconfig |    1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 57f4003..af67935 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -25,7 +25,6 @@ config I2C_TWLCORE
 
 config I2C_TWL4030
 	depends on I2C
-	depends on USB_TWL4030
 	select I2C_TWLCORE
 	bool "TWL4030 driver"
 
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index d871677..892c21e 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -4,4 +4,5 @@ config USB_ULPI
 	  Support for transceivers that conforms ULPI specification.
 
 config USB_TWL4030
+	depends on I2C_TWL4030
 	bool "TWL4030 Transceiver support"
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:50 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:50 +0200
Subject: [PATCH 20/30] usb gadget: Enable gadget support only when a driver is
 available
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-20-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/usb/gadget/Kconfig |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 4eb2f62..f7f2697 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -1,6 +1,11 @@
 menuconfig USB_GADGET
+	depends on USB_HAVE_GADGET_DRIVER
 	bool "USB gadget support            "
 
+config USB_HAVE_GADGET_DRIVER
+	bool
+	default y if ARCH_IMX || ARCH_AT91 || ARCH_PXA
+
 if USB_GADGET
 
 config USB_GADGET_DUALSPEED
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:42 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:42 +0200
Subject: [PATCH 12/30] fs nfs: depend on net
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-12-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 fs/Kconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/fs/Kconfig b/fs/Kconfig
index 34fcdf3..b75820f 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -25,6 +25,7 @@ config FS_TFTP
 	depends on NET
 
 config FS_NFS
+	depends on NET
 	bool
 	prompt "nfs support"
 
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:48 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:48 +0200
Subject: [PATCH 18/30] ARM: remove mx1ads leftovers
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-18-git-send-email-s.hauer@pengutronix.de>

We have no mx1ads support in the tree, so remove the remaining bits from
Kconfig.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/Makefile         |    1 -
 arch/arm/mach-imx/Kconfig |    7 -------
 2 files changed, 8 deletions(-)

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..b2f4ce6 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -94,7 +94,6 @@ board-$(CONFIG_MACH_IMX21ADS)			:= imx21ads
 board-$(CONFIG_MACH_IMX27ADS)			:= imx27ads
 board-$(CONFIG_MACH_MIOA701)			:= mioa701
 board-$(CONFIG_MACH_MMCCPU)			:= mmccpu
-board-$(CONFIG_MACH_MX1ADS)			:= mx1ads
 board-$(CONFIG_MACH_NOMADIK_8815NHK)		:= nhk8815
 board-$(CONFIG_MACH_NXDB500)			:= netx
 board-$(CONFIG_MACH_OMAP343xSDP)		:= omap343xdsp
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b77245..aa4ab7b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -6,7 +6,6 @@ config ARCH_TEXT_BASE
 	default 0xa0000000 if MACH_EUKREA_CPUIMX27
 	default 0x87f00000 if MACH_EUKREA_CPUIMX35
 	default 0x97f00000 if MACH_EUKREA_CPUIMX51SD
-	default 0x08f00000 if MACH_MX1ADS
 	default 0xc0000000 if MACH_IMX21ADS
 	default 0xa0000000 if MACH_IMX27ADS
 	default 0x83f00000 if MACH_FREESCALE_MX25_3STACK && FREESCALE_MX25_3STACK_SDRAM_64MB_DDR2
@@ -186,12 +185,6 @@ choice
 
 	prompt "i.MX1 Board Type"
 
-config MACH_MX1ADS
-	bool "mx1ads"
-	select HAS_CS8900
-	help
-	  Say Y here if you are using the Motorola MX1ADS board
-
 config MACH_SCB9328
 	bool "Synertronixx scb9328"
 	select HAS_DM9000
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:49 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:49 +0200
Subject: [PATCH 19/30] usb gadget at91: Use correct include
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-19-git-send-email-s.hauer@pengutronix.de>

include gpio.h instead of mach/gpio.h

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/usb/gadget/at91_udc.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index bb0d614..abd96c7 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -17,6 +17,7 @@
 #include <common.h>
 #include <errno.h>
 #include <init.h>
+#include <gpio.h>
 #include <clock.h>
 #include <usb/ch9.h>
 #include <usb/gadget.h>
@@ -32,7 +33,6 @@
 #include <mach/io.h>
 #include <mach/board.h>
 #include <mach/cpu.h>
-#include <mach/gpio.h>
 #include <mach/at91sam9261_matrix.h>
 
 #include "at91_udc.h"
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:34 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:34 +0200
Subject: [PATCH 04/30] uimage: introduce UIMAGE Kconfig symbol
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-4-git-send-email-s.hauer@pengutronix.de>

Both the uimage command and the bootm command need uImage support, so
add a Kconfig symbol for it to be able to select it properly.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/Kconfig |    2 ++
 common/Kconfig   |    3 +++
 common/Makefile  |    4 ++--
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/commands/Kconfig b/commands/Kconfig
index 2478e3f..92a8152 100644
--- a/commands/Kconfig
+++ b/commands/Kconfig
@@ -349,6 +349,7 @@ config CMD_BOOTM
 	tristate
 	default y
 	select CRC32
+	select UIMAGE
 	select UNCOMPRESS
 	select FILETYPE
 	select GLOBALVAR
@@ -397,6 +398,7 @@ config CMD_BOOTM_AIMAGE
 	  Support using Android Images.
 
 config CMD_UIMAGE
+	select UIMAGE
 	tristate
 	prompt "uimage"
 	help
diff --git a/common/Kconfig b/common/Kconfig
index b776031..9e4f6b3 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -47,6 +47,9 @@ config BINFMT
 	bool
 	select FILETYPE
 
+config UIMAGE
+	bool
+
 config GLOBALVAR
 	bool
 
diff --git a/common/Makefile b/common/Makefile
index a1926d3..d99dfa2 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -24,8 +24,8 @@ obj-$(CONFIG_CONSOLE_FULL) += console.o
 obj-$(CONFIG_CONSOLE_SIMPLE) += console_simple.o
 obj-$(CONFIG_DIGEST) += digest.o
 obj-$(CONFIG_ENVIRONMENT_VARIABLES) += env.o
-obj-$(CONFIG_CMD_BOOTM) += image.o
-obj-$(CONFIG_CMD_BOOTM) += uimage.o
+obj-$(CONFIG_UIMAGE) += image.o
+obj-$(CONFIG_UIMAGE) += uimage.o
 obj-y += startup.o
 obj-y += misc.o
 obj-y += memsize.o
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:44 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:44 +0200
Subject: [PATCH 14/30] led: remove gpio include
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-14-git-send-email-s.hauer@pengutronix.de>

The LED core itself does not need gpio support, so remove include
so that it compiles on architectures without gpio support.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/led/core.c |    1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/led/core.c b/drivers/led/core.c
index 748a978..0319b4e 100644
--- a/drivers/led/core.c
+++ b/drivers/led/core.c
@@ -26,7 +26,6 @@
 #include <command.h>
 #include <linux/list.h>
 #include <errno.h>
-#include <asm/gpio.h>
 #include <led.h>
 #include <poller.h>
 #include <clock.h>
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:39 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:39 +0200
Subject: [PATCH 09/30] loadb: fix compilation
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-9-git-send-email-s.hauer@pengutronix.de>

'ofd' is always needed, even if LOADB is not selected.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/loadb.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/commands/loadb.c b/commands/loadb.c
index 9a697dd..50f323e 100644
--- a/commands/loadb.c
+++ b/commands/loadb.c
@@ -61,10 +61,10 @@
 #define untochar(x)	((int) (((x) - SPACE) & 0xff))
 #define DEF_FILE	"image.bin"
 
-#ifdef CONFIG_CMD_LOADB
-
 static int ofd;			/* output file descriptor */
 
+#ifdef CONFIG_CMD_LOADB
+
 /* Size of my buffer to write to o/p file */
 #define MAX_WRITE_BUFFER 4096	/* Write size to o/p file */
 static char *write_buffer;	/* buffer for finalized data to write */
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:37 +0200
Subject: [PATCH 07/30] exec command: Fix compilation
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-7-git-send-email-s.hauer@pengutronix.de>

read_file and run_command take an additional argument now.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/exec.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/commands/exec.c b/commands/exec.c
index a25e8cf..e2509ff 100644
--- a/commands/exec.c
+++ b/commands/exec.c
@@ -38,11 +38,11 @@ static int do_exec(int argc, char *argv[])
 		return COMMAND_ERROR_USAGE;
 
 	for (i=1; i<argc; ++i) {
-		script = read_file(argv[i]);
+		script = read_file(argv[i], NULL);
 		if (!script)
 			return 1;
 
-		if (run_command (script, flag) == -1)
+		if (run_command (script, 0) == -1)
 			goto out;
 		free(script);
 	}
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:52 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:52 +0200
Subject: [PATCH 22/30] ARM i.MX: No external NAND boot on i.MX1
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-22-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/Kconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index aa4ab7b..9afd615 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -109,6 +109,7 @@ config NAND_IMX_BOOT
 
 config ARCH_IMX_EXTERNAL_BOOT_NAND
 	bool
+	depends on !ARCH_IMX1
 	prompt "Support Starting barebox from NAND"
 	depends on ARCH_IMX_EXTERNAL_BOOT
 
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:33 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:33 +0200
Subject: [PATCH 03/30] bootm: Fix undefined reference to of_fix_tree
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-3-git-send-email-s.hauer@pengutronix.de>

It's only available when oftree support is enabled.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/lib/bootm.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 3a00437..a8840fe 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -399,7 +399,7 @@ static int do_bootm_aimage(struct image_data *data)
 	if (!getenv("aimage_noverwrite_tags"))
 		armlinux_set_bootparams((void*)header->tags_addr);
 
-	if (data->oftree) {
+	if (IS_ENABLED(CONFIG_OFTREE) && data->oftree) {
 		ret = of_fix_tree(data->oftree);
 		if (ret)
 			goto err_out;
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:41 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:41 +0200
Subject: [PATCH 11/30] pwm PXA: Compile only on PXA
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-11-git-send-email-s.hauer@pengutronix.de>

The PXA PWM driver does not compile on any other architecture, so
depend on PXA.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/pwm/Kconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index 50c956a..fc08363 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -11,6 +11,7 @@ if PWM
 config PWM_PXA
 	bool "PXA PWM Support"
 	default y if ARCH_PXA2XX
+	depends on ARCH_PXA2XX
 	help
 	  This enables PWM support for Intel/Marvell PXA chips, such
 	  as the PXA25x, PXA27x.
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:32 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:32 +0200
Subject: [PATCH 02/30] ARM: let armlinux_set_* depend on the correct option
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-2-git-send-email-s.hauer@pengutronix.de>

We need inline versions of armlinux_set* exactly when
CONFIG_ARM_LINUX is not set, because this is the symbol
used to compile the non inline versions.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/include/asm/armlinux.h |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/armlinux.h b/arch/arm/include/asm/armlinux.h
index 9ca1e4b..8ec8c4d 100644
--- a/arch/arm/include/asm/armlinux.h
+++ b/arch/arm/include/asm/armlinux.h
@@ -3,8 +3,7 @@
 
 #include <asm/memory.h>
 
-#if defined CONFIG_CMD_BOOTM || defined CONFIG_CMD_BOOTZ || \
-	defined CONFIG_CMD_BOOTU
+#if defined CONFIG_ARM_LINUX
 void armlinux_set_bootparams(void *params);
 void armlinux_set_architecture(int architecture);
 void armlinux_set_revision(unsigned int);
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:35 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:35 +0200
Subject: [PATCH 05/30] ARM at91rm9200: Add missing include
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-5-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-at91/at91rm9200_devices.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index d5268dd..3bfa08e 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -17,6 +17,7 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/io.h>
+#include <mach/at91rm9200_mc.h>
 #include <sizes.h>
 
 #include "generic.h"
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:46 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:46 +0200
Subject: [PATCH 16/30] ARM Samsung S5P: Disable support until we have a board
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-16-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/Kconfig |   14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index af4cb59..9590db9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -72,12 +72,14 @@ config ARCH_S3C24xx
 	select ARCH_SAMSUNG
 	select CPU_ARM920T
 	select GENERIC_GPIO
-
-config ARCH_S5PCxx
-	bool "Samsung S5PC110, S5PV210"
-	select ARCH_SAMSUNG
-	select CPU_V7
-	select GENERIC_GPIO
+#
+# Currently no board support
+#
+#config ARCH_S5PCxx
+#	bool "Samsung S5PC110, S5PV210"
+#	select ARCH_SAMSUNG
+#	select CPU_V7
+#	select GENERIC_GPIO
 
 config ARCH_VERSATILE
 	bool "ARM Versatile boards (ARM926EJ-S)"
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:31 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:31 +0200
Subject: [PATCH 01/30] USB: Fix typo tranceiver -> transceiver
Message-ID: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

Conflicts:

	drivers/usb/otg/Kconfig

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/usb/otg/Kconfig |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index 2c5b789..d871677 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -1,7 +1,7 @@
 config USB_ULPI
-	bool "ULPI Tranceiver support"
+	bool "ULPI Transceiver support"
 	help
-	  Support for tranceivers that conforms ULPI specification.
+	  Support for transceivers that conforms ULPI specification.
 
 config USB_TWL4030
-	bool "TWL4030 Tranceiver support"
+	bool "TWL4030 Transceiver support"
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:43 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:43 +0200
Subject: [PATCH 13/30] mtd nand: Fix compilation without bbt support
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-13-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/nand/nand_write.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/nand_write.c b/drivers/mtd/nand/nand_write.c
index 13b6c89..5ed04ce 100644
--- a/drivers/mtd/nand/nand_write.c
+++ b/drivers/mtd/nand/nand_write.c
@@ -72,7 +72,7 @@ int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
 		chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
 
 	/* Do we have a flash based bad block table ? */
-	if (chip->options & NAND_USE_FLASH_BBT)
+	if (IS_ENABLED(CONFIG_NAND_BBT) && chip->options & NAND_USE_FLASH_BBT)
 		ret = nand_update_bbt(mtd, ofs);
 	else {
 		/* We write two bytes, so we dont have to mess with 16 bit
@@ -711,6 +711,9 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
 	if (bbt_masked_page == 0xffffffff || ret)
 		return ret;
 
+	if (!IS_ENABLED(CONFIG_NAND_BBT))
+		return ret;
+
 	for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
 		if (!rewrite_bbt[chipnr])
 			continue;
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:45 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:45 +0200
Subject: [PATCH 15/30] kconfig: fix IS_ENABLED to not require all options to
 be defined
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-15-git-send-email-s.hauer@pengutronix.de>

>From Linux commit 69349c2dc01c489eccaa4c472542c08e370c6d7e:

    Using IS_ENABLED() within C (vs.  within CPP #if statements) in its
    current form requires us to actually define every possible bool/tristate
    Kconfig option twice (__enabled_* and __enabled_*_MODULE variants).

    This results in a huge autoconf.h file, on the order of 16k lines for a
    x86_64 defconfig.

    Fixing IS_ENABLED to be able to work on the smaller subset of just
    things that we really have defined is step one to fixing this.  Which
    means it has to not choke when fed non-enabled options, such as:

      include/linux/netdevice.h:964:1: warning: "__enabled_CONFIG_FCOE_MODULE" is not defined [-Wundef]

    The original prototype of how to implement a C and preprocessor
    compatible way of doing this came from the Google+ user "comex ." in
    response to Linus' crowdsourcing challenge for a possible improvement on
    his earlier C specific solution:

    	#define config_enabled(x)       (__stringify(x)[0] == '1')

    In this implementation, I've chosen variable names that hopefully make
    how it works more understandable.

    Signed-off-by: Paul Gortmaker <paul.gortmaker at windriver.com>
    Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 include/linux/kconfig.h |   20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
index 067eda0..cb17ee2 100644
--- a/include/linux/kconfig.h
+++ b/include/linux/kconfig.h
@@ -9,24 +9,38 @@
  */
 
 /*
+ * Getting something that works in C and CPP for an arg that may or may
+ * not be defined is tricky.  Here, if we have "#define CONFIG_BOOGER 1"
+ * we match on the placeholder define, insert the "0," for arg1 and generate
+ * the triplet (0, 1, 0).  Then the last step cherry picks the 2nd arg (a one).
+ * When CONFIG_BOOGER is not defined, we generate a (... 1, 0) pair, and when
+ * the last step cherry picks the 2nd arg, we get a zero.
+ */
+#define __ARG_PLACEHOLDER_1 0,
+#define config_enabled(cfg) _config_enabled(cfg)
+#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value)
+#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0)
+#define ___config_enabled(__ignored, val, ...) val
+
+/*
  * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm',
  * 0 otherwise.
  *
  */
 #define IS_ENABLED(option) \
-	(__enabled_ ## option || __enabled_ ## option ## _MODULE)
+	(config_enabled(option) || config_enabled(option##_MODULE))
 
 /*
  * IS_BUILTIN(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', 0
  * otherwise. For boolean options, this is equivalent to
  * IS_ENABLED(CONFIG_FOO).
  */
-#define IS_BUILTIN(option) __enabled_ ## option
+#define IS_BUILTIN(option) config_enabled(option)
 
 /*
  * IS_MODULE(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'm', 0
  * otherwise.
  */
-#define IS_MODULE(option) __enabled_ ## option ## _MODULE
+#define IS_MODULE(option) config_enabled(option##_MODULE)
 
 #endif /* __LINUX_KCONFIG_H */
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:53 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:53 +0200
Subject: [PATCH 23/30] mtd: remove dead disk-on-chip support
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-23-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/nand/Kconfig      |   32 -
 drivers/mtd/nand/Makefile     |    1 -
 drivers/mtd/nand/diskonchip.c | 1787 -----------------------------------------
 3 files changed, 1820 deletions(-)
 delete mode 100644 drivers/mtd/nand/diskonchip.c

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 3f90643..6889b44 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -105,38 +105,6 @@ config MTD_NAND_MUSEUM_IDS
 config MTD_NAND_IDS
 	tristate
 
-config MTD_NAND_DISKONCHIP
-	tristate "DiskOnChip 2000, Millennium and Millennium Plus"
-	depends on EXPERIMENTAL && BROKEN
-	help
-	  This is a reimplementation of M-Systems DiskOnChip 2000,
-	  Millennium and Millennium Plus as a standard NAND device driver,
-	  as opposed to the earlier self-contained MTD device drivers.
-	  This should enable, among other things, proper JFFS2 operation on
-	  these devices.
-
-config MTD_NAND_DISKONCHIP_BBTWRITE
-	bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
-	depends on MTD_NAND_DISKONCHIP
-	help
-	  On DiskOnChip devices shipped with the INFTL filesystem (Millennium
-	  and 2000 TSOP/Alon), Linux reserves some space at the end of the
-	  device for the Bad Block Table (BBT).  If you have existing INFTL
-	  data on your device (created by non-Linux tools such as M-Systems'
-	  DOS drivers), your data might overlap the area Linux wants to use for
-	  the BBT.  If this is a concern for you, leave this option disabled and
-	  Linux will not write BBT data into this area.
-	  The downside of leaving this option disabled is that if bad blocks
-	  are detected by Linux, they will not be recorded in the BBT, which
-	  could cause future problems.
-	  Once you enable this option, new filesystems (INFTL or others, created
-	  in Linux or other operating systems) will not use the reserved area.
-	  The only reason not to enable this option is to prevent damage to
-	  preexisting filesystems.
-	  Even if you leave this disabled, you can enable BBT writes at module
-	  load time (assuming you build diskonchip as a module) with the module
-	  parameter "inftl_bbt_write=1".
-
 config MTD_NAND_NOMADIK
 	tristate "ST Nomadik 8815 NAND support"
 	depends on ARCH_NOMADIK
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 4179618..9d46bc0 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_MTD_NAND_IDS)		+= nand_ids.o
 obj-$(CONFIG_NAND)			+= nand_base.o nand-bb.o
 obj-$(CONFIG_NAND_BBT)			+= nand_bbt.o
 
-obj-$(CONFIG_MTD_NAND_DISKONCHIP)	+= diskonchip.o
 obj-$(CONFIG_MTD_NAND_NOMADIK)		+= nomadik_nand.o
 obj-$(CONFIG_NAND_IMX)			+= nand_imx.o
 obj-$(CONFIG_NAND_OMAP_GPMC)		+= nand_omap_gpmc.o nand_omap_bch_decoder.o
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
deleted file mode 100644
index 6da68dc..0000000
--- a/drivers/mtd/nand/diskonchip.c
+++ /dev/null
@@ -1,1787 +0,0 @@
-/*
- * drivers/mtd/nand/diskonchip.c
- *
- * (C) 2003 Red Hat, Inc.
- * (C) 2004 Dan Brown <dan_brown at ieee.org>
- * (C) 2004 Kalev Lember <kalev at smartlink.ee>
- *
- * Author: David Woodhouse <dwmw2 at infradead.org>
- * Additional Diskonchip 2000 and Millennium support by Dan Brown <dan_brown at ieee.org>
- * Diskonchip Millennium Plus support by Kalev Lember <kalev at smartlink.ee>
- *
- * Error correction code lifted from the old docecc code
- * Author: Fabrice Bellard (fabrice.bellard at netgem.com)
- * Copyright (C) 2000 Netgem S.A.
- * converted to the generic Reed-Solomon library by Thomas Gleixner <tglx at linutronix.de>
- *
- * Interface to generic NAND code for M-Systems DiskOnChip devices
- *
- * $Id: diskonchip.c,v 1.45 2005/01/05 18:05:14 dwmw2 Exp $
- */
-
-#include <common.h>
-
-#if !defined(CFG_NAND_LEGACY)
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <linux/rslib.h>
-#include <linux/moduleparam.h>
-#include <io.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/doc2000.h>
-#include <linux/mtd/compatmac.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/inftl.h>
-
-/* Where to look for the devices? */
-#ifndef CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS
-#define CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS 0
-#endif
-
-static unsigned long __initdata doc_locations[] = {
-#if defined (__alpha__) || defined(__i386__) || defined(__x86_64__)
-#ifdef CONFIG_MTD_DISKONCHIP_PROBE_HIGH
-	0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000,
-	0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000,
-	0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000,
-	0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000,
-	0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000,
-#else /*  CONFIG_MTD_DOCPROBE_HIGH */
-	0xc8000, 0xca000, 0xcc000, 0xce000,
-	0xd0000, 0xd2000, 0xd4000, 0xd6000,
-	0xd8000, 0xda000, 0xdc000, 0xde000,
-	0xe0000, 0xe2000, 0xe4000, 0xe6000,
-	0xe8000, 0xea000, 0xec000, 0xee000,
-#endif /*  CONFIG_MTD_DOCPROBE_HIGH */
-#elif defined(__PPC__)
-	0xe4000000,
-#elif defined(CONFIG_MOMENCO_OCELOT)
-	0x2f000000,
-	0xff000000,
-#elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
-	0xff000000,
-##else
-#warning Unknown architecture for DiskOnChip. No default probe locations defined
-#endif
-	0xffffffff };
-
-static struct mtd_info *doclist = NULL;
-
-struct doc_priv {
-	void __iomem *virtadr;
-	unsigned long physadr;
-	u_char ChipID;
-	u_char CDSNControl;
-	int chips_per_floor; /* The number of chips detected on each floor */
-	int curfloor;
-	int curchip;
-	int mh0_page;
-	int mh1_page;
-	struct mtd_info *nextdoc;
-};
-
-/* Max number of eraseblocks to scan (from start of device) for the (I)NFTL
-   MediaHeader.  The spec says to just keep going, I think, but that's just
-   silly. */
-#define MAX_MEDIAHEADER_SCAN 8
-
-/* This is the syndrome computed by the HW ecc generator upon reading an empty
-   page, one with all 0xff for data and stored ecc code. */
-static u_char empty_read_syndrome[6] = { 0x26, 0xff, 0x6d, 0x47, 0x73, 0x7a };
-/* This is the ecc value computed by the HW ecc generator upon writing an empty
-   page, one with all 0xff for data. */
-static u_char empty_write_ecc[6] = { 0x4b, 0x00, 0xe2, 0x0e, 0x93, 0xf7 };
-
-#define INFTL_BBT_RESERVED_BLOCKS 4
-
-#define DoC_is_MillenniumPlus(doc) ((doc)->ChipID == DOC_ChipID_DocMilPlus16 || (doc)->ChipID == DOC_ChipID_DocMilPlus32)
-#define DoC_is_Millennium(doc) ((doc)->ChipID == DOC_ChipID_DocMil)
-#define DoC_is_2000(doc) ((doc)->ChipID == DOC_ChipID_Doc2k)
-
-static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd);
-static void doc200x_select_chip(struct mtd_info *mtd, int chip);
-
-static int debug=0;
-module_param(debug, int, 0);
-
-static int try_dword=1;
-module_param(try_dword, int, 0);
-
-static int no_ecc_failures=0;
-module_param(no_ecc_failures, int, 0);
-
-#ifdef CONFIG_MTD_PARTITIONS
-static int no_autopart=0;
-module_param(no_autopart, int, 0);
-#endif
-
-#ifdef CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE
-static int inftl_bbt_write=1;
-#else
-static int inftl_bbt_write=0;
-#endif
-module_param(inftl_bbt_write, int, 0);
-
-static unsigned long doc_config_location = CONFIG_MTD_DISKONCHIP_PROBE_ADDRESS;
-module_param(doc_config_location, ulong, 0);
-MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip");
-
-
-/* Sector size for HW ECC */
-#define SECTOR_SIZE 512
-/* The sector bytes are packed into NB_DATA 10 bit words */
-#define NB_DATA (((SECTOR_SIZE + 1) * 8 + 6) / 10)
-/* Number of roots */
-#define NROOTS 4
-/* First consective root */
-#define FCR 510
-/* Number of symbols */
-#define NN 1023
-
-/* the Reed Solomon control structure */
-static struct rs_control *rs_decoder;
-
-/*
- * The HW decoder in the DoC ASIC's provides us a error syndrome,
- * which we must convert to a standard syndrom usable by the generic
- * Reed-Solomon library code.
- *
- * Fabrice Bellard figured this out in the old docecc code. I added
- * some comments, improved a minor bit and converted it to make use
- * of the generic Reed-Solomon libary. tglx
- */
-static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
-{
-	int i, j, nerr, errpos[8];
-	uint8_t parity;
-	uint16_t ds[4], s[5], tmp, errval[8], syn[4];
-
-	/* Convert the ecc bytes into words */
-	ds[0] = ((ecc[4] & 0xff) >> 0) | ((ecc[5] & 0x03) << 8);
-	ds[1] = ((ecc[5] & 0xfc) >> 2) | ((ecc[2] & 0x0f) << 6);
-	ds[2] = ((ecc[2] & 0xf0) >> 4) | ((ecc[3] & 0x3f) << 4);
-	ds[3] = ((ecc[3] & 0xc0) >> 6) | ((ecc[0] & 0xff) << 2);
-	parity = ecc[1];
-
-	/* Initialize the syndrom buffer */
-	for (i = 0; i < NROOTS; i++)
-		s[i] = ds[0];
-	/*
-	 *  Evaluate
-	 *  s[i] = ds[3]x^3 + ds[2]x^2 + ds[1]x^1 + ds[0]
-	 *  where x = alpha^(FCR + i)
-	 */
-	for(j = 1; j < NROOTS; j++) {
-		if(ds[j] == 0)
-			continue;
-		tmp = rs->index_of[ds[j]];
-		for(i = 0; i < NROOTS; i++)
-			s[i] ^= rs->alpha_to[rs_modnn(rs, tmp + (FCR + i) * j)];
-	}
-
-	/* Calc s[i] = s[i] / alpha^(v + i) */
-	for (i = 0; i < NROOTS; i++) {
-		if (syn[i])
- 			syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
-	}
-	/* Call the decoder library */
-	nerr = decode_rs16(rs, NULL, NULL, 1019, syn, 0, errpos, 0, errval);
-
-	/* Incorrectable errors ? */
-	if (nerr < 0)
-		return nerr;
-
-	/*
-	 * Correct the errors. The bitpositions are a bit of magic,
-	 * but they are given by the design of the de/encoder circuit
-	 * in the DoC ASIC's.
-	 */
-	for(i = 0;i < nerr; i++) {
-		int index, bitpos, pos = 1015 - errpos[i];
-		uint8_t val;
-		if (pos >= NB_DATA && pos < 1019)
-			continue;
-		if (pos < NB_DATA) {
-			/* extract bit position (MSB first) */
-			pos = 10 * (NB_DATA - 1 - pos) - 6;
-			/* now correct the following 10 bits. At most two bytes
-			   can be modified since pos is even */
-			index = (pos >> 3) ^ 1;
-			bitpos = pos & 7;
-			if ((index >= 0 && index < SECTOR_SIZE) ||
-			    index == (SECTOR_SIZE + 1)) {
-				val = (uint8_t) (errval[i] >> (2 + bitpos));
-				parity ^= val;
-				if (index < SECTOR_SIZE)
-					data[index] ^= val;
-			}
-			index = ((pos >> 3) + 1) ^ 1;
-			bitpos = (bitpos + 10) & 7;
-			if (bitpos == 0)
-				bitpos = 8;
-			if ((index >= 0 && index < SECTOR_SIZE) ||
-			    index == (SECTOR_SIZE + 1)) {
-				val = (uint8_t)(errval[i] << (8 - bitpos));
-				parity ^= val;
-				if (index < SECTOR_SIZE)
-					data[index] ^= val;
-			}
-		}
-	}
-	/* If the parity is wrong, no rescue possible */
-	return parity ? -1 : nerr;
-}
-
-static void DoC_Delay(struct doc_priv *doc, unsigned short cycles)
-{
-	volatile char dummy;
-	int i;
-
-	for (i = 0; i < cycles; i++) {
-		if (DoC_is_Millennium(doc))
-			dummy = ReadDOC(doc->virtadr, NOP);
-		else if (DoC_is_MillenniumPlus(doc))
-			dummy = ReadDOC(doc->virtadr, Mplus_NOP);
-		else
-			dummy = ReadDOC(doc->virtadr, DOCStatus);
-	}
-
-}
-
-#define CDSN_CTRL_FR_B_MASK	(CDSN_CTRL_FR_B0 | CDSN_CTRL_FR_B1)
-
-/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
-static int _DoC_WaitReady(struct doc_priv *doc)
-{
-	void __iomem *docptr = doc->virtadr;
-	unsigned long timeo = jiffies + (HZ * 10);
-
-	if(debug) printk("_DoC_WaitReady...\n");
-	/* Out-of-line routine to wait for chip response */
-	if (DoC_is_MillenniumPlus(doc)) {
-		while ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
-			if (time_after(jiffies, timeo)) {
-				printk("_DoC_WaitReady timed out.\n");
-				return -EIO;
-			}
-			udelay(1);
-			cond_resched();
-		}
-	} else {
-		while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
-			if (time_after(jiffies, timeo)) {
-				printk("_DoC_WaitReady timed out.\n");
-				return -EIO;
-			}
-			udelay(1);
-			cond_resched();
-		}
-	}
-
-	return 0;
-}
-
-static inline int DoC_WaitReady(struct doc_priv *doc)
-{
-	void __iomem *docptr = doc->virtadr;
-	int ret = 0;
-
-	if (DoC_is_MillenniumPlus(doc)) {
-		DoC_Delay(doc, 4);
-
-		if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK)
-			/* Call the out-of-line routine to wait */
-			ret = _DoC_WaitReady(doc);
-	} else {
-		DoC_Delay(doc, 4);
-
-		if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
-			/* Call the out-of-line routine to wait */
-			ret = _DoC_WaitReady(doc);
-		DoC_Delay(doc, 2);
-	}
-
-	if(debug) printk("DoC_WaitReady OK\n");
-	return ret;
-}
-
-static void doc2000_write_byte(struct mtd_info *mtd, u_char datum)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	if(debug)printk("write_byte %02x\n", datum);
-	WriteDOC(datum, docptr, CDSNSlowIO);
-	WriteDOC(datum, docptr, 2k_CDSN_IO);
-}
-
-static u_char doc2000_read_byte(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	u_char ret;
-
-	ReadDOC(docptr, CDSNSlowIO);
-	DoC_Delay(doc, 2);
-	ret = ReadDOC(docptr, 2k_CDSN_IO);
-	if (debug) printk("read_byte returns %02x\n", ret);
-	return ret;
-}
-
-static void doc2000_writebuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-	if (debug)printk("writebuf of %d bytes: ", len);
-	for (i=0; i < len; i++) {
-		WriteDOC_(buf[i], docptr, DoC_2k_CDSN_IO + i);
-		if (debug && i < 16)
-			printk("%02x ", buf[i]);
-	}
-	if (debug) printk("\n");
-}
-
-static void doc2000_readbuf(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
- 	int i;
-
-	if (debug)printk("readbuf of %d bytes: ", len);
-
-	for (i=0; i < len; i++) {
-		buf[i] = ReadDOC(docptr, 2k_CDSN_IO + i);
-	}
-}
-
-static void doc2000_readbuf_dword(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
- 	int i;
-
-	if (debug) printk("readbuf_dword of %d bytes: ", len);
-
-	if (unlikely((((unsigned long)buf)|len) & 3)) {
-		for (i=0; i < len; i++) {
-			*(uint8_t *)(&buf[i]) = ReadDOC(docptr, 2k_CDSN_IO + i);
-		}
-	} else {
-		for (i=0; i < len; i+=4) {
-			*(uint32_t*)(&buf[i]) = readl(docptr + DoC_2k_CDSN_IO + i);
-		}
-	}
-}
-
-static int doc2000_verifybuf(struct mtd_info *mtd,
-			      const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	for (i=0; i < len; i++)
-		if (buf[i] != ReadDOC(docptr, 2k_CDSN_IO))
-			return -EFAULT;
-	return 0;
-}
-
-static uint16_t __init doc200x_ident_chip(struct mtd_info *mtd, int nr)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	uint16_t ret;
-
-	doc200x_select_chip(mtd, nr);
-	doc200x_hwcontrol(mtd, NAND_CTL_SETCLE);
-	this->write_byte(mtd, NAND_CMD_READID);
-	doc200x_hwcontrol(mtd, NAND_CTL_CLRCLE);
-	doc200x_hwcontrol(mtd, NAND_CTL_SETALE);
-	this->write_byte(mtd, 0);
-	doc200x_hwcontrol(mtd, NAND_CTL_CLRALE);
-
-	ret = this->read_byte(mtd) << 8;
-	ret |= this->read_byte(mtd);
-
-	if (doc->ChipID == DOC_ChipID_Doc2k && try_dword && !nr) {
-		/* First chip probe. See if we get same results by 32-bit access */
-		union {
-			uint32_t dword;
-			uint8_t byte[4];
-		} ident;
-		void __iomem *docptr = doc->virtadr;
-
-		doc200x_hwcontrol(mtd, NAND_CTL_SETCLE);
-		doc2000_write_byte(mtd, NAND_CMD_READID);
-		doc200x_hwcontrol(mtd, NAND_CTL_CLRCLE);
-		doc200x_hwcontrol(mtd, NAND_CTL_SETALE);
-		doc2000_write_byte(mtd, 0);
-		doc200x_hwcontrol(mtd, NAND_CTL_CLRALE);
-
-		ident.dword = readl(docptr + DoC_2k_CDSN_IO);
-		if (((ident.byte[0] << 8) | ident.byte[1]) == ret) {
-			printk(KERN_INFO "DiskOnChip 2000 responds to DWORD access\n");
-			this->read_buf = &doc2000_readbuf_dword;
-		}
-	}
-
-	return ret;
-}
-
-static void __init doc2000_count_chips(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	uint16_t mfrid;
-	int i;
-
-	/* Max 4 chips per floor on DiskOnChip 2000 */
-	doc->chips_per_floor = 4;
-
-	/* Find out what the first chip is */
-	mfrid = doc200x_ident_chip(mtd, 0);
-
-	/* Find how many chips in each floor. */
-	for (i = 1; i < 4; i++) {
-		if (doc200x_ident_chip(mtd, i) != mfrid)
-			break;
-	}
-	doc->chips_per_floor = i;
-	printk(KERN_DEBUG "Detected %d chips per floor.\n", i);
-}
-
-static int doc200x_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
-{
-	struct doc_priv *doc = this->priv;
-
-	int status;
-
-	DoC_WaitReady(doc);
-	this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
-	DoC_WaitReady(doc);
-	status = (int)this->read_byte(mtd);
-
-	return status;
-}
-
-static void doc2001_write_byte(struct mtd_info *mtd, u_char datum)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	WriteDOC(datum, docptr, CDSNSlowIO);
-	WriteDOC(datum, docptr, Mil_CDSN_IO);
-	WriteDOC(datum, docptr, WritePipeTerm);
-}
-
-static u_char doc2001_read_byte(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/*ReadDOC(docptr, CDSNSlowIO); */
-	/* 11.4.5 -- delay twice to allow extended length cycle */
-	DoC_Delay(doc, 2);
-	ReadDOC(docptr, ReadPipeInit);
-	/*return ReadDOC(docptr, Mil_CDSN_IO); */
-	return ReadDOC(docptr, LastDataRead);
-}
-
-static void doc2001_writebuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	for (i=0; i < len; i++)
-		WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
-	/* Terminate write pipeline */
-	WriteDOC(0x00, docptr, WritePipeTerm);
-}
-
-static void doc2001_readbuf(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	/* Start read pipeline */
-	ReadDOC(docptr, ReadPipeInit);
-
-	for (i=0; i < len-1; i++)
-		buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
-
-	/* Terminate read pipeline */
-	buf[i] = ReadDOC(docptr, LastDataRead);
-}
-
-static int doc2001_verifybuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	/* Start read pipeline */
-	ReadDOC(docptr, ReadPipeInit);
-
-	for (i=0; i < len-1; i++)
-		if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
-			ReadDOC(docptr, LastDataRead);
-			return i;
-		}
-	if (buf[i] != ReadDOC(docptr, LastDataRead))
-		return i;
-	return 0;
-}
-
-static u_char doc2001plus_read_byte(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	u_char ret;
-
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ret = ReadDOC(docptr, Mplus_LastDataRead);
-	if (debug) printk("read_byte returns %02x\n", ret);
-	return ret;
-}
-
-static void doc2001plus_writebuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	if (debug)printk("writebuf of %d bytes: ", len);
-	for (i=0; i < len; i++) {
-		WriteDOC_(buf[i], docptr, DoC_Mil_CDSN_IO + i);
-		if (debug && i < 16)
-			printk("%02x ", buf[i]);
-	}
-	if (debug) printk("\n");
-}
-
-static void doc2001plus_readbuf(struct mtd_info *mtd,
-			    u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	if (debug)printk("readbuf of %d bytes: ", len);
-
-	/* Start read pipeline */
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-
-	for (i=0; i < len-2; i++) {
-		buf[i] = ReadDOC(docptr, Mil_CDSN_IO);
-		if (debug && i < 16)
-			printk("%02x ", buf[i]);
-	}
-
-	/* Terminate read pipeline */
-	buf[len-2] = ReadDOC(docptr, Mplus_LastDataRead);
-	if (debug && i < 16)
-		printk("%02x ", buf[len-2]);
-	buf[len-1] = ReadDOC(docptr, Mplus_LastDataRead);
-	if (debug && i < 16)
-		printk("%02x ", buf[len-1]);
-	if (debug) printk("\n");
-}
-
-static int doc2001plus_verifybuf(struct mtd_info *mtd,
-			     const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-
-	if (debug)printk("verifybuf of %d bytes: ", len);
-
-	/* Start read pipeline */
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-	ReadDOC(docptr, Mplus_ReadPipeInit);
-
-	for (i=0; i < len-2; i++)
-		if (buf[i] != ReadDOC(docptr, Mil_CDSN_IO)) {
-			ReadDOC(docptr, Mplus_LastDataRead);
-			ReadDOC(docptr, Mplus_LastDataRead);
-			return i;
-		}
-	if (buf[len-2] != ReadDOC(docptr, Mplus_LastDataRead))
-		return len-2;
-	if (buf[len-1] != ReadDOC(docptr, Mplus_LastDataRead))
-		return len-1;
-	return 0;
-}
-
-static void doc2001plus_select_chip(struct mtd_info *mtd, int chip)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int floor = 0;
-
-	if(debug)printk("select chip (%d)\n", chip);
-
-	if (chip == -1) {
-		/* Disable flash internally */
-		WriteDOC(0, docptr, Mplus_FlashSelect);
-		return;
-	}
-
-	floor = chip / doc->chips_per_floor;
-	chip -= (floor *  doc->chips_per_floor);
-
-	/* Assert ChipEnable and deassert WriteProtect */
-	WriteDOC((DOC_FLASH_CE), docptr, Mplus_FlashSelect);
-	this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
-
-	doc->curchip = chip;
-	doc->curfloor = floor;
-}
-
-static void doc200x_select_chip(struct mtd_info *mtd, int chip)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int floor = 0;
-
-	if(debug)printk("select chip (%d)\n", chip);
-
-	if (chip == -1)
-		return;
-
-	floor = chip / doc->chips_per_floor;
-	chip -= (floor *  doc->chips_per_floor);
-
-	/* 11.4.4 -- deassert CE before changing chip */
-	doc200x_hwcontrol(mtd, NAND_CTL_CLRNCE);
-
-	WriteDOC(floor, docptr, FloorSelect);
-	WriteDOC(chip, docptr, CDSNDeviceSelect);
-
-	doc200x_hwcontrol(mtd, NAND_CTL_SETNCE);
-
-	doc->curchip = chip;
-	doc->curfloor = floor;
-}
-
-static void doc200x_hwcontrol(struct mtd_info *mtd, int cmd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	switch(cmd) {
-	case NAND_CTL_SETNCE:
-		doc->CDSNControl |= CDSN_CTRL_CE;
-		break;
-	case NAND_CTL_CLRNCE:
-		doc->CDSNControl &= ~CDSN_CTRL_CE;
-		break;
-	case NAND_CTL_SETCLE:
-		doc->CDSNControl |= CDSN_CTRL_CLE;
-		break;
-	case NAND_CTL_CLRCLE:
-		doc->CDSNControl &= ~CDSN_CTRL_CLE;
-		break;
-	case NAND_CTL_SETALE:
-		doc->CDSNControl |= CDSN_CTRL_ALE;
-		break;
-	case NAND_CTL_CLRALE:
-		doc->CDSNControl &= ~CDSN_CTRL_ALE;
-		break;
-	case NAND_CTL_SETWP:
-		doc->CDSNControl |= CDSN_CTRL_WP;
-		break;
-	case NAND_CTL_CLRWP:
-		doc->CDSNControl &= ~CDSN_CTRL_WP;
-		break;
-	}
-	if (debug)printk("hwcontrol(%d): %02x\n", cmd, doc->CDSNControl);
-	WriteDOC(doc->CDSNControl, docptr, CDSNControl);
-	/* 11.4.3 -- 4 NOPs after CSDNControl write */
-	DoC_Delay(doc, 4);
-}
-
-static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/*
-	 * Must terminate write pipeline before sending any commands
-	 * to the device.
-	 */
-	if (command == NAND_CMD_PAGEPROG) {
-		WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
-		WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
-	}
-
-	/*
-	 * Write out the command to the device.
-	 */
-	if (command == NAND_CMD_SEQIN) {
-		int readcmd;
-
-		if (column >= mtd->oobblock) {
-			/* OOB area */
-			column -= mtd->oobblock;
-			readcmd = NAND_CMD_READOOB;
-		} else if (column < 256) {
-			/* First 256 bytes --> READ0 */
-			readcmd = NAND_CMD_READ0;
-		} else {
-			column -= 256;
-			readcmd = NAND_CMD_READ1;
-		}
-		WriteDOC(readcmd, docptr, Mplus_FlashCmd);
-	}
-	WriteDOC(command, docptr, Mplus_FlashCmd);
-	WriteDOC(0, docptr, Mplus_WritePipeTerm);
-	WriteDOC(0, docptr, Mplus_WritePipeTerm);
-
-	if (column != -1 || page_addr != -1) {
-		/* Serially input address */
-		if (column != -1) {
-			/* Adjust columns for 16 bit buswidth */
-			if (this->options & NAND_BUSWIDTH_16)
-				column >>= 1;
-			WriteDOC(column, docptr, Mplus_FlashAddress);
-		}
-		if (page_addr != -1) {
-			WriteDOC((unsigned char) (page_addr & 0xff), docptr, Mplus_FlashAddress);
-			WriteDOC((unsigned char) ((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);
-			/* One more address cycle for higher density devices */
-			if (this->chipsize & 0x0c000000) {
-				WriteDOC((unsigned char) ((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);
-				printk("high density\n");
-			}
-		}
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		/* deassert ALE */
-		if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || command == NAND_CMD_READOOB || command == NAND_CMD_READID)
-			WriteDOC(0, docptr, Mplus_FlashControl);
-	}
-
-	/*
-	 * program and erase have their own busy handlers
-	 * status and sequential in needs no delay
-	*/
-	switch (command) {
-
-	case NAND_CMD_PAGEPROG:
-	case NAND_CMD_ERASE1:
-	case NAND_CMD_ERASE2:
-	case NAND_CMD_SEQIN:
-	case NAND_CMD_STATUS:
-		return;
-
-	case NAND_CMD_RESET:
-		if (this->dev_ready)
-			break;
-		udelay(this->chip_delay);
-		WriteDOC(NAND_CMD_STATUS, docptr, Mplus_FlashCmd);
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		WriteDOC(0, docptr, Mplus_WritePipeTerm);
-		while ( !(this->read_byte(mtd) & 0x40));
-		return;
-
-	/* This applies to read commands */
-	default:
-		/*
-		 * If we don't have access to the busy pin, we apply the given
-		 * command delay
-		*/
-		if (!this->dev_ready) {
-			udelay (this->chip_delay);
-			return;
-		}
-	}
-
-	/* Apply this short delay always to ensure that we do wait tWB in
-	 * any case on any machine. */
-	ndelay (100);
-	/* wait until command is processed */
-	while (!this->dev_ready(mtd));
-}
-
-static int doc200x_dev_ready(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	if (DoC_is_MillenniumPlus(doc)) {
-		/* 11.4.2 -- must NOP four times before checking FR/B# */
-		DoC_Delay(doc, 4);
-		if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) {
-			if(debug)
-				printk("not ready\n");
-			return 0;
-		}
-		if (debug)printk("was ready\n");
-		return 1;
-	} else {
-		/* 11.4.2 -- must NOP four times before checking FR/B# */
-		DoC_Delay(doc, 4);
-		if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
-			if(debug)
-				printk("not ready\n");
-			return 0;
-		}
-		/* 11.4.2 -- Must NOP twice if it's ready */
-		DoC_Delay(doc, 2);
-		if (debug)printk("was ready\n");
-		return 1;
-	}
-}
-
-static int doc200x_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
-{
-	/* This is our last resort if we couldn't find or create a BBT.  Just
-	   pretend all blocks are good. */
-	return 0;
-}
-
-static void doc200x_enable_hwecc(struct mtd_info *mtd, int mode)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/* Prime the ECC engine */
-	switch(mode) {
-	case NAND_ECC_READ:
-		WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
-		WriteDOC(DOC_ECC_EN, docptr, ECCConf);
-		break;
-	case NAND_ECC_WRITE:
-		WriteDOC(DOC_ECC_RESET, docptr, ECCConf);
-		WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
-		break;
-	}
-}
-
-static void doc2001plus_enable_hwecc(struct mtd_info *mtd, int mode)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-
-	/* Prime the ECC engine */
-	switch(mode) {
-	case NAND_ECC_READ:
-		WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
-		WriteDOC(DOC_ECC_EN, docptr, Mplus_ECCConf);
-		break;
-	case NAND_ECC_WRITE:
-		WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf);
-		WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, Mplus_ECCConf);
-		break;
-	}
-}
-
-/* This code is only called on write */
-static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
-				 unsigned char *ecc_code)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	int i;
-	int emptymatch = 1;
-
-	/* flush the pipeline */
-	if (DoC_is_2000(doc)) {
-		WriteDOC(doc->CDSNControl & ~CDSN_CTRL_FLASH_IO, docptr, CDSNControl);
-		WriteDOC(0, docptr, 2k_CDSN_IO);
-		WriteDOC(0, docptr, 2k_CDSN_IO);
-		WriteDOC(0, docptr, 2k_CDSN_IO);
-		WriteDOC(doc->CDSNControl, docptr, CDSNControl);
-	} else if (DoC_is_MillenniumPlus(doc)) {
-		WriteDOC(0, docptr, Mplus_NOP);
-		WriteDOC(0, docptr, Mplus_NOP);
-		WriteDOC(0, docptr, Mplus_NOP);
-	} else {
-		WriteDOC(0, docptr, NOP);
-		WriteDOC(0, docptr, NOP);
-		WriteDOC(0, docptr, NOP);
-	}
-
-	for (i = 0; i < 6; i++) {
-		if (DoC_is_MillenniumPlus(doc))
-			ecc_code[i] = ReadDOC_(docptr, DoC_Mplus_ECCSyndrome0 + i);
-		else
-			ecc_code[i] = ReadDOC_(docptr, DoC_ECCSyndrome0 + i);
-		if (ecc_code[i] != empty_write_ecc[i])
-			emptymatch = 0;
-	}
-	if (DoC_is_MillenniumPlus(doc))
-		WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf);
-	else
-		WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
-#if 0
-	/* If emptymatch=1, we might have an all-0xff data buffer.  Check. */
-	if (emptymatch) {
-		/* Note: this somewhat expensive test should not be triggered
-		   often.  It could be optimized away by examining the data in
-		   the writebuf routine, and remembering the result. */
-		for (i = 0; i < 512; i++) {
-			if (dat[i] == 0xff) continue;
-			emptymatch = 0;
-			break;
-		}
-	}
-	/* If emptymatch still =1, we do have an all-0xff data buffer.
-	   Return all-0xff ecc value instead of the computed one, so
-	   it'll look just like a freshly-erased page. */
-	if (emptymatch) memset(ecc_code, 0xff, 6);
-#endif
-	return 0;
-}
-
-static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
-{
-	int i, ret = 0;
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	void __iomem *docptr = doc->virtadr;
-	volatile u_char dummy;
-	int emptymatch = 1;
-
-	/* flush the pipeline */
-	if (DoC_is_2000(doc)) {
-		dummy = ReadDOC(docptr, 2k_ECCStatus);
-		dummy = ReadDOC(docptr, 2k_ECCStatus);
-		dummy = ReadDOC(docptr, 2k_ECCStatus);
-	} else if (DoC_is_MillenniumPlus(doc)) {
-		dummy = ReadDOC(docptr, Mplus_ECCConf);
-		dummy = ReadDOC(docptr, Mplus_ECCConf);
-		dummy = ReadDOC(docptr, Mplus_ECCConf);
-	} else {
-		dummy = ReadDOC(docptr, ECCConf);
-		dummy = ReadDOC(docptr, ECCConf);
-		dummy = ReadDOC(docptr, ECCConf);
-	}
-
-	/* Error occured ? */
-	if (dummy & 0x80) {
-		for (i = 0; i < 6; i++) {
-			if (DoC_is_MillenniumPlus(doc))
-				calc_ecc[i] = ReadDOC_(docptr, DoC_Mplus_ECCSyndrome0 + i);
-			else
-				calc_ecc[i] = ReadDOC_(docptr, DoC_ECCSyndrome0 + i);
-			if (calc_ecc[i] != empty_read_syndrome[i])
-				emptymatch = 0;
-		}
-		/* If emptymatch=1, the read syndrome is consistent with an
-		   all-0xff data and stored ecc block.  Check the stored ecc. */
-		if (emptymatch) {
-			for (i = 0; i < 6; i++) {
-				if (read_ecc[i] == 0xff) continue;
-				emptymatch = 0;
-				break;
-			}
-		}
-		/* If emptymatch still =1, check the data block. */
-		if (emptymatch) {
-		/* Note: this somewhat expensive test should not be triggered
-		   often.  It could be optimized away by examining the data in
-		   the readbuf routine, and remembering the result. */
-			for (i = 0; i < 512; i++) {
-				if (dat[i] == 0xff) continue;
-				emptymatch = 0;
-				break;
-			}
-		}
-		/* If emptymatch still =1, this is almost certainly a freshly-
-		   erased block, in which case the ECC will not come out right.
-		   We'll suppress the error and tell the caller everything's
-		   OK.  Because it is. */
-		if (!emptymatch) ret = doc_ecc_decode (rs_decoder, dat, calc_ecc);
-		if (ret > 0)
-			printk(KERN_ERR "doc200x_correct_data corrected %d errors\n", ret);
-	}
-	if (DoC_is_MillenniumPlus(doc))
-		WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf);
-	else
-		WriteDOC(DOC_ECC_DIS, docptr, ECCConf);
-	if (no_ecc_failures && (ret == -1)) {
-		printk(KERN_ERR "suppressing ECC failure\n");
-		ret = 0;
-	}
-	return ret;
-}
-
-/*u_char mydatabuf[528]; */
-
-static struct nand_oobinfo doc200x_oobinfo = {
-	.useecc = MTD_NANDECC_AUTOPLACE,
-	.eccbytes = 6,
-	.eccpos = {0, 1, 2, 3, 4, 5},
-	.oobfree = { {8, 8} }
-};
-
-/* Find the (I)NFTL Media Header, and optionally also the mirror media header.
-   On sucessful return, buf will contain a copy of the media header for
-   further processing.  id is the string to scan for, and will presumably be
-   either "ANAND" or "BNAND".  If findmirror=1, also look for the mirror media
-   header.  The page #s of the found media headers are placed in mh0_page and
-   mh1_page in the DOC private structure. */
-static int __init find_media_headers(struct mtd_info *mtd, u_char *buf,
-				     const char *id, int findmirror)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	unsigned offs, end = (MAX_MEDIAHEADER_SCAN << this->phys_erase_shift);
-	int ret;
-	size_t retlen;
-
-	end = min(end, mtd->size); /* paranoia */
-	for (offs = 0; offs < end; offs += mtd->erasesize) {
-		ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
-		if (retlen != mtd->oobblock) continue;
-		if (ret) {
-			printk(KERN_WARNING "ECC error scanning DOC at 0x%x\n",
-				offs);
-		}
-		if (memcmp(buf, id, 6)) continue;
-		printk(KERN_INFO "Found DiskOnChip %s Media Header at 0x%x\n", id, offs);
-		if (doc->mh0_page == -1) {
-			doc->mh0_page = offs >> this->page_shift;
-			if (!findmirror) return 1;
-			continue;
-		}
-		doc->mh1_page = offs >> this->page_shift;
-		return 2;
-	}
-	if (doc->mh0_page == -1) {
-		printk(KERN_WARNING "DiskOnChip %s Media Header not found.\n", id);
-		return 0;
-	}
-	/* Only one mediaheader was found.  We want buf to contain a
-	   mediaheader on return, so we'll have to re-read the one we found. */
-	offs = doc->mh0_page << this->page_shift;
-	ret = mtd->read(mtd, offs, mtd->oobblock, &retlen, buf);
-	if (retlen != mtd->oobblock) {
-		/* Insanity.  Give up. */
-		printk(KERN_ERR "Read DiskOnChip Media Header once, but can't reread it???\n");
-		return 0;
-	}
-	return 1;
-}
-
-static inline int __init nftl_partscan(struct mtd_info *mtd,
-				struct mtd_partition *parts)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	int ret = 0;
-	u_char *buf;
-	struct NFTLMediaHeader *mh;
-	const unsigned psize = 1 << this->page_shift;
-	unsigned blocks, maxblocks;
-	int offs, numheaders;
-
-	buf = kmalloc(mtd->oobblock, GFP_KERNEL);
-	if (!buf) {
-		printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
-		return 0;
-	}
-	if (!(numheaders=find_media_headers(mtd, buf, "ANAND", 1))) goto out;
-	mh = (struct NFTLMediaHeader *) buf;
-
-/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
-/*	if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
-	printk(KERN_INFO "    DataOrgID        = %s\n"
-			 "    NumEraseUnits    = %d\n"
-			 "    FirstPhysicalEUN = %d\n"
-			 "    FormattedSize    = %d\n"
-			 "    UnitSizeFactor   = %d\n",
-		mh->DataOrgID, mh->NumEraseUnits,
-		mh->FirstPhysicalEUN, mh->FormattedSize,
-		mh->UnitSizeFactor);
-/*#endif */
-
-	blocks = mtd->size >> this->phys_erase_shift;
-	maxblocks = min(32768U, mtd->erasesize - psize);
-
-	if (mh->UnitSizeFactor == 0x00) {
-		/* Auto-determine UnitSizeFactor.  The constraints are:
-		   - There can be at most 32768 virtual blocks.
-		   - There can be at most (virtual block size - page size)
-		     virtual blocks (because MediaHeader+BBT must fit in 1).
-		*/
-		mh->UnitSizeFactor = 0xff;
-		while (blocks > maxblocks) {
-			blocks >>= 1;
-			maxblocks = min(32768U, (maxblocks << 1) + psize);
-			mh->UnitSizeFactor--;
-		}
-		printk(KERN_WARNING "UnitSizeFactor=0x00 detected.  Correct value is assumed to be 0x%02x.\n", mh->UnitSizeFactor);
-	}
-
-	/* NOTE: The lines below modify internal variables of the NAND and MTD
-	   layers; variables with have already been configured by nand_scan.
-	   Unfortunately, we didn't know before this point what these values
-	   should be.  Thus, this code is somewhat dependant on the exact
-	   implementation of the NAND layer.  */
-	if (mh->UnitSizeFactor != 0xff) {
-		this->bbt_erase_shift += (0xff - mh->UnitSizeFactor);
-		mtd->erasesize <<= (0xff - mh->UnitSizeFactor);
-		printk(KERN_INFO "Setting virtual erase size to %d\n", mtd->erasesize);
-		blocks = mtd->size >> this->bbt_erase_shift;
-		maxblocks = min(32768U, mtd->erasesize - psize);
-	}
-
-	if (blocks > maxblocks) {
-		printk(KERN_ERR "UnitSizeFactor of 0x%02x is inconsistent with device size.  Aborting.\n", mh->UnitSizeFactor);
-		goto out;
-	}
-
-	/* Skip past the media headers. */
-	offs = max(doc->mh0_page, doc->mh1_page);
-	offs <<= this->page_shift;
-	offs += mtd->erasesize;
-
-	/*parts[0].name = " DiskOnChip Boot / Media Header partition"; */
-	/*parts[0].offset = 0; */
-	/*parts[0].size = offs; */
-
-	parts[0].name = " DiskOnChip BDTL partition";
-	parts[0].offset = offs;
-	parts[0].size = (mh->NumEraseUnits - numheaders) << this->bbt_erase_shift;
-
-	offs += parts[0].size;
-	if (offs < mtd->size) {
-		parts[1].name = " DiskOnChip Remainder partition";
-		parts[1].offset = offs;
-		parts[1].size = mtd->size - offs;
-		ret = 2;
-		goto out;
-	}
-	ret = 1;
-out:
-	kfree(buf);
-	return ret;
-}
-
-/* This is a stripped-down copy of the code in inftlmount.c */
-static inline int __init inftl_partscan(struct mtd_info *mtd,
-				 struct mtd_partition *parts)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	int ret = 0;
-	u_char *buf;
-	struct INFTLMediaHeader *mh;
-	struct INFTLPartition *ip;
-	int numparts = 0;
-	int blocks;
-	int vshift, lastvunit = 0;
-	int i;
-	int end = mtd->size;
-
-	if (inftl_bbt_write)
-		end -= (INFTL_BBT_RESERVED_BLOCKS << this->phys_erase_shift);
-
-	buf = kmalloc(mtd->oobblock, GFP_KERNEL);
-	if (!buf) {
-		printk(KERN_ERR "DiskOnChip mediaheader kmalloc failed!\n");
-		return 0;
-	}
-
-	if (!find_media_headers(mtd, buf, "BNAND", 0)) goto out;
-	doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift);
-	mh = (struct INFTLMediaHeader *) buf;
-
-	mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks);
-	mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions);
-	mh->NoOfBDTLPartitions = le32_to_cpu(mh->NoOfBDTLPartitions);
-	mh->BlockMultiplierBits = le32_to_cpu(mh->BlockMultiplierBits);
-	mh->FormatFlags = le32_to_cpu(mh->FormatFlags);
-	mh->PercentUsed = le32_to_cpu(mh->PercentUsed);
-
-/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
-/*	if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
-	printk(KERN_INFO "    bootRecordID          = %s\n"
-			 "    NoOfBootImageBlocks   = %d\n"
-			 "    NoOfBinaryPartitions  = %d\n"
-			 "    NoOfBDTLPartitions    = %d\n"
-			 "    BlockMultiplerBits    = %d\n"
-			 "    FormatFlgs            = %d\n"
-			 "    OsakVersion           = %d.%d.%d.%d\n"
-			 "    PercentUsed           = %d\n",
-		mh->bootRecordID, mh->NoOfBootImageBlocks,
-		mh->NoOfBinaryPartitions,
-		mh->NoOfBDTLPartitions,
-		mh->BlockMultiplierBits, mh->FormatFlags,
-		((unsigned char *) &mh->OsakVersion)[0] & 0xf,
-		((unsigned char *) &mh->OsakVersion)[1] & 0xf,
-		((unsigned char *) &mh->OsakVersion)[2] & 0xf,
-		((unsigned char *) &mh->OsakVersion)[3] & 0xf,
-		mh->PercentUsed);
-/*#endif */
-
-	vshift = this->phys_erase_shift + mh->BlockMultiplierBits;
-
-	blocks = mtd->size >> vshift;
-	if (blocks > 32768) {
-		printk(KERN_ERR "BlockMultiplierBits=%d is inconsistent with device size.  Aborting.\n", mh->BlockMultiplierBits);
-		goto out;
-	}
-
-	blocks = doc->chips_per_floor << (this->chip_shift - this->phys_erase_shift);
-	if (inftl_bbt_write && (blocks > mtd->erasesize)) {
-		printk(KERN_ERR "Writeable BBTs spanning more than one erase block are not yet supported.  FIX ME!\n");
-		goto out;
-	}
-
-	/* Scan the partitions */
-	for (i = 0; (i < 4); i++) {
-		ip = &(mh->Partitions[i]);
-		ip->virtualUnits = le32_to_cpu(ip->virtualUnits);
-		ip->firstUnit = le32_to_cpu(ip->firstUnit);
-		ip->lastUnit = le32_to_cpu(ip->lastUnit);
-		ip->flags = le32_to_cpu(ip->flags);
-		ip->spareUnits = le32_to_cpu(ip->spareUnits);
-		ip->Reserved0 = le32_to_cpu(ip->Reserved0);
-
-/*#ifdef CONFIG_MTD_DEBUG_VERBOSE */
-/*		if (CONFIG_MTD_DEBUG_VERBOSE >= 2) */
-		printk(KERN_INFO	"    PARTITION[%d] ->\n"
-			"        virtualUnits    = %d\n"
-			"        firstUnit       = %d\n"
-			"        lastUnit        = %d\n"
-			"        flags           = 0x%x\n"
-			"        spareUnits      = %d\n",
-			i, ip->virtualUnits, ip->firstUnit,
-			ip->lastUnit, ip->flags,
-			ip->spareUnits);
-/*#endif */
-
-/*
-		if ((i == 0) && (ip->firstUnit > 0)) {
-			parts[0].name = " DiskOnChip IPL / Media Header partition";
-			parts[0].offset = 0;
-			parts[0].size = mtd->erasesize * ip->firstUnit;
-			numparts = 1;
-		}
-*/
-
-		if (ip->flags & INFTL_BINARY)
-			parts[numparts].name = " DiskOnChip BDK partition";
-		else
-			parts[numparts].name = " DiskOnChip BDTL partition";
-		parts[numparts].offset = ip->firstUnit << vshift;
-		parts[numparts].size = (1 + ip->lastUnit - ip->firstUnit) << vshift;
-		numparts++;
-		if (ip->lastUnit > lastvunit) lastvunit = ip->lastUnit;
-		if (ip->flags & INFTL_LAST) break;
-	}
-	lastvunit++;
-	if ((lastvunit << vshift) < end) {
-		parts[numparts].name = " DiskOnChip Remainder partition";
-		parts[numparts].offset = lastvunit << vshift;
-		parts[numparts].size = end - parts[numparts].offset;
-		numparts++;
-	}
-	ret = numparts;
-out:
-	kfree(buf);
-	return ret;
-}
-
-static int __init nftl_scan_bbt(struct mtd_info *mtd)
-{
-	int ret, numparts;
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	struct mtd_partition parts[2];
-
-	memset((char *) parts, 0, sizeof(parts));
-	/* On NFTL, we have to find the media headers before we can read the
-	   BBTs, since they're stored in the media header eraseblocks. */
-	numparts = nftl_partscan(mtd, parts);
-	if (!numparts) return -EIO;
-	this->bbt_td->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
-				NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
-				NAND_BBT_VERSION;
-	this->bbt_td->veroffs = 7;
-	this->bbt_td->pages[0] = doc->mh0_page + 1;
-	if (doc->mh1_page != -1) {
-		this->bbt_md->options = NAND_BBT_ABSPAGE | NAND_BBT_8BIT |
-					NAND_BBT_SAVECONTENT | NAND_BBT_WRITE |
-					NAND_BBT_VERSION;
-		this->bbt_md->veroffs = 7;
-		this->bbt_md->pages[0] = doc->mh1_page + 1;
-	} else {
-		this->bbt_md = NULL;
-	}
-
-	/* It's safe to set bd=NULL below because NAND_BBT_CREATE is not set.
-	   At least as nand_bbt.c is currently written. */
-	if ((ret = nand_scan_bbt(mtd, NULL)))
-		return ret;
-	add_mtd_device(mtd, "nand");
-#ifdef CONFIG_MTD_PARTITIONS
-	if (!no_autopart)
-		add_mtd_partitions(mtd, parts, numparts);
-#endif
-	return 0;
-}
-
-static int __init inftl_scan_bbt(struct mtd_info *mtd)
-{
-	int ret, numparts;
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-	struct mtd_partition parts[5];
-
-	if (this->numchips > doc->chips_per_floor) {
-		printk(KERN_ERR "Multi-floor INFTL devices not yet supported.\n");
-		return -EIO;
-	}
-
-	if (DoC_is_MillenniumPlus(doc)) {
-		this->bbt_td->options = NAND_BBT_2BIT | NAND_BBT_ABSPAGE;
-		if (inftl_bbt_write)
-			this->bbt_td->options |= NAND_BBT_WRITE;
-		this->bbt_td->pages[0] = 2;
-		this->bbt_md = NULL;
-	} else {
-		this->bbt_td->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
-					NAND_BBT_VERSION;
-		if (inftl_bbt_write)
-			this->bbt_td->options |= NAND_BBT_WRITE;
-		this->bbt_td->offs = 8;
-		this->bbt_td->len = 8;
-		this->bbt_td->veroffs = 7;
-		this->bbt_td->maxblocks = INFTL_BBT_RESERVED_BLOCKS;
-		this->bbt_td->reserved_block_code = 0x01;
-		this->bbt_td->pattern = "MSYS_BBT";
-
-		this->bbt_md->options = NAND_BBT_LASTBLOCK | NAND_BBT_8BIT |
-					NAND_BBT_VERSION;
-		if (inftl_bbt_write)
-			this->bbt_md->options |= NAND_BBT_WRITE;
-		this->bbt_md->offs = 8;
-		this->bbt_md->len = 8;
-		this->bbt_md->veroffs = 7;
-		this->bbt_md->maxblocks = INFTL_BBT_RESERVED_BLOCKS;
-		this->bbt_md->reserved_block_code = 0x01;
-		this->bbt_md->pattern = "TBB_SYSM";
-	}
-
-	/* It's safe to set bd=NULL below because NAND_BBT_CREATE is not set.
-	   At least as nand_bbt.c is currently written. */
-	if ((ret = nand_scan_bbt(mtd, NULL)))
-		return ret;
-	memset((char *) parts, 0, sizeof(parts));
-	numparts = inftl_partscan(mtd, parts);
-	/* At least for now, require the INFTL Media Header.  We could probably
-	   do without it for non-INFTL use, since all it gives us is
-	   autopartitioning, but I want to give it more thought. */
-	if (!numparts) return -EIO;
-	add_mtd_device(mtd, "nand");
-#ifdef CONFIG_MTD_PARTITIONS
-	if (!no_autopart)
-		add_mtd_partitions(mtd, parts, numparts);
-#endif
-	return 0;
-}
-
-static inline int __init doc2000_init(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-
-	this->write_byte = doc2000_write_byte;
-	this->read_byte = doc2000_read_byte;
-	this->write_buf = doc2000_writebuf;
-	this->read_buf = doc2000_readbuf;
-	this->verify_buf = doc2000_verifybuf;
-	this->scan_bbt = nftl_scan_bbt;
-
-	doc->CDSNControl = CDSN_CTRL_FLASH_IO | CDSN_CTRL_ECC_IO;
-	doc2000_count_chips(mtd);
-	mtd->name = "DiskOnChip 2000 (NFTL Model)";
-	return (4 * doc->chips_per_floor);
-}
-
-static inline int __init doc2001_init(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-
-	this->write_byte = doc2001_write_byte;
-	this->read_byte = doc2001_read_byte;
-	this->write_buf = doc2001_writebuf;
-	this->read_buf = doc2001_readbuf;
-	this->verify_buf = doc2001_verifybuf;
-
-	ReadDOC(doc->virtadr, ChipID);
-	ReadDOC(doc->virtadr, ChipID);
-	ReadDOC(doc->virtadr, ChipID);
-	if (ReadDOC(doc->virtadr, ChipID) != DOC_ChipID_DocMil) {
-		/* It's not a Millennium; it's one of the newer
-		   DiskOnChip 2000 units with a similar ASIC.
-		   Treat it like a Millennium, except that it
-		   can have multiple chips. */
-		doc2000_count_chips(mtd);
-		mtd->name = "DiskOnChip 2000 (INFTL Model)";
-		this->scan_bbt = inftl_scan_bbt;
-		return (4 * doc->chips_per_floor);
-	} else {
-		/* Bog-standard Millennium */
-		doc->chips_per_floor = 1;
-		mtd->name = "DiskOnChip Millennium";
-		this->scan_bbt = nftl_scan_bbt;
-		return 1;
-	}
-}
-
-static inline int __init doc2001plus_init(struct mtd_info *mtd)
-{
-	struct nand_chip *this = mtd->priv;
-	struct doc_priv *doc = this->priv;
-
-	this->write_byte = NULL;
-	this->read_byte = doc2001plus_read_byte;
-	this->write_buf = doc2001plus_writebuf;
-	this->read_buf = doc2001plus_readbuf;
-	this->verify_buf = doc2001plus_verifybuf;
-	this->scan_bbt = inftl_scan_bbt;
-	this->hwcontrol = NULL;
-	this->select_chip = doc2001plus_select_chip;
-	this->cmdfunc = doc2001plus_command;
-	this->enable_hwecc = doc2001plus_enable_hwecc;
-
-	doc->chips_per_floor = 1;
-	mtd->name = "DiskOnChip Millennium Plus";
-
-	return 1;
-}
-
-static inline int __init doc_probe(unsigned long physadr)
-{
-	unsigned char ChipID;
-	struct mtd_info *mtd;
-	struct nand_chip *nand;
-	struct doc_priv *doc;
-	void __iomem *virtadr;
-	unsigned char save_control;
-	unsigned char tmp, tmpb, tmpc;
-	int reg, len, numchips;
-	int ret = 0;
-
-	virtadr = ioremap(physadr, DOC_IOREMAP_LEN);
-	if (!virtadr) {
-		printk(KERN_ERR "Diskonchip ioremap failed: 0x%x bytes at 0x%lx\n", DOC_IOREMAP_LEN, physadr);
-		return -EIO;
-	}
-
-	/* It's not possible to cleanly detect the DiskOnChip - the
-	 * bootup procedure will put the device into reset mode, and
-	 * it's not possible to talk to it without actually writing
-	 * to the DOCControl register. So we store the current contents
-	 * of the DOCControl register's location, in case we later decide
-	 * that it's not a DiskOnChip, and want to put it back how we
-	 * found it.
-	 */
-	save_control = ReadDOC(virtadr, DOCControl);
-
-	/* Reset the DiskOnChip ASIC */
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
-		 virtadr, DOCControl);
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET,
-		 virtadr, DOCControl);
-
-	/* Enable the DiskOnChip ASIC */
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
-		 virtadr, DOCControl);
-	WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL,
-		 virtadr, DOCControl);
-
-	ChipID = ReadDOC(virtadr, ChipID);
-
-	switch(ChipID) {
-	case DOC_ChipID_Doc2k:
-		reg = DoC_2k_ECCStatus;
-		break;
-	case DOC_ChipID_DocMil:
-		reg = DoC_ECCConf;
-		break;
-	case DOC_ChipID_DocMilPlus16:
-	case DOC_ChipID_DocMilPlus32:
-	case 0:
-		/* Possible Millennium Plus, need to do more checks */
-		/* Possibly release from power down mode */
-		for (tmp = 0; (tmp < 4); tmp++)
-			ReadDOC(virtadr, Mplus_Power);
-
-		/* Reset the Millennium Plus ASIC */
-		tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
-			DOC_MODE_BDECT;
-		WriteDOC(tmp, virtadr, Mplus_DOCControl);
-		WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
-
-		mdelay(1);
-		/* Enable the Millennium Plus ASIC */
-		tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT |
-			DOC_MODE_BDECT;
-		WriteDOC(tmp, virtadr, Mplus_DOCControl);
-		WriteDOC(~tmp, virtadr, Mplus_CtrlConfirm);
-		mdelay(1);
-
-		ChipID = ReadDOC(virtadr, ChipID);
-
-		switch (ChipID) {
-		case DOC_ChipID_DocMilPlus16:
-			reg = DoC_Mplus_Toggle;
-			break;
-		case DOC_ChipID_DocMilPlus32:
-			printk(KERN_ERR "DiskOnChip Millennium Plus 32MB is not supported, ignoring.\n");
-		default:
-			ret = -ENODEV;
-			goto notfound;
-		}
-		break;
-
-	default:
-		ret = -ENODEV;
-		goto notfound;
-	}
-	/* Check the TOGGLE bit in the ECC register */
-	tmp  = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
-	tmpb = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
-	tmpc = ReadDOC_(virtadr, reg) & DOC_TOGGLE_BIT;
-	if ((tmp == tmpb) || (tmp != tmpc)) {
-		printk(KERN_WARNING "Possible DiskOnChip at 0x%lx failed TOGGLE test, dropping.\n", physadr);
-		ret = -ENODEV;
-		goto notfound;
-	}
-
-	for (mtd = doclist; mtd; mtd = doc->nextdoc) {
-		unsigned char oldval;
-		unsigned char newval;
-		nand = mtd->priv;
-		doc = nand->priv;
-		/* Use the alias resolution register to determine if this is
-		   in fact the same DOC aliased to a new address.  If writes
-		   to one chip's alias resolution register change the value on
-		   the other chip, they're the same chip. */
-		if (ChipID == DOC_ChipID_DocMilPlus16) {
-			oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
-			newval = ReadDOC(virtadr, Mplus_AliasResolution);
-		} else {
-			oldval = ReadDOC(doc->virtadr, AliasResolution);
-			newval = ReadDOC(virtadr, AliasResolution);
-		}
-		if (oldval != newval)
-			continue;
-		if (ChipID == DOC_ChipID_DocMilPlus16) {
-			WriteDOC(~newval, virtadr, Mplus_AliasResolution);
-			oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
-			WriteDOC(newval, virtadr, Mplus_AliasResolution); /* restore it */
-		} else {
-			WriteDOC(~newval, virtadr, AliasResolution);
-			oldval = ReadDOC(doc->virtadr, AliasResolution);
-			WriteDOC(newval, virtadr, AliasResolution); /* restore it */
-		}
-		newval = ~newval;
-		if (oldval == newval) {
-			printk(KERN_DEBUG "Found alias of DOC at 0x%lx to 0x%lx\n", doc->physadr, physadr);
-			goto notfound;
-		}
-	}
-
-	printk(KERN_NOTICE "DiskOnChip found at 0x%lx\n", physadr);
-
-	len = sizeof(struct mtd_info) +
-	      sizeof(struct nand_chip) +
-	      sizeof(struct doc_priv) +
-	      (2 * sizeof(struct nand_bbt_descr));
-	mtd =  kmalloc(len, GFP_KERNEL);
-	if (!mtd) {
-		printk(KERN_ERR "DiskOnChip kmalloc (%d bytes) failed!\n", len);
-		ret = -ENOMEM;
-		goto fail;
-	}
-	memset(mtd, 0, len);
-
-	nand			= (struct nand_chip *) (mtd + 1);
-	doc			= (struct doc_priv *) (nand + 1);
-	nand->bbt_td		= (struct nand_bbt_descr *) (doc + 1);
-	nand->bbt_md		= nand->bbt_td + 1;
-
-	mtd->priv		= nand;
-	mtd->owner		= THIS_MODULE;
-
-	nand->priv		= doc;
-	nand->select_chip	= doc200x_select_chip;
-	nand->hwcontrol		= doc200x_hwcontrol;
-	nand->dev_ready		= doc200x_dev_ready;
-	nand->waitfunc		= doc200x_wait;
-	nand->block_bad		= doc200x_block_bad;
-	nand->enable_hwecc	= doc200x_enable_hwecc;
-	nand->calculate_ecc	= doc200x_calculate_ecc;
-	nand->correct_data	= doc200x_correct_data;
-
-	nand->autooob		= &doc200x_oobinfo;
-	nand->eccmode		= NAND_ECC_HW6_512;
-	nand->options		= NAND_USE_FLASH_BBT | NAND_HWECC_SYNDROME;
-
-	doc->physadr		= physadr;
-	doc->virtadr		= virtadr;
-	doc->ChipID		= ChipID;
-	doc->curfloor		= -1;
-	doc->curchip		= -1;
-	doc->mh0_page		= -1;
-	doc->mh1_page		= -1;
-	doc->nextdoc		= doclist;
-
-	if (ChipID == DOC_ChipID_Doc2k)
-		numchips = doc2000_init(mtd);
-	else if (ChipID == DOC_ChipID_DocMilPlus16)
-		numchips = doc2001plus_init(mtd);
-	else
-		numchips = doc2001_init(mtd);
-
-	if ((ret = nand_scan(mtd, numchips))) {
-		/* DBB note: i believe nand_release is necessary here, as
-		   buffers may have been allocated in nand_base.  Check with
-		   Thomas. FIX ME! */
-		/* nand_release will call del_mtd_device, but we haven't yet
-		   added it.  This is handled without incident by
-		   del_mtd_device, as far as I can tell. */
-		nand_release(mtd);
-		kfree(mtd);
-		goto fail;
-	}
-
-	/* Success! */
-	doclist = mtd;
-	return 0;
-
-notfound:
-	/* Put back the contents of the DOCControl register, in case it's not
-	   actually a DiskOnChip.  */
-	WriteDOC(save_control, virtadr, DOCControl);
-fail:
-	iounmap(virtadr);
-	return ret;
-}
-
-static void release_nanddoc(void)
-{
- 	struct mtd_info *mtd, *nextmtd;
-	struct nand_chip *nand;
-	struct doc_priv *doc;
-
-	for (mtd = doclist; mtd; mtd = nextmtd) {
-		nand = mtd->priv;
-		doc = nand->priv;
-
-		nextmtd = doc->nextdoc;
-		nand_release(mtd);
-		iounmap(doc->virtadr);
-		kfree(mtd);
-	}
-}
-
-static int __init init_nanddoc(void)
-{
-	int i, ret = 0;
-
-	/* We could create the decoder on demand, if memory is a concern.
-	 * This way we have it handy, if an error happens
-	 *
-	 * Symbolsize is 10 (bits)
-	 * Primitve polynomial is x^10+x^3+1
-	 * first consecutive root is 510
-	 * primitve element to generate roots = 1
-	 * generator polinomial degree = 4
-	 */
-	rs_decoder = init_rs(10, 0x409, FCR, 1, NROOTS);
- 	if (!rs_decoder) {
-		printk (KERN_ERR "DiskOnChip: Could not create a RS decoder\n");
-		return -ENOMEM;
-	}
-
-	if (doc_config_location) {
-		printk(KERN_INFO "Using configured DiskOnChip probe address 0x%lx\n", doc_config_location);
-		ret = doc_probe(doc_config_location);
-		if (ret < 0)
-			goto outerr;
-	} else {
-		for (i=0; (doc_locations[i] != 0xffffffff); i++) {
-			doc_probe(doc_locations[i]);
-		}
-	}
-	/* No banner message any more. Print a message if no DiskOnChip
-	   found, so the user knows we at least tried. */
-	if (!doclist) {
-		printk(KERN_INFO "No valid DiskOnChip devices found\n");
-		ret = -ENODEV;
-		goto outerr;
-	}
-	return 0;
-outerr:
-	free_rs(rs_decoder);
-	return ret;
-}
-
-static void __exit cleanup_nanddoc(void)
-{
-	/* Cleanup the nand/DoC resources */
-	release_nanddoc();
-
-	/* Free the reed solomon resources */
-	if (rs_decoder) {
-		free_rs(rs_decoder);
-	}
-}
-
-module_init(init_nanddoc);
-module_exit(cleanup_nanddoc);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("David Woodhouse <dwmw2 at infradead.org>");
-MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n");
-#endif
-- 
1.7.10



From eric at eukrea.com  Thu Jul  5 16:32:08 2012
From: eric at eukrea.com (Eric =?ISO-8859-1?B?QuluYXJk?=)
Date: Thu, 5 Jul 2012 22:32:08 +0200
Subject: [PATCH 2/3] nand_base: add ONFI flash detection
In-Reply-To: <20120705190240.GY30009@pengutronix.de>
References: <1341483767-20487-1-git-send-email-eric@eukrea.com>
 <1341483767-20487-2-git-send-email-eric@eukrea.com>
 <20120705190240.GY30009@pengutronix.de>
Message-ID: <20120705223208.24dc9bad@eb-e6520>

Hi Sascha,

Le Thu, 5 Jul 2012 21:02:40 +0200,
Sascha Hauer <s.hauer at pengutronix.de> a ?crit :
> > -	printk(KERN_INFO "NAND device: Manufacturer ID:"
> > -	       " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id,
> > -	       nand_manuf_ids[maf_idx].name, type->name);
> > +	printk("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
> > +		" page size: %d, OOB size: %d\n",
> > +		*maf_id, dev_id, nand_manuf_ids[maf_idx].name,
> > +		chip->onfi_version ? chip->onfi_params.model : type->name,
> > +		mtd->writesize, mtd->oobsize);
> 
> Do we need to output writesize and oobsize here? 'devinfo nand0' will
> give the same information.
> 
that's the way it's done in the kernel so I imported the log update.

Eric


From s.hauer at pengutronix.de  Thu Jul  5 15:36:38 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:38 +0200
Subject: [PATCH 08/30] input gpio buttons: needs poller API
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-8-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/input/Kconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index b488553..3b3eb87 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -7,6 +7,7 @@ menu "Input device support"
 config KEYBOARD_GPIO
 	bool "GPIO Buttons"
 	depends on GENERIC_GPIO
+	select POLLER
 	help
 	  This driver implements support for buttons connected
 	  to GPIO pins of various CPUs (and some other chips).
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:56 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:56 +0200
Subject: [PATCH 26/30] ARM at91: fix typo in define
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-26-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-at91/at91sam9261_devices.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 7acab0c..a109804 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -150,7 +150,7 @@ void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
 		at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
 		break;
 	case 1:
-		start = AT91SAM9213_BASE_SPI1;
+		start = AT91SAM9261_BASE_SPI1;
 		at91_set_A_periph(AT91_PIN_PB30, 0);	/* SPI1_MISO */
 		at91_set_A_periph(AT91_PIN_PB31, 0);	/* SPI1_MOSI */
 		at91_set_A_periph(AT91_PIN_PB29, 0);	/* SPI1_SPCK */
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:58 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:58 +0200
Subject: [PATCH 28/30] I2C i.MX: disable driver for i.MX1
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-28-git-send-email-s.hauer@pengutronix.de>

Although the driver could work on this hardware, i.MX1 support
currently lacks the necessary clocks resulting in linker errors.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/i2c/busses/Kconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 4b170ca..1ce5c00 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -6,7 +6,7 @@ menu "I2C Hardware Bus support"
 
 config I2C_IMX
 	bool "i.MX I2C Master driver"
-	depends on ARCH_IMX
+	depends on ARCH_IMX && !ARCH_IMX1
 
 config I2C_OMAP
 	bool "OMAP I2C Master driver"
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:51 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:51 +0200
Subject: [PATCH 21/30] ARM i.MX: rename internal-nand-boot.c to
 external-nand-boot.c
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-21-git-send-email-s.hauer@pengutronix.de>

Because that's what it is.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/Makefile             |    2 +-
 arch/arm/mach-imx/external-nand-boot.c |  269 ++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/internal-nand-boot.c |  269 --------------------------------
 3 files changed, 270 insertions(+), 270 deletions(-)
 create mode 100644 arch/arm/mach-imx/external-nand-boot.c
 delete mode 100644 arch/arm/mach-imx/internal-nand-boot.c

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 03e2421..89a8946 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -11,7 +11,7 @@ obj-$(CONFIG_ARCH_IMX6) += speed-imx6.o imx6.o iomux-v3.o
 obj-$(CONFIG_IMX_CLKO)	+= clko.o
 obj-$(CONFIG_IMX_IIM)	+= iim.o
 obj-$(CONFIG_NAND_IMX) += nand.o
-obj-$(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND) += internal-nand-boot.o
+obj-$(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND) += external-nand-boot.o
 obj-y += speed.o
 obj-y += devices.o
 obj-y += boot.o
diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c
new file mode 100644
index 0000000..e72a944
--- /dev/null
+++ b/arch/arm/mach-imx/external-nand-boot.c
@@ -0,0 +1,269 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <linux/mtd/nand.h>
+#include <mach/imx-nand.h>
+#include <mach/generic.h>
+#include <mach/imx-regs.h>
+
+static void __bare_init noinline imx_nandboot_wait_op_done(void *regs)
+{
+	u32 r;
+
+	while (1) {
+		r = readw(regs + NFC_V1_V2_CONFIG2);
+		if (r & NFC_V1_V2_CONFIG2_INT)
+			break;
+	};
+
+	r &= ~NFC_V1_V2_CONFIG2_INT;
+
+	writew(r, regs + NFC_V1_V2_CONFIG2);
+}
+
+/*
+ * This function issues the specified command to the NAND device and
+ * waits for completion.
+ *
+ * @param       cmd     command for NAND Flash
+ */
+static void __bare_init imx_nandboot_send_cmd(void *regs, u16 cmd)
+{
+	writew(cmd, regs + NFC_V1_V2_FLASH_CMD);
+	writew(NFC_CMD, regs + NFC_V1_V2_CONFIG2);
+
+	imx_nandboot_wait_op_done(regs);
+}
+
+/*
+ * This function sends an address (or partial address) to the
+ * NAND device.  The address is used to select the source/destination for
+ * a NAND command.
+ *
+ * @param       addr    address to be written to NFC.
+ * @param       islast  True if this is the last address cycle for command
+ */
+static void __bare_init noinline imx_nandboot_send_addr(void *regs, u16 addr)
+{
+	writew(addr, regs + NFC_V1_V2_FLASH_ADDR);
+	writew(NFC_ADDR, regs + NFC_V1_V2_CONFIG2);
+
+	/* Wait for operation to complete */
+	imx_nandboot_wait_op_done(regs);
+}
+
+static void __bare_init imx_nandboot_nfc_addr(void *regs, u32 offs, int pagesize_2k)
+{
+	imx_nandboot_send_addr(regs, offs & 0xff);
+
+	if (pagesize_2k) {
+		imx_nandboot_send_addr(regs, offs & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 11) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 19) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 27) & 0xff);
+		imx_nandboot_send_cmd(regs, NAND_CMD_READSTART);
+	} else {
+		imx_nandboot_send_addr(regs, (offs >> 9) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 17) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 25) & 0xff);
+	}
+}
+
+static void __bare_init imx_nandboot_send_page(void *regs,
+		unsigned int ops, int pagesize_2k)
+{
+	int bufs, i;
+
+	if (nfc_is_v1() && pagesize_2k)
+		bufs = 4;
+	else
+		bufs = 1;
+
+	for (i = 0; i < bufs; i++) {
+		/* NANDFC buffer 0 is used for page read/write */
+		writew(i, regs + NFC_V1_V2_BUF_ADDR);
+
+		writew(ops, regs + NFC_V1_V2_CONFIG2);
+
+		/* Wait for operation to complete */
+		imx_nandboot_wait_op_done(regs);
+	}
+}
+
+static void __bare_init __memcpy32(void *trg, const void *src, int size)
+{
+	int i;
+	unsigned int *t = trg;
+	unsigned const int *s = src;
+
+	for (i = 0; i < (size >> 2); i++)
+		*t++ = *s++;
+}
+
+static int __maybe_unused is_pagesize_2k(void)
+{
+#ifdef CONFIG_ARCH_IMX21
+	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
+		return 1;
+	else
+		return 0;
+#endif
+#ifdef CONFIG_ARCH_IMX27
+	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
+		return 1;
+	else
+		return 0;
+#endif
+#ifdef CONFIG_ARCH_IMX31
+	if (readl(IMX_CCM_BASE + CCM_RCSR) & RCSR_NFMS)
+		return 1;
+	else
+		return 0;
+#endif
+#if defined(CONFIG_ARCH_IMX35) || defined(CONFIG_ARCH_IMX25)
+	if (readl(IMX_CCM_BASE + CCM_RCSR) & (1 << 8))
+		return 1;
+	else
+		return 0;
+#endif
+}
+
+void __bare_init imx_nand_load_image(void *dest, int size)
+{
+	u32 tmp, page, block, blocksize, pagesize;
+	int pagesize_2k = 1;
+	void *regs, *base, *spare0;
+
+#if defined(CONFIG_NAND_IMX_BOOT_512)
+	pagesize_2k = 0;
+#elif defined(CONFIG_NAND_IMX_BOOT_2K)
+	pagesize_2k = 1;
+#else
+	pagesize_2k = is_pagesize_2k();
+#endif
+
+	if (pagesize_2k) {
+		pagesize = 2048;
+		blocksize = 128 * 1024;
+	} else {
+		pagesize = 512;
+		blocksize = 16 * 1024;
+	}
+
+	base = (void __iomem *)IMX_NFC_BASE;
+	if (nfc_is_v21()) {
+		regs = base + 0x1e00;
+		spare0 = base + 0x1000;
+	} else if (nfc_is_v1()) {
+		regs = base + 0xe00;
+		spare0 = base + 0x800;
+	}
+
+	imx_nandboot_send_cmd(regs, NAND_CMD_RESET);
+
+	/* preset operation */
+	/* Unlock the internal RAM Buffer */
+	writew(0x2, regs + NFC_V1_V2_CONFIG);
+
+	/* Unlock Block Command for given address range */
+	writew(0x4, regs + NFC_V1_V2_WRPROT);
+
+	tmp = readw(regs + NFC_V1_V2_CONFIG1);
+	tmp |= NFC_V1_V2_CONFIG1_ECC_EN;
+	if (nfc_is_v21())
+		/* currently no support for 218 byte OOB with stronger ECC */
+		tmp |= NFC_V2_CONFIG1_ECC_MODE_4;
+	tmp &= ~(NFC_V1_V2_CONFIG1_SP_EN | NFC_V1_V2_CONFIG1_INT_MSK);
+	writew(tmp, regs + NFC_V1_V2_CONFIG1);
+
+	if (nfc_is_v21()) {
+		if (pagesize_2k)
+			writew(NFC_V2_SPAS_SPARESIZE(64), regs + NFC_V2_SPAS);
+		else
+			writew(NFC_V2_SPAS_SPARESIZE(16), regs + NFC_V2_SPAS);
+	}
+
+	block = page = 0;
+
+	while (1) {
+		page = 0;
+		while (page * pagesize < blocksize) {
+			debug("page: %d block: %d dest: %p src "
+					"0x%08x\n",
+					page, block, dest,
+					block * blocksize +
+					page * pagesize);
+
+			imx_nandboot_send_cmd(regs, NAND_CMD_READ0);
+			imx_nandboot_nfc_addr(regs, block * blocksize +
+					page * pagesize, pagesize_2k);
+			imx_nandboot_send_page(regs, NFC_OUTPUT, pagesize_2k);
+			page++;
+
+			if (pagesize_2k) {
+				if ((readw(spare0) & 0xff) != 0xff)
+					continue;
+			} else {
+				if ((readw(spare0 + 4) & 0xff00) != 0xff00)
+					continue;
+			}
+
+			__memcpy32(dest, base, pagesize);
+			dest += pagesize;
+			size -= pagesize;
+
+			if (size <= 0)
+				return;
+		}
+		block++;
+	}
+}
+
+#define CONFIG_NAND_IMX_BOOT_DEBUG
+#ifdef CONFIG_NAND_IMX_BOOT_DEBUG
+#include <command.h>
+
+static int do_nand_boot_test(int argc, char *argv[])
+{
+	void *dest;
+	int size;
+
+	if (argc < 3)
+		return COMMAND_ERROR_USAGE;
+
+	dest = (void *)strtoul_suffix(argv[1], NULL, 0);
+	size = strtoul_suffix(argv[2], NULL, 0);
+
+	imx_nand_load_image(dest, size);
+
+	return 0;
+}
+
+static const __maybe_unused char cmd_nand_boot_test_help[] =
+"Usage: nand_boot_test <dest> <size>\n"
+"This command loads the booloader from the NAND memory like the reset\n"
+"routine does. Its intended for development tests only";
+
+BAREBOX_CMD_START(nand_boot_test)
+	.cmd		= do_nand_boot_test,
+	.usage		= "load bootloader from NAND",
+	BAREBOX_CMD_HELP(cmd_nand_boot_test_help)
+BAREBOX_CMD_END
+#endif
diff --git a/arch/arm/mach-imx/internal-nand-boot.c b/arch/arm/mach-imx/internal-nand-boot.c
deleted file mode 100644
index e72a944..0000000
--- a/arch/arm/mach-imx/internal-nand-boot.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <init.h>
-#include <io.h>
-#include <linux/mtd/nand.h>
-#include <mach/imx-nand.h>
-#include <mach/generic.h>
-#include <mach/imx-regs.h>
-
-static void __bare_init noinline imx_nandboot_wait_op_done(void *regs)
-{
-	u32 r;
-
-	while (1) {
-		r = readw(regs + NFC_V1_V2_CONFIG2);
-		if (r & NFC_V1_V2_CONFIG2_INT)
-			break;
-	};
-
-	r &= ~NFC_V1_V2_CONFIG2_INT;
-
-	writew(r, regs + NFC_V1_V2_CONFIG2);
-}
-
-/*
- * This function issues the specified command to the NAND device and
- * waits for completion.
- *
- * @param       cmd     command for NAND Flash
- */
-static void __bare_init imx_nandboot_send_cmd(void *regs, u16 cmd)
-{
-	writew(cmd, regs + NFC_V1_V2_FLASH_CMD);
-	writew(NFC_CMD, regs + NFC_V1_V2_CONFIG2);
-
-	imx_nandboot_wait_op_done(regs);
-}
-
-/*
- * This function sends an address (or partial address) to the
- * NAND device.  The address is used to select the source/destination for
- * a NAND command.
- *
- * @param       addr    address to be written to NFC.
- * @param       islast  True if this is the last address cycle for command
- */
-static void __bare_init noinline imx_nandboot_send_addr(void *regs, u16 addr)
-{
-	writew(addr, regs + NFC_V1_V2_FLASH_ADDR);
-	writew(NFC_ADDR, regs + NFC_V1_V2_CONFIG2);
-
-	/* Wait for operation to complete */
-	imx_nandboot_wait_op_done(regs);
-}
-
-static void __bare_init imx_nandboot_nfc_addr(void *regs, u32 offs, int pagesize_2k)
-{
-	imx_nandboot_send_addr(regs, offs & 0xff);
-
-	if (pagesize_2k) {
-		imx_nandboot_send_addr(regs, offs & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 11) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 19) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 27) & 0xff);
-		imx_nandboot_send_cmd(regs, NAND_CMD_READSTART);
-	} else {
-		imx_nandboot_send_addr(regs, (offs >> 9) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 17) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 25) & 0xff);
-	}
-}
-
-static void __bare_init imx_nandboot_send_page(void *regs,
-		unsigned int ops, int pagesize_2k)
-{
-	int bufs, i;
-
-	if (nfc_is_v1() && pagesize_2k)
-		bufs = 4;
-	else
-		bufs = 1;
-
-	for (i = 0; i < bufs; i++) {
-		/* NANDFC buffer 0 is used for page read/write */
-		writew(i, regs + NFC_V1_V2_BUF_ADDR);
-
-		writew(ops, regs + NFC_V1_V2_CONFIG2);
-
-		/* Wait for operation to complete */
-		imx_nandboot_wait_op_done(regs);
-	}
-}
-
-static void __bare_init __memcpy32(void *trg, const void *src, int size)
-{
-	int i;
-	unsigned int *t = trg;
-	unsigned const int *s = src;
-
-	for (i = 0; i < (size >> 2); i++)
-		*t++ = *s++;
-}
-
-static int __maybe_unused is_pagesize_2k(void)
-{
-#ifdef CONFIG_ARCH_IMX21
-	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
-		return 1;
-	else
-		return 0;
-#endif
-#ifdef CONFIG_ARCH_IMX27
-	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
-		return 1;
-	else
-		return 0;
-#endif
-#ifdef CONFIG_ARCH_IMX31
-	if (readl(IMX_CCM_BASE + CCM_RCSR) & RCSR_NFMS)
-		return 1;
-	else
-		return 0;
-#endif
-#if defined(CONFIG_ARCH_IMX35) || defined(CONFIG_ARCH_IMX25)
-	if (readl(IMX_CCM_BASE + CCM_RCSR) & (1 << 8))
-		return 1;
-	else
-		return 0;
-#endif
-}
-
-void __bare_init imx_nand_load_image(void *dest, int size)
-{
-	u32 tmp, page, block, blocksize, pagesize;
-	int pagesize_2k = 1;
-	void *regs, *base, *spare0;
-
-#if defined(CONFIG_NAND_IMX_BOOT_512)
-	pagesize_2k = 0;
-#elif defined(CONFIG_NAND_IMX_BOOT_2K)
-	pagesize_2k = 1;
-#else
-	pagesize_2k = is_pagesize_2k();
-#endif
-
-	if (pagesize_2k) {
-		pagesize = 2048;
-		blocksize = 128 * 1024;
-	} else {
-		pagesize = 512;
-		blocksize = 16 * 1024;
-	}
-
-	base = (void __iomem *)IMX_NFC_BASE;
-	if (nfc_is_v21()) {
-		regs = base + 0x1e00;
-		spare0 = base + 0x1000;
-	} else if (nfc_is_v1()) {
-		regs = base + 0xe00;
-		spare0 = base + 0x800;
-	}
-
-	imx_nandboot_send_cmd(regs, NAND_CMD_RESET);
-
-	/* preset operation */
-	/* Unlock the internal RAM Buffer */
-	writew(0x2, regs + NFC_V1_V2_CONFIG);
-
-	/* Unlock Block Command for given address range */
-	writew(0x4, regs + NFC_V1_V2_WRPROT);
-
-	tmp = readw(regs + NFC_V1_V2_CONFIG1);
-	tmp |= NFC_V1_V2_CONFIG1_ECC_EN;
-	if (nfc_is_v21())
-		/* currently no support for 218 byte OOB with stronger ECC */
-		tmp |= NFC_V2_CONFIG1_ECC_MODE_4;
-	tmp &= ~(NFC_V1_V2_CONFIG1_SP_EN | NFC_V1_V2_CONFIG1_INT_MSK);
-	writew(tmp, regs + NFC_V1_V2_CONFIG1);
-
-	if (nfc_is_v21()) {
-		if (pagesize_2k)
-			writew(NFC_V2_SPAS_SPARESIZE(64), regs + NFC_V2_SPAS);
-		else
-			writew(NFC_V2_SPAS_SPARESIZE(16), regs + NFC_V2_SPAS);
-	}
-
-	block = page = 0;
-
-	while (1) {
-		page = 0;
-		while (page * pagesize < blocksize) {
-			debug("page: %d block: %d dest: %p src "
-					"0x%08x\n",
-					page, block, dest,
-					block * blocksize +
-					page * pagesize);
-
-			imx_nandboot_send_cmd(regs, NAND_CMD_READ0);
-			imx_nandboot_nfc_addr(regs, block * blocksize +
-					page * pagesize, pagesize_2k);
-			imx_nandboot_send_page(regs, NFC_OUTPUT, pagesize_2k);
-			page++;
-
-			if (pagesize_2k) {
-				if ((readw(spare0) & 0xff) != 0xff)
-					continue;
-			} else {
-				if ((readw(spare0 + 4) & 0xff00) != 0xff00)
-					continue;
-			}
-
-			__memcpy32(dest, base, pagesize);
-			dest += pagesize;
-			size -= pagesize;
-
-			if (size <= 0)
-				return;
-		}
-		block++;
-	}
-}
-
-#define CONFIG_NAND_IMX_BOOT_DEBUG
-#ifdef CONFIG_NAND_IMX_BOOT_DEBUG
-#include <command.h>
-
-static int do_nand_boot_test(int argc, char *argv[])
-{
-	void *dest;
-	int size;
-
-	if (argc < 3)
-		return COMMAND_ERROR_USAGE;
-
-	dest = (void *)strtoul_suffix(argv[1], NULL, 0);
-	size = strtoul_suffix(argv[2], NULL, 0);
-
-	imx_nand_load_image(dest, size);
-
-	return 0;
-}
-
-static const __maybe_unused char cmd_nand_boot_test_help[] =
-"Usage: nand_boot_test <dest> <size>\n"
-"This command loads the booloader from the NAND memory like the reset\n"
-"routine does. Its intended for development tests only";
-
-BAREBOX_CMD_START(nand_boot_test)
-	.cmd		= do_nand_boot_test,
-	.usage		= "load bootloader from NAND",
-	BAREBOX_CMD_HELP(cmd_nand_boot_test_help)
-BAREBOX_CMD_END
-#endif
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:47 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:47 +0200
Subject: [PATCH 17/30] gpio: add static inlines for gpio_request/gpio_free
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-17-git-send-email-s.hauer@pengutronix.de>

Some drivers use gpio_request/gpio_free. Currently no architecture
has code behind these functions. Provide static inline functions
for these and remvoe the at91 specific inline functions.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-at91/include/mach/gpio.h |    9 ---------
 include/gpio.h                         |   13 +++++++++++++
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 0f93f8d..3533bf9 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -248,15 +248,6 @@ struct at91_gpio_bank {
 
 extern int at91_gpio_init(struct at91_gpio_bank *data, int nr_banks);
 
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-	return 0;
-}
-
-static inline void gpio_free(unsigned gpio)
-{
-}
-
 extern int gpio_direction_input(unsigned gpio);
 extern int gpio_direction_output(unsigned gpio, int value);
 #define gpio_get_value at91_get_gpio_value
diff --git a/include/gpio.h b/include/gpio.h
index 9fc03a4..b7d8402 100644
--- a/include/gpio.h
+++ b/include/gpio.h
@@ -1 +1,14 @@
+#ifndef __GPIO_H
+#define __GPIO_H
+
 #include <asm/gpio.h>
+
+static inline int gpio_request(unsigned gpio, const char *label)
+{
+	return 0;
+}
+
+static inline void gpio_free(unsigned gpio)
+{
+}
+#endif /* __GPIO_H */
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:57 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:57 +0200
Subject: [PATCH 27/30] uimage: select uncompress and crc32 support
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-27-git-send-email-s.hauer@pengutronix.de>

uImage support needs both.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/Kconfig |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/common/Kconfig b/common/Kconfig
index 9e4f6b3..c52406c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -48,6 +48,8 @@ config BINFMT
 	select FILETYPE
 
 config UIMAGE
+	select UNCOMPRESS
+	select CRC32
 	bool
 
 config GLOBALVAR
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:37:00 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:37:00 +0200
Subject: [PATCH 30/30] UBI: select crc32 support
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-30-git-send-email-s.hauer@pengutronix.de>

UBI needs this.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/ubi/Kconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig
index 35d321b..2cf474a 100644
--- a/drivers/mtd/ubi/Kconfig
+++ b/drivers/mtd/ubi/Kconfig
@@ -1,6 +1,7 @@
 config UBI
 	bool "UBI support               "
 	select PARTITION_NEED_MTD
+	select CRC32
 	help
 	  This enables support for UBI (unsorted block images)
 
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:54 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:54 +0200
Subject: [PATCH 24/30] mtd omap: add prefix to omap specific decode_bch
 function
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-24-git-send-email-s.hauer@pengutronix.de>

So that it does not collide with our generic decode_bch function.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/nand/nand_omap_bch_decoder.c |    2 +-
 drivers/mtd/nand/nand_omap_gpmc.c        |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/nand_omap_bch_decoder.c b/drivers/mtd/nand/nand_omap_bch_decoder.c
index d1455e4..64e8031 100644
--- a/drivers/mtd/nand/nand_omap_bch_decoder.c
+++ b/drivers/mtd/nand/nand_omap_bch_decoder.c
@@ -366,7 +366,7 @@ static void syndrome(unsigned int select_4_8,
  * Number of errors that can be corrected: 4- or 8-bits
  * Length of information bit: kk = nn - rr
  */
-int decode_bch(int select_4_8, unsigned char *ecc, unsigned int *err_loc)
+int omap_gpmc_decode_bch(int select_4_8, unsigned char *ecc, unsigned int *err_loc)
 {
 	int no_of_err;
 	unsigned int syn[16] = {0,};	/* 16 Syndromes */
diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
index d55dcaa..86d4574 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -90,7 +90,7 @@
 #define GPMC_ECC_SIZE_CONFIG_ECCSIZE0(x)	((x) << 12)
 #define GPMC_ECC_SIZE_CONFIG_ECCSIZE1(x)	((x) << 22)
 
-int decode_bch(int select_4_8, unsigned char *ecc, unsigned int *err_loc);
+int omap_gpmc_decode_bch(int select_4_8, unsigned char *ecc, unsigned int *err_loc);
 
 static char *ecc_mode_strings[] = {
 	"software",
@@ -400,7 +400,7 @@ static int omap_correct_bch(struct mtd_info *mtd, uint8_t *dat,
 
 		count = 0;
 		if (eccflag == 1) {
-			count = decode_bch(select_4_8, calc_ecc, err_loc);
+			count = omap_gpmc_decode_bch(select_4_8, calc_ecc, err_loc);
 			if (count < 0)
 				return count;
 			else
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:59 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:59 +0200
Subject: [PATCH 29/30] mtd: scan_write_bbt is only needed with mtd write
 support
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-29-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/nand/nand_bbt.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index c1696ee..3cbf886 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -254,6 +254,7 @@ static int scan_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t offs,
 /*
  * Scan write data with oob to flash
  */
+#ifdef CONFIG_MTD_WRITE
 static int scan_write_bbt(struct mtd_info *mtd, loff_t offs, size_t len,
 			  uint8_t *buf, uint8_t *oob)
 {
@@ -268,6 +269,7 @@ static int scan_write_bbt(struct mtd_info *mtd, loff_t offs, size_t len,
 
 	return mtd->write_oob(mtd, offs, &ops);
 }
+#endif
 
 /**
  * read_abs_bbts - [GENERIC] Read the bad block table(s) for all chips starting at a given page
-- 
1.7.10



From s.hauer at pengutronix.de  Thu Jul  5 15:36:55 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  5 Jul 2012 21:36:55 +0200
Subject: [PATCH 25/30] ARM at91: remove const
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1341517020-5581-25-git-send-email-s.hauer@pengutronix.de>

Although the spi chipselects should really be const, there is no
good way to fix the compiler warning, so remove the const.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-at91/at91rm9200_devices.c  |    2 +-
 arch/arm/mach-at91/at91sam9261_devices.c |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 3bfa08e..8cb2f57 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -159,7 +159,7 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_DRIVER_SPI_ATMEL)
-static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
+static unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
 
 static struct at91_spi_platform_data spi_pdata[] = {
 	[0] = {
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 41eeeae..7acab0c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -107,9 +107,9 @@ void at91_add_device_nand(struct atmel_nand_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_DRIVER_SPI_ATMEL)
-static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
+static unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
 
-static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
+static unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
 
 static struct at91_spi_platform_data spi_pdata[] = {
 	[0] = {
-- 
1.7.10



From s.hauer at pengutronix.de  Fri Jul  6 03:37:03 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 6 Jul 2012 09:37:03 +0200
Subject: [PATCH 01/30] USB: Fix typo tranceiver -> transceiver
In-Reply-To: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
References: <1341517020-5581-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120706073703.GL24458@pengutronix.de>

Forgot to mention that this series is based on a bunch of randconfig
builds. There are some patches missing that I am currently not happy
with, but with them I managed to build dozens of randconfigs without
errors.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jlu at pengutronix.de  Fri Jul  6 05:45:58 2012
From: jlu at pengutronix.de (Jan Luebbe)
Date: Fri,  6 Jul 2012 11:45:58 +0200
Subject: [PATCH] drivers/net/ksz8864rmn: add driver for Micrel KSZ8864RMN
 Ethernet Switch
Message-ID: <1341567958-8543-1-git-send-email-jlu@pengutronix.de>

It start the switch and provides basic access to the registers.

This driver could also work with some other Micrel switches, possibly
with some small changes.

Signed-off-by: Jan Luebbe <jlu at pengutronix.de>
---
 drivers/net/Kconfig      |    7 ++
 drivers/net/Makefile     |    1 +
 drivers/net/ksz8864rmn.c |  177 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 185 insertions(+)
 create mode 100644 drivers/net/ksz8864rmn.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 172cc39..2abea9b 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -110,5 +110,12 @@ config DRIVER_NET_KS8851_MLL
 
 source "drivers/net/usb/Kconfig"
 
+config DRIVER_NET_MICREL
+	depends on SPI
+	bool "Micrel KSZ8864RMN Ethernet Switch driver"
+	help
+	  This option enables support for enabling the Micrel
+	  KSZ8864RMN Ethernet Switch over SPI.
+
 endmenu
 
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 34dbee9..e7b1e2d 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_MIIDEV)			+= miidev.o
 obj-$(CONFIG_NET_USB)			+= usb/
 obj-$(CONFIG_DRIVER_NET_TSE)		+= altera_tse.o
 obj-$(CONFIG_DRIVER_NET_KS8851_MLL)	+= ks8851_mll.o
+obj-$(CONFIG_DRIVER_NET_MICREL)		+= ksz8864rmn.o
diff --git a/drivers/net/ksz8864rmn.c b/drivers/net/ksz8864rmn.c
new file mode 100644
index 0000000..2f86c77
--- /dev/null
+++ b/drivers/net/ksz8864rmn.c
@@ -0,0 +1,177 @@
+/*
+ * Copyright (C) 2012 Jan Luebbe, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <spi/spi.h>
+#include <errno.h>
+
+#define REG_ID0			0x00
+#define REG_ID1			0x01
+
+#define REG_GC00		0x02
+#define REG_GC01		0x03
+#define REG_GC02		0x04
+#define REG_GC03		0x05
+#define REG_GC04		0x06
+#define REG_GC05		0x07
+#define REG_GC06		0x08
+#define REG_GC07		0x09
+#define REG_GC08		0x0a
+#define REG_GC09		0x0b
+#define REG_GC10		0x0c
+#define REG_GC11		0x0d
+
+#define REG_PSTAT1(p)		(0x10 * p + 0xe)
+#define REG_PSTAT2(p)		(0x10 * p + 0xf)
+
+#define CMD_WRITE		0x02
+#define CMD_READ		0x03
+
+static int micrel_switch_read_reg(struct spi_device *spi, uint8_t reg)
+{
+	uint8_t tx[2];
+	uint8_t rx[1];
+	int ret;
+
+	tx[0] = CMD_READ;
+	tx[1] = reg;
+
+	ret = spi_write_then_read(spi, tx, 2, rx, 1);
+	if (ret < 0)
+		return ret;
+
+	return rx[0];
+}
+
+static void micrel_switch_write_reg(struct spi_device *spi, uint8_t reg, uint8_t val)
+{
+	uint8_t tx[3];
+
+	tx[0] = CMD_WRITE;
+	tx[1] = reg;
+	tx[2] = val;
+
+	spi_write_then_read(spi, tx, 3, NULL, 0);
+}
+
+static int micrel_switch_enable_set(struct device_d *dev, struct param_d *param,
+		const char *val)
+{
+	struct spi_device *spi = (struct spi_device *)dev->type_data;
+	int enable;
+	char *new;
+
+	if (!val)
+		return dev_param_set_generic(dev, param, NULL);
+
+	enable = simple_strtoul(val, NULL, 0);
+
+	if (enable) {
+		micrel_switch_write_reg(spi, REG_ID1, 1);
+		new = "1";
+	} else {
+		micrel_switch_write_reg(spi, REG_ID1, 0);
+		new = "0";
+	}
+
+	dev_param_set_generic(dev, param, new);
+
+	return 0;
+}
+
+static void micrel_switch_print_reg(struct spi_device *spi, const char *name, uint8_t reg)
+{
+	uint8_t tx[2];
+	uint8_t rx[1];
+	int ret;
+
+	tx[0] = CMD_READ;
+	tx[1] = reg;
+
+	ret = spi_write_then_read(spi, tx, 2, rx, 1);
+	if (ret < 0)
+		printf("%s at 0x%02x: SPI error\n", name, reg);
+
+	printf("%s at 0x%02x: 0x%02x\n", name, reg, rx[0]);
+}
+
+static void micrel_switch_info(struct device_d *dev)
+{
+	struct spi_device *spi = (struct spi_device *)dev->type_data;
+
+	printf("Registers:\n");
+	micrel_switch_print_reg(spi, " Chip ID 0", REG_ID0);
+	micrel_switch_print_reg(spi, " Chip ID 1", REG_ID1);
+	micrel_switch_print_reg(spi, " Global Control  0", REG_GC00);
+	micrel_switch_print_reg(spi, " Global Control  1", REG_GC01);
+	micrel_switch_print_reg(spi, " Global Control  2", REG_GC02);
+	micrel_switch_print_reg(spi, " Global Control  3", REG_GC03);
+	micrel_switch_print_reg(spi, " Global Control  4", REG_GC04);
+	micrel_switch_print_reg(spi, " Global Control  5", REG_GC05);
+	micrel_switch_print_reg(spi, " Global Control  6", REG_GC06);
+	micrel_switch_print_reg(spi, " Global Control  7", REG_GC07);
+	micrel_switch_print_reg(spi, " Global Control  8", REG_GC08);
+	micrel_switch_print_reg(spi, " Global Control  9", REG_GC09);
+	micrel_switch_print_reg(spi, " Global Control 10", REG_GC10);
+	micrel_switch_print_reg(spi, " Global Control 11", REG_GC11);
+	micrel_switch_print_reg(spi, " Port 1 Status 1", REG_PSTAT1(1));
+	micrel_switch_print_reg(spi, " Port 1 Status 2", REG_PSTAT2(1));
+	micrel_switch_print_reg(spi, " Port 2 Status 1", REG_PSTAT1(2));
+	micrel_switch_print_reg(spi, " Port 2 Status 2", REG_PSTAT2(2));
+}
+
+static int micrel_switch_probe(struct device_d *dev)
+{
+	struct spi_device *spi = (struct spi_device *)dev->type_data;
+	int ret = 0;
+
+	spi->mode = SPI_MODE_0;
+	spi->bits_per_word = 8;
+
+	ret = micrel_switch_read_reg(spi, REG_ID0);
+	if (ret < 0) {
+		dev_err(&spi->dev, "failed to read device id\n");
+		return ret;
+	}
+	if (ret != 0x95) {
+		dev_err(&spi->dev, "unknown device id: %02x\n", ret);
+		return -1;
+	}
+
+	dev_add_param(dev, "enable", micrel_switch_enable_set, NULL, 0);
+	dev_set_param(dev, "enable", "1");
+
+	return 0;
+}
+
+static struct driver_d micrel_switch_driver = {
+	.name  = "ksz8864rmn",
+	.probe = micrel_switch_probe,
+	.info  = micrel_switch_info,
+};
+
+static int micrel_switch_init(void)
+{
+	register_driver(&micrel_switch_driver);
+	return 0;
+}
+device_initcall(micrel_switch_init);
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul  6 06:34:02 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri,  6 Jul 2012 14:34:02 +0400
Subject: [PATCH] MIPS: malta: register memory bank
Message-ID: <1341570842-12951-1-git-send-email-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/boards/qemu-malta/init.c |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/mips/boards/qemu-malta/init.c b/arch/mips/boards/qemu-malta/init.c
index 2a6eadb..0efc92a 100644
--- a/arch/mips/boards/qemu-malta/init.c
+++ b/arch/mips/boards/qemu-malta/init.c
@@ -23,6 +23,7 @@
 #include <types.h>
 #include <driver.h>
 #include <init.h>
+#include <memory.h>
 #include <ns16550.h>
 #include <mach/hardware.h>
 #include <io.h>
@@ -30,6 +31,14 @@
 #include <sizes.h>
 #include <asm/common.h>
 
+static int malta_mem_init(void)
+{
+	barebox_add_memory_bank("ram0", 0xa0000000, SZ_256M);
+
+	return 0;
+}
+mem_initcall(malta_mem_init);
+
 static int malta_devices_init(void)
 {
 	add_cfi_flash_device(0, 0x1e000000, SZ_4M, 0);
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul  6 06:34:28 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri,  6 Jul 2012 14:34:28 +0400
Subject: [PATCH] MIPS: remove unused processor-specific constants and macros
Message-ID: <1341570868-12989-1-git-send-email-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/include/asm/asm.h      |    8 --------
 arch/mips/include/asm/mipsregs.h |   32 --------------------------------
 2 files changed, 40 deletions(-)

diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
index 608cfcf..12e1758 100644
--- a/arch/mips/include/asm/asm.h
+++ b/arch/mips/include/asm/asm.h
@@ -398,12 +398,4 @@ symbol		=	value
 
 #define SSNOP		sll zero, zero, 1
 
-#ifdef CONFIG_SGI_IP28
-/* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
-#include <asm/cacheops.h>
-#define R10KCBARRIER(addr)  cache   Cache_Barrier, addr;
-#else
-#define R10KCBARRIER(addr)
-#endif
-
 #endif /* __ASM_ASM_H */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index befccbb..16ba38e 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -102,11 +102,6 @@
 #define CP0_S3_SRSMAP	  $12	/* MIPSR2 */
 
 /*
- *  TX39 Series
- */
-#define CP0_TX39_CACHE	$7
-
-/*
  * Coprocessor 1 (FPU) register names
  */
 #define CP1_REVISION   $0
@@ -387,27 +382,6 @@
 #define R5K_CONF_SE		(_ULCAST_(1) << 12)
 #define R5K_CONF_SS		(_ULCAST_(3) << 20)
 
-/* Bits specific to the RM7000.  */
-#define RM7K_CONF_SE		(_ULCAST_(1) <<  3)
-#define RM7K_CONF_TE		(_ULCAST_(1) << 12)
-#define RM7K_CONF_CLK		(_ULCAST_(1) << 16)
-#define RM7K_CONF_TC		(_ULCAST_(1) << 17)
-#define RM7K_CONF_SI		(_ULCAST_(3) << 20)
-#define RM7K_CONF_SC		(_ULCAST_(1) << 31)
-
-/* Bits specific to the R10000.  */
-#define R10K_CONF_DN		(_ULCAST_(3) <<  3)
-#define R10K_CONF_CT		(_ULCAST_(1) <<  5)
-#define R10K_CONF_PE		(_ULCAST_(1) <<  6)
-#define R10K_CONF_PM		(_ULCAST_(3) <<  7)
-#define R10K_CONF_EC		(_ULCAST_(15)<<  9)
-#define R10K_CONF_SB		(_ULCAST_(1) << 13)
-#define R10K_CONF_SK		(_ULCAST_(1) << 14)
-#define R10K_CONF_SS		(_ULCAST_(7) << 16)
-#define R10K_CONF_SC		(_ULCAST_(7) << 19)
-#define R10K_CONF_DC		(_ULCAST_(7) << 26)
-#define R10K_CONF_IC		(_ULCAST_(7) << 29)
-
 /* Bits specific to the R30xx.  */
 #define R30XX_CONF_FDM		(_ULCAST_(1) << 19)
 #define R30XX_CONF_REV		(_ULCAST_(1) << 22)
@@ -419,12 +393,6 @@
 #define R30XX_CONF_SB		(_ULCAST_(1) << 30)
 #define R30XX_CONF_LOCK		(_ULCAST_(1) << 31)
 
-/* Bits specific to the TX49.  */
-#define TX49_CONF_DC		(_ULCAST_(1) << 16)
-#define TX49_CONF_IC		(_ULCAST_(1) << 17)  /* conflict with CONF_SC */
-#define TX49_CONF_HALT		(_ULCAST_(1) << 18)
-#define TX49_CONF_CWFON		(_ULCAST_(1) << 27)
-
 /* Bits specific to the MIPS32/64 PRA.  */
 #define MIPS_CONF_MT		(_ULCAST_(7) <<  7)
 #define MIPS_CONF_AR		(_ULCAST_(7) << 10)
-- 
1.7.10



From s.hauer at pengutronix.de  Mon Jul  9 03:09:39 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon,  9 Jul 2012 09:09:39 +0200
Subject: [PATCH] ARM: Enable unaligned accesses on armv6 and later
Message-ID: <1341817779-29531-1-git-send-email-s.hauer@pengutronix.de>

We have the following in the tree:

|commit af42feb9d255bc3ea3b514180f265479ea8834f9
|Author: Enrico Scholz <enrico.scholz at sigma-chemnitz.de>
|Date:   Mon Jan 2 11:49:17 2012 +0100
|
|    ARM: set SCTRL[A] only when architecture does not support unaligned access
|
|    Recent gcc generates code with unaligned access when architecture
|    supports it. Setting A bit unconditionally causes data-aborts on such
|    code rendering barebox unusable.
|
|    Signed-off-by: Enrico Scholz <enrico.scholz at sigma-chemnitz.de>
|    Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

What the patch tried is correct: We should set the A bit only when the architecture
does not support unaligned accesses. To figure out whether the architecture supports
unaligned accesses the patch tested for the U bit which is wrong. The U bit may be
0 after a reset, so instead of testing for the U bit we have to set it. This can
be done on armv6 and later. All others have the A bit set to trap unaligned accesses.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---

Enrico, can you confirm this is correct?

Thanks
 Sascha

 arch/arm/cpu/start.c |   12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 3c282ee..523179d 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -81,13 +81,11 @@ void __naked __bare_init reset(void)
 	r &= ~(CR_M | CR_C | CR_B | CR_S | CR_R | CR_V);
 	r |= CR_I;
 
-	if (!(r & CR_U))
-		/* catch unaligned access on architectures which do not
-		 * support unaligned access */
-		r |= CR_A;
-	else
-		r &= ~CR_A;
-
+#if __LINUX_ARM_ARCH__ >= 6
+	r |= CR_U;
+#else
+	r |= CR_A;
+#endif
 
 #ifdef __ARMEB__
 	r |= CR_B;
-- 
1.7.10



From s.hauer at pengutronix.de  Mon Jul  9 03:13:56 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon,  9 Jul 2012 09:13:56 +0200
Subject: [PATCH] mtd: fix bad block ioctls
Message-ID: <1341818036-30427-1-git-send-email-s.hauer@pengutronix.de>

Since this commit we interpret the argument to the bad block ioctls
as a pointer to a 64bit number:

|commit e71c34366808bbe3ce0b166d8710749513af6d81
|Author: Sascha Hauer <s.hauer at pengutronix.de>
|Date:   Fri Oct 14 11:57:55 2011 +0200
|
|    mtd: fix arguments to bad block ioctls
|
|    In the Kernel the mtd ioctls expect a pointer to the offset, whereas
|    barebox interprets the pointer itself as an offset. Since we want
|    to add 64bit support for file sizes a pointer may not be sufficient,
|    so align with the kernel and convert it to a pointer to the offset.
|
|    Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

This missed some places, fix them aswell.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---

Jean-Christophe,

Does this fix your nand issues on current master?

Sascha

 commands/nand.c            |    3 ++-
 commands/nandtest.c        |    4 ++--
 drivers/mtd/nand/nand-bb.c |    4 ++--
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/commands/nand.c b/commands/nand.c
index 34aa07b..6124dae 100644
--- a/commands/nand.c
+++ b/commands/nand.c
@@ -79,6 +79,7 @@ static int do_nand(int argc, char *argv[])
 	if (command & NAND_MARKBAD) {
 		if (optind < argc) {
 			int ret = 0, fd;
+			loff_t __badblock = badblock;
 
 			printf("marking block at 0x%08x on %s as bad\n", badblock, argv[optind]);
 
@@ -88,7 +89,7 @@ static int do_nand(int argc, char *argv[])
 				return 1;
 			}
 
-			ret = ioctl(fd, MEMSETBADBLOCK, (void *)badblock);
+			ret = ioctl(fd, MEMSETBADBLOCK, &__badblock);
 			if (ret)
 				perror("ioctl");
 
diff --git a/commands/nandtest.c b/commands/nandtest.c
index d923e42..06b7f94 100644
--- a/commands/nandtest.c
+++ b/commands/nandtest.c
@@ -307,11 +307,11 @@ static int do_nandtest(int argc, char *argv[])
 		for (test_ofs = flash_offset;
 				test_ofs < flash_offset+length;
 				test_ofs += meminfo.erasesize) {
-
+			loff_t __test_ofs = test_ofs;
 			srand(seed);
 			seed = rand();
 
-			if (ioctl(fd, MEMGETBADBLOCK, (void *)test_ofs)) {
+			if (ioctl(fd, MEMGETBADBLOCK, &__test_ofs)) {
 				printf("\rBad block at 0x%08x\n",
 						(unsigned)(test_ofs +
 							memregion.offset));
diff --git a/drivers/mtd/nand/nand-bb.c b/drivers/mtd/nand/nand-bb.c
index d272749..5b06a9e 100644
--- a/drivers/mtd/nand/nand-bb.c
+++ b/drivers/mtd/nand/nand-bb.c
@@ -216,7 +216,7 @@ static int nand_bb_calc_size(struct nand_bb *bb)
 static loff_t nand_bb_lseek(struct cdev *cdev, loff_t __offset)
 {
 	struct nand_bb *bb = cdev->priv;
-	unsigned long raw_pos = 0;
+	loff_t raw_pos = 0;
 	uint32_t offset = __offset;
 	int ret;
 
@@ -226,7 +226,7 @@ static loff_t nand_bb_lseek(struct cdev *cdev, loff_t __offset)
 	while (raw_pos < bb->raw_size) {
 		off_t now = min(offset, bb->info.erasesize);
 
-		ret = cdev_ioctl(bb->cdev_parent, MEMGETBADBLOCK, (void *)raw_pos);
+		ret = cdev_ioctl(bb->cdev_parent, MEMGETBADBLOCK, &raw_pos);
 		if (ret < 0)
 			return ret;
 		if (!ret) {
-- 
1.7.10



From s.hauer at pengutronix.de  Mon Jul  9 03:24:32 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 9 Jul 2012 09:24:32 +0200
Subject: [PATCH] MIPS: malta: register memory bank
In-Reply-To: <1341570842-12951-1-git-send-email-antonynpavlov@gmail.com>
References: <1341570842-12951-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <20120709072432.GN30009@pengutronix.de>

On Fri, Jul 06, 2012 at 02:34:02PM +0400, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/mips/boards/qemu-malta/init.c |    9 +++++++++
>  1 file changed, 9 insertions(+)

Applied, thanks

Sascha

> 
> diff --git a/arch/mips/boards/qemu-malta/init.c b/arch/mips/boards/qemu-malta/init.c
> index 2a6eadb..0efc92a 100644
> --- a/arch/mips/boards/qemu-malta/init.c
> +++ b/arch/mips/boards/qemu-malta/init.c
> @@ -23,6 +23,7 @@
>  #include <types.h>
>  #include <driver.h>
>  #include <init.h>
> +#include <memory.h>
>  #include <ns16550.h>
>  #include <mach/hardware.h>
>  #include <io.h>
> @@ -30,6 +31,14 @@
>  #include <sizes.h>
>  #include <asm/common.h>
>  
> +static int malta_mem_init(void)
> +{
> +	barebox_add_memory_bank("ram0", 0xa0000000, SZ_256M);
> +
> +	return 0;
> +}
> +mem_initcall(malta_mem_init);
> +
>  static int malta_devices_init(void)
>  {
>  	add_cfi_flash_device(0, 0x1e000000, SZ_4M, 0);
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul  9 03:24:44 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 9 Jul 2012 09:24:44 +0200
Subject: [PATCH] MIPS: remove unused processor-specific constants and
 macros
In-Reply-To: <1341570868-12989-1-git-send-email-antonynpavlov@gmail.com>
References: <1341570868-12989-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <20120709072444.GO30009@pengutronix.de>

On Fri, Jul 06, 2012 at 02:34:28PM +0400, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/mips/include/asm/asm.h      |    8 --------
>  arch/mips/include/asm/mipsregs.h |   32 --------------------------------
>  2 files changed, 40 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
> index 608cfcf..12e1758 100644
> --- a/arch/mips/include/asm/asm.h
> +++ b/arch/mips/include/asm/asm.h
> @@ -398,12 +398,4 @@ symbol		=	value
>  
>  #define SSNOP		sll zero, zero, 1
>  
> -#ifdef CONFIG_SGI_IP28
> -/* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
> -#include <asm/cacheops.h>
> -#define R10KCBARRIER(addr)  cache   Cache_Barrier, addr;
> -#else
> -#define R10KCBARRIER(addr)
> -#endif
> -
>  #endif /* __ASM_ASM_H */
> diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
> index befccbb..16ba38e 100644
> --- a/arch/mips/include/asm/mipsregs.h
> +++ b/arch/mips/include/asm/mipsregs.h
> @@ -102,11 +102,6 @@
>  #define CP0_S3_SRSMAP	  $12	/* MIPSR2 */
>  
>  /*
> - *  TX39 Series
> - */
> -#define CP0_TX39_CACHE	$7
> -
> -/*
>   * Coprocessor 1 (FPU) register names
>   */
>  #define CP1_REVISION   $0
> @@ -387,27 +382,6 @@
>  #define R5K_CONF_SE		(_ULCAST_(1) << 12)
>  #define R5K_CONF_SS		(_ULCAST_(3) << 20)
>  
> -/* Bits specific to the RM7000.  */
> -#define RM7K_CONF_SE		(_ULCAST_(1) <<  3)
> -#define RM7K_CONF_TE		(_ULCAST_(1) << 12)
> -#define RM7K_CONF_CLK		(_ULCAST_(1) << 16)
> -#define RM7K_CONF_TC		(_ULCAST_(1) << 17)
> -#define RM7K_CONF_SI		(_ULCAST_(3) << 20)
> -#define RM7K_CONF_SC		(_ULCAST_(1) << 31)
> -
> -/* Bits specific to the R10000.  */
> -#define R10K_CONF_DN		(_ULCAST_(3) <<  3)
> -#define R10K_CONF_CT		(_ULCAST_(1) <<  5)
> -#define R10K_CONF_PE		(_ULCAST_(1) <<  6)
> -#define R10K_CONF_PM		(_ULCAST_(3) <<  7)
> -#define R10K_CONF_EC		(_ULCAST_(15)<<  9)
> -#define R10K_CONF_SB		(_ULCAST_(1) << 13)
> -#define R10K_CONF_SK		(_ULCAST_(1) << 14)
> -#define R10K_CONF_SS		(_ULCAST_(7) << 16)
> -#define R10K_CONF_SC		(_ULCAST_(7) << 19)
> -#define R10K_CONF_DC		(_ULCAST_(7) << 26)
> -#define R10K_CONF_IC		(_ULCAST_(7) << 29)
> -
>  /* Bits specific to the R30xx.  */
>  #define R30XX_CONF_FDM		(_ULCAST_(1) << 19)
>  #define R30XX_CONF_REV		(_ULCAST_(1) << 22)
> @@ -419,12 +393,6 @@
>  #define R30XX_CONF_SB		(_ULCAST_(1) << 30)
>  #define R30XX_CONF_LOCK		(_ULCAST_(1) << 31)
>  
> -/* Bits specific to the TX49.  */
> -#define TX49_CONF_DC		(_ULCAST_(1) << 16)
> -#define TX49_CONF_IC		(_ULCAST_(1) << 17)  /* conflict with CONF_SC */
> -#define TX49_CONF_HALT		(_ULCAST_(1) << 18)
> -#define TX49_CONF_CWFON		(_ULCAST_(1) << 27)
> -
>  /* Bits specific to the MIPS32/64 PRA.  */
>  #define MIPS_CONF_MT		(_ULCAST_(7) <<  7)
>  #define MIPS_CONF_AR		(_ULCAST_(7) << 10)
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul  9 03:30:20 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 9 Jul 2012 09:30:20 +0200
Subject: [PATCH 1/3] string: add strim for ONFI code
In-Reply-To: <1341483767-20487-1-git-send-email-eric@eukrea.com>
References: <1341483767-20487-1-git-send-email-eric@eukrea.com>
Message-ID: <20120709073020.GQ30009@pengutronix.de>

On Thu, Jul 05, 2012 at 12:22:45PM +0200, Eric B?nard wrote:
> Signed-off-by: Eric B?nard <eric at eukrea.com>
> ---
>  include/linux/string.h |    3 +++
>  lib/string.c           |   39 +++++++++++++++++++++++++++++++++++++++
>  2 files changed, 42 insertions(+), 0 deletions(-)

Applied all three

Sascha

> 
> diff --git a/include/linux/string.h b/include/linux/string.h
> index 62d743e..afd0aa6 100644
> --- a/include/linux/string.h
> +++ b/include/linux/string.h
> @@ -93,6 +93,9 @@ extern int memcmp(const void *,const void *,__kernel_size_t);
>  #ifndef __HAVE_ARCH_MEMCHR
>  extern void * memchr(const void *,int,__kernel_size_t);
>  #endif
> +extern char * skip_spaces(const char *);
> +
> +extern char *strim(char *);
>  
>  #ifdef __cplusplus
>  }
> diff --git a/lib/string.c b/lib/string.c
> index 2865088..db4f2ae 100644
> --- a/lib/string.c
> +++ b/lib/string.c
> @@ -567,3 +567,42 @@ void *memchr(const void *s, int c, size_t n)
>  #endif
>  EXPORT_SYMBOL(memchr);
>  
> +/**
> + * skip_spaces - Removes leading whitespace from @str.
> + * @str: The string to be stripped.
> + *
> + * Returns a pointer to the first non-whitespace character in @str.
> + */
> +char *skip_spaces(const char *str)
> +{
> +	while (isspace(*str))
> +		++str;
> +	return (char *)str;
> +}
> +
> +/**
> + * strim - Removes leading and trailing whitespace from @s.
> + * @s: The string to be stripped.
> + *
> + * Note that the first trailing whitespace is replaced with a %NUL-terminator
> + * in the given string @s. Returns a pointer to the first non-whitespace
> + * character in @s.
> + */
> +char *strim(char *s)
> +{
> +	size_t size;
> +	char *end;
> +
> +	s = skip_spaces(s);
> +	size = strlen(s);
> +	if (!size)
> +		return s;
> +
> +	end = s + size - 1;
> +	while (end >= s && isspace(*end))
> +		end--;
> +	*(end + 1) = '\0';
> +
> +	return s;
> +}
> +EXPORT_SYMBOL(strim);
> -- 
> 1.7.7.6
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From kpa_info at yahoo.fr  Mon Jul  9 09:48:20 2012
From: kpa_info at yahoo.fr (Patrick)
Date: Mon, 09 Jul 2012 15:48:20 +0200
Subject: Flashing automatically the default environment
Message-ID: <4FFAE124.8040703@yahoo.fr>

Dear all,

When booting a new board with barebox it detect that the nand partition 
dedicated to environment is invalid and barebox use the default config.
I would like that in this case (the first boot) the default config is 
flashed in the nand (save) command.

Any idea how to do that ?


From u.kleine-koenig at pengutronix.de  Mon Jul  9 10:33:56 2012
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 9 Jul 2012 16:33:56 +0200
Subject: Flashing automatically the default environment
In-Reply-To: <4FFAE124.8040703@yahoo.fr>
References: <4FFAE124.8040703@yahoo.fr>
Message-ID: <20120709143356.GL4687@pengutronix.de>

Hello Patrick,

On Mon, Jul 09, 2012 at 03:48:20PM +0200, Patrick wrote:
> When booting a new board with barebox it detect that the nand
> partition dedicated to environment is invalid and barebox use the
> default config.
> I would like that in this case (the first boot) the default config
> is flashed in the nand (save) command.
> 
> Any idea how to do that ?
How do you bring barebox into nand? Maybe flash the environment in the
same go?

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From m.olbrich at pengutronix.de  Tue Jul 10 04:18:33 2012
From: m.olbrich at pengutronix.de (Michael Olbrich)
Date: Tue, 10 Jul 2012 10:18:33 +0200
Subject: Flashing automatically the default environment
In-Reply-To: <4FFAE124.8040703@yahoo.fr>
References: <4FFAE124.8040703@yahoo.fr>
Message-ID: <20120710081833.GC27035@pengutronix.de>

On Mon, Jul 09, 2012 at 03:48:20PM +0200, Patrick wrote:
> When booting a new board with barebox it detect that the nand
> partition dedicated to environment is invalid and barebox use the
> default config.
> I would like that in this case (the first boot) the default config
> is flashed in the nand (save) command.
> 
> Any idea how to do that ?

if [ ! -e /dev/saved ]; then
	echo -o /dev/saved
	saveenv
fi

Michael

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From u.kleine-koenig at pengutronix.de  Tue Jul 10 05:06:47 2012
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Tue, 10 Jul 2012 11:06:47 +0200
Subject: Flashing automatically the default environment
In-Reply-To: <20120710081833.GC27035@pengutronix.de>
References: <4FFAE124.8040703@yahoo.fr> <20120710081833.GC27035@pengutronix.de>
Message-ID: <20120710090647.GN4687@pengutronix.de>

On Tue, Jul 10, 2012 at 10:18:33AM +0200, Michael Olbrich wrote:
> On Mon, Jul 09, 2012 at 03:48:20PM +0200, Patrick wrote:
> > When booting a new board with barebox it detect that the nand
> > partition dedicated to environment is invalid and barebox use the
> > default config.
> > I would like that in this case (the first boot) the default config
> > is flashed in the nand (save) command.
> > 
> > Any idea how to do that ?
> 
> if [ ! -e /dev/saved ]; then
> 	echo -o /dev/saved
> 	saveenv
> fi
Is /dev/saved persistent over a reboot?

Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From shc_work at mail.ru  Tue Jul 10 05:12:30 2012
From: shc_work at mail.ru (=?UTF-8?B?QWxleGFuZGVyIFNoaXlhbg==?=)
Date: Tue, 10 Jul 2012 13:12:30 +0400
Subject: =?UTF-8?B?UmVbMl06IEZsYXNoaW5nIGF1dG9tYXRpY2FsbHkgdGhlIGRlZmF1bHQgZW52?=
 =?UTF-8?B?aXJvbm1lbnQ=?=
In-Reply-To: <20120710090647.GN4687@pengutronix.de>
References: <4FFAE124.8040703@yahoo.fr> <20120710081833.GC27035@pengutronix.de>
 <20120710090647.GN4687@pengutronix.de>
Message-ID: <1341911550.557697326@f326.mail.ru>

Hello.

Tue, 10 Jul 2012 11:06:47 +0200 ?? Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>:
On Tue, Jul 10, 2012 at 10:18:33AM +0200, Michael Olbrich wrote:
> On Mon, Jul 09, 2012 at 03:48:20PM +0200, Patrick wrote:
> > When booting a new board with barebox it detect that the nand
> > partition dedicated to environment is invalid and barebox use the
> > default config.
> > I would like that in this case (the first boot) the default config
> > is flashed in the nand (save) command.
> > 
> > Any idea how to do that ?
> 
> if [ ! -e /dev/saved ]; then
> echo -o /dev/saved
> saveenv
> fi
Is /dev/saved persistent over a reboot?IMHO He mean about /env/saved

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From benoit at sevensols.com  Tue Jul 10 06:23:05 2012
From: benoit at sevensols.com (Benoit RAT)
Date: Tue, 10 Jul 2012 12:23:05 +0200
Subject: Patch for 16bit atmel NAND
Message-ID: <CAHvDM_eoW1MoWEXSbakqpGjeY0aw_jLsDk2z7huwQWL0tvLVSQ@mail.gmail.com>

I have found a bug on barebox 2012.05 where some lines has been removed
from previous version (2011.09) and make my NAND failed

You can find a description of my problem in a previous mail:
http://www.mail-archive.com/barebox at lists.infradead.org/msg02062.html

You can find a patch that restore the wrongly modified line here:
https://github.com/neub/wrs-sw-barebox/commit/8ab07333e6ab7ee09efd10552de703eca323c726

I hope it can help

Regards,

--
 <http://www.sevensols.com/>  <http://www.sevensecurity.es>

*Benoit RAT LAMY*

Engineer (Sw) \ Ingeniero (Sw)

fix. *(+34) 958 285 024*

cel. *(+34) 617 989 123*

e-mail: benoit at sevensols.com

*www.sevensols.com / **www.sevensecurity.es*

_________________________________

*C/ Baza, parcela 19 Nave 3  \ Pol?gono Ind. Juncaril \*

*18210 - PELIGROS - GRANADA ?SPAIN*
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From m.olbrich at pengutronix.de  Wed Jul 11 02:46:34 2012
From: m.olbrich at pengutronix.de (Michael Olbrich)
Date: Wed, 11 Jul 2012 08:46:34 +0200
Subject: Flashing automatically the default environment
In-Reply-To: <20120710090647.GN4687@pengutronix.de>
References: <4FFAE124.8040703@yahoo.fr> <20120710081833.GC27035@pengutronix.de>
 <20120710090647.GN4687@pengutronix.de>
Message-ID: <20120711064634.GI27035@pengutronix.de>

On Tue, Jul 10, 2012 at 11:06:47AM +0200, Uwe Kleine-K?nig wrote:
> On Tue, Jul 10, 2012 at 10:18:33AM +0200, Michael Olbrich wrote:
> > On Mon, Jul 09, 2012 at 03:48:20PM +0200, Patrick wrote:
> > > When booting a new board with barebox it detect that the nand
> > > partition dedicated to environment is invalid and barebox use the
> > > default config.
> > > I would like that in this case (the first boot) the default config
> > > is flashed in the nand (save) command.
> > > 
> > > Any idea how to do that ?
> > 
> > if [ ! -e /dev/saved ]; then
> > 	echo -o /dev/saved
> > 	saveenv
> > fi
> Is /dev/saved persistent over a reboot?

I meant /env/saved of course.

Michael

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Wed Jul 11 05:15:58 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 11 Jul 2012 11:15:58 +0200
Subject: [PATCH/Master] ARM/MXS: the GPIO bitkeeper enable logic is inverse to
 the pullup enable logic
Message-ID: <201207111115.58627.jbe@pengutronix.de>

While a set bit enables the pullup (if exists) it disables the bitkeeper (if
exists). Both features are using the same register bit and only one of this
feature is present on a per pin base.
    
Signed-off-by: Juergen Beisert <jbe at pengutronix.de>

diff --git a/arch/arm/mach-mxs/iomux-imx.c b/arch/arm/mach-mxs/iomux-imx.c
index 9203588..784c506 100644
--- a/arch/arm/mach-mxs/iomux-imx.c
+++ b/arch/arm/mach-mxs/iomux-imx.c
@@ -125,7 +125,7 @@ void imx_gpio_mode(uint32_t m)
 	if (BK_PRESENT(m)) {
 		reg_offset = calc_pullup_reg(gpio_pin);
 		writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset +
-				(GET_BITKEEPER(m) == 1 ? BIT_SET : BIT_CLR));
+				(GET_BITKEEPER(m) == 1 ? BIT_CLR : BIT_SET));
 	}
 
 	if (GET_FUNC(m) == IS_GPIO) {

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From jlu at pengutronix.de  Thu Jul 12 05:19:44 2012
From: jlu at pengutronix.de (Jan Luebbe)
Date: Thu, 12 Jul 2012 11:19:44 +0200
Subject: [PATCH] mtd: fix 'write: Invalid argument' while writing to nand-bb
 devices
Message-ID: <1342084784-8534-1-git-send-email-jlu@pengutronix.de>

It seems the 'off_t cur_ofs' variable was missed during the 64 bit
conversion.

Signed-off-by: Jan Luebbe <jlu at pengutronix.de>
---
 drivers/mtd/nand/nand-bb.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/nand-bb.c b/drivers/mtd/nand/nand-bb.c
index 5b06a9e..519337e 100644
--- a/drivers/mtd/nand/nand-bb.c
+++ b/drivers/mtd/nand/nand-bb.c
@@ -60,7 +60,7 @@ static ssize_t nand_bb_read(struct cdev *cdev, void *buf, size_t count,
 	struct cdev *parent = bb->cdev_parent;
 	int ret, bytes = 0, now;
 
-	debug("%s %d %d\n", __func__, offset, count);
+	debug("%s 0x%08llx %d\n", __func__, offset, count);
 
 	while(count) {
 		ret = cdev_ioctl(parent, MEMGETBADBLOCK, &bb->offset);
@@ -96,7 +96,7 @@ static int nand_bb_write_buf(struct nand_bb *bb, size_t count)
 	int ret, now;
 	struct cdev *parent = bb->cdev_parent;
 	void *buf = bb->writebuf;
-	off_t cur_ofs = bb->offset & ~(BB_WRITEBUF_SIZE - 1);
+	loff_t cur_ofs = bb->offset & ~(BB_WRITEBUF_SIZE - 1);
 
 	while (count) {
 		ret = cdev_ioctl(parent, MEMGETBADBLOCK, &cur_ofs);
@@ -104,7 +104,7 @@ static int nand_bb_write_buf(struct nand_bb *bb, size_t count)
 			return ret;
 
 		if (ret) {
-			debug("skipping bad block at 0x%08x\n", cur_ofs);
+			debug("skipping bad block at 0x%08llx\n", cur_ofs);
 			bb->offset += bb->info.erasesize;
 			cur_ofs += bb->info.erasesize;
 			continue;
-- 
1.7.10.4



From eric at eukrea.com  Thu Jul 12 05:43:52 2012
From: eric at eukrea.com (Eric =?ISO-8859-1?B?QuluYXJk?=)
Date: Thu, 12 Jul 2012 11:43:52 +0200
Subject: [PATCH] ARM: Enable unaligned accesses on armv6 and later
In-Reply-To: <1341817779-29531-1-git-send-email-s.hauer@pengutronix.de>
References: <1341817779-29531-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120712114352.51e3de9b@eb-e6520>

Hi Sascha,

Le Mon,  9 Jul 2012 09:09:39 +0200,
Sascha Hauer <s.hauer at pengutronix.de> a ?crit :

> We have the following in the tree:
> 
> |commit af42feb9d255bc3ea3b514180f265479ea8834f9
> |Author: Enrico Scholz <enrico.scholz at sigma-chemnitz.de>
> |Date:   Mon Jan 2 11:49:17 2012 +0100
> |
> |    ARM: set SCTRL[A] only when architecture does not support unaligned access
> |
> |    Recent gcc generates code with unaligned access when architecture
> |    supports it. Setting A bit unconditionally causes data-aborts on such
> |    code rendering barebox unusable.
> |
> |    Signed-off-by: Enrico Scholz <enrico.scholz at sigma-chemnitz.de>
> |    Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> 
> What the patch tried is correct: We should set the A bit only when the architecture
> does not support unaligned accesses. To figure out whether the architecture supports
> unaligned accesses the patch tested for the U bit which is wrong. The U bit may be
> 0 after a reset, so instead of testing for the U bit we have to set it. This can
> be done on armv6 and later. All others have the A bit set to trap unaligned accesses.
> 
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
> 
> Enrico, can you confirm this is correct?
> 
> Thanks
>  Sascha
> 
>  arch/arm/cpu/start.c |   12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> index 3c282ee..523179d 100644
> --- a/arch/arm/cpu/start.c
> +++ b/arch/arm/cpu/start.c
> @@ -81,13 +81,11 @@ void __naked __bare_init reset(void)
>  	r &= ~(CR_M | CR_C | CR_B | CR_S | CR_R | CR_V);
>  	r |= CR_I;
>  
> -	if (!(r & CR_U))
> -		/* catch unaligned access on architectures which do not
> -		 * support unaligned access */
> -		r |= CR_A;
> -	else
> -		r &= ~CR_A;
> -
> +#if __LINUX_ARM_ARCH__ >= 6
> +	r |= CR_U;
> +#else
> +	r |= CR_A;
> +#endif
>  
>  #ifdef __ARMEB__
>  	r |= CR_B;

Tested-by: Eric B?nard <eric at eukrea.com>

this patch fix the crash we had in show_progress.

Eric


From jlu at pengutronix.de  Thu Jul 12 05:46:02 2012
From: jlu at pengutronix.de (Jan Luebbe)
Date: Thu, 12 Jul 2012 11:46:02 +0200
Subject: [PATCH v2] mtd: fix 'write: Invalid argument' while writing to
 nand-bb devices
Message-ID: <1342086362-2129-1-git-send-email-jlu@pengutronix.de>

The 'off_t cur_ofs' variable was missed during the 64 bit conversion.
For the MEMGETBADBLOCK ioctl, a pointer to a loff_t is needed.

Also adjust the debug format strings.

Signed-off-by: Jan Luebbe <jlu at pengutronix.de>
---
 drivers/mtd/nand/nand-bb.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/nand-bb.c b/drivers/mtd/nand/nand-bb.c
index 5b06a9e..519337e 100644
--- a/drivers/mtd/nand/nand-bb.c
+++ b/drivers/mtd/nand/nand-bb.c
@@ -60,7 +60,7 @@ static ssize_t nand_bb_read(struct cdev *cdev, void *buf, size_t count,
 	struct cdev *parent = bb->cdev_parent;
 	int ret, bytes = 0, now;
 
-	debug("%s %d %d\n", __func__, offset, count);
+	debug("%s 0x%08llx %d\n", __func__, offset, count);
 
 	while(count) {
 		ret = cdev_ioctl(parent, MEMGETBADBLOCK, &bb->offset);
@@ -96,7 +96,7 @@ static int nand_bb_write_buf(struct nand_bb *bb, size_t count)
 	int ret, now;
 	struct cdev *parent = bb->cdev_parent;
 	void *buf = bb->writebuf;
-	off_t cur_ofs = bb->offset & ~(BB_WRITEBUF_SIZE - 1);
+	loff_t cur_ofs = bb->offset & ~(BB_WRITEBUF_SIZE - 1);
 
 	while (count) {
 		ret = cdev_ioctl(parent, MEMGETBADBLOCK, &cur_ofs);
@@ -104,7 +104,7 @@ static int nand_bb_write_buf(struct nand_bb *bb, size_t count)
 			return ret;
 
 		if (ret) {
-			debug("skipping bad block at 0x%08x\n", cur_ofs);
+			debug("skipping bad block at 0x%08llx\n", cur_ofs);
 			bb->offset += bb->info.erasesize;
 			cur_ofs += bb->info.erasesize;
 			continue;
-- 
1.7.10.4



From jbe at pengutronix.de  Thu Jul 12 09:47:15 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 12 Jul 2012 15:47:15 +0200
Subject: [PATCH 4/4] ARM/MXS: add reset cause detection
In-Reply-To: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
References: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342100835-9870-5-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/watchdog/im28wd.c |   25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/watchdog/im28wd.c b/drivers/watchdog/im28wd.c
index b016910..c465f87 100644
--- a/drivers/watchdog/im28wd.c
+++ b/drivers/watchdog/im28wd.c
@@ -21,6 +21,7 @@
 #include <errno.h>
 #include <malloc.h>
 #include <watchdog.h>
+#include <reset_source.h>
 
 #define MXS_RTC_CTRL 0x0
 #define MXS_RTC_SET_ADDR 0x4
@@ -73,6 +74,27 @@ static int imx28_watchdog_set_timeout(struct watchdog *wd, unsigned timeout)
 	return 0;
 }
 
+static void __maybe_unused imx28_detect_reset_source(const struct imx28_wd *p)
+{
+	u32 reg;
+
+	reg = readl(p->regs + MXS_RTC_PERSISTENT0);
+	if (reg & MXS_RTC_PERSISTENT0_EXT_RST) {
+		writel(MXS_RTC_PERSISTENT0_EXT_RST,
+			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+		set_reset_source(RESET_POR);
+		return;
+	}
+	if (reg & MXS_RTC_PERSISTENT0_THM_RST) {
+		writel(MXS_RTC_PERSISTENT0_THM_RST,
+			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+		set_reset_source(RESET_RST);
+		return;
+	}
+
+	set_reset_source(RESET_RST);
+}
+
 static int imx28_wd_probe(struct device_d *dev)
 {
 	struct imx28_wd *priv;
@@ -94,6 +116,9 @@ static int imx28_wd_probe(struct device_d *dev)
 	if (rc != 0)
 		goto on_error;
 
+#ifdef CONFIG_GLOBALVAR
+	imx28_detect_reset_source(priv);
+#endif
 	dev->priv = priv;
 	return 0;
 
-- 
1.7.10.4



From jbe at pengutronix.de  Thu Jul 12 09:47:14 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 12 Jul 2012 15:47:14 +0200
Subject: [PATCH 3/4] ARM/i.MX: add support to detect the reset source
In-Reply-To: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
References: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342100835-9870-4-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-imx/Makefile       |    1 +
 arch/arm/mach-imx/reset_source.c |   72 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 73 insertions(+)
 create mode 100644 arch/arm/mach-imx/reset_source.c

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 89a8946..d6380ba 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,4 +1,5 @@
 obj-y += clocksource.o gpio.o
+obj-$(CONFIG_GLOBALVAR) += reset_source.o
 obj-$(CONFIG_ARCH_IMX1)  += speed-imx1.o  imx1.o  iomux-v1.o
 obj-$(CONFIG_ARCH_IMX25) += speed-imx25.o imx25.o iomux-v3.o
 obj-$(CONFIG_ARCH_IMX21) += speed-imx21.o imx21.o iomux-v1.o
diff --git a/arch/arm/mach-imx/reset_source.c b/arch/arm/mach-imx/reset_source.c
new file mode 100644
index 0000000..e7b2a90
--- /dev/null
+++ b/arch/arm/mach-imx/reset_source.c
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/imx-regs.h>
+
+#ifdef CONFIG_ARCH_IMX1
+#  define IMX_RESET_SRC_WDOG (1 << 1)
+#  define IMX_RESET_SRC_HRDRESET (1 << 0)
+/* let the compiler sort out useless code on this arch */
+#  define IMX_RESET_SRC_WARMSTART 0
+#  define IMX_RESET_SRC_COLDSTART 0
+#else
+  /* WRSR checked for i.MX25, i.MX27, i.MX31, i.MX35 and i.MX51 */
+# define WDOG_WRSR 0x04
+  /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_WARMSTART (1 << 0)
+  /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_WDOG (1 << 1)
+  /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_HRDRESET (1 << 3)
+  /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_COLDSTART (1 << 4)
+#endif
+
+static unsigned read_detection_register(void)
+{
+#ifdef CONFIG_ARCH_IMX1
+	return readl(IMX_SYSCTRL_BASE);
+#else
+	return readw(IMX_WDT_BASE + WDOG_WRSR);
+#endif
+}
+
+static int imx_detect_reset_source(void)
+{
+	unsigned reg = read_detection_register();
+
+	if (reg & IMX_RESET_SRC_COLDSTART) {
+		set_reset_source(RESET_POR);
+		return 0;
+	}
+
+	if (reg & (IMX_RESET_SRC_HRDRESET | IMX_RESET_SRC_WARMSTART)) {
+		set_reset_source(RESET_RST);
+		return 0;
+	}
+
+	if (reg & IMX_RESET_SRC_WDOG) {
+		set_reset_source(RESET_WDG);
+		return 0;
+	}
+
+	/* else keep the default 'unknown' state */
+	return 0;
+}
+
+device_initcall(imx_detect_reset_source);
-- 
1.7.10.4



From jbe at pengutronix.de  Thu Jul 12 09:47:11 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 12 Jul 2012 15:47:11 +0200
Subject: [PATCHv3] Enable a way to provide the reason for "being here"
Message-ID: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>

Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivates the hanging system.

V3 includes the detection for the i.MX28 SoC and fixes its usage for other
i.MX SoCs.

Comments are welcome.

Juergen

The following changes since commit 279d3c29437ff84d4542ba4fc81de4fff0381233:

  Merge branch 'for-next/tqma53' into next (2012-07-09 09:24:04 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/jbe/barebox.git next_provide_reset_sourceV3

for you to fetch changes up to 9fdad67311d1eb320242407b9e5eaca9d13f1b49:

  ARM/MXS: add reset cause detection (2012-07-12 14:32:46 +0200)

----------------------------------------------------------------
Juergen Beisert (4):
      Enable a way to provide the reason for "being here"
      ARM/Samsung: add support to detect the reset source
      ARM/i.MX: add support to detect the reset source
      ARM/MXS: add reset cause detection

 arch/arm/mach-imx/Makefile           |    1 +
 arch/arm/mach-imx/reset_source.c     |   72 ++++++++++++++++++++++++++++++++++
 arch/arm/mach-samsung/Makefile       |    1 +
 arch/arm/mach-samsung/reset_source.c |   56 ++++++++++++++++++++++++++
 common/Makefile                      |    2 +-
 common/reset_source.c                |   44 +++++++++++++++++++++
 drivers/watchdog/im28wd.c            |   25 ++++++++++++
 include/reset_source.h               |   27 +++++++++++++
 8 files changed, 227 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-imx/reset_source.c
 create mode 100644 arch/arm/mach-samsung/reset_source.c
 create mode 100644 common/reset_source.c
 create mode 100644 include/reset_source.h


From jbe at pengutronix.de  Thu Jul 12 09:47:12 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 12 Jul 2012 15:47:12 +0200
Subject: [PATCH 1/4] Enable a way to provide the reason for "being here"
In-Reply-To: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
References: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342100835-9870-2-git-send-email-jbe@pengutronix.de>

Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivate the hanging system.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 common/Makefile        |    2 +-
 common/reset_source.c  |   44 ++++++++++++++++++++++++++++++++++++++++++++
 include/reset_source.h |   27 +++++++++++++++++++++++++++
 3 files changed, 72 insertions(+), 1 deletion(-)
 create mode 100644 common/reset_source.c
 create mode 100644 include/reset_source.h

diff --git a/common/Makefile b/common/Makefile
index d99dfa2..baf4539 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_UIMAGE) += uimage.o
 obj-y += startup.o
 obj-y += misc.o
 obj-y += memsize.o
-obj-$(CONFIG_GLOBALVAR) += globalvar.o
+obj-$(CONFIG_GLOBALVAR) += globalvar.o reset_source.o
 obj-$(CONFIG_FILETYPE) += filetype.o
 obj-y += resource.o
 obj-$(CONFIG_MENU) += menu.o
diff --git a/common/reset_source.c b/common/reset_source.c
new file mode 100644
index 0000000..2a7f9ff
--- /dev/null
+++ b/common/reset_source.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <environment.h>
+#include <globalvar.h>
+#include <reset_source.h>
+
+static const char * const reset_src_names[] = {
+	[RESET_UKWN] = "unknown",
+	[RESET_POR] = "POR",
+	[RESET_RST] = "RST",
+	[RESET_WDG] = "WDG",
+	[RESET_WKE] = "WKE",
+	[RESET_JTAG] = "JTAG",
+};
+
+void set_reset_source(enum reset_src_type st)
+{
+	setenv("global.system.reset", reset_src_names[st]);
+}
+EXPORT_SYMBOL(set_reset_source);
+
+/* ensure this runs after the 'global' device is already registerd */
+static int init_reset_source(void)
+{
+	globalvar_add_simple("system.reset");
+	set_reset_source(RESET_UKWN);
+	return 0;
+}
+
+coredevice_initcall(init_reset_source);
diff --git a/include/reset_source.h b/include/reset_source.h
new file mode 100644
index 0000000..8bb366c
--- /dev/null
+++ b/include/reset_source.h
@@ -0,0 +1,27 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INCLUDE_RESET_SOURCE_H
+# define __INCLUDE_RESET_SOURCE_H
+
+enum reset_src_type {
+	RESET_UKWN,	/* maybe the SoC cannot detect the reset source */
+	RESET_POR,	/* Power On Reset (cold start) */
+	RESET_RST,	/* generic ReSeT (warm start) */
+	RESET_WDG,	/* watchdog */
+	RESET_WKE,	/* wake-up (some SoCs can handle this) */
+	RESET_JTAG,	/* JTAG reset */
+};
+
+extern void set_reset_source(enum reset_src_type);
+
+#endif /* __INCLUDE_RESET_SOURCE_H */
-- 
1.7.10.4



From jbe at pengutronix.de  Thu Jul 12 09:47:13 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 12 Jul 2012 15:47:13 +0200
Subject: [PATCH 2/4] ARM/Samsung: add support to detect the reset source
In-Reply-To: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
References: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342100835-9870-3-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile       |    1 +
 arch/arm/mach-samsung/reset_source.c |   56 ++++++++++++++++++++++++++++++++++
 2 files changed, 57 insertions(+)
 create mode 100644 arch/arm/mach-samsung/reset_source.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 6020587..5ac8e3c 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,4 +1,5 @@
 obj-y += s3c-timer.o generic.o
+obj-$(CONFIG_GLOBALVAR) += reset_source.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
diff --git a/arch/arm/mach-samsung/reset_source.c b/arch/arm/mach-samsung/reset_source.c
new file mode 100644
index 0000000..2456e3f
--- /dev/null
+++ b/arch/arm/mach-samsung/reset_source.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/s3c-iomap.h>
+
+/* S3C2440 relevant */
+#define S3C2440_GSTATUS2 0xb4
+# define S3C2440_GSTATUS2_PWRST (1 << 0)
+# define S3C2440_GSTATUS2_SLEEPRST (1 << 1)
+# define S3C2440_GSTATUS2_WDRST (1 << 2)
+
+static int s3c_detect_reset_source(void)
+{
+	u32 reg = readl(S3C_GPIO_BASE + S3C2440_GSTATUS2);
+
+	if (reg & S3C2440_GSTATUS2_PWRST) {
+		set_reset_source(RESET_POR);
+		writel(S3C2440_GSTATUS2_PWRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_SLEEPRST) {
+		set_reset_source(RESET_WKE);
+		writel(S3C2440_GSTATUS2_SLEEPRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_WDRST) {
+		set_reset_source(RESET_WDG);
+		writel(S3C2440_GSTATUS2_WDRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	/* else keep the default 'unknown' state */
+	return 0;
+}
+
+device_initcall(s3c_detect_reset_source);
-- 
1.7.10.4



From mkl at pengutronix.de  Thu Jul 12 15:56:25 2012
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Thu, 12 Jul 2012 21:56:25 +0200
Subject: [PATCH 4/4] ARM/MXS: add reset cause detection
In-Reply-To: <1342100835-9870-5-git-send-email-jbe@pengutronix.de>
References: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
 <1342100835-9870-5-git-send-email-jbe@pengutronix.de>
Message-ID: <4FFF2BE9.1030802@pengutronix.de>

On 07/12/2012 03:47 PM, Juergen Beisert wrote:
> Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
> ---
>  drivers/watchdog/im28wd.c |   25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/drivers/watchdog/im28wd.c b/drivers/watchdog/im28wd.c
> index b016910..c465f87 100644
> --- a/drivers/watchdog/im28wd.c
> +++ b/drivers/watchdog/im28wd.c
> @@ -21,6 +21,7 @@
>  #include <errno.h>
>  #include <malloc.h>
>  #include <watchdog.h>
> +#include <reset_source.h>
>  
>  #define MXS_RTC_CTRL 0x0
>  #define MXS_RTC_SET_ADDR 0x4
> @@ -73,6 +74,27 @@ static int imx28_watchdog_set_timeout(struct watchdog *wd, unsigned timeout)
>  	return 0;
>  }
>  
> +static void __maybe_unused imx28_detect_reset_source(const struct imx28_wd *p)
> +{
> +	u32 reg;
> +
> +	reg = readl(p->regs + MXS_RTC_PERSISTENT0);
> +	if (reg & MXS_RTC_PERSISTENT0_EXT_RST) {
> +		writel(MXS_RTC_PERSISTENT0_EXT_RST,
> +			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
> +		set_reset_source(RESET_POR);
> +		return;
> +	}
> +	if (reg & MXS_RTC_PERSISTENT0_THM_RST) {
> +		writel(MXS_RTC_PERSISTENT0_THM_RST,
> +			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
> +		set_reset_source(RESET_RST);
> +		return;
> +	}
> +
> +	set_reset_source(RESET_RST);
> +}
> +
>  static int imx28_wd_probe(struct device_d *dev)
>  {
>  	struct imx28_wd *priv;
> @@ -94,6 +116,9 @@ static int imx28_wd_probe(struct device_d *dev)
>  	if (rc != 0)
>  		goto on_error;
>  
> +#ifdef CONFIG_GLOBALVAR
What about:

	if (IS_ENABLED(CONFIG_GLOBALVAR))

> +	imx28_detect_reset_source(priv);
> +#endif
>  	dev->priv = priv;
>  	return 0;
>  


-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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From mkl at pengutronix.de  Thu Jul 12 17:01:29 2012
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Thu, 12 Jul 2012 23:01:29 +0200
Subject: [PATCH] usb: gadget: enable for MXS
Message-ID: <1342126889-8693-1-git-send-email-mkl@pengutronix.de>

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---
 drivers/usb/gadget/Kconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index f7f2697..df1d970 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -4,7 +4,7 @@ menuconfig USB_GADGET
 
 config USB_HAVE_GADGET_DRIVER
 	bool
-	default y if ARCH_IMX || ARCH_AT91 || ARCH_PXA
+	default y if ARCH_IMX || ARCH_MXS || ARCH_AT91 || ARCH_PXA
 
 if USB_GADGET
 
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 01:31:29 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 07:31:29 +0200
Subject: [PATCH 4/4] ARM/MXS: add reset cause detection
In-Reply-To: <4FFF2BE9.1030802@pengutronix.de>
References: <1342100835-9870-1-git-send-email-jbe@pengutronix.de>
 <1342100835-9870-5-git-send-email-jbe@pengutronix.de>
 <4FFF2BE9.1030802@pengutronix.de>
Message-ID: <201207130731.29367.jbe@pengutronix.de>

Marc Kleine-Budde wrote:
> [...]
> >
> > +#ifdef CONFIG_GLOBALVAR
>
> What about:
>
> 	if (IS_ENABLED(CONFIG_GLOBALVAR))

Sure. Looks much better. Will resend this series.

> [...]

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From jbe at pengutronix.de  Fri Jul 13 02:04:47 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 08:04:47 +0200
Subject: [PATCH 2/4] ARM/Samsung: add support to detect the reset source
In-Reply-To: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
References: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342159489-1474-3-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile       |    1 +
 arch/arm/mach-samsung/reset_source.c |   56 ++++++++++++++++++++++++++++++++++
 2 files changed, 57 insertions(+)
 create mode 100644 arch/arm/mach-samsung/reset_source.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 6020587..5ac8e3c 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,4 +1,5 @@
 obj-y += s3c-timer.o generic.o
+obj-$(CONFIG_GLOBALVAR) += reset_source.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
diff --git a/arch/arm/mach-samsung/reset_source.c b/arch/arm/mach-samsung/reset_source.c
new file mode 100644
index 0000000..2456e3f
--- /dev/null
+++ b/arch/arm/mach-samsung/reset_source.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/s3c-iomap.h>
+
+/* S3C2440 relevant */
+#define S3C2440_GSTATUS2 0xb4
+# define S3C2440_GSTATUS2_PWRST (1 << 0)
+# define S3C2440_GSTATUS2_SLEEPRST (1 << 1)
+# define S3C2440_GSTATUS2_WDRST (1 << 2)
+
+static int s3c_detect_reset_source(void)
+{
+	u32 reg = readl(S3C_GPIO_BASE + S3C2440_GSTATUS2);
+
+	if (reg & S3C2440_GSTATUS2_PWRST) {
+		set_reset_source(RESET_POR);
+		writel(S3C2440_GSTATUS2_PWRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_SLEEPRST) {
+		set_reset_source(RESET_WKE);
+		writel(S3C2440_GSTATUS2_SLEEPRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_WDRST) {
+		set_reset_source(RESET_WDG);
+		writel(S3C2440_GSTATUS2_WDRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	/* else keep the default 'unknown' state */
+	return 0;
+}
+
+device_initcall(s3c_detect_reset_source);
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 02:04:49 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 08:04:49 +0200
Subject: [PATCH 4/4] ARM/MXS: add reset cause detection
In-Reply-To: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
References: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342159489-1474-5-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/watchdog/im28wd.c |   25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/watchdog/im28wd.c b/drivers/watchdog/im28wd.c
index b016910..eb6099a 100644
--- a/drivers/watchdog/im28wd.c
+++ b/drivers/watchdog/im28wd.c
@@ -21,6 +21,7 @@
 #include <errno.h>
 #include <malloc.h>
 #include <watchdog.h>
+#include <reset_source.h>
 
 #define MXS_RTC_CTRL 0x0
 #define MXS_RTC_SET_ADDR 0x4
@@ -73,6 +74,27 @@ static int imx28_watchdog_set_timeout(struct watchdog *wd, unsigned timeout)
 	return 0;
 }
 
+static void __maybe_unused imx28_detect_reset_source(const struct imx28_wd *p)
+{
+	u32 reg;
+
+	reg = readl(p->regs + MXS_RTC_PERSISTENT0);
+	if (reg & MXS_RTC_PERSISTENT0_EXT_RST) {
+		writel(MXS_RTC_PERSISTENT0_EXT_RST,
+			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+		set_reset_source(RESET_POR);
+		return;
+	}
+	if (reg & MXS_RTC_PERSISTENT0_THM_RST) {
+		writel(MXS_RTC_PERSISTENT0_THM_RST,
+			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+		set_reset_source(RESET_RST);
+		return;
+	}
+
+	set_reset_source(RESET_RST);
+}
+
 static int imx28_wd_probe(struct device_d *dev)
 {
 	struct imx28_wd *priv;
@@ -94,6 +116,9 @@ static int imx28_wd_probe(struct device_d *dev)
 	if (rc != 0)
 		goto on_error;
 
+	if (IS_ENABLED(CONFIG_GLOBALVAR))
+		imx28_detect_reset_source(priv);
+
 	dev->priv = priv;
 	return 0;
 
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 02:04:46 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 08:04:46 +0200
Subject: [PATCH 1/4] Enable a way to provide the reason for "being here"
In-Reply-To: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
References: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342159489-1474-2-git-send-email-jbe@pengutronix.de>

Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivate the hanging system.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 common/Makefile        |    2 +-
 common/reset_source.c  |   44 ++++++++++++++++++++++++++++++++++++++++++++
 include/reset_source.h |   27 +++++++++++++++++++++++++++
 3 files changed, 72 insertions(+), 1 deletion(-)
 create mode 100644 common/reset_source.c
 create mode 100644 include/reset_source.h

diff --git a/common/Makefile b/common/Makefile
index d99dfa2..baf4539 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_UIMAGE) += uimage.o
 obj-y += startup.o
 obj-y += misc.o
 obj-y += memsize.o
-obj-$(CONFIG_GLOBALVAR) += globalvar.o
+obj-$(CONFIG_GLOBALVAR) += globalvar.o reset_source.o
 obj-$(CONFIG_FILETYPE) += filetype.o
 obj-y += resource.o
 obj-$(CONFIG_MENU) += menu.o
diff --git a/common/reset_source.c b/common/reset_source.c
new file mode 100644
index 0000000..2a7f9ff
--- /dev/null
+++ b/common/reset_source.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <environment.h>
+#include <globalvar.h>
+#include <reset_source.h>
+
+static const char * const reset_src_names[] = {
+	[RESET_UKWN] = "unknown",
+	[RESET_POR] = "POR",
+	[RESET_RST] = "RST",
+	[RESET_WDG] = "WDG",
+	[RESET_WKE] = "WKE",
+	[RESET_JTAG] = "JTAG",
+};
+
+void set_reset_source(enum reset_src_type st)
+{
+	setenv("global.system.reset", reset_src_names[st]);
+}
+EXPORT_SYMBOL(set_reset_source);
+
+/* ensure this runs after the 'global' device is already registerd */
+static int init_reset_source(void)
+{
+	globalvar_add_simple("system.reset");
+	set_reset_source(RESET_UKWN);
+	return 0;
+}
+
+coredevice_initcall(init_reset_source);
diff --git a/include/reset_source.h b/include/reset_source.h
new file mode 100644
index 0000000..8bb366c
--- /dev/null
+++ b/include/reset_source.h
@@ -0,0 +1,27 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INCLUDE_RESET_SOURCE_H
+# define __INCLUDE_RESET_SOURCE_H
+
+enum reset_src_type {
+	RESET_UKWN,	/* maybe the SoC cannot detect the reset source */
+	RESET_POR,	/* Power On Reset (cold start) */
+	RESET_RST,	/* generic ReSeT (warm start) */
+	RESET_WDG,	/* watchdog */
+	RESET_WKE,	/* wake-up (some SoCs can handle this) */
+	RESET_JTAG,	/* JTAG reset */
+};
+
+extern void set_reset_source(enum reset_src_type);
+
+#endif /* __INCLUDE_RESET_SOURCE_H */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 02:04:45 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 08:04:45 +0200
Subject: [PATCHv4] Enable a way to provide the reason for "being here"
Message-ID: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>

Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivates the hanging system.

V2 includes Marc's suggesion.
V3 includes the detection for the i.MX28 SoC and fixes its usage for other
i.MX SoCs.
V4 includes Marc's recent suggestion.

Comments are still welcome.

Juergen

The following changes since commit 279d3c29437ff84d4542ba4fc81de4fff0381233:

  Merge branch 'for-next/tqma53' into next (2012-07-09 09:24:04 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/jbe/barebox.git next_provide_reset_sourceV4

for you to fetch changes up to 8a94e229a42fad93f5cb5ff2b4b1cbe8e85e2927:

  ARM/MXS: add reset cause detection (2012-07-13 07:36:00 +0200)

----------------------------------------------------------------
Juergen Beisert (4):
      Enable a way to provide the reason for "being here"
      ARM/Samsung: add support to detect the reset source
      ARM/i.MX: add support to detect the reset source
      ARM/MXS: add reset cause detection

 arch/arm/mach-imx/Makefile           |    1 +
 arch/arm/mach-imx/reset_source.c     |   72 ++++++++++++++++++++++++++++++++++
 arch/arm/mach-samsung/Makefile       |    1 +
 arch/arm/mach-samsung/reset_source.c |   56 ++++++++++++++++++++++++++
 common/Makefile                      |    2 +-
 common/reset_source.c                |   44 +++++++++++++++++++++
 drivers/watchdog/im28wd.c            |   25 ++++++++++++
 include/reset_source.h               |   27 +++++++++++++
 8 files changed, 227 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-imx/reset_source.c
 create mode 100644 arch/arm/mach-samsung/reset_source.c
 create mode 100644 common/reset_source.c
 create mode 100644 include/reset_source.h


From jbe at pengutronix.de  Fri Jul 13 02:04:48 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 08:04:48 +0200
Subject: [PATCH 3/4] ARM/i.MX: add support to detect the reset source
In-Reply-To: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
References: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342159489-1474-4-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-imx/Makefile       |    1 +
 arch/arm/mach-imx/reset_source.c |   72 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 73 insertions(+)
 create mode 100644 arch/arm/mach-imx/reset_source.c

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 89a8946..d6380ba 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,4 +1,5 @@
 obj-y += clocksource.o gpio.o
+obj-$(CONFIG_GLOBALVAR) += reset_source.o
 obj-$(CONFIG_ARCH_IMX1)  += speed-imx1.o  imx1.o  iomux-v1.o
 obj-$(CONFIG_ARCH_IMX25) += speed-imx25.o imx25.o iomux-v3.o
 obj-$(CONFIG_ARCH_IMX21) += speed-imx21.o imx21.o iomux-v1.o
diff --git a/arch/arm/mach-imx/reset_source.c b/arch/arm/mach-imx/reset_source.c
new file mode 100644
index 0000000..e7b2a90
--- /dev/null
+++ b/arch/arm/mach-imx/reset_source.c
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/imx-regs.h>
+
+#ifdef CONFIG_ARCH_IMX1
+#  define IMX_RESET_SRC_WDOG (1 << 1)
+#  define IMX_RESET_SRC_HRDRESET (1 << 0)
+/* let the compiler sort out useless code on this arch */
+#  define IMX_RESET_SRC_WARMSTART 0
+#  define IMX_RESET_SRC_COLDSTART 0
+#else
+  /* WRSR checked for i.MX25, i.MX27, i.MX31, i.MX35 and i.MX51 */
+# define WDOG_WRSR 0x04
+  /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_WARMSTART (1 << 0)
+  /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_WDOG (1 << 1)
+  /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_HRDRESET (1 << 3)
+  /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_COLDSTART (1 << 4)
+#endif
+
+static unsigned read_detection_register(void)
+{
+#ifdef CONFIG_ARCH_IMX1
+	return readl(IMX_SYSCTRL_BASE);
+#else
+	return readw(IMX_WDT_BASE + WDOG_WRSR);
+#endif
+}
+
+static int imx_detect_reset_source(void)
+{
+	unsigned reg = read_detection_register();
+
+	if (reg & IMX_RESET_SRC_COLDSTART) {
+		set_reset_source(RESET_POR);
+		return 0;
+	}
+
+	if (reg & (IMX_RESET_SRC_HRDRESET | IMX_RESET_SRC_WARMSTART)) {
+		set_reset_source(RESET_RST);
+		return 0;
+	}
+
+	if (reg & IMX_RESET_SRC_WDOG) {
+		set_reset_source(RESET_WDG);
+		return 0;
+	}
+
+	/* else keep the default 'unknown' state */
+	return 0;
+}
+
+device_initcall(imx_detect_reset_source);
-- 
1.7.10.4



From stutzsven at gmx.de  Fri Jul 13 05:33:57 2012
From: stutzsven at gmx.de (Stutz Sven)
Date: Fri, 13 Jul 2012 11:33:57 +0200
Subject: AT91SAM9263-EK
Message-ID: <4FFFEB85.3060003@gmx.de>

Hello everybody,

I am trying to learn and to play with the at91sam9263-ek (Rev. B) evalboard.

I was really successful building all parts (at91Bootstrap, Barebox, 
Linuximage) and when I upload all files via SAM-BA and I restart the 
device I get the prompt of barebox.

But nothing more
Everything is fine I can also switch on and off the on board leds but I 
cannot load/ start the kernel.

The addresses I use are:
         0x     0000 - 0x1 FFFF at91Bootstrap
         0x  2 0000 -  0x5 FFFF Barebox
         0x  6 0000 -  0x7 FFFF Bareboxenv
         0x  8 0000 -  47 FFFF kernel
         0x48 0000 -7c7 FFFF rootfs
     and rest is data ...

I have change the specific init.c file and boot file in the specific 
environment folder.
First I though the missing *.bb partitions can fix this problem. Then I 
modified the env/init file for that.  Apparently this placeholder "*" in 
this boot script (nand -a dev/nand0.* ) is not working correctly.
     addpart /dev/nand0 $nand_parts
     nand -a /dev/nand0.*

     nand -a dev/nand0.at91bootstrap
     nand -a dev/nand0.barebox
     nand -a dev/nand0.bareboxenv
     nand -a dev/nand0.kernel
     nand -a dev/nand0.rootfs

The second try was to change also this partition table in the specific 
init.c so that both match.
         devfs_add_partition("nand0", 0x00000, SZ_128K, 
DEVFS_PARTITION_FIXED, "at91bootstrap_raw");
         dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap");
         devfs_add_partition("nand0", SZ_128K, SZ_256K, 
DEVFS_PARTITION_FIXED, "self_raw");
         dev_add_bb_dev("self_raw", "self0");
         devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K, 
DEVFS_PARTITION_FIXED, "env_raw");
         dev_add_bb_dev("env_raw", "env0");

But everything without success. It's a little bit strange because when I 
execute the command
     bootm -v /dev/nand0.kernel.bb
First I get the following output
         Barebox:/ bootm -v /dev/nand0.kernel.bb
             Image Name:     Linux-3.4.0
             OS:                      Linux
             Architecture:     ARM
             Type:                   Kernel Image
             Compression:    uncompressed
             Data Size:           2034784 Bytes = 1.9 MB
             Load Address:    20008000
             Entry Point:        20008000
         err -74
         loading os image failed with Out of memory

and if I try again the same command
         Barebox:/ bootm -v /dev/nand0.kernel.bb
         err -74
         Unknown OS filetype (try -f)

also if I try to memcpy or uimage I always get this err 74.

What is this Error 74 (-- Reset level 3)?
Why Out of memory?


Kind regards

Sven

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From stutzsven at web.de  Fri Jul 13 05:35:39 2012
From: stutzsven at web.de (Stutz Sven)
Date: Fri, 13 Jul 2012 11:35:39 +0200
Subject: AT91SAM9263-EK
Message-ID: <4FFFEBEB.40605@web.de>

Hello everybody,

I am trying to learn and to play with the at91sam9263-ek (Rev. B) 
evalboard.

I was really successful building all parts (at91Bootstrap, Barebox, 
Linuximage) and when I upload all files via SAM-BA and I restart the 
device I get the prompt of barebox.

But nothing more
Everything is fine I can also switch on and off the on board leds but I 
cannot load/ start the kernel.

The addresses I use are:
         0x     0000 - 0x1 FFFF at91Bootstrap
         0x  2 0000 -  0x5 FFFF Barebox
         0x  6 0000 -  0x7 FFFF Bareboxenv
         0x  8 0000 -  47 FFFF kernel
         0x48 0000 -7c7 FFFF rootfs
     and rest is data ...

I have change the specific init.c file and boot file in the specific 
environment folder.
First I though the missing *.bb partitions can fix this problem. Then I 
modified the env/init file for that.  Apparently this placeholder "*" in 
this boot script (nand -a dev/nand0.* ) is not working correctly.
     addpart /dev/nand0 $nand_parts
     nand -a /dev/nand0.*

     nand -a dev/nand0.at91bootstrap
     nand -a dev/nand0.barebox
     nand -a dev/nand0.bareboxenv
     nand -a dev/nand0.kernel
     nand -a dev/nand0.rootfs

The second try was to change also this partition table in the specific 
init.c so that both match.
         devfs_add_partition("nand0", 0x00000, SZ_128K, 
DEVFS_PARTITION_FIXED, "at91bootstrap_raw");
         dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap");
         devfs_add_partition("nand0", SZ_128K, SZ_256K, 
DEVFS_PARTITION_FIXED, "self_raw");
         dev_add_bb_dev("self_raw", "self0");
         devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K, 
DEVFS_PARTITION_FIXED, "env_raw");
         dev_add_bb_dev("env_raw", "env0");

But everything without success. It's a little bit strange because when I 
execute the command
     bootm -v /dev/nand0.kernel.bb
First I get the following output
         Barebox:/ bootm -v /dev/nand0.kernel.bb
             Image Name:     Linux-3.4.0
             OS:                      Linux
             Architecture:     ARM
             Type:                   Kernel Image
             Compression:    uncompressed
             Data Size:           2034784 Bytes = 1.9 MB
             Load Address:    20008000
             Entry Point:        20008000
         err -74
         loading os image failed with Out of memory

and if I try again the same command
         Barebox:/ bootm -v /dev/nand0.kernel.bb
         err -74
         Unknown OS filetype (try -f)

also if I try to memcpy or uimage I always get this err 74.

What is this Error 74 (-- Reset level 3)?
Why Out of memory?


Kind regards

Sven


	
Stutz Sven <stutzsven at gmx.de <mailto:stutzsven at gmx.de>>

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From jbe at pengutronix.de  Fri Jul 13 15:00:58 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:58 +0200
Subject: [PATCH 06/18] Samsung/serial: make the code more readable
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-7-git-send-email-jbe@pengutronix.de>

This bit magic is just setting and reading the UART's selected clock source.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 5c05ba8..a4c1f68 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -31,6 +31,8 @@
 /* Note: Offsets are for little endian access */
 #define ULCON 0x00		/* line control */
 #define UCON 0x04		/* UART control */
+# define UCON_SET_CLK_SRC(x) (((x) & 0x03) << 10)
+# define UCON_GET_CLK_SRC(x) (((x) >> 10) & 0x03)
 #define UFCON 0x08		/* FIFO control */
 #define UMCON 0x0c		/* modem control */
 #define UTRSTAT 0x10		/* Rx/Tx status */
@@ -57,8 +59,7 @@ struct s3c_uart {
 static unsigned s3c_get_arch_uart_input_clock(void __iomem *base)
 {
 	unsigned reg = readw(base + UCON);
-	reg = (reg >> 10) & 0x3;
-	return s3c_get_uart_clk(reg);
+	return s3c_get_uart_clk(UCON_GET_CLK_SRC(reg));
 }
 
 #ifdef S3C_UART_HAS_UBRDIVSLOT
@@ -103,7 +104,8 @@ static int s3c_serial_init_port(struct console_device *cdev)
 
 	/* tx=level,rx=edge,disable timeout int.,enable rx error int.,
 	 * normal, interrupt or polling, no pre-divider */
-	writew(0x0245 | ((CONFIG_DRIVER_SERIAL_S3C_CLK) << 10), base + UCON);
+	writew(0x0245 | UCON_SET_CLK_SRC(CONFIG_DRIVER_SERIAL_S3C_CLK),
+						base + UCON);
 
 #ifdef S3C_UART_HAS_UINTM
 	/* 'interrupt or polling mode' for both directions */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:00:57 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:57 +0200
Subject: [PATCH 05/18] Samsung/serial: make the clock source configureable
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-6-git-send-email-jbe@pengutronix.de>

Instead of taking the value from somewhere, use the menu to select one. Also
provide sane default values for known SoCs.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/Kconfig      |   12 ++++++++++++
 drivers/serial/serial_s3c.c |    7 +------
 2 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index a9383da..a118aaf 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -85,6 +85,18 @@ config DRIVER_SERIAL_S3C
 	help
 	  Say Y here if you want to use the CONS on a Samsung S3C CPU
 
+config DRIVER_SERIAL_S3C_CLK
+	int
+	prompt "input clock reference"
+	depends on DRIVER_SERIAL_S3C
+	default 0 if ARCH_S3C24xx
+	default 3 if ARCH_S5PCxx
+	help
+	  Select one of up to four available clock sources for the UART:
+	   0+1: PCLK, 2: UCLK0, 3: UCLK1
+	  Note: not all values are possible on all Samsung SoCs. Read the
+	  manual if unsure.
+
 config DRIVER_SERIAL_S3C_AUTOSYNC
 	bool "Enable auto flow"
 	depends on DRIVER_SERIAL_S3C
diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index ff3792b..5c05ba8 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -47,11 +47,6 @@
 # define UINTM 0x38		/* interrupt mask register */
 #endif
 
-#ifndef S3C_UART_CLKSEL
-/* Use pclk */
-# define S3C_UART_CLKSEL 0
-#endif
-
 struct s3c_uart {
 	void __iomem *regs;
 	struct console_device cdev;
@@ -108,7 +103,7 @@ static int s3c_serial_init_port(struct console_device *cdev)
 
 	/* tx=level,rx=edge,disable timeout int.,enable rx error int.,
 	 * normal, interrupt or polling, no pre-divider */
-	writew(0x0245 | ((S3C_UART_CLKSEL) << 10), base + UCON);
+	writew(0x0245 | ((CONFIG_DRIVER_SERIAL_S3C_CLK) << 10), base + UCON);
 
 #ifdef S3C_UART_HAS_UINTM
 	/* 'interrupt or polling mode' for both directions */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:00:59 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:59 +0200
Subject: [PATCH 07/18] Samsung/serial: there is no need to ifdef these
 register defines
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-8-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index a4c1f68..125c06b 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -42,12 +42,8 @@
 #define UTXH 0x20		/* transmitt */
 #define URXH 0x24		/* receive */
 #define UBRDIV 0x28		/* baudrate generator */
-#ifdef S3C_UART_HAS_UBRDIVSLOT
-# define UBRDIVSLOT 0x2c	/* baudrate slot generator */
-#endif
-#ifdef S3C_UART_HAS_UINTM
-# define UINTM 0x38		/* interrupt mask register */
-#endif
+#define UBRDIVSLOT 0x2c		/* baudrate slot generator */
+#define UINTM 0x38		/* interrupt mask register */
 
 struct s3c_uart {
 	void __iomem *regs;
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:00:56 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:56 +0200
Subject: [PATCH 04/18] Samsung/serial: remove more ugly ifdef lines
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-5-git-send-email-jbe@pengutronix.de>

More or less just cosmetic. Easier to read, and lets the compiler remove unused
code.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 7a9b355..ff3792b 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -115,11 +115,10 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	writeb(0xf, base + UINTM);
 #endif
 
-#ifdef CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC
-	writeb(0x10, base + UMCON); /* enable auto flow control */
-#else
-	writeb(0x01, base + UMCON); /* RTS up */
-#endif
+	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC))
+		writeb(0x10, base + UMCON); /* enable auto flow control */
+	else
+		writeb(0x01, base + UMCON); /* RTS up */
 
 	return 0;
 }
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:00 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:00 +0200
Subject: [PATCH 08/18] Samsung/serial: there is no need to ifdef the slot table
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-9-git-send-email-jbe@pengutronix.de>

The '__maybe_unused' attribute prevents the compiler from warning about an
unused variable and the 'static' will remove it entirely if it's not used.
This patch is only cosmetic.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 125c06b..a2b8e56 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -58,7 +58,6 @@ static unsigned s3c_get_arch_uart_input_clock(void __iomem *base)
 	return s3c_get_uart_clk(UCON_GET_CLK_SRC(reg));
 }
 
-#ifdef S3C_UART_HAS_UBRDIVSLOT
 /*
  * This table takes the fractional value of the baud divisor and gives
  * the recommended setting for the UDIVSLOT register. Refer the datasheet
@@ -68,7 +67,6 @@ static const uint16_t udivslot_table[] __maybe_unused = {
 	0x0000, 0x0080, 0x0808, 0x0888, 0x2222, 0x4924, 0x4A52, 0x54AA,
 	0x5555, 0xD555, 0xD5D5, 0xDDD5, 0xDDDD, 0xDFDD, 0xDFDF, 0xFFDF,
 };
-#endif
 
 static int s3c_serial_setbaudrate(struct console_device *cdev, int baudrate)
 {
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:05 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:05 +0200
Subject: [PATCH 13/18] ARM/Samsung: adapt the generic timer driver to support
 the S3C6410 SoC
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-14-git-send-email-jbe@pengutronix.de>

The S3C64XX SoC has a real 32 bit counter, but almost the same style of
registers. It's enough to change the parameters, to get the routines work on
this SoC.

TODO: what about the S5P SoCs?

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/s3c-timer.c |   17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-samsung/s3c-timer.c b/arch/arm/mach-samsung/s3c-timer.c
index 6665c8c..271f97d 100644
--- a/arch/arm/mach-samsung/s3c-timer.c
+++ b/arch/arm/mach-samsung/s3c-timer.c
@@ -37,11 +37,20 @@
 #define S3C_TCNTB4 (S3C_TIMER_BASE + 0x3c)
 #define S3C_TCNTO4 (S3C_TIMER_BASE + 0x40)
 
-#define TIMER_WIDTH 16
-#define TIMER_SHIFT 10
-#define PRE_MUX 3
-#define PRE_MUX_ADD 1
+#ifdef CONFIG_ARCH_S3C24xx
+# define TIMER_WIDTH 16
+# define TIMER_SHIFT 10
+# define PRE_MUX 3
+# define PRE_MUX_ADD 1
 static const uint32_t max = 0x0000ffff;
+#endif
+#ifdef CONFIG_ARCH_S3C64xx
+# define TIMER_WIDTH 32
+# define TIMER_SHIFT 10
+# define PRE_MUX 4
+# define PRE_MUX_ADD 0
+static const uint32_t max = ~0;
+#endif
 
 static void s3c_init_t4_clk_source(void)
 {
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:00:52 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:52 +0200
Subject: [RFC] Inclusion of the Samsung S3C6410 SoC
Message-ID: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>

This patch series tries to include the Samsung S3C6410 processor into Barebox.
This SoC is used on the popular FriendlyARM Mini6410 platform and an
implementation for this platfrom is part of this series. This series is WIP,
so please comment if the changes are ready for mainline or not.

Patches 1..3 prepare the current Samsung part of Barebox to simplify the
changes later on.
Patches 4..10 just change the Samsung UART driver to make it more generic for
all current Samsung SoCs.
Patches 11..17 add the new Samsung S3C6410 SoC support.
Patch 18 adds the Mini6410 platform to make use of all the previous changes.

At least these changes should be tested on the S5Pxx SoCs, as I'm not sure if
the UART driver still works for them.

Regards,
Juergen



From jbe at pengutronix.de  Fri Jul 13 15:00:53 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:53 +0200
Subject: [PATCH 01/18] ARM/Samsung: be able to include the nand header
 multiple times
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-2-git-send-email-jbe@pengutronix.de>

This is required in preparation for the following patches.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/include/mach/s3c24xx-nand.h |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h b/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h
index acd78b8..fa88da1 100644
--- a/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h
+++ b/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h
@@ -18,6 +18,9 @@
  *
  */
 
+#ifndef MACH_S3C24XX_NAND_H
+# define MACH_S3C24XX_NAND_H
+
 #ifdef CONFIG_S3C_NAND_BOOT
 extern void s3c24x0_nand_load_image(void*, int, int);
 #endif
@@ -52,3 +55,5 @@ struct s3c24x0_nand_platform_data {
  * @file
  * @brief Basic declaration to use the s3c24x0 NAND driver
  */
+
+#endif /* MACH_S3C24XX_NAND_H */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:03 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:03 +0200
Subject: [PATCH 11/18] ARM/Samsung: add generic lowlevel init
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-12-git-send-email-jbe@pengutronix.de>

Just a placeholder for some required low level routines
---
 arch/arm/mach-samsung/Makefile           |    1 +
 arch/arm/mach-samsung/lowlevel-s3c64xx.c |   14 ++++++++++++++
 2 files changed, 15 insertions(+)
 create mode 100644 arch/arm/mach-samsung/lowlevel-s3c64xx.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 091b600..ac34d86 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,5 +1,6 @@
 obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
+obj-lowlevel-$(CONFIG_ARCH_S3C64xx) += lowlevel-s3c64x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o mem-s5pcxx.o
diff --git a/arch/arm/mach-samsung/lowlevel-s3c64xx.c b/arch/arm/mach-samsung/lowlevel-s3c64xx.c
new file mode 100644
index 0000000..b1ba719
--- /dev/null
+++ b/arch/arm/mach-samsung/lowlevel-s3c64xx.c
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:00:54 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:54 +0200
Subject: [PATCH 02/18] ARM/Samsung: unify device registration for the S3C24XX
 SoCs
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-3-git-send-email-jbe@pengutronix.de>

Barebox crashes since it has trouble with a resource size of 0. Most of the
S3C24XX based platforms crashes at runtime and can't use devices with resource
sizes of 0 anymore. This patch fix it by unifying the device registration for
all current Barebox's S3C24XX based platforms.

- A9M2410 and A9M2440 compile time tested only.
- Mini2440 also runtime tested.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/boards/a9m2410/a9m2410.c                  |    6 +--
 arch/arm/boards/a9m2440/a9m2440.c                  |    7 ++-
 arch/arm/boards/mini2440/mini2440.c                |   16 +++---
 .../mach-samsung/include/mach/devices-s3c24xx.h    |   54 ++++++++++++++++++++
 4 files changed, 65 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c24xx.h

diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c
index eaafdbd..c2d4b87 100644
--- a/arch/arm/boards/a9m2410/a9m2410.c
+++ b/arch/arm/boards/a9m2410/a9m2410.c
@@ -32,6 +32,7 @@
 #include <partition.h>
 #include <nand.h>
 #include <io.h>
+#include <mach/devices-s3c24xx.h>
 #include <mach/s3c-iomap.h>
 #include <mach/s3c24xx-nand.h>
 #include <mach/s3c-generic.h>
@@ -109,8 +110,7 @@ static int a9m2410_devices_init(void)
 	writel(reg, S3C_MISCCR);
 
 	/* ----------- the devices the boot loader should work with -------- */
-	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
-			0, IORESOURCE_MEM, &nand_info);
+	s3c24xx_add_nand(&nand_info);
 	/*
 	 * SMSC 91C111 network controller on the baseboard
 	 * connected to CS line 1 and interrupt line
@@ -145,8 +145,6 @@ void __bare_init nand_boot(void)
 
 static int a9m2410_console_init(void)
 {
-	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
-			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
 	return 0;
 }
 
diff --git a/arch/arm/boards/a9m2440/a9m2440.c b/arch/arm/boards/a9m2440/a9m2440.c
index 1d20248..8975c15 100644
--- a/arch/arm/boards/a9m2440/a9m2440.c
+++ b/arch/arm/boards/a9m2440/a9m2440.c
@@ -32,6 +32,7 @@
 #include <partition.h>
 #include <nand.h>
 #include <io.h>
+#include <mach/devices-s3c24xx.h>
 #include <mach/s3c-iomap.h>
 #include <mach/s3c24xx-nand.h>
 #include <mach/s3c-generic.h>
@@ -129,8 +130,7 @@ static int a9m2440_devices_init(void)
 	writel(reg, S3C_MISCCR);
 
 	/* ----------- the devices the boot loader should work with -------- */
-	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE, 0,
-			   IORESOURCE_MEM, &nand_info);
+	s3c24xx_add_nand(&nand_info);
 	/*
 	 * cs8900 network controller onboard
 	 * Connected to CS line 5 + A24 and interrupt line EINT9,
@@ -164,8 +164,7 @@ void __bare_init nand_boot(void)
 
 static int a9m2440_console_init(void)
 {
-	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
-			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+	s3c24xx_add_uart1();
 	return 0;
 }
 
diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 3d3b820..3523949 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -39,6 +39,7 @@
 #include <io.h>
 #include <mach/gpio.h>
 #include <mach/s3c-iomap.h>
+#include <mach/devices-s3c24xx.h>
 #include <mach/s3c24xx-nand.h>
 #include <mach/s3c-generic.h>
 #include <mach/s3c-mci.h>
@@ -297,8 +298,7 @@ static int mini2440_devices_init(void)
 	reg |= 0x10000;
 	writel(reg, S3C_MISCCR);
 
-	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
-			0, IORESOURCE_MEM, &nand_info);
+	s3c24xx_add_nand(&nand_info);
 
 	add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
 			  IORESOURCE_MEM_16BIT, &dm9000_data);
@@ -312,12 +312,9 @@ static int mini2440_devices_init(void)
 	devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
 	dev_add_bb_dev("env_raw", "env0");
 #endif
-	add_generic_device("s3c_mci", 0, NULL, S3C2410_SDI_BASE, 0,
-			   IORESOURCE_MEM, &mci_data);
-	add_generic_device("s3c_fb", 0, NULL, S3C2410_LCD_BASE, 0,
-			   IORESOURCE_MEM, &s3c24x0_fb_data);
-	add_generic_device("ohci", 0, NULL, S3C2410_USB_HOST_BASE, 0x100,
-			   IORESOURCE_MEM, NULL);
+	s3c24xx_add_mci(&mci_data);
+	s3c24xx_add_fb(&s3c24x0_fb_data);
+	s3c24xx_add_ohci();
 	armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
 	armlinux_set_architecture(MACH_TYPE_MINI2440);
 
@@ -344,8 +341,7 @@ static int mini2440_console_init(void)
 	s3c_gpio_mode(GPH2_TXD0);
 	s3c_gpio_mode(GPH3_RXD0);
 
-	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
-			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+	s3c24xx_add_uart1();
 	return 0;
 }
 
diff --git a/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h b/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
new file mode 100644
index 0000000..d099732
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef INCLUDE_MACH_DEVICES_S3C24XX_H
+# define INCLUDE_MACH_DEVICES_S3C24XX_H
+
+#include <mach/s3c24xx-iomap.h>
+#include <mach/s3c24xx-nand.h>
+#include <mach/s3c-mci.h>
+#include <mach/s3c24xx-fb.h>
+
+static inline void s3c24xx_add_nand(struct s3c24x0_nand_platform_data *d)
+{
+	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL,
+				S3C24X0_NAND_BASE, 0x80, IORESOURCE_MEM, d);
+}
+
+static inline void s3c24xx_add_mci(struct s3c_mci_platform_data *d)
+{
+	add_generic_device("s3c_mci", DEVICE_ID_DYNAMIC, NULL,
+				S3C2410_SDI_BASE, 0x80, IORESOURCE_MEM, d);
+}
+
+static inline void s3c24xx_add_fb(struct s3c_fb_platform_data *d)
+{
+	add_generic_device("s3c_fb", DEVICE_ID_DYNAMIC, NULL,
+				S3C2410_LCD_BASE, 0x80, IORESOURCE_MEM, d);
+}
+
+static inline void s3c24xx_add_ohci(void)
+{
+	add_generic_device("ohci", DEVICE_ID_DYNAMIC, NULL,
+			S3C2410_USB_HOST_BASE, 0x100, IORESOURCE_MEM, NULL);
+}
+
+static inline void s3c24xx_add_uart1(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
+			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+}
+
+#endif /* INCLUDE_MACH_DEVICES_S3C24XX_H */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:09 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:09 +0200
Subject: [PATCH 17/18] ARM/Samsung: add the S3C6410 SoC
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-18-git-send-email-jbe@pengutronix.de>

After adding the base support, the CPU can now be enabled in the build system.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Kconfig              |    6 ++++++
 arch/arm/mach-samsung/Kconfig |   21 ++++++++++++++++++++-
 drivers/serial/Kconfig        |    2 +-
 3 files changed, 27 insertions(+), 2 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9590db9..2e79005 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -81,6 +81,12 @@ config ARCH_S3C24xx
 #	select CPU_V7
 #	select GENERIC_GPIO
 
+config ARCH_S3C64xx
+	bool "Samsung S3C64xx"
+	select ARCH_SAMSUNG
+	select CPU_V6
+	select GENERIC_GPIO
+
 config ARCH_VERSATILE
 	bool "ARM Versatile boards (ARM926EJ-S)"
 	select CPU_ARM926T
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 28bbc97..8acb7c9 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -19,6 +19,8 @@ config BOARDINFO
 config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
 	hex
 	default 0x1ff0 if ARCH_S5PCxx
+# TODO
+	default 0x2000 if ARCH_S3C64xx
 
 config SAMSUNG_IMPROVED_UART
 	bool
@@ -89,6 +91,24 @@ endmenu
 
 endif
 
+if ARCH_S3C64xx
+
+config CPU_S3C6410
+	select SAMSUNG_IMPROVED_UART
+	bool
+
+choice
+
+	prompt "S3C64xx Board Type"
+
+endchoice
+
+menu "Board specific settings       "
+
+endmenu
+
+endif
+
 if ARCH_S5PCxx
 
 config CPU_S5PC110
@@ -114,7 +134,6 @@ endchoice
 
 endif
 
-
 menu "S3C Features              "
 
 config S3C_LOWLEVEL_INIT
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index a118aaf..283573e 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -90,7 +90,7 @@ config DRIVER_SERIAL_S3C_CLK
 	prompt "input clock reference"
 	depends on DRIVER_SERIAL_S3C
 	default 0 if ARCH_S3C24xx
-	default 3 if ARCH_S5PCxx
+	default 3 if ARCH_S3C64xx || ARCH_S5PCxx
 	help
 	  Select one of up to four available clock sources for the UART:
 	   0+1: PCLK, 2: UCLK0, 3: UCLK1
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:02 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:02 +0200
Subject: [PATCH 10/18] Samsung/serial: unify UCON register settings
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-11-git-send-email-jbe@pengutronix.de>

This should work on S3C24XX and S3C64XX SoCs.

Tested at runtime on a Mini2440 and Mini6410.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |   10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 8736f0b..dc28dd6 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -97,9 +97,13 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	/* Normal,No parity,1 stop,8 bit */
 	writeb(0x03, base + ULCON);
 
-	/* tx=level,rx=edge,disable timeout int.,enable rx error int.,
-	 * normal, interrupt or polling, no pre-divider */
-	writew(0x0245 | UCON_SET_CLK_SRC(CONFIG_DRIVER_SERIAL_S3C_CLK),
+	/*
+	 * S3C2440 SoC:
+	 *  - no clock divider
+	 * all SoCs:
+	 *  - enable receive and transmit mode
+	 */
+	writew(0x0005 | UCON_SET_CLK_SRC(CONFIG_DRIVER_SERIAL_S3C_CLK),
 						base + UCON);
 
 	if (IS_ENABLED(CONFIG_SAMSUNG_IMPROVED_UART))
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:01 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:01 +0200
Subject: [PATCH 09/18] Samsung/serial: move the decision about an improved
 UART into Kconfig
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-10-git-send-email-jbe@pengutronix.de>

More or less just cosmetic (removing ifdefs!).

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Kconfig                     |    5 +++++
 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h |    2 --
 drivers/serial/serial_s3c.c                       |   16 ++++++++--------
 3 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 90cda30..28bbc97 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -20,6 +20,9 @@ config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
 	hex
 	default 0x1ff0 if ARCH_S5PCxx
 
+config SAMSUNG_IMPROVED_UART
+	bool
+
 if ARCH_S3C24xx
 
 config CPU_S3C2410
@@ -89,9 +92,11 @@ endif
 if ARCH_S5PCxx
 
 config CPU_S5PC110
+	select SAMSUNG_IMPROVED_UART
 	bool
 
 config CPU_S5PV210
+	select SAMSUNG_IMPROVED_UART
 	bool
 
 choice
diff --git a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
index 248f868..448e3b8 100644
--- a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
@@ -45,8 +45,6 @@
 #define S3C_UART2_SIZE 0x400
 #define S3C_UART3_BASE (S3C_UART_BASE + 0x800)
 #define S3C_UART3_SIZE 0x400
-#define S3C_UART_HAS_UBRDIVSLOT
-#define S3C_UART_HAS_UINTM
 
 #define S5P_DMC0_BASE 0xF0000000
 #define S5P_DMC1_BASE 0xF1400000
diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index a2b8e56..8736f0b 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -74,10 +74,11 @@ static int s3c_serial_setbaudrate(struct console_device *cdev, int baudrate)
 	void __iomem *base = priv->regs;
 	unsigned val;
 
-#ifdef S3C_UART_HAS_UBRDIVSLOT
-	val = s3c_get_arch_uart_input_clock(base) / baudrate;
-	writew(udivslot_table[val & 15], base + UBRDIVSLOT);
-#endif
+	if (IS_ENABLED(CONFIG_SAMSUNG_IMPROVED_UART)) {
+		val = s3c_get_arch_uart_input_clock(base) / baudrate;
+		writew(udivslot_table[val & 15], base + UBRDIVSLOT);
+	}
+
 	val = s3c_get_arch_uart_input_clock(base) / (16 * baudrate) - 1;
 	writew(val, base + UBRDIV);
 
@@ -101,10 +102,9 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	writew(0x0245 | UCON_SET_CLK_SRC(CONFIG_DRIVER_SERIAL_S3C_CLK),
 						base + UCON);
 
-#ifdef S3C_UART_HAS_UINTM
-	/* 'interrupt or polling mode' for both directions */
-	writeb(0xf, base + UINTM);
-#endif
+	if (IS_ENABLED(CONFIG_SAMSUNG_IMPROVED_UART))
+		/* 'interrupt or polling mode' for both directions */
+		writeb(0xf, base + UINTM);
 
 	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC))
 		writeb(0x10, base + UMCON); /* enable auto flow control */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:04 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:04 +0200
Subject: [PATCH 12/18] ARM/Samsung: add S3C6410 SoC iomap
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-13-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/include/mach/s3c-iomap.h     |    3 ++
 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h |   44 ++++++++++++++++++++
 2 files changed, 47 insertions(+)
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h

diff --git a/arch/arm/mach-samsung/include/mach/s3c-iomap.h b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
index d34ace4..09a6891 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
@@ -22,6 +22,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/s3c24xx-iomap.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/s3c64xx-iomap.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/s5pcxx-iomap.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h b/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h
new file mode 100644
index 0000000..267cd4f
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* S3C64xx device base addresses */
+# define S3C_SROM_SFR			0x70000000
+# define S3C_DRAMC			0x7e001000
+# define S3C_WATCHDOG_BASE		0x7e004000
+# define S3C_CLOCK_POWER_BASE		0x7e00f000
+# define S3C_UART_BASE			0x7f005000
+# define S3C_TIMER_BASE			0x7f006000
+# define S3C_GPIO_BASE			0x7f008000
+
+# define S3C_UART1_BASE (S3C_UART_BASE)
+# define S3C_UART1_SIZE 0x400
+# define S3C_UART2_BASE (S3C_UART_BASE + 0x400)
+# define S3C_UART2_SIZE 0x400
+# define S3C_UART3_BASE (S3C_UART_BASE + 0x800)
+# define S3C_UART3_SIZE 0x400
+# define S3C_UART4_BASE (S3C_UART_BASE + 0xc00)
+# define S3C_UART4_SIZE 0x400
+
+# define S3C_SDRAM_BASE 0x50000000
+# define S3C_SDRAM_END (S3C_SDRAM_BASE + 0x10000000)
+
+# define S3C_SROM_BW (S3C_SROM_SFR)
+# define S3C_SROM_BC0 (S3C_SROM_SFR + 4)
+
+# define S3C_CS0_BASE 0x10000000
+# define S3C_CS1_BASE 0x18000000
+# define S3C_CS2_BASE 0x20000000
+# define S3C_CS3_BASE 0x28000000
+# define S3C_CS4_BASE 0x30000000
+# define S3C_CS5_BASE 0x38000000
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:08 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:08 +0200
Subject: [PATCH 16/18] ARM/Samsung: add generic S3C6410 SoC specific functions
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-17-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                   |    2 +-
 arch/arm/mach-samsung/include/mach/s3c-generic.h |   13 +++++
 arch/arm/mach-samsung/mem-s3c64xx.c              |   65 ++++++++++++++++++++++
 3 files changed, 79 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-samsung/mem-s3c64xx.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 5187170..9402289 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -3,6 +3,6 @@ obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S3C64xx) += lowlevel-s3c64x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o
+obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o mem-s3c64xx.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o mem-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/include/mach/s3c-generic.h b/arch/arm/mach-samsung/include/mach/s3c-generic.h
index 329c2b4..42e8c5f 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-generic.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-generic.h
@@ -47,3 +47,16 @@ void s5p_init_dram_bank_lpddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int
 void s5p_init_dram_bank_ddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16);
 uint32_t s5p_get_memory_size(void);
 #endif
+
+#ifdef CONFIG_ARCH_S3C64xx
+unsigned s3c6410_get_memory_size(void);
+struct s3c6410_chipselect {
+	unsigned adr_setup_t; /* in [ns] */
+	unsigned access_setup_t; /* in [ns] */
+	unsigned access_t; /* in [ns] */
+	unsigned cs_hold_t; /* in [ns] */
+	unsigned adr_hold_t; /* in [ns] */
+	unsigned char width; /* 8 or 16 */
+};
+int s3c6410_setup_chipselect(int, const struct s3c6410_chipselect*);
+#endif
diff --git a/arch/arm/mach-samsung/mem-s3c64xx.c b/arch/arm/mach-samsung/mem-s3c64xx.c
new file mode 100644
index 0000000..f312fb2
--- /dev/null
+++ b/arch/arm/mach-samsung/mem-s3c64xx.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <errno.h>
+#include <io.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+
+#define S3C_DRAMC_CHIP_0_CFG (S3C_DRAMC + 0x200)
+
+/* note: this routine honors the first memory bank only */
+unsigned s3c6410_get_memory_size(void)
+{
+	unsigned reg = readl(S3C_DRAMC_CHIP_0_CFG) & 0xff;
+
+	return ~(reg << 24) + 1;
+}
+
+/* configure the timing of one of the available external chip select lines */
+int s3c6410_setup_chipselect(int no, const struct s3c6410_chipselect *c)
+{
+	unsigned per_t = 1000000000 / s3c_get_hclk();
+	unsigned tacs, tcos, tacc, tcoh, tcah, shift;
+	uint32_t reg;
+
+	/* start of cycle to chip select assertion (= address/data setup) */
+	tacs = DIV_ROUND_UP(c->adr_setup_t, per_t);
+	/* start of CS to read/write assertion (= access setup) */
+	tcos = DIV_ROUND_UP(c->access_setup_t, per_t);
+	/* length of read/write assertion (= access lenght) */
+	tacc = DIV_ROUND_UP(c->access_t, per_t) - 1;
+	/* CS hold after access is finished */
+	tcoh = DIV_ROUND_UP(c->cs_hold_t, per_t);
+	/* adress/data hold after CS is deasserted */
+	tcah = DIV_ROUND_UP(c->adr_hold_t, per_t);
+
+	shift = no * 4;
+	reg = readl(S3C_SROM_BW) & ~(0xf << shift);
+	if (c->width == 16)
+		reg |= 0x1 << shift;
+	writel(reg, S3C_SROM_BW);
+#ifdef DEBUG
+	if (tacs > 15 || tcos > 15 || tacc > 31 || tcoh > 15 || tcah > 15) {
+		pr_err("At least one of the timings are invalid\n");
+		return -EINVAL;
+	}
+	pr_info("Will write 0x%08X\n", tacs << 28 | tcos << 24 | tacc << 16 |
+					tcoh << 12 | tcah << 8);
+#endif
+	writel(tacs << 28 | tcos << 24 | tacc << 16 | tcoh << 12 | tcah << 8,
+						S3C_SROM_BC0 + shift);
+
+	return 0;
+}
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:00:55 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:00:55 +0200
Subject: [PATCH 03/18] ARM/Samsung: follow the name style of the other source
 files in this directory
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-4-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile         |    2 +-
 arch/arm/mach-samsung/clocks-s3c24xx.c |  157 ++++++++++++++++++++++++++++++++
 arch/arm/mach-samsung/s3c24xx-clocks.c |  157 --------------------------------
 3 files changed, 158 insertions(+), 158 deletions(-)
 create mode 100644 arch/arm/mach-samsung/clocks-s3c24xx.c
 delete mode 100644 arch/arm/mach-samsung/s3c24xx-clocks.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 6020587..091b600 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,6 +1,6 @@
 obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
-obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
+obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o mem-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/clocks-s3c24xx.c b/arch/arm/mach-samsung/clocks-s3c24xx.c
new file mode 100644
index 0000000..13e6867
--- /dev/null
+++ b/arch/arm/mach-samsung/clocks-s3c24xx.c
@@ -0,0 +1,157 @@
+/*
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <init.h>
+#include <clock.h>
+#include <io.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+#include <mach/s3c-clocks.h>
+#include <mach/s3c-busctl.h>
+
+/**
+ * Calculate the current M-PLL clock.
+ * @return Current frequency in Hz
+ */
+uint32_t s3c_get_mpllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	reg_val = readl(S3C_MPLLCON);
+	m = ((reg_val & 0xFF000) >> 12) + 8;
+	p = ((reg_val & 0x003F0) >> 4) + 2;
+	s = reg_val & 0x3;
+#ifdef CONFIG_CPU_S3C2410
+	return (S3C24XX_CLOCK_REFERENCE * m) / (p << s);
+#endif
+#ifdef CONFIG_CPU_S3C2440
+	return 2 * m * (S3C24XX_CLOCK_REFERENCE / (p << s));
+#endif
+}
+
+/**
+ * Calculate the current U-PLL clock
+ * @return Current frequency in Hz
+ */
+uint32_t s3c_get_upllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	reg_val = readl(S3C_UPLLCON);
+	m = ((reg_val & 0xFF000) >> 12) + 8;
+	p = ((reg_val & 0x003F0) >> 4) + 2;
+	s = reg_val & 0x3;
+
+	return (S3C24XX_CLOCK_REFERENCE * m) / (p << s);
+}
+
+/**
+ * Calculate the FCLK frequency used for the ARM CPU core
+ * @return Current frequency in Hz
+ */
+uint32_t s3c_get_fclk(void)
+{
+	return s3c_get_mpllclk();
+}
+
+/**
+ * Calculate the HCLK frequency used for the AHB bus (CPU to main peripheral)
+ * @return Current frequency in Hz
+ */
+uint32_t s3c_get_hclk(void)
+{
+	uint32_t f_clk;
+
+	f_clk = s3c_get_fclk();
+#ifdef CONFIG_CPU_S3C2410
+	if (readl(S3C_CLKDIVN) & 0x02)
+		return f_clk >> 1;
+#endif
+#ifdef CONFIG_CPU_S3C2440
+	switch(readl(S3C_CLKDIVN) & 0x06) {
+	case 2:
+		return f_clk >> 1;
+	case 4:
+		return f_clk >> 2;	/* TODO consider CAMDIVN */
+	case 6:
+		return f_clk / 3;	/* TODO consider CAMDIVN */
+	}
+#endif
+	return f_clk;
+}
+
+/**
+ * Calculate the PCLK frequency used for the slower peripherals
+ * @return Current frequency in Hz
+ */
+uint32_t s3c_get_pclk(void)
+{
+	uint32_t p_clk;
+
+	p_clk = s3c_get_hclk();
+	if (readl(S3C_CLKDIVN) & 0x01)
+		return p_clk >> 1;
+	return p_clk;
+}
+
+/**
+ * Calculate the UCLK frequency used by the USB host device
+ * @return Current frequency in Hz
+ */
+uint32_t s3c24_get_uclk(void)
+{
+	return s3c_get_upllclk();
+}
+
+/**
+ * Return correct UART frequency based on the UCON register
+ */
+unsigned s3c_get_uart_clk(unsigned src)
+{
+	switch (src & 3) {
+	case 0:
+	case 2:
+		return s3c_get_pclk();
+	case 1:
+		return 0; /* TODO UEXTCLK */
+	case 3:
+		return 0; /* TODO FCLK/n */
+	}
+	return 0; /* not reached, to make compiler happy */
+}
+
+/**
+ * Show the user the current clock settings
+ */
+int s3c24xx_dump_clocks(void)
+{
+	printf("refclk:  %7d kHz\n", S3C24XX_CLOCK_REFERENCE / 1000);
+	printf("mpll:    %7d kHz\n", s3c_get_mpllclk() / 1000);
+	printf("upll:    %7d kHz\n", s3c_get_upllclk() / 1000);
+	printf("fclk:    %7d kHz\n", s3c_get_fclk() / 1000);
+	printf("hclk:    %7d kHz\n", s3c_get_hclk() / 1000);
+	printf("pclk:    %7d kHz\n", s3c_get_pclk() / 1000);
+	printf("SDRAM1:   CL%d@%dMHz\n", ((readl(S3C_BANKCON6) & 0xc) >> 2) + 2,
+						s3c_get_hclk() / 1000000);
+	if ((readl(S3C_BANKCON7) & (0x3 << 15)) == (0x3 << 15))
+		printf("SDRAM2:   CL%d@%dMHz\n",
+			((readl(S3C_BANKCON7) & 0xc) >> 2) + 2,
+			s3c_get_hclk() / 1000000);
+	return 0;
+}
+
+late_initcall(s3c24xx_dump_clocks);
diff --git a/arch/arm/mach-samsung/s3c24xx-clocks.c b/arch/arm/mach-samsung/s3c24xx-clocks.c
deleted file mode 100644
index 13e6867..0000000
--- a/arch/arm/mach-samsung/s3c24xx-clocks.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <config.h>
-#include <common.h>
-#include <init.h>
-#include <clock.h>
-#include <io.h>
-#include <mach/s3c-iomap.h>
-#include <mach/s3c-generic.h>
-#include <mach/s3c-clocks.h>
-#include <mach/s3c-busctl.h>
-
-/**
- * Calculate the current M-PLL clock.
- * @return Current frequency in Hz
- */
-uint32_t s3c_get_mpllclk(void)
-{
-	uint32_t m, p, s, reg_val;
-
-	reg_val = readl(S3C_MPLLCON);
-	m = ((reg_val & 0xFF000) >> 12) + 8;
-	p = ((reg_val & 0x003F0) >> 4) + 2;
-	s = reg_val & 0x3;
-#ifdef CONFIG_CPU_S3C2410
-	return (S3C24XX_CLOCK_REFERENCE * m) / (p << s);
-#endif
-#ifdef CONFIG_CPU_S3C2440
-	return 2 * m * (S3C24XX_CLOCK_REFERENCE / (p << s));
-#endif
-}
-
-/**
- * Calculate the current U-PLL clock
- * @return Current frequency in Hz
- */
-uint32_t s3c_get_upllclk(void)
-{
-	uint32_t m, p, s, reg_val;
-
-	reg_val = readl(S3C_UPLLCON);
-	m = ((reg_val & 0xFF000) >> 12) + 8;
-	p = ((reg_val & 0x003F0) >> 4) + 2;
-	s = reg_val & 0x3;
-
-	return (S3C24XX_CLOCK_REFERENCE * m) / (p << s);
-}
-
-/**
- * Calculate the FCLK frequency used for the ARM CPU core
- * @return Current frequency in Hz
- */
-uint32_t s3c_get_fclk(void)
-{
-	return s3c_get_mpllclk();
-}
-
-/**
- * Calculate the HCLK frequency used for the AHB bus (CPU to main peripheral)
- * @return Current frequency in Hz
- */
-uint32_t s3c_get_hclk(void)
-{
-	uint32_t f_clk;
-
-	f_clk = s3c_get_fclk();
-#ifdef CONFIG_CPU_S3C2410
-	if (readl(S3C_CLKDIVN) & 0x02)
-		return f_clk >> 1;
-#endif
-#ifdef CONFIG_CPU_S3C2440
-	switch(readl(S3C_CLKDIVN) & 0x06) {
-	case 2:
-		return f_clk >> 1;
-	case 4:
-		return f_clk >> 2;	/* TODO consider CAMDIVN */
-	case 6:
-		return f_clk / 3;	/* TODO consider CAMDIVN */
-	}
-#endif
-	return f_clk;
-}
-
-/**
- * Calculate the PCLK frequency used for the slower peripherals
- * @return Current frequency in Hz
- */
-uint32_t s3c_get_pclk(void)
-{
-	uint32_t p_clk;
-
-	p_clk = s3c_get_hclk();
-	if (readl(S3C_CLKDIVN) & 0x01)
-		return p_clk >> 1;
-	return p_clk;
-}
-
-/**
- * Calculate the UCLK frequency used by the USB host device
- * @return Current frequency in Hz
- */
-uint32_t s3c24_get_uclk(void)
-{
-	return s3c_get_upllclk();
-}
-
-/**
- * Return correct UART frequency based on the UCON register
- */
-unsigned s3c_get_uart_clk(unsigned src)
-{
-	switch (src & 3) {
-	case 0:
-	case 2:
-		return s3c_get_pclk();
-	case 1:
-		return 0; /* TODO UEXTCLK */
-	case 3:
-		return 0; /* TODO FCLK/n */
-	}
-	return 0; /* not reached, to make compiler happy */
-}
-
-/**
- * Show the user the current clock settings
- */
-int s3c24xx_dump_clocks(void)
-{
-	printf("refclk:  %7d kHz\n", S3C24XX_CLOCK_REFERENCE / 1000);
-	printf("mpll:    %7d kHz\n", s3c_get_mpllclk() / 1000);
-	printf("upll:    %7d kHz\n", s3c_get_upllclk() / 1000);
-	printf("fclk:    %7d kHz\n", s3c_get_fclk() / 1000);
-	printf("hclk:    %7d kHz\n", s3c_get_hclk() / 1000);
-	printf("pclk:    %7d kHz\n", s3c_get_pclk() / 1000);
-	printf("SDRAM1:   CL%d@%dMHz\n", ((readl(S3C_BANKCON6) & 0xc) >> 2) + 2,
-						s3c_get_hclk() / 1000000);
-	if ((readl(S3C_BANKCON7) & (0x3 << 15)) == (0x3 << 15))
-		printf("SDRAM2:   CL%d@%dMHz\n",
-			((readl(S3C_BANKCON7) & 0xc) >> 2) + 2,
-			s3c_get_hclk() / 1000000);
-	return 0;
-}
-
-late_initcall(s3c24xx_dump_clocks);
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:06 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:06 +0200
Subject: [PATCH 14/18] ARM/Samsung: add the clock tree support for the S3C6410
 SoC
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-15-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    1 +
 arch/arm/mach-samsung/clocks-s3c64xx.c             |  186 ++++++++++++++++++++
 arch/arm/mach-samsung/include/mach/s3c-clocks.h    |    3 +
 .../arm/mach-samsung/include/mach/s3c64xx-clocks.h |   49 ++++++
 4 files changed, 239 insertions(+)
 create mode 100644 arch/arm/mach-samsung/clocks-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index ac34d86..d27496d 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -3,5 +3,6 @@ obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S3C64xx) += lowlevel-s3c64x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
+obj-$(CONFIG_ARCH_S3C64xx) += clocks-s3c64xx.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o mem-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/clocks-s3c64xx.c b/arch/arm/mach-samsung/clocks-s3c64xx.c
new file mode 100644
index 0000000..1e11cdf
--- /dev/null
+++ b/arch/arm/mach-samsung/clocks-s3c64xx.c
@@ -0,0 +1,186 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <init.h>
+#include <clock.h>
+#include <io.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+#include <mach/s3c-clocks.h>
+
+static unsigned s3c_get_apllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	reg_val = readl(S3C_APLLCON);
+	m = S3C_APLLCON_GET_MDIV(reg_val);
+	p = S3C_APLLCON_GET_PDIV(reg_val);
+	s = S3C_APLLCON_GET_SDIV(reg_val);
+
+	return (S3C64XX_CLOCK_REFERENCE * m) / (p << s);
+}
+
+static unsigned s3c_get_apll_out(void)
+{
+	if (readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTAPLL)
+		return s3c_get_apllclk();
+
+	return S3C64XX_CLOCK_REFERENCE;
+}
+
+uint32_t s3c_get_mpllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	reg_val = readl(S3C_MPLLCON);
+	m = S3C_MPLLCON_GET_MDIV(reg_val);
+	p = S3C_MPLLCON_GET_PDIV(reg_val);
+	s = S3C_MPLLCON_GET_SDIV(reg_val);
+
+	return (S3C64XX_CLOCK_REFERENCE * m) / (p << s);
+}
+
+static unsigned s3c_get_epllclk(void)
+{
+	return 0;	 /* TODO */
+}
+
+static unsigned s3c_get_mpll_out(void)
+{
+	if (readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTMPLL)
+		return s3c_get_mpllclk();
+
+	return S3C64XX_CLOCK_REFERENCE;
+}
+
+uint32_t s3c_get_fclk(void)
+{
+	unsigned clk;
+
+	clk = s3c_get_apll_out();
+	if (readl(S3C_MISC_CON) & S3C_MISC_CON_SYN667)
+		clk /= 2;
+
+	return clk / (S3C_CLK_DIV0_GET_ADIV(readl(S3C_CLK_DIV0)) + 1);
+}
+
+static unsigned s3c_get_hclk_in(void)
+{
+	unsigned clk;
+
+	if (readl(S3C_OTHERS) & S3C_OTHERS_CLK_SELECT)
+		clk = s3c_get_apll_out();
+	else
+		clk = s3c_get_mpll_out();
+
+	if (readl(S3C_MISC_CON) & S3C_MISC_CON_SYN667)
+		clk /= 5;
+
+	return clk;
+}
+
+static unsigned s3c_get_hclkx2(void)
+{
+	return s3c_get_hclk_in() /
+			(S3C_CLK_DIV0_GET_HCLK2(readl(S3C_CLK_DIV0)) + 1);
+}
+
+uint32_t s3c_get_hclk(void)
+{
+	return s3c_get_hclkx2() /
+			(S3C_CLK_DIV0_GET_HCLK(readl(S3C_CLK_DIV0)) + 1);
+}
+
+uint32_t s3c_get_pclk(void)
+{
+	return s3c_get_hclkx2() /
+			(S3C_CLK_DIV0_GET_PCLK(readl(S3C_CLK_DIV0)) + 1);
+}
+
+static void s3c_init_mpll_dout(void)
+{
+	unsigned reg;
+
+	/* keep it at the same frequency as HCLKx2 */
+	reg = readl(S3C_CLK_DIV0) | S3C_CLK_DIV0_SET_MPLL_DIV(1); /* e.g. / 2 */
+	writel(reg, S3C_CLK_DIV0);
+}
+
+/* configure and enable UCLK1 */
+static int s3c_init_uart_clock(void)
+{
+	unsigned reg;
+
+	s3c_init_mpll_dout();	/* to have a reliable clock source */
+
+	/* source the UART clock from the MPLL, currently *not* from EPLL */
+	reg = readl(S3C_CLK_SRC) | S3C_CLK_SRC_UARTMPLL;
+	writel(reg, S3C_CLK_SRC);
+
+	/* keep UART clock at the same frequency than the PCLK */
+	reg = readl(S3C_CLK_DIV2) & ~S3C_CLK_DIV2_UART_MASK;
+	reg |= S3C_CLK_DIV2_SET_UART(0x3);	/* / 4 */
+	writel(reg, S3C_CLK_DIV2);
+
+	/* ensure this very special clock is running */
+	reg = readl(S3C_SCLK_GATE) | S3C_SCLK_GATE_UART;
+	writel(reg, S3C_SCLK_GATE);
+
+	return 0;
+}
+core_initcall(s3c_init_uart_clock);
+
+unsigned s3c_get_uart_clk(unsigned source)
+{
+	u32 reg;
+	unsigned clk, pdiv, uartpdiv;
+
+	switch (source) {
+	default: /* PCLK */
+		clk = s3c_get_pclk();
+		pdiv = uartpdiv = 1;
+		break;
+	case 1: /* UCLK0 */
+		clk = 0;
+		pdiv = uartpdiv = 1;	/* TODO */
+		break;
+	case 3: /* UCLK1 */
+		reg = readl(S3C_CLK_SRC);
+		if (reg & S3C_CLK_SRC_UARTMPLL)
+			clk = s3c_get_mpllclk();
+		else
+			clk = s3c_get_epllclk();
+		pdiv = S3C_CLK_DIV0_GET_MPLL_DIV(readl(S3C_CLK_DIV0)) + 1;
+		uartpdiv = S3C_CLK_DIV2_GET_UART(readl(S3C_CLK_DIV2)) + 1;
+		break;
+	}
+
+	return clk / pdiv / uartpdiv;
+}
+
+int s3c64xx_dump_clocks(void)
+{
+	printf("refclk:  %7d kHz\n", S3C64XX_CLOCK_REFERENCE / 1000);
+	printf("apll:    %7d kHz\n", s3c_get_apllclk() / 1000);
+	printf("mpll:    %7d kHz\n", s3c_get_mpllclk() / 1000);
+	printf("CPU:     %7d kHz\n", s3c_get_fclk() / 1000);
+	printf("hclkx2:  %7d kHz\n", s3c_get_hclkx2() / 1000);
+	printf("hclk:    %7d kHz\n", s3c_get_hclk() / 1000);
+	printf("pclk:    %7d kHz\n", s3c_get_pclk() / 1000);
+	return 0;
+}
+
+late_initcall(s3c64xx_dump_clocks);
diff --git a/arch/arm/mach-samsung/include/mach/s3c-clocks.h b/arch/arm/mach-samsung/include/mach/s3c-clocks.h
index f577306..6920ca9 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-clocks.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-clocks.h
@@ -25,6 +25,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/s3c24xx-clocks.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/s3c64xx-clocks.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/s5pcxx-clocks.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h b/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h
new file mode 100644
index 0000000..a972cf4
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+# define S3C_APLLCON (S3C_CLOCK_POWER_BASE + 0x0c)
+#  define S3C_APLLCON_GET_MDIV(x) (((x) >> 16) & 0x3ff)
+#  define S3C_APLLCON_GET_PDIV(x) (((x) >> 8) & 0x3f)
+#  define S3C_APLLCON_GET_SDIV(x) ((x) & 0x7)
+# define S3C_MPLLCON (S3C_CLOCK_POWER_BASE + 0x10)
+#  define S3C_MPLLCON_GET_MDIV(x) (((x) >> 16) & 0x3ff)
+#  define S3C_MPLLCON_GET_PDIV(x) (((x) >> 8) & 0x3f)
+#  define S3C_MPLLCON_GET_SDIV(x) ((x) & 0x7)
+# define S3C_EPLLCON0 (S3C_CLOCK_POWER_BASE + 0x14)
+# define S3C_EPLLCON1 (S3C_CLOCK_POWER_BASE + 0x18)
+# define S3C_CLKCON (S3C_CLOCK_POWER_BASE + 0xc)
+# define S3C_CLKSLOW (S3C_CLOCK_POWER_BASE + 0x10)
+# define S3C_CLKDIVN (S3C_CLOCK_POWER_BASE + 0x14)
+# define S3C_CLK_SRC (S3C_CLOCK_POWER_BASE + 0x01c)
+#  define S3C_CLK_SRC_UARTMPLL (1 << 13)
+#  define S3C_CLK_SRC_FOUTEPLL (1 << 2)
+#  define S3C_CLK_SRC_FOUTMPLL (1 << 1)
+#  define S3C_CLK_SRC_FOUTAPLL (1 << 0)
+# define S3C_CLK_DIV0 (S3C_CLOCK_POWER_BASE + 0x020)
+#  define S3C_CLK_DIV0_GET_ADIV(x) ((x) & 0xf)
+#  define S3C_CLK_DIV0_GET_HCLK2(x) (((x) >> 9) & 0x7)
+#  define S3C_CLK_DIV0_GET_HCLK(x) (((x) >> 8) & 0x1)
+#  define S3C_CLK_DIV0_GET_PCLK(x) (((x) >> 12) & 0xf)
+#  define S3C_CLK_DIV0_SET_MPLL_DIV(x) (((x) & 0x1) << 4)
+#  define S3C_CLK_DIV0_GET_MPLL_DIV(x) (((x) >> 4) & 0x1)
+# define S3C_CLK_DIV2 (S3C_CLOCK_POWER_BASE + 0x028)
+#  define S3C_CLK_DIV2_UART_MASK (0xf << 16)
+#  define S3C_CLK_DIV2_SET_UART(x) ((x) << 16)
+#  define S3C_CLK_DIV2_GET_UART(x) (((x) >> 16) & 0xf)
+# define S3C_SCLK_GATE (S3C_CLOCK_POWER_BASE + 0x038)
+#  define S3C_SCLK_GATE_UART (1 << 5)
+# define S3C_MISC_CON (S3C_CLOCK_POWER_BASE + 0x838)
+#  define S3C_MISC_CON_SYN667 (1 << 19)
+# define S3C_OTHERS (S3C_CLOCK_POWER_BASE + 0x900)
+#  define S3C_OTHERS_CLK_SELECT (1 << 6)
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:10 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:10 +0200
Subject: [PATCH 18/18] ARM/Samsung: add the Mini6410 platform as the first
 user of the S3C6410 SoC
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-19-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Makefile                   |    1 +
 arch/arm/boards/mini6410/Kconfig    |   27 +++
 arch/arm/boards/mini6410/Makefile   |    1 +
 arch/arm/boards/mini6410/config.h   |    8 +
 arch/arm/boards/mini6410/env/config |   56 +++++++
 arch/arm/boards/mini6410/mini6410.c |  317 +++++++++++++++++++++++++++++++++++
 arch/arm/configs/mini6410_defconfig |   40 +++++
 arch/arm/mach-samsung/Kconfig       |   12 ++
 8 files changed, 462 insertions(+)
 create mode 100644 arch/arm/boards/mini6410/Kconfig
 create mode 100644 arch/arm/boards/mini6410/Makefile
 create mode 100644 arch/arm/boards/mini6410/config.h
 create mode 100644 arch/arm/boards/mini6410/env/config
 create mode 100644 arch/arm/boards/mini6410/mini6410.c
 create mode 100644 arch/arm/configs/mini6410_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 9488359..6af9da2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -123,6 +123,7 @@ board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
 board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
 board-$(CONFIG_MACH_GUF_CUPID)			:= guf-cupid
 board-$(CONFIG_MACH_MINI2440)			:= mini2440
+board-$(CONFIG_MACH_MINI6410)			:= mini6410
 board-$(CONFIG_MACH_QIL_A9260)			:= qil-a9260
 board-$(CONFIG_MACH_TNY_A9260)			:= tny-a926x
 board-$(CONFIG_MACH_TNY_A9263)			:= tny-a926x
diff --git a/arch/arm/boards/mini6410/Kconfig b/arch/arm/boards/mini6410/Kconfig
new file mode 100644
index 0000000..6d378ff
--- /dev/null
+++ b/arch/arm/boards/mini6410/Kconfig
@@ -0,0 +1,27 @@
+if MACH_MINI6410
+
+config MINI6410_VIDEO
+	bool
+	select VIDEO
+	select DRIVER_VIDEO_S3C
+
+config MINI6410_VIDEO_N35
+	bool "Support N35 display (240x320)"
+#	select MINI2440_VIDEO
+	help
+	  This adds support for NEC 3.5 inch TFT display,
+	  the most common one used with MINI2440 board.
+
+config MINI6410_VIDEO_A70
+	bool "Support A70 display (800x480)"
+#	select MINI2440_VIDEO
+	help
+	  This adds support for Innolux 7.0 inch TFT display.
+
+config MINI6410_VIDEO_SVGA
+	bool "Support SVGA video adapter"
+#	select MINI2440_VIDEO
+	help
+	  This adds support for MINI2440 SVGA (1024x768) video output adapter.
+
+endif
diff --git a/arch/arm/boards/mini6410/Makefile b/arch/arm/boards/mini6410/Makefile
new file mode 100644
index 0000000..cd7a427
--- /dev/null
+++ b/arch/arm/boards/mini6410/Makefile
@@ -0,0 +1 @@
+obj-y += mini6410.o
diff --git a/arch/arm/boards/mini6410/config.h b/arch/arm/boards/mini6410/config.h
new file mode 100644
index 0000000..ee38192
--- /dev/null
+++ b/arch/arm/boards/mini6410/config.h
@@ -0,0 +1,8 @@
+/* FriendlyARM Mini6410 specific global settings */
+
+#ifndef _MINI6410_CONFIG_H_
+# define _MINI6410_CONFIG_H_
+
+#define S3C64XX_CLOCK_REFERENCE 12000000
+
+#endif /* _MINI6410_CONFIG_H_ */
diff --git a/arch/arm/boards/mini6410/env/config b/arch/arm/boards/mini6410/env/config
new file mode 100644
index 0000000..b160a0e
--- /dev/null
+++ b/arch/arm/boards/mini6410/env/config
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+machine=mini6410
+eth0.serverip=192.168.1.7
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+#ip=dhcp
+
+# or set your networking parameters here
+eth0.ipaddr=192.168.1.187
+eth0.netmask=255.255.255.0
+eth0.gateway=192.168.1.1
+eth0.ethaddr=08:90:90:90:90:90
+
+# can be either 'nfs', 'tftp' or 'nand'
+kernel_loc=tftp
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-${machine}.${rootfs_type}
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-${machine}
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+	kernelimage="${user}"-"${kernelimage}"
+	nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
+	rootfsimage="${user}"-"${rootfsimage}"
+else
+	nfsroot="${eth0.serverip}:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+#
+# "mini6410" kernel parameter
+# 0 .. 9 = screen type
+# i = touchscreen with propritary FriendlyARM protocol
+# Note: can be "minit6410= " if nothing of these components are connected
+#
+bootargs="console=ttySAC0,115200 mini6410=0"
+
+nand_device="nand"
+nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nand=3
diff --git a/arch/arm/boards/mini6410/mini6410.c b/arch/arm/boards/mini6410/mini6410.c
new file mode 100644
index 0000000..b586820
--- /dev/null
+++ b/arch/arm/boards/mini6410/mini6410.c
@@ -0,0 +1,317 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * In some ways inspired by code
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger at sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller at elsoft.ch>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <sizes.h>
+#include <generated/mach-types.h>
+#include <dm9000.h>
+#include <gpio.h>
+#include <io.h>
+#include <asm/armlinux.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+
+/*
+ * dm9000 network controller onboard
+ * Connected to CS line 1 and interrupt line EINT7,
+ * data width is 16 bit
+ * Area 1: Offset 0x300...0x301
+ * Area 2: Offset 0x304...0x305
+ */
+static struct dm9000_platform_data dm9000_data = {
+	.srom = 0,	/* no serial ROM for the ethernet address */
+};
+
+static const unsigned pin_usage[] = {
+	/* UART2 (spare, 3,3 V TTL level only) */
+	GPA4_RXD1 | ENABLE_PU,
+	GPA5_TXD1,
+	GPA6_NCTS1 | ENABLE_PU,
+	GPA7_NRTS1,
+	/* UART3 (spare, 3,3 V TTL level only) */
+	GPB0_RXD2 | ENABLE_PU,
+	GPB1_TXD2,
+	/* UART4 (spare, 3,3 V TTL level only) */
+	GPB2_RXD3 | ENABLE_PU,
+	GPB3_TXD3,
+
+	GPB4_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* I2C bus */
+	GPB5_IIC0_SCL,	/* external PU */
+	GPB6_IIC0_SDA,	/* external PU */
+
+	GPC0_SPI0_MISO | ENABLE_PU,
+	GPC1_SPI0_CLK,
+	GPC2_SPI0_MOSI,
+	GPC3_SPI0_NCS,
+
+	GPC4_SPI1_MISO | ENABLE_PU,
+	GPC5_SPI1_CLK,
+	GPC6_SPI1_MOSI,
+	GPC7_SPI1_NCS,
+
+	GPD0_AC97_BITCLK,
+	GPD1_AC97_NRST,
+	GPD2_AC97_SYNC,
+	GPD3_AC97_SDI | ENABLE_PU,
+	GPD4_AC97_SDO,
+
+	GPE0_GPIO | GPIO_OUT | GPIO_VAL(0), /* LCD backlight off */
+	GPE1_GPIO | GPIO_IN | ENABLE_PU,
+	GPE2_GPIO | GPIO_IN | ENABLE_PU,
+	GPE3_GPIO | GPIO_IN | ENABLE_PU,
+	GPE4_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* keep all camera signals at reasonable values */
+	GPF0_GPIO | GPIO_IN | ENABLE_PU,
+	GPF1_GPIO | GPIO_IN | ENABLE_PU,
+	GPF2_GPIO | GPIO_IN | ENABLE_PU,
+	GPF3_GPIO | GPIO_IN | ENABLE_PU,
+	GPF4_GPIO | GPIO_IN | ENABLE_PU,
+	GPF5_GPIO | GPIO_IN | ENABLE_PU,
+	GPF6_GPIO | GPIO_IN | ENABLE_PU,
+	GPF7_GPIO | GPIO_IN | ENABLE_PU,
+	GPF8_GPIO | GPIO_IN | ENABLE_PU,
+	GPF9_GPIO | GPIO_IN | ENABLE_PU,
+	GPF10_GPIO | GPIO_IN | ENABLE_PU,
+	GPF11_GPIO | GPIO_IN | ENABLE_PU,
+	GPF12_GPIO | GPIO_IN | ENABLE_PU,
+	GPF13_GPIO | GPIO_OUT | GPIO_VAL(0), /* USB power off */
+	GPF14_GPIO | GPIO_OUT | GPIO_VAL(0), /* Buzzer off */
+	GPF15_GPIO | GPIO_OUT | GPIO_VAL(0), /* Backlight PWM inactive */
+
+	/* SD card slot (all signals have external PU) */
+	GPG0_MMC0_CLK,
+	GPG1_MMC0_CMD,
+	GPG2_MMC0_DAT0,
+	GPG3_MMC0_DAT1,
+	GPG4_MMC0_DAT2,
+	GPG5_MMC0_DAT3,
+	GPG6_MMC0_NCD,
+
+	/* SDIO slot (all used signals have external PU) */
+	GPH0_GPIO | GPIO_IN,	/* CLK */
+	GPH1_GPIO | GPIO_IN,	/* CMD */
+	GPH2_GPIO | GPIO_IN,	/* DAT0 */
+	GPH3_GPIO | GPIO_IN,	/* DAT1 */
+	GPH4_GPIO | GPIO_IN,	/* DAT2 */
+	GPH5_GPIO | GPIO_IN,	/* DAT3 */
+	GPH6_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH7_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH8_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH9_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+
+	/* as long as we are not using the LCD controller, disable the pins */
+	GPI0_GPIO | GPIO_IN | ENABLE_PD,
+	GPI1_GPIO | GPIO_IN | ENABLE_PD,
+	GPI2_GPIO | GPIO_IN | ENABLE_PD,
+	GPI3_GPIO | GPIO_IN | ENABLE_PD,
+	GPI4_GPIO | GPIO_IN | ENABLE_PD,
+	GPI5_GPIO | GPIO_IN | ENABLE_PD,
+	GPI6_GPIO | GPIO_IN | ENABLE_PD,
+	GPI7_GPIO | GPIO_IN | ENABLE_PD,
+	GPI8_GPIO | GPIO_IN | ENABLE_PD,
+	GPI9_GPIO | GPIO_IN | ENABLE_PD,
+	GPI10_GPIO | GPIO_IN | ENABLE_PD,
+	GPI11_GPIO | GPIO_IN | ENABLE_PD,
+	GPI12_GPIO | GPIO_IN | ENABLE_PD,
+	GPI13_GPIO | GPIO_IN | ENABLE_PD,
+	GPI14_GPIO | GPIO_IN | ENABLE_PD,
+	GPI15_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ0_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ1_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ2_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ3_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ4_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ5_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ6_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ7_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ8_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ9_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ10_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ11_GPIO | GPIO_IN | ENABLE_PD,
+
+	GPK0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK2_GPIO | GPIO_IN,
+	GPK3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK4_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #1 (high = LED off) */
+	GPK5_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #2 (high = LED off) */
+	GPK6_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #3 (high = LED off) */
+	GPK7_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #4 (high = LED off) */
+	GPK8_GPIO | GPIO_IN, 			/* (external PU) */
+	GPK9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK10_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK11_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK12_GPIO | GPIO_IN,			/* OCT_DET */
+	GPK13_GPIO | GPIO_IN,			/* WIFI power (external PU) */
+	GPK14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK15_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPL0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL2_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL4_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL5_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL6_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL7_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL8_GPIO | GPIO_IN,			/* EINT16 (external PU) */
+	GPL9_GPIO | GPIO_IN | ENABLE_PU,	/* EINT17 */
+	GPL10_GPIO | GPIO_IN | ENABLE_PU,	/* EINT18 */
+	GPL11_GPIO | GPIO_IN,			/* EINT19 + K7 (external PU) */
+	GPL12_GPIO | GPIO_IN,			/* EINT20 + K6 (external PU) */
+	GPL13_GPIO | GPIO_IN,			/* SD0 WP (external PU) */
+	GPL14_GPIO | GPIO_IN,			/* SD1 WP (external PU) */
+
+	GPM0_GPIO | GPIO_IN,			/* (external PU) */
+	GPM1_GPIO | GPIO_IN,			/* (external PU) */
+	GPM2_GPIO | GPIO_IN,			/* (external PU) */
+	GPM3_GPIO | GPIO_IN,			/* (external PU) */
+	GPM4_GPIO | GPIO_IN,			/* (external PU) */
+	GPM5_GPIO | GPIO_IN,			/* (external PU) */
+
+	GPN0_GPIO | GPIO_IN,			/* EINT0 (external PU) */
+	GPN1_GPIO | GPIO_IN,			/* EINT1 (external PU) */
+	GPN2_GPIO | GPIO_IN,			/* EINT2 (external PU) */
+	GPN3_GPIO | GPIO_IN,			/* EINT3 (external PU) */
+	GPN4_GPIO | GPIO_IN,			/* EINT4 (external PU) */
+	GPN5_GPIO | GPIO_IN,			/* EINT5 (external PU) */
+	GPN6_GPIO | GPIO_IN,			/* EINT6 (external PU) */
+	GPN7_GPIO | GPIO_IN | ENABLE_PU,	/* EINT7 DM9000 interrupt */
+	GPN8_GPIO | GPIO_IN,			/* EINT8 USB detect (external PU) */
+	GPN9_GPIO | GPIO_IN,			/* EINT9 (external PU) */
+	GPN10_GPIO | GPIO_IN,			/* SD1 CD (external PU) */
+	GPN11_GPIO | GPIO_IN,			/* EINT11 (external PU) */
+	GPN12_GPIO | GPIO_IN,			/* EINT12 IR in (external PU) */
+	GPN13_GPIO | GPIO_IN,			/* BOOT0/EINT13 (externally fixed) */
+	GPN14_GPIO | GPIO_IN,			/* BOOT1/EINT14 (externally fixed) */
+	GPN15_GPIO | GPIO_IN,			/* BOOT2/EINT15 (externally fixed) */
+
+	GPO0_NCS2,				/* NAND */
+	GPO1_NCS3,				/* NAND */
+	GPO2_NCS4,				/* CON5 */
+	GPO3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO4_GPIO | GPIO_IN | ENABLE_PU,	/* CON5 pin 8 */
+	GPO5_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO6_ADDR6,				/* CON5 */
+	GPO7_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO8_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO10_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO11_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO12_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO13_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO15_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPP0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP2_NWAIT | ENABLE_PU,			/* CON5 */
+	GPP3_FALE,				/* NAND */
+	GPP4_FCLE,				/* NAND */
+	GPP5_FWE,				/* NAND */
+	GPP6_FRE,				/* NAND */
+	GPP7_RNB,				/* NAND (external PU) */
+	GPP8_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP10_GPIO | GPIO_IN,			/* (external PU) */
+	GPP11_GPIO | GPIO_IN,			/* (external PU) */
+	GPP12_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP13_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPQ0_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR18 */
+	GPQ1_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ2_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ3_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ4_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ5_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ6_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ7_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR17 */
+	GPQ8_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR16 */
+};
+
+static int mini6410_mem_init(void)
+{
+	arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c6410_get_memory_size());
+
+	return 0;
+}
+mem_initcall(mini6410_mem_init);
+
+static const struct s3c6410_chipselect dm900_cs = {
+	.adr_setup_t = 0,
+	.access_setup_t = 0,
+	.access_t = 20,
+	.cs_hold_t = 3,
+	.adr_hold_t = 20, /* CS must be de-asserted for at least 20 ns */
+	.width = 16,
+};
+
+static void mini6410_setup_dm9000_cs(void)
+{
+	s3c6410_setup_chipselect(1, &dm900_cs);
+}
+
+static int mini6410_devices_init(void)
+{
+	int i;
+
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
+		s3c_gpio_mode(pin_usage[i]);
+
+	mini6410_setup_dm9000_cs();
+	add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
+				IORESOURCE_MEM_16BIT, &dm9000_data);
+
+	armlinux_set_bootparams((void *)S3C_SDRAM_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_MINI6410);
+
+	return 0;
+}
+
+device_initcall(mini6410_devices_init);
+
+static int mini6410_console_init(void)
+{
+	/*
+	 * configure the UART1 right now, as barebox will
+	 * start to send data immediately
+	 */
+	s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU);
+	s3c_gpio_mode(GPA1_TXD0);
+	s3c_gpio_mode(GPA2_NCTS0 | ENABLE_PU);
+	s3c_gpio_mode(GPA3_NRTS0);
+
+	add_generic_device("s3c_serial", -1, NULL, S3C_UART1_BASE,
+				S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+
+	return 0;
+}
+
+console_initcall(mini6410_console_init);
diff --git a/arch/arm/configs/mini6410_defconfig b/arch/arm/configs/mini6410_defconfig
new file mode 100644
index 0000000..61872c8
--- /dev/null
+++ b/arch/arm/configs/mini6410_defconfig
@@ -0,0 +1,40 @@
+CONFIG_ARCH_S3C64xx=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_BROKEN=y
+CONFIG_PROMPT="mini6410:"
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_PARTITION_DISK=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mini6410/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_DRIVER_NET_DM9K=y
+# CONFIG_SPI is not set
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 8acb7c9..746c029 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -6,12 +6,14 @@ if ARCH_SAMSUNG
 config ARCH_TEXT_BASE
 	hex
 	default 0x31fc0000 if MACH_MINI2440
+	default 0x57fc0000 if MACH_MINI6410
 	default 0x31fc0000 if MACH_A9M2440
 	default 0x31fc0000 if MACH_A9M2410
 	default 0x23e00000 if MACH_TINY210
 
 config BOARDINFO
 	default "Mini 2440"    if MACH_MINI2440
+	default "Mini 6410"    if MACH_MINI6410
 	default "Digi A9M2440" if MACH_A9M2440
 	default "Digi A9M2410" if MACH_A9M2410
 	default "Tiny 210"     if MACH_TINY210
@@ -101,10 +103,20 @@ choice
 
 	prompt "S3C64xx Board Type"
 
+config MACH_MINI6410
+	bool "Mini 6410"
+	select CPU_S3C6410
+	select HAS_DM9000
+	help
+	  Say Y here if you are using FriendlyARM Mini6410 board equipped
+	  with a Samsung S3C6410 Processor
+
 endchoice
 
 menu "Board specific settings       "
 
+source arch/arm/boards/mini6410/Kconfig
+
 endmenu
 
 endif
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 13 15:01:07 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 13 Jul 2012 21:01:07 +0200
Subject: [PATCH 15/18] ARM/Samsung: add GPIO handling support for the S3C6410
 SoC
In-Reply-To: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342206070-29698-16-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    2 +-
 arch/arm/mach-samsung/gpio-s3c64xx.c               |  301 ++++++++++++
 arch/arm/mach-samsung/include/mach/gpio.h          |    3 +
 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h |  497 ++++++++++++++++++++
 4 files changed, 802 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-samsung/gpio-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index d27496d..5187170 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -3,6 +3,6 @@ obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S3C64xx) += lowlevel-s3c64x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S3C64xx) += clocks-s3c64xx.o
+obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o mem-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/gpio-s3c64xx.c b/arch/arm/mach-samsung/gpio-s3c64xx.c
new file mode 100644
index 0000000..bb3ac52
--- /dev/null
+++ b/arch/arm/mach-samsung/gpio-s3c64xx.c
@@ -0,0 +1,301 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This codes bases partially on code from the Linux kernel:
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *	http://armlinux.simtec.co.uk/
+ *	Ben Dooks <ben at simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <io.h>
+#include <gpio.h>
+#include <mach/s3c-iomap.h>
+
+#define S3C_GPACON (S3C_GPIO_BASE)
+#define S3C_GPADAT (S3C_GPIO_BASE + 0x04)
+#define S3C_GPAPUD (S3C_GPIO_BASE + 0x08)
+
+static const unsigned short group_offset[] = {
+	0x000,	/* GPA */ /* 8 pins, 4 bit each */
+	0x020,	/* GPB */ /* 7 pins, 4 bit each */
+	0x040,	/* GPC */ /* 8 pins, 4 bit each */
+	0x060,	/* GPD */ /* 5 pins, 4 bit each */
+	0x080,	/* GPE */ /* 5 pins, 4 bit each */
+	0x0a0,	/* GPF */ /* 16 pins, 2 bit each */
+	0x0c0,	/* GPG */ /* 7 pins, 4 bit each */
+	0x0e0,	/* GPH */ /* two registers, 8 + 2 pins, 4 bit each */
+	0x100,	/* GPI */ /* 16 pins, 2 bit each */
+	0x120,	/* GPJ */ /* 12 pins, 2 bit each */
+	0x800,	/* GPK */ /* two registers, 8 + 8 pins, 4 bit each */
+	0x810,	/* GPL */ /* two registers, 8 + 8 pins, 4 bit each */
+	0x820,	/* GPM */ /* 6 pins, 4 bit each */
+	0x830,	/* GPN */ /* 16 pins, 2 bit each */
+	0x140,	/* GPO */ /* 16 pins, 2 bit each */
+	0x160,	/* GPP */ /* 15 pins, 2 bit each */
+	0x180,	/* GPQ */ /* 9 pins, 2 bit each */
+};
+
+void gpio_set_value(unsigned gpio, int value)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+	uint32_t reg;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		offset += 4;
+		break;
+	}
+
+	reg = readl(S3C_GPADAT + offset);
+	reg &= ~(1 << bit);
+	reg |= (!!value) << bit;
+	writel(reg, S3C_GPADAT + offset);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+	uint32_t reg;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		offset += 4;
+		break;
+	}
+
+	/* value */
+	reg = readl(S3C_GPADAT + offset);
+
+	return !!(reg & (1 << bit));
+}
+
+static void gpio_direction_input_4b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	if (bit > 31) {
+		offset += 4;
+		bit -= 32;
+	}
+
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	writel(reg, S3C_GPACON + offset); /* b0000 means 'GPIO input' */
+}
+
+static void gpio_direction_input_2b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	writel(reg, S3C_GPACON + offset); /* b00 means 'GPIO input' */
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		gpio_direction_input_2b(offset, bit << 1);
+		break;
+	default:
+		gpio_direction_input_4b(offset, bit << 2);
+	}
+
+	return 0;
+}
+
+static void gpio_direction_output_4b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	if (bit > 31) {
+		offset += 4;
+		bit -= 32;
+	}
+
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	reg |= 0x1 << bit;
+	writel(reg, S3C_GPACON + offset); /* b0001 means 'GPIO output' */
+}
+
+static void gpio_direction_output_2b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	/* direction */
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	reg |= 0x1 << bit;
+	writel(reg, S3C_GPACON + offset);
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+
+	gpio_set_value(gpio, value);
+
+	offset = group_offset[group];
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		gpio_direction_output_2b(offset, bit << 1);
+		break;
+	default:
+		gpio_direction_output_4b(offset, bit << 2);
+	}
+
+	return 0;
+}
+
+/* one register, 2 bits per function -> GPF, GPI, GPJ, GPN, GPO, GPP, GPQ */
+static void s3c_d2pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	unsigned reg;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + offset);
+		reg &= ~(PUD_MASK << bit);
+		reg |= GET_PUD(pin_mode) << bit;
+		writel(reg, S3C_GPAPUD + offset);
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + offset) & ~(1 << (bit >> 1));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPADAT + offset);
+	}
+}
+
+/* one register, 4 bits per function -> GPA, GPB, GPC, GPD, GPE, GPG, GPM */
+static void s3c_d4pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	unsigned reg;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + offset);
+		reg &= ~(PUD_MASK << (bit >> 1));
+		reg |= GET_PUD(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPAPUD + offset);
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + offset) & ~(1 << (bit >> 2));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 2);
+		writel(reg, S3C_GPADAT + offset);
+	}
+}
+
+/* two registers, 4 bits per pin -> GPH, GPK, GPL */
+static void s3c_d42pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	uint32_t reg;
+	unsigned reg_offs = 0;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + 4 + offset);
+		reg &= ~(PUD_MASK << (bit >> 1));
+		reg |= GET_PUD(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPACON + 4 + offset);
+	}
+
+	if (bit > 31) {
+		reg_offs = 4;
+		bit -= 32;
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset + reg_offs) & ~(0xf << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset + reg_offs);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + 4 + offset) & ~(1 << (bit >> 2));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 2);
+		writel(reg, S3C_GPADAT + 4 + offset);
+	}
+}
+
+/* 'gpio_mode' must be one of the 'GP?_*' macros */
+void s3c_gpio_mode(unsigned gpio_mode)
+{
+	unsigned group, offset;
+
+	group = GET_GROUP(gpio_mode);
+	offset = group_offset[group];
+
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		s3c_d2pins(offset, gpio_mode);
+		break;
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		s3c_d42pins(offset, gpio_mode);
+		break;
+	default:
+		s3c_d4pins(offset, gpio_mode);
+	}
+}
diff --git a/arch/arm/mach-samsung/include/mach/gpio.h b/arch/arm/mach-samsung/include/mach/gpio.h
index 4d7d217..2b45695 100644
--- a/arch/arm/mach-samsung/include/mach/gpio.h
+++ b/arch/arm/mach-samsung/include/mach/gpio.h
@@ -16,6 +16,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/iomux-s3c24x0.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/iomux-s3c64xx.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/iomux-s5pcxx.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h b/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h
new file mode 100644
index 0000000..7932740
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h
@@ -0,0 +1,497 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_IOMUX_S3C64XX_H
+# define __MACH_IOMUX_S3C64XX_H
+
+/* 3322222222221111111111
+ * 10987654321098765432109876543210
+ *                           ^^^^^^_ Bit offset
+ *                      ^^^^^_______ Group Number
+ *                  ^^^^____________ Function
+ *                 ^________________ initial GPIO out value
+ *                ^_________________ Pull up/down feature present
+ *              ^^__________________ initial pull up/down setting
+ */
+
+#define PIN(group,bit) ((group << 6) + bit)
+#define FUNC(x) (((x) & 0xf) << 11)
+#define GET_FUNC(x) (((x) >> 11) & 0xf)
+#define GET_GROUP(x) (((x) >> 6) & 0x1f)
+#define GET_BIT(x) ((x) & 0x3f)
+#define GET_GPIOVAL(x) (!!((x) & (1 << 15)))
+#define GPIO_OUT (1 << 11)
+#define GPIO_IN (0 << 11)
+#define GPIO_VAL(x) ((!!(x)) << 15)
+#define PUD_MASK 0x3
+#define PUD (1 << 16)
+#define PUD_PRESENT(x) (!!((x) & (1 << 16)))
+#define DISABLE_PUD (0 << 17)
+#define ENABLE_PU (2 << 17)
+#define ENABLE_PD (1 << 17)
+#define GET_PUD(x) (((x) >> 17) & PUD_MASK)
+
+/*
+ * To have a chance for simple GPIO manipulation routines
+ * define the GPIO numbers with a real simple scheme.
+ *
+ * Keep in mind: The 'GPIO_2_NO' creates a value to be used with the real gpio
+ * routines and *not* for the multiplexer routines!
+ */
+#define GPIO_2_NO(x,y) (PIN(x,y))
+
+/*
+ * Group A: GPIO 0...7
+ * Used GPIO: 0...7
+ * These pins can also act as GPIO outputs
+ */
+#define GPA0		(PIN(0,0) | PUD)
+#define GPA0_GPIO	(GPA0 | FUNC(0))
+#define GPA0_RXD0	(GPA0 | FUNC(2))
+#define GPA1		(PIN(0,4) | PUD)
+#define GPA1_GPIO	(GPA1 | FUNC(0))
+#define GPA1_TXD0	(GPA1 | FUNC(2))
+#define GPA2		(PIN(0,8) | PUD)
+#define GPA2_GPIO	(GPA2 | FUNC(0))
+#define GPA2_NCTS0	(GPA2 | FUNC(2))
+#define GPA3		(PIN(0,12) | PUD)
+#define GPA3_GPIO	(GPA3 | FUNC(0))
+#define GPA3_NRTS0	(GPA3 | FUNC(2))
+#define GPA4		(PIN(0,16) | PUD)
+#define GPA4_GPIO	(GPA4 | FUNC(0))
+#define GPA4_RXD1	(GPA4 | FUNC(2))
+#define GPA5		(PIN(0,20) | PUD)
+#define GPA5_GPIO	(GPA5 | FUNC(0))
+#define GPA5_TXD1	(GPA5 | FUNC(2))
+#define GPA6		(PIN(0,24) | PUD)
+#define GPA6_GPIO	(GPA6 | FUNC(0))
+#define GPA6_NCTS1	(GPA6 | FUNC(2))
+#define GPA7		(PIN(0,28) | PUD)
+#define GPA7_GPIO	(GPA7 | FUNC(0))
+#define GPA7_NRTS1	(GPA7 | FUNC(2))
+
+/*
+ * Group B: GPIO 0...7
+ * Used GPIO: 8...15
+ * These pins can also act as GPIO outputs
+ */
+#define GPB0		(PIN(1,0) | PUD)
+#define GPB0_GPIO	(GPB0 | FUNC(0))
+#define GPB0_RXD2	(GPB0 | FUNC(2))
+#define GPB0_DMAREQ	(GPB0 | FUNC(3))
+#define GPB0_IRDA_RXD	(GPB0 | FUNC(4))
+#define GPB0_ADDR_CF0	(GPB0 | FUNC(5))
+#define GPB1		(PIN(1,4) | PUD)
+#define GPB1_GPIO	(GPB1 | FUNC(0))
+#define GPB1_TXD2	(GPB1 | FUNC(2))
+#define GPB1_DMAREQ	(GPB1 | FUNC(3))
+#define GPB1_IRDA_TXD	(GPB1 | FUNC(4))
+#define GPB1_ADDR_CF1	(GPB1 | FUNC(5))
+#define GPB2		(PIN(1,8) | PUD)
+#define GPB2_GPIO	(GPB2 | FUNC(0))
+#define GPB2_RXD3	(GPB2 | FUNC(2))
+#define GPB2_IRDA_RXD	(GPB2 | FUNC(3))
+#define GPB2_DMAREQ	(GPB2 | FUNC(4))
+#define GPB2_ADDR_CF2	(GPB2 | FUNC(5))
+#define GPB2_IIC1_SCL	(GPB2 | FUNC(6))
+#define GPB3		(PIN(1,12) | PUD)
+#define GPB3_GPIO	(GPB3 | FUNC(0))
+#define GPB3_TXD3	(GPB3 | FUNC(2))
+#define GPB3_IRDA_TXD	(GPB3 | FUNC(3))
+#define GPB3_DMAREQ	(GPB3 | FUNC(4))
+#define GPB3_IIC1_SDA	(GPB3 | FUNC(6))
+#define GPB4		(PIN(1,16) | PUD)
+#define GPB4_GPIO	(GPB4 | FUNC(0))
+#define GPB4_SDBW	(GPB4 | FUNC(2))
+#define GPB4_CAM_FLD	(GPB4 | FUNC(3))
+#define GPB4_CF_DIR	(GPB4 | FUNC(4))
+#define GPB5		(PIN(1,20) | PUD)
+#define GPB5_GPIO	(GPB5 | FUNC(0))
+#define GPB5_IIC0_SCL	(GPB5 | FUNC(2))
+#define GPB6		(PIN(1,24) | PUD)
+#define GPB6_GPIO	(GPB6 | FUNC(0))
+#define GPB6_IIC0_SDA	(GPB6 | FUNC(2))
+
+#define GPC0		(PIN(2,0) | PUD)
+#define GPC0_SPI0_MISO	(GPC0 | FUNC(2))
+#define GPC1		(PIN(2,4) | PUD)
+#define GPC1_SPI0_CLK	(GPC1 | FUNC(2))
+#define GPC2		(PIN(2,8) | PUD)
+#define GPC2_SPI0_MOSI	(GPC2 | FUNC(2))
+#define GPC3		(PIN(2,12) | PUD)
+#define GPC3_SPI0_NCS	(GPC3 | FUNC(2))
+#define GPC4		(PIN(2,16) | PUD)
+#define GPC4_SPI1_MISO	(GPC4 | FUNC(2))
+#define GPC5		(PIN(2,20) | PUD)
+#define GPC5_SPI1_CLK	(GPC5 | FUNC(2))
+#define GPC6		(PIN(2,24) | PUD)
+#define GPC6_SPI1_MOSI	(GPC6 | FUNC(2))
+#define GPC7		(PIN(2,28) | PUD)
+#define GPC7_SPI1_NCS	(GPC7 | FUNC(2))
+
+#define GPD0		(PIN(3,0) | PUD)
+#define GPD0_AC97_BITCLK (GPD0 | FUNC(4))
+#define GPD1		(PIN(3,4) | PUD)
+#define GPD1_AC97_NRST	(GPD1 | FUNC(4))
+#define GPD2		(PIN(3,8) | PUD)
+#define GPD2_AC97_SYNC	(GPD2 | FUNC(4))
+#define GPD3		(PIN(3,12) | PUD)
+#define GPD3_AC97_SDI	(GPD3 | FUNC(4))
+#define GPD4		(PIN(3,16) | PUD)
+#define GPD4_AC97_SDO	(GPD4 | FUNC(4))
+
+#define GPE0		(PIN(4,0) | PUD)
+#define GPE0_GPIO	(GPE0 | FUNC(0))
+#define GPE1		(PIN(4,4) | PUD)
+#define GPE1_GPIO	(GPE1 | FUNC(0))
+#define GPE2		(PIN(4,8) | PUD)
+#define GPE2_GPIO	(GPE2 | FUNC(0))
+#define GPE3		(PIN(4,12) | PUD)
+#define GPE3_GPIO	(GPE3 | FUNC(0))
+#define GPE4		(PIN(4,16) | PUD)
+#define GPE4_GPIO	(GPE4 | FUNC(0))
+
+#define GPF0		(PIN(5,0) | PUD)
+#define GPF0_GPIO	(GPF0 | FUNC(0))
+#define GPF1		(PIN(5,2) | PUD)
+#define GPF1_GPIO	(GPF1 | FUNC(0))
+#define GPF2		(PIN(5,4) | PUD)
+#define GPF2_GPIO	(GPF2 | FUNC(0))
+#define GPF3		(PIN(5,6) | PUD)
+#define GPF3_GPIO	(GPF3 | FUNC(0))
+#define GPF4		(PIN(5,8) | PUD)
+#define GPF4_GPIO	(GPF4 | FUNC(0))
+#define GPF5		(PIN(5,10) | PUD)
+#define GPF5_GPIO	(GPF5 | FUNC(0))
+#define GPF6		(PIN(5,12) | PUD)
+#define GPF6_GPIO	(GPF6 | FUNC(0))
+#define GPF7		(PIN(5,14) | PUD)
+#define GPF7_GPIO	(GPF7 | FUNC(0))
+#define GPF8		(PIN(5,16) | PUD)
+#define GPF8_GPIO	(GPF8 | FUNC(0))
+#define GPF9		(PIN(5,18) | PUD)
+#define GPF9_GPIO	(GPF9 | FUNC(0))
+#define GPF10		(PIN(5,20) | PUD)
+#define GPF10_GPIO	(GPF10 | FUNC(0))
+#define GPF11		(PIN(5,22) | PUD)
+#define GPF11_GPIO	(GPF11 | FUNC(0))
+#define GPF12		(PIN(5,24) | PUD)
+#define GPF12_GPIO	(GPF12 | FUNC(0))
+#define GPF13		(PIN(5,26) | PUD)
+#define GPF13_GPIO	(GPF13 | FUNC(0))
+#define GPF14		(PIN(5,28) | PUD)
+#define GPF14_GPIO	(GPF14 | FUNC(0))
+#define GPF14_PWM0	(GPF14 | FUNC(2))
+#define GPF15		(PIN(5,30) | PUD)
+#define GPF15_GPIO	(GPF15 | FUNC(0))
+#define GPF15_PWM1	(GPF15 | FUNC(2))
+
+#define GPG0		(PIN(6,0) | PUD)
+#define GPG0_MMC0_CLK	(GPG0 | FUNC(2))
+#define GPG1		(PIN(6,4) | PUD)
+#define GPG1_MMC0_CMD	(GPG1 | FUNC(2))
+#define GPG2		(PIN(6,8) | PUD)
+#define GPG2_MMC0_DAT0	(GPG2 | FUNC(2))
+#define GPG3		(PIN(6,12) | PUD)
+#define GPG3_MMC0_DAT1	(GPG3 | FUNC(2))
+#define GPG4		(PIN(6,16) | PUD)
+#define GPG4_MMC0_DAT2	(GPG4 | FUNC(2))
+#define GPG5		(PIN(6,20) | PUD)
+#define GPG5_MMC0_DAT3	(GPG5 | FUNC(2))
+#define GPG6		(PIN(6,24) | PUD)
+#define GPG6_MMC0_NCD	(GPG6 | FUNC(2))
+
+#define GPH0		(PIN(7,0) | PUD)
+#define GPH0_GPIO	(GPH0 | FUNC(0))
+#define GPH1		(PIN(7,4) | PUD)
+#define GPH1_GPIO	(GPH1 | FUNC(0))
+#define GPH2		(PIN(7,8) | PUD)
+#define GPH2_GPIO	(GPH2 | FUNC(0))
+#define GPH3		(PIN(7,12) | PUD)
+#define GPH3_GPIO	(GPH3 | FUNC(0))
+#define GPH4		(PIN(7,16) | PUD)
+#define GPH4_GPIO	(GPH4 | FUNC(0))
+#define GPH5		(PIN(7,20) | PUD)
+#define GPH5_GPIO	(GPH5 | FUNC(0))
+#define GPH6		(PIN(7,24) | PUD)
+#define GPH6_GPIO	(GPH6 | FUNC(0))
+#define GPH7		(PIN(7,28) | PUD)
+#define GPH7_GPIO	(GPH7 | FUNC(0))
+#define GPH8		(PIN(7,32) | PUD)
+#define GPH8_GPIO	(GPH8 | FUNC(0))
+#define GPH9		(PIN(7,36) | PUD)
+#define GPH9_GPIO	(GPH9 | FUNC(0))
+
+#define GPI0		(PIN(8,0) | PUD)
+#define GPI0_GPIO	(GPI0 | FUNC(0))
+#define GPI1		(PIN(8,2) | PUD)
+#define GPI1_GPIO	(GPI1 | FUNC(0))
+#define GPI2		(PIN(8,4) | PUD)
+#define GPI2_GPIO	(GPI2 | FUNC(0))
+#define GPI3		(PIN(8,6) | PUD)
+#define GPI3_GPIO	(GPI3 | FUNC(0))
+#define GPI4		(PIN(8,8) | PUD)
+#define GPI4_GPIO	(GPI4 | FUNC(0))
+#define GPI5		(PIN(8,10) | PUD)
+#define GPI5_GPIO	(GPI5 | FUNC(0))
+#define GPI6		(PIN(8,12) | PUD)
+#define GPI6_GPIO	(GPI6 | FUNC(0))
+#define GPI7		(PIN(8,14) | PUD)
+#define GPI7_GPIO	(GPI7 | FUNC(0))
+#define GPI8		(PIN(8,16) | PUD)
+#define GPI8_GPIO	(GPI8 | FUNC(0))
+#define GPI9		(PIN(8,18) | PUD)
+#define GPI9_GPIO	(GPI9 | FUNC(0))
+#define GPI10		(PIN(8,20) | PUD)
+#define GPI10_GPIO	(GPI10 | FUNC(0))
+#define GPI11		(PIN(8,22) | PUD)
+#define GPI11_GPIO	(GPI11 | FUNC(0))
+#define GPI12		(PIN(8,24) | PUD)
+#define GPI12_GPIO	(GPI12 | FUNC(0))
+#define GPI13		(PIN(8,26) | PUD)
+#define GPI13_GPIO	(GPI13 | FUNC(0))
+#define GPI14		(PIN(8,28) | PUD)
+#define GPI14_GPIO	(GPI14 | FUNC(0))
+#define GPI15		(PIN(8,30) | PUD)
+#define GPI15_GPIO	(GPI15 | FUNC(0))
+
+#define GPJ0		(PIN(9,0) | PUD)
+#define GPJ0_GPIO	(GPJ0 | FUNC(0))
+#define GPJ1		(PIN(9,2) | PUD)
+#define GPJ1_GPIO	(GPJ1 | FUNC(0))
+#define GPJ2		(PIN(9,4) | PUD)
+#define GPJ2_GPIO	(GPJ2 | FUNC(0))
+#define GPJ3		(PIN(9,6) | PUD)
+#define GPJ3_GPIO	(GPJ3 | FUNC(0))
+#define GPJ4		(PIN(9,8) | PUD)
+#define GPJ4_GPIO	(GPJ4 | FUNC(0))
+#define GPJ5		(PIN(9,10) | PUD)
+#define GPJ5_GPIO	(GPJ5 | FUNC(0))
+#define GPJ6		(PIN(9,12) | PUD)
+#define GPJ6_GPIO	(GPJ6 | FUNC(0))
+#define GPJ7		(PIN(9,14) | PUD)
+#define GPJ7_GPIO	(GPJ7 | FUNC(0))
+#define GPJ8		(PIN(9,16) | PUD)
+#define GPJ8_GPIO	(GPJ8 | FUNC(0))
+#define GPJ9		(PIN(9,18) | PUD)
+#define GPJ9_GPIO	(GPJ9 | FUNC(0))
+#define GPJ10		(PIN(9,20) | PUD)
+#define GPJ10_GPIO	(GPJ10 | FUNC(0))
+#define GPJ11		(PIN(9,22) | PUD)
+#define GPJ11_GPIO	(GPJ11 | FUNC(0))
+
+#define GPK0		(PIN(10,0) | PUD)
+#define GPK0_GPIO	(GPK0 | FUNC(0))
+#define GPK1		(PIN(10,4) | PUD)
+#define GPK1_GPIO	(GPK1 | FUNC(0))
+#define GPK2		(PIN(10,8) | PUD)
+#define GPK2_GPIO	(GPK2 | FUNC(0))
+#define GPK3		(PIN(10,12) | PUD)
+#define GPK3_GPIO	(GPK3 | FUNC(0))
+#define GPK4		(PIN(10,16) | PUD)
+#define GPK4_GPIO	(GPK4 | FUNC(0))
+#define GPK5		(PIN(10,20) | PUD)
+#define GPK5_GPIO	(GPK5 | FUNC(0))
+#define GPK6		(PIN(10,24) | PUD)
+#define GPK6_GPIO	(GPK6 | FUNC(0))
+#define GPK7		(PIN(10,28) | PUD)
+#define GPK7_GPIO	(GPK7 | FUNC(0))
+#define GPK8		(PIN(10,32) | PUD)
+#define GPK8_GPIO	(GPK8 | FUNC(0))
+#define GPK9		(PIN(10,36) | PUD)
+#define GPK9_GPIO	(GPK9 | FUNC(0))
+#define GPK10		(PIN(10,40) | PUD)
+#define GPK10_GPIO	(GPK10 | FUNC(0))
+#define GPK11		(PIN(10,44) | PUD)
+#define GPK11_GPIO	(GPK11 | FUNC(0))
+#define GPK12		(PIN(10,48) | PUD)
+#define GPK12_GPIO	(GPK12 | FUNC(0))
+#define GPK13		(PIN(10,52) | PUD)
+#define GPK13_GPIO	(GPK13 | FUNC(0))
+#define GPK14		(PIN(10,56) | PUD)
+#define GPK14_GPIO	(GPK14 | FUNC(0))
+#define GPK15		(PIN(10,60) | PUD)
+#define GPK15_GPIO	(GPK15 | FUNC(0))
+
+#define GPL0		(PIN(11,0) | PUD)
+#define GPL0_GPIO	(GPL0 | FUNC(0))
+#define GPL1		(PIN(11,4) | PUD)
+#define GPL1_GPIO	(GPL1 | FUNC(0))
+#define GPL2		(PIN(11,8) | PUD)
+#define GPL2_GPIO	(GPL2 | FUNC(0))
+#define GPL3		(PIN(11,12) | PUD)
+#define GPL3_GPIO	(GPL3 | FUNC(0))
+#define GPL4		(PIN(11,16) | PUD)
+#define GPL4_GPIO	(GPL4 | FUNC(0))
+#define GPL5		(PIN(11,20) | PUD)
+#define GPL5_GPIO	(GPL5 | FUNC(0))
+#define GPL6		(PIN(11,24) | PUD)
+#define GPL6_GPIO	(GPL6 | FUNC(0))
+#define GPL7		(PIN(11,28) | PUD)
+#define GPL7_GPIO	(GPL7 | FUNC(0))
+#define GPL8		(PIN(11,32) | PUD)
+#define GPL8_GPIO	(GPL8 | FUNC(0))
+#define GPL9		(PIN(11,36) | PUD)
+#define GPL9_GPIO	(GPL9 | FUNC(0))
+#define GPL10		(PIN(11,40) | PUD)
+#define GPL10_GPIO	(GPL10 | FUNC(0))
+#define GPL11		(PIN(11,44) | PUD)
+#define GPL11_GPIO	(GPL11 | FUNC(0))
+#define GPL12		(PIN(11,48) | PUD)
+#define GPL12_GPIO	(GPL12 | FUNC(0))
+#define GPL13		(PIN(11,52) | PUD)
+#define GPL13_GPIO	(GPL13 | FUNC(0))
+#define GPL14		(PIN(11,65) | PUD)
+#define GPL14_GPIO	(GPL14 | FUNC(0))
+
+#define GPM0		(PIN(12,0) | PUD)
+#define GPM0_GPIO	(GPM0 | FUNC(0))
+#define GPM1		(PIN(12,4) | PUD)
+#define GPM1_GPIO	(GPM1 | FUNC(0))
+#define GPM2		(PIN(12,8) | PUD)
+#define GPM2_GPIO	(GPM2 | FUNC(0))
+#define GPM3		(PIN(12,12) | PUD)
+#define GPM3_GPIO	(GPM3 | FUNC(0))
+#define GPM4		(PIN(12,16) | PUD)
+#define GPM4_GPIO	(GPM4 | FUNC(0))
+#define GPM5		(PIN(12,20) | PUD)
+#define GPM5_GPIO	(GPM5 | FUNC(0))
+
+#define GPN0		(PIN(13,0) | PUD)
+#define GPN0_GPIO	(GPN0 | FUNC(0))
+#define GPN1		(PIN(13,0) | PUD)
+#define GPN1_GPIO	(GPN1 | FUNC(0))
+#define GPN2		(PIN(13,0) | PUD)
+#define GPN2_GPIO	(GPN2 | FUNC(0))
+#define GPN3		(PIN(13,0) | PUD)
+#define GPN3_GPIO	(GPN3 | FUNC(0))
+#define GPN4		(PIN(13,0) | PUD)
+#define GPN4_GPIO	(GPN4 | FUNC(0))
+#define GPN5		(PIN(13,0) | PUD)
+#define GPN5_GPIO	(GPN5 | FUNC(0))
+#define GPN6		(PIN(13,0) | PUD)
+#define GPN6_GPIO	(GPN6 | FUNC(0))
+#define GPN7		(PIN(13,0) | PUD)
+#define GPN7_GPIO	(GPN7 | FUNC(0))
+#define GPN8		(PIN(13,0) | PUD)
+#define GPN8_GPIO	(GPN8 | FUNC(0))
+#define GPN9		(PIN(13,0) | PUD)
+#define GPN9_GPIO	(GPN9 | FUNC(0))
+#define GPN10		(PIN(13,20) | PUD)
+#define GPN10_GPIO	(GPN10 | FUNC(0))
+#define GPN11		(PIN(13,20) | PUD)
+#define GPN11_GPIO	(GPN11 | FUNC(0))
+#define GPN12		(PIN(13,20) | PUD)
+#define GPN12_GPIO	(GPN12 | FUNC(0))
+#define GPN13		(PIN(13,20) | PUD)
+#define GPN13_GPIO	(GPN13 | FUNC(0))
+#define GPN14		(PIN(13,20) | PUD)
+#define GPN14_GPIO	(GPN14 | FUNC(0))
+#define GPN15		(PIN(13,20) | PUD)
+#define GPN15_GPIO	(GPN15 | FUNC(0))
+
+#define GPO0		(PIN(14,0) | PUD)
+#define GPO0_NCS2	(GPO0 | FUNC(2))
+#define GPO1		(PIN(14,2) | PUD)
+#define GPO1_NCS3	(GPO1 | FUNC(2))
+#define GPO2		(PIN(14,4) | PUD)
+#define GPO2_NCS4	(GPO2 | FUNC(2))
+#define GPO3		(PIN(14,6) | PUD)
+#define GPO3_GPIO	(GPO3 | FUNC(0))
+#define GPO4		(PIN(14,8) | PUD)
+#define GPO4_GPIO	(GPO4 | FUNC(0))
+#define GPO5		(PIN(14,10) | PUD)
+#define GPO5_GPIO	(GPO5 | FUNC(0))
+#define GPO6		(PIN(14,12) | PUD)
+#define GPO6_ADDR6	(GPO6 | FUNC(2))
+#define GPO7		(PIN(14,14) | PUD)
+#define GPO7_GPIO	(GPO7 | FUNC(0))
+#define GPO7_ADDR7	(GPO7 | FUNC(2))
+#define GPO8		(PIN(14,16) | PUD)
+#define GPO8_GPIO	(GPO8 | FUNC(0))
+#define GPO8_ADDR8	(GPO8 | FUNC(2))
+#define GPO9		(PIN(14,18) | PUD)
+#define GPO9_GPIO	(GPO9 | FUNC(0))
+#define GPO9_ADDR9	(GPO9 | FUNC(2))
+#define GPO10		(PIN(14,20) | PUD)
+#define GPO10_GPIO	(GPO10 | FUNC(2))
+#define GPO10_ADDR10	(GPO10 | FUNC(2))
+#define GPO11		(PIN(14,22) | PUD)
+#define GPO11_GPIO	(GPO11 | FUNC(0))
+#define GPO11_ADDR11	(GPO11 | FUNC(2))
+#define GPO12		(PIN(14,24) | PUD)
+#define GPO12_GPIO	(GPO12 | FUNC(0))
+#define GPO12_ADDR12	(GPO12 | FUNC(2))
+#define GPO13		(PIN(14,26) | PUD)
+#define GPO13_GPIO	(GPO13 | FUNC(0))
+#define GPO13_ADDR13	(GPO13 | FUNC(2))
+#define GPO14		(PIN(14,28) | PUD)
+#define GPO14_GPIO	(GPO14 | FUNC(0))
+#define GPO14_ADDR14	(GPO14 | FUNC(2))
+#define GPO15		(PIN(14,30) | PUD)
+#define GPO15_GPIO	(GPO15 | FUNC(0))
+#define GPO15_ADDR15	(GPO15 | FUNC(2))
+
+#define GPP0		(PIN(15,0) | PUD)
+#define GPP0_GPIO	(GPP0 | FUNC(0))
+#define GPP1		(PIN(15,2) | PUD)
+#define GPP1_GPIO	(GPP1 | FUNC(0))
+#define GPP2		(PIN(15,4) | PUD)
+#define GPP2_NWAIT	(GPP2 | FUNC(2))
+#define GPP3		(PIN(15,6) | PUD)
+#define GPP3_FALE	(GPP3 | FUNC(2))
+#define GPP4		(PIN(15,8) | PUD)
+#define GPP4_FCLE	(GPP4 | FUNC(2))
+#define GPP5		(PIN(15,10) | PUD)
+#define GPP5_FWE	(GPP5 | FUNC(2))
+#define GPP6		(PIN(15,12) | PUD)
+#define GPP6_FRE	(GPP6 | FUNC(2))
+#define GPP7		(PIN(15,14) | PUD)
+#define GPP7_RNB	(GPP7 | FUNC(2))
+#define GPP8		(PIN(15,16) | PUD)
+#define GPP8_GPIO	(GPP8 | FUNC(0))
+#define GPP9		(PIN(15,18) | PUD)
+#define GPP9_GPIO	(GPP9 | FUNC(0))
+#define GPP10		(PIN(15,20) | PUD)
+#define GPP10_GPIO	(GPP10 | FUNC(0))
+#define GPP11		(PIN(15,22) | PUD)
+#define GPP11_GPIO	(GPP11 | FUNC(0))
+#define GPP12		(PIN(15,24) | PUD)
+#define GPP12_GPIO	(GPP12 | FUNC(0))
+#define GPP13		(PIN(15,26) | PUD)
+#define GPP13_GPIO	(GPP13 | FUNC(0))
+#define GPP14		(PIN(15,28) | PUD)
+#define GPP14_GPIO	(GPP14 | FUNC(0))
+
+#define GPQ0		(PIN(16,0) | PUD)
+#define GPQ0_GPIO	(GPQ0 | FUNC(0))
+#define GPQ1		(PIN(16,2) | PUD)
+#define GPQ1_GPIO	(GPQ1 | FUNC(0))
+#define GPQ2		(PIN(16,4) | PUD)
+#define GPQ2_GPIO	(GPQ2 | FUNC(0))
+#define GPQ3		(PIN(16,8) | PUD)
+#define GPQ3_GPIO	(GPQ3 | FUNC(0))
+#define GPQ4		(PIN(16,8) | PUD)
+#define GPQ4_GPIO	(GPQ4 | FUNC(0))
+#define GPQ5		(PIN(16,10) | PUD)
+#define GPQ5_GPIO	(GPQ5 | FUNC(0))
+#define GPQ6		(PIN(16,12) | PUD)
+#define GPQ6_GPIO	(GPQ6 | FUNC(0))
+#define GPQ7		(PIN(16,14) | PUD)
+#define GPQ7_GPIO	(GPQ7 | FUNC(0))
+#define GPQ8		(PIN(16,16) | PUD)
+#define GPQ8_GPIO	(GPQ7 | FUNC(0))
+
+
+#endif /* __MACH_IOMUX_S3C64XX_H */
-- 
1.7.10.4



From antonynpavlov at gmail.com  Sun Jul 15 08:21:57 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Sun, 15 Jul 2012 16:21:57 +0400
Subject: [PATCH] filetype: add forgotten mips barebox filetype_str
Message-ID: <1342354917-14742-1-git-send-email-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 common/filetype.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/common/filetype.c b/common/filetype.c
index 39c2098..1a5b82d 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -39,6 +39,7 @@ static const char *filetype_str[] = {
 	[filetype_oftree] = "open firmware flat device tree",
 	[filetype_aimage] = "Android boot image",
 	[filetype_sh] = "Bourne Shell",
+	[filetype_mips_barebox] = "MIPS barebox image",
 };
 
 const char *file_type_to_string(enum filetype f)
-- 
1.7.10



From marc at cpdesign.com.au  Sun Jul 15 21:04:54 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Mon, 16 Jul 2012 11:04:54 +1000
Subject: Various patches for imx35, fec, at24 driver and misc
Message-ID: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>

Hi,

I've been meaning to submit these for quite a while.

Patch 1 allows setting eth MAC address from alternate source, eg, eeprom
Patch 2 & 3 correct clock divider for mmc
Patch 4 adds an at24 eeprom driver alongside existing at25 driver.
Patch 5 adds a misc driver for a digital potentiometer.

Patches were generated against next.

Cheers,
Marc



From marc at cpdesign.com.au  Sun Jul 15 21:04:58 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Mon, 16 Jul 2012 11:04:58 +1000
Subject: [PATCH 4/5] at24: add I2C eeprom for 24cl02
In-Reply-To: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
References: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1342400699-6753-5-git-send-email-marc@cpdesign.com.au>

This series adds a driver for at24 eeproms. Much of the guts of the code
is taken from the at24 driver in the linux kernel.

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/eeprom/Kconfig  |    7 +++
 drivers/eeprom/Makefile |    1 +
 drivers/eeprom/at24.c   |  134 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 142 insertions(+), 0 deletions(-)
 create mode 100644 drivers/eeprom/at24.c

diff --git a/drivers/eeprom/Kconfig b/drivers/eeprom/Kconfig
index a0b5489..56dfd1a 100644
--- a/drivers/eeprom/Kconfig
+++ b/drivers/eeprom/Kconfig
@@ -8,4 +8,11 @@ config EEPROM_AT25
 	  after you configure the board init code to know about each eeprom
 	  on your target board.
 
+config EEPROM_AT24
+	bool "at24 based eeprom"
+	depends on I2C
+	help
+	  Provides read/write for the at24 family of I2C EEPROMS.
+	  Currently only the 2K bit versions are supported.
+	  
 endmenu
diff --git a/drivers/eeprom/Makefile b/drivers/eeprom/Makefile
index e323bd0..e287eb0 100644
--- a/drivers/eeprom/Makefile
+++ b/drivers/eeprom/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_EEPROM_AT25)	+= at25.o
+obj-$(CONFIG_EEPROM_AT24)	+= at24.o
diff --git a/drivers/eeprom/at24.c b/drivers/eeprom/at24.c
new file mode 100644
index 0000000..fd578b1
--- /dev/null
+++ b/drivers/eeprom/at24.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *               2009 Marc Kleine-Budde <mkl at pengutronix.de>
+ *               2010 Marc Reilly, Creative Product Design
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <xfuncs.h>
+#include <errno.h>
+
+#include <i2c/i2c.h>
+
+#define DRIVERNAME		"eeprom"
+
+struct at24 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+	/* size in bytes */
+	unsigned int		size;
+};
+
+#define to_at24(a)		container_of(a, struct at24, cdev)
+
+static ssize_t at24_read(struct cdev *cdev, void *_buf, size_t count,
+		ulong offset, ulong flags)
+{
+	struct at24 *priv = to_at24(cdev);
+	u8 *buf = _buf;
+	size_t i = count;
+	ssize_t numwritten = 0;
+	int retries = 5;
+	int ret;
+
+	while (i && retries) {
+		ret = i2c_read_reg(priv->client, offset, buf, i);
+		if (ret < 0)
+			return (ssize_t)ret;
+		else if (ret == 0)
+			--retries;
+
+		numwritten += ret;
+		i -= ret;
+		offset += ret;
+		buf += ret;
+	}
+
+	return numwritten;
+}
+
+static ssize_t at24_write(struct cdev *cdev, const void *_buf, size_t count,
+		ulong offset, ulong flags)
+{
+	struct at24 *priv = to_at24(cdev);
+	const u8 *buf = _buf;
+	const int maxwrite = 8;
+	int numtowrite;
+	ssize_t numwritten = 0;
+
+	while (count) {
+		int ret;
+
+		numtowrite = count;
+		if (numtowrite > maxwrite)
+			numtowrite = maxwrite;
+
+		ret = i2c_write_reg(priv->client, offset, buf, numtowrite);
+		if (ret < 0)
+			return (ssize_t)ret;
+
+		mdelay(10);
+
+		numwritten += ret;
+		buf += ret;
+		count -= ret;
+		offset += ret;
+	}
+
+	return numwritten;
+}
+
+static struct file_operations at24_fops = {
+	.lseek	= dev_lseek_default,
+	.read	= at24_read,
+	.write	= at24_write,
+};
+
+static int at24_probe(struct device_d *dev)
+{
+	struct at24 *at24;
+	at24 = xzalloc(sizeof(*at24));
+
+	dev->priv = at24;
+
+	at24->cdev.name = DRIVERNAME;
+	at24->client = to_i2c_client(dev);
+	at24->cdev.size = 256;
+	at24->cdev.dev = dev;
+	at24->cdev.ops = &at24_fops;
+
+	devfs_create(&at24->cdev);
+
+	return 0;
+}
+
+static struct driver_d at24_driver = {
+	.name  = DRIVERNAME,
+	.probe = at24_probe,
+};
+
+static int at24_init(void)
+{
+	register_driver(&at24_driver);
+	return 0;
+}
+
+device_initcall(at24_init);
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 15 21:04:55 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Mon, 16 Jul 2012 11:04:55 +1000
Subject: [PATCH 1/5] imx_fec: Allow driver clients to supply MAC address
In-Reply-To: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
References: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1342400699-6753-2-git-send-email-marc@cpdesign.com.au>

This patch adds a handler to the fec platform data to get MAC address.
If a handler is not specified the driver uses the existing one.

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/net/fec_imx.c |    6 +++++-
 include/fec.h         |    4 ++++
 2 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index 599a9b4..5084758 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -629,10 +629,14 @@ static int fec_probe(struct device_d *dev)
 	edev->send = fec_send;
 	edev->recv = fec_recv;
 	edev->halt = fec_halt;
-	edev->get_ethaddr = fec_get_hwaddr;
 	edev->set_ethaddr = fec_set_hwaddr;
 	edev->parent = dev;
 
+	if (pdata->get_hwaddr)
+		edev->get_ethaddr = pdata->get_hwaddr;
+	else
+		edev->get_ethaddr = fec_get_hwaddr;
+
 	fec->regs = dev_request_mem_region(dev, 0);
 
 	/* Reset chip. */
diff --git a/include/fec.h b/include/fec.h
index f56b023..5072bbf 100644
--- a/include/fec.h
+++ b/include/fec.h
@@ -36,6 +36,8 @@ typedef enum {
 	RGMII,
 } xceiver_type;
 
+struct eth_device;
+
 /*
  * Define the phy connected externally for FEC drivers
  * (like MPC52xx and i.MX27)
@@ -43,6 +45,8 @@ typedef enum {
 struct fec_platform_data {
         xceiver_type	xcv_type;
 	int		phy_addr;
+
+	int (*get_hwaddr)(struct eth_device *dev, unsigned char *mac);
 };
 
 #endif /* __INCLUDE_NETWORK_FEC_H */
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 15 21:04:59 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Mon, 16 Jul 2012 11:04:59 +1000
Subject: [PATCH 5/5] misc: new driver: isl22316 digital potentiometer
In-Reply-To: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
References: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1342400699-6753-6-git-send-email-marc@cpdesign.com.au>

This series adds a driver for the isl22316 digital pot.
A new misc config option and folder is added.

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/Kconfig         |    1 +
 drivers/Makefile        |    1 +
 drivers/misc/Kconfig    |   10 +++
 drivers/misc/Makefile   |    1 +
 drivers/misc/isl22316.c |  180 +++++++++++++++++++++++++++++++++++++++++++++++
 include/misc/isl22316.h |   26 +++++++
 6 files changed, 219 insertions(+), 0 deletions(-)
 create mode 100644 drivers/misc/Kconfig
 create mode 100644 drivers/misc/Makefile
 create mode 100644 drivers/misc/isl22316.c
 create mode 100644 include/misc/isl22316.h

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 883b0e7..8710432 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -18,5 +18,6 @@ source "drivers/input/Kconfig"
 source "drivers/watchdog/Kconfig"
 source "drivers/pwm/Kconfig"
 source "drivers/dma/Kconfig"
+source "drivers/misc/Kconfig"
 
 endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index ea3263f..5c93274 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_PWM) += pwm/
 obj-y	+= input/
 obj-y	+= dma/
 obj-y  += watchdog/
+obj-$(CONFIG_MISC) += misc/
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
new file mode 100644
index 0000000..859035f
--- /dev/null
+++ b/drivers/misc/Kconfig
@@ -0,0 +1,10 @@
+menuconfig MISC
+	bool "Misc devices support"
+
+if MISC
+
+config ISL22316
+	bool "isl22316 digital controlled potentiometer"
+	depends on I2C
+
+endif
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
new file mode 100644
index 0000000..1ab3a6c
--- /dev/null
+++ b/drivers/misc/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ISL22316) += isl22316.o
diff --git a/drivers/misc/isl22316.c b/drivers/misc/isl22316.c
new file mode 100644
index 0000000..aeb9f89
--- /dev/null
+++ b/drivers/misc/isl22316.c
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *               2009 Marc Kleine-Budde <mkl at pengutronix.de>
+ * Copyright (C) 2010 Baruch Siach <baruch at tkos.co.il>
+ *               2011 Marc Reilly, Creative Product Design
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <xfuncs.h>
+#include <errno.h>
+
+#include <i2c/i2c.h>
+#include <misc/isl22316.h>
+
+#define DRIVERNAME		"isl22316"
+
+#define to_isl22316(a)		container_of(a, struct isl22316, cdev)
+
+#define ISL22316_WR		0
+#define ISL22316_ACR		2
+#define ISL22316_ACR_VOL	0x80
+#define ISL22316_ACR_SHDN	0x40
+#define ISL22316_ACR_WIP	0x20
+
+static struct isl22316 *isl22316_dev;
+
+struct isl22316 *isl22316_get(void)
+{
+	return isl22316_dev;
+}
+EXPORT_SYMBOL(isl22316_get);
+
+int isl22316_reg_read(struct isl22316 *isl22316, u8 reg, u8 *val)
+{
+	int ret;
+
+	ret = i2c_read_reg(isl22316->client, reg, val, 1);
+
+	return ret == 1 ? 0 : ret;
+}
+EXPORT_SYMBOL(isl22316_reg_read);
+
+int isl22316_reg_write(struct isl22316 *isl22316, u8 reg, u8 val)
+{
+	int ret;
+
+	ret = i2c_write_reg(isl22316->client, reg, &val, 1);
+
+	return ret == 1 ? 0 : ret;
+}
+EXPORT_SYMBOL(isl22316_reg_write);
+
+int isl22316_get_value(struct isl22316 *isl22316, u8 *val, int save)
+{
+	int ret;
+	u8 acr = ISL22316_ACR_SHDN;
+
+	if (!save)
+		acr |= ISL22316_ACR_VOL;
+
+	ret = isl22316_reg_write(isl22316, ISL22316_ACR, acr);
+	if (ret)
+		return ret;
+
+	ret = isl22316_reg_read(isl22316, ISL22316_WR, val);
+
+	return ret;
+}
+EXPORT_SYMBOL(isl22316_get_value);
+
+int isl22316_set_value(struct isl22316 *isl22316, u8 val, int save)
+{
+	int ret;
+	u8 acr = ISL22316_ACR_SHDN;
+
+	if (!save)
+		acr |= ISL22316_ACR_VOL;
+
+	ret = isl22316_reg_write(isl22316, ISL22316_ACR, acr);
+	if (ret)
+		return ret;
+
+	ret = isl22316_reg_write(isl22316, ISL22316_WR, val);
+
+	return ret;
+}
+EXPORT_SYMBOL(isl22316_set_value);
+
+static ssize_t isl22316_read(struct cdev *cdev, void *_buf, size_t count,
+		ulong offset, ulong flags)
+{
+	struct isl22316 *priv = to_isl22316(cdev);
+	u8 *buf = _buf;
+	size_t i = count;
+	int err;
+
+	while (i) {
+		err = isl22316_reg_read(priv, offset, buf);
+		if (err)
+			return (ssize_t)err;
+		buf++;
+		i--;
+		offset++;
+	}
+
+	return count;
+}
+
+static ssize_t isl22316_write(struct cdev *cdev, const void *_buf, size_t count,
+		ulong offset, ulong flags)
+{
+	struct isl22316 *isl22316 = to_isl22316(cdev);
+	const u8 *buf = _buf;
+	size_t i = count;
+	int err;
+
+	while (i) {
+		err = isl22316_reg_write(isl22316, offset, *buf);
+		if (err)
+			return (ssize_t)err;
+		buf++;
+		i--;
+		offset++;
+	}
+
+	return count;
+}
+
+static struct file_operations isl22316_fops = {
+	.lseek	= dev_lseek_default,
+	.read	= isl22316_read,
+	.write	= isl22316_write,
+};
+
+static int isl22316_probe(struct device_d *dev)
+{
+	if (isl22316_dev)
+		return -EBUSY;
+
+	isl22316_dev = xzalloc(sizeof(*isl22316_dev));
+	isl22316_dev->cdev.name = DRIVERNAME;
+	isl22316_dev->client = to_i2c_client(dev);
+	isl22316_dev->cdev.dev = dev;
+	isl22316_dev->cdev.size = 3;
+	isl22316_dev->cdev.ops = &isl22316_fops;
+
+	devfs_create(&isl22316_dev->cdev);
+
+	return 0;
+}
+
+static struct driver_d isl22316_driver = {
+	.name  = DRIVERNAME,
+	.probe = isl22316_probe,
+};
+
+static int isl22316_init(void)
+{
+	register_driver(&isl22316_driver);
+	return 0;
+}
+
+device_initcall(isl22316_init);
diff --git a/include/misc/isl22316.h b/include/misc/isl22316.h
new file mode 100644
index 0000000..3563dc3
--- /dev/null
+++ b/include/misc/isl22316.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2011 Creative Product Design
+ *
+ * This file is released under the GPLv2
+ */
+#ifndef __ISL22316_H
+#define __ISL22316_H
+
+struct isl22316 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+};
+
+struct isl22316 *isl22316_get(void);
+
+int isl22316_reg_read(struct isl22316 *isl22316, u8 reg, u8 *val);
+int isl22316_reg_write(struct isl22316 *isl22316, u8 reg, u8 val);
+
+/*
+ * Uses non volatile storage if save is non zero.
+ * (remember that saving to non-vol also sets the working value)
+ */
+int isl22316_get_value(struct isl22316 *isl22316, u8 *val, int save);
+int isl22316_set_value(struct isl22316 *isl22316, u8 val, int save);
+
+#endif
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 15 21:04:56 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Mon, 16 Jul 2012 11:04:56 +1000
Subject: [PATCH 2/5] imx35: 6-bit divider helper
In-Reply-To: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
References: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1342400699-6753-3-git-send-email-marc@cpdesign.com.au>

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 arch/arm/mach-imx/speed-imx35.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/speed-imx35.c b/arch/arm/mach-imx/speed-imx35.c
index 684dc14..905ab47 100644
--- a/arch/arm/mach-imx/speed-imx35.c
+++ b/arch/arm/mach-imx/speed-imx35.c
@@ -97,6 +97,11 @@ static unsigned long get_3_3_div(unsigned long in)
 	return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1);
 }
 
+static unsigned long get_6_div(unsigned long in)
+{
+	return ((in & 0x3f) + 1);
+}
+
 static unsigned long imx_get_ipg_perclk(void)
 {
 	ulong pdr0 = readl(IMX_CCM_BASE + CCM_PDR0);
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 15 21:04:57 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Mon, 16 Jul 2012 11:04:57 +1000
Subject: [PATCH 3/5] imx35: mmc clock has 6 bit divider, not 3_3
In-Reply-To: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
References: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1342400699-6753-4-git-send-email-marc@cpdesign.com.au>

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
According to MCIMX35RM rev 3

 arch/arm/mach-imx/speed-imx35.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-imx/speed-imx35.c b/arch/arm/mach-imx/speed-imx35.c
index 905ab47..6d4236a 100644
--- a/arch/arm/mach-imx/speed-imx35.c
+++ b/arch/arm/mach-imx/speed-imx35.c
@@ -170,10 +170,11 @@ unsigned long imx_get_uartclk(void)
 		return imx_get_ppllclk() / div;
 }
 
+/* mmc0 clk only */
 unsigned long imx_get_mmcclk(void)
 {
 	unsigned long pdr3 = readl(IMX_CCM_BASE + CCM_PDR3);
-	unsigned long div = get_3_3_div(pdr3);
+	unsigned long div = get_6_div(pdr3);
 
 	if (pdr3 & (1 << 6))
 		return imx_get_armclk() / div;
-- 
1.7.7



From gpontis at spamcop.net  Mon Jul 16 02:50:32 2012
From: gpontis at spamcop.net (gpontis at spamcop.net)
Date: Mon, 16 Jul 2012 02:50:32 -0400
Subject: Atmel SD/MMC info error (report only)
Message-ID: <20120716025032.0fj3voz8vc480scw-tcbagvf@webmail.spamcop.net>

If CONFIG_MCI_ATMEL=y and CONFIG_MCI_INFO=y, some useful info about  
the SD/MMC card can be displayed with "devinfo atmel_mci0". However,  
the parameter showing the number of bits used for transfers is  
incorrect. A SD card supporting 4 bit transfers is reported as using 2  
bits. A logic analyzer shows that in fact all 4 bits are actually  
being used.

GP


From s.hauer at pengutronix.de  Mon Jul 16 03:10:35 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:10:35 +0200
Subject: [PATCH v2] mtd: fix 'write: Invalid argument' while writing to
 nand-bb devices
In-Reply-To: <1342086362-2129-1-git-send-email-jlu@pengutronix.de>
References: <1342086362-2129-1-git-send-email-jlu@pengutronix.de>
Message-ID: <20120716071035.GT30009@pengutronix.de>

On Thu, Jul 12, 2012 at 11:46:02AM +0200, Jan Luebbe wrote:
> The 'off_t cur_ofs' variable was missed during the 64 bit conversion.
> For the MEMGETBADBLOCK ioctl, a pointer to a loff_t is needed.
> 
> Also adjust the debug format strings.

Applied, thanks

Sascha

> 
> Signed-off-by: Jan Luebbe <jlu at pengutronix.de>
> ---
>  drivers/mtd/nand/nand-bb.c |    6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand-bb.c b/drivers/mtd/nand/nand-bb.c
> index 5b06a9e..519337e 100644
> --- a/drivers/mtd/nand/nand-bb.c
> +++ b/drivers/mtd/nand/nand-bb.c
> @@ -60,7 +60,7 @@ static ssize_t nand_bb_read(struct cdev *cdev, void *buf, size_t count,
>  	struct cdev *parent = bb->cdev_parent;
>  	int ret, bytes = 0, now;
>  
> -	debug("%s %d %d\n", __func__, offset, count);
> +	debug("%s 0x%08llx %d\n", __func__, offset, count);
>  
>  	while(count) {
>  		ret = cdev_ioctl(parent, MEMGETBADBLOCK, &bb->offset);
> @@ -96,7 +96,7 @@ static int nand_bb_write_buf(struct nand_bb *bb, size_t count)
>  	int ret, now;
>  	struct cdev *parent = bb->cdev_parent;
>  	void *buf = bb->writebuf;
> -	off_t cur_ofs = bb->offset & ~(BB_WRITEBUF_SIZE - 1);
> +	loff_t cur_ofs = bb->offset & ~(BB_WRITEBUF_SIZE - 1);
>  
>  	while (count) {
>  		ret = cdev_ioctl(parent, MEMGETBADBLOCK, &cur_ofs);
> @@ -104,7 +104,7 @@ static int nand_bb_write_buf(struct nand_bb *bb, size_t count)
>  			return ret;
>  
>  		if (ret) {
> -			debug("skipping bad block at 0x%08x\n", cur_ofs);
> +			debug("skipping bad block at 0x%08llx\n", cur_ofs);
>  			bb->offset += bb->info.erasesize;
>  			cur_ofs += bb->info.erasesize;
>  			continue;
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From sha at pengutronix.de  Mon Jul 16 03:13:24 2012
From: sha at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:13:24 +0200
Subject: [PATCH] usb: gadget: enable for MXS
In-Reply-To: <1342126889-8693-1-git-send-email-mkl@pengutronix.de>
References: <1342126889-8693-1-git-send-email-mkl@pengutronix.de>
Message-ID: <20120716071324.GU30009@pengutronix.de>

Hi Marc,

On Thu, Jul 12, 2012 at 11:01:29PM +0200, Marc Kleine-Budde wrote:
> Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
> ---
>  drivers/usb/gadget/Kconfig |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
> index f7f2697..df1d970 100644
> --- a/drivers/usb/gadget/Kconfig
> +++ b/drivers/usb/gadget/Kconfig
> @@ -4,7 +4,7 @@ menuconfig USB_GADGET
>  
>  config USB_HAVE_GADGET_DRIVER
>  	bool
> -	default y if ARCH_IMX || ARCH_AT91 || ARCH_PXA
> +	default y if ARCH_IMX || ARCH_MXS || ARCH_AT91 || ARCH_PXA

This does not seem to be enough. At least in my tree the driver itself
depends on ARCH_IMX, so there is a ARCH_MXS missing there aswell.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 03:17:52 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:17:52 +0200
Subject: [PATCH] filetype: add forgotten mips barebox filetype_str
In-Reply-To: <1342354917-14742-1-git-send-email-antonynpavlov@gmail.com>
References: <1342354917-14742-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <20120716071752.GV30009@pengutronix.de>

On Sun, Jul 15, 2012 at 04:21:57PM +0400, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>

Applied, thanks

Sascha

> ---
>  common/filetype.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/common/filetype.c b/common/filetype.c
> index 39c2098..1a5b82d 100644
> --- a/common/filetype.c
> +++ b/common/filetype.c
> @@ -39,6 +39,7 @@ static const char *filetype_str[] = {
>  	[filetype_oftree] = "open firmware flat device tree",
>  	[filetype_aimage] = "Android boot image",
>  	[filetype_sh] = "Bourne Shell",
> +	[filetype_mips_barebox] = "MIPS barebox image",
>  };
>  
>  const char *file_type_to_string(enum filetype f)
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 03:20:45 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:20:45 +0200
Subject: [PATCH 05/18] Samsung/serial: make the clock source configureable
In-Reply-To: <1342206070-29698-6-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
 <1342206070-29698-6-git-send-email-jbe@pengutronix.de>
Message-ID: <20120716072045.GW30009@pengutronix.de>

On Fri, Jul 13, 2012 at 09:00:57PM +0200, Juergen Beisert wrote:
> Instead of taking the value from somewhere, use the menu to select one. Also
> provide sane default values for known SoCs.

Do we really really need this in Kconfig? I don't like having things in
Kconfig which decide between 'right' and 'wrong'. You should rather have
some cpu_is or platformdata mechanism.

Sascha

> 
> Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
> ---
>  drivers/serial/Kconfig      |   12 ++++++++++++
>  drivers/serial/serial_s3c.c |    7 +------
>  2 files changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index a9383da..a118aaf 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -85,6 +85,18 @@ config DRIVER_SERIAL_S3C
>  	help
>  	  Say Y here if you want to use the CONS on a Samsung S3C CPU
>  
> +config DRIVER_SERIAL_S3C_CLK
> +	int
> +	prompt "input clock reference"
> +	depends on DRIVER_SERIAL_S3C
> +	default 0 if ARCH_S3C24xx
> +	default 3 if ARCH_S5PCxx
> +	help
> +	  Select one of up to four available clock sources for the UART:
> +	   0+1: PCLK, 2: UCLK0, 3: UCLK1
> +	  Note: not all values are possible on all Samsung SoCs. Read the
> +	  manual if unsure.
> +
>  config DRIVER_SERIAL_S3C_AUTOSYNC
>  	bool "Enable auto flow"
>  	depends on DRIVER_SERIAL_S3C
> diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
> index ff3792b..5c05ba8 100644
> --- a/drivers/serial/serial_s3c.c
> +++ b/drivers/serial/serial_s3c.c
> @@ -47,11 +47,6 @@
>  # define UINTM 0x38		/* interrupt mask register */
>  #endif
>  
> -#ifndef S3C_UART_CLKSEL
> -/* Use pclk */
> -# define S3C_UART_CLKSEL 0
> -#endif
> -
>  struct s3c_uart {
>  	void __iomem *regs;
>  	struct console_device cdev;
> @@ -108,7 +103,7 @@ static int s3c_serial_init_port(struct console_device *cdev)
>  
>  	/* tx=level,rx=edge,disable timeout int.,enable rx error int.,
>  	 * normal, interrupt or polling, no pre-divider */
> -	writew(0x0245 | ((S3C_UART_CLKSEL) << 10), base + UCON);
> +	writew(0x0245 | ((CONFIG_DRIVER_SERIAL_S3C_CLK) << 10), base + UCON);
>  
>  #ifdef S3C_UART_HAS_UINTM
>  	/* 'interrupt or polling mode' for both directions */
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 03:21:31 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:21:31 +0200
Subject: [PATCH 02/18] ARM/Samsung: unify device registration for the
 S3C24XX SoCs
In-Reply-To: <1342206070-29698-3-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
 <1342206070-29698-3-git-send-email-jbe@pengutronix.de>
Message-ID: <20120716072131.GX30009@pengutronix.de>

On Fri, Jul 13, 2012 at 09:00:54PM +0200, Juergen Beisert wrote:
> Barebox crashes since it has trouble with a resource size of 0. Most of the
> S3C24XX based platforms crashes at runtime and can't use devices with resource
> sizes of 0 anymore. This patch fix it by unifying the device registration for
> all current Barebox's S3C24XX based platforms.
> 
> - A9M2410 and A9M2440 compile time tested only.
> - Mini2440 also runtime tested.

So this is stuff for master, right?

Sascha

> 
> Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
> ---
>  arch/arm/boards/a9m2410/a9m2410.c                  |    6 +--
>  arch/arm/boards/a9m2440/a9m2440.c                  |    7 ++-
>  arch/arm/boards/mini2440/mini2440.c                |   16 +++---
>  .../mach-samsung/include/mach/devices-s3c24xx.h    |   54 ++++++++++++++++++++
>  4 files changed, 65 insertions(+), 18 deletions(-)
>  create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
> 
> diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c
> index eaafdbd..c2d4b87 100644
> --- a/arch/arm/boards/a9m2410/a9m2410.c
> +++ b/arch/arm/boards/a9m2410/a9m2410.c
> @@ -32,6 +32,7 @@
>  #include <partition.h>
>  #include <nand.h>
>  #include <io.h>
> +#include <mach/devices-s3c24xx.h>
>  #include <mach/s3c-iomap.h>
>  #include <mach/s3c24xx-nand.h>
>  #include <mach/s3c-generic.h>
> @@ -109,8 +110,7 @@ static int a9m2410_devices_init(void)
>  	writel(reg, S3C_MISCCR);
>  
>  	/* ----------- the devices the boot loader should work with -------- */
> -	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
> -			0, IORESOURCE_MEM, &nand_info);
> +	s3c24xx_add_nand(&nand_info);
>  	/*
>  	 * SMSC 91C111 network controller on the baseboard
>  	 * connected to CS line 1 and interrupt line
> @@ -145,8 +145,6 @@ void __bare_init nand_boot(void)
>  
>  static int a9m2410_console_init(void)
>  {
> -	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
> -			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
>  	return 0;
>  }
>  
> diff --git a/arch/arm/boards/a9m2440/a9m2440.c b/arch/arm/boards/a9m2440/a9m2440.c
> index 1d20248..8975c15 100644
> --- a/arch/arm/boards/a9m2440/a9m2440.c
> +++ b/arch/arm/boards/a9m2440/a9m2440.c
> @@ -32,6 +32,7 @@
>  #include <partition.h>
>  #include <nand.h>
>  #include <io.h>
> +#include <mach/devices-s3c24xx.h>
>  #include <mach/s3c-iomap.h>
>  #include <mach/s3c24xx-nand.h>
>  #include <mach/s3c-generic.h>
> @@ -129,8 +130,7 @@ static int a9m2440_devices_init(void)
>  	writel(reg, S3C_MISCCR);
>  
>  	/* ----------- the devices the boot loader should work with -------- */
> -	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE, 0,
> -			   IORESOURCE_MEM, &nand_info);
> +	s3c24xx_add_nand(&nand_info);
>  	/*
>  	 * cs8900 network controller onboard
>  	 * Connected to CS line 5 + A24 and interrupt line EINT9,
> @@ -164,8 +164,7 @@ void __bare_init nand_boot(void)
>  
>  static int a9m2440_console_init(void)
>  {
> -	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
> -			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
> +	s3c24xx_add_uart1();
>  	return 0;
>  }
>  
> diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
> index 3d3b820..3523949 100644
> --- a/arch/arm/boards/mini2440/mini2440.c
> +++ b/arch/arm/boards/mini2440/mini2440.c
> @@ -39,6 +39,7 @@
>  #include <io.h>
>  #include <mach/gpio.h>
>  #include <mach/s3c-iomap.h>
> +#include <mach/devices-s3c24xx.h>
>  #include <mach/s3c24xx-nand.h>
>  #include <mach/s3c-generic.h>
>  #include <mach/s3c-mci.h>
> @@ -297,8 +298,7 @@ static int mini2440_devices_init(void)
>  	reg |= 0x10000;
>  	writel(reg, S3C_MISCCR);
>  
> -	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
> -			0, IORESOURCE_MEM, &nand_info);
> +	s3c24xx_add_nand(&nand_info);
>  
>  	add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
>  			  IORESOURCE_MEM_16BIT, &dm9000_data);
> @@ -312,12 +312,9 @@ static int mini2440_devices_init(void)
>  	devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
>  	dev_add_bb_dev("env_raw", "env0");
>  #endif
> -	add_generic_device("s3c_mci", 0, NULL, S3C2410_SDI_BASE, 0,
> -			   IORESOURCE_MEM, &mci_data);
> -	add_generic_device("s3c_fb", 0, NULL, S3C2410_LCD_BASE, 0,
> -			   IORESOURCE_MEM, &s3c24x0_fb_data);
> -	add_generic_device("ohci", 0, NULL, S3C2410_USB_HOST_BASE, 0x100,
> -			   IORESOURCE_MEM, NULL);
> +	s3c24xx_add_mci(&mci_data);
> +	s3c24xx_add_fb(&s3c24x0_fb_data);
> +	s3c24xx_add_ohci();
>  	armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
>  	armlinux_set_architecture(MACH_TYPE_MINI2440);
>  
> @@ -344,8 +341,7 @@ static int mini2440_console_init(void)
>  	s3c_gpio_mode(GPH2_TXD0);
>  	s3c_gpio_mode(GPH3_RXD0);
>  
> -	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
> -			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
> +	s3c24xx_add_uart1();
>  	return 0;
>  }
>  
> diff --git a/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h b/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
> new file mode 100644
> index 0000000..d099732
> --- /dev/null
> +++ b/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
> @@ -0,0 +1,54 @@
> +/*
> + * Copyright 2012 Juergen Beisert
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +
> +#ifndef INCLUDE_MACH_DEVICES_S3C24XX_H
> +# define INCLUDE_MACH_DEVICES_S3C24XX_H
> +
> +#include <mach/s3c24xx-iomap.h>
> +#include <mach/s3c24xx-nand.h>
> +#include <mach/s3c-mci.h>
> +#include <mach/s3c24xx-fb.h>
> +
> +static inline void s3c24xx_add_nand(struct s3c24x0_nand_platform_data *d)
> +{
> +	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL,
> +				S3C24X0_NAND_BASE, 0x80, IORESOURCE_MEM, d);
> +}
> +
> +static inline void s3c24xx_add_mci(struct s3c_mci_platform_data *d)
> +{
> +	add_generic_device("s3c_mci", DEVICE_ID_DYNAMIC, NULL,
> +				S3C2410_SDI_BASE, 0x80, IORESOURCE_MEM, d);
> +}
> +
> +static inline void s3c24xx_add_fb(struct s3c_fb_platform_data *d)
> +{
> +	add_generic_device("s3c_fb", DEVICE_ID_DYNAMIC, NULL,
> +				S3C2410_LCD_BASE, 0x80, IORESOURCE_MEM, d);
> +}
> +
> +static inline void s3c24xx_add_ohci(void)
> +{
> +	add_generic_device("ohci", DEVICE_ID_DYNAMIC, NULL,
> +			S3C2410_USB_HOST_BASE, 0x100, IORESOURCE_MEM, NULL);
> +}
> +
> +static inline void s3c24xx_add_uart1(void)
> +{
> +	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
> +			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
> +}
> +
> +#endif /* INCLUDE_MACH_DEVICES_S3C24XX_H */
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 03:22:43 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:22:43 +0200
Subject: [PATCH 11/18] ARM/Samsung: add generic lowlevel init
In-Reply-To: <1342206070-29698-12-git-send-email-jbe@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
 <1342206070-29698-12-git-send-email-jbe@pengutronix.de>
Message-ID: <20120716072243.GY30009@pengutronix.de>

On Fri, Jul 13, 2012 at 09:01:03PM +0200, Juergen Beisert wrote:
> Just a placeholder for some required low level routines
> ---
>  arch/arm/mach-samsung/Makefile           |    1 +
>  arch/arm/mach-samsung/lowlevel-s3c64xx.c |   14 ++++++++++++++
>  2 files changed, 15 insertions(+)
>  create mode 100644 arch/arm/mach-samsung/lowlevel-s3c64xx.c

Please just drop this one.

Sascha

> 
> diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
> index 091b600..ac34d86 100644
> --- a/arch/arm/mach-samsung/Makefile
> +++ b/arch/arm/mach-samsung/Makefile
> @@ -1,5 +1,6 @@
>  obj-y += s3c-timer.o generic.o
>  obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
> +obj-lowlevel-$(CONFIG_ARCH_S3C64xx) += lowlevel-s3c64x0.o
>  obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
>  obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
>  obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o mem-s5pcxx.o
> diff --git a/arch/arm/mach-samsung/lowlevel-s3c64xx.c b/arch/arm/mach-samsung/lowlevel-s3c64xx.c
> new file mode 100644
> index 0000000..b1ba719
> --- /dev/null
> +++ b/arch/arm/mach-samsung/lowlevel-s3c64xx.c
> @@ -0,0 +1,14 @@
> +/*
> + * Copyright (C) 2012 Juergen Beisert
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From GPontis at z9.com  Mon Jul 16 03:22:13 2012
From: GPontis at z9.com (George Pontis)
Date: Mon, 16 Jul 2012 00:22:13 -0700
Subject: Atmel AT91 SD/MMC clock too fast
Message-ID: <025c01cd6323$b85f2220$291d6660$@com>

Due to integer truncation, the calculated divisor for the SD/MMC clock may
be too low, resulting in a clock that is too fast. For example, the
at91sam9g45 is typically run with a master clock at 133 MHz. There is no
divisor possible that will result in a 25 or 50 MHz clock as is typically
used for a SD card. The existing code will set the clock at 33 MHz or 66 MHz
when 25 or 50 MHz is requested. A Kingston class 10 8G SDHC was found to not
work properly at 33 MHz, but did after patching. The patch, in this case,
generated a 22.1 MHz clock ( 133/6 ). This is the same frequency that this
card sees after booting Linux. If a perfect integer division is possible,
the patch will provide an exact clock rate. If not, the frequency will be
the closest possible without exceeding the target.

The following was based on barebox 2012-07:

--- a/drivers/mci/atmel_mci.c   2012-07-02 01:31:52.000000000 -0700
+++ b/drivers/mci/atmel_mci.c   2012-07-15 23:14:02.203872596 -0700
@@ -76,7 +76,8 @@
        unsigned int clk_in = clk_get_rate(host->clk);

        if (clk_ios > 0) {
-               divider = (clk_in / clk_ios) / 2;
+               /* don't allow integer truncation to result in too small a
divider */
+               divider = (clk_in + 2 * clk_ios - 1) / (2 * clk_ios);
                if (divider > 0)
                        divider -= 1;
        }




From jbe at pengutronix.de  Mon Jul 16 03:37:46 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Mon, 16 Jul 2012 09:37:46 +0200
Subject: [PATCH 02/18] ARM/Samsung: unify device registration for the
 S3C24XX SoCs
In-Reply-To: <20120716072131.GX30009@pengutronix.de>
References: <1342206070-29698-1-git-send-email-jbe@pengutronix.de>
 <1342206070-29698-3-git-send-email-jbe@pengutronix.de>
 <20120716072131.GX30009@pengutronix.de>
Message-ID: <201207160937.46303.jbe@pengutronix.de>

Sascha Hauer wrote:
> On Fri, Jul 13, 2012 at 09:00:54PM +0200, Juergen Beisert wrote:
> > Barebox crashes since it has trouble with a resource size of 0. Most of
> > the S3C24XX based platforms crashes at runtime and can't use devices with
> > resource sizes of 0 anymore. This patch fix it by unifying the device
> > registration for all current Barebox's S3C24XX based platforms.
> >
> > - A9M2410 and A9M2440 compile time tested only.
> > - Mini2440 also runtime tested.
>
> So this is stuff for master, right?

Hmm, yes. :)

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-5121-206917-5128 |
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Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Mon Jul 16 03:43:30 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:43:30 +0200
Subject: [PATCH 1/5] imx_fec: Allow driver clients to supply MAC address
In-Reply-To: <1342400699-6753-2-git-send-email-marc@cpdesign.com.au>
References: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
 <1342400699-6753-2-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120716074330.GZ30009@pengutronix.de>

On Mon, Jul 16, 2012 at 11:04:55AM +1000, Marc Reilly wrote:
> This patch adds a handler to the fec platform data to get MAC address.
> If a handler is not specified the driver uses the existing one.

We already have a generic mechanism for that. See eth_register_ethaddr.
If you pass a MAC address to this function this one will be used instead
of the default one from the driver.

Sascha

> 
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> ---
>  drivers/net/fec_imx.c |    6 +++++-
>  include/fec.h         |    4 ++++
>  2 files changed, 9 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
> index 599a9b4..5084758 100644
> --- a/drivers/net/fec_imx.c
> +++ b/drivers/net/fec_imx.c
> @@ -629,10 +629,14 @@ static int fec_probe(struct device_d *dev)
>  	edev->send = fec_send;
>  	edev->recv = fec_recv;
>  	edev->halt = fec_halt;
> -	edev->get_ethaddr = fec_get_hwaddr;
>  	edev->set_ethaddr = fec_set_hwaddr;
>  	edev->parent = dev;
>  
> +	if (pdata->get_hwaddr)
> +		edev->get_ethaddr = pdata->get_hwaddr;
> +	else
> +		edev->get_ethaddr = fec_get_hwaddr;
> +
>  	fec->regs = dev_request_mem_region(dev, 0);
>  
>  	/* Reset chip. */
> diff --git a/include/fec.h b/include/fec.h
> index f56b023..5072bbf 100644
> --- a/include/fec.h
> +++ b/include/fec.h
> @@ -36,6 +36,8 @@ typedef enum {
>  	RGMII,
>  } xceiver_type;
>  
> +struct eth_device;
> +
>  /*
>   * Define the phy connected externally for FEC drivers
>   * (like MPC52xx and i.MX27)
> @@ -43,6 +45,8 @@ typedef enum {
>  struct fec_platform_data {
>          xceiver_type	xcv_type;
>  	int		phy_addr;
> +
> +	int (*get_hwaddr)(struct eth_device *dev, unsigned char *mac);
>  };
>  
>  #endif /* __INCLUDE_NETWORK_FEC_H */
> -- 
> 1.7.7
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 03:49:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 09:49:37 +0200
Subject: [PATCH 4/5] at24: add I2C eeprom for 24cl02
In-Reply-To: <1342400699-6753-5-git-send-email-marc@cpdesign.com.au>
References: <1342400699-6753-1-git-send-email-marc@cpdesign.com.au>
 <1342400699-6753-5-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120716074937.GA30009@pengutronix.de>

On Mon, Jul 16, 2012 at 11:04:58AM +1000, Marc Reilly wrote:
> This series adds a driver for at24 eeproms. Much of the guts of the code
> is taken from the at24 driver in the linux kernel.
> 
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> ---
>  drivers/eeprom/Kconfig  |    7 +++
>  drivers/eeprom/Makefile |    1 +
>  drivers/eeprom/at24.c   |  134 +++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 142 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/eeprom/at24.c
> 
> diff --git a/drivers/eeprom/Kconfig b/drivers/eeprom/Kconfig
> index a0b5489..56dfd1a 100644
> --- a/drivers/eeprom/Kconfig
> +++ b/drivers/eeprom/Kconfig
> @@ -8,4 +8,11 @@ config EEPROM_AT25
>  	  after you configure the board init code to know about each eeprom
>  	  on your target board.
>  
> +config EEPROM_AT24
> +	bool "at24 based eeprom"
> +	depends on I2C
> +	help
> +	  Provides read/write for the at24 family of I2C EEPROMS.
> +	  Currently only the 2K bit versions are supported.
> +	  

Trailing whitespace here.

> +{
> +	struct at24 *priv = to_at24(cdev);
> +	const u8 *buf = _buf;
> +	const int maxwrite = 8;
> +	int numtowrite;
> +	ssize_t numwritten = 0;
> +
> +	while (count) {
> +		int ret;
> +
> +		numtowrite = count;
> +		if (numtowrite > maxwrite)
> +			numtowrite = maxwrite;
> +
> +		ret = i2c_write_reg(priv->client, offset, buf, numtowrite);
> +		if (ret < 0)
> +			return (ssize_t)ret;
> +
> +		mdelay(10);

Do we need this? This makes the driver veeery slow. If we could poll
this somehow it would be much better.

> +
> +static int at24_init(void)
> +{
> +	register_driver(&at24_driver);
> +	return 0;

We can safely return the result of register_driver here. There was a
time when barebox paniced on a failed initcall, but this is not the case
anymore. Instead we have some debug output for failed initcalls which
seems more useful

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mkl at pengutronix.de  Mon Jul 16 04:15:31 2012
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Mon, 16 Jul 2012 10:15:31 +0200
Subject: [PATCH v2] usb: gadget: enable for MXS
Message-ID: <1342426531-14831-1-git-send-email-mkl@pengutronix.de>

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---
Changes since v1:
- enable Arc OTG Driver, too (tnx Sascha)

Marc

 drivers/usb/gadget/Kconfig |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index f7f2697..465121c 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -4,7 +4,7 @@ menuconfig USB_GADGET
 
 config USB_HAVE_GADGET_DRIVER
 	bool
-	default y if ARCH_IMX || ARCH_AT91 || ARCH_PXA
+	default y if ARCH_IMX || ARCH_MXS || ARCH_AT91 || ARCH_PXA
 
 if USB_GADGET
 
@@ -17,7 +17,7 @@ choice
 config USB_GADGET_DRIVER_ARC
 	bool
 	prompt "Arc OTG device core"
-	depends on ARCH_IMX
+	depends on ARCH_IMX || ARCH_MXS
 	select USB_GADGET_DUALSPEED
 	select POLLER
 
-- 
1.7.10.4



From s.hauer at pengutronix.de  Mon Jul 16 04:33:21 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 10:33:21 +0200
Subject: Atmel AT91 SD/MMC clock too fast
In-Reply-To: <025c01cd6323$b85f2220$291d6660$@com>
References: <025c01cd6323$b85f2220$291d6660$@com>
Message-ID: <20120716083321.GC30009@pengutronix.de>

Hi George,

On Mon, Jul 16, 2012 at 12:22:13AM -0700, George Pontis wrote:
> Due to integer truncation, the calculated divisor for the SD/MMC clock may
> be too low, resulting in a clock that is too fast. For example, the
> at91sam9g45 is typically run with a master clock at 133 MHz. There is no
> divisor possible that will result in a 25 or 50 MHz clock as is typically
> used for a SD card. The existing code will set the clock at 33 MHz or 66 MHz
> when 25 or 50 MHz is requested. A Kingston class 10 8G SDHC was found to not
> work properly at 33 MHz, but did after patching. The patch, in this case,
> generated a 22.1 MHz clock ( 133/6 ). This is the same frequency that this
> card sees after booting Linux. If a perfect integer division is possible,
> the patch will provide an exact clock rate. If not, the frequency will be
> the closest possible without exceeding the target.
> 
> The following was based on barebox 2012-07:
> 
> --- a/drivers/mci/atmel_mci.c   2012-07-02 01:31:52.000000000 -0700
> +++ b/drivers/mci/atmel_mci.c   2012-07-15 23:14:02.203872596 -0700
> @@ -76,7 +76,8 @@
>         unsigned int clk_in = clk_get_rate(host->clk);
> 
>         if (clk_ios > 0) {
> -               divider = (clk_in / clk_ios) / 2;
> +               /* don't allow integer truncation to result in too small a
> divider */
> +               divider = (clk_in + 2 * clk_ios - 1) / (2 * clk_ios);

DIV_ROUND_UP(clk_in, clk_ios / 2) instead?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 04:37:16 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 10:37:16 +0200
Subject: [PATCH 1/4] Enable a way to provide the reason for "being here"
In-Reply-To: <1342159489-1474-2-git-send-email-jbe@pengutronix.de>
References: <1342159489-1474-1-git-send-email-jbe@pengutronix.de>
 <1342159489-1474-2-git-send-email-jbe@pengutronix.de>
Message-ID: <20120716083716.GE30009@pengutronix.de>

On Fri, Jul 13, 2012 at 08:04:46AM +0200, Juergen Beisert wrote:
> Many architectures support a way to detect why the bootloader is running.
> This patch adds a global variable to be able to use the cause in some kind of
> shell code to do special things on demand. For example to do an emergency boot,
> when the last boot fails and the watchdog reactivate the hanging system.
> 
> Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
> ---
>  common/Makefile        |    2 +-
>  common/reset_source.c  |   44 ++++++++++++++++++++++++++++++++++++++++++++
>  include/reset_source.h |   27 +++++++++++++++++++++++++++
>  3 files changed, 72 insertions(+), 1 deletion(-)
>  create mode 100644 common/reset_source.c
>  create mode 100644 include/reset_source.h
> 
> diff --git a/common/Makefile b/common/Makefile
> index d99dfa2..baf4539 100644
> --- a/common/Makefile
> +++ b/common/Makefile
> @@ -29,7 +29,7 @@ obj-$(CONFIG_UIMAGE) += uimage.o
>  obj-y += startup.o
>  obj-y += misc.o
>  obj-y += memsize.o
> -obj-$(CONFIG_GLOBALVAR) += globalvar.o
> +obj-$(CONFIG_GLOBALVAR) += globalvar.o reset_source.o

This should be a separate config option which depends on GLOBALVAR.


> +	RESET_WKE,	/* wake-up (some SoCs can handle this) */
> +	RESET_JTAG,	/* JTAG reset */
> +};
> +
> +extern void set_reset_source(enum reset_src_type);

'extern' is not needed in function declarations.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From christian.buettner at rafi.de  Mon Jul 16 04:37:41 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 16 Jul 2012 10:37:41 +0200
Subject: barebox image size
Message-ID: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>

hi,

we need to implement a lot of features into the barebox. Finally the size 
of the image will be bigger than the standard max of 256K.
When i flash an image, bigger than 256K to nand, barebox does not boot 
anymore - if i reduce it to 256K or smaller, everthing works fine.

What do i have to do to use a bigger barebox image size?

- christian
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From s.hauer at pengutronix.de  Mon Jul 16 04:54:18 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 10:54:18 +0200
Subject: barebox image size
In-Reply-To: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
Message-ID: <20120716085418.GG30009@pengutronix.de>

On Mon, Jul 16, 2012 at 10:37:41AM +0200, christian.buettner at rafi.de wrote:
> hi,
> 
> we need to implement a lot of features into the barebox. Finally the size 
> of the image will be bigger than the standard max of 256K.
> When i flash an image, bigger than 256K to nand, barebox does not boot 
> anymore - if i reduce it to 256K or smaller, everthing works fine.
> 
> What do i have to do to use a bigger barebox image size?

Just a guess:

You are using imx_nand_load_image() with a fixed size of 256k. grep for
this function in the current tree and see how the correct image size is
calculated.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 05:10:21 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 11:10:21 +0200
Subject: AT91SAM9263-EK
In-Reply-To: <4FFFEBEB.40605@web.de>
References: <4FFFEBEB.40605@web.de>
Message-ID: <20120716091021.GH30009@pengutronix.de>

On Fri, Jul 13, 2012 at 11:35:39AM +0200, Stutz Sven wrote:
> Hello everybody,
> 
> 
> But everything without success. It's a little bit strange because
> when I execute the command
>     bootm -v /dev/nand0.kernel.bb
> First I get the following output
>         Barebox:/ bootm -v /dev/nand0.kernel.bb
>             Image Name:     Linux-3.4.0
>             OS:                      Linux
>             Architecture:     ARM
>             Type:                   Kernel Image
>             Compression:    uncompressed
>             Data Size:           2034784 Bytes = 1.9 MB
>             Load Address:    20008000
>             Entry Point:        20008000
>         err -74
>         loading os image failed with Out of memory
> 
> and if I try again the same command
>         Barebox:/ bootm -v /dev/nand0.kernel.bb
>         err -74
>         Unknown OS filetype (try -f)
> 
> also if I try to memcpy or uimage I always get this err 74.
> 
> What is this Error 74 (-- Reset level 3)?

-74 is EBADMSG, see include/asm-generic/errno.h. The nand driver throws
this when it can't read due to ecc errors. Something seems wrong with
your nand driver. I remember Jean-Christophe mentioned that the atmel
nand support is currently broken. Could you please try if either:

- barebox v2012.07.0 or
- current master

works for you?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From christian.buettner at rafi.de  Mon Jul 16 05:15:24 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 16 Jul 2012 11:15:24 +0200
Subject: Antwort: Re: barebox image size
In-Reply-To: <20120716085418.GG30009@pengutronix.de>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
Message-ID: <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>

i am using:

static inline struct device_d *imx53_add_nand(struct 
imx_nand_platform_data *pdata)
{
        struct resource res[] = {
                {
                        .start = MX53_NFC_BASE_ADDR,
                        .size = SZ_4K,
                        .flags = IORESOURCE_MEM,
                }, {
                        .start = MX53_NFC_AXI_BASE_ADDR,
                        .size = SZ_4K,
                        .flags = IORESOURCE_MEM,
                },
        };
        struct device_d *dev = xzalloc(sizeof(*dev));

        dev->resource = xzalloc(sizeof(struct resource) * 
ARRAY_SIZE(res));
        memcpy(dev->resource, res, sizeof(struct resource) * 
ARRAY_SIZE(res));
        dev->num_resources = ARRAY_SIZE(res);
        strcpy(dev->name, "imx_nand");
        dev->id = -1;
        dev->platform_data = pdata;

        register_device(dev);

        return dev;
}

with imx_nand_platform_data parameter:
static struct imx_nand_platform_data tx53_nand_pdata =
{
    .width      = 1,
    .hw_ecc     = 1,
    .flash_bbt  = 1,
};

imx_nand_load_image() is never used in my imx53 board init code.. is this 
the fault?

- christian



Von:    Sascha Hauer <s.hauer at pengutronix.de>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  16.07.2012 10:54
Betreff:        Re: barebox image size



On Mon, Jul 16, 2012 at 10:37:41AM +0200, christian.buettner at rafi.de 
wrote:
> hi,
> 
> we need to implement a lot of features into the barebox. Finally the 
size 
> of the image will be bigger than the standard max of 256K.
> When i flash an image, bigger than 256K to nand, barebox does not boot 
> anymore - if i reduce it to 256K or smaller, everthing works fine.
> 
> What do i have to do to use a bigger barebox image size?

Just a guess:

You are using imx_nand_load_image() with a fixed size of 256k. grep for
this function in the current tree and see how the correct image size is
calculated.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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From eric at eukrea.com  Mon Jul 16 05:20:03 2012
From: eric at eukrea.com (Eric =?ISO-8859-1?B?QuluYXJk?=)
Date: Mon, 16 Jul 2012 11:20:03 +0200
Subject: barebox image size
In-Reply-To: <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
Message-ID: <20120716112003.78c0737b@eb-e6520>

Hi Christian,

Le Mon, 16 Jul 2012 11:15:24 +0200,
christian.buettner at rafi.de a ?crit :
> imx_nand_load_image() is never used in my imx53 board init code.. is this 
> the fault?
> 
FWIW I had the same issue on an i.MX51 : I didn't yet had the time to
investigate.

Eric


From s.hauer at pengutronix.de  Mon Jul 16 05:21:01 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 11:21:01 +0200
Subject: Antwort: Re: barebox image size
In-Reply-To: <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
Message-ID: <20120716092101.GI30009@pengutronix.de>

On Mon, Jul 16, 2012 at 11:15:24AM +0200, christian.buettner at rafi.de wrote:
> 
> imx_nand_load_image() is never used in my imx53 board init code.. is this 
> the fault?
> 

On i.MX53 there might be a similar issue. You probably have something
like this in your board:

struct imx_flash_header_v2 __flash_header_section flash_header = {
	.header.tag		= IVT_HEADER_TAG,
	.header.length		= cpu_to_be16(32),
	.header.version		= IVT_VERSION,

	.entry			= APP_DEST + 0x1000,
	.dcd_ptr		= APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, dcd),
	.boot_data_ptr		= APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, boot_data),
	.self			= APP_DEST + 0x400,

	.boot_data.start	= APP_DEST,
	.boot_data.size		= DCD_BAREBOX_SIZE,

.boot_data.size is the interesting field. What do you have here?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From christian.buettner at rafi.de  Mon Jul 16 05:37:59 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 16 Jul 2012 11:37:59 +0200
Subject: Antwort: Re: Antwort: Re: barebox image size
In-Reply-To: <20120716092101.GI30009@pengutronix.de>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
Message-ID: <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>

here it is:

struct imx_flash_header_v2 __flash_header_section flash_header =
{
    .header.tag         = IVT_HEADER_TAG,
    .header.length      = cpu_to_be16(32),
    .header.version     = IVT_VERSION,

    .entry              = APP_DEST + 0x1000,
    .dcd_ptr            = APP_DEST + 0x400 + offsetof(struct 
imx_flash_header_v2, dcd),
    .boot_data_ptr      = APP_DEST + 0x400 + offsetof(struct 
imx_flash_header_v2, boot_data),
    .self               = APP_DEST + 0x400,

    .boot_data.start    = APP_DEST,
    .boot_data.size     = 0x40000,

    .dcd.header.tag     = DCD_HEADER_TAG,
    .dcd.header.length  = cpu_to_be16(sizeof(struct imx_dcd) + 
sizeof(dcd_entry)),
    .dcd.header.version = DCD_VERSION,

    .dcd.command.tag    = DCD_COMMAND_WRITE_TAG,
    .dcd.command.length = cpu_to_be16(sizeof(struct imx_dcd_command) + 
sizeof(dcd_entry)),
    .dcd.command.param  = DCD_COMMAND_WRITE_PARAM,
};


there is another struct:

struct imx_fcb_header __flash_header_fcb fcb_entry =
{
    .fcb_marker = 0x20424346,
    .fcb_version = 0x01,
    .st_pg_prm = 0x0,
    .st_pg_sec = 0x0,
    .reserved3[0] = 0x6b,
    .reserved3[1] = 0x6b,
    .st_pg_dbbt = 0x0,
    .bbm_off_main = 0x0,
    .bi_swap = 0x0,
    .bbm_off_spare = 0x0,
};



Von:    Sascha Hauer <s.hauer at pengutronix.de>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  16.07.2012 11:21
Betreff:        Re: Antwort: Re: barebox image size



On Mon, Jul 16, 2012 at 11:15:24AM +0200, christian.buettner at rafi.de 
wrote:
> 
> imx_nand_load_image() is never used in my imx53 board init code.. is 
this 
> the fault?
> 

On i.MX53 there might be a similar issue. You probably have something
like this in your board:

struct imx_flash_header_v2 __flash_header_section flash_header = {
                 .header.tag                             = IVT_HEADER_TAG,
                 .header.length                          = 
cpu_to_be16(32),
                 .header.version                                 = 
IVT_VERSION,

                 .entry                                          = 
APP_DEST + 0x1000,
                 .dcd_ptr                                = APP_DEST + 
0x400 + offsetof(struct imx_flash_header_v2, dcd),
                 .boot_data_ptr                          = APP_DEST + 
0x400 + offsetof(struct imx_flash_header_v2, boot_data),
                 .self                                           = 
APP_DEST + 0x400,

                 .boot_data.start                = APP_DEST,
                 .boot_data.size                                 = 
DCD_BAREBOX_SIZE,

.boot_data.size is the interesting field. What do you have here?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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From christian.kapeller at cmotion.eu  Mon Jul 16 05:53:58 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 11:53:58 +0200
Subject: [PATCH 1/2] tx51: ensure eth phy resets properly by driving reset pin
 explicitly.
In-Reply-To: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
References: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <1342432439-27455-2-git-send-email-christian.kapeller@cmotion.eu>


diff --git a/arch/arm/boards/karo-tx51/tx51.c b/arch/arm/boards/karo-tx51/tx51.c
index 096683a..d862a68 100644
--- a/arch/arm/boards/karo-tx51/tx51.c
+++ b/arch/arm/boards/karo-tx51/tx51.c
@@ -205,6 +205,12 @@ static inline void tx51_fec_init(void)
 	}
 
 	/*
+	 *Turn off phy power, be cautious and wait
+	 */
+	gpio_set_value(TX51_FEC_PHY_PWR, 0);
+	mdelay(20);
+
+	/*
 	 *Turn on phy power, leave in reset state
 	 */
 	gpio_set_value(TX51_FEC_PHY_PWR, 1);
@@ -212,7 +218,7 @@ static inline void tx51_fec_init(void)
 	/*
 	 * Wait some time to let the phy activate the internal regulator
 	 */
-	mdelay(10);
+	mdelay(20);
 
 	/*
 	 * Deassert reset, phy latches the rest of bootstrap pins
-- 
1.7.5.4



From christian.kapeller at cmotion.eu  Mon Jul 16 05:53:59 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 11:53:59 +0200
Subject: [PATCH 2/2] tx51: Disable kallsyms. It prevents the board from
 booting.
In-Reply-To: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
References: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <1342432439-27455-3-git-send-email-christian.kapeller@cmotion.eu>


diff --git a/arch/arm/configs/tx51stk5_defconfig b/arch/arm/configs/tx51stk5_defconfig
index 7fff0f0..e1796b9 100644
--- a/arch/arm/configs/tx51stk5_defconfig
+++ b/arch/arm/configs/tx51stk5_defconfig
@@ -32,7 +32,6 @@ CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
 CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
 CONFIG_MEMORY_LAYOUT_DEFAULT=y
 CONFIG_MALLOC_TLSF=y
-CONFIG_KALLSYMS=y
 CONFIG_LONGHELP=y
 CONFIG_SHELL_HUSH=y
 CONFIG_GLOB=y
-- 
1.7.5.4



From christian.kapeller at cmotion.eu  Mon Jul 16 05:53:57 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 11:53:57 +0200
Subject: [PATCH 0/2] Misc Karo TX51 fixes
Message-ID: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>

The Karo TX51 port in the master tree is currently not booting. These patches
fix it by removing the 'kallsyms' config option.

Another issue fixed is unreliable resetting of the ethernet phy chip.

Christian Kapeller (2):
  tx51: ensure eth phy resets properly by driving reset pin explicitly.
  tx51: Disable kallsyms. It prevents the board from booting.

 arch/arm/boards/karo-tx51/tx51.c    |    8 +++++++-
 arch/arm/configs/tx51stk5_defconfig |    1 -
 2 files changed, 7 insertions(+), 2 deletions(-)

-- 
1.7.5.4



From s.hauer at pengutronix.de  Mon Jul 16 06:30:54 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 12:30:54 +0200
Subject: Antwort: Re: Antwort: Re: barebox image size
In-Reply-To: <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
 <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
Message-ID: <20120716103054.GJ30009@pengutronix.de>

On Mon, Jul 16, 2012 at 11:37:59AM +0200, christian.buettner at rafi.de wrote:
> here it is:
> 
> struct imx_flash_header_v2 __flash_header_section flash_header =
> {
>     .header.tag         = IVT_HEADER_TAG,
>     .header.length      = cpu_to_be16(32),
>     .header.version     = IVT_VERSION,
> 
>     .entry              = APP_DEST + 0x1000,
>     .dcd_ptr            = APP_DEST + 0x400 + offsetof(struct 
> imx_flash_header_v2, dcd),
>     .boot_data_ptr      = APP_DEST + 0x400 + offsetof(struct 
> imx_flash_header_v2, boot_data),
>     .self               = APP_DEST + 0x400,
> 
>     .boot_data.start    = APP_DEST,
>     .boot_data.size     = 0x40000,

And here you have the magic 256k. Please use DCD_BAREBOX_SIZE instead.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From christian.kapeller at cmotion.eu  Mon Jul 16 07:28:13 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 13:28:13 +0200
Subject: tx51 ethernet regression
Message-ID: <5003FACD.80400@cmotion.eu>

Hi,

I recently came to update my barebox port based on the karo tx51 imx
module from v2012.03.0 to v2012.07.0.

I discovered, that, when trying to use the ethernet connection, I more
often than not get frame errors reported by the FEC.

--snip--
barebox at Ka-Ro tx51:/ dhcp
phy0: Link is up - 1000/Full
error frame: 0x97b961c0 0x00000890
error frame: 0x97b96188 0x00000882
DHCP client bound to address 10.41.14.147
--snap--

The errors range from 'non octet aligned frame' over 'Fifo overrun' to
timeouts. It renders the ethernet support unusable. Small images may
work but, require the one and other retry.

One thing that catches my eye is that the auto negotioation resulted in
a 1000MBit link. The imx fec does only support 100MBit. I forced the
link to be set to 10MBit by declaring xcv_type=MII10 in the
fec_platform_data structure. Interestingly the link is now reported as
100MBit, and shows the same behaviour.

Another thing I checked was the changed pad definitions in commit
2bdc9f57a86dff41cfc1f87b644a2e53fdcce2b6. Not only the type of the pad
data structure changed, but also some of their configuration as well.
For example, pads that were configured with FEC_PAD_CTL, now have other
settings enabled.

I'reverted the pad changes, but still no luck. Auto negtiation starts,
but I don't seem to get any packets.

So my question is: What change since v2012.03.0 could cause this kind of
behaviour?

Regards
Christian


-- 
Christian Kapeller
cmotion GmbH
Kriehubergasse 16
1050 Wien / Austria
http://www.cmotion.eu

christian.kapeller at cmotion.eu
Phone: +43 1 789 1096 38



From christian.kapeller at cmotion.eu  Mon Jul 16 07:40:28 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 13:40:28 +0200
Subject: [PATCH 0/2] imx: add matrix keypad (kpp) input driver
Message-ID: <1342438830-30214-1-git-send-email-christian.kapeller@cmotion.eu>

This patchset adds support for the imx matrix keypad peripheral (kpp). I've
fleshed out the linux keypad driver, and remodeled it after the gpio_keys
driver.

Currently platform helper functions are only provided for the imx51.

Christian Kapeller (2):
  input: Add i.MX matrix keypad driver
  input: add i.MX51 platform code for matrix keypad driver

 arch/arm/mach-imx/devices.c                    |    5 +
 arch/arm/mach-imx/include/mach/devices-imx51.h |    4 +
 arch/arm/mach-imx/include/mach/devices.h       |    2 +
 drivers/input/Kconfig                          |   13 +
 drivers/input/Makefile                         |    1 +
 drivers/input/imx_keypad.c                     |  463 ++++++++++++++++++++++++
 include/matrix_keypad.h                        |   59 +++
 7 files changed, 547 insertions(+), 0 deletions(-)
 create mode 100644 drivers/input/imx_keypad.c
 create mode 100644 include/matrix_keypad.h

-- 
1.7.5.4



From christian.kapeller at cmotion.eu  Mon Jul 16 07:40:30 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 13:40:30 +0200
Subject: [PATCH 2/2] input: add i.MX51 platform code for matrix keypad driver
In-Reply-To: <1342438830-30214-1-git-send-email-christian.kapeller@cmotion.eu>
References: <1342438830-30214-1-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <1342438830-30214-3-git-send-email-christian.kapeller@cmotion.eu>


diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c
index 6cd50f3..8120f56 100644
--- a/arch/arm/mach-imx/devices.c
+++ b/arch/arm/mach-imx/devices.c
@@ -52,3 +52,8 @@ struct device_d *imx_add_esdhc(void *base, int id, struct esdhc_platform_data *p
 {
 	return imx_add_device("imx-esdhc", id, base, 0x1000, pdata);
 }
+
+struct device_d *imx_add_kpp(void *base, struct matrix_keymap_data *pdata)
+{
+       return imx_add_device("imx-kpp", -1, base, 0x1000, pdata);
+}
diff --git a/arch/arm/mach-imx/include/mach/devices-imx51.h b/arch/arm/mach-imx/include/mach/devices-imx51.h
index dbf5862..3d7ff72 100644
--- a/arch/arm/mach-imx/include/mach/devices-imx51.h
+++ b/arch/arm/mach-imx/include/mach/devices-imx51.h
@@ -89,3 +89,7 @@ static inline struct device_d *imx51_add_nand(struct imx_nand_platform_data *pda
 	return dev;
 }
 
+static inline struct device_d *imx51_add_kpp(struct matrix_keymap_data *pdata)
+{
+	return imx_add_kpp((void *)MX51_KPP_BASE_ADDR, pdata);
+}
diff --git a/arch/arm/mach-imx/include/mach/devices.h b/arch/arm/mach-imx/include/mach/devices.h
index f0f730a..da91646 100644
--- a/arch/arm/mach-imx/include/mach/devices.h
+++ b/arch/arm/mach-imx/include/mach/devices.h
@@ -1,5 +1,6 @@
 
 #include <fec.h>
+#include <matrix_keypad.h>
 #include <i2c/i2c.h>
 #include <mach/spi.h>
 #include <mach/imx-nand.h>
@@ -16,4 +17,5 @@ struct device_d *imx_add_fb(void *base, struct imx_fb_platform_data *pdata);
 struct device_d *imx_add_ipufb(void *base, struct imx_ipu_fb_platform_data *pdata);
 struct device_d *imx_add_mmc(void *base, int id, void *pdata);
 struct device_d *imx_add_esdhc(void *base, int id, struct esdhc_platform_data *pdata);
+struct device_d *imx_add_kpp(void *base, struct matrix_keymap_data *pdata);
 
-- 
1.7.5.4



From christian.kapeller at cmotion.eu  Mon Jul 16 07:40:29 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 13:40:29 +0200
Subject: [PATCH 1/2] input: Add i.MX matrix keypad driver
In-Reply-To: <1342438830-30214-1-git-send-email-christian.kapeller@cmotion.eu>
References: <1342438830-30214-1-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <1342438830-30214-2-git-send-email-christian.kapeller@cmotion.eu>


 create mode 100644 drivers/input/imx_keypad.c
 create mode 100644 include/matrix_keypad.h

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index b488553..a5aec03 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -16,4 +16,17 @@ config KEYBOARD_GPIO
 	  setup logic must also provide a platform device,
 	  with configuration data saying which GPIOs are used.
 
+config KEYBOARD_IMX_KEYPAD
+	bool "IMX Keypad"
+	depends on ARCH_IMX
+	select POLLER 
+	help
+	  This driver implements support for buttons connected
+	  to the IMX keypad matrix.
+
+	  Say Y here if your device has buttons connected
+	  to the IMX keypad matrix.  Your board-specific
+	  setup logic must also provide a 'matrix_keymap_data' structure,
+	  defining the used keys.
+
 endmenu
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 7784d52..3d105cc 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_KEYBOARD_GPIO) += gpio_keys.o
+obj-$(CONFIG_KEYBOARD_IMX_KEYPAD) += imx_keypad.o
diff --git a/drivers/input/imx_keypad.c b/drivers/input/imx_keypad.c
new file mode 100644
index 0000000..bd9c6dc
--- /dev/null
+++ b/drivers/input/imx_keypad.c
@@ -0,0 +1,463 @@
+/*
+ * Driver for the IMX keypad port.
+ * Copyright (C) 2009 Alberto Panizzo <maramaopercheseimorto at gmail.com>
+ * Copyright (C) 2012 Christian Kapeller <christian.kapeller at cmotion.eu>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/*
+	To use the imx keypad driver, you have to define the keys in your platform
+	code.
+
+	1. Configure the imx keypad row & column pads used by your board
+	2. Define the keys you want to use:
+
+	#define BTN_1         0x101
+	#define BTN_2         0x102
+	#define BTN_3         0x103
+
+	static uint32_t keypad_codes[] = {
+		// specify your keymap with KEY(row, col, keycode)
+		KEY(0, 1, BTN_1),
+		KEY(1, 0, BTN_2),
+		KEY(1, 1, BTN_3),
+	};
+
+	static struct matrix_keymap_data keypad_data = {
+		.keymap = keypad_codes,
+		.keymap_size = ARRAY_SIZE(keypad_codes),
+	};
+
+	3. Add the keypad to your platform in your devices init callback:
+
+	imx51_add_kpp(&keypad_data);
+
+	4. Compile , flash, and enjoy
+*/
+
+#include <common.h>
+#include <errno.h>
+#include <init.h>
+#include <io.h>
+#include <poller.h>
+#include <kfifo.h>
+#include <malloc.h>
+#include <matrix_keypad.h>
+
+/*
+ * Keypad Controller registers (halfword)
+ */
+#define KPCR		0x00 /* Keypad Control Register */
+
+#define KPSR		0x02 /* Keypad Status Register */
+#define KBD_STAT_KPKD	(0x1 << 0) /* Key Press Interrupt Status bit (w1c) */
+#define KBD_STAT_KPKR	(0x1 << 1) /* Key Release Interrupt Status bit (w1c) */
+#define KBD_STAT_KDSC	(0x1 << 2) /* Key Depress Synch Chain Status bit (w1c)*/
+#define KBD_STAT_KRSS	(0x1 << 3) /* Key Release Synch Status bit (w1c)*/
+#define KBD_STAT_KDIE	(0x1 << 8) /* Key Depress Interrupt Enable Status bit */
+#define KBD_STAT_KRIE	(0x1 << 9) /* Key Release Interrupt Enable */
+#define KBD_STAT_KPPEN	(0x1 << 10) /* Keypad Clock Enable */
+
+#define KDDR		0x04 /* Keypad Data Direction Register */
+#define KPDR		0x06 /* Keypad Data Register */
+
+#define MAX_MATRIX_KEY_ROWS	8
+#define MAX_MATRIX_KEY_COLS	8
+#define MATRIX_ROW_SHIFT	3
+
+#define MAX_MATRIX_KEY_NUM	(MAX_MATRIX_KEY_ROWS * MAX_MATRIX_KEY_COLS)
+
+struct imx_keypad {
+	struct clk *clk;
+	struct device_d *dev;
+	struct console_device cdev;
+	void __iomem *mmio_base;
+
+	/* optional */
+	int fifo_size;
+
+	struct kfifo *recv_fifo;
+	struct poller_struct poller;
+
+	/*
+	 * The matrix is stable only if no changes are detected after
+	 * IMX_KEYPAD_SCANS_FOR_STABILITY scans
+	 */
+#define IMX_KEYPAD_SCANS_FOR_STABILITY 3
+	int			stable_count;
+
+	/* Masks for enabled rows/cols */
+	unsigned short		rows_en_mask;
+	unsigned short		cols_en_mask;
+
+	unsigned short		keycodes[MAX_MATRIX_KEY_NUM];
+
+	/*
+	 * Matrix states:
+	 * -stable: achieved after a complete debounce process.
+	 * -unstable: used in the debouncing process.
+	 */
+	unsigned short		matrix_stable_state[MAX_MATRIX_KEY_COLS];
+	unsigned short		matrix_unstable_state[MAX_MATRIX_KEY_COLS];
+};
+
+static inline struct imx_keypad *
+poller_to_imx_kp_pdata(struct poller_struct *poller)
+{
+	return container_of(poller, struct imx_keypad, poller);
+}
+
+static inline struct imx_keypad *
+cdev_to_imx_kp_pdata(struct console_device *cdev)
+{
+	return container_of(cdev, struct imx_keypad, cdev);
+}
+
+static int imx_keypad_tstc(struct console_device *cdev)
+{
+	struct imx_keypad *kp = cdev_to_imx_kp_pdata(cdev);
+
+	return (kfifo_len(kp->recv_fifo) == 0) ? 0 : 1;
+}
+
+static int imx_keypad_getc(struct console_device *cdev)
+{
+	int code = 0;
+	struct imx_keypad *kp = cdev_to_imx_kp_pdata(cdev);
+
+	kfifo_get(kp->recv_fifo, (u_char*)&code, sizeof(int));
+	return code;
+}
+
+/* Scan the matrix and return the new state in *matrix_volatile_state. */
+static void imx_keypad_scan_matrix(struct imx_keypad *keypad,
+				  unsigned short *matrix_volatile_state)
+{
+	int col;
+	unsigned short reg_val;
+
+	for (col = 0; col < MAX_MATRIX_KEY_COLS; col++) {
+		if ((keypad->cols_en_mask & (1 << col)) == 0)
+			continue;
+		/*
+		 * Discharge keypad capacitance:
+		 * 2. write 1s on column data.
+		 * 3. configure columns as totem-pole to discharge capacitance.
+		 * 4. configure columns as open-drain.
+		 */
+		reg_val = readw(keypad->mmio_base + KPDR);
+		reg_val |= 0xff00;
+		writew(reg_val, keypad->mmio_base + KPDR);
+
+		reg_val = readw(keypad->mmio_base + KPCR);
+		reg_val &= ~((keypad->cols_en_mask & 0xff) << 8);
+		writew(reg_val, keypad->mmio_base + KPCR);
+
+		udelay(2);
+
+		reg_val = readw(keypad->mmio_base + KPCR);
+		reg_val |= (keypad->cols_en_mask & 0xff) << 8;
+		writew(reg_val, keypad->mmio_base + KPCR);
+
+		/*
+		 * 5. Write a single column to 0, others to 1.
+		 * 6. Sample row inputs and save data.
+		 * 7. Repeat steps 2 - 6 for remaining columns.
+		 */
+		reg_val = readw(keypad->mmio_base + KPDR);
+		reg_val &= ~(1 << (8 + col));
+		writew(reg_val, keypad->mmio_base + KPDR);
+
+		/*
+		 * Delay added to avoid propagating the 0 from column to row
+		 * when scanning.
+		 */
+		udelay(5);
+
+		/*
+		 * 1s in matrix_volatile_state[col] means key pressures
+		 * throw data from non enabled rows.
+		 */
+		reg_val = readw(keypad->mmio_base + KPDR);
+		matrix_volatile_state[col] = (~reg_val) & keypad->rows_en_mask;
+	}
+
+	/*
+	 * Return in standby mode:
+	 * 9. write 0s to columns
+	 */
+	reg_val = readw(keypad->mmio_base + KPDR);
+	reg_val &= 0x00ff;
+	writew(reg_val, keypad->mmio_base + KPDR);
+}
+
+/*
+ * Compare the new matrix state (volatile) with the stable one stored in
+ * keypad->matrix_stable_state and fire events if changes are detected.
+ */
+static void imx_keypad_fire_events(struct imx_keypad *keypad,
+				   unsigned short *matrix_volatile_state)
+{
+	int row, col;
+
+	for (col = 0; col < MAX_MATRIX_KEY_COLS; col++) {
+		unsigned short bits_changed;
+		int code;
+
+		if ((keypad->cols_en_mask & (1 << col)) == 0)
+			continue; /* Column is not enabled */
+
+		bits_changed = keypad->matrix_stable_state[col] ^
+						matrix_volatile_state[col];
+
+		if (bits_changed == 0)
+			continue; /* Column does not contain changes */
+
+		for (row = 0; row < MAX_MATRIX_KEY_ROWS; row++) {
+			if ((keypad->rows_en_mask & (1 << row)) == 0)
+				continue; /* Row is not enabled */
+			if ((bits_changed & (1 << row)) == 0)
+				continue; /* Row does not contain changes */
+
+			code = MATRIX_SCAN_CODE(row, col, MATRIX_ROW_SHIFT);
+
+			kfifo_put(keypad->recv_fifo, (u_char*)(&keypad->keycodes[code]), sizeof(int));
+
+			pr_debug("Event code: %d, val: %d",
+				keypad->keycodes[code],
+				matrix_volatile_state[col] & (1 << row));
+		}
+	}
+}
+
+/*
+ * imx_keypad_check_for_events is the timer handler.
+ */
+static void imx_keypad_check_for_events(struct poller_struct *poller)
+{
+	struct imx_keypad *keypad = (struct imx_keypad *) poller_to_imx_kp_pdata(poller);
+	unsigned short matrix_volatile_state[MAX_MATRIX_KEY_COLS];
+	unsigned short reg_val;
+	bool state_changed, is_zero_matrix;
+	int i;
+
+	memset(matrix_volatile_state, 0, sizeof(matrix_volatile_state));
+
+	imx_keypad_scan_matrix(keypad, matrix_volatile_state);
+
+	state_changed = false;
+	for (i = 0; i < MAX_MATRIX_KEY_COLS; i++) {
+		if ((keypad->cols_en_mask & (1 << i)) == 0)
+			continue;
+
+		if (keypad->matrix_unstable_state[i] ^ matrix_volatile_state[i]) {
+			state_changed = true;
+			break;
+		}
+	}
+
+	/*
+	 * If the matrix state is changed from the previous scan
+	 *   (Re)Begin the debouncing process, saving the new state in
+	 *    keypad->matrix_unstable_state.
+	 * else
+	 *   Increase the count of number of scans with a stable state.
+	 */
+	if (state_changed) {
+		memcpy(keypad->matrix_unstable_state, matrix_volatile_state,
+			sizeof(matrix_volatile_state));
+		keypad->stable_count = 0;
+	} else
+		keypad->stable_count++;
+
+	/*
+	 * If the matrix is not as stable as we want reschedule scan
+	 * in the near future.
+	 */
+	if (keypad->stable_count < IMX_KEYPAD_SCANS_FOR_STABILITY) {
+		return;
+	}
+
+	/*
+	 * If the matrix state is stable, fire the events and save the new
+	 * stable state. Note, if the matrix is kept stable for longer
+	 * (keypad->stable_count > IMX_KEYPAD_SCANS_FOR_STABILITY) all
+	 * events have already been generated.
+	 */
+	if (keypad->stable_count == IMX_KEYPAD_SCANS_FOR_STABILITY) {
+		imx_keypad_fire_events(keypad, matrix_volatile_state);
+
+		memcpy(keypad->matrix_stable_state, matrix_volatile_state,
+			sizeof(matrix_volatile_state));
+	}
+
+	is_zero_matrix = true;
+	for (i = 0; i < MAX_MATRIX_KEY_COLS; i++) {
+		if (matrix_volatile_state[i] != 0) {
+			is_zero_matrix = false;
+			break;
+		}
+	}
+
+
+	if (is_zero_matrix) {
+		/*
+		 * All keys have been released. Enable only the KDI
+		 * interrupt for future key presses (clear the KDI
+		 * status bit and its sync chain before that).
+		 */
+		reg_val = readw(keypad->mmio_base + KPSR);
+		reg_val |= KBD_STAT_KPKD | KBD_STAT_KDSC;
+		writew(reg_val, keypad->mmio_base + KPSR);
+
+		reg_val = readw(keypad->mmio_base + KPSR);
+		reg_val |= KBD_STAT_KDIE;
+		reg_val &= ~KBD_STAT_KRIE;
+		writew(reg_val, keypad->mmio_base + KPSR);
+	} else {
+		/*
+		 * Some keys are still pressed. Schedule a rescan in
+		 * attempt to detect multiple key presses and enable
+		 * the KRI interrupt to react quickly to key release
+		 * event.
+		 */
+		reg_val = readw(keypad->mmio_base + KPSR);
+		reg_val |= KBD_STAT_KPKR | KBD_STAT_KRSS;
+		writew(reg_val, keypad->mmio_base + KPSR);
+
+		reg_val = readw(keypad->mmio_base + KPSR);
+		reg_val |= KBD_STAT_KRIE;
+		reg_val &= ~KBD_STAT_KDIE;
+		writew(reg_val, keypad->mmio_base + KPSR);
+	}
+}
+
+static void imx_keypad_config(struct imx_keypad *keypad)
+{
+	unsigned short reg_val;
+
+	/*
+	 * Include enabled rows in interrupt generation (KPCR[7:0])
+	 * Configure keypad columns as open-drain (KPCR[15:8])
+	 */
+	reg_val = readw(keypad->mmio_base + KPCR);
+	reg_val |= keypad->rows_en_mask & 0xff;		/* rows */
+	reg_val |= (keypad->cols_en_mask & 0xff) << 8;	/* cols */
+	writew(reg_val, keypad->mmio_base + KPCR);
+
+	/* Write 0's to KPDR[15:8] (Colums) */
+	reg_val = readw(keypad->mmio_base + KPDR);
+	reg_val &= 0x00ff;
+	writew(reg_val, keypad->mmio_base + KPDR);
+
+	/* Configure columns as output, rows as input (KDDR[15:0]) */
+	writew(0xff00, keypad->mmio_base + KDDR);
+
+	/*
+	 * Clear Key Depress and Key Release status bit.
+	 * Clear both synchronizer chain.
+	 */
+	reg_val = readw(keypad->mmio_base + KPSR);
+	reg_val |= KBD_STAT_KPKR | KBD_STAT_KPKD |
+		   KBD_STAT_KDSC | KBD_STAT_KRSS;
+	writew(reg_val, keypad->mmio_base + KPSR);
+
+	/* Enable KDI and disable KRI (avoid false release events). */
+	reg_val |= KBD_STAT_KDIE;
+	reg_val &= ~KBD_STAT_KRIE;
+	writew(reg_val, keypad->mmio_base + KPSR);
+}
+
+static void imx_keypad_inhibit(struct imx_keypad *keypad)
+{
+	unsigned short reg_val;
+
+	/* Inhibit KDI and KRI interrupts. */
+	reg_val = readw(keypad->mmio_base + KPSR);
+	reg_val &= ~(KBD_STAT_KRIE | KBD_STAT_KDIE);
+	writew(reg_val, keypad->mmio_base + KPSR);
+
+	/* Colums as open drain and disable all rows */
+	writew(0xff00, keypad->mmio_base + KPCR);
+}
+
+static int __init imx_keypad_probe(struct device_d *dev)
+{
+	struct imx_keypad *keypad;
+	const struct matrix_keymap_data *keymap_data = dev->platform_data;
+	struct console_device *cdev;
+	int error, i;
+
+	keypad = xzalloc(sizeof(struct imx_keypad));
+	if (!keypad) {
+		pr_err("not enough memory for driver data\n");
+		error = -ENOMEM;
+	}
+
+	if (!keymap_data) {
+		pr_err("no keymap defined\n");
+		return -ENODEV;
+	}
+
+	keypad->dev = dev;
+	keypad->mmio_base = dev_request_mem_region(dev, 0);
+
+	if(!keypad->fifo_size)
+		keypad->fifo_size = 50;
+
+	keypad->recv_fifo = kfifo_alloc(keypad->fifo_size);
+
+	/* Search for rows and cols enabled */
+	for (i = 0; i < keymap_data->keymap_size; i++) {
+		keypad->rows_en_mask |= 1 << KEY_ROW(keymap_data->keymap[i]);
+		keypad->cols_en_mask |= 1 << KEY_COL(keymap_data->keymap[i]);
+	}
+
+	if (keypad->rows_en_mask > ((1 << MAX_MATRIX_KEY_ROWS) - 1) ||
+	   keypad->cols_en_mask > ((1 << MAX_MATRIX_KEY_COLS) - 1)) {
+		pr_err("invalid key data (too many rows or colums)\n");
+		error = -EINVAL;
+		//goto failed_clock_put;
+	}
+	pr_debug("enabled rows mask: %x\n", keypad->rows_en_mask);
+	pr_debug("enabled cols mask: %x\n", keypad->cols_en_mask);
+
+	matrix_keypad_build_keymap(keymap_data, MATRIX_ROW_SHIFT,
+				keypad->keycodes);
+
+	imx_keypad_config(keypad);
+
+	/* Ensure that the keypad will stay dormant until opened */
+	imx_keypad_inhibit(keypad);
+
+	keypad->poller.func = imx_keypad_check_for_events;
+
+	cdev = &keypad->cdev;
+	dev->type_data = cdev;
+	cdev->dev = dev;
+	cdev->tstc = imx_keypad_tstc;
+	cdev->getc = imx_keypad_getc;
+	cdev->f_caps = CONSOLE_STDIN;
+	cdev->f_active = CONSOLE_STDIN;
+
+	console_register(&keypad->cdev);
+
+	return poller_register(&keypad->poller);
+
+}
+
+static struct driver_d imx_keypad_driver = {
+	.name   = "imx-kpp",
+	.probe  = imx_keypad_probe,
+};
+
+static int imx_keypad_init(void)
+{
+	register_driver(&imx_keypad_driver);
+	return 0;
+}
+device_initcall(imx_keypad_init);
diff --git a/include/matrix_keypad.h b/include/matrix_keypad.h
new file mode 100644
index 0000000..60de428
--- /dev/null
+++ b/include/matrix_keypad.h
@@ -0,0 +1,59 @@
+#ifndef _MATRIX_KEYPAD_H
+#define _MATRIX_KEYPAD_H
+
+#define MATRIX_MAX_ROWS		32
+#define MATRIX_MAX_COLS		32
+
+#define KEY(row, col, val)	((((row) & (MATRIX_MAX_ROWS - 1)) << 24) |\
+				 (((col) & (MATRIX_MAX_COLS - 1)) << 16) |\
+				 ((val) & 0xffff))
+
+#define KEY_ROW(k)		(((k) >> 24) & 0xff)
+#define KEY_COL(k)		(((k) >> 16) & 0xff)
+#define KEY_VAL(k)		((k) & 0xffff)
+
+#define MATRIX_SCAN_CODE(row, col, row_shift)	(((row) << (row_shift)) + (col))
+
+/**
+ * struct matrix_keymap_data - keymap for matrix keyboards
+ * @keymap: pointer to array of uint32 values encoded with KEY() macro
+ *	representing keymap
+ * @keymap_size: number of entries (initialized) in this keymap
+ *
+ * This structure is supposed to be used by platform code to supply
+ * keymaps to drivers that implement matrix-like keypads/keyboards.
+ */
+struct matrix_keymap_data {
+	const uint32_t *keymap;
+	unsigned int	keymap_size;
+};
+
+/**
+ * matrix_keypad_build_keymap - convert platform keymap into matrix keymap
+ * @keymap_data: keymap supplied by the platform code
+ * @row_shift: number of bits to shift row value by to advance to the next
+ * line in the keymap
+ * @keymap: expanded version of keymap that is suitable for use by
+ * matrix keyboad driver
+ * This function converts platform keymap (encoded with KEY() macro) into
+ * an array of keycodes that is suitable for using in a standard matrix
+ * keyboard driver that uses row and col as indices.
+ */
+static inline void
+matrix_keypad_build_keymap(const struct matrix_keymap_data *keymap_data,
+			   unsigned int row_shift,
+			   unsigned short *keymap)
+{
+	int i;
+
+	for (i = 0; i < keymap_data->keymap_size; i++) {
+		unsigned int key = keymap_data->keymap[i];
+		unsigned int row = KEY_ROW(key);
+		unsigned int col = KEY_COL(key);
+		unsigned short code = KEY_VAL(key);
+
+		keymap[MATRIX_SCAN_CODE(row, col, row_shift)] = code;
+	}
+}
+
+#endif /* _MATRIX_KEYPAD_H */
-- 
1.7.5.4



From eric at eukrea.com  Mon Jul 16 07:44:06 2012
From: eric at eukrea.com (Eric =?ISO-8859-1?B?QuluYXJk?=)
Date: Mon, 16 Jul 2012 13:44:06 +0200
Subject: tx51 ethernet regression
In-Reply-To: <5003FACD.80400@cmotion.eu>
References: <5003FACD.80400@cmotion.eu>
Message-ID: <20120716134406.57843f19@eb-e6520>

Hi Christian,

Le Mon, 16 Jul 2012 13:28:13 +0200,
Christian Kapeller <christian.kapeller at cmotion.eu> a ?crit :
> I recently came to update my barebox port based on the karo tx51 imx
> module from v2012.03.0 to v2012.07.0.
> 
> I discovered, that, when trying to use the ethernet connection, I more
> often than not get frame errors reported by the FEC.
> 
> --snip--
> barebox at Ka-Ro tx51:/ dhcp
> phy0: Link is up - 1000/Full
> error frame: 0x97b961c0 0x00000890
> error frame: 0x97b96188 0x00000882
> DHCP client bound to address 10.41.14.147
> --snap--
> 
> The errors range from 'non octet aligned frame' over 'Fifo overrun' to
> timeouts. It renders the ethernet support unusable. Small images may
> work but, require the one and other retry.
> 
> One thing that catches my eye is that the auto negotioation resulted in
> a 1000MBit link. The imx fec does only support 100MBit. I forced the
> link to be set to 10MBit by declaring xcv_type=MII10 in the
> fec_platform_data structure. Interestingly the link is now reported as
> 100MBit, and shows the same behaviour.
> 
> Another thing I checked was the changed pad definitions in commit
> 2bdc9f57a86dff41cfc1f87b644a2e53fdcce2b6. Not only the type of the pad
> data structure changed, but also some of their configuration as well.
> For example, pads that were configured with FEC_PAD_CTL, now have other
> settings enabled.
> 
> I'reverted the pad changes, but still no luck. Auto negtiation starts,
> but I don't seem to get any packets.
> 
> So my question is: What change since v2012.03.0 could cause this kind of
> behaviour?
> 
same problem here. the problem comes from :
68b32be4926d3ab5b72036c0ceecef2f82aa0625 "i.MX51: Synchronize iomux
header file from kernel"
as now most pins have NO_PAD_CTRL which means the pad doesn't get
reconfigured and thus some pads to communicate with the FEC are no more
working.

A dirty workaround to default PAD config is :
diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
index 680d260..c21d8a2 100644
--- a/arch/arm/mach-imx/iomux-v3.c
+++ b/arch/arm/mach-imx/iomux-v3.c
@@ -45,6 +45,8 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
 
        if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
                __raw_writel(pad_ctrl, base + pad_ctrl_ofs);
+       else if ((pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
+               __raw_writel(0, base + pad_ctrl_ofs);
 
        return 0;
 }


Eric



From christian.buettner at rafi.de  Mon Jul 16 08:17:50 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 16 Jul 2012 14:17:50 +0200
Subject: Antwort: Re: Antwort: Re: Antwort: Re: barebox image size
In-Reply-To: <20120716103054.GJ30009@pengutronix.de>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
 <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
Message-ID: <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>

ok i can boot now! Thank you!

I flashed from 0x0 to 0x7FFFF (image size: 479K).
I flashed the environment image (image size: 3K) from 0x80000 to 0xFFFFF 
and changed the config code from barebox/environs/common/config to:

...
nand_parts="512k(barebox)ro,768k(bareboxenv),4M(kernel),120M(root)"
...

Barebox can boot now but the startup log says:
barebox 2012.03.0-dirty (Jul 16 2012 - 09:01:01)

Board: i.MX53
eth at eth0: got MAC address from EEPROM: *********************
nand_get_flash_type: second ID read did not match ef,ef against c0,c0
No NAND device found (-19)!
Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB)
Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB)
Open /dev/env0 No such file or directory
running /env/bin/init...
not found
barebox:/ 

How can i get the environment loaded?

- christian




Von:    Sascha Hauer <s.hauer at pengutronix.de>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  16.07.2012 12:30
Betreff:        Re: Antwort: Re: Antwort: Re: barebox image size



On Mon, Jul 16, 2012 at 11:37:59AM +0200, christian.buettner at rafi.de 
wrote:
> here it is:
> 
> struct imx_flash_header_v2 __flash_header_section flash_header =
> {
>     .header.tag         = IVT_HEADER_TAG,
>     .header.length      = cpu_to_be16(32),
>     .header.version     = IVT_VERSION,
> 
>     .entry              = APP_DEST + 0x1000,
>     .dcd_ptr            = APP_DEST + 0x400 + offsetof(struct 
> imx_flash_header_v2, dcd),
>     .boot_data_ptr      = APP_DEST + 0x400 + offsetof(struct 
> imx_flash_header_v2, boot_data),
>     .self               = APP_DEST + 0x400,
> 
>     .boot_data.start    = APP_DEST,
>     .boot_data.size     = 0x40000,

And here you have the magic 256k. Please use DCD_BAREBOX_SIZE instead.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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From christian.kapeller at cmotion.eu  Mon Jul 16 08:52:22 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 14:52:22 +0200
Subject: tx51 ethernet regression
In-Reply-To: <20120716134406.57843f19@eb-e6520>
References: <5003FACD.80400@cmotion.eu> <20120716134406.57843f19@eb-e6520>
Message-ID: <50040E86.60602@cmotion.eu>

Hi Eric,

thanks for the prompt reply.
> Le Mon, 16 Jul 2012 13:28:13 +0200,
> Christian Kapeller <christian.kapeller at cmotion.eu> a ?crit :
>> I recently came to update my barebox port based on the karo tx51 imx
>> module from v2012.03.0 to v2012.07.0.
>>
>> I discovered, that, when trying to use the ethernet connection, I more
>> often than not get frame errors reported by the FEC.
>>
>> --snip--
>> barebox at Ka-Ro tx51:/ dhcp
>> phy0: Link is up - 1000/Full
>> error frame: 0x97b961c0 0x00000890
>> error frame: 0x97b96188 0x00000882
>> DHCP client bound to address 10.41.14.147
>> --snap--
>>
>> The errors range from 'non octet aligned frame' over 'Fifo overrun' to
>> timeouts. It renders the ethernet support unusable. Small images may
>> work but, require the one and other retry.
>>
>> One thing that catches my eye is that the auto negotioation resulted in
>> a 1000MBit link. The imx fec does only support 100MBit. I forced the
>> link to be set to 10MBit by declaring xcv_type=MII10 in the
>> fec_platform_data structure. Interestingly the link is now reported as
>> 100MBit, and shows the same behaviour.
>>
>> Another thing I checked was the changed pad definitions in commit
>> 2bdc9f57a86dff41cfc1f87b644a2e53fdcce2b6. Not only the type of the pad
>> data structure changed, but also some of their configuration as well.
>> For example, pads that were configured with FEC_PAD_CTL, now have other
>> settings enabled.
>>
>> I'reverted the pad changes, but still no luck. Auto negtiation starts,
>> but I don't seem to get any packets.
>>
>> So my question is: What change since v2012.03.0 could cause this kind of
>> behaviour?
>>
> same problem here. the problem comes from :
> 68b32be4926d3ab5b72036c0ceecef2f82aa0625 "i.MX51: Synchronize iomux
> header file from kernel"
> as now most pins have NO_PAD_CTRL which means the pad doesn't get
> reconfigured and thus some pads to communicate with the FEC are no more
> working.
> 
> A dirty workaround to default PAD config is :
> diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
> index 680d260..c21d8a2 100644
> --- a/arch/arm/mach-imx/iomux-v3.c
> +++ b/arch/arm/mach-imx/iomux-v3.c
> @@ -45,6 +45,8 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
>  
>         if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
>                 __raw_writel(pad_ctrl, base + pad_ctrl_ofs);
> +       else if ((pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
> +               __raw_writel(0, base + pad_ctrl_ofs);
>  
>         return 0;
>  }

I see your problem, and why this patch has solved it. My board also uses
some pads, that are declared with NO_PAD_CTRL. I've applied your
solution as well, but no luck. I see the same behaviour as before.

The fact, that I am, able to do dhcp (even without your change), and
sometimes transfer files from some other host, makes me think, that my
pad config isn't that broken. May be the problem is in the pad configs,
some changed to PAD_CTRL_[2,4,5], some are NO_PAD_CTRL.

I don't know how the pad configuration influences pads, that are
assigned to some imx peripheral, like the FEC. For example the PAD
definition for the pads used for reception is inconsistent:

from iomux-mx51.h:

#define MX51_PAD_NANDF_D9__FEC_RDATA0		IOMUX_PAD(0x554, 0x16c, 0x12,
0x958, 0, MX51_PAD_CTRL_4)
#define MX51_PAD_EIM_EB3__FEC_RDATA1		IOMUX_PAD(0x46c, 0x0d8, 3, 0x95c,
0, NO_PAD_CTRL)
#define MX51_PAD_EIM_CS2__FEC_RDATA2		IOMUX_PAD(0x47c, 0x0e8, 3, 0x960,
0, NO_PAD_CTRL)
#define MX51_PAD_EIM_CS3__FEC_RDATA3		IOMUX_PAD(0x480, 0x0ec, 3, 0x964,
0, NO_PAD_CTRL)

I'd expect all RDATA signals all having the same pad control settings.
They don't have, and I't doesn't make a difference, when I set them all
to PAD_CTRL_4 as the first one.


Regards,
Christian


From christian.kapeller at cmotion.eu  Mon Jul 16 09:47:48 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 15:47:48 +0200
Subject: Antwort: Re: Antwort: Re: Antwort: Re: barebox image size
In-Reply-To: <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
 <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
Message-ID: <50041B84.9080707@cmotion.eu>

> I flashed from 0x0 to 0x7FFFF (image size: 479K).
> I flashed the environment image (image size: 3K) from 0x80000 to 0xFFFFF
> and changed the config code from barebox/environs/common/config to:
> 
> ...
> nand_parts="512k(barebox)ro,768k(bareboxenv),4M(kernel),120M(root)"
> ...
> 
> Barebox can boot now but the startup log says:
> barebox 2012.03.0-dirty (Jul 16 2012 - 09:01:01)
> 
> Board: i.MX53
> eth at eth0: got MAC address from EEPROM: *********************
> nand_get_flash_type: second ID read did not match ef,ef against c0,c0
> No NAND device found (-19)!
> Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB)
> Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB)
> Open /dev/env0 No such file or directory
> running /env/bin/init...
> not found
> barebox:/
> 
> How can i get the environment loaded?

Normally you would issue 'saveenv' which writes the environment to the
environment partition. On subsequent boots the environment will be loaded.

But the flash device on your board isn't detected by barebox, so you
will have to fix the detection first.

> nand_get_flash_type: second ID read did not match ef,ef against c0,c0

This line suggests, that the nand flash isn't working property. The line
is generated in drivers/mtd/nand/nand_base.c, after reading manufacturer
id and chip id two times, and checking them for equality.

Not only does your board different values for manufacturer and flash id
on first and second read, but they are also the same. manuf id=ef and
chip id=ef isn't plausible. Maybe you should check your hardware.

Regards
Christian


From christian.buettner at rafi.de  Mon Jul 16 09:52:32 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 16 Jul 2012 15:52:32 +0200
Subject: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re: barebox image size
In-Reply-To: <50041B84.9080707@cmotion.eu>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
 <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
 <50041B84.9080707@cmotion.eu>
Message-ID: <OF4671681E.10E4C59C-ONC1257A3D.004BF387-C1257A3D.004C38C5@o0802.rafi.inhouse>

Thx for the hint. 
What i don't understand is that barebox boots from nand but the 
environement can't..



Von:    Christian Kapeller <christian.kapeller at cmotion.eu>
An:     christian.buettner at rafi.de, 
Kopie:  Sascha Hauer <s.hauer at pengutronix.de>, barebox at lists.infradead.org
Datum:  16.07.2012 15:47
Betreff:        Re: Antwort: Re: Antwort: Re: Antwort: Re: barebox image 
size



> I flashed from 0x0 to 0x7FFFF (image size: 479K).
> I flashed the environment image (image size: 3K) from 0x80000 to 0xFFFFF
> and changed the config code from barebox/environs/common/config to:
> 
> ...
> nand_parts="512k(barebox)ro,768k(bareboxenv),4M(kernel),120M(root)"
> ...
> 
> Barebox can boot now but the startup log says:
> barebox 2012.03.0-dirty (Jul 16 2012 - 09:01:01)
> 
> Board: i.MX53
> eth at eth0: got MAC address from EEPROM: *********************
> nand_get_flash_type: second ID read did not match ef,ef against c0,c0
> No NAND device found (-19)!
> Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB)
> Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB)
> Open /dev/env0 No such file or directory
> running /env/bin/init...
> not found
> barebox:/
> 
> How can i get the environment loaded?

Normally you would issue 'saveenv' which writes the environment to the
environment partition. On subsequent boots the environment will be loaded.

But the flash device on your board isn't detected by barebox, so you
will have to fix the detection first.

> nand_get_flash_type: second ID read did not match ef,ef against c0,c0

This line suggests, that the nand flash isn't working property. The line
is generated in drivers/mtd/nand/nand_base.c, after reading manufacturer
id and chip id two times, and checking them for equality.

Not only does your board different values for manufacturer and flash id
on first and second read, but they are also the same. manuf id=ef and
chip id=ef isn't plausible. Maybe you should check your hardware.

Regards
Christian

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From s.hauer at pengutronix.de  Mon Jul 16 10:21:52 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 16:21:52 +0200
Subject: tx51 ethernet regression
In-Reply-To: <50040E86.60602@cmotion.eu>
References: <5003FACD.80400@cmotion.eu> <20120716134406.57843f19@eb-e6520>
 <50040E86.60602@cmotion.eu>
Message-ID: <20120716142152.GL30009@pengutronix.de>

On Mon, Jul 16, 2012 at 02:52:22PM +0200, Christian Kapeller wrote:
> Hi Eric,
> 
> > same problem here. the problem comes from :
> > 68b32be4926d3ab5b72036c0ceecef2f82aa0625 "i.MX51: Synchronize iomux
> > header file from kernel"
> > as now most pins have NO_PAD_CTRL which means the pad doesn't get
> > reconfigured and thus some pads to communicate with the FEC are no more
> > working.
> > 
> > A dirty workaround to default PAD config is :
> > diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
> > index 680d260..c21d8a2 100644
> > --- a/arch/arm/mach-imx/iomux-v3.c
> > +++ b/arch/arm/mach-imx/iomux-v3.c
> > @@ -45,6 +45,8 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
> >  
> >         if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
> >                 __raw_writel(pad_ctrl, base + pad_ctrl_ofs);
> > +       else if ((pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
> > +               __raw_writel(0, base + pad_ctrl_ofs);
> >  
> >         return 0;
> >  }
> 
> I see your problem, and why this patch has solved it. My board also uses
> some pads, that are declared with NO_PAD_CTRL. I've applied your
> solution as well, but no luck. I see the same behaviour as before.
> 
> The fact, that I am, able to do dhcp (even without your change), and
> sometimes transfer files from some other host, makes me think, that my
> pad config isn't that broken. May be the problem is in the pad configs,
> some changed to PAD_CTRL_[2,4,5], some are NO_PAD_CTRL.
> 
> I don't know how the pad configuration influences pads, that are
> assigned to some imx peripheral, like the FEC. For example the PAD
> definition for the pads used for reception is inconsistent:
> 
> from iomux-mx51.h:
> 
> #define MX51_PAD_NANDF_D9__FEC_RDATA0		IOMUX_PAD(0x554, 0x16c, 0x12,
> 0x958, 0, MX51_PAD_CTRL_4)
> #define MX51_PAD_EIM_EB3__FEC_RDATA1		IOMUX_PAD(0x46c, 0x0d8, 3, 0x95c,
> 0, NO_PAD_CTRL)
> #define MX51_PAD_EIM_CS2__FEC_RDATA2		IOMUX_PAD(0x47c, 0x0e8, 3, 0x960,
> 0, NO_PAD_CTRL)
> #define MX51_PAD_EIM_CS3__FEC_RDATA3		IOMUX_PAD(0x480, 0x0ec, 3, 0x964,
> 0, NO_PAD_CTRL)
> 
> I'd expect all RDATA signals all having the same pad control settings.
> They don't have, and I't doesn't make a difference, when I set them all
> to PAD_CTRL_4 as the first one.

The easiest way to get back to a working pin setup is probably to add a
printk to the writel in iomux-v3.c in both the working and the
nonworking barebox. It should be quite easy to figure out and bisect the
differences then.
Note that you once you have figured it out you should send the same
patch for the kernel aswell.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 10:25:24 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 16:25:24 +0200
Subject: [PATCH 1/2] tx51: ensure eth phy resets properly by driving
 reset pin explicitly.
In-Reply-To: <1342432439-27455-2-git-send-email-christian.kapeller@cmotion.eu>
References: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
 <1342432439-27455-2-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <20120716142524.GN30009@pengutronix.de>

On Mon, Jul 16, 2012 at 11:53:58AM +0200, Christian Kapeller wrote:
> 
> diff --git a/arch/arm/boards/karo-tx51/tx51.c b/arch/arm/boards/karo-tx51/tx51.c
> index 096683a..d862a68 100644
> --- a/arch/arm/boards/karo-tx51/tx51.c
> +++ b/arch/arm/boards/karo-tx51/tx51.c
> @@ -205,6 +205,12 @@ static inline void tx51_fec_init(void)
>  	}
>  
>  	/*
> +	 *Turn off phy power, be cautious and wait
> +	 */
> +	gpio_set_value(TX51_FEC_PHY_PWR, 0);
> +	mdelay(20);

Does this fix the mentioned regression due to iomuxing or is this
another issue?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From christian.kapeller at cmotion.eu  Mon Jul 16 10:25:57 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 16:25:57 +0200
Subject: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re: barebox image
 size
In-Reply-To: <OF4671681E.10E4C59C-ONC1257A3D.004BF387-C1257A3D.004C38C5@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
 <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
 <50041B84.9080707@cmotion.eu>
 <OF4671681E.10E4C59C-ONC1257A3D.004BF387-C1257A3D.004C38C5@o0802.rafi.inhouse>
Message-ID: <50042475.3000604@cmotion.eu>

On 07/16/2012 03:52 PM, christian.buettner at rafi.de wrote:
> Thx for the hint.
> What i don't understand is that barebox boots from nand but the
> environement can't..

Good point. In any case the driver isn't able to recognize your nand
device. I see from you supplied code snipplets, that your barebox is
at least two weeks old. Maybe you use the upstream tree, as maybe there
are already fixes for imx53 nand flash.

Also you may want to activate mtd debugging:

#define CONFIG_MTD_DEBUG
#define CONFIG_MTD_DEBUG_VERBOSE 3

for example to  your include/linux/mtd/mtd.h file. (Those are config
settings, but they don't appear in any Kconfig file, hence supply them
manually)

good luck.

> 
> 
>> I flashed from 0x0 to 0x7FFFF (image size: 479K).
>> I flashed the environment image (image size: 3K) from 0x80000 to 0xFFFFF
>> and changed the config code from barebox/environs/common/config to:
>>
>> ...
>> nand_parts="512k(barebox)ro,768k(bareboxenv),4M(kernel),120M(root)"
>> ...
>>
>> Barebox can boot now but the startup log says:
>> barebox 2012.03.0-dirty (Jul 16 2012 - 09:01:01)
>>
>> Board: i.MX53
>> eth at eth0: got MAC address from EEPROM: *********************
>> nand_get_flash_type: second ID read did not match ef,ef against c0,c0
>> No NAND device found (-19)!
>> Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB)
>> Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB)
>> Open /dev/env0 No such file or directory
>> running /env/bin/init...
>> not found
>> barebox:/
>>
>> How can i get the environment loaded?
> 
> Normally you would issue 'saveenv' which writes the environment to the
> environment partition. On subsequent boots the environment will be loaded.
> 
> But the flash device on your board isn't detected by barebox, so you
> will have to fix the detection first.
> 
>> nand_get_flash_type: second ID read did not match ef,ef against c0,c0
> 
> This line suggests, that the nand flash isn't working property. The line
> is generated in drivers/mtd/nand/nand_base.c, after reading manufacturer
> id and chip id two times, and checking them for equality.
> 
> Not only does your board different values for manufacturer and flash id
> on first and second read, but they are also the same. manuf id=ef and
> chip id=ef isn't plausible. Maybe you should check your hardware.
> 
> Regards
> Christian
> 


-- 
Christian Kapeller
cmotion GmbH
Kriehubergasse 16
1050 Wien / Austria
http://www.cmotion.eu

christian.kapeller at cmotion.eu
Phone: +43 1 789 1096 38




From christian.buettner at rafi.de  Mon Jul 16 10:30:01 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 16 Jul 2012 16:30:01 +0200
Subject: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re:
 barebox image size
In-Reply-To: <50042475.3000604@cmotion.eu>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
 <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
 <50041B84.9080707@cmotion.eu>
 <OF4671681E.10E4C59C-ONC1257A3D.004BF387-C1257A3D.004C38C5@o0802.rafi.inhouse>
 <50042475.3000604@cmotion.eu>
Message-ID: <OFF346C629.B473EAE5-ONC1257A3D.004F9F2C-C1257A3D.004FA724@o0802.rafi.inhouse>

ahh thank you.. i try that.



Von:    Christian Kapeller <christian.kapeller at cmotion.eu>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org, Sascha Hauer <s.hauer at pengutronix.de>
Datum:  16.07.2012 16:26
Betreff:        Re: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re: 
barebox image size



On 07/16/2012 03:52 PM, christian.buettner at rafi.de wrote:
> Thx for the hint.
> What i don't understand is that barebox boots from nand but the
> environement can't..

Good point. In any case the driver isn't able to recognize your nand
device. I see from you supplied code snipplets, that your barebox is
at least two weeks old. Maybe you use the upstream tree, as maybe there
are already fixes for imx53 nand flash.

Also you may want to activate mtd debugging:

#define CONFIG_MTD_DEBUG
#define CONFIG_MTD_DEBUG_VERBOSE 3

for example to  your include/linux/mtd/mtd.h file. (Those are config
settings, but they don't appear in any Kconfig file, hence supply them
manually)

good luck.

> 
> 
>> I flashed from 0x0 to 0x7FFFF (image size: 479K).
>> I flashed the environment image (image size: 3K) from 0x80000 to 
0xFFFFF
>> and changed the config code from barebox/environs/common/config to:
>>
>> ...
>> nand_parts="512k(barebox)ro,768k(bareboxenv),4M(kernel),120M(root)"
>> ...
>>
>> Barebox can boot now but the startup log says:
>> barebox 2012.03.0-dirty (Jul 16 2012 - 09:01:01)
>>
>> Board: i.MX53
>> eth at eth0: got MAC address from EEPROM: *********************
>> nand_get_flash_type: second ID read did not match ef,ef against c0,c0
>> No NAND device found (-19)!
>> Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB)
>> Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB)
>> Open /dev/env0 No such file or directory
>> running /env/bin/init...
>> not found
>> barebox:/
>>
>> How can i get the environment loaded?
> 
> Normally you would issue 'saveenv' which writes the environment to the
> environment partition. On subsequent boots the environment will be 
loaded.
> 
> But the flash device on your board isn't detected by barebox, so you
> will have to fix the detection first.
> 
>> nand_get_flash_type: second ID read did not match ef,ef against c0,c0
> 
> This line suggests, that the nand flash isn't working property. The line
> is generated in drivers/mtd/nand/nand_base.c, after reading manufacturer
> id and chip id two times, and checking them for equality.
> 
> Not only does your board different values for manufacturer and flash id
> on first and second read, but they are also the same. manuf id=ef and
> chip id=ef isn't plausible. Maybe you should check your hardware.
> 
> Regards
> Christian
> 


-- 
Christian Kapeller
cmotion GmbH
Kriehubergasse 16
1050 Wien / Austria
http://www.cmotion.eu

christian.kapeller at cmotion.eu
Phone: +43 1 789 1096 38



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From christian.kapeller at cmotion.eu  Mon Jul 16 10:31:29 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 16:31:29 +0200
Subject: [PATCH 1/2] tx51: ensure eth phy resets properly by driving reset
 pin explicitly.
In-Reply-To: <20120716142524.GN30009@pengutronix.de>
References: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
 <1342432439-27455-2-git-send-email-christian.kapeller@cmotion.eu>
 <20120716142524.GN30009@pengutronix.de>
Message-ID: <500425C1.70107@cmotion.eu>

On 07/16/2012 04:25 PM, Sascha Hauer wrote:
> On Mon, Jul 16, 2012 at 11:53:58AM +0200, Christian Kapeller wrote:
>>
>> diff --git a/arch/arm/boards/karo-tx51/tx51.c b/arch/arm/boards/karo-tx51/tx51.c
>> index 096683a..d862a68 100644
>> --- a/arch/arm/boards/karo-tx51/tx51.c
>> +++ b/arch/arm/boards/karo-tx51/tx51.c
>> @@ -205,6 +205,12 @@ static inline void tx51_fec_init(void)
>>  	}
>>  
>>  	/*
>> +	 *Turn off phy power, be cautious and wait
>> +	 */
>> +	gpio_set_value(TX51_FEC_PHY_PWR, 0);
>> +	mdelay(20);
> 
> Does this fix the mentioned regression due to iomuxing or is this
> another issue?

Nope, that is another issue. This fix is from my v2012.03.0 branch.
Without it the phy init worked only flaky.


From s.hauer at pengutronix.de  Mon Jul 16 10:31:47 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 16:31:47 +0200
Subject: [PATCH 2/2] tx51: Disable kallsyms. It prevents the board from
 booting.
In-Reply-To: <1342432439-27455-3-git-send-email-christian.kapeller@cmotion.eu>
References: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
 <1342432439-27455-3-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <20120716143147.GO30009@pengutronix.de>

On Mon, Jul 16, 2012 at 11:53:59AM +0200, Christian Kapeller wrote:
> 
> diff --git a/arch/arm/configs/tx51stk5_defconfig b/arch/arm/configs/tx51stk5_defconfig
> index 7fff0f0..e1796b9 100644
> --- a/arch/arm/configs/tx51stk5_defconfig
> +++ b/arch/arm/configs/tx51stk5_defconfig
> @@ -32,7 +32,6 @@ CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
>  CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
>  CONFIG_MEMORY_LAYOUT_DEFAULT=y
>  CONFIG_MALLOC_TLSF=y
> -CONFIG_KALLSYMS=y

Of course I rather would like to fix the underlying issue. Does this
happen on a second stage barebox aswell?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From eric at eukrea.com  Mon Jul 16 10:32:55 2012
From: eric at eukrea.com (Eric =?ISO-8859-1?B?QuluYXJk?=)
Date: Mon, 16 Jul 2012 16:32:55 +0200
Subject: barebox image size
In-Reply-To: <50042475.3000604@cmotion.eu>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716085418.GG30009@pengutronix.de>
 <OFCC857403.C150E96B-ONC1257A3D.003283FD-C1257A3D.0032D943@o0802.rafi.inhouse>
 <20120716092101.GI30009@pengutronix.de>
 <OF1A7E21F3.CEBD2AB0-ONC1257A3D.0034CA43-C1257A3D.0034EAA0@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
 <50041B84.9080707@cmotion.eu>
 <OF4671681E.10E4C59C-ONC1257A3D.004BF387-C1257A3D.004C38C5@o0802.rafi.inhouse>
 <50042475.3000604@cmotion.eu>
Message-ID: <20120716163255.668d680d@eb-e6520>

Hi,

Le Mon, 16 Jul 2012 16:25:57 +0200,
Christian Kapeller <christian.kapeller at cmotion.eu> a ?crit :

> On 07/16/2012 03:52 PM, christian.buettner at rafi.de wrote:
> > Thx for the hint.
> > What i don't understand is that barebox boots from nand but the
> > environement can't..
> 
> Good point. In any case the driver isn't able to recognize your nand
> device. I see from you supplied code snipplets, that your barebox is
> at least two weeks old. Maybe you use the upstream tree, as maybe there
> are already fixes for imx53 nand flash.
> 
you may try the ONFI patches as the log "nand_get_flash_type: second ID
read did not match ef,ef against c0,c0" seems very similar to what I
already saw in the past on one of my i.MX53 based board :

http://git.pengutronix.de/?p=barebox.git;a=commit;h=7baead578db7e47aedfcd3a5a21a69b9f37630d1
http://git.pengutronix.de/?p=barebox.git;a=commit;h=4b23222c4d68bf40ad89c99bf5e7fcbaa235bffb
http://git.pengutronix.de/?p=barebox.git;a=commit;h=632c45795065e6a7471ab82be38e808eb6204341

Eric


From christian.kapeller at cmotion.eu  Mon Jul 16 10:41:45 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Mon, 16 Jul 2012 16:41:45 +0200
Subject: [PATCH 2/2] tx51: Disable kallsyms. It prevents the board from
 booting.
In-Reply-To: <20120716143147.GO30009@pengutronix.de>
References: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
 <1342432439-27455-3-git-send-email-christian.kapeller@cmotion.eu>
 <20120716143147.GO30009@pengutronix.de>
Message-ID: <50042829.4000606@cmotion.eu>

On 07/16/2012 04:31 PM, Sascha Hauer wrote:
> On Mon, Jul 16, 2012 at 11:53:59AM +0200, Christian Kapeller wrote:
>>
>> diff --git a/arch/arm/configs/tx51stk5_defconfig b/arch/arm/configs/tx51stk5_defconfig
>> index 7fff0f0..e1796b9 100644
>> --- a/arch/arm/configs/tx51stk5_defconfig
>> +++ b/arch/arm/configs/tx51stk5_defconfig
>> @@ -32,7 +32,6 @@ CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
>>  CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
>>  CONFIG_MEMORY_LAYOUT_DEFAULT=y
>>  CONFIG_MALLOC_TLSF=y
>> -CONFIG_KALLSYMS=y
> 
> Of course I rather would like to fix the underlying issue. Does this
> happen on a second stage barebox aswell?

I hear you. My intend was to have at least a booting board, rather than
a brick.

I just flashed tx51 barebox without CONFIG_KALLSYMS, and could
successfully start a barebox binary with CONFIG_KALLSYMS set using
bootm.


From GPontis at z9.com  Mon Jul 16 10:58:30 2012
From: GPontis at z9.com (George Pontis)
Date: Mon, 16 Jul 2012 07:58:30 -0700
Subject: Atmel AT91 SD/MMC clock too fast
In-Reply-To: <20120716083321.GC30009@pengutronix.de>
References: <025c01cd6323$b85f2220$291d6660$@com>
 <20120716083321.GC30009@pengutronix.de>
Message-ID: <001201cd6363$767b5a00$63720e00$@com>



> -----Original Message-----
> From: Sascha Hauer [mailto:s.hauer at pengutronix.de]
> Sent: Monday, July 16, 2012 1:33 AM
> To: George Pontis
> Cc: barebox at lists.infradead.org
> Subject: Re: Atmel AT91 SD/MMC clock too fast
> 
> Hi George,
> 
> On Mon, Jul 16, 2012 at 12:22:13AM -0700, George Pontis wrote:
> > Due to integer truncation, the calculated divisor for the SD/MMC clock
may
> > be too low, resulting in a clock that is too fast. For example, the
> > at91sam9g45 is typically run with a master clock at 133 MHz. There is no
> > divisor possible that will result in a 25 or 50 MHz clock as is
typically
> > used for a SD card. The existing code will set the clock at 33 MHz or 66
> MHz
> > when 25 or 50 MHz is requested. A Kingston class 10 8G SDHC was found to
> not
> > work properly at 33 MHz, but did after patching. The patch, in this
case,
> > generated a 22.1 MHz clock ( 133/6 ). This is the same frequency that
this
> > card sees after booting Linux. If a perfect integer division is
possible,
> > the patch will provide an exact clock rate. If not, the frequency will
be
> > the closest possible without exceeding the target.
> >
> > The following was based on barebox 2012-07:
> >
> > --- a/drivers/mci/atmel_mci.c   2012-07-02 01:31:52.000000000 -0700
> > +++ b/drivers/mci/atmel_mci.c   2012-07-15 23:14:02.203872596 -0700
> > @@ -76,7 +76,8 @@
> >         unsigned int clk_in = clk_get_rate(host->clk);
> >
> >         if (clk_ios > 0) {
> > -               divider = (clk_in / clk_ios) / 2;
> > +               /* don't allow integer truncation to result in too small
a
> > divider */
> > +               divider = (clk_in + 2 * clk_ios - 1) / (2 * clk_ios);
> 
> DIV_ROUND_UP(clk_in, clk_ios / 2) instead?
> 
> Sascha
> 

Looks good, but it needs a divisor of 2*clk_ios. Using that macro:


--- a/drivers/mci/atmel_mci.c   2012-07-02 01:31:52.000000000 -0700
+++ b/drivers/mci/atmel_mci.c   2012-07-15 23:14:02.203872596 -0700
@@ -76,7 +76,8 @@
        unsigned int clk_in = clk_get_rate(host->clk);

        if (clk_ios > 0) {
-               divider = (clk_in / clk_ios) / 2;
+               /* don't allow integer truncation to result in too small a
divider */
+               divider = DIV_ROUND_UP( clk_in, (2 * clk_ios));




From s.hauer at pengutronix.de  Mon Jul 16 11:16:48 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 17:16:48 +0200
Subject: [PATCH 2/2] tx51: Disable kallsyms. It prevents the board from
 booting.
In-Reply-To: <50042829.4000606@cmotion.eu>
References: <1342432439-27455-1-git-send-email-christian.kapeller@cmotion.eu>
 <1342432439-27455-3-git-send-email-christian.kapeller@cmotion.eu>
 <20120716143147.GO30009@pengutronix.de>
 <50042829.4000606@cmotion.eu>
Message-ID: <20120716151648.GP30009@pengutronix.de>

On Mon, Jul 16, 2012 at 04:41:45PM +0200, Christian Kapeller wrote:
> On 07/16/2012 04:31 PM, Sascha Hauer wrote:
> > On Mon, Jul 16, 2012 at 11:53:59AM +0200, Christian Kapeller wrote:
> >>
> >> diff --git a/arch/arm/configs/tx51stk5_defconfig b/arch/arm/configs/tx51stk5_defconfig
> >> index 7fff0f0..e1796b9 100644
> >> --- a/arch/arm/configs/tx51stk5_defconfig
> >> +++ b/arch/arm/configs/tx51stk5_defconfig
> >> @@ -32,7 +32,6 @@ CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
> >>  CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
> >>  CONFIG_MEMORY_LAYOUT_DEFAULT=y
> >>  CONFIG_MALLOC_TLSF=y
> >> -CONFIG_KALLSYMS=y
> > 
> > Of course I rather would like to fix the underlying issue. Does this
> > happen on a second stage barebox aswell?
> 
> I hear you. My intend was to have at least a booting board, rather than
> a brick.
> 
> I just flashed tx51 barebox without CONFIG_KALLSYMS, and could
> successfully start a barebox binary with CONFIG_KALLSYMS set using
> bootm.

A binary built with CONFIG_KALLSYMS is >256k and without CONFIG_KALLSYMS
it's smaller than 256k. Looking at the karo i.MX51 flash_header.c it
seems it does it right:

unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE;

Nevertheless 256k is a typical maximum bootloader size which is assumed
in some places, I would start looking there.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From sha at pengutronix.de  Mon Jul 16 17:22:33 2012
From: sha at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 23:22:33 +0200
Subject: [PATCH v2] usb: gadget: enable for MXS
In-Reply-To: <1342426531-14831-1-git-send-email-mkl@pengutronix.de>
References: <1342426531-14831-1-git-send-email-mkl@pengutronix.de>
Message-ID: <20120716212233.GU30009@pengutronix.de>

On Mon, Jul 16, 2012 at 10:15:31AM +0200, Marc Kleine-Budde wrote:
> Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
> ---
> Changes since v1:
> - enable Arc OTG Driver, too (tnx Sascha)

Applied, thanks

Sascha

> 
> Marc
> 
>  drivers/usb/gadget/Kconfig |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
> index f7f2697..465121c 100644
> --- a/drivers/usb/gadget/Kconfig
> +++ b/drivers/usb/gadget/Kconfig
> @@ -4,7 +4,7 @@ menuconfig USB_GADGET
>  
>  config USB_HAVE_GADGET_DRIVER
>  	bool
> -	default y if ARCH_IMX || ARCH_AT91 || ARCH_PXA
> +	default y if ARCH_IMX || ARCH_MXS || ARCH_AT91 || ARCH_PXA
>  
>  if USB_GADGET
>  
> @@ -17,7 +17,7 @@ choice
>  config USB_GADGET_DRIVER_ARC
>  	bool
>  	prompt "Arc OTG device core"
> -	depends on ARCH_IMX
> +	depends on ARCH_IMX || ARCH_MXS
>  	select USB_GADGET_DUALSPEED
>  	select POLLER
>  
> -- 
> 1.7.10.4
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 16 17:31:31 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 Jul 2012 23:31:31 +0200
Subject: [PATCH/Master] ARM/MXS: the GPIO bitkeeper enable logic is
 inverse to the pullup enable logic
In-Reply-To: <201207111115.58627.jbe@pengutronix.de>
References: <201207111115.58627.jbe@pengutronix.de>
Message-ID: <20120716213131.GW30009@pengutronix.de>

On Wed, Jul 11, 2012 at 11:15:58AM +0200, Juergen Beisert wrote:
> While a set bit enables the pullup (if exists) it disables the bitkeeper (if
> exists). Both features are using the same register bit and only one of this
> feature is present on a per pin base.
>     
> Signed-off-by: Juergen Beisert <jbe at pengutronix.de>

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/mach-mxs/iomux-imx.c b/arch/arm/mach-mxs/iomux-imx.c
> index 9203588..784c506 100644
> --- a/arch/arm/mach-mxs/iomux-imx.c
> +++ b/arch/arm/mach-mxs/iomux-imx.c
> @@ -125,7 +125,7 @@ void imx_gpio_mode(uint32_t m)
>  	if (BK_PRESENT(m)) {
>  		reg_offset = calc_pullup_reg(gpio_pin);
>  		writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset +
> -				(GET_BITKEEPER(m) == 1 ? BIT_SET : BIT_CLR));
> +				(GET_BITKEEPER(m) == 1 ? BIT_CLR : BIT_SET));
>  	}
>  
>  	if (GET_FUNC(m) == IS_GPIO) {
> 
> -- 
> Pengutronix e.K.                              | Juergen Beisert             |
> Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From marc at cpdesign.com.au  Mon Jul 16 18:29:26 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Tue, 17 Jul 2012 08:29:26 +1000
Subject: Antwort: Re: Antwort: Re: Antwort: Re: barebox image size
In-Reply-To: <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
Message-ID: <2711184.rUQpv2fWDx@dev1>

Hi,

> I flashed from 0x0 to 0x7FFFF (image size: 479K).
> I flashed the environment image (image size: 3K) from 0x80000 to 0xFFFFF
Her you write 512k for env

> and changed the config code from barebox/environs/common/config to:
> 
> ...
> nand_parts="512k(barebox)ro,768k(bareboxenv),4M(kernel),120M(root)"
And here you say its 786k.

Cheers,
Marc



From u.kleine-koenig at pengutronix.de  Tue Jul 17 04:23:53 2012
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Tue, 17 Jul 2012 10:23:53 +0200
Subject: [PATCH] commands/crc: assert newline after output with big offsets
In-Reply-To: <1340788113-3171-1-git-send-email-u.kleine-koenig@pengutronix.de>
References: <20120627082537.GE1623@pengutronix.de>
 <1340788113-3171-1-git-send-email-u.kleine-koenig@pengutronix.de>
Message-ID: <20120717082353.GD592@pengutronix.de>

Hello Sascha,

On Wed, Jun 27, 2012 at 11:08:33AM +0200, Uwe Kleine-K?nig wrote:
> This fixes
> 
> 	barebox at Very long board name:/ crc32 -f /dev/mem 0x83f00000+0xfff
> 	CRC32 for /dev/mem 0x83fff000 ... 0x83fffffe ==> 0xa080584bbarebox at Very long board name:/
> 
> The problem here was that the return value of
> lseek(fd, 0x83f00000, SEEK_SET) (which is 0x83f00000) was casted to an
> int (which is -2081423360), returned to do_crc and interpreted as
> error there without yielding another error message.
> 
> This also makes
> 
> 	crc32 -f /dev/mem 0xffffffff+0x1
> 
> die on a NULL pointer exception instead of reporting:
> 
> 	lseek: No error
> 
> :-)
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
> On Wed, Jun 27, 2012 at 10:25:37AM +0200, Sascha Hauer wrote:
> > On Wed, Jun 27, 2012 at 10:13:13AM +0200, Uwe Kleine-K?nig wrote:
> > > Without this patch the next command prompt starts directly after the
> > > calculated check sum. While at it also fix the coding style.
> > 
> > Under which conditions does this happen? The newline should be appended in
> > do_crc()
> You're right, my patch was not correct. This version should do the right
> thing now.
ping

>  commands/crc.c |    7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/commands/crc.c b/commands/crc.c
> index df22941..10a2900 100644
> --- a/commands/crc.c
> +++ b/commands/crc.c
> @@ -47,9 +47,12 @@ static int file_crc(char* filename, ulong start, ulong size, ulong *crc,
>  	}
>  
>  	if (start > 0) {
> -		ret = lseek(fd, start, SEEK_SET);
> -		if (ret == -1) {
> +		off_t lseek_ret;
> +		errno = 0;
> +		lseek_ret = lseek(fd, start, SEEK_SET);
> +		if (lseek_ret == (off_t)-1 && errno) {
>  			perror("lseek");
> +			ret = -1;
>  			goto out;
>  		}
>  	}
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From christian.kapeller at cmotion.eu  Tue Jul 17 05:49:59 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Tue, 17 Jul 2012 11:49:59 +0200
Subject: [PATCH] imx51: fix pad definition used for fec communication.
In-Reply-To: <20120716142152.GL30009@pengutronix.de>
References: <20120716142152.GL30009@pengutronix.de>
Message-ID: <1342518599-9558-1-git-send-email-christian.kapeller@cmotion.eu>

Using the existing configuration, on the Ka-Ro i.MX51 board fec is reporting all
kind of error conditions for ethernet reception.

Define FEC_RDATAn signals consistently.
Don't use hysteresis feature on any pins interfacing a mii phy chip.
Don't use NO_PAD_CTRL value for used pads.

Signed-off-by: Christian Kapeller <christian.kapeller at cmotion.eu>
---
 arch/arm/mach-imx/include/mach/iomux-mx51.h |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
index 36c8989..f94c5a5 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
@@ -187,7 +187,7 @@
 #define MX51_PAD_EIM_EB3__AUD5_RXC		IOMUX_PAD(0x46c, 0x0d8, 6, 0x8dc, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_EB3__CSI1_D3		IOMUX_PAD(0x46c, 0x0d8, 5, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_EB3__EIM_EB3		IOMUX_PAD(0x46c, 0x0d8, 0, __NA_, 0, NO_PAD_CTRL)
-#define MX51_PAD_EIM_EB3__FEC_RDATA1		IOMUX_PAD(0x46c, 0x0d8, 3, 0x95c, 0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_EB3__FEC_RDATA1		IOMUX_PAD(0x46c, 0x0d8, 3, 0x95c, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_EIM_EB3__GPIO2_23		IOMUX_PAD(0x46c, 0x0d8, 1, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_EIM_EB3__GPT_CMPOUT2		IOMUX_PAD(0x46c, 0x0d8, 7, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_OE__EIM_OE			IOMUX_PAD(0x470, 0x0dc, 0, __NA_, 0, NO_PAD_CTRL)
@@ -199,26 +199,26 @@
 #define MX51_PAD_EIM_CS2__AUD5_TXD		IOMUX_PAD(0x47c, 0x0e8, 6, 0x8d8, 1, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS2__CSI1_D4		IOMUX_PAD(0x47c, 0x0e8, 5, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS2__EIM_CS2		IOMUX_PAD(0x47c, 0x0e8, 0, __NA_, 0, NO_PAD_CTRL)
-#define MX51_PAD_EIM_CS2__FEC_RDATA2		IOMUX_PAD(0x47c, 0x0e8, 3, 0x960, 0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_CS2__FEC_RDATA2		IOMUX_PAD(0x47c, 0x0e8, 3, 0x960, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_EIM_CS2__GPIO2_27		IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_EIM_CS2__USBOTG_STP		IOMUX_PAD(0x47c, 0x0e8, 2, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS3__AUD5_RXD		IOMUX_PAD(0x480, 0x0ec, 6, 0x8d4, 1, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS3__CSI1_D5		IOMUX_PAD(0x480, 0x0ec, 5, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS3__EIM_CS3		IOMUX_PAD(0x480, 0x0ec, 0, __NA_, 0, NO_PAD_CTRL)
-#define MX51_PAD_EIM_CS3__FEC_RDATA3		IOMUX_PAD(0x480, 0x0ec, 3, 0x964, 0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_CS3__FEC_RDATA3		IOMUX_PAD(0x480, 0x0ec, 3, 0x964, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_EIM_CS3__GPIO2_28		IOMUX_PAD(0x480, 0x0ec, 1, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_EIM_CS3__USBOTG_NXT		IOMUX_PAD(0x480, 0x0ec, 2, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS4__AUD5_TXC		IOMUX_PAD(0x484, 0x0f0, 6, 0x8e4, 1, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS4__CSI1_D6		IOMUX_PAD(0x484, 0x0f0, 5, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS4__EIM_CS4		IOMUX_PAD(0x484, 0x0f0, 0, __NA_, 0, NO_PAD_CTRL)
-#define MX51_PAD_EIM_CS4__FEC_RX_ER		IOMUX_PAD(0x484, 0x0f0, 3, 0x970, 0, MX51_PAD_CTRL_2)
+#define MX51_PAD_EIM_CS4__FEC_RX_ER		IOMUX_PAD(0x484, 0x0f0, 3, 0x970, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_EIM_CS4__GPIO2_29		IOMUX_PAD(0x484, 0x0f0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_EIM_CS4__USBOTG_CLK		IOMUX_PAD(0x484, 0x0f0, 2, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS5__AUD5_TXFS		IOMUX_PAD(0x488, 0x0f4, 6, 0x8e8, 1, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS5__CSI1_D7		IOMUX_PAD(0x488, 0x0f4, 5, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS5__DISP1_EXT_CLK		IOMUX_PAD(0x488, 0x0f4, 4, 0x904, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CS5__EIM_CS5		IOMUX_PAD(0x488, 0x0f4, 0, __NA_, 0, NO_PAD_CTRL)
-#define MX51_PAD_EIM_CS5__FEC_CRS		IOMUX_PAD(0x488, 0x0f4, 3, 0x950, 0, MX51_PAD_CTRL_2)
+#define MX51_PAD_EIM_CS5__FEC_CRS		IOMUX_PAD(0x488, 0x0f4, 3, 0x950, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_EIM_CS5__GPIO2_30		IOMUX_PAD(0x488, 0x0f4, 1, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_EIM_CS5__USBOTG_DIR		IOMUX_PAD(0x488, 0x0f4, 2, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_DTACK__EIM_DTACK		IOMUX_PAD(0x48c, 0x0f8, 0, __NA_, 0, NO_PAD_CTRL)
@@ -259,14 +259,14 @@
 #define MX51_PAD_NANDF_RB1__SD4_CMD		IOMUX_PAD(0x4fc, 0x120, 0x15, __NA_, 0, MX51_SDHCI_PAD_CTRL)
 #define MX51_PAD_NANDF_RB2__DISP2_WAIT		IOMUX_PAD(0x500, 0x124, 5, 0x9a8, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB2__ECSPI2_SCLK		IOMUX_PAD(0x500, 0x124, 2, __NA_, 0, MX51_ECSPI_PAD_CTRL)
-#define MX51_PAD_NANDF_RB2__FEC_COL		IOMUX_PAD(0x500, 0x124, 1, 0x94c, 0, MX51_PAD_CTRL_2)
+#define MX51_PAD_NANDF_RB2__FEC_COL		IOMUX_PAD(0x500, 0x124, 1, 0x94c, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_NANDF_RB2__GPIO3_10		IOMUX_PAD(0x500, 0x124, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB2__NANDF_RB2		IOMUX_PAD(0x500, 0x124, 0, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB2__USBH3_H3_DP		IOMUX_PAD(0x500, 0x124, 0x17, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB2__USBH3_NXT		IOMUX_PAD(0x500, 0x124, 6, 0xa20, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB3__DISP1_WAIT		IOMUX_PAD(0x504, 0x128, 5, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB3__ECSPI2_MISO		IOMUX_PAD(0x504, 0x128, 2, __NA_, 0, MX51_ECSPI_PAD_CTRL)
-#define MX51_PAD_NANDF_RB3__FEC_RX_CLK		IOMUX_PAD(0x504, 0x128, 1, 0x968, 0, MX51_PAD_CTRL_2)
+#define MX51_PAD_NANDF_RB3__FEC_RX_CLK		IOMUX_PAD(0x504, 0x128, 1, 0x968, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_NANDF_RB3__GPIO3_11		IOMUX_PAD(0x504, 0x128, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB3__NANDF_RB3		IOMUX_PAD(0x504, 0x128, 0, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_RB3__USBH3_CLK		IOMUX_PAD(0x504, 0x128, 6, 0x9f8, 0, NO_PAD_CTRL)
@@ -313,7 +313,7 @@
 #define MX51_PAD_NANDF_CS7__NANDF_CS7		IOMUX_PAD(0x534, 0x14c, 0, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_CS7__SD3_CLK		IOMUX_PAD(0x534, 0x14c, 5, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)
 #define MX51_PAD_NANDF_RDY_INT__ECSPI2_SS0	IOMUX_PAD(0x538, 0x150, 2, __NA_, 0, MX51_ECSPI_PAD_CTRL)
-#define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_PAD_CTRL_4)
+#define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_NANDF_RDY_INT__GPIO3_24	IOMUX_PAD(0x538, 0x150, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT	IOMUX_PAD(0x538, 0x150, 0, 0x938, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_RDY_INT__SD3_CMD		IOMUX_PAD(0x538, 0x150, 0x15, __NA_, 0, MX51_SDHCI_PAD_CTRL)
@@ -337,7 +337,7 @@
 #define MX51_PAD_NANDF_D12__NANDF_D12		IOMUX_PAD(0x548, 0x160, 0, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_D12__PATA_DATA12		IOMUX_PAD(0x548, 0x160, 1, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_D12__SD3_DAT4		IOMUX_PAD(0x548, 0x160, 5, __NA_, 0, NO_PAD_CTRL)
-#define MX51_PAD_NANDF_D11__FEC_RX_DV		IOMUX_PAD(0x54c, 0x164, 2, 0x96c, 0, NO_PAD_CTRL)
+#define MX51_PAD_NANDF_D11__FEC_RX_DV		IOMUX_PAD(0x54c, 0x164, 2, 0x96c, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_NANDF_D11__GPIO3_29		IOMUX_PAD(0x54c, 0x164, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_NANDF_D11__NANDF_D11		IOMUX_PAD(0x54c, 0x164, 0, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_D11__PATA_DATA11		IOMUX_PAD(0x54c, 0x164, 1, __NA_, 0, NO_PAD_CTRL)
@@ -346,7 +346,7 @@
 #define MX51_PAD_NANDF_D10__NANDF_D10		IOMUX_PAD(0x550, 0x168, 0, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_D10__PATA_DATA10		IOMUX_PAD(0x550, 0x168, 1, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_D10__SD3_DATA2		IOMUX_PAD(0x550, 0x168, 5, 0x944, 1, NO_PAD_CTRL)
-#define MX51_PAD_NANDF_D9__FEC_RDATA0		IOMUX_PAD(0x554, 0x16c, 0x12, 0x958, 0, MX51_PAD_CTRL_4)
+#define MX51_PAD_NANDF_D9__FEC_RDATA0		IOMUX_PAD(0x554, 0x16c, 0x2, 0x958, 0, MX51_PAD_CTRL_5)
 #define MX51_PAD_NANDF_D9__GPIO3_31		IOMUX_PAD(0x554, 0x16c, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)
 #define MX51_PAD_NANDF_D9__NANDF_D9		IOMUX_PAD(0x554, 0x16c, 0, __NA_, 0, NO_PAD_CTRL)
 #define MX51_PAD_NANDF_D9__PATA_DATA9		IOMUX_PAD(0x554, 0x16c, 1, __NA_, 0, NO_PAD_CTRL)
-- 
1.7.5.4



From christian.buettner at rafi.de  Tue Jul 17 05:58:00 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Tue, 17 Jul 2012 11:58:00 +0200
Subject: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re: barebox image size
In-Reply-To: <2711184.rUQpv2fWDx@dev1>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
 <2711184.rUQpv2fWDx@dev1>
Message-ID: <OFD0402E5D.322F9E54-ONC1257A3E.00363476-C1257A3E.0036BF7D@o0802.rafi.inhouse>

ok i was able to preceed a little. The new error message after booting is:

barebox 2012.03.0-dirty (Jul 17 2012 - 11:36:47)

Board: RAFI i.MX53
eth at eth0: got MAC address from EEPROM: ********
NAND device: Manufacturer ID: 0xec, Chip ID: 0xf1 (Samsung NAND 128MiB 
3,3V 8-bit)
Bad block table found at page 65472, version 0x01
Bad block table found at page 65408, version 0x01
nand_read_bbt: Bad block at 0x060a0000
Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB)
Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB)
envfs: wrong magic on /dev/env0
running /env/bin/init...
not found
barebox:/ 


current settings are:

flash_header.c
struct imx_flash_header_v2 __flash_header_section flash_header =
{
    .header.tag         = IVT_HEADER_TAG,
    .header.length      = cpu_to_be16(32),
    .header.version     = IVT_VERSION,

    .entry              = APP_DEST + 0x1000,
    .dcd_ptr            = APP_DEST + 0x400 + offsetof(struct 
imx_flash_header_v2, dcd),
    .boot_data_ptr      = APP_DEST + 0x400 + offsetof(struct 
imx_flash_header_v2, boot_data),
    .self               = APP_DEST + 0x400,

    .boot_data.start    = APP_DEST,
    .boot_data.size     = 0x80000,

    .dcd.header.tag     = DCD_HEADER_TAG,
    .dcd.header.length  = cpu_to_be16(sizeof(struct imx_dcd) + sizeof
(dcd_entry)),
    .dcd.header.version = DCD_VERSION,

    .dcd.command.tag    = DCD_COMMAND_WRITE_TAG,
    .dcd.command.length = cpu_to_be16(sizeof(struct imx_dcd_command) + 
sizeof(dcd_entry)),
    .dcd.command.param  = DCD_COMMAND_WRITE_PARAM,
};


Environment config
nand_parts="512k(barebox)ro,512k(bareboxenv),4M(kernel),120M(root)"


board_init.c
devfs_add_partition("nand0", 0x00000, 0x80000, PARTITION_FIXED, "self0");
devfs_add_partition("nand0", 0x80000, 0x80000, PARTITION_FIXED, "env0");


seems like the enviroment.c->envfs_load() looks into a wrong memory area.
Is there a Setting i forgot?

- christian




Von:    Marc Reilly <marc at cpdesign.com.au>
An:     barebox at lists.infradead.org, 
Kopie:  christian.buettner at rafi.de, Sascha Hauer <s.hauer at pengutronix.de>
Datum:  17.07.2012 00:34
Betreff:        Re: Antwort: Re: Antwort: Re: Antwort: Re: barebox image 
size
Gesendet von:   Marc Reilly <marc.reilly at gmail.com>



Hi,

> I flashed from 0x0 to 0x7FFFF (image size: 479K).
> I flashed the environment image (image size: 3K) from 0x80000 to 0xFFFFF
Her you write 512k for env

> and changed the config code from barebox/environs/common/config to:
> 
> ...
> nand_parts="512k(barebox)ro,768k(bareboxenv),4M(kernel),120M(root)"
And here you say its 786k.

Cheers,
Marc


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From marc at cpdesign.com.au  Tue Jul 17 06:44:46 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Tue, 17 Jul 2012 20:44:46 +1000
Subject: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re: barebox image
 size
In-Reply-To: <OFD0402E5D.322F9E54-ONC1257A3E.00363476-C1257A3E.0036BF7D@o0802.rafi.inhouse>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
 <2711184.rUQpv2fWDx@dev1>
 <OFD0402E5D.322F9E54-ONC1257A3E.00363476-C1257A3E.0036BF7D@o0802.rafi.inhouse>
Message-ID: <019301cd6409$31d9c110$958d4330$@cpdesign.com.au>

Hi,

>ok i was able to preceed a little. The new error message after booting is: 
>
>Board: RAFI i.MX53 
>eth at eth0: got MAC address from EEPROM: ******** 
>NAND device: Manufacturer ID: 0xec, Chip ID: 0xf1 (Samsung NAND 128MiB 3,3V
8-bit) 
>Bad block table found at page 65472, version 0x01 
>Bad block table found at page 65408, version 0x01 
>nand_read_bbt: Bad block at 0x060a0000 
>Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB) 
>Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB) 
>envfs: wrong magic on /dev/env0 
>running /env/bin/init... 
>not found 
>barebox:/ 

What commands are you using to erase and program the flash area?

>Environment config 
>nand_parts="512k(barebox)ro,512k(bareboxenv),4M(kernel),120M(root)" 

>board_init.c 
>devfs_add_partition("nand0", 0x00000, 0x80000, PARTITION_FIXED, "self0"); 
>devfs_add_partition("nand0", 0x80000, 0x80000, PARTITION_FIXED, "env0"); 

These partitions aren't bad block aware, from memory, I think u want
something like:

devfs_add_partition("nand0", 0x80000, 0x80000, PARTITION_FIXED, "env0_raw");
dev_add_bb_dev("env0_raw", "env0");

Cheers,
Marc



From christian.buettner at rafi.de  Tue Jul 17 06:49:11 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Tue, 17 Jul 2012 12:49:11 +0200
Subject: Antwort: RE: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re:
 barebox image size
In-Reply-To: <019301cd6409$31d9c110$958d4330$@cpdesign.com.au>
References: <OFBC23BC86.8730299C-ONC1257A3D.002F1072-C1257A3D.002F655C@o0802.rafi.inhouse>
 <20120716103054.GJ30009@pengutronix.de>
 <OFEB4CC2A7.F85A0448-ONC1257A3D.0042AC6D-C1257A3D.00438D25@o0802.rafi.inhouse>
 <2711184.rUQpv2fWDx@dev1>
 <OFD0402E5D.322F9E54-ONC1257A3E.00363476-C1257A3E.0036BF7D@o0802.rafi.inhouse>
 <019301cd6409$31d9c110$958d4330$@cpdesign.com.au>
Message-ID: <OF057F3206.F7F44DAE-ONC1257A3E.003B5F38-C1257A3E.003B6F60@o0802.rafi.inhouse>

Ahh, thank you for the hint with the BB!
And finally - it is working!!
I forgot to change the erase settings in the lauterbach script.

Thank you all for your help and long lives barebox ;)

- christian



Von:    "Marc Reilly" <marc at cpdesign.com.au>
An:     <christian.buettner at rafi.de>, 
Kopie:  <barebox at lists.infradead.org>, "'Sascha Hauer'" 
<s.hauer at pengutronix.de>
Datum:  17.07.2012 12:44
Betreff:        RE: Antwort: Re: Antwort: Re: Antwort: Re: Antwort: Re: 
barebox image size
Gesendet von:   Marc Reilly <marc.reilly at gmail.com>



Hi,

>ok i was able to preceed a little. The new error message after booting 
is: 
>
>Board: RAFI i.MX53 
>eth at eth0: got MAC address from EEPROM: ******** 
>NAND device: Manufacturer ID: 0xec, Chip ID: 0xf1 (Samsung NAND 128MiB 
3,3V
8-bit) 
>Bad block table found at page 65472, version 0x01 
>Bad block table found at page 65408, version 0x01 
>nand_read_bbt: Bad block at 0x060a0000 
>Malloc space: 0x7df00000 -> 0x7fefffff (size 32 MB) 
>Stack space : 0x7def8000 -> 0x7df00000 (size 32 kB) 
>envfs: wrong magic on /dev/env0 
>running /env/bin/init... 
>not found 
>barebox:/ 

What commands are you using to erase and program the flash area?

>Environment config 
>nand_parts="512k(barebox)ro,512k(bareboxenv),4M(kernel),120M(root)" 

>board_init.c 
>devfs_add_partition("nand0", 0x00000, 0x80000, PARTITION_FIXED, "self0"); 

>devfs_add_partition("nand0", 0x80000, 0x80000, PARTITION_FIXED, "env0"); 

These partitions aren't bad block aware, from memory, I think u want
something like:

devfs_add_partition("nand0", 0x80000, 0x80000, PARTITION_FIXED, 
"env0_raw");
dev_add_bb_dev("env0_raw", "env0");

Cheers,
Marc


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From christian.kapeller at cmotion.eu  Tue Jul 17 07:23:02 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Tue, 17 Jul 2012 13:23:02 +0200
Subject: [PATCH] arm: support booting of uimages with as barebox payload.
Message-ID: <1342524182-15436-1-git-send-email-christian.kapeller@cmotion.eu>

Packing barebox within an uimage gives us integrity checking.

Generate the image with:
./scripts/mkimage -A arm -O barebox -T firmware -C none -d barebox.bin -a 0xffffffff barebox.uimage

Signed-off-by: Christian Kapeller <christian.kapeller at cmotion.eu>
---
 arch/arm/lib/bootm.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 3a00437..791efc2 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -117,6 +117,13 @@ static struct image_handler rawimage_handler = {
 	.filetype = filetype_unknown,
 };
 
+static struct image_handler bbuimage_handler = {
+	.name = "ARM barebox uImage",
+	.bootm = do_bootm_linux,
+	.filetype = filetype_uimage,
+	.ih_os = IH_OS_BAREBOX,
+};
+
 struct zimage_header {
 	u32	unused[9];
 	u32	magic;
@@ -470,6 +477,7 @@ static int armlinux_register_image_handler(void)
 	register_image_handler(&uimage_handler);
 	register_image_handler(&rawimage_handler);
 	register_image_handler(&zimage_handler);
+	register_image_handler(&bbuimage_handler);
 	if (IS_BUILTIN(CONFIG_CMD_BOOTM_AIMAGE)) {
 		register_image_handler(&aimage_handler);
 		binfmt_register(&binfmt_aimage_hook);
-- 
1.7.5.4



From plagnioj at jcrosoft.com  Tue Jul 17 08:49:25 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Tue, 17 Jul 2012 14:49:25 +0200
Subject: [PATCH] arm: support booting of uimages with as barebox payload.
In-Reply-To: <1342524182-15436-1-git-send-email-christian.kapeller@cmotion.eu>
References: <1342524182-15436-1-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <20120717124925.GA22657@game.jcrosoft.org>

On 13:23 Tue 17 Jul     , Christian Kapeller wrote:
> Packing barebox within an uimage gives us integrity checking.
> 
> Generate the image with:
> ./scripts/mkimage -A arm -O barebox -T firmware -C none -d barebox.bin -a 0xffffffff barebox.uimage
> 
> Signed-off-by: Christian Kapeller <christian.kapeller at cmotion.eu>
> ---
boot it as a linux kernel

it will work

Best Regards,
J.


From christian.kapeller at cmotion.eu  Tue Jul 17 09:23:27 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Tue, 17 Jul 2012 15:23:27 +0200
Subject: [PATCH] arm: support booting of uimages with as barebox payload.
In-Reply-To: <20120717124925.GA22657@game.jcrosoft.org>
References: <1342524182-15436-1-git-send-email-christian.kapeller@cmotion.eu>
 <20120717124925.GA22657@game.jcrosoft.org>
Message-ID: <5005674F.9030706@cmotion.eu>

On 07/17/2012 02:49 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 13:23 Tue 17 Jul     , Christian Kapeller wrote:
>> Packing barebox within an uimage gives us integrity checking.
>>
>> Generate the image with:
>> ./scripts/mkimage -A arm -O barebox -T firmware -C none -d barebox.bin -a 0xffffffff barebox.uimage
>>
>> Signed-off-by: Christian Kapeller <christian.kapeller at cmotion.eu>
>> ---
> boot it as a linux kernel
> 
> it will work

You are right, it does. But then, I am asking myself, why is there a OS
definition for 'barebox', when we aren't using it in the first place?

Regards,
Christian


From s.hauer at pengutronix.de  Tue Jul 17 11:34:44 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 17 Jul 2012 17:34:44 +0200
Subject: [PATCH] arm: support booting of uimages with as barebox payload.
In-Reply-To: <5005674F.9030706@cmotion.eu>
References: <1342524182-15436-1-git-send-email-christian.kapeller@cmotion.eu>
 <20120717124925.GA22657@game.jcrosoft.org>
 <5005674F.9030706@cmotion.eu>
Message-ID: <20120717153444.GA30009@pengutronix.de>

On Tue, Jul 17, 2012 at 03:23:27PM +0200, Christian Kapeller wrote:
> On 07/17/2012 02:49 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 13:23 Tue 17 Jul     , Christian Kapeller wrote:
> >> Packing barebox within an uimage gives us integrity checking.
> >>
> >> Generate the image with:
> >> ./scripts/mkimage -A arm -O barebox -T firmware -C none -d barebox.bin -a 0xffffffff barebox.uimage
> >>
> >> Signed-off-by: Christian Kapeller <christian.kapeller at cmotion.eu>
> >> ---
> > boot it as a linux kernel
> > 
> > it will work
> 
> You are right, it does. But then, I am asking myself, why is there a OS
> definition for 'barebox', when we aren't using it in the first place?

It's derived from U-Boot where it initially was:

#define IH_OS_U_BOOT         17      /* Firmware     */

When renaming U-Boot to barebox this was one of the occurences of
'U_BOOT' that shouldn't have been renamed.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Jul 17 14:42:18 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 17 Jul 2012 20:42:18 +0200
Subject: [PATCH] commands/crc: assert newline after output with big offsets
In-Reply-To: <20120717082353.GD592@pengutronix.de>
References: <20120627082537.GE1623@pengutronix.de>
 <1340788113-3171-1-git-send-email-u.kleine-koenig@pengutronix.de>
 <20120717082353.GD592@pengutronix.de>
Message-ID: <20120717184218.GB30009@pengutronix.de>

On Tue, Jul 17, 2012 at 10:23:53AM +0200, Uwe Kleine-K?nig wrote:
> Hello Sascha,
> 
> > You're right, my patch was not correct. This version should do the right
> > thing now.
> ping

Applied, thanks

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue Jul 17 14:46:41 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 17 Jul 2012 20:46:41 +0200
Subject: [PATCH 0/2] imx: add matrix keypad (kpp) input driver
In-Reply-To: <1342438830-30214-1-git-send-email-christian.kapeller@cmotion.eu>
References: <1342438830-30214-1-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <20120717184641.GC30009@pengutronix.de>

On Mon, Jul 16, 2012 at 01:40:28PM +0200, Christian Kapeller wrote:
> This patchset adds support for the imx matrix keypad peripheral (kpp). I've
> fleshed out the linux keypad driver, and remodeled it after the gpio_keys
> driver.
> 
> Currently platform helper functions are only provided for the imx51.
> 

Applied, thanks

Sascha

> Christian Kapeller (2):
>   input: Add i.MX matrix keypad driver
>   input: add i.MX51 platform code for matrix keypad driver
> 
>  arch/arm/mach-imx/devices.c                    |    5 +
>  arch/arm/mach-imx/include/mach/devices-imx51.h |    4 +
>  arch/arm/mach-imx/include/mach/devices.h       |    2 +
>  drivers/input/Kconfig                          |   13 +
>  drivers/input/Makefile                         |    1 +
>  drivers/input/imx_keypad.c                     |  463 ++++++++++++++++++++++++
>  include/matrix_keypad.h                        |   59 +++
>  7 files changed, 547 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/input/imx_keypad.c
>  create mode 100644 include/matrix_keypad.h
> 
> -- 
> 1.7.5.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Wed Jul 18 04:46:46 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 18 Jul 2012 10:46:46 +0200
Subject: [PATCHv5] Enable a way to provide the reason for "being here"
Message-ID: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>

Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivates the hanging system.

V2 includes Marc's suggesion.
V3 includes the detection for the i.MX28 SoC and fixes its usage for other
i.MX SoCs.
V4 includes Marc's recent suggestion.
V5 includes Sascha's comments.

Comments are still welcome.

Juergen

The following changes since commit 6e566b211351bba74d6118f983f5fcd29e78a5b6:

  Merge branch 'for-next/imx-keypad' into next (2012-07-17 20:46:17 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/jbe/barebox.git next_provide_reset_sourceV5

for you to fetch changes up to 92cc203ac2806fe0818d2aa4ad5bea04bdb4121b:

  ARM/MXS: add reset cause detection (2012-07-18 10:40:22 +0200)

----------------------------------------------------------------
Juergen Beisert (4):
      Enable a way to provide the reason for "being here"
      ARM/Samsung: add support to detect the reset source
      ARM/i.MX: add support to detect the reset source
      ARM/MXS: add reset cause detection

 arch/arm/mach-imx/Makefile           |    1 +
 arch/arm/mach-imx/reset_source.c     |   72 ++++++++++++++++++++++++++++++++++
 arch/arm/mach-samsung/Makefile       |    1 +
 arch/arm/mach-samsung/reset_source.c |   56 ++++++++++++++++++++++++++
 common/Kconfig                       |    8 ++++
 common/Makefile                      |    1 +
 common/reset_source.c                |   44 +++++++++++++++++++++
 drivers/watchdog/im28wd.c            |   25 ++++++++++++
 include/reset_source.h               |   27 +++++++++++++
 9 files changed, 235 insertions(+)
 create mode 100644 arch/arm/mach-imx/reset_source.c
 create mode 100644 arch/arm/mach-samsung/reset_source.c
 create mode 100644 common/reset_source.c
 create mode 100644 include/reset_source.h


From jbe at pengutronix.de  Wed Jul 18 04:46:50 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 18 Jul 2012 10:46:50 +0200
Subject: [PATCH 4/4] ARM/MXS: add reset cause detection
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
References: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342601210-17849-5-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/watchdog/im28wd.c |   25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/watchdog/im28wd.c b/drivers/watchdog/im28wd.c
index b016910..1f987de 100644
--- a/drivers/watchdog/im28wd.c
+++ b/drivers/watchdog/im28wd.c
@@ -21,6 +21,7 @@
 #include <errno.h>
 #include <malloc.h>
 #include <watchdog.h>
+#include <reset_source.h>
 
 #define MXS_RTC_CTRL 0x0
 #define MXS_RTC_SET_ADDR 0x4
@@ -73,6 +74,27 @@ static int imx28_watchdog_set_timeout(struct watchdog *wd, unsigned timeout)
 	return 0;
 }
 
+static void __maybe_unused imx28_detect_reset_source(const struct imx28_wd *p)
+{
+	u32 reg;
+
+	reg = readl(p->regs + MXS_RTC_PERSISTENT0);
+	if (reg & MXS_RTC_PERSISTENT0_EXT_RST) {
+		writel(MXS_RTC_PERSISTENT0_EXT_RST,
+			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+		set_reset_source(RESET_POR);
+		return;
+	}
+	if (reg & MXS_RTC_PERSISTENT0_THM_RST) {
+		writel(MXS_RTC_PERSISTENT0_THM_RST,
+			p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+		set_reset_source(RESET_RST);
+		return;
+	}
+
+	set_reset_source(RESET_RST);
+}
+
 static int imx28_wd_probe(struct device_d *dev)
 {
 	struct imx28_wd *priv;
@@ -94,6 +116,9 @@ static int imx28_wd_probe(struct device_d *dev)
 	if (rc != 0)
 		goto on_error;
 
+	if (IS_ENABLED(CONFIG_RESET_SOURCE))
+		imx28_detect_reset_source(priv);
+
 	dev->priv = priv;
 	return 0;
 
-- 
1.7.10.4



From jbe at pengutronix.de  Wed Jul 18 04:46:49 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 18 Jul 2012 10:46:49 +0200
Subject: [PATCH 3/4] ARM/i.MX: add support to detect the reset source
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
References: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342601210-17849-4-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-imx/Makefile       |    1 +
 arch/arm/mach-imx/reset_source.c |   72 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 73 insertions(+)
 create mode 100644 arch/arm/mach-imx/reset_source.c

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 89a8946..2ff537a 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,4 +1,5 @@
 obj-y += clocksource.o gpio.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
 obj-$(CONFIG_ARCH_IMX1)  += speed-imx1.o  imx1.o  iomux-v1.o
 obj-$(CONFIG_ARCH_IMX25) += speed-imx25.o imx25.o iomux-v3.o
 obj-$(CONFIG_ARCH_IMX21) += speed-imx21.o imx21.o iomux-v1.o
diff --git a/arch/arm/mach-imx/reset_source.c b/arch/arm/mach-imx/reset_source.c
new file mode 100644
index 0000000..e7b2a90
--- /dev/null
+++ b/arch/arm/mach-imx/reset_source.c
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/imx-regs.h>
+
+#ifdef CONFIG_ARCH_IMX1
+#  define IMX_RESET_SRC_WDOG (1 << 1)
+#  define IMX_RESET_SRC_HRDRESET (1 << 0)
+/* let the compiler sort out useless code on this arch */
+#  define IMX_RESET_SRC_WARMSTART 0
+#  define IMX_RESET_SRC_COLDSTART 0
+#else
+  /* WRSR checked for i.MX25, i.MX27, i.MX31, i.MX35 and i.MX51 */
+# define WDOG_WRSR 0x04
+  /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_WARMSTART (1 << 0)
+  /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_WDOG (1 << 1)
+  /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_HRDRESET (1 << 3)
+  /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+#  define IMX_RESET_SRC_COLDSTART (1 << 4)
+#endif
+
+static unsigned read_detection_register(void)
+{
+#ifdef CONFIG_ARCH_IMX1
+	return readl(IMX_SYSCTRL_BASE);
+#else
+	return readw(IMX_WDT_BASE + WDOG_WRSR);
+#endif
+}
+
+static int imx_detect_reset_source(void)
+{
+	unsigned reg = read_detection_register();
+
+	if (reg & IMX_RESET_SRC_COLDSTART) {
+		set_reset_source(RESET_POR);
+		return 0;
+	}
+
+	if (reg & (IMX_RESET_SRC_HRDRESET | IMX_RESET_SRC_WARMSTART)) {
+		set_reset_source(RESET_RST);
+		return 0;
+	}
+
+	if (reg & IMX_RESET_SRC_WDOG) {
+		set_reset_source(RESET_WDG);
+		return 0;
+	}
+
+	/* else keep the default 'unknown' state */
+	return 0;
+}
+
+device_initcall(imx_detect_reset_source);
-- 
1.7.10.4



From jbe at pengutronix.de  Wed Jul 18 04:46:47 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 18 Jul 2012 10:46:47 +0200
Subject: [PATCH 1/4] Enable a way to provide the reason for "being here"
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
References: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342601210-17849-2-git-send-email-jbe@pengutronix.de>

Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivate the hanging system.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 common/Kconfig         |    8 ++++++++
 common/Makefile        |    1 +
 common/reset_source.c  |   44 ++++++++++++++++++++++++++++++++++++++++++++
 include/reset_source.h |   27 +++++++++++++++++++++++++++
 4 files changed, 80 insertions(+)
 create mode 100644 common/reset_source.c
 create mode 100644 include/reset_source.h

diff --git a/common/Kconfig b/common/Kconfig
index 5fe997d..9652e5d 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -554,6 +554,14 @@ config BAREBOXENV_TARGET
 config POLLER
 	bool "generic polling infrastructure"
 
+config RESET_SOURCE
+	bool "detect Reset cause"
+	depends on GLOBALVAR
+	help
+	  Provide a global variable at runtine which reflects the possible cause
+	  of the reset and why the bootloader is currently running. It can be
+	  useful for any kind of system recovery or repair.
+
 endmenu
 
 menu "Debugging                     "
diff --git a/common/Makefile b/common/Makefile
index d99dfa2..d74dffb 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -30,6 +30,7 @@ obj-y += startup.o
 obj-y += misc.o
 obj-y += memsize.o
 obj-$(CONFIG_GLOBALVAR) += globalvar.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
 obj-$(CONFIG_FILETYPE) += filetype.o
 obj-y += resource.o
 obj-$(CONFIG_MENU) += menu.o
diff --git a/common/reset_source.c b/common/reset_source.c
new file mode 100644
index 0000000..2a7f9ff
--- /dev/null
+++ b/common/reset_source.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <environment.h>
+#include <globalvar.h>
+#include <reset_source.h>
+
+static const char * const reset_src_names[] = {
+	[RESET_UKWN] = "unknown",
+	[RESET_POR] = "POR",
+	[RESET_RST] = "RST",
+	[RESET_WDG] = "WDG",
+	[RESET_WKE] = "WKE",
+	[RESET_JTAG] = "JTAG",
+};
+
+void set_reset_source(enum reset_src_type st)
+{
+	setenv("global.system.reset", reset_src_names[st]);
+}
+EXPORT_SYMBOL(set_reset_source);
+
+/* ensure this runs after the 'global' device is already registerd */
+static int init_reset_source(void)
+{
+	globalvar_add_simple("system.reset");
+	set_reset_source(RESET_UKWN);
+	return 0;
+}
+
+coredevice_initcall(init_reset_source);
diff --git a/include/reset_source.h b/include/reset_source.h
new file mode 100644
index 0000000..6734fbde
--- /dev/null
+++ b/include/reset_source.h
@@ -0,0 +1,27 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INCLUDE_RESET_SOURCE_H
+# define __INCLUDE_RESET_SOURCE_H
+
+enum reset_src_type {
+	RESET_UKWN,	/* maybe the SoC cannot detect the reset source */
+	RESET_POR,	/* Power On Reset (cold start) */
+	RESET_RST,	/* generic ReSeT (warm start) */
+	RESET_WDG,	/* watchdog */
+	RESET_WKE,	/* wake-up (some SoCs can handle this) */
+	RESET_JTAG,	/* JTAG reset */
+};
+
+void set_reset_source(enum reset_src_type);
+
+#endif /* __INCLUDE_RESET_SOURCE_H */
-- 
1.7.10.4



From jbe at pengutronix.de  Wed Jul 18 04:46:48 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 18 Jul 2012 10:46:48 +0200
Subject: [PATCH 2/4] ARM/Samsung: add support to detect the reset source
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
References: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342601210-17849-3-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile       |    1 +
 arch/arm/mach-samsung/reset_source.c |   56 ++++++++++++++++++++++++++++++++++
 2 files changed, 57 insertions(+)
 create mode 100644 arch/arm/mach-samsung/reset_source.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 6020587..f7db1f7 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,4 +1,5 @@
 obj-y += s3c-timer.o generic.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
diff --git a/arch/arm/mach-samsung/reset_source.c b/arch/arm/mach-samsung/reset_source.c
new file mode 100644
index 0000000..2456e3f
--- /dev/null
+++ b/arch/arm/mach-samsung/reset_source.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/s3c-iomap.h>
+
+/* S3C2440 relevant */
+#define S3C2440_GSTATUS2 0xb4
+# define S3C2440_GSTATUS2_PWRST (1 << 0)
+# define S3C2440_GSTATUS2_SLEEPRST (1 << 1)
+# define S3C2440_GSTATUS2_WDRST (1 << 2)
+
+static int s3c_detect_reset_source(void)
+{
+	u32 reg = readl(S3C_GPIO_BASE + S3C2440_GSTATUS2);
+
+	if (reg & S3C2440_GSTATUS2_PWRST) {
+		set_reset_source(RESET_POR);
+		writel(S3C2440_GSTATUS2_PWRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_SLEEPRST) {
+		set_reset_source(RESET_WKE);
+		writel(S3C2440_GSTATUS2_SLEEPRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_WDRST) {
+		set_reset_source(RESET_WDG);
+		writel(S3C2440_GSTATUS2_WDRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	/* else keep the default 'unknown' state */
+	return 0;
+}
+
+device_initcall(s3c_detect_reset_source);
-- 
1.7.10.4



From jbe at pengutronix.de  Wed Jul 18 04:53:29 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 18 Jul 2012 10:53:29 +0200
Subject: Board's naming style
Message-ID: <201207181053.29925.jbe@pengutronix.de>

Hi,

a look into "arch/arm/boards/" offers various boards starting with the 
vendor's name in their directory name (eukrea/freescale).
I would like to have the same for the FriendlyARM boards. Currently the 
Mini2440 and Tiny210 are part of the tree and I'm still working on the 
Mini6410 and Tiny6410 inclusion. Can we rename the currently existing 
Mini2440 and Tiny210 to friendlyarm-mini2440 and friendlyarm-tiny210?

@Sascha: Do you need a patch for this?

Regards,
Juergen

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Wed Jul 18 05:01:25 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 18 Jul 2012 11:01:25 +0200
Subject: Board's naming style
In-Reply-To: <201207181053.29925.jbe@pengutronix.de>
References: <201207181053.29925.jbe@pengutronix.de>
Message-ID: <20120718090125.GE30009@pengutronix.de>

On Wed, Jul 18, 2012 at 10:53:29AM +0200, Juergen Beisert wrote:
> Hi,
> 
> a look into "arch/arm/boards/" offers various boards starting with the 
> vendor's name in their directory name (eukrea/freescale).
> I would like to have the same for the FriendlyARM boards. Currently the 
> Mini2440 and Tiny210 are part of the tree and I'm still working on the 
> Mini6410 and Tiny6410 inclusion. Can we rename the currently existing 
> Mini2440 and Tiny210 to friendlyarm-mini2440 and friendlyarm-tiny210?

Good idea.

> 
> @Sascha: Do you need a patch for this?

Yes. Please generate the patches with -M to make the patches reviewable.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From stutzsven at web.de  Wed Jul 18 05:44:29 2012
From: stutzsven at web.de (Stutz Sven)
Date: Wed, 18 Jul 2012 11:44:29 +0200
Subject: AT91SAM9263-EK
In-Reply-To: <50065575.4090808@web.de>
References: <50065575.4090808@web.de>
Message-ID: <5006857D.4020505@web.de>


Hello Sascha,

thanks a lot for your help.

When I completely switch off the ecc, Barebox is loading the Linux kernel.
But I guess that the ecc is necessary especially for NAND-Flash devices.


The AT91SAM9263 controller has a ecc unit implemented. There are three 
registers and the error calculation is done automatically, only the 
error correction must be done in software.
Or is it better to you use the software ecc and I should try to fix the 
software problem?
Can you give me some hints to fix this problem?

Btw. I have found the description table for the NAND devices. But what 
would happen if I change the connections between the controller and the 
NAND-Flash, where are those port description stored or the timings to 
access the data bus?


best regards Sven




From j.weitzel at phytec.de  Wed Jul 18 08:37:13 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Wed, 18 Jul 2012 14:37:13 +0200
Subject: [RFC 3/3] mtd omap nand: reconfigure buswidth
In-Reply-To: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
References: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1342615033-3232-4-git-send-email-j.weitzel@phytec.de>

If nand_scan_ident fail try to reconfigure buswidth from 8bit to 16bit or
the other way around.

There are still the ugly debug messages like:
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xb3 (Micron NAND 1GiB 1,8V 16-bit)
NAND bus width 8 instead 16 bit
No NAND device found (-22)!
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xb3 (Micron NAND 1GiB 1,8V 16-bit)

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 drivers/mtd/nand/nand_omap_gpmc.c |   30 ++++++++++++++++++++++++++++--
 1 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
index d55dcaa..b80ac14 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -803,6 +803,27 @@ static int omap_gpmc_eccmode_set(struct device_d *dev, struct param_d *param, co
 	return omap_gpmc_eccmode(oinfo, i);
 }
 
+void gpmc_reconfigure_buswidth(struct gpmc_nand_info *oinfo)
+{
+	struct nand_chip *nand = &oinfo->nand;
+	struct gpmc_config cfg;
+
+	gpmc_get_config(oinfo->gpmc_cs, &cfg);
+
+	if (nand->options & NAND_BUSWIDTH_16) {
+		cfg.cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
+		nand->options ^= NAND_BUSWIDTH_16;
+	} else {
+		cfg.cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+				GPMC_CONFIG1_DEVICESIZE_16;
+		nand->options |= NAND_BUSWIDTH_16;
+	}
+	debug("reconfigure buswidth to %d bit\n",
+		(nand->options & NAND_BUSWIDTH_16) ? 16 : 8);
+
+	gpmc_cs_config(oinfo->gpmc_cs, &cfg);
+}
+
 /**
  * @brief nand device probe.
  *
@@ -924,8 +945,13 @@ static int gpmc_nand_probe(struct device_d *pdev)
 
 	/* first scan to find the device and get the page size */
 	if (nand_scan_ident(minfo, 1)) {
-		err = -ENXIO;
-		goto out_release_mem;
+		/* retry with changed buswidth*/
+		gpmc_reconfigure_buswidth(oinfo);
+
+		if (nand_scan_ident(minfo, 1)) {
+			err = -ENXIO;
+			goto out_release_mem;
+		}
 	}
 
 	switch (pdata->device_width) {
-- 
1.7.0.4



From j.weitzel at phytec.de  Wed Jul 18 08:37:12 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Wed, 18 Jul 2012 14:37:12 +0200
Subject: [PATCH 2/3] gpmc: Add reset to gpmc_generic_init
In-Reply-To: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
References: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1342615033-3232-3-git-send-email-j.weitzel@phytec.de>

Add reset to gpmc_generic_init as proposed by TRM.
This also fixes some strange timing issue while GPMC Initialization for
NAND OMAP4460

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/mach-omap/gpmc.c |   10 +++++++++-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index 399f68a..4649a1d 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -28,6 +28,7 @@
  * MA 02111-1307 USA
  */
 #include <common.h>
+#include <clock.h>
 #include <init.h>
 #include <io.h>
 #include <mach/silicon.h>
@@ -48,13 +49,20 @@
  */
 void gpmc_generic_init(unsigned int cfg)
 {
+	uint64_t start;
 	unsigned int reg = GPMC_REG(CONFIG7_0);
 	char x = 0;
 
 	debug("gpmccfg=%x\n", cfg);
 	/* Generic Configurations */
+	/* reset gpmc */
+	start = get_time_ns();
 	/* No idle, L3 clock free running */
-	writel(0x10, GPMC_REG(SYS_CONFIG));
+	writel(0x12, GPMC_REG(SYS_CONFIG));
+	while (!readl(GPMC_REG(SYS_STATUS)))
+		if (is_timeout(start, MSECOND))
+			printf("timeout on gpmc reset\n");
+
 	/* No Timeout */
 	writel(0x00, GPMC_REG(TIMEOUT_CONTROL));
 	/* No IRQs */
-- 
1.7.0.4



From j.weitzel at phytec.de  Wed Jul 18 08:37:10 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Wed, 18 Jul 2012 14:37:10 +0200
Subject: [PATCH 0/3] omap gpmc nand autodetect
Message-ID: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>


Jan Weitzel (3):
  OMAP GPMC NAND: use buswidth from GPMC
  gpmc: Add reset to gpmc_generic_init
  mtd omap nand: reconfigure buswidth

 arch/arm/boards/pcm049/board.c         |    4 ++--
 arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++++++++++++++++++-----
 arch/arm/mach-omap/gpmc.c              |   29 ++++++++++++++++++++++++++++-
 arch/arm/mach-omap/include/mach/gpmc.h |    8 ++++++++
 drivers/mtd/nand/nand_omap_gpmc.c      |   30 ++++++++++++++++++++++++++++--
 5 files changed, 84 insertions(+), 10 deletions(-)



From j.weitzel at phytec.de  Wed Jul 18 08:37:11 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Wed, 18 Jul 2012 14:37:11 +0200
Subject: [PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC
In-Reply-To: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
References: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1342615033-3232-2-git-send-email-j.weitzel@phytec.de>

GPMC could be already configured by xloader or rom bootloader
Use the configured buswidth (width == 0) or set it explicit in the board file.

Use autodetect on pcm049

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/boards/pcm049/board.c         |    4 ++--
 arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++++++++++++++++++-----
 arch/arm/mach-omap/gpmc.c              |   19 +++++++++++++++++++
 arch/arm/mach-omap/include/mach/gpmc.h |    8 ++++++++
 4 files changed, 47 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 3a2b574..4f056e0 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
 
 	pcm049_network_init();
 
-	gpmc_generic_nand_devices_init(0, 8,
+	/* Autodetect buswidth*/
+	gpmc_generic_nand_devices_init(0, 0,
 			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
-
 #ifdef CONFIG_PARTITION
 	devfs_add_partition("nand0", 0x00000, SZ_128K,
 			DEVFS_PARTITION_FIXED, "xload_raw");
diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
index cf87b57..06f9576 100644
--- a/arch/arm/mach-omap/devices-gpmc-nand.c
+++ b/arch/arm/mach-omap/devices-gpmc-nand.c
@@ -35,9 +35,7 @@
 #include <mach/silicon.h>
 #include <mach/gpmc.h>
 #include <mach/gpmc_nand.h>
-
-#define GPMC_CONF1_VALx8	0x00000800
-#define GPMC_CONF1_VALx16	0x00001800
+#include <mach/xload.h>
 
 /** NAND platform specific settings settings */
 static struct gpmc_nand_platform_data nand_plat = {
@@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
  *
  * @return success/fail based on device function
  */
+
 int gpmc_generic_nand_devices_init(int cs, int width,
 		enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
 {
 	nand_plat.cs = cs;
 
+	if (width == 0) {
+		struct gpmc_config cfg;
+		/* try to get buswidth from gpmc */
+		gpmc_get_config(cs, &cfg);
+		width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
+
+		if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
+			debug("GPMC not configured for NAND, "
+					"try width %d bit\n", width);
+
+		debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
+	}
+
 	if (width == 16)
-		nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
+		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+					GPMC_CONFIG1_DEVICESIZE_16;
 	else
-		nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
+		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
 
 	nand_plat.device_width = width;
 	nand_plat.ecc_mode = eccmode;
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index e8946d7..399f68a 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
 	mdelay(1);		/* Settling time */
 }
 EXPORT_SYMBOL(gpmc_cs_config);
+
+void gpmc_get_config(char cs, struct gpmc_config *config)
+{
+	unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
+	unsigned int cfg7;
+	unsigned char i;
+
+	/* Read the CFG1-6 regs */
+	for (i = 0; i < 6; i++) {
+		config->cfg[i] = readl(reg);
+		reg += GPMC_CONFIG_REG_OFF;
+	}
+
+	cfg7 = readl(reg);
+
+	config->size = (cfg7 >> 8) & 0xf;
+	config->base = (cfg7 & 0x3F) << 24;
+}
+EXPORT_SYMBOL(gpmc_get_config);
diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
index 3ddc5f5..84260fc 100644
--- a/arch/arm/mach-omap/include/mach/gpmc.h
+++ b/arch/arm/mach-omap/include/mach/gpmc.h
@@ -140,6 +140,11 @@
 
 #define NAND_WP_BIT		0x00000010
 
+#define GPMC_CONFIG1_DEVICESIZE(val)	((val & 3) << 12)
+#define GPMC_CONFIG1_DEVICESIZE_16	GPMC_CONFIG1_DEVICESIZE(1)
+#define GPMC_CONFIG1_DEVICETYPE(val)	((val & 3) << 10)
+#define GPMC_CONFIG1_DEVICETYPE_NAND	GPMC_CONFIG1_DEVICETYPE(2)
+
 #ifndef __ASSEMBLY__
 
 /** Generic GPMC configuration structure to be used to configure a
@@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
 /** Configuration for a specific chip select */
 void gpmc_cs_config(char cs, struct gpmc_config *config);
 
+/** Get Configuration for a specific chip select */
+void gpmc_get_config(char cs, struct gpmc_config *config);
+
 #endif
 
 #endif /* __ASM_ARCH_OMAP_GPMC_H */
-- 
1.7.0.4



From J.Kilb at phytec.de  Wed Jul 18 08:58:44 2012
From: J.Kilb at phytec.de (Juergen Kilb)
Date: Wed, 18 Jul 2012 14:58:44 +0200
Subject: [PATCH] Added SDR-size auto detection.
Message-ID: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>


Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
---
 arch/arm/boards/phycard-a-l1/pca-a-l1.c |  169 +++++++++++++++++++++++--------
 1 files changed, 125 insertions(+), 44 deletions(-)

diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index a388f63..1dc7678 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -73,10 +73,82 @@
 
 #define SMC911X_BASE 0x2c000000
 
+/* Slower full frequency range default timings for x32 operation */
+#define SDP_SDRC_SHARING	0x00000100
+/* Diabling power down mode using CKE pin */
+#define SDP_SDRC_POWER_POP	0x00000081
+/* rkw - need to find of 90/72 degree recommendation for speed like before. */
+#define SDP_SDRC_DLLAB_CTRL ((DLL_ENADLL << 3) | \
+	(DLL_LOCKDLL << 2) | (DLL_DLLPHASE_90 << 1))
+
+/* used to create an array of memory configuartions. */
+struct sdrc_config {
+	u32	cs_cfg;
+	u32	mcfg;
+	u32	mr;
+	u32	actim_ctrla;
+	u32	actim_ctrlb;
+	u32	rfr_ctrl;
+} const sdrc_config[] = {
+/* max cs_size for autodetection, common timing */
+/* 2x256MByte, 14 Rows, 10 Columns , RBC (BAL=2) */
+{ 0x00000004, 0x03590099, 0x00000032, 0x9A9DB4C6, 0x00011216, 0x0004e201},
+/* MT46H32M32LF 2x128MByte, 13 Rows, 10 Columns */
+{ 0x00000001, 0x02584099, 0x00000032, 0x9A9DB4C6, 0x00011216, 0x0004e201},
+/* MT46H64M32LF 1x256MByte, 14 Rows, 10 Columns */
+{ 0x00000002, 0x03588099, 0x00000032, 0x629DB4C6, 0x00011113, 0x0004e201},
+/* MT64H128M32L2 2x256MByte, 14 Rows, 10 Columns */
+{ 0x00000002, 0x03588099, 0x00000032, 0x629DB4C6, 0x00011113, 0x0004e201},
+};
+
 /*
  * Boot-time initialization(s)
  */
 
+/*********************************************************************
+ * init_sdram_ddr() - Init DDR controller.
+ *********************************************************************/
+void init_sdram_ddr(void)
+{
+	/* reset sdrc controller */
+	writel(SOFTRESET, SDRC_REG(SYSCONFIG));
+	wait_on_value(1<<0, 1<<0, SDRC_REG(STATUS), 12000000);
+	writel(0, SDRC_REG(SYSCONFIG));
+
+	/* setup sdrc to ball mux */
+	writel(SDP_SDRC_SHARING, SDRC_REG(SHARING));
+	writel(SDP_SDRC_POWER_POP, SDRC_REG(POWER));
+
+	/* set up dll */
+	writel(SDP_SDRC_DLLAB_CTRL, SDRC_REG(DLLA_CTRL));
+	sdelay(0x2000);	/* give time to lock */
+
+}
+/*********************************************************************
+ * config_sdram_ddr() - Init DDR on dev board.
+ *********************************************************************/
+void config_sdram_ddr(u8 cs, u8 cfg)
+{
+
+	writel(sdrc_config[cfg].mcfg, SDRC_REG(MCFG_0) + (0x30 * cs));
+	writel(sdrc_config[cfg].actim_ctrla, SDRC_REG(ACTIM_CTRLA_0) + (0x28 * cs));
+	writel(sdrc_config[cfg].actim_ctrlb, SDRC_REG(ACTIM_CTRLB_0) + (0x28 * cs));
+	writel(sdrc_config[cfg].rfr_ctrl, SDRC_REG(RFR_CTRL_0) + (0x30 * cs));
+
+	writel(CMD_NOP, SDRC_REG(MANUAL_0) + (0x30 * cs));
+
+	sdelay(5000);
+
+	writel(CMD_PRECHARGE, SDRC_REG(MANUAL_0) + (0x30 * cs));
+	writel(CMD_AUTOREFRESH, SDRC_REG(MANUAL_0) + (0x30 * cs));
+	writel(CMD_AUTOREFRESH, SDRC_REG(MANUAL_0) + (0x30 * cs));
+
+	/* set mr0 */
+	writel(sdrc_config[cfg].mr, SDRC_REG(MR_0) + (0x30 * cs));
+
+	sdelay(2000);
+}
+
 /**
  * @brief Initialize the SDRC module
  * Initialisation for 1x256MByte but normally
@@ -85,49 +157,55 @@
  */
 static void pcaal1_sdrc_init(void)
 {
-	/* SDRAM software reset */
-	/* No idle ack and RESET enable */
-	writel(0x1A, SDRC_REG(SYSCONFIG));
-	sdelay(100);
-	/* No idle ack and RESET disable */
-	writel(0x18, SDRC_REG(SYSCONFIG));
-
-	/* SDRC Sharing register */
-	/* 32-bit SDRAM on data lane [31:0] - CS0 */
-	/* pin tri-stated = 1 */
-	writel(0x00000100, SDRC_REG(SHARING));
-
-	/* ----- SDRC Registers Configuration --------- */
-	/* SDRC_MCFG0 register */
-	writel(0x03588099, SDRC_REG(MCFG_0));
-
-	/* SDRC_RFR_CTRL0 register */
-	writel(0x0004e201, SDRC_REG(RFR_CTRL_0));
-
-	/* SDRC_ACTIM_CTRLA0 register */
-	writel(0x629DB4C6, SDRC_REG(ACTIM_CTRLA_0));
-
-	/* SDRC_ACTIM_CTRLB0 register */
-	writel(0x00011113, SDRC_REG(ACTIM_CTRLB_0));
-
-	/* Disble Power Down of CKE due to 1 CKE on combo part */
-	writel(0x00000081, SDRC_REG(POWER));
-
-	/* SDRC_MANUAL command register */
-	/* NOP command */
-	writel(0x00000000, SDRC_REG(MANUAL_0));
-	/* Precharge command */
-	writel(0x00000001, SDRC_REG(MANUAL_0));
-	/* Auto-refresh command */
-	writel(0x00000002, SDRC_REG(MANUAL_0));
-	/* Auto-refresh command */
-	writel(0x00000002, SDRC_REG(MANUAL_0));
-
-	/* SDRC MR0 register Burst length=4 */
-	writel(0x00000032, SDRC_REG(MR_0));
-
-	/* SDRC DLLA control register */
-	writel(0x0000000A, SDRC_REG(DLLA_CTRL));
+	u32 test0, test1;
+	char cfg;
+
+	init_sdram_ddr();
+
+	config_sdram_ddr(0, 0); /* 256MByte at CS0 */
+	config_sdram_ddr(1, 0); /* 256MByte at CS1 */
+
+	test0 = get_ram_size((long *) 0x80000000, SZ_256M);
+	test1 = get_ram_size((long *) 0xA0000000, SZ_256M);
+
+	/* mask out lower nible, its not tested with
+	in common/memsize.c */
+	test1 &= 0xfffffff0;
+
+	if ((test1 > 0) && (test1 != test0))
+		hang();
+
+	cfg = -1; /* illegal configuration found */
+
+	if (test1 == 0) {
+		init_sdram_ddr();
+		writel((sdrc_config[(uchar) cfg].mcfg & 0xfffc00ff), SDRC_REG(MCFG_1));
+
+		/* 1 x 256MByte */
+		if (test0 == SZ_256M)
+			cfg = 2;
+
+		if (cfg != -1) {
+			config_sdram_ddr(0, cfg);
+			writel(sdrc_config[(uchar) cfg].cs_cfg, SDRC_REG(CS_CFG));
+		}
+		return;
+	}
+
+	/* reinit both cs with correct size */
+	/* 2 x 128MByte */
+	if (test0 == SZ_128M)
+		cfg = 1;
+	/* 2 x 256MByte */
+	if (test0 == SZ_256M)
+		cfg = 3;
+
+	if (cfg != -1) {
+		init_sdram_ddr();
+		writel(sdrc_config[(uchar) cfg].cs_cfg, SDRC_REG(CS_CFG));
+		config_sdram_ddr(0, cfg);
+		config_sdram_ddr(1, cfg);
+	}
 }
 
 /**
@@ -296,9 +374,12 @@ static int pcaal1_mem_init(void)
 				   IORESOURCE_MEM_WRITEABLE);
 
 	arm_add_mem_device("ram0", OMAP_SDRC_CS0, get_sdr_cs_size(SDRC_CS0_OSET));
+	printf("found %s at SDCS0\n", size_human_readable(get_sdr_cs_size(SDRC_CS0_OSET)));
 
-	if ((get_sdr_cs_size(SDRC_CS1_OSET) != 0) && (get_sdr_cs1_base() != OMAP_SDRC_CS0))
+	if ((get_sdr_cs_size(SDRC_CS1_OSET) != 0) && (get_sdr_cs1_base() != OMAP_SDRC_CS0)) {
 		arm_add_mem_device("ram1", get_sdr_cs1_base(), get_sdr_cs_size(SDRC_CS1_OSET));
+		printf("found %s at SDCS1\n", size_human_readable(get_sdr_cs_size(SDRC_CS1_OSET)));
+	}
 
 	return 0;
 }
-- 
1.7.0.4



From J.Kilb at phytec.de  Wed Jul 18 08:58:46 2012
From: J.Kilb at phytec.de (Juergen Kilb)
Date: Wed, 18 Jul 2012 14:58:46 +0200
Subject: [PATCH] pca-a-l1: added memory device for int. 60kB RAM.
In-Reply-To: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
References: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
Message-ID: <1342616327-2765-3-git-send-email-J.Kilb@phytec.de>


Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
---
 arch/arm/boards/phycard-a-l1/pca-a-l1.c         |    2 ++
 arch/arm/mach-omap/include/mach/omap3-silicon.h |    1 +
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 1cc2815..8fae405 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -292,6 +292,8 @@ static int pcaal1_mem_init(void)
 	 */
 	gpmc_generic_init(0x10);
 #endif
+	add_mem_device("sram0", OMAP_SRAM_BASE, 60 * SZ_1K,
+				   IORESOURCE_MEM_WRITEABLE);
 
 	arm_add_mem_device("ram0", OMAP_SDRC_CS0, get_sdr_cs_size(SDRC_CS0_OSET));
 
diff --git a/arch/arm/mach-omap/include/mach/omap3-silicon.h b/arch/arm/mach-omap/include/mach/omap3-silicon.h
index 361d25e..e4002e6 100644
--- a/arch/arm/mach-omap/include/mach/omap3-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap3-silicon.h
@@ -107,6 +107,7 @@
 #define OMAP_EHCI_BASE         (OMAP_L4_CORE_BASE + 0x64800)
 
 /** Interrupt Vector base address */
+#define OMAP_SRAM_BASE		0x40200000
 #define OMAP_SRAM_INTVECT	0x4020F800
 #define OMAP_SRAM_INTVECT_COPYSIZE	0x64
 /** Temporary stack for us to use C calls in low_level_init */
-- 
1.7.0.4



From J.Kilb at phytec.de  Wed Jul 18 08:58:45 2012
From: J.Kilb at phytec.de (Juergen Kilb)
Date: Wed, 18 Jul 2012 14:58:45 +0200
Subject: [PATCH] omap_hsmmc: Hack allert! Add delay in omap_hsmmc.
In-Reply-To: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
References: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
Message-ID: <1342616327-2765-2-git-send-email-J.Kilb@phytec.de>

Most of the time, a SD card was not found during probing.
This hack fixed the problem.
Further investigation needed !!

Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
---
 drivers/mci/omap_hsmmc.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/mci/omap_hsmmc.c b/drivers/mci/omap_hsmmc.c
index e0b245b..125e8a4 100644
--- a/drivers/mci/omap_hsmmc.c
+++ b/drivers/mci/omap_hsmmc.c
@@ -472,6 +472,8 @@ static int mmc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
 	writel(cmd->cmdarg, &mmc_base->arg);
 	writel((cmd->cmdidx << 24) | flags, &mmc_base->cmd);
 
+	mdelay(5); /* wait 5 ms */
+
 	start = get_time_ns();
 	do {
 		mmc_stat = readl(&mmc_base->stat);
-- 
1.7.0.4



From J.Kilb at phytec.de  Wed Jul 18 08:58:47 2012
From: J.Kilb at phytec.de (Juergen Kilb)
Date: Wed, 18 Jul 2012 14:58:47 +0200
Subject: [PATCH] phyCARD-A-L1: Create xload configuration.
In-Reply-To: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
References: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
Message-ID: <1342616327-2765-4-git-send-email-J.Kilb@phytec.de>

This configuration can be used to use barebox as
x-loader replacement.
Also the ECC-Mode is changed from SOFT to BCH8.

Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
---
 arch/arm/boards/phycard-a-l1/pca-a-l1.c       |   10 ++----
 arch/arm/configs/phycard_a_l1_xload_defconfig |   43 +++++++++++++++++++++++++
 arch/arm/mach-omap/Kconfig                    |    1 +
 3 files changed, 47 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/configs/phycard_a_l1_xload_defconfig

diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 8fae405..a388f63 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -312,6 +312,7 @@ struct omap_hsmmc_platform_data pcaal1_hsmmc_plat = {
 
 static int pcaal1_init_devices(void)
 {
+	gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_BCH8_CODE_HW, &omap3_nand_cfg);
 #ifdef CONFIG_MCI_OMAP_HSMMC
 	add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, OMAP_MMC1_BASE, SZ_4K,
 			   IORESOURCE_MEM, &pcaal1_hsmmc_plat);
@@ -332,12 +333,7 @@ device_initcall(pcaal1_init_devices);
 
 static int pcaal1_late_init(void)
 {
-	struct device_d *nand;
-
-	gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_SOFT, &omap3_nand_cfg);
-
-	nand = get_device_by_name("nand0");
-
+#ifdef CONFIG_PARTITION
 	devfs_add_partition("nand0", 0x00000, 0x80000, DEVFS_PARTITION_FIXED, "x-loader");
 	dev_add_bb_dev("self_raw", "x_loader0");
 
@@ -346,7 +342,7 @@ static int pcaal1_late_init(void)
 
 	devfs_add_partition("nand0", 0x260000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
 	dev_add_bb_dev("env_raw", "env0");
-
+#endif
 	return 0;
 }
 late_initcall(pcaal1_late_init);
diff --git a/arch/arm/configs/phycard_a_l1_xload_defconfig b/arch/arm/configs/phycard_a_l1_xload_defconfig
new file mode 100644
index 0000000..30253cb
--- /dev/null
+++ b/arch/arm/configs/phycard_a_l1_xload_defconfig
@@ -0,0 +1,43 @@
+CONFIG_ARCH_OMAP=y
+CONFIG_OMAP_BUILD_IFT=y
+CONFIG_MACH_PCAAL1=y
+CONFIG_AEABI=y
+CONFIG_THUMB2_BAREBOX=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+# CONFIG_ARM_EXCEPTIONS is not set
+CONFIG_ENVIRONMENT_VARIABLES=y
+CONFIG_TEXT_BASE=0x40200000
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x0000f000
+CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0x0000f000
+CONFIG_MEMORY_LAYOUT_FIXED=y
+CONFIG_STACK_BASE=0x4020F000
+CONFIG_STACK_SIZE=0xc00
+CONFIG_MALLOC_BASE=0x84000000
+CONFIG_MALLOC_SIZE=0x1000000
+CONFIG_MALLOC_DUMMY=y
+CONFIG_PROMPT="X-load pca-a-l1>"
+CONFIG_CBSIZE=128
+CONFIG_SHELL_NONE=y
+# CONFIG_ERRNO_MESSAGES is not set
+# CONFIG_TIMESTAMP is not set
+# CONFIG_CONSOLE_FULL is not set
+# CONFIG_DEFAULT_ENVIRONMENT is not set
+CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
+# CONFIG_SPI is not set
+CONFIG_MTD=y
+# CONFIG_MTD_WRITE is not set
+# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_NAND=y
+# CONFIG_NAND_ECC_SOFT is not set
+# CONFIG_NAND_ECC_HW_SYNDROME is not set
+# CONFIG_NAND_ECC_HW_NONE is not set
+# CONFIG_NAND_BBT is not set
+CONFIG_NAND_OMAP_GPMC=y
+CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
+# CONFIG_MCI_WRITE is not set
+CONFIG_MCI_OMAP_HSMMC=y
+# CONFIG_FS_RAMFS is not set
+# CONFIG_FS_DEVFS is not set
+CONFIG_FS_FAT=y
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 386c484..d735284 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -151,6 +151,7 @@ config MACH_PCM049
 config MACH_PCAAL1
 	bool "Phytec phyCARD-A-L1"
 	select OMAP_CLOCK_ALL
+	select HAVE_NOSHELL
 	depends on ARCH_OMAP3
 	  help
 	  Say Y here if you are using a phyCARD-A-L1 PCA-A-L1
-- 
1.7.0.4



From s.hauer at pengutronix.de  Wed Jul 18 10:22:32 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 18 Jul 2012 16:22:32 +0200
Subject: [PATCHv5] Enable a way to provide the reason for "being here"
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
References: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Message-ID: <20120718142232.GJ30009@pengutronix.de>

On Wed, Jul 18, 2012 at 10:46:46AM +0200, Juergen Beisert wrote:
> Many architectures support a way to detect why the bootloader is running.
> This patch adds a global variable to be able to use the cause in some kind of
> shell code to do special things on demand. For example to do an emergency boot,
> when the last boot fails and the watchdog reactivates the hanging system.
> 
> V2 includes Marc's suggesion.
> V3 includes the detection for the i.MX28 SoC and fixes its usage for other
> i.MX SoCs.
> V4 includes Marc's recent suggestion.
> V5 includes Sascha's comments.
> 
> Comments are still welcome.
> 

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul 18 11:06:16 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 18 Jul 2012 17:06:16 +0200
Subject: AT91SAM9263-EK
In-Reply-To: <5006857D.4020505@web.de>
References: <50065575.4090808@web.de>
 <5006857D.4020505@web.de>
Message-ID: <20120718150616.GK30009@pengutronix.de>

Hi Sven,

On Wed, Jul 18, 2012 at 11:44:29AM +0200, Stutz Sven wrote:
> 
> Hello Sascha,
> 
> thanks a lot for your help.
> 
> When I completely switch off the ecc, Barebox is loading the Linux kernel.
> But I guess that the ecc is necessary especially for NAND-Flash devices.

Indeed. You shouldn't use NAND without ecc.

> 
> 
> The AT91SAM9263 controller has a ecc unit implemented. There are
> three registers and the error calculation is done automatically,
> only the error correction must be done in software.
> Or is it better to you use the software ecc and I should try to fix
> the software problem?

If possible you should use hardware ecc. It may be though that it has
bugs that force you to use software ecc, but I'm not familiar with the
atmel hardware.

> Can you give me some hints to fix this problem?

Does it work in the kernel? If yes, try looking for differences. The
NAND layers are sufficiently similar.

> 
> Btw. I have found the description table for the NAND devices. But
> what would happen if I change the connections between the controller
> and the NAND-Flash, where are those port description stored or the
> timings to access the data bus?

I have no idea.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Wed Jul 18 12:38:03 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 18 Jul 2012 18:38:03 +0200
Subject: AT91SAM9263-EK
In-Reply-To: <20120718150616.GK30009@pengutronix.de>
References: <50065575.4090808@web.de> <5006857D.4020505@web.de>
 <20120718150616.GK30009@pengutronix.de>
Message-ID: <20120718163803.GB22657@game.jcrosoft.org>

On 17:06 Wed 18 Jul     , Sascha Hauer wrote:
> Hi Sven,
> 
> On Wed, Jul 18, 2012 at 11:44:29AM +0200, Stutz Sven wrote:
> > 
> > Hello Sascha,
> > 
> > thanks a lot for your help.
> > 
> > When I completely switch off the ecc, Barebox is loading the Linux kernel.
> > But I guess that the ecc is necessary especially for NAND-Flash devices.
> 
> Indeed. You shouldn't use NAND without ecc.
> 
> > 
> > 
> > The AT91SAM9263 controller has a ecc unit implemented. There are
> > three registers and the error calculation is done automatically,
> > only the error correction must be done in software.
> > Or is it better to you use the software ecc and I should try to fix
> > the software problem?
> 
> If possible you should use hardware ecc. It may be though that it has
> bugs that force you to use software ecc, but I'm not familiar with the
> atmel hardware.
the hw ecc work on 9263 but we do not use it on the kernel
> 
> > Can you give me some hints to fix this problem?
> 
> Does it work in the kernel? If yes, try looking for differences. The
> NAND layers are sufficiently similar.
the drivers as the same on both barebox and linux
> 
> > 
> > Btw. I have found the description table for the NAND devices. But
> > what would happen if I change the connections between the controller
> > and the NAND-Flash, where are those port description stored or the
> > timings to access the data bus?
smc

Best Regards,
J.


From s.hauer at pengutronix.de  Wed Jul 18 18:10:03 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 00:10:03 +0200
Subject: [PATCH 2/3] gpmc: Add reset to gpmc_generic_init
In-Reply-To: <1342615033-3232-3-git-send-email-j.weitzel@phytec.de>
References: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
 <1342615033-3232-3-git-send-email-j.weitzel@phytec.de>
Message-ID: <20120718221003.GR30009@pengutronix.de>

Hi Jan,

On Wed, Jul 18, 2012 at 02:37:12PM +0200, Jan Weitzel wrote:
> Add reset to gpmc_generic_init as proposed by TRM.
> This also fixes some strange timing issue while GPMC Initialization for
> NAND OMAP4460
> 
> Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> ---
>  arch/arm/mach-omap/gpmc.c |   10 +++++++++-
>  1 files changed, 9 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
> index 399f68a..4649a1d 100644
> --- a/arch/arm/mach-omap/gpmc.c
> +++ b/arch/arm/mach-omap/gpmc.c
> @@ -28,6 +28,7 @@
>   * MA 02111-1307 USA
>   */
>  #include <common.h>
> +#include <clock.h>
>  #include <init.h>
>  #include <io.h>
>  #include <mach/silicon.h>
> @@ -48,13 +49,20 @@
>   */
>  void gpmc_generic_init(unsigned int cfg)
>  {
> +	uint64_t start;
>  	unsigned int reg = GPMC_REG(CONFIG7_0);
>  	char x = 0;
>  
>  	debug("gpmccfg=%x\n", cfg);
>  	/* Generic Configurations */
> +	/* reset gpmc */
> +	start = get_time_ns();
>  	/* No idle, L3 clock free running */
> -	writel(0x10, GPMC_REG(SYS_CONFIG));
> +	writel(0x12, GPMC_REG(SYS_CONFIG));
> +	while (!readl(GPMC_REG(SYS_STATUS)))
> +		if (is_timeout(start, MSECOND))
> +			printf("timeout on gpmc reset\n");

This will hang forever in the printk on timeout.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul 18 18:11:27 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 00:11:27 +0200
Subject: [PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC
In-Reply-To: <1342615033-3232-2-git-send-email-j.weitzel@phytec.de>
References: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
 <1342615033-3232-2-git-send-email-j.weitzel@phytec.de>
Message-ID: <20120718221127.GS30009@pengutronix.de>

Hi Jan,

On Wed, Jul 18, 2012 at 02:37:11PM +0200, Jan Weitzel wrote:
> GPMC could be already configured by xloader or rom bootloader
> Use the configured buswidth (width == 0) or set it explicit in the board file.

What happens if it hasn't been configured by the ROM or xloader, for
example when booting from MMC?

Sascha

> 
> Use autodetect on pcm049
> 
> Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> ---
>  arch/arm/boards/pcm049/board.c         |    4 ++--
>  arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++++++++++++++++++-----
>  arch/arm/mach-omap/gpmc.c              |   19 +++++++++++++++++++
>  arch/arm/mach-omap/include/mach/gpmc.h |    8 ++++++++
>  4 files changed, 47 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
> index 3a2b574..4f056e0 100644
> --- a/arch/arm/boards/pcm049/board.c
> +++ b/arch/arm/boards/pcm049/board.c
> @@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
>  
>  	pcm049_network_init();
>  
> -	gpmc_generic_nand_devices_init(0, 8,
> +	/* Autodetect buswidth*/
> +	gpmc_generic_nand_devices_init(0, 0,
>  			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
> -
>  #ifdef CONFIG_PARTITION
>  	devfs_add_partition("nand0", 0x00000, SZ_128K,
>  			DEVFS_PARTITION_FIXED, "xload_raw");
> diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
> index cf87b57..06f9576 100644
> --- a/arch/arm/mach-omap/devices-gpmc-nand.c
> +++ b/arch/arm/mach-omap/devices-gpmc-nand.c
> @@ -35,9 +35,7 @@
>  #include <mach/silicon.h>
>  #include <mach/gpmc.h>
>  #include <mach/gpmc_nand.h>
> -
> -#define GPMC_CONF1_VALx8	0x00000800
> -#define GPMC_CONF1_VALx16	0x00001800
> +#include <mach/xload.h>
>  
>  /** NAND platform specific settings settings */
>  static struct gpmc_nand_platform_data nand_plat = {
> @@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
>   *
>   * @return success/fail based on device function
>   */
> +
>  int gpmc_generic_nand_devices_init(int cs, int width,
>  		enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
>  {
>  	nand_plat.cs = cs;
>  
> +	if (width == 0) {
> +		struct gpmc_config cfg;
> +		/* try to get buswidth from gpmc */
> +		gpmc_get_config(cs, &cfg);
> +		width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
> +
> +		if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
> +			debug("GPMC not configured for NAND, "
> +					"try width %d bit\n", width);
> +
> +		debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
> +	}
> +
>  	if (width == 16)
> -		nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
> +		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
> +					GPMC_CONFIG1_DEVICESIZE_16;
>  	else
> -		nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
> +		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
>  
>  	nand_plat.device_width = width;
>  	nand_plat.ecc_mode = eccmode;
> diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
> index e8946d7..399f68a 100644
> --- a/arch/arm/mach-omap/gpmc.c
> +++ b/arch/arm/mach-omap/gpmc.c
> @@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
>  	mdelay(1);		/* Settling time */
>  }
>  EXPORT_SYMBOL(gpmc_cs_config);
> +
> +void gpmc_get_config(char cs, struct gpmc_config *config)
> +{
> +	unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
> +	unsigned int cfg7;
> +	unsigned char i;
> +
> +	/* Read the CFG1-6 regs */
> +	for (i = 0; i < 6; i++) {
> +		config->cfg[i] = readl(reg);
> +		reg += GPMC_CONFIG_REG_OFF;
> +	}
> +
> +	cfg7 = readl(reg);
> +
> +	config->size = (cfg7 >> 8) & 0xf;
> +	config->base = (cfg7 & 0x3F) << 24;
> +}
> +EXPORT_SYMBOL(gpmc_get_config);
> diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
> index 3ddc5f5..84260fc 100644
> --- a/arch/arm/mach-omap/include/mach/gpmc.h
> +++ b/arch/arm/mach-omap/include/mach/gpmc.h
> @@ -140,6 +140,11 @@
>  
>  #define NAND_WP_BIT		0x00000010
>  
> +#define GPMC_CONFIG1_DEVICESIZE(val)	((val & 3) << 12)
> +#define GPMC_CONFIG1_DEVICESIZE_16	GPMC_CONFIG1_DEVICESIZE(1)
> +#define GPMC_CONFIG1_DEVICETYPE(val)	((val & 3) << 10)
> +#define GPMC_CONFIG1_DEVICETYPE_NAND	GPMC_CONFIG1_DEVICETYPE(2)
> +
>  #ifndef __ASSEMBLY__
>  
>  /** Generic GPMC configuration structure to be used to configure a
> @@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
>  /** Configuration for a specific chip select */
>  void gpmc_cs_config(char cs, struct gpmc_config *config);
>  
> +/** Get Configuration for a specific chip select */
> +void gpmc_get_config(char cs, struct gpmc_config *config);
> +
>  #endif
>  
>  #endif /* __ASM_ARCH_OMAP_GPMC_H */
> -- 
> 1.7.0.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


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From: crystal2 at cinmen.com (crystal2)
Date: Thu, 19 Jul 2012 15:22:43 +0800 (CST)
Subject: 540lm 1 BY 7w COB GU10 MR16 offer
Message-ID: <5d5c8b14.c5d7.1389e1e043a.Coremail.crystal2@cinmen.com>

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From j.weitzel at phytec.de  Thu Jul 19 03:54:26 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Thu, 19 Jul 2012 09:54:26 +0200
Subject: [PATCH 1/3 v2] OMAP GPMC NAND: use buswidth from GPMC
In-Reply-To: <20120718221127.GS30009@pengutronix.de>
References: <20120718221127.GS30009@pengutronix.de>
Message-ID: <1342684466-1477-1-git-send-email-j.weitzel@phytec.de>

GPMC could be already configured by xloader or rom bootloader
Use the configured buswidth (width == 0) or set it explicit in the board file.
If gpmc register isn't configured for NAND, fallback to 8bit by gpmc reset
state.

Use autodetect on pcm049

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
v2: Update commit message

 arch/arm/boards/pcm049/board.c         |    4 ++--
 arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++++++++++++++++++-----
 arch/arm/mach-omap/gpmc.c              |   19 +++++++++++++++++++
 arch/arm/mach-omap/include/mach/gpmc.h |    8 ++++++++
 4 files changed, 47 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 3a2b574..4f056e0 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
 
 	pcm049_network_init();
 
-	gpmc_generic_nand_devices_init(0, 8,
+	/* Autodetect buswidth*/
+	gpmc_generic_nand_devices_init(0, 0,
 			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
-
 #ifdef CONFIG_PARTITION
 	devfs_add_partition("nand0", 0x00000, SZ_128K,
 			DEVFS_PARTITION_FIXED, "xload_raw");
diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
index cf87b57..06f9576 100644
--- a/arch/arm/mach-omap/devices-gpmc-nand.c
+++ b/arch/arm/mach-omap/devices-gpmc-nand.c
@@ -35,9 +35,7 @@
 #include <mach/silicon.h>
 #include <mach/gpmc.h>
 #include <mach/gpmc_nand.h>
-
-#define GPMC_CONF1_VALx8	0x00000800
-#define GPMC_CONF1_VALx16	0x00001800
+#include <mach/xload.h>
 
 /** NAND platform specific settings settings */
 static struct gpmc_nand_platform_data nand_plat = {
@@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
  *
  * @return success/fail based on device function
  */
+
 int gpmc_generic_nand_devices_init(int cs, int width,
 		enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
 {
 	nand_plat.cs = cs;
 
+	if (width == 0) {
+		struct gpmc_config cfg;
+		/* try to get buswidth from gpmc */
+		gpmc_get_config(cs, &cfg);
+		width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
+
+		if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
+			debug("GPMC not configured for NAND, "
+					"try width %d bit\n", width);
+
+		debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
+	}
+
 	if (width == 16)
-		nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
+		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+					GPMC_CONFIG1_DEVICESIZE_16;
 	else
-		nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
+		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
 
 	nand_plat.device_width = width;
 	nand_plat.ecc_mode = eccmode;
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index e8946d7..399f68a 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
 	mdelay(1);		/* Settling time */
 }
 EXPORT_SYMBOL(gpmc_cs_config);
+
+void gpmc_get_config(char cs, struct gpmc_config *config)
+{
+	unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
+	unsigned int cfg7;
+	unsigned char i;
+
+	/* Read the CFG1-6 regs */
+	for (i = 0; i < 6; i++) {
+		config->cfg[i] = readl(reg);
+		reg += GPMC_CONFIG_REG_OFF;
+	}
+
+	cfg7 = readl(reg);
+
+	config->size = (cfg7 >> 8) & 0xf;
+	config->base = (cfg7 & 0x3F) << 24;
+}
+EXPORT_SYMBOL(gpmc_get_config);
diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
index 3ddc5f5..84260fc 100644
--- a/arch/arm/mach-omap/include/mach/gpmc.h
+++ b/arch/arm/mach-omap/include/mach/gpmc.h
@@ -140,6 +140,11 @@
 
 #define NAND_WP_BIT		0x00000010
 
+#define GPMC_CONFIG1_DEVICESIZE(val)	((val & 3) << 12)
+#define GPMC_CONFIG1_DEVICESIZE_16	GPMC_CONFIG1_DEVICESIZE(1)
+#define GPMC_CONFIG1_DEVICETYPE(val)	((val & 3) << 10)
+#define GPMC_CONFIG1_DEVICETYPE_NAND	GPMC_CONFIG1_DEVICETYPE(2)
+
 #ifndef __ASSEMBLY__
 
 /** Generic GPMC configuration structure to be used to configure a
@@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
 /** Configuration for a specific chip select */
 void gpmc_cs_config(char cs, struct gpmc_config *config);
 
+/** Get Configuration for a specific chip select */
+void gpmc_get_config(char cs, struct gpmc_config *config);
+
 #endif
 
 #endif /* __ASM_ARCH_OMAP_GPMC_H */
-- 
1.7.0.4



From j.weitzel at phytec.de  Thu Jul 19 03:58:18 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Thu, 19 Jul 2012 09:58:18 +0200
Subject: [PATCH 2/3 v2] gpmc: Add reset to gpmc_generic_init
In-Reply-To: <20120718221003.GR30009@pengutronix.de>
References: <20120718221003.GR30009@pengutronix.de>
Message-ID: <1342684698-3123-1-git-send-email-j.weitzel@phytec.de>

Add reset to gpmc_generic_init as proposed by TRM.
This also fixes some strange timing issue while GPMC Initialization for
NAND OMAP4460

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
v2: fix timeout endless loop

 arch/arm/mach-omap/gpmc.c |   12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index 399f68a..b3fa56c 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -28,6 +28,7 @@
  * MA 02111-1307 USA
  */
 #include <common.h>
+#include <clock.h>
 #include <init.h>
 #include <io.h>
 #include <mach/silicon.h>
@@ -48,13 +49,22 @@
  */
 void gpmc_generic_init(unsigned int cfg)
 {
+	uint64_t start;
 	unsigned int reg = GPMC_REG(CONFIG7_0);
 	char x = 0;
 
 	debug("gpmccfg=%x\n", cfg);
 	/* Generic Configurations */
+	/* reset gpmc */
+	start = get_time_ns();
 	/* No idle, L3 clock free running */
-	writel(0x10, GPMC_REG(SYS_CONFIG));
+	writel(0x12, GPMC_REG(SYS_CONFIG));
+	while (!readl(GPMC_REG(SYS_STATUS)))
+		if (is_timeout(start, MSECOND)) {
+			printf("timeout on gpmc reset\n");
+			break;
+		}
+
 	/* No Timeout */
 	writel(0x00, GPMC_REG(TIMEOUT_CONTROL));
 	/* No IRQs */
-- 
1.7.0.4



From s.hauer at pengutronix.de  Thu Jul 19 04:12:56 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:12:56 +0200
Subject: [PATCH 3/9] ARM: remove board linker script option
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-4-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/Kconfig      |   12 ------------
 arch/arm/Makefile     |    3 +--
 arch/arm/lib/Makefile |    3 +--
 3 files changed, 2 insertions(+), 16 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index af4cb59..d988455 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1,15 +1,3 @@
-#
-#
-#
-config BOARD_LINKER_SCRIPT
-	bool
-	default n
-
-config GENERIC_LINKER_SCRIPT
-	bool
-	default y
-	depends on !BOARD_LINKER_SCRIPT
-
 config ARM
 	bool
 	select HAS_KALLSYMS
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..cbbc0a0 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -207,7 +207,6 @@ endif
 common-y += $(BOARD) $(MACH)
 common-y += arch/arm/lib/ arch/arm/cpu/
 
-lds-$(CONFIG_GENERIC_LINKER_SCRIPT)	:= arch/arm/lib/barebox.lds
-lds-$(CONFIG_BOARD_LINKER_SCRIPT)	:= $(BOARD)/barebox.lds
+lds-y	:= arch/arm/lib/barebox.lds
 
 CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 27a4b88..1eaf474 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -20,5 +20,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memcpy.o
 obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
 obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
-extra-$(CONFIG_GENERIC_LINKER_SCRIPT) += barebox.lds
-
+extra-y += barebox.lds
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:12:55 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:12:55 +0200
Subject: [PATCH 2/9] ARM lds: remove unused got
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-3-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/lib/barebox.lds.S |    3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index 3fd271b..736e5f0 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -80,9 +80,6 @@ SECTIONS
 	. = ALIGN(4);
 	.data : { *(.data*) }
 
-	. = ALIGN(4);
-	.got : { *(.got*) }
-
 	. = .;
 	__barebox_cmd_start = .;
 	.barebox_cmd : { BAREBOX_CMDS }
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:12:58 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:12:58 +0200
Subject: [PATCH 5/9] ARM startup: calculate offset instead of runtime address
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-6-git-send-email-s.hauer@pengutronix.de>

Calculating the offset between runtime and linked address makes the
intention of the binary copy function a bit more clear.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/cpu/start.c |   12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 523179d..cabe4d2 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -104,7 +104,7 @@ void __naked __bare_init reset(void)
  */
 void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 {
-	uint32_t r, addr;
+	uint32_t r, addr, offset;
 
 	/*
 	 * Get runtime address of this function. Do not
@@ -116,13 +116,13 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	r = STACK_BASE + STACK_SIZE - 16;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	/* Get start of binary image */
-	addr -= (uint32_t)&__ll_return - TEXT_BASE;
+	/* Get offset between linked address and runtime address */
+	offset = (uint32_t)__ll_return - addr;
 
 	/* relocate to link address if necessary */
-	if (addr != TEXT_BASE)
-		memcpy((void *)TEXT_BASE, (void *)addr,
-				(unsigned int)&__bss_start - TEXT_BASE);
+	if (offset)
+		memcpy((void *)_text, (void *)(_text - offset),
+				__bss_start - _text);
 
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:12:57 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:12:57 +0200
Subject: [PATCH 4/9] ARM: remove exception vectors from boards
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-5-git-send-email-s.hauer@pengutronix.de>

The exception vector table will become part of the uncompressed image,
so we can't reference them from the lowlevel init stuff anymore.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c     |    4 +---
 arch/arm/boards/eukrea_cpuimx35/flash_header.c        |    2 --
 arch/arm/boards/freescale-mx25-3-stack/3stack.c       |    4 +---
 arch/arm/boards/freescale-mx35-3-stack/flash_header.c |    4 +---
 arch/arm/boards/freescale-mx6-arm2/flash_header.c     |    3 ++-
 arch/arm/boards/tqma53/flash_header.c                 |    3 ++-
 6 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
index 1b8f618..b3b0838 100644
--- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
+++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
@@ -49,8 +49,6 @@
 #include <mach/devices-imx25.h>
 #include <asm/barebox-arm-head.h>
 
-extern void exception_vectors(void);
-
 void __naked __flash_header_start go(void)
 {
 	barebox_arm_head();
@@ -72,7 +70,7 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
 };
 
 struct imx_flash_header __flash_header_section flash_header = {
-	.app_code_jump_vector	= DEST_BASE + ((unsigned int)&exception_vectors - TEXT_BASE),
+	.app_code_jump_vector	= DEST_BASE + 0x1000,
 	.app_code_barker	= APP_CODE_BARKER,
 	.app_code_csf		= 0,
 	.dcd_ptr_ptr		= FLASH_HEADER_BASE + offsetof(struct imx_flash_header, dcd),
diff --git a/arch/arm/boards/eukrea_cpuimx35/flash_header.c b/arch/arm/boards/eukrea_cpuimx35/flash_header.c
index a745442..26752d1 100644
--- a/arch/arm/boards/eukrea_cpuimx35/flash_header.c
+++ b/arch/arm/boards/eukrea_cpuimx35/flash_header.c
@@ -3,8 +3,6 @@
 #include <mach/imx-regs.h>
 #include <asm/barebox-arm-head.h>
 
-extern void exception_vectors(void);
-
 void __naked __flash_header_start go(void)
 {
 	barebox_arm_head();
diff --git a/arch/arm/boards/freescale-mx25-3-stack/3stack.c b/arch/arm/boards/freescale-mx25-3-stack/3stack.c
index 323cd11..6b6146d 100644
--- a/arch/arm/boards/freescale-mx25-3-stack/3stack.c
+++ b/arch/arm/boards/freescale-mx25-3-stack/3stack.c
@@ -45,8 +45,6 @@
 #include <mach/devices-imx25.h>
 #include <asm/barebox-arm-head.h>
 
-extern void exception_vectors(void);
-
 void __naked __flash_header_start go(void)
 {
 	barebox_arm_head();
@@ -95,7 +93,7 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
 };
 
 struct imx_flash_header __flash_header_section flash_header = {
-	.app_code_jump_vector	= DEST_BASE + ((unsigned int)&exception_vectors - TEXT_BASE),
+	.app_code_jump_vector	= DEST_BASE + 0x1000,
 	.app_code_barker	= APP_CODE_BARKER,
 	.app_code_csf		= 0,
 	.dcd_ptr_ptr		= FLASH_HEADER_BASE + offsetof(struct imx_flash_header, dcd),
diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c
index 0786836..66763db 100644
--- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c
+++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c
@@ -3,8 +3,6 @@
 #include <mach/imx-regs.h>
 #include <asm/barebox-arm-head.h>
 
-extern void exception_vectors(void);
-
 void __naked __flash_header_start go(void)
 {
 	barebox_arm_head();
@@ -59,7 +57,7 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
 
 
 struct imx_flash_header __flash_header_section flash_header = {
-	.app_code_jump_vector	= DEST_BASE + ((unsigned int)&exception_vectors - TEXT_BASE),
+	.app_code_jump_vector	= DEST_BASE + 0x1000,
 	.app_code_barker	= APP_CODE_BARKER,
 	.app_code_csf		= 0,
 	.dcd_ptr_ptr		= FLASH_HEADER_BASE + offsetof(struct imx_flash_header, dcd),
diff --git a/arch/arm/boards/freescale-mx6-arm2/flash_header.c b/arch/arm/boards/freescale-mx6-arm2/flash_header.c
index 79f3113..69d9cfa 100644
--- a/arch/arm/boards/freescale-mx6-arm2/flash_header.c
+++ b/arch/arm/boards/freescale-mx6-arm2/flash_header.c
@@ -15,12 +15,13 @@
 
 #include <common.h>
 #include <asm/byteorder.h>
+#include <asm/barebox-arm-head.h>
 #include <mach/imx-flash-header.h>
 #include <mach/imx6-regs.h>
 
 void __naked __flash_header_start go(void)
 {
-	__asm__ __volatile__("b exception_vectors\n");
+	barebox_arm_head();
 }
 
 #define DCD(a, v) { .addr = cpu_to_be32(a), .val = cpu_to_be32(v), }
diff --git a/arch/arm/boards/tqma53/flash_header.c b/arch/arm/boards/tqma53/flash_header.c
index f5e817c..d912b38 100644
--- a/arch/arm/boards/tqma53/flash_header.c
+++ b/arch/arm/boards/tqma53/flash_header.c
@@ -15,11 +15,12 @@
 
 #include <common.h>
 #include <asm/byteorder.h>
+#include <asm/barebox-arm-head.h>
 #include <mach/imx-flash-header.h>
 
 void __naked __flash_header_start go(void)
 {
-	__asm__ __volatile__("b exception_vectors\n");
+	barebox_arm_head();
 }
 
 struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:12:54 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:12:54 +0200
Subject: [PATCH 1/9] lzo: Allow for static inlining
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-2-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 include/lzo.h              |    8 ++++++--
 lib/decompress_unlzo.c     |    9 +++++++--
 lib/lzo/lzo1x_decompress.c |    2 +-
 3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/include/lzo.h b/include/lzo.h
index 0530a68..ceacfba 100644
--- a/include/lzo.h
+++ b/include/lzo.h
@@ -19,12 +19,16 @@
 
 #define lzo1x_worst_compress(x) ((x) + ((x) / 16) + 64 + 3)
 
+#ifndef STATIC
+#define STATIC
+#endif
+
 /* This requires 'workmem' of size LZO1X_1_MEM_COMPRESS */
 int lzo1x_1_compress(const unsigned char *src, size_t src_len,
 			unsigned char *dst, size_t *dst_len, void *wrkmem);
 
 /* safe decompression with overrun testing */
-int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
+STATIC int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
 			unsigned char *dst, size_t *dst_len);
 
 /*
@@ -41,7 +45,7 @@ int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
 #define LZO_E_INPUT_NOT_CONSUMED	(-8)
 #define LZO_E_NOT_YET_IMPLEMENTED	(-9)
 
-int decompress_unlzo(u8 *input, int in_len,
+STATIC int decompress_unlzo(u8 *input, int in_len,
 		int (*fill) (void *, unsigned int),
 		int (*flush) (void *, unsigned int),
 		u8 *output, int *posp,
diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
index 000bd70..0e6a7ad 100644
--- a/lib/decompress_unlzo.c
+++ b/lib/decompress_unlzo.c
@@ -33,11 +33,16 @@
 #include <common.h>
 #include <malloc.h>
 #include <linux/types.h>
-#include <lzo.h>
 #include <errno.h>
 #include <fs.h>
 #include <xfuncs.h>
 
+#ifdef STATIC
+#include "lzo/lzo1x_decompress.c"
+#endif
+
+#include <lzo.h>
+
 #include <linux/compiler.h>
 #include <asm/unaligned.h>
 
@@ -106,7 +111,7 @@ static inline int parse_header(u8 *input, int *skip, int in_len)
 	return 1;
 }
 
-int decompress_unlzo(u8 *input, int in_len,
+STATIC int decompress_unlzo(u8 *input, int in_len,
 				int (*fill) (void *, unsigned int),
 				int (*flush) (void *, unsigned int),
 				u8 *output, int *posp,
diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c
index af94382..7f1451f 100644
--- a/lib/lzo/lzo1x_decompress.c
+++ b/lib/lzo/lzo1x_decompress.c
@@ -23,7 +23,7 @@
 #define COPY4(dst, src)	\
 		put_unaligned(get_unaligned((const u32 *)(src)), (u32 *)(dst))
 
-int lzo1x_decompress_safe(const unsigned char *in, size_t in_len,
+STATIC int lzo1x_decompress_safe(const unsigned char *in, size_t in_len,
 			unsigned char *out, size_t *out_len)
 {
 	const unsigned char * const ip_end = in + in_len;
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:12:59 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:12:59 +0200
Subject: [PATCH 6/9] ARM ep93xx: Get rid of special handling in linker file
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-7-git-send-email-s.hauer@pengutronix.de>

The ep93xx needs a special value at offset 0x1000. Rather than
do special handling in the linker file add aa header section
as done on i.MX.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/lib/barebox.lds.S                      |    5 -----
 arch/arm/mach-ep93xx/Makefile                   |    2 +-
 arch/arm/mach-ep93xx/header.c                   |    8 ++++++++
 arch/arm/mach-ep93xx/include/mach/barebox.lds.h |    9 +++++++++
 include/asm-generic/barebox.lds.h               |    3 ++-
 5 files changed, 20 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/mach-ep93xx/header.c
 create mode 100644 arch/arm/mach-ep93xx/include/mach/barebox.lds.h

diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index 736e5f0..e0bae70 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -41,11 +41,6 @@ SECTIONS
 		*(.text_entry*)
 		__ll_return = .;
 		*(.text_ll_return*)
-#ifdef CONFIG_ARCH_EP93XX
-		/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
-	  . = 0x1000;
-	  LONG(0x53555243) /* 'CRUS' */
-#endif
 		__bare_init_start = .;
 		*(.text_bare_init*)
 		__bare_init_end = .;
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index dac6571..d401164 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -1,3 +1,3 @@
-obj-y += clocksource.o gpio.o led.o
+obj-y += clocksource.o gpio.o led.o header.o
 
 obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += lowlevel_init.o
diff --git a/arch/arm/mach-ep93xx/header.c b/arch/arm/mach-ep93xx/header.c
new file mode 100644
index 0000000..4e6a2e5
--- /dev/null
+++ b/arch/arm/mach-ep93xx/header.c
@@ -0,0 +1,8 @@
+#include <common.h>
+#include <linux/compiler.h>
+#include <asm/barebox-arm-head.h>
+
+void __naked __section(.flash_header_start) go(void)
+{
+        barebox_arm_head();
+}
diff --git a/arch/arm/mach-ep93xx/include/mach/barebox.lds.h b/arch/arm/mach-ep93xx/include/mach/barebox.lds.h
new file mode 100644
index 0000000..74c4662
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/barebox.lds.h
@@ -0,0 +1,9 @@
+
+/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
+
+#define PRE_IMAGE				\
+	.pre_image : {				\
+		KEEP(*(.flash_header_start*))	\
+		. = 0x1000;			\
+		LONG(0x53555243) /* 'CRUS' */	\
+	}
diff --git a/include/asm-generic/barebox.lds.h b/include/asm-generic/barebox.lds.h
index e853ca1..b2bd19e 100644
--- a/include/asm-generic/barebox.lds.h
+++ b/include/asm-generic/barebox.lds.h
@@ -4,7 +4,8 @@
 	defined CONFIG_ARCH_IMX51 || \
 	defined CONFIG_ARCH_IMX53 || \
 	defined CONFIG_ARCH_IMX6 || \
-	defined CONFIG_X86
+	defined CONFIG_X86 || \
+	defined CONFIG_ARCH_EP93XX
 #include <mach/barebox.lds.h>
 #endif
 
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:12:53 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:12:53 +0200
Subject: Compressed barebox image support
Message-ID: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>

The following series allows to create a self extracting barebox image.
This is done by linking barebox twice, once for the actual binary, but
without lowlevel initstuff and once for the lowlevel init stuff, the
decompressor and the compressed image.

Using lzo compression the pcm038 image shrinks from 252k to 155k. The
series has been tested on the pcm038 second stage, first stage NAND and
first stage NOR and also on an i.MX53 LOCO board (also in thumb2 mode)

Using compressed images currently adds to the boot time, at least on
my slower arm9 systems. Using the MMU during decompression would help,
but this currently isn't implemented.

I think the preparation patches should be ready for merging. The last
patch in this series adding compression support I am not that confident
with. Currently I am not very happy with the Makefile changes which
somehow look like bypassing the kbuild mechanism and handcrufting
something that looks like kbuild. If someone has ideas how to improve
this, let me know. Nevertheless I would be happy about Tested-by
(and does-not-work-for) tags.

Sascha

----------------------------------------------------------------
Sascha Hauer (9):
      lzo: Allow for static inlining
      ARM lds: remove unused got
      ARM: remove board linker script option
      ARM: remove exception vectors from boards
      ARM startup: calculate offset instead of runtime address
      ARM ep93xx: Get rid of special handling in linker file
      ARM boards: Use _text rather than TEXT_BASE
      ARM: Separate assembler functions into their own section
      Add compressed image support

 Makefile                                           |   31 ++++++-
 arch/arm/Kconfig                                   |   13 +--
 arch/arm/Makefile                                  |    4 +-
 arch/arm/boards/a9m2410/a9m2410.c                  |    3 +-
 arch/arm/boards/a9m2440/a9m2440.c                  |    3 +-
 arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c  |    7 +-
 arch/arm/boards/eukrea_cpuimx25/lowlevel.c         |    4 +-
 arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c  |    4 +-
 arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S    |   11 +--
 arch/arm/boards/eukrea_cpuimx35/flash_header.c     |    2 -
 arch/arm/boards/eukrea_cpuimx35/lowlevel.c         |    4 +-
 arch/arm/boards/freescale-mx25-3-stack/3stack.c    |    8 +-
 .../boards/freescale-mx25-3-stack/lowlevel_init.S  |   11 +--
 arch/arm/boards/freescale-mx35-3-stack/3stack.c    |    4 +-
 .../boards/freescale-mx35-3-stack/flash_header.c   |    4 +-
 .../boards/freescale-mx35-3-stack/lowlevel_init.S  |   11 +--
 arch/arm/boards/freescale-mx53-loco/flash_header.c |    2 +-
 arch/arm/boards/freescale-mx53-smd/flash_header.c  |    2 +-
 arch/arm/boards/freescale-mx6-arm2/flash_header.c  |    5 +-
 arch/arm/boards/guf-cupid/lowlevel.c               |    4 +-
 arch/arm/boards/guf-neso/lowlevel.c                |    4 +-
 arch/arm/boards/imx21ads/imx21ads.c                |    4 +-
 arch/arm/boards/imx21ads/lowlevel_init.S           |   10 +--
 arch/arm/boards/karo-tx25/board.c                  |    3 +-
 arch/arm/boards/karo-tx25/lowlevel.c               |    4 +-
 arch/arm/boards/karo-tx51/flash_header.c           |    2 +-
 arch/arm/boards/mini2440/mini2440.c                |    3 +-
 arch/arm/boards/pcm037/lowlevel_init.S             |    7 +-
 arch/arm/boards/pcm037/pcm037.c                    |    4 +-
 arch/arm/boards/pcm038/lowlevel.c                  |    4 +-
 arch/arm/boards/pcm043/lowlevel.c                  |    4 +-
 arch/arm/boards/phycard-i.MX27/lowlevel_init.S     |    8 +-
 arch/arm/boards/phycard-i.MX27/pca100.c            |    2 +-
 arch/arm/boards/tqma53/flash_header.c              |    5 +-
 arch/arm/cpu/cache-armv4.S                         |    7 +-
 arch/arm/cpu/cache-armv5.S                         |    7 +-
 arch/arm/cpu/cache-armv6.S                         |   11 ++-
 arch/arm/cpu/cache-armv7.S                         |    8 +-
 arch/arm/cpu/start.c                               |   85 +++++++++++++++++---
 arch/arm/lib/Makefile                              |    4 +-
 arch/arm/lib/ashldi3.S                             |    1 +
 arch/arm/lib/ashrdi3.S                             |    1 +
 arch/arm/lib/barebox-compressed.lds.S              |   71 ++++++++++++++++
 arch/arm/lib/barebox.lds.S                         |   11 +--
 arch/arm/lib/findbit.S                             |    9 +++
 arch/arm/lib/io-writesw-armv4.S                    |    2 +
 arch/arm/lib/lib1funcs.S                           |    7 ++
 arch/arm/lib/lshrdi3.S                             |    1 +
 arch/arm/mach-ep93xx/Makefile                      |    2 +-
 arch/arm/mach-ep93xx/header.c                      |    8 ++
 arch/arm/mach-ep93xx/include/mach/barebox.lds.h    |    9 +++
 common/Kconfig                                     |   12 +++
 include/asm-generic/barebox.lds.h                  |    3 +-
 include/asm-generic/memory_layout.h                |    2 +
 include/lzo.h                                      |    8 +-
 lib/decompress_unlzo.c                             |    9 ++-
 lib/lzo/lzo1x_decompress.c                         |    2 +-
 lib/vsprintf.c                                     |   25 +++++-
 piggy.lzo.S                                        |    6 ++
 59 files changed, 382 insertions(+), 130 deletions(-)
 create mode 100644 arch/arm/lib/barebox-compressed.lds.S
 create mode 100644 arch/arm/mach-ep93xx/header.c
 create mode 100644 arch/arm/mach-ep93xx/include/mach/barebox.lds.h
 create mode 100644 piggy.lzo.S



From s.hauer at pengutronix.de  Thu Jul 19 04:13:00 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:13:00 +0200
Subject: [PATCH 7/9] ARM boards: Use _text rather than TEXT_BASE
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-8-git-send-email-s.hauer@pengutronix.de>

With compressed image support TEXT_BASE will become the base
address of the uncompressed image. What the boards want instead
is the base address of the decompressor code or, if not compressed,
the base address of the uncompressed image. Use _text which is
the correct one for both cases.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/a9m2410/a9m2410.c                      |    3 ++-
 arch/arm/boards/a9m2440/a9m2440.c                      |    3 ++-
 arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c      |    3 ++-
 arch/arm/boards/eukrea_cpuimx25/lowlevel.c             |    4 ++--
 arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c      |    4 +++-
 arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S        |   11 ++++-------
 arch/arm/boards/eukrea_cpuimx35/lowlevel.c             |    4 ++--
 arch/arm/boards/freescale-mx25-3-stack/3stack.c        |    4 +++-
 arch/arm/boards/freescale-mx25-3-stack/lowlevel_init.S |   11 ++++-------
 arch/arm/boards/freescale-mx35-3-stack/3stack.c        |    4 +++-
 arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S |   11 ++++-------
 arch/arm/boards/freescale-mx53-loco/flash_header.c     |    2 +-
 arch/arm/boards/freescale-mx53-smd/flash_header.c      |    2 +-
 arch/arm/boards/freescale-mx6-arm2/flash_header.c      |    2 +-
 arch/arm/boards/guf-cupid/lowlevel.c                   |    4 ++--
 arch/arm/boards/guf-neso/lowlevel.c                    |    4 ++--
 arch/arm/boards/imx21ads/imx21ads.c                    |    4 +++-
 arch/arm/boards/imx21ads/lowlevel_init.S               |   10 ++++------
 arch/arm/boards/karo-tx25/board.c                      |    3 ++-
 arch/arm/boards/karo-tx25/lowlevel.c                   |    4 ++--
 arch/arm/boards/karo-tx51/flash_header.c               |    2 +-
 arch/arm/boards/mini2440/mini2440.c                    |    3 ++-
 arch/arm/boards/pcm037/lowlevel_init.S                 |    7 ++-----
 arch/arm/boards/pcm037/pcm037.c                        |    4 +++-
 arch/arm/boards/pcm038/lowlevel.c                      |    4 ++--
 arch/arm/boards/pcm043/lowlevel.c                      |    4 ++--
 arch/arm/boards/phycard-i.MX27/lowlevel_init.S         |    8 ++------
 arch/arm/boards/phycard-i.MX27/pca100.c                |    2 +-
 arch/arm/boards/tqma53/flash_header.c                  |    2 +-
 29 files changed, 65 insertions(+), 68 deletions(-)

diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c
index eaafdbd..3e4572f 100644
--- a/arch/arm/boards/a9m2410/a9m2410.c
+++ b/arch/arm/boards/a9m2410/a9m2410.c
@@ -29,6 +29,7 @@
 #include <init.h>
 #include <asm/armlinux.h>
 #include <generated/mach-types.h>
+#include <asm-generic/sections.h>
 #include <partition.h>
 #include <nand.h>
 #include <io.h>
@@ -139,7 +140,7 @@ device_initcall(a9m2410_devices_init);
 #ifdef CONFIG_S3C_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
+	s3c24x0_nand_load_image(_text, 256 * 1024, 0);
 }
 #endif
 
diff --git a/arch/arm/boards/a9m2440/a9m2440.c b/arch/arm/boards/a9m2440/a9m2440.c
index 1d20248..6d71aef 100644
--- a/arch/arm/boards/a9m2440/a9m2440.c
+++ b/arch/arm/boards/a9m2440/a9m2440.c
@@ -28,6 +28,7 @@
 #include <driver.h>
 #include <init.h>
 #include <asm/armlinux.h>
+#include <asm-generic/sections.h>
 #include <generated/mach-types.h>
 #include <partition.h>
 #include <nand.h>
@@ -158,7 +159,7 @@ device_initcall(a9m2440_devices_init);
 #ifdef CONFIG_S3C_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
+	s3c24x0_nand_load_image(_text, 256 * 1024, 0);
 }
 #endif
 
diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
index b3b0838..0aac13c 100644
--- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
+++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
@@ -28,6 +28,7 @@
 #include <environment.h>
 #include <mach/imx-regs.h>
 #include <asm/armlinux.h>
+#include <asm/barebox-arm.h>
 #include <asm-generic/sections.h>
 #include <mach/gpio.h>
 #include <io.h>
@@ -284,7 +285,7 @@ console_initcall(eukrea_cpuimx25_console_init);
 #ifdef CONFIG_NAND_IMX_BOOT
 void __bare_init nand_boot(void)
 {
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 }
 #endif
 
diff --git a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
index ff66e92..89066e9 100644
--- a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
@@ -42,7 +42,7 @@ static void __bare_init __naked insdram(void)
 	r = STACK_BASE + STACK_SIZE - 12;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 
 	board_init_lowlevel_return();
 }
@@ -154,7 +154,7 @@ void __bare_init __naked board_init_lowlevel(void)
 		board_init_lowlevel_return();
 
 	src = (unsigned int *)IMX_NFC_BASE;
-	trg = (unsigned int *)TEXT_BASE;
+	trg = (unsigned int *)_text;
 
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
diff --git a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
index 63e87c9..193c277 100644
--- a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
+++ b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
@@ -31,6 +31,7 @@
 #include <mach/gpio.h>
 #include <asm/armlinux.h>
 #include <asm-generic/sections.h>
+#include <asm/barebox-arm.h>
 #include <generated/mach-types.h>
 #include <partition.h>
 #include <fs.h>
@@ -264,7 +265,8 @@ late_initcall(eukrea_cpuimx27_late_init);
 #ifdef CONFIG_NAND_IMX_BOOT
 void __bare_init nand_boot(void)
 {
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
+	board_init_lowlevel_return();
 }
 #endif
 
diff --git a/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S b/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S
index e318546..0dae3ec 100644
--- a/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S
+++ b/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S
@@ -1,4 +1,5 @@
 #include <config.h>
+#include <asm-generic/memory_layout.h>
 #include <mach/imx-regs.h>
 
 #define writel(val, reg) \
@@ -107,7 +108,7 @@ board_init_lowlevel:
 	sdram_init
 
 #ifdef CONFIG_NAND_IMX_BOOT
-	ldr	sp, =0xa0f00000		/* Setup a temporary stack in SDRAM */
+	ldr	sp, =STACK_BASE + STACK_SIZE - 12	/* Setup a temporary stack in SDRAM */
 
 	ldr	r0, =IMX_NFC_BASE		/* start of NFC SRAM                */
 	ldr	r2, =IMX_NFC_BASE + 0x1000	/* end of NFC SRAM                  */
@@ -119,7 +120,7 @@ board_init_lowlevel:
 	bhi	ret
 
 	/* Move ourselves out of NFC SRAM */
-	ldr	r1, =TEXT_BASE
+	ldr	r1, =_text
 
 copy_loop:
 	ldmia	r0!, {r3-r9}		/* copy from source address [r0]    */
@@ -129,12 +130,8 @@ copy_loop:
 
 	ldr	pc, =1f			/* Jump to SDRAM                    */
 1:
-	bl	nand_boot		/* Load barebox from NAND Flash      */
-
-	ldr	r1, =IMX_NFC_BASE - TEXT_BASE
-	sub	r10, r10, r1		/* adjust return address from NFC SRAM */
+	b	nand_boot		/* Load barebox from NAND Flash      */
 					/* to SDRAM                            */
-
 #endif /* CONFIG_NAND_IMX_BOOT */
 
 ret:
diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
index 552b0cf..57867dc 100644
--- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
@@ -53,7 +53,7 @@ static void __bare_init __naked insdram(void)
 	r = STACK_BASE + STACK_SIZE - 12;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 
 	board_init_lowlevel_return();
 }
@@ -163,7 +163,7 @@ void __bare_init __naked board_init_lowlevel(void)
 		board_init_lowlevel_return();
 
 	src = (unsigned int *)IMX_NFC_BASE;
-	trg = (unsigned int *)TEXT_BASE;
+	trg = (unsigned int *)_text;
 
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
diff --git a/arch/arm/boards/freescale-mx25-3-stack/3stack.c b/arch/arm/boards/freescale-mx25-3-stack/3stack.c
index 6b6146d..97c1fd9 100644
--- a/arch/arm/boards/freescale-mx25-3-stack/3stack.c
+++ b/arch/arm/boards/freescale-mx25-3-stack/3stack.c
@@ -28,6 +28,7 @@
 #include <mach/imx-regs.h>
 #include <asm/armlinux.h>
 #include <asm-generic/sections.h>
+#include <asm/barebox-arm.h>
 #include <mach/gpio.h>
 #include <io.h>
 #include <partition.h>
@@ -294,7 +295,8 @@ console_initcall(imx25_console_init);
 #ifdef CONFIG_NAND_IMX_BOOT
 void __bare_init nand_boot(void)
 {
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
+	board_init_lowlevel_return();
 }
 #endif
 
diff --git a/arch/arm/boards/freescale-mx25-3-stack/lowlevel_init.S b/arch/arm/boards/freescale-mx25-3-stack/lowlevel_init.S
index 7b75233..fa0f957 100644
--- a/arch/arm/boards/freescale-mx25-3-stack/lowlevel_init.S
+++ b/arch/arm/boards/freescale-mx25-3-stack/lowlevel_init.S
@@ -21,6 +21,7 @@
  * MA 02111-1307 USA
  */
 
+#include <asm-generic/memory_layout.h>
 #include <mach/imx-regs.h>
 #include <mach/imx-pll.h>
 #include <mach/esdctl.h>
@@ -100,7 +101,7 @@ board_init_lowlevel:
 	str r3, [r0, #0x30]
 
 #ifdef CONFIG_NAND_IMX_BOOT
-	ldr	sp, =0xa0f00000		/* Setup a temporary stack in SDRAM */
+	ldr	sp, =STACK_BASE + STACK_SIZE - 12 /* Setup a temporary stack in SDRAM */
 
 	ldr	r0, =IMX_NFC_BASE		/* start of NFC SRAM                */
 	ldr	r2, =IMX_NFC_BASE + 0x1000	/* end of NFC SRAM                  */
@@ -112,7 +113,7 @@ board_init_lowlevel:
 	bhi	ret
 
 	/* Move ourselves out of NFC SRAM */
-	ldr	r1, =TEXT_BASE
+	ldr	r1, =_text
 
 copy_loop:
 	ldmia	r0!, {r3-r9}		/* copy from source address [r0]    */
@@ -122,11 +123,7 @@ copy_loop:
 
 	ldr	pc, =1f			/* Jump to SDRAM                    */
 1:
-	bl	nand_boot		/* Load barebox from NAND Flash      */
-
-	ldr	r1, =IMX_NFC_BASE - TEXT_BASE
-	sub	r10, r10, r1		/* adjust return address from NFC SRAM */
-					/* to SDRAM                            */
+	b	nand_boot		/* Load barebox from NAND Flash      */
 
 #endif /* CONFIG_NAND_IMX_BOOT */
 
diff --git a/arch/arm/boards/freescale-mx35-3-stack/3stack.c b/arch/arm/boards/freescale-mx35-3-stack/3stack.c
index cb1280d..9b255a5 100644
--- a/arch/arm/boards/freescale-mx35-3-stack/3stack.c
+++ b/arch/arm/boards/freescale-mx35-3-stack/3stack.c
@@ -38,6 +38,7 @@
 
 #include <asm/armlinux.h>
 #include <asm-generic/sections.h>
+#include <asm/barebox-arm.h>
 #include <io.h>
 #include <generated/mach-types.h>
 
@@ -450,6 +451,7 @@ void __bare_init nand_boot(void)
 	 * The driver is able to detect NAND's pagesize by CPU internal
 	 * fuses or external pull ups. But not the blocksize...
 	 */
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
+	board_init_lowlevel_return();
 }
 #endif
diff --git a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S
index 30dbcc0..837d2ff 100644
--- a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S
+++ b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S
@@ -25,6 +25,7 @@
 #include <mach/imx-pll.h>
 #include <mach/esdctl.h>
 #include <asm/cache-l2x0.h>
+#include <asm-generic/memory_layout.h>
 #include "board-mx35_3stack.h"
 
 #define CSD0_BASE_ADDR		0x80000000
@@ -156,7 +157,7 @@ board_init_lowlevel:
 	str	r3, [r0, #0x30]
 
 #ifdef CONFIG_NAND_IMX_BOOT
-	ldr	sp, =TEXT_BASE - 4		/* Setup a temporary stack in SDRAM */
+	ldr	sp, =STACK_BASE + STACK_SIZE - 12		/* Setup a temporary stack in SDRAM */
 
 	ldr	r0, =IMX_NFC_BASE		/* start of NFC SRAM */
 	ldr	r2, =IMX_NFC_BASE + 0x800	/* end of NFC SRAM */
@@ -168,7 +169,7 @@ board_init_lowlevel:
 	bhs	ret
 
 	/* Move ourselves out of NFC SRAM */
-	ldr r1, =TEXT_BASE
+	ldr r1, =_text
 
 copy_loop:
 	ldmia	r0!, {r3-r9}			/* copy from source address [r0] */
@@ -178,11 +179,7 @@ copy_loop:
 
 	ldr	pc, =1f				/* Jump to SDRAM */
 1:
-	bl	nand_boot			/* Load barebox from NAND Flash */
-
-	/* rebase the return address */
-	ldr	r1, =IMX_NFC_BASE - TEXT_BASE
-	sub	r10, r10, r1			/* adjust return address from NFC SRAM */
+	b	nand_boot			/* Load barebox from NAND Flash */
 ret:
 #endif /* CONFIG_NAND_IMX_BOOT */
 
diff --git a/arch/arm/boards/freescale-mx53-loco/flash_header.c b/arch/arm/boards/freescale-mx53-loco/flash_header.c
index 52e6eee..c2ab255 100644
--- a/arch/arm/boards/freescale-mx53-loco/flash_header.c
+++ b/arch/arm/boards/freescale-mx53-loco/flash_header.c
@@ -77,7 +77,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
 	{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00000000), },
 };
 
-#define APP_DEST	CONFIG_TEXT_BASE
+#define APP_DEST	0x70000000
 
 struct imx_flash_header_v2 __flash_header_section flash_header = {
 	.header.tag		= IVT_HEADER_TAG,
diff --git a/arch/arm/boards/freescale-mx53-smd/flash_header.c b/arch/arm/boards/freescale-mx53-smd/flash_header.c
index 52e6eee..c2ab255 100644
--- a/arch/arm/boards/freescale-mx53-smd/flash_header.c
+++ b/arch/arm/boards/freescale-mx53-smd/flash_header.c
@@ -77,7 +77,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
 	{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00000000), },
 };
 
-#define APP_DEST	CONFIG_TEXT_BASE
+#define APP_DEST	0x70000000
 
 struct imx_flash_header_v2 __flash_header_section flash_header = {
 	.header.tag		= IVT_HEADER_TAG,
diff --git a/arch/arm/boards/freescale-mx6-arm2/flash_header.c b/arch/arm/boards/freescale-mx6-arm2/flash_header.c
index 69d9cfa..60cf9cd 100644
--- a/arch/arm/boards/freescale-mx6-arm2/flash_header.c
+++ b/arch/arm/boards/freescale-mx6-arm2/flash_header.c
@@ -146,7 +146,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
 	DCD(MX6_IOMUXC_BASE_ADDR + 0x01c, 0x007f007f),
 };
 
-#define APP_DEST	CONFIG_TEXT_BASE
+#define APP_DEST	0x10000000
 
 struct imx_flash_header_v2 __flash_header_section flash_header = {
 	.header.tag		= IVT_HEADER_TAG,
diff --git a/arch/arm/boards/guf-cupid/lowlevel.c b/arch/arm/boards/guf-cupid/lowlevel.c
index bcaa199..8fa9152 100644
--- a/arch/arm/boards/guf-cupid/lowlevel.c
+++ b/arch/arm/boards/guf-cupid/lowlevel.c
@@ -60,7 +60,7 @@ static void __bare_init __naked insdram(void)
 	r = STACK_BASE + STACK_SIZE - 12;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 
 	board_init_lowlevel_return();
 }
@@ -334,7 +334,7 @@ void __bare_init __naked board_init_lowlevel(void)
 		board_init_lowlevel_return();
 
 	src = (unsigned int *)IMX_NFC_BASE;
-	trg = (unsigned int *)TEXT_BASE;
+	trg = (unsigned int *)_text;
 
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
diff --git a/arch/arm/boards/guf-neso/lowlevel.c b/arch/arm/boards/guf-neso/lowlevel.c
index a8718e7..9b206be 100644
--- a/arch/arm/boards/guf-neso/lowlevel.c
+++ b/arch/arm/boards/guf-neso/lowlevel.c
@@ -44,7 +44,7 @@ static void __bare_init __naked insdram(void)
 	r = STACK_BASE + STACK_SIZE - 12;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 
 	board_init_lowlevel_return();
 }
@@ -105,7 +105,7 @@ void __bare_init __naked board_init_lowlevel(void)
 		board_init_lowlevel_return();
 
 	src = (unsigned int *)IMX_NFC_BASE;
-	trg = (unsigned int *)TEXT_BASE;
+	trg = (unsigned int *)_text;
 
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
diff --git a/arch/arm/boards/imx21ads/imx21ads.c b/arch/arm/boards/imx21ads/imx21ads.c
index e394417..2bbd5ed 100644
--- a/arch/arm/boards/imx21ads/imx21ads.c
+++ b/arch/arm/boards/imx21ads/imx21ads.c
@@ -28,6 +28,7 @@
 #include <mach/imx-regs.h>
 #include <asm/armlinux.h>
 #include <asm-generic/sections.h>
+#include <asm/barebox-arm.h>
 #include <io.h>
 #include <mach/gpio.h>
 #include <partition.h>
@@ -204,7 +205,8 @@ console_initcall(mx21ads_console_init);
 void __bare_init nand_boot(void)
 {
 	PCCR0 |= PCCR0_NFC_EN;
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
+	board_init_lowlevel_return();
 }
 #endif
 
diff --git a/arch/arm/boards/imx21ads/lowlevel_init.S b/arch/arm/boards/imx21ads/lowlevel_init.S
index 7926e28..1aeea57 100644
--- a/arch/arm/boards/imx21ads/lowlevel_init.S
+++ b/arch/arm/boards/imx21ads/lowlevel_init.S
@@ -18,6 +18,7 @@
  */
 
 #include <config.h>
+#include <asm-generic/memory_layout.h>
 #include <mach/imx-regs.h>
 
 	.section ".text_bare_init","ax"
@@ -121,7 +122,7 @@ board_init_lowlevel:
 	str	r1, [r0]
 
 #ifdef CONFIG_NAND_IMX_BOOT
-	ldr	sp, =TEXT_BASE - 4	/* Setup a temporary stack in SDRAM */
+	ldr	sp, =STACK_BASE + STACK_SIZE - 12	/* Setup a temporary stack in SDRAM */
 
 	ldr	r0, =IMX_NFC_BASE		/* start of NFC SRAM        */
 	ldr	r2, =IMX_NFC_BASE + 0x800	/* end of NFC SRAM          */
@@ -133,7 +134,7 @@ board_init_lowlevel:
 	bhi	ret
 
 	/* Move ourselves out of NFC SRAM */
-	ldr	r1, =TEXT_BASE
+	ldr	r1, =_text
 
 copy_loop:
 	ldmia	r0!, {r3-r9}		/* copy from source address [r0]    */
@@ -143,10 +144,7 @@ copy_loop:
 
 	ldr	pc, =1f			/* Jump to SDRAM                    */
 1:
-	bl	nand_boot		/* Load barebox from NAND Flash     */
-
-	ldr	r1, =IMX_NFC_BASE - TEXT_BASE
-	sub	r10, r10, r1		/* adjust return address from NFC   */
+	b	nand_boot		/* Load barebox from NAND Flash     */
 					/* SRAM to SDRAM                    */
 #endif /* CONFIG_NAND_IMX_BOOT */
 
diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c
index 040c75b..c089935 100644
--- a/arch/arm/boards/karo-tx25/board.c
+++ b/arch/arm/boards/karo-tx25/board.c
@@ -28,6 +28,7 @@
 #include <mach/imx-regs.h>
 #include <asm/armlinux.h>
 #include <asm-generic/sections.h>
+#include <asm/barebox-arm.h>
 #include <mach/gpio.h>
 #include <io.h>
 #include <partition.h>
@@ -168,7 +169,7 @@ console_initcall(tx25_console_init);
 #ifdef CONFIG_NAND_IMX_BOOT
 void __bare_init nand_boot(void)
 {
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 }
 #endif
 
diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c
index 35dfe9f..9f1c5d6 100644
--- a/arch/arm/boards/karo-tx25/lowlevel.c
+++ b/arch/arm/boards/karo-tx25/lowlevel.c
@@ -40,7 +40,7 @@ static void __bare_init __naked insdram(void)
 	r = STACK_BASE + STACK_SIZE - 12;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 
 	board_init_lowlevel_return();
 }
@@ -158,7 +158,7 @@ void __bare_init __naked board_init_lowlevel(void)
 		board_init_lowlevel_return();
 
 	src = (unsigned int *)IMX_NFC_BASE;
-	trg = (unsigned int *)TEXT_BASE;
+	trg = (unsigned int *)_text;
 
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
diff --git a/arch/arm/boards/karo-tx51/flash_header.c b/arch/arm/boards/karo-tx51/flash_header.c
index 7d2f97e..f570348 100644
--- a/arch/arm/boards/karo-tx51/flash_header.c
+++ b/arch/arm/boards/karo-tx51/flash_header.c
@@ -39,7 +39,7 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
     { .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00000000, },
 };
 
-#define APP_DEST	CONFIG_ARCH_TEXT_BASE
+#define APP_DEST	0x90000000
 
 struct imx_flash_header __flash_header_section flash_header = {
 	.app_code_jump_vector	= APP_DEST + 0x1000,
diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 3d3b820..6408bc8 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -36,6 +36,7 @@
 #include <mci.h>
 #include <fb.h>
 #include <asm/armlinux.h>
+#include <asm-generic/sections.h>
 #include <io.h>
 #include <mach/gpio.h>
 #include <mach/s3c-iomap.h>
@@ -329,7 +330,7 @@ device_initcall(mini2440_devices_init);
 #ifdef CONFIG_S3C_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
+	s3c24x0_nand_load_image(_text, 256 * 1024, 0);
 }
 #endif
 
diff --git a/arch/arm/boards/pcm037/lowlevel_init.S b/arch/arm/boards/pcm037/lowlevel_init.S
index cc4674d..1f8d38f 100644
--- a/arch/arm/boards/pcm037/lowlevel_init.S
+++ b/arch/arm/boards/pcm037/lowlevel_init.S
@@ -146,7 +146,7 @@ clear_iomux:
 	bhs	ret
 
 	/* Move ourselves out of NFC SRAM */
-	ldr	r1, =TEXT_BASE
+	ldr	r1, =_text
 
 copy_loop:
 	ldmia	r0!, {r3-r9}		/* copy from source address [r0]    */
@@ -156,10 +156,7 @@ copy_loop:
 
 	ldr	pc, =1f			/* Jump to SDRAM                    */
 1:
-	bl	nand_boot		/* Load barebox from NAND Flash      */
-
-	ldr	r1, =IMX_NFC_BASE - TEXT_BASE
-	sub	r10, r10, r1		/* adjust return address from NFC SRAM */
+	b	nand_boot		/* Load barebox from NAND Flash      */
 ret:
 #endif /* CONFIG_NAND_IMX_BOOT */
 
diff --git a/arch/arm/boards/pcm037/pcm037.c b/arch/arm/boards/pcm037/pcm037.c
index d789b28..9cb082b 100644
--- a/arch/arm/boards/pcm037/pcm037.c
+++ b/arch/arm/boards/pcm037/pcm037.c
@@ -37,6 +37,7 @@
 #include <asm/mmu.h>
 #include <partition.h>
 #include <generated/mach-types.h>
+#include <asm/barebox-arm.h>
 #include <mach/imx-nand.h>
 #include <mach/devices-imx31.h>
 
@@ -246,6 +247,7 @@ console_initcall(imx31_console_init);
 #ifdef CONFIG_NAND_IMX_BOOT
 void __bare_init nand_boot(void)
 {
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
+	board_init_lowlevel_return();
 }
 #endif
diff --git a/arch/arm/boards/pcm038/lowlevel.c b/arch/arm/boards/pcm038/lowlevel.c
index 2bc89a0..3f29a83 100644
--- a/arch/arm/boards/pcm038/lowlevel.c
+++ b/arch/arm/boards/pcm038/lowlevel.c
@@ -45,7 +45,7 @@ static void __bare_init __naked insdram(void)
 	r = STACK_BASE + STACK_SIZE - 12;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 
 	board_init_lowlevel_return();
 }
@@ -111,7 +111,7 @@ void __bare_init __naked board_init_lowlevel(void)
 		board_init_lowlevel_return();
 
 	src = (unsigned int *)IMX_NFC_BASE;
-	trg = (unsigned int *)TEXT_BASE;
+	trg = (unsigned int *)_text;
 
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
diff --git a/arch/arm/boards/pcm043/lowlevel.c b/arch/arm/boards/pcm043/lowlevel.c
index 69cc4f1..fd6787f 100644
--- a/arch/arm/boards/pcm043/lowlevel.c
+++ b/arch/arm/boards/pcm043/lowlevel.c
@@ -58,7 +58,7 @@ static void __bare_init __naked insdram(void)
 	r = STACK_BASE + STACK_SIZE - 12;
 	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 
 	board_init_lowlevel_return();
 }
@@ -213,7 +213,7 @@ void __bare_init __naked board_init_lowlevel(void)
 		board_init_lowlevel_return();
 
 	src = (unsigned int *)IMX_NFC_BASE;
-	trg = (unsigned int *)TEXT_BASE;
+	trg = (unsigned int *)_text;
 
 	/* Move ourselves out of NFC SRAM */
 	for (i = 0; i < 0x800 / sizeof(int); i++)
diff --git a/arch/arm/boards/phycard-i.MX27/lowlevel_init.S b/arch/arm/boards/phycard-i.MX27/lowlevel_init.S
index 3ef2c54..c24edd4 100644
--- a/arch/arm/boards/phycard-i.MX27/lowlevel_init.S
+++ b/arch/arm/boards/phycard-i.MX27/lowlevel_init.S
@@ -106,7 +106,7 @@ board_init_lowlevel:
 	bhi	ret
 
 	/* Move ourselves out of NFC SRAM */
-	ldr	r1, =TEXT_BASE
+	ldr	r1, =_text
 
 copy_loop:
 	ldmia	r0!, {r3-r9}		/* copy from source address [r0]    */
@@ -116,11 +116,7 @@ copy_loop:
 
 	ldr	pc, =1f			/* Jump to SDRAM                    */
 1:
-	bl	nand_boot		/* Load barebox from NAND Flash      */
-
-	ldr	r1, =IMX_NFC_BASE - TEXT_BASE
-	sub	r10, r10, r1		/* adjust return address from NFC SRAM */
-					/* to SDRAM                            */
+	b	nand_boot		/* Load barebox from NAND Flash      */
 
 #endif /* CONFIG_NAND_IMX_BOOT */
 
diff --git a/arch/arm/boards/phycard-i.MX27/pca100.c b/arch/arm/boards/phycard-i.MX27/pca100.c
index 6fdcf6e..126f9ef 100644
--- a/arch/arm/boards/phycard-i.MX27/pca100.c
+++ b/arch/arm/boards/phycard-i.MX27/pca100.c
@@ -328,7 +328,7 @@ console_initcall(pca100_console_init);
 #ifdef CONFIG_NAND_IMX_BOOT
 void __bare_init nand_boot(void)
 {
-	imx_nand_load_image((void *)TEXT_BASE, barebox_image_size);
+	imx_nand_load_image(_text, barebox_image_size);
 }
 #endif
 
diff --git a/arch/arm/boards/tqma53/flash_header.c b/arch/arm/boards/tqma53/flash_header.c
index d912b38..a6bcdad 100644
--- a/arch/arm/boards/tqma53/flash_header.c
+++ b/arch/arm/boards/tqma53/flash_header.c
@@ -85,7 +85,7 @@ struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
 	{ .addr = cpu_to_be32(0x63fd901C), .val = cpu_to_be32(0x00000000), },
 };
 
-#define APP_DEST	CONFIG_TEXT_BASE
+#define APP_DEST	0x70000000
 
 struct imx_flash_header_v2 __flash_header_section flash_header = {
 	.header.tag		= IVT_HEADER_TAG,
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:13:02 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:13:02 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>

This allows for creating a lzo compressed binary. This is done by
linking barebox twice using two linker scripts. One is the regular
uncompressed binary but without the lowlevel init stuff. The
other contains the lowlevel init stuff, the decompressor and the
compressed binary.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 Makefile                              |   31 +++++++++++++-
 arch/arm/Kconfig                      |    1 +
 arch/arm/Makefile                     |    1 +
 arch/arm/cpu/start.c                  |   73 +++++++++++++++++++++++++++++++--
 arch/arm/lib/Makefile                 |    1 +
 arch/arm/lib/barebox-compressed.lds.S |   71 ++++++++++++++++++++++++++++++++
 arch/arm/lib/barebox.lds.S            |    3 +-
 common/Kconfig                        |   12 ++++++
 include/asm-generic/memory_layout.h   |    2 +
 lib/vsprintf.c                        |   25 ++++++++++-
 piggy.lzo.S                           |    6 +++
 11 files changed, 220 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/lib/barebox-compressed.lds.S
 create mode 100644 piggy.lzo.S

diff --git a/Makefile b/Makefile
index ebcf9bf..3ade6cc 100644
--- a/Makefile
+++ b/Makefile
@@ -512,6 +512,7 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 barebox-common := $(common-y)
 barebox-all    := $(barebox-common)
 barebox-lds    := $(lds-y)
+barebox-compressed-lds    := $(lds-compressed-y)
 
 # Rule to link barebox
 # May be overridden by arch/$(ARCH)/Makefile
@@ -667,6 +668,7 @@ quiet_cmd_objcopy = OBJCOPY $@
       cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
 
 OBJCOPYFLAGS_barebox.bin = -O binary
+OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
 
 barebox.bin: barebox FORCE
 	$(call if_changed,objcopy)
@@ -700,13 +702,39 @@ quiet_cmd_disasm = DISASM  $@
 
 barebox.S: barebox FORCE
 	$(call if_changed,disasm)
+barebox-uncompressed.S: barebox-uncompressed FORCE
+	$(call if_changed,disasm)
 endif
 
 # barebox image
+barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
+	$(call barebox-modpost)
+	$(call if_changed_rule,barebox__)
+	$(Q)rm -f .old_version
+
+barebox-uncompressed.bin: barebox-uncompressed
+	$(call if_changed,objcopy)
+
+barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
+	@echo "  LZO    " $@
+	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
+
+piggy.lzo.o: barebox-uncompressed.bin.lzo piggy.lzo.S
+	@echo "  CC     " $@
+	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c piggy.lzo.S -o $@
+
+ifdef CONFIG_IMAGE_COMPRESSION_LZO
+barebox: piggy.lzo.o
+	@echo "  LD     " $@
+	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
+		-T $(barebox-compressed-lds) $(barebox-compressed) \
+		--start-group $(barebox-common) piggy.lzo.o --end-group
+else
 barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
 	$(call if_changed_rule,barebox__)
 	$(Q)rm -f .old_version
+endif
 
 barebox.srec: barebox
 	$(OBJCOPY) -O srec $< $@
@@ -1004,7 +1032,8 @@ CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
                 .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
 		.tmp_kallsyms* barebox_default_env* barebox.ldr \
 		scripts/bareboxenv-target \
-		Doxyfile.version barebox.srec barebox.s5p
+		Doxyfile.version barebox.srec barebox.s5p \
+		barebox-uncompressed barebox-uncompressed.bin barebox-uncompressed.bin.lzo
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include2 usr/include
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d988455..2396bae 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -4,6 +4,7 @@ config ARM
 	select HAS_MODULES
 	select HAVE_CONFIGURABLE_MEMORY_LAYOUT
 	select HAVE_CONFIGURABLE_TEXT_BASE
+	select HAVE_IMAGE_COMPRESSION
 	default y
 
 config ARM_AMBA
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index cbbc0a0..a93c4d5 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -208,5 +208,6 @@ common-y += $(BOARD) $(MACH)
 common-y += arch/arm/lib/ arch/arm/cpu/
 
 lds-y	:= arch/arm/lib/barebox.lds
+lds-compressed-y := arch/arm/lib/barebox-compressed.lds
 
 CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index cabe4d2..f4aeefe 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,16 +28,36 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+void __naked __section(.text_head_entry) compressed_start(void)
+{
+	barebox_arm_head();
+}
+
+void __naked __section(.text_entry) start(void)
+{
+	u32 r;
+
+	/* Setup the stack */
+	r = STACK_BASE + STACK_SIZE - 16;
+	__asm__ __volatile__("mov sp, %0" : : "r"(r));
+	/* clear bss */
+	memset(__bss_start, 0, __bss_stop - __bss_start);
+
+	start_barebox();
+}
+#else
 void __naked __section(.text_entry) start(void)
 {
 	barebox_arm_head();
 }
+#endif
 
 void __naked __section(.text_exceptions) exception_vectors(void)
 {
 	__asm__ __volatile__ (
 		".arm\n"
-		"b reset\n"				/* reset */
+		"1: b 1b\n"					/* reset */
 #ifdef CONFIG_ARM_EXCEPTIONS
 		"ldr pc, =undefined_instruction\n"	/* undefined instruction */
 		"ldr pc, =software_interrupt\n"		/* software interrupt (SWI) */
@@ -98,6 +118,34 @@ void __naked __bare_init reset(void)
 	board_init_lowlevel_return();
 }
 
+extern void *input_data;
+extern void *input_data_end;
+
+#define STATIC static
+#include "../../../lib/decompress_unlzo.c"
+
+void barebox_uncompress(void *compressed_start, unsigned int len)
+{
+	void (*barebox)(void);
+
+#ifdef CONFIG_THUMB2_BAREBOX
+	barebox = (void *)(TEXT_BASE + 1);
+#else
+	barebox = (void *)TEXT_BASE;
+#endif
+
+	decompress_unlzo((void *)compressed_start,
+			len,
+			NULL, NULL,
+			(void *)TEXT_BASE, NULL, NULL);
+
+	/* flush I-cache before jumping to the uncompressed binary */
+	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+
+	barebox();
+}
+
+
 /*
  * Board code can jump here by either returning from board_init_lowlevel
  * or by calling this function directly.
@@ -105,7 +153,10 @@ void __naked __bare_init reset(void)
 void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 {
 	uint32_t r, addr, offset;
-
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+	uint32_t compressed_start, compressed_end, len;
+	void (*uncompress)(void *compressed_start, unsigned int len);
+#endif
 	/*
 	 * Get runtime address of this function. Do not
 	 * put any code above this.
@@ -130,8 +181,24 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+	compressed_start = (uint32_t)&input_data - offset;
+	compressed_end = (uint32_t)&input_data_end - offset;
+	len = compressed_end - compressed_start;
+
+	uncompress = barebox_uncompress;
+
+	/* call start_barebox with its absolute address */
+	__asm__ __volatile__(
+			"mov r0, %1\n"
+			"mov r1, %2\n"
+			"mov pc, %0\n"
+			:
+			: "r"(uncompress), "r"(compressed_start), "r"(len)
+			: "r0", "r1");
+#else
 	/* call start_barebox with its absolute address */
 	r = (unsigned int)&start_barebox;
 	__asm__ __volatile__("mov pc, %0" : : "r"(r));
+#endif
 }
-
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 1eaf474..044d3e6 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
 obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
 extra-y += barebox.lds
+extra-$(CONFIG_IMAGE_COMPRESSION_LZO) += barebox-compressed.lds
diff --git a/arch/arm/lib/barebox-compressed.lds.S b/arch/arm/lib/barebox-compressed.lds.S
new file mode 100644
index 0000000..f267da9
--- /dev/null
+++ b/arch/arm/lib/barebox-compressed.lds.S
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <asm-generic/barebox.lds.h>
+#include <asm-generic/memory_layout.h>
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(compressed_start)
+SECTIONS
+{
+	. = HEAD_TEXT_BASE;
+
+	PRE_IMAGE
+
+	. = ALIGN(4);
+	.text      :
+	{
+		_stext = .;
+		_text = .;
+		*(.text_head_entry*)
+		__ll_return = .;
+		*(.text_ll_return*)
+		__bare_init_start = .;
+		*(.text_bare_init*)
+		__bare_init_end = .;
+		*(.text*)
+	}
+	BAREBOX_BARE_INIT_SIZE
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata*) }
+
+	_etext = .;			/* End of text and rodata section */
+
+	. = ALIGN(4);
+	.piggydata : {
+		*(.piggydata)
+	}
+
+	. = ALIGN(4);
+	.data : { *(.data*) }
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss*) }
+	__bss_stop = .;
+	_end = .;
+	_barebox_image_size = __bss_start - HEAD_TEXT_BASE;
+}
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index e0bae70..b415830 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -31,8 +31,9 @@ SECTIONS
 {
 	. = TEXT_BASE;
 
+#ifndef CONFIG_IMAGE_COMPRESSION_LZO
 	PRE_IMAGE
-
+#endif
 	. = ALIGN(4);
 	.text      :
 	{
diff --git a/common/Kconfig b/common/Kconfig
index b776031..0e81b57 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -93,6 +93,13 @@ config ENVIRONMENT_VARIABLES
 
 menu "memory layout                 "
 
+config HAVE_IMAGE_COMPRESSION
+	bool
+
+config IMAGE_COMPRESSION_LZO
+	depends on HAVE_IMAGE_COMPRESSION
+	bool "lzo compressed image"
+
 config MMU
 	bool "Enable MMU"
 	help
@@ -173,6 +180,11 @@ config MALLOC_SIZE
 	hex
 	default 0x400000
 	prompt "malloc area size"
+
+config HEAD_TEXT_BASE
+	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION_LZO
+	hex
+	prompt "HEAD_TEXT_BASE"
 endmenu
 
 config BROKEN
diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h
index 941cd42..a5efaf0 100644
--- a/include/asm-generic/memory_layout.h
+++ b/include/asm-generic/memory_layout.h
@@ -5,11 +5,13 @@
 
 #define MALLOC_BASE (TEXT_BASE - CONFIG_MALLOC_SIZE)
 #define STACK_BASE (TEXT_BASE - CONFIG_MALLOC_SIZE - CONFIG_STACK_SIZE)
+#define HEAD_TEXT_BASE (TEXT_BASE - 0x100000)
 
 #else
 
 #define STACK_BASE CONFIG_STACK_BASE
 #define MALLOC_BASE CONFIG_MALLOC_BASE
+#define HEAD_TEXT_BASE CONFIG_HEAD_TEXT_BASE
 
 #endif
 
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 17c1973..3f23bf1 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -18,6 +18,7 @@
 #include <kallsyms.h>
 
 #include <common.h>
+#include <init.h>
 #include <led.h>
 
 unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base)
@@ -618,7 +619,7 @@ char *asprintf(const char *fmt, ...)
 }
 EXPORT_SYMBOL(asprintf);
 
-void __noreturn panic(const char *fmt, ...)
+static void __noreturn __panic(const char *fmt, ...)
 {
 	va_list	args;
 	va_start(args, fmt);
@@ -637,4 +638,26 @@ void __noreturn panic(const char *fmt, ...)
 	reset_cpu(0);
 #endif
 }
+
+static void (*panic_fn)(const char *fmt, ...);
+
+static int panic_init(void)
+{
+	panic_fn = __panic;
+
+	return 0;
+}
+core_initcall(panic_init);
+
+void __noreturn panic(const char *fmt, ...)
+{
+	if (panic_fn) {
+		va_list	args;
+		va_start(args, fmt);
+		panic_fn(fmt, args);
+		va_end(args);
+	}
+
+	while(1);
+}
 EXPORT_SYMBOL(panic);
diff --git a/piggy.lzo.S b/piggy.lzo.S
new file mode 100644
index 0000000..6cc618d
--- /dev/null
+++ b/piggy.lzo.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl  input_data
+input_data:
+	.incbin "barebox-uncompressed.bin.lzo"
+	.globl  input_data_end
+input_data_end:
-- 
1.7.10.4



From s.hauer at pengutronix.de  Thu Jul 19 04:13:01 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 10:13:01 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own section
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>

To let the linker remove unused functions.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/cpu/cache-armv4.S      |    7 ++++++-
 arch/arm/cpu/cache-armv5.S      |    7 ++++++-
 arch/arm/cpu/cache-armv6.S      |   11 +++++++++--
 arch/arm/cpu/cache-armv7.S      |    8 ++++++--
 arch/arm/lib/ashldi3.S          |    1 +
 arch/arm/lib/ashrdi3.S          |    1 +
 arch/arm/lib/findbit.S          |    9 +++++++++
 arch/arm/lib/io-writesw-armv4.S |    2 ++
 arch/arm/lib/lib1funcs.S        |    7 +++++++
 arch/arm/lib/lshrdi3.S          |    1 +
 10 files changed, 48 insertions(+), 6 deletions(-)

diff --git a/arch/arm/cpu/cache-armv4.S b/arch/arm/cpu/cache-armv4.S
index 6d03565..2231eee 100644
--- a/arch/arm/cpu/cache-armv4.S
+++ b/arch/arm/cpu/cache-armv4.S
@@ -3,6 +3,7 @@
 
 #define CACHE_DLINESIZE 32
 
+.section .text.__mmu_cache_on
 ENTRY(__mmu_cache_on)
 		mov	r12, lr
 #ifdef CONFIG_MMU
@@ -30,6 +31,7 @@ __common_mmu_cache_on:
 		mrc	p15, 0, r0, c1, c0, 0	@ and read it back to
 		sub	pc, lr, r0, lsr #32	@ properly flush pipeline
 
+.section .text.__mmu_cache_off
 ENTRY(__mmu_cache_off)
 #ifdef CONFIG_MMU
 		mrc	p15, 0, r0, c1, c0
@@ -42,6 +44,7 @@ ENTRY(__mmu_cache_off)
 		mov	pc, lr
 ENDPROC(__mmu_cache_off)
 
+.section .text.__mmu_cache_flush
 ENTRY(__mmu_cache_flush)
 		mrc	p15, 0, r6, c0, c0	@ get processor ID
 		mov	r2, #64*1024		@ default: 32K dcache size (*2)
@@ -74,7 +77,6 @@ no_cache_id:
 		mov	pc, lr
 ENDPROC(__mmu_cache_flush)
 
-.section ".text.text"
 /*
  *	dma_inv_range(start, end)
  *
@@ -88,6 +90,7 @@ ENDPROC(__mmu_cache_flush)
  *
  * (same as v4wb)
  */
+.section .text.__dma_inv_range
 ENTRY(__dma_inv_range)
 	tst	r0, #CACHE_DLINESIZE - 1
 	bic	r0, r0, #CACHE_DLINESIZE - 1
@@ -111,6 +114,7 @@ ENTRY(__dma_inv_range)
  *
  * (same as v4wb)
  */
+.section .text.__dma_clean_range
 ENTRY(__dma_clean_range)
 	bic	r0, r0, #CACHE_DLINESIZE - 1
 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
@@ -128,6 +132,7 @@ ENTRY(__dma_clean_range)
  *	- start	- virtual start address
  *	- end	- virtual end address
  */
+.section .text.__dma_flush_range
 ENTRY(__dma_flush_range)
 	bic	r0, r0, #CACHE_DLINESIZE - 1
 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
diff --git a/arch/arm/cpu/cache-armv5.S b/arch/arm/cpu/cache-armv5.S
index a1193a6..d6ffaf1 100644
--- a/arch/arm/cpu/cache-armv5.S
+++ b/arch/arm/cpu/cache-armv5.S
@@ -3,6 +3,7 @@
 
 #define CACHE_DLINESIZE 32
 
+.section .text.__mmu_cache_on
 ENTRY(__mmu_cache_on)
 		mov	r12, lr
 #ifdef CONFIG_MMU
@@ -30,6 +31,7 @@ __common_mmu_cache_on:
 		mrc	p15, 0, r0, c1, c0, 0	@ and read it back to
 		sub	pc, lr, r0, lsr #32	@ properly flush pipeline
 
+.section .text.__mmu_cache_off
 ENTRY(__mmu_cache_off)
 #ifdef CONFIG_MMU
 		mrc	p15, 0, r0, c1, c0
@@ -42,6 +44,7 @@ ENTRY(__mmu_cache_off)
 		mov	pc, lr
 ENDPROC(__mmu_cache_off)
 
+.section .text.__mmu_cache_flush
 ENTRY(__mmu_cache_flush)
 1:		mrc	p15, 0, r15, c7, c14, 3	@ test,clean,invalidate D cache
 		bne	1b
@@ -49,7 +52,6 @@ ENTRY(__mmu_cache_flush)
 		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
 		mov	pc, lr
 ENDPROC(__mmu_cache_flush)
-.section ".text.text"
 
 /*
  *	dma_inv_range(start, end)
@@ -64,6 +66,7 @@ ENDPROC(__mmu_cache_flush)
  *
  * (same as v4wb)
  */
+.section .text.__dma_inv_range
 ENTRY(__dma_inv_range)
 	tst	r0, #CACHE_DLINESIZE - 1
 	bic	r0, r0, #CACHE_DLINESIZE - 1
@@ -87,6 +90,7 @@ ENTRY(__dma_inv_range)
  *
  * (same as v4wb)
  */
+.section .text.__dma_clean_range
 ENTRY(__dma_clean_range)
 	bic	r0, r0, #CACHE_DLINESIZE - 1
 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
@@ -104,6 +108,7 @@ ENTRY(__dma_clean_range)
  *	- start	- virtual start address
  *	- end	- virtual end address
  */
+.section .text.__dma_flush_range
 ENTRY(__dma_flush_range)
 	bic	r0, r0, #CACHE_DLINESIZE - 1
 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
diff --git a/arch/arm/cpu/cache-armv6.S b/arch/arm/cpu/cache-armv6.S
index 335bac2..02b1d3e 100644
--- a/arch/arm/cpu/cache-armv6.S
+++ b/arch/arm/cpu/cache-armv6.S
@@ -5,6 +5,7 @@
 #define CACHE_LINE_SIZE		32
 #define D_CACHE_LINE_SIZE	32
 
+.section .text.__mmu_cache_on
 ENTRY(__mmu_cache_on)
 		mov	r12, lr
 #ifdef CONFIG_MMU
@@ -33,6 +34,7 @@ __common_mmu_cache_on:
 		sub	pc, lr, r0, lsr #32	@ properly flush pipeline
 
 
+.section .text.__mmu_cache_off
 ENTRY(__mmu_cache_off)
 #ifdef CONFIG_MMU
 		mrc	p15, 0, r0, c1, c0
@@ -44,6 +46,7 @@ ENTRY(__mmu_cache_off)
 #endif
 		mov	pc, lr
 
+.section .text.__mmu_cache_flush
 ENTRY(__mmu_cache_flush)
 		mov	r1, #0
 		mcr	p15, 0, r1, c7, c14, 0	@ clean+invalidate D
@@ -52,7 +55,6 @@ ENTRY(__mmu_cache_flush)
 		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
 		mov	pc, lr
 ENDPROC(__mmu_cache_flush)
-.section ".text.text"
 
 /*
  *	v6_dma_inv_range(start,end)
@@ -64,6 +66,7 @@ ENDPROC(__mmu_cache_flush)
  *	- start   - virtual start address of region
  *	- end     - virtual end address of region
  */
+.section .text.__dma_inv_range
 ENTRY(__dma_inv_range)
 	tst	r0, #D_CACHE_LINE_SIZE - 1
 	bic	r0, r0, #D_CACHE_LINE_SIZE - 1
@@ -91,12 +94,14 @@ ENTRY(__dma_inv_range)
 	mov	r0, #0
 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
 	mov	pc, lr
+ENDPROC(__dma_inv_range)
 
 /*
  *	v6_dma_clean_range(start,end)
  *	- start   - virtual start address of region
  *	- end     - virtual end address of region
  */
+.section .text.__dma_clean_range
 ENTRY(__dma_clean_range)
 	bic	r0, r0, #D_CACHE_LINE_SIZE - 1
 1:
@@ -111,12 +116,14 @@ ENTRY(__dma_clean_range)
 	mov	r0, #0
 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
 	mov	pc, lr
+ENDPROC(__dma_clean_range)
 
 /*
  *	v6_dma_flush_range(start,end)
  *	- start   - virtual start address of region
  *	- end     - virtual end address of region
  */
+.section .text.__dma_flush_range
 ENTRY(__dma_flush_range)
 	bic	r0, r0, #D_CACHE_LINE_SIZE - 1
 1:
@@ -131,4 +138,4 @@ ENTRY(__dma_flush_range)
 	mov	r0, #0
 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
 	mov	pc, lr
-
+ENDPROC(__dma_flush_range)
diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S
index 28a6315..9bd7425 100644
--- a/arch/arm/cpu/cache-armv7.S
+++ b/arch/arm/cpu/cache-armv7.S
@@ -1,6 +1,7 @@
 #include <linux/linkage.h>
 #include <init.h>
 
+.section .text.__mmu_cache_on
 ENTRY(__mmu_cache_on)
 		mov	r12, lr
 #ifdef CONFIG_MMU
@@ -30,6 +31,7 @@ ENTRY(__mmu_cache_on)
 		mov	pc, r12
 ENDPROC(__mmu_cache_on)
 
+.section .text.__mmu_cache_off
 ENTRY(__mmu_cache_off)
 		mrc	p15, 0, r0, c1, c0
 #ifdef CONFIG_MMU
@@ -50,6 +52,7 @@ ENTRY(__mmu_cache_off)
 		mov	pc, r12
 ENDPROC(__mmu_cache_off)
 
+.section .text.__mmu_cache_flush
 ENTRY(__mmu_cache_flush)
 		mrc	p15, 0, r10, c0, c1, 5	@ read ID_MMFR1
 		tst	r10, #0xf << 16		@ hierarchical cache (ARMv7)
@@ -110,7 +113,6 @@ iflush:
 		mcr	p15, 0, r10, c7, c5, 4	@ ISB
 		mov	pc, lr
 ENDPROC(__mmu_cache_flush)
-.section ".text.text"
 
 /*
  * cache_line_size - get the cache line size from the CSIDR register
@@ -134,6 +136,7 @@ ENDPROC(__mmu_cache_flush)
  *	- start   - virtual start address of region
  *	- end     - virtual end address of region
  */
+.section .text.__dma_inv_range
 ENTRY(__dma_inv_range)
 	dcache_line_size r2, r3
 	sub	r3, r2, #1
@@ -158,6 +161,7 @@ ENDPROC(__dma_inv_range)
  *	- start   - virtual start address of region
  *	- end     - virtual end address of region
  */
+.section .text.__dma_clean_range
 ENTRY(__dma_clean_range)
 	dcache_line_size r2, r3
 	sub	r3, r2, #1
@@ -176,6 +180,7 @@ ENDPROC(__dma_clean_range)
  *	- start   - virtual start address of region
  *	- end     - virtual end address of region
  */
+.section .text.__dma_flush_range
 ENTRY(__dma_flush_range)
 	dcache_line_size r2, r3
 	sub	r3, r2, #1
@@ -188,4 +193,3 @@ ENTRY(__dma_flush_range)
 	dsb
 	mov	pc, lr
 ENDPROC(__dma_flush_range)
-
diff --git a/arch/arm/lib/ashldi3.S b/arch/arm/lib/ashldi3.S
index 638deb1..6588846 100644
--- a/arch/arm/lib/ashldi3.S
+++ b/arch/arm/lib/ashldi3.S
@@ -36,6 +36,7 @@ Boston, MA 02110-1301, USA.  */
 #define ah r1
 #endif
 
+.section .text.__ashldi3
 ENTRY(__ashldi3)
 ENTRY(__aeabi_llsl)
 
diff --git a/arch/arm/lib/ashrdi3.S b/arch/arm/lib/ashrdi3.S
index 015e8aa..a8a32f6 100644
--- a/arch/arm/lib/ashrdi3.S
+++ b/arch/arm/lib/ashrdi3.S
@@ -36,6 +36,7 @@ Boston, MA 02110-1301, USA.  */
 #define ah r1
 #endif
 
+.section .text.__ashrdi3
 ENTRY(__ashrdi3)
 ENTRY(__aeabi_lasr)
 
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index ef4caff..422455d 100644
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -22,6 +22,7 @@
  * Purpose  : Find a 'zero' bit
  * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit);
  */
+.section .text._find_first_zero_bit_le
 ENTRY(_find_first_zero_bit_le)
 		teq	r1, #0
 		beq	3f
@@ -43,6 +44,7 @@ ENDPROC(_find_first_zero_bit_le)
  * Purpose  : Find next 'zero' bit
  * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
  */
+.section .text._find_next_zero_bit_le
 ENTRY(_find_next_zero_bit_le)
 		teq	r1, #0
 		beq	3b
@@ -63,6 +65,7 @@ ENDPROC(_find_next_zero_bit_le)
  * Purpose  : Find a 'one' bit
  * Prototype: int find_first_bit(const unsigned long *addr, unsigned int maxbit);
  */
+.section .text._find_first_bit_le
 ENTRY(_find_first_bit_le)
 		teq	r1, #0
 		beq	3f
@@ -84,6 +87,7 @@ ENDPROC(_find_first_bit_le)
  * Purpose  : Find next 'one' bit
  * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
  */
+.section .text._find_next_bit_le
 ENTRY(_find_next_bit_le)
 		teq	r1, #0
 		beq	3b
@@ -101,6 +105,7 @@ ENDPROC(_find_next_bit_le)
 
 #ifdef __ARMEB__
 
+.section .text._find_first_zero_bit_be
 ENTRY(_find_first_zero_bit_be)
 		teq	r1, #0
 		beq	3f
@@ -118,6 +123,7 @@ ENTRY(_find_first_zero_bit_be)
 		mov	pc, lr
 ENDPROC(_find_first_zero_bit_be)
 
+.section .text._find_next_zero_bit_be
 ENTRY(_find_next_zero_bit_be)
 		teq	r1, #0
 		beq	3b
@@ -135,6 +141,7 @@ ENTRY(_find_next_zero_bit_be)
 		b	2b			@ loop for next bit
 ENDPROC(_find_next_zero_bit_be)
 
+.section .text._find_first_bit_be
 ENTRY(_find_first_bit_be)
 		teq	r1, #0
 		beq	3f
@@ -152,6 +159,7 @@ ENTRY(_find_first_bit_be)
 		mov	pc, lr
 ENDPROC(_find_first_bit_be)
 
+.section .text._find_next_bit_be
 ENTRY(_find_next_bit_be)
 		teq	r1, #0
 		beq	3b
@@ -173,6 +181,7 @@ ENDPROC(_find_next_bit_be)
 /*
  * One or more bits in the LSB of r3 are assumed to be set.
  */
+.section .text.L_found
 .L_found:
 #if __LINUX_ARM_ARCH__ >= 5
 		rsb	r0, r3, #0
diff --git a/arch/arm/lib/io-writesw-armv4.S b/arch/arm/lib/io-writesw-armv4.S
index ff4f71b..9e8308d 100644
--- a/arch/arm/lib/io-writesw-armv4.S
+++ b/arch/arm/lib/io-writesw-armv4.S
@@ -22,6 +22,8 @@
 #endif
 		.endm
 
+.section .text.__raw_writesw
+
 .Loutsw_align:	movs	ip, r1, lsl #31
 		bne	.Loutsw_noalign
 
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S
index 5143e90..7d6f708 100644
--- a/arch/arm/lib/lib1funcs.S
+++ b/arch/arm/lib/lib1funcs.S
@@ -205,6 +205,7 @@ Boston, MA 02111-1307, USA.  */
 .endm
 
 
+.section .text.__udivsi3
 ENTRY(__udivsi3)
 ENTRY(__aeabi_uidiv)
 
@@ -233,6 +234,7 @@ ENTRY(__aeabi_uidiv)
 ENDPROC(__udivsi3)
 ENDPROC(__aeabi_uidiv)
 
+.section .text.__umodsi3
 ENTRY(__umodsi3)
 
 	subs	r2, r1, #1			@ compare divisor with 1
@@ -249,6 +251,7 @@ ENTRY(__umodsi3)
 
 ENDPROC(__umodsi3)
 
+.section .text.__divsi3
 ENTRY(__divsi3)
 ENTRY(__aeabi_idiv)
 
@@ -290,6 +293,7 @@ ENTRY(__aeabi_idiv)
 ENDPROC(__divsi3)
 ENDPROC(__aeabi_idiv)
 
+.section .text.__modsi3
 ENTRY(__modsi3)
 
 	cmp	r1, #0
@@ -314,6 +318,7 @@ ENDPROC(__modsi3)
 
 #ifdef CONFIG_AEABI
 
+.section .text.__aeabi_uidivmod
 ENTRY(__aeabi_uidivmod)
 
 	stmfd	sp!, {r0, r1, ip, lr}
@@ -325,6 +330,7 @@ ENTRY(__aeabi_uidivmod)
 
 ENDPROC(__aeabi_uidivmod)
 
+.section .text.__aeabi_idivmod
 ENTRY(__aeabi_idivmod)
 
 	stmfd	sp!, {r0, r1, ip, lr}
@@ -338,6 +344,7 @@ ENDPROC(__aeabi_idivmod)
 
 #endif
 
+.section .text.Ldiv0
 Ldiv0:
 
 	str	lr, [sp, #-8]!
diff --git a/arch/arm/lib/lshrdi3.S b/arch/arm/lib/lshrdi3.S
index f83d449..3c7df3b 100644
--- a/arch/arm/lib/lshrdi3.S
+++ b/arch/arm/lib/lshrdi3.S
@@ -36,6 +36,7 @@ Boston, MA 02110-1301, USA.  */
 #define ah r1
 #endif
 
+.section .text.__lshrdi3
 ENTRY(__lshrdi3)
 ENTRY(__aeabi_llsr)
 
-- 
1.7.10.4



From J.Weitzel at phytec.de  Thu Jul 19 04:31:28 2012
From: J.Weitzel at phytec.de (Jan Weitzel)
Date: Thu, 19 Jul 2012 10:31:28 +0200
Subject: [PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC
In-Reply-To: <20120718221127.GS30009@pengutronix.de>
References: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
 <1342615033-3232-2-git-send-email-j.weitzel@phytec.de>
 <20120718221127.GS30009@pengutronix.de>
Message-ID: <1342686688.4849.21.camel@lws-weitzel>

Am Donnerstag, den 19.07.2012, 00:11 +0200 schrieb Sascha Hauer:
> Hi Jan,
> 
> On Wed, Jul 18, 2012 at 02:37:11PM +0200, Jan Weitzel wrote:
> > GPMC could be already configured by xloader or rom bootloader
> > Use the configured buswidth (width == 0) or set it explicit in the board file.
> 
> What happens if it hasn't been configured by the ROM or xloader, for
> example when booting from MMC?
It will fall back to 8bit (GPMC register reset state). Have added this
to the commit message.
Booting from MMC is a problem for xloader and boards with 16bit NANDS.
We see the wrong buswidth in nand_base.c try to fix it after return to
gpmc_nand_probe. See the RFC mtd omap nand: reconfigure buswidth.
Did you see a better way?

Jan
> Sascha
> 
> > 
> > Use autodetect on pcm049
> > 
> > Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> > ---
> >  arch/arm/boards/pcm049/board.c         |    4 ++--
> >  arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++++++++++++++++++-----
> >  arch/arm/mach-omap/gpmc.c              |   19 +++++++++++++++++++
> >  arch/arm/mach-omap/include/mach/gpmc.h |    8 ++++++++
> >  4 files changed, 47 insertions(+), 7 deletions(-)
> > 
> > diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
> > index 3a2b574..4f056e0 100644
> > --- a/arch/arm/boards/pcm049/board.c
> > +++ b/arch/arm/boards/pcm049/board.c
> > @@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
> >  
> >  	pcm049_network_init();
> >  
> > -	gpmc_generic_nand_devices_init(0, 8,
> > +	/* Autodetect buswidth*/
> > +	gpmc_generic_nand_devices_init(0, 0,
> >  			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
> > -
> >  #ifdef CONFIG_PARTITION
> >  	devfs_add_partition("nand0", 0x00000, SZ_128K,
> >  			DEVFS_PARTITION_FIXED, "xload_raw");
> > diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
> > index cf87b57..06f9576 100644
> > --- a/arch/arm/mach-omap/devices-gpmc-nand.c
> > +++ b/arch/arm/mach-omap/devices-gpmc-nand.c
> > @@ -35,9 +35,7 @@
> >  #include <mach/silicon.h>
> >  #include <mach/gpmc.h>
> >  #include <mach/gpmc_nand.h>
> > -
> > -#define GPMC_CONF1_VALx8	0x00000800
> > -#define GPMC_CONF1_VALx16	0x00001800
> > +#include <mach/xload.h>
> >  
> >  /** NAND platform specific settings settings */
> >  static struct gpmc_nand_platform_data nand_plat = {
> > @@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
> >   *
> >   * @return success/fail based on device function
> >   */
> > +
> >  int gpmc_generic_nand_devices_init(int cs, int width,
> >  		enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
> >  {
> >  	nand_plat.cs = cs;
> >  
> > +	if (width == 0) {
> > +		struct gpmc_config cfg;
> > +		/* try to get buswidth from gpmc */
> > +		gpmc_get_config(cs, &cfg);
> > +		width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
> > +
> > +		if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
> > +			debug("GPMC not configured for NAND, "
> > +					"try width %d bit\n", width);
> > +
> > +		debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
> > +	}
> > +
> >  	if (width == 16)
> > -		nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
> > +		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
> > +					GPMC_CONFIG1_DEVICESIZE_16;
> >  	else
> > -		nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
> > +		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
> >  
> >  	nand_plat.device_width = width;
> >  	nand_plat.ecc_mode = eccmode;
> > diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
> > index e8946d7..399f68a 100644
> > --- a/arch/arm/mach-omap/gpmc.c
> > +++ b/arch/arm/mach-omap/gpmc.c
> > @@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
> >  	mdelay(1);		/* Settling time */
> >  }
> >  EXPORT_SYMBOL(gpmc_cs_config);
> > +
> > +void gpmc_get_config(char cs, struct gpmc_config *config)
> > +{
> > +	unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
> > +	unsigned int cfg7;
> > +	unsigned char i;
> > +
> > +	/* Read the CFG1-6 regs */
> > +	for (i = 0; i < 6; i++) {
> > +		config->cfg[i] = readl(reg);
> > +		reg += GPMC_CONFIG_REG_OFF;
> > +	}
> > +
> > +	cfg7 = readl(reg);
> > +
> > +	config->size = (cfg7 >> 8) & 0xf;
> > +	config->base = (cfg7 & 0x3F) << 24;
> > +}
> > +EXPORT_SYMBOL(gpmc_get_config);
> > diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
> > index 3ddc5f5..84260fc 100644
> > --- a/arch/arm/mach-omap/include/mach/gpmc.h
> > +++ b/arch/arm/mach-omap/include/mach/gpmc.h
> > @@ -140,6 +140,11 @@
> >  
> >  #define NAND_WP_BIT		0x00000010
> >  
> > +#define GPMC_CONFIG1_DEVICESIZE(val)	((val & 3) << 12)
> > +#define GPMC_CONFIG1_DEVICESIZE_16	GPMC_CONFIG1_DEVICESIZE(1)
> > +#define GPMC_CONFIG1_DEVICETYPE(val)	((val & 3) << 10)
> > +#define GPMC_CONFIG1_DEVICETYPE_NAND	GPMC_CONFIG1_DEVICETYPE(2)
> > +
> >  #ifndef __ASSEMBLY__
> >  
> >  /** Generic GPMC configuration structure to be used to configure a
> > @@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
> >  /** Configuration for a specific chip select */
> >  void gpmc_cs_config(char cs, struct gpmc_config *config);
> >  
> > +/** Get Configuration for a specific chip select */
> > +void gpmc_get_config(char cs, struct gpmc_config *config);
> > +
> >  #endif
> >  
> >  #endif /* __ASM_ARCH_OMAP_GPMC_H */
> > -- 
> > 1.7.0.4
> > 
> > 
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> > 
> 




From J.Kilb at phytec.de  Thu Jul 19 04:33:49 2012
From: J.Kilb at phytec.de (Juergen Kilb)
Date: Thu, 19 Jul 2012 10:33:49 +0200
Subject: [PATCH] Add /dev/urandom device.
Message-ID: <1342686830-30950-1-git-send-email-J.Kilb@phytec.de>

Nice for testing purposes.

Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
---
 commands/stddev.c |   39 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 39 insertions(+), 0 deletions(-)

diff --git a/commands/stddev.c b/commands/stddev.c
index 098aea8..b807df6 100644
--- a/commands/stddev.c
+++ b/commands/stddev.c
@@ -20,7 +20,9 @@
  */
 
 #include <common.h>
+#include <clock.h>
 #include <init.h>
+#include <stdlib.h>
 
 static ssize_t zero_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, ulong flags)
 {
@@ -104,3 +106,40 @@ static int null_init(void)
 }
 
 device_initcall(null_init);
+
+static ssize_t urandom_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, ulong flags)
+{
+	size_t i;
+	unsigned int *buffer;
+
+	buffer = (unsigned int *) buf;
+
+	for (i = 0; i < (count / sizeof(size_t)); i++)
+		buffer[i] = rand() | rand() << 16;
+
+	return count;
+}
+
+static struct file_operations urandomops = {
+	.read  = urandom_read,
+	.lseek = dev_lseek_default,
+};
+
+static int urandom_init(void)
+{
+	struct cdev *cdev;
+
+	cdev = xzalloc(sizeof(*cdev));
+
+	cdev->name = "urandom";
+	cdev->size = ~0;
+	cdev->ops = &urandomops;
+
+	devfs_create(cdev);
+
+	srand(get_time_ns());
+
+	return 0;
+}
+
+device_initcall(urandom_init);
-- 
1.7.0.4



From J.Kilb at phytec.de  Thu Jul 19 04:33:50 2012
From: J.Kilb at phytec.de (Juergen Kilb)
Date: Thu, 19 Jul 2012 10:33:50 +0200
Subject: [PATCH] add possibility to mark blocks as bad during write
In-Reply-To: <1342686830-30950-1-git-send-email-J.Kilb@phytec.de>
References: <1342686830-30950-1-git-send-email-J.Kilb@phytec.de>
Message-ID: <1342686830-30950-2-git-send-email-J.Kilb@phytec.de>

and update phyCARD-A-L1 defaultconfig to use this
feature.

Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
---
 arch/arm/configs/phycard_a_l1_defconfig |  122 ++-----------------------------
 drivers/mtd/nand/Kconfig                |   10 +++
 drivers/mtd/nand/nand-bb.c              |   15 ++++-
 3 files changed, 31 insertions(+), 116 deletions(-)

diff --git a/arch/arm/configs/phycard_a_l1_defconfig b/arch/arm/configs/phycard_a_l1_defconfig
index cf980f7..df0b5a5 100644
--- a/arch/arm/configs/phycard_a_l1_defconfig
+++ b/arch/arm/configs/phycard_a_l1_defconfig
@@ -1,105 +1,33 @@
-CONFIG_GENERIC_LINKER_SCRIPT=y
-CONFIG_ARM=y
-CONFIG_ARM_LINUX=y
 CONFIG_ARCH_OMAP=y
-CONFIG_CPU_32=y
-CONFIG_CPU_V7=y
-CONFIG_CPU_32v7=y
-CONFIG_BOARDINFO="Phytec phyCARD-A-L1"
-CONFIG_ARCH_OMAP3=y
-CONFIG_OMAP_CLOCK_ALL=y
-CONFIG_OMAP_CLOCK_SOURCE_S32K=y
-CONFIG_OMAP3_CLOCK_CONFIG=y
-CONFIG_OMAP3_COPY_CLOCK_SRAM=n
-CONFIG_OMAP_GPMC=y
 CONFIG_MACH_PCAAL1=y
 CONFIG_AEABI=y
-CONFIG_CMD_ARM_CPUINFO=y
-CONFIG_ARM_EXCEPTIONS=y
-CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
-CONFIG_GREGORIAN_CALENDER=y
-CONFIG_HAS_KALLSYMS=y
-CONFIG_HAS_MODULES=y
-CONFIG_CMD_MEMORY=y
-CONFIG_ENV_HANDLING=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_BLOCK=y
-CONFIG_BLOCK_WRITE=y
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_ENVIRONMENT_VARIABLES=y
-CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
 CONFIG_TEXT_BASE=0x85000000
-CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
-CONFIG_MEMORY_LAYOUT_DEFAULT=y
-CONFIG_STACK_SIZE=0x8000
 CONFIG_MALLOC_SIZE=0x1000000
 CONFIG_EXPERIMENTAL=y
-CONFIG_MALLOC_DLMALLOC=y
-CONFIG_MACH_HAS_LOWLEVEL_INIT=y
-CONFIG_MACH_DO_LOWLEVEL_INIT=y
-CONFIG_ARCH_HAS_LOWLEVEL_INIT=y
 CONFIG_PROMPT="phyCARD-A-L1 >"
-CONFIG_BAUDRATE=115200
 CONFIG_LONGHELP=y
-CONFIG_CBSIZE=1024
-CONFIG_MAXARGS=16
-CONFIG_SHELL_HUSH=y
-CONFIG_GLOB=y
-CONFIG_PROMPT_HUSH_PS2="> "
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_HUSH_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
-CONFIG_PASSWORD=y
-CONFIG_PASSWD_SUM_MD5=y
-CONFIG_DYNAMIC_CRC_TABLE=y
-CONFIG_ERRNO_MESSAGES=y
-CONFIG_TIMESTAMP=y
-CONFIG_CONSOLE_FULL=y
-CONFIG_CONSOLE_ACTIVATE_FIRST=y
-CONFIG_PARTITION=y
-CONFIG_PARTITION_DISK=y
-CONFIG_PARTITION_DISK_DOS=y
-CONFIG_DEFAULT_ENVIRONMENT=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phycard-a-l1/env"
-CONFIG_COMMAND_SUPPORT=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
-CONFIG_CMD_TRUE=y
-CONFIG_CMD_FALSE=y
 CONFIG_CMD_MENU=y
 CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_LOGIN=y
 CONFIG_CMD_PASSWD=y
 CONFIG_PASSWD_MODE_STAR=y
 CONFIG_CMD_TIME=y
-CONFIG_CMD_LS=y
-CONFIG_CMD_RM=y
-CONFIG_CMD_CAT=y
-CONFIG_CMD_MKDIR=y
-CONFIG_CMD_RMDIR=y
-CONFIG_CMD_CP=y
-CONFIG_CMD_PWD=y
-CONFIG_CMD_CD=y
-CONFIG_CMD_MOUNT=y
-CONFIG_CMD_UMOUNT=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_CLEAR=y
-CONFIG_CMD_ECHO=y
 CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_IOMEM=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_DIGEST=y
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_SHA1SUM=y
 CONFIG_CMD_SHA256SUM=y
@@ -107,22 +35,15 @@ CONFIG_CMD_SHA224SUM=y
 CONFIG_CMD_MTEST=y
 CONFIG_CMD_MTEST_ALTERNATIVE=y
 CONFIG_CMD_FLASH=y
-CONFIG_CMD_UBI=y
-CONFIG_CMD_BOOTM=y
 CONFIG_CMD_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_IMINFO=y
-CONFIG_CMD_BOOTZ=n
-CONFIG_CMD_BOOTU=n
+# CONFIG_CMD_BOOTZ is not set
+# CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_TEST=y
-CONFIG_CMD_VERSION=y
-CONFIG_CMD_HELP=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_DEVINFO=y
 CONFIG_CMD_UNCOMPRESS=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
@@ -134,49 +55,20 @@ CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
-CONFIG_MIIDEV=y
 CONFIG_DRIVER_NET_SMC911X=y
-CONFIG_DRIVER_NET_SMC911X_ADDRESS_SHIFT=0
-CONFIG_SPI=n
+# CONFIG_SPI is not set
 CONFIG_MTD=y
 CONFIG_NAND=y
-CONFIG_NAND_WRITE=y
-CONFIG_NAND_ECC_SOFT=y
-CONFIG_NAND_ECC_HW=y
-CONFIG_NAND_ECC_HW_SYNDROME=y
-CONFIG_NAND_ECC_HW_NONE=y
-CONFIG_NAND_INFO=y
-CONFIG_NAND_READ_OOB=y
-CONFIG_NAND_BBT=y
-CONFIG_NAND_OOB_DEVICE=y
+CONFIG_NAND_MARK_BAD=y
 CONFIG_NAND_OMAP_GPMC=y
-CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_UBI=y
-CONFIG_DISK=y
-CONFIG_DISK_WRITE=y
-CONFIG_DISK_ATA=y
 CONFIG_DISK_INTF_PLATFORM_IDE=y
 CONFIG_MCI=y
-CONFIG_MCI_INFO=y
-CONFIG_MCI_WRITE=y
 CONFIG_MCI_OMAP_HSMMC=y
 CONFIG_FS_CRAMFS=y
-CONFIG_FS_RAMFS=y
-CONFIG_FS_DEVFS=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
-CONFIG_PARTITION_NEED_MTD=y
-CONFIG_ZLIB=y
 CONFIG_BZLIB=y
-CONFIG_PROCESS_ESCAPE_SEQUENCE=y
 CONFIG_LZO_DECOMPRESS=y
-CONFIG_FDT=y
-CONFIG_OFTREE=y
-CONFIG_CRC32=y
-CONFIG_CRC16=y
-CONFIG_DIGEST=y
-CONFIG_MD5=y
-CONFIG_SHA1=y
-CONFIG_SHA224=y
-CONFIG_SHA256=y
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 3f90643..e597c3e 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -48,6 +48,16 @@ config NAND_BBT
 	  Say y here to include support for bad block tables. This speeds
 	  up the process of checking for bad blocks
 
+config NAND_MARK_BAD
+	bool
+	default n
+	prompt "Support marking erronoues blocks as bad"
+	help
+	  If an erase/write error occurs during copying data into a *.bb
+	  partition, the block will be maked as bad.
+	  Attention!! Use with caution,only when your NAND driver is known
+	  to work correctly.
+
 config NAND_IMX
 	bool
 	prompt "i.MX NAND driver"
diff --git a/drivers/mtd/nand/nand-bb.c b/drivers/mtd/nand/nand-bb.c
index 519337e..1cc21c3 100644
--- a/drivers/mtd/nand/nand-bb.c
+++ b/drivers/mtd/nand/nand-bb.c
@@ -112,8 +112,21 @@ static int nand_bb_write_buf(struct nand_bb *bb, size_t count)
 
 		now = min(count, (size_t)(bb->info.erasesize));
 		ret = cdev_write(parent, buf, now, cur_ofs, 0);
-		if (ret < 0)
+		if (ret < 0) {
+#ifdef CONFIG_NAND_MARK_BAD
+			debug("marking bad block at 0x%08x\n", cur_ofs);
+			ret = cdev_ioctl(parent, MEMSETBADBLOCK, &cur_ofs);
+			if (ret < 0)
+				return ret;
+
+			bb->offset += bb->info.erasesize;
+			cur_ofs += bb->info.erasesize;
+			continue;
+#else
 			return ret;
+#endif
+		}
+
 		buf += now;
 		count -= now;
 		cur_ofs += now;
-- 
1.7.0.4



From amine.thadi at gmail.com  Thu Jul 19 05:19:15 2012
From: amine.thadi at gmail.com (Amine THADI)
Date: Thu, 19 Jul 2012 11:19:15 +0200
Subject: ST Chipsets support
Message-ID: <CAJACBZ167JjmbZdO39GMbwVFkwTEdn9RzOnH=rAB3fquenXYaw@mail.gmail.com>

Hello,

Is it intended to support Barebox some day on stb ST Chipsets
?http://barebox.org/

Thanks in advance,
Amine
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From mkl at pengutronix.de  Thu Jul 19 06:38:03 2012
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Thu, 19 Jul 2012 12:38:03 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own
 section
In-Reply-To: <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
Message-ID: <5007E38B.8040106@pengutronix.de>

On 07/19/2012 10:13 AM, Sascha Hauer wrote:
> To let the linker remove unused functions.
> 
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>  arch/arm/cpu/cache-armv4.S      |    7 ++++++-
>  arch/arm/cpu/cache-armv5.S      |    7 ++++++-
>  arch/arm/cpu/cache-armv6.S      |   11 +++++++++--
>  arch/arm/cpu/cache-armv7.S      |    8 ++++++--
>  arch/arm/lib/ashldi3.S          |    1 +
>  arch/arm/lib/ashrdi3.S          |    1 +
>  arch/arm/lib/findbit.S          |    9 +++++++++
>  arch/arm/lib/io-writesw-armv4.S |    2 ++
>  arch/arm/lib/lib1funcs.S        |    7 +++++++
>  arch/arm/lib/lshrdi3.S          |    1 +
>  10 files changed, 48 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/cpu/cache-armv4.S b/arch/arm/cpu/cache-armv4.S
> index 6d03565..2231eee 100644
> --- a/arch/arm/cpu/cache-armv4.S
> +++ b/arch/arm/cpu/cache-armv4.S
> @@ -3,6 +3,7 @@
>  
>  #define CACHE_DLINESIZE 32
>  
> +.section .text.__mmu_cache_on
>  ENTRY(__mmu_cache_on)

Is it possible to add the section to the ENTRY macro?

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
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From christian.kapeller at cmotion.eu  Thu Jul 19 07:40:19 2012
From: christian.kapeller at cmotion.eu (Christian Kapeller)
Date: Thu, 19 Jul 2012 13:40:19 +0200
Subject: [PATCH] Fix compile error loady command, without loadb.
Message-ID: <1342698019-21374-1-git-send-email-christian.kapeller@cmotion.eu>

The global variable ofd is needed by both loady and loadb.
---
 commands/loadb.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/commands/loadb.c b/commands/loadb.c
index 9a697dd..50f323e 100644
--- a/commands/loadb.c
+++ b/commands/loadb.c
@@ -61,10 +61,10 @@
 #define untochar(x)	((int) (((x) - SPACE) & 0xff))
 #define DEF_FILE	"image.bin"
 
-#ifdef CONFIG_CMD_LOADB
-
 static int ofd;			/* output file descriptor */
 
+#ifdef CONFIG_CMD_LOADB
+
 /* Size of my buffer to write to o/p file */
 #define MAX_WRITE_BUFFER 4096	/* Write size to o/p file */
 static char *write_buffer;	/* buffer for finalized data to write */
-- 
1.7.5.4



From s.hauer at pengutronix.de  Thu Jul 19 09:09:10 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 15:09:10 +0200
Subject: [PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC
In-Reply-To: <1342686688.4849.21.camel@lws-weitzel>
References: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
 <1342615033-3232-2-git-send-email-j.weitzel@phytec.de>
 <20120718221127.GS30009@pengutronix.de>
 <1342686688.4849.21.camel@lws-weitzel>
Message-ID: <20120719130910.GW30009@pengutronix.de>

On Thu, Jul 19, 2012 at 10:31:28AM +0200, Jan Weitzel wrote:
> Am Donnerstag, den 19.07.2012, 00:11 +0200 schrieb Sascha Hauer:
> > Hi Jan,
> > 
> > On Wed, Jul 18, 2012 at 02:37:11PM +0200, Jan Weitzel wrote:
> > > GPMC could be already configured by xloader or rom bootloader
> > > Use the configured buswidth (width == 0) or set it explicit in the board file.
> > 
> > What happens if it hasn't been configured by the ROM or xloader, for
> > example when booting from MMC?
> It will fall back to 8bit (GPMC register reset state). Have added this
> to the commit message.
> Booting from MMC is a problem for xloader and boards with 16bit NANDS.
> We see the wrong buswidth in nand_base.c try to fix it after return to
> gpmc_nand_probe. See the RFC mtd omap nand: reconfigure buswidth.
> Did you see a better way?

Probably better to add a NAND_BUSWIDTH_UNKNOWN flag which can be passed
via platformdata and let the core handle this. I think for this you also
need a callback to the nand driver to select the bus width.

Sascha

> 
> Jan
> > Sascha
> > 
> > > 
> > > Use autodetect on pcm049
> > > 
> > > Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> > > ---
> > >  arch/arm/boards/pcm049/board.c         |    4 ++--
> > >  arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++++++++++++++++++-----
> > >  arch/arm/mach-omap/gpmc.c              |   19 +++++++++++++++++++
> > >  arch/arm/mach-omap/include/mach/gpmc.h |    8 ++++++++
> > >  4 files changed, 47 insertions(+), 7 deletions(-)
> > > 
> > > diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
> > > index 3a2b574..4f056e0 100644
> > > --- a/arch/arm/boards/pcm049/board.c
> > > +++ b/arch/arm/boards/pcm049/board.c
> > > @@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
> > >  
> > >  	pcm049_network_init();
> > >  
> > > -	gpmc_generic_nand_devices_init(0, 8,
> > > +	/* Autodetect buswidth*/
> > > +	gpmc_generic_nand_devices_init(0, 0,
> > >  			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
> > > -
> > >  #ifdef CONFIG_PARTITION
> > >  	devfs_add_partition("nand0", 0x00000, SZ_128K,
> > >  			DEVFS_PARTITION_FIXED, "xload_raw");
> > > diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
> > > index cf87b57..06f9576 100644
> > > --- a/arch/arm/mach-omap/devices-gpmc-nand.c
> > > +++ b/arch/arm/mach-omap/devices-gpmc-nand.c
> > > @@ -35,9 +35,7 @@
> > >  #include <mach/silicon.h>
> > >  #include <mach/gpmc.h>
> > >  #include <mach/gpmc_nand.h>
> > > -
> > > -#define GPMC_CONF1_VALx8	0x00000800
> > > -#define GPMC_CONF1_VALx16	0x00001800
> > > +#include <mach/xload.h>
> > >  
> > >  /** NAND platform specific settings settings */
> > >  static struct gpmc_nand_platform_data nand_plat = {
> > > @@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
> > >   *
> > >   * @return success/fail based on device function
> > >   */
> > > +
> > >  int gpmc_generic_nand_devices_init(int cs, int width,
> > >  		enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
> > >  {
> > >  	nand_plat.cs = cs;
> > >  
> > > +	if (width == 0) {
> > > +		struct gpmc_config cfg;
> > > +		/* try to get buswidth from gpmc */
> > > +		gpmc_get_config(cs, &cfg);
> > > +		width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
> > > +
> > > +		if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
> > > +			debug("GPMC not configured for NAND, "
> > > +					"try width %d bit\n", width);
> > > +
> > > +		debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
> > > +	}
> > > +
> > >  	if (width == 16)
> > > -		nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
> > > +		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
> > > +					GPMC_CONFIG1_DEVICESIZE_16;
> > >  	else
> > > -		nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
> > > +		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
> > >  
> > >  	nand_plat.device_width = width;
> > >  	nand_plat.ecc_mode = eccmode;
> > > diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
> > > index e8946d7..399f68a 100644
> > > --- a/arch/arm/mach-omap/gpmc.c
> > > +++ b/arch/arm/mach-omap/gpmc.c
> > > @@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
> > >  	mdelay(1);		/* Settling time */
> > >  }
> > >  EXPORT_SYMBOL(gpmc_cs_config);
> > > +
> > > +void gpmc_get_config(char cs, struct gpmc_config *config)
> > > +{
> > > +	unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
> > > +	unsigned int cfg7;
> > > +	unsigned char i;
> > > +
> > > +	/* Read the CFG1-6 regs */
> > > +	for (i = 0; i < 6; i++) {
> > > +		config->cfg[i] = readl(reg);
> > > +		reg += GPMC_CONFIG_REG_OFF;
> > > +	}
> > > +
> > > +	cfg7 = readl(reg);
> > > +
> > > +	config->size = (cfg7 >> 8) & 0xf;
> > > +	config->base = (cfg7 & 0x3F) << 24;
> > > +}
> > > +EXPORT_SYMBOL(gpmc_get_config);
> > > diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
> > > index 3ddc5f5..84260fc 100644
> > > --- a/arch/arm/mach-omap/include/mach/gpmc.h
> > > +++ b/arch/arm/mach-omap/include/mach/gpmc.h
> > > @@ -140,6 +140,11 @@
> > >  
> > >  #define NAND_WP_BIT		0x00000010
> > >  
> > > +#define GPMC_CONFIG1_DEVICESIZE(val)	((val & 3) << 12)
> > > +#define GPMC_CONFIG1_DEVICESIZE_16	GPMC_CONFIG1_DEVICESIZE(1)
> > > +#define GPMC_CONFIG1_DEVICETYPE(val)	((val & 3) << 10)
> > > +#define GPMC_CONFIG1_DEVICETYPE_NAND	GPMC_CONFIG1_DEVICETYPE(2)
> > > +
> > >  #ifndef __ASSEMBLY__
> > >  
> > >  /** Generic GPMC configuration structure to be used to configure a
> > > @@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
> > >  /** Configuration for a specific chip select */
> > >  void gpmc_cs_config(char cs, struct gpmc_config *config);
> > >  
> > > +/** Get Configuration for a specific chip select */
> > > +void gpmc_get_config(char cs, struct gpmc_config *config);
> > > +
> > >  #endif
> > >  
> > >  #endif /* __ASM_ARCH_OMAP_GPMC_H */
> > > -- 
> > > 1.7.0.4
> > > 
> > > 
> > > _______________________________________________
> > > barebox mailing list
> > > barebox at lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/barebox
> > > 
> > 
> 
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul 19 09:10:24 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 15:10:24 +0200
Subject: [PATCH] pca-a-l1: added memory device for int. 60kB RAM.
In-Reply-To: <1342616327-2765-3-git-send-email-J.Kilb@phytec.de>
References: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
 <1342616327-2765-3-git-send-email-J.Kilb@phytec.de>
Message-ID: <20120719131024.GX30009@pengutronix.de>

Hi J?rgen,

On Wed, Jul 18, 2012 at 02:58:46PM +0200, Juergen Kilb wrote:
> 
> Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
> ---
>  arch/arm/boards/phycard-a-l1/pca-a-l1.c         |    2 ++
>  arch/arm/mach-omap/include/mach/omap3-silicon.h |    1 +
>  2 files changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> index 1cc2815..8fae405 100644
> --- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> +++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> @@ -292,6 +292,8 @@ static int pcaal1_mem_init(void)
>  	 */
>  	gpmc_generic_init(0x10);
>  #endif
> +	add_mem_device("sram0", OMAP_SRAM_BASE, 60 * SZ_1K,
> +				   IORESOURCE_MEM_WRITEABLE);

Isn't this 64K? Or does the ROM code store stuff in the upper 4k which
you want to preserve?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Thu Jul 19 10:04:37 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 19 Jul 2012 16:04:37 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own
 section
In-Reply-To: <5007E38B.8040106@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
 <5007E38B.8040106@pengutronix.de>
Message-ID: <20120719140437.GC22657@game.jcrosoft.org>

On 12:38 Thu 19 Jul     , Marc Kleine-Budde wrote:
> On 07/19/2012 10:13 AM, Sascha Hauer wrote:
> > To let the linker remove unused functions.
> > 
> > Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> > ---
> >  arch/arm/cpu/cache-armv4.S      |    7 ++++++-
> >  arch/arm/cpu/cache-armv5.S      |    7 ++++++-
> >  arch/arm/cpu/cache-armv6.S      |   11 +++++++++--
> >  arch/arm/cpu/cache-armv7.S      |    8 ++++++--
> >  arch/arm/lib/ashldi3.S          |    1 +
> >  arch/arm/lib/ashrdi3.S          |    1 +
> >  arch/arm/lib/findbit.S          |    9 +++++++++
> >  arch/arm/lib/io-writesw-armv4.S |    2 ++
> >  arch/arm/lib/lib1funcs.S        |    7 +++++++
> >  arch/arm/lib/lshrdi3.S          |    1 +
> >  10 files changed, 48 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/arm/cpu/cache-armv4.S b/arch/arm/cpu/cache-armv4.S
> > index 6d03565..2231eee 100644
> > --- a/arch/arm/cpu/cache-armv4.S
> > +++ b/arch/arm/cpu/cache-armv4.S
> > @@ -3,6 +3,7 @@
> >  
> >  #define CACHE_DLINESIZE 32
> >  
> > +.section .text.__mmu_cache_on
> >  ENTRY(__mmu_cache_on)
> 
> Is it possible to add the section to the ENTRY macro?
Agreed

Best Regards,
J.


From s.hauer at pengutronix.de  Thu Jul 19 10:08:34 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 16:08:34 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own
 section
In-Reply-To: <5007E38B.8040106@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
 <5007E38B.8040106@pengutronix.de>
Message-ID: <20120719140834.GY30009@pengutronix.de>

On Thu, Jul 19, 2012 at 12:38:03PM +0200, Marc Kleine-Budde wrote:
> On 07/19/2012 10:13 AM, Sascha Hauer wrote:
> > To let the linker remove unused functions.
> > 
> > Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> > ---
> >  arch/arm/cpu/cache-armv4.S      |    7 ++++++-
> >  arch/arm/cpu/cache-armv5.S      |    7 ++++++-
> >  arch/arm/cpu/cache-armv6.S      |   11 +++++++++--
> >  arch/arm/cpu/cache-armv7.S      |    8 ++++++--
> >  arch/arm/lib/ashldi3.S          |    1 +
> >  arch/arm/lib/ashrdi3.S          |    1 +
> >  arch/arm/lib/findbit.S          |    9 +++++++++
> >  arch/arm/lib/io-writesw-armv4.S |    2 ++
> >  arch/arm/lib/lib1funcs.S        |    7 +++++++
> >  arch/arm/lib/lshrdi3.S          |    1 +
> >  10 files changed, 48 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/arm/cpu/cache-armv4.S b/arch/arm/cpu/cache-armv4.S
> > index 6d03565..2231eee 100644
> > --- a/arch/arm/cpu/cache-armv4.S
> > +++ b/arch/arm/cpu/cache-armv4.S
> > @@ -3,6 +3,7 @@
> >  
> >  #define CACHE_DLINESIZE 32
> >  
> > +.section .text.__mmu_cache_on
> >  ENTRY(__mmu_cache_on)
> 
> Is it possible to add the section to the ENTRY macro?

I'm not sure. I was pretty sure that some assembly functions fall
through to the next function. I cannot find any examples though.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Thu Jul 19 10:10:42 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 19 Jul 2012 16:10:42 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120719141042.GD22657@game.jcrosoft.org>

On 10:13 Thu 19 Jul     , Sascha Hauer wrote:
> This allows for creating a lzo compressed binary. This is done by
> linking barebox twice using two linker scripts. One is the regular
> uncompressed binary but without the lowlevel init stuff. The
> other contains the lowlevel init stuff, the decompressor and the
> compressed binary.
> 
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>  Makefile                              |   31 +++++++++++++-
>  arch/arm/Kconfig                      |    1 +
>  arch/arm/Makefile                     |    1 +
>  arch/arm/cpu/start.c                  |   73 +++++++++++++++++++++++++++++++--
>  arch/arm/lib/Makefile                 |    1 +
>  arch/arm/lib/barebox-compressed.lds.S |   71 ++++++++++++++++++++++++++++++++
>  arch/arm/lib/barebox.lds.S            |    3 +-
>  common/Kconfig                        |   12 ++++++
>  include/asm-generic/memory_layout.h   |    2 +
>  lib/vsprintf.c                        |   25 ++++++++++-
>  piggy.lzo.S                           |    6 +++
>  11 files changed, 220 insertions(+), 6 deletions(-)
>  create mode 100644 arch/arm/lib/barebox-compressed.lds.S
>  create mode 100644 piggy.lzo.S
> 
> diff --git a/Makefile b/Makefile
> index ebcf9bf..3ade6cc 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -512,6 +512,7 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
>  barebox-common := $(common-y)
>  barebox-all    := $(barebox-common)
>  barebox-lds    := $(lds-y)
> +barebox-compressed-lds    := $(lds-compressed-y)
>  
>  # Rule to link barebox
>  # May be overridden by arch/$(ARCH)/Makefile
> @@ -667,6 +668,7 @@ quiet_cmd_objcopy = OBJCOPY $@
>        cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
>  
>  OBJCOPYFLAGS_barebox.bin = -O binary
> +OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
>  
>  barebox.bin: barebox FORCE
>  	$(call if_changed,objcopy)
> @@ -700,13 +702,39 @@ quiet_cmd_disasm = DISASM  $@
>  
>  barebox.S: barebox FORCE
>  	$(call if_changed,disasm)
> +barebox-uncompressed.S: barebox-uncompressed FORCE
> +	$(call if_changed,disasm)
>  endif
>  
>  # barebox image
> +barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
> +	$(call barebox-modpost)
> +	$(call if_changed_rule,barebox__)
> +	$(Q)rm -f .old_version
> +
> +barebox-uncompressed.bin: barebox-uncompressed
> +	$(call if_changed,objcopy)
> +
> +barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
> +	@echo "  LZO    " $@
> +	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
> +
> +piggy.lzo.o: barebox-uncompressed.bin.lzo piggy.lzo.S
> +	@echo "  CC     " $@
> +	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c piggy.lzo.S -o $@
> +
> +ifdef CONFIG_IMAGE_COMPRESSION_LZO
> +barebox: piggy.lzo.o
> +	@echo "  LD     " $@
> +	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
> +		-T $(barebox-compressed-lds) $(barebox-compressed) \
> +		--start-group $(barebox-common) piggy.lzo.o --end-group
> +else
>  barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
>  	$(call barebox-modpost)
>  	$(call if_changed_rule,barebox__)
>  	$(Q)rm -f .old_version
> +endif
>  
>  barebox.srec: barebox
>  	$(OBJCOPY) -O srec $< $@
> @@ -1004,7 +1032,8 @@ CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
>                  .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
>  		.tmp_kallsyms* barebox_default_env* barebox.ldr \
>  		scripts/bareboxenv-target \
> -		Doxyfile.version barebox.srec barebox.s5p
> +		Doxyfile.version barebox.srec barebox.s5p \
> +		barebox-uncompressed barebox-uncompressed.bin barebox-uncompressed.bin.lzo
>  
>  # Directories & files removed with 'make mrproper'
>  MRPROPER_DIRS  += include/config include2 usr/include
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index d988455..2396bae 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -4,6 +4,7 @@ config ARM
>  	select HAS_MODULES
>  	select HAVE_CONFIGURABLE_MEMORY_LAYOUT
>  	select HAVE_CONFIGURABLE_TEXT_BASE
> +	select HAVE_IMAGE_COMPRESSION
>  	default y
>  
>  config ARM_AMBA
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index cbbc0a0..a93c4d5 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -208,5 +208,6 @@ common-y += $(BOARD) $(MACH)
>  common-y += arch/arm/lib/ arch/arm/cpu/
>  
>  lds-y	:= arch/arm/lib/barebox.lds
> +lds-compressed-y := arch/arm/lib/barebox-compressed.lds
>  
>  CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds
> diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> index cabe4d2..f4aeefe 100644
> --- a/arch/arm/cpu/start.c
> +++ b/arch/arm/cpu/start.c
> @@ -28,16 +28,36 @@
>  #include <asm-generic/memory_layout.h>
>  #include <asm/sections.h>
>  
> +#ifdef CONFIG_IMAGE_COMPRESSION_LZO
> +void __naked __section(.text_head_entry) compressed_start(void)
> +{
> +	barebox_arm_head();
> +}
> +
> +void __naked __section(.text_entry) start(void)
can we have a have for all of the __section stuff
> +{
> +	u32 r;
> +
> +	/* Setup the stack */
> +	r = STACK_BASE + STACK_SIZE - 16;
> +	__asm__ __volatile__("mov sp, %0" : : "r"(r));
> +	/* clear bss */
> +	memset(__bss_start, 0, __bss_stop - __bss_start);
> +
> +	start_barebox();
> +}
> +#else
>  void __naked __section(.text_entry) start(void)
>  {
>  	barebox_arm_head();
>  }
> +#endif
>  
>  void __naked __section(.text_exceptions) exception_vectors(void)
>  {
>  	__asm__ __volatile__ (
>  		".arm\n"
> -		"b reset\n"				/* reset */
> +		"1: b 1b\n"					/* reset */
>  #ifdef CONFIG_ARM_EXCEPTIONS
>  		"ldr pc, =undefined_instruction\n"	/* undefined instruction */
>  		"ldr pc, =software_interrupt\n"		/* software interrupt (SWI) */
> @@ -98,6 +118,34 @@ void __naked __bare_init reset(void)
>  	board_init_lowlevel_return();
>  }
>  
> +extern void *input_data;
> +extern void *input_data_end;
> +
> +#define STATIC static
> +#include "../../../lib/decompress_unlzo.c"
> +
> +void barebox_uncompress(void *compressed_start, unsigned int len)
> +{
> +	void (*barebox)(void);
> +
> +#ifdef CONFIG_THUMB2_BAREBOX
> +	barebox = (void *)(TEXT_BASE + 1);
> +#else
> +	barebox = (void *)TEXT_BASE;
> +#endif
I hate the ifdef please use if (IS_ENABLED(x))
> +
> +	decompress_unlzo((void *)compressed_start,
> +			len,
> +			NULL, NULL,
> +			(void *)TEXT_BASE, NULL, NULL);
> +
> +	/* flush I-cache before jumping to the uncompressed binary */
> +	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
macro or inline?
> +
> +	barebox();
> +}
> +
> +
>  /*
>   * Board code can jump here by either returning from board_init_lowlevel
>   * or by calling this function directly.
> @@ -105,7 +153,10 @@ void __naked __bare_init reset(void)
>  void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
>  {
>  	uint32_t r, addr, offset;
> -
> +#ifdef CONFIG_IMAGE_COMPRESSION_LZO
> +	uint32_t compressed_start, compressed_end, len;
> +	void (*uncompress)(void *compressed_start, unsigned int len);
> +#endif
>  	/*
>  	 * Get runtime address of this function. Do not
>  	 * put any code above this.
> @@ -130,8 +181,24 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
>  	/* flush I-cache before jumping to the copied binary */
>  	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
>  
> +#ifdef CONFIG_IMAGE_COMPRESSION_LZO
> +	compressed_start = (uint32_t)&input_data - offset;
> +	compressed_end = (uint32_t)&input_data_end - offset;
> +	len = compressed_end - compressed_start;
> +
> +	uncompress = barebox_uncompress;
> +
> +	/* call start_barebox with its absolute address */
> +	__asm__ __volatile__(
> +			"mov r0, %1\n"
> +			"mov r1, %2\n"
> +			"mov pc, %0\n"
> +			:
> +			: "r"(uncompress), "r"(compressed_start), "r"(len)
> +			: "r0", "r1");
> +#else
>  	/* call start_barebox with its absolute address */
>  	r = (unsigned int)&start_barebox;
>  	__asm__ __volatile__("mov pc, %0" : : "r"(r));
> +#endif
ifdef rrrr :(
>  }
> -
> diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> index 1eaf474..044d3e6 100644
> --- a/arch/arm/lib/Makefile
> +++ b/arch/arm/lib/Makefile
> @@ -21,3 +21,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
>  obj-$(CONFIG_ARM_UNWIND) += unwind.o
>  obj-$(CONFIG_MODULES) += module.o
>  extra-y += barebox.lds
> +extra-$(CONFIG_IMAGE_COMPRESSION_LZO) += barebox-compressed.lds
> diff --git a/arch/arm/lib/barebox-compressed.lds.S b/arch/arm/lib/barebox-compressed.lds.S
> new file mode 100644
> index 0000000..f267da9
> --- /dev/null
> +++ b/arch/arm/lib/barebox-compressed.lds.S
> @@ -0,0 +1,71 @@
> +/*
> + * (C) Copyright 2000-2004
> + * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
you can put you onw copyright
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#include <asm-generic/barebox.lds.h>
> +#include <asm-generic/memory_layout.h>
> +
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +OUTPUT_ARCH(arm)
> +ENTRY(compressed_start)
> +SECTIONS
> +{
> +	. = HEAD_TEXT_BASE;
> +
> +	PRE_IMAGE
> +
> +	. = ALIGN(4);
> +	.text      :
> +	{
> +		_stext = .;
> +		_text = .;
> +		*(.text_head_entry*)
> +		__ll_return = .;
> +		*(.text_ll_return*)
> +		__bare_init_start = .;
> +		*(.text_bare_init*)
> +		__bare_init_end = .;
> +		*(.text*)
> +	}
macro?
> +	BAREBOX_BARE_INIT_SIZE
> +
> +	. = ALIGN(4);
> +	.rodata : { *(.rodata*) }
> +
> +	_etext = .;			/* End of text and rodata section */
> +
> +	. = ALIGN(4);
> +	.piggydata : {
> +		*(.piggydata)
> +	}
> +
> +	. = ALIGN(4);
> +	.data : { *(.data*) }

ditto
> +
> +	. = ALIGN(4);
> +	__bss_start = .;
> +	.bss : { *(.bss*) }
> +	__bss_stop = .;
ditto
> +	_end = .;
> +	_barebox_image_size = __bss_start - HEAD_TEXT_BASE;
ditto
> +}
> diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
> index e0bae70..b415830 100644
> --- a/arch/arm/lib/barebox.lds.S
> +++ b/arch/arm/lib/barebox.lds.S
> @@ -31,8 +31,9 @@ SECTIONS
>  {
>  	. = TEXT_BASE;
>  
> +#ifndef CONFIG_IMAGE_COMPRESSION_LZO
>  	PRE_IMAGE
> -
> +#endif
>  	. = ALIGN(4);
>  	.text      :
>  	{
> diff --git a/common/Kconfig b/common/Kconfig
> index b776031..0e81b57 100644
> --- a/common/Kconfig
> +++ b/common/Kconfig
> @@ -93,6 +93,13 @@ config ENVIRONMENT_VARIABLES
>  
>  menu "memory layout                 "
>  
> +config HAVE_IMAGE_COMPRESSION
> +	bool
> +
> +config IMAGE_COMPRESSION_LZO
> +	depends on HAVE_IMAGE_COMPRESSION
> +	bool "lzo compressed image"
> +
>  config MMU
>  	bool "Enable MMU"
>  	help
> @@ -173,6 +180,11 @@ config MALLOC_SIZE
>  	hex
>  	default 0x400000
>  	prompt "malloc area size"
> +
> +config HEAD_TEXT_BASE
> +	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION_LZO
> +	hex
> +	prompt "HEAD_TEXT_BASE"
>  endmenu
>  
>  config BROKEN
> diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h
> index 941cd42..a5efaf0 100644
> --- a/include/asm-generic/memory_layout.h
> +++ b/include/asm-generic/memory_layout.h
> @@ -5,11 +5,13 @@
>  
>  #define MALLOC_BASE (TEXT_BASE - CONFIG_MALLOC_SIZE)
>  #define STACK_BASE (TEXT_BASE - CONFIG_MALLOC_SIZE - CONFIG_STACK_SIZE)
> +#define HEAD_TEXT_BASE (TEXT_BASE - 0x100000)
>  
>  #else
>  
>  #define STACK_BASE CONFIG_STACK_BASE
>  #define MALLOC_BASE CONFIG_MALLOC_BASE
> +#define HEAD_TEXT_BASE CONFIG_HEAD_TEXT_BASE
>  
>  #endif
>  
> diff --git a/lib/vsprintf.c b/lib/vsprintf.c
> index 17c1973..3f23bf1 100644
> --- a/lib/vsprintf.c
> +++ b/lib/vsprintf.c
> @@ -18,6 +18,7 @@
>  #include <kallsyms.h>
>  
>  #include <common.h>
> +#include <init.h>
>  #include <led.h>
>  
>  unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base)
> @@ -618,7 +619,7 @@ char *asprintf(const char *fmt, ...)
>  }
>  EXPORT_SYMBOL(asprintf);
>  
> -void __noreturn panic(const char *fmt, ...)
> +static void __noreturn __panic(const char *fmt, ...)
>  {
>  	va_list	args;
>  	va_start(args, fmt);
> @@ -637,4 +638,26 @@ void __noreturn panic(const char *fmt, ...)
>  	reset_cpu(0);
>  #endif
>  }
> +
> +static void (*panic_fn)(const char *fmt, ...);
how about have a default empty panic
> +
> +static int panic_init(void)
> +{
> +	panic_fn = __panic;
> +
> +	return 0;
> +}
> +core_initcall(panic_init);
> +
> +void __noreturn panic(const char *fmt, ...)
> +{
> +	if (panic_fn) {
so we can drop the test
> +		va_list	args;
> +		va_start(args, fmt);
> +		panic_fn(fmt, args);
> +		va_end(args);
> +	}
> +
> +	while(1);
> +}

Best Regrds,
J.


From plagnioj at jcrosoft.com  Thu Jul 19 10:13:25 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 19 Jul 2012 16:13:25 +0200
Subject: ST Chipsets support
In-Reply-To: <CAJACBZ167JjmbZdO39GMbwVFkwTEdn9RzOnH=rAB3fquenXYaw@mail.gmail.com>
References: <CAJACBZ167JjmbZdO39GMbwVFkwTEdn9RzOnH=rAB3fquenXYaw@mail.gmail.com>
Message-ID: <20120719141325.GE22657@game.jcrosoft.org>

HI,

	I've a tree somewhere but you need to wait that I've time to publish
	it

Best Regards,
J.
On 11:19 Thu 19 Jul     , Amine THADI wrote:
>  Hello,
> 
>  Is it intended to support Barebox some day on stb ST Chipsets ?
>  http://barebox.org/
> 
>  Thanks in advance,
>  Amine

> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox



From plagnioj at jcrosoft.com  Thu Jul 19 10:14:17 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 19 Jul 2012 16:14:17 +0200
Subject: [PATCH] add possibility to mark blocks as bad during write
In-Reply-To: <1342686830-30950-2-git-send-email-J.Kilb@phytec.de>
References: <1342686830-30950-1-git-send-email-J.Kilb@phytec.de>
 <1342686830-30950-2-git-send-email-J.Kilb@phytec.de>
Message-ID: <20120719141417.GF22657@game.jcrosoft.org>

On 10:33 Thu 19 Jul     , Juergen Kilb wrote:
> and update phyCARD-A-L1 defaultconfig to use this
> feature.
> 
need to be 2 patches

Best Regards,
J.


From s.hauer at pengutronix.de  Thu Jul 19 10:36:45 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 16:36:45 +0200
Subject: [PATCH] Fix compile error loady command, without loadb.
In-Reply-To: <1342698019-21374-1-git-send-email-christian.kapeller@cmotion.eu>
References: <1342698019-21374-1-git-send-email-christian.kapeller@cmotion.eu>
Message-ID: <20120719143645.GZ30009@pengutronix.de>

Hi Christian,

This is already fixed in -next.

On Thu, Jul 19, 2012 at 01:40:19PM +0200, Christian Kapeller wrote:
> The global variable ofd is needed by both loady and loadb.

btw please sign-off your patches.

Sascha

> ---
>  commands/loadb.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/commands/loadb.c b/commands/loadb.c
> index 9a697dd..50f323e 100644
> --- a/commands/loadb.c
> +++ b/commands/loadb.c
> @@ -61,10 +61,10 @@
>  #define untochar(x)	((int) (((x) - SPACE) & 0xff))
>  #define DEF_FILE	"image.bin"
>  
> -#ifdef CONFIG_CMD_LOADB
> -
>  static int ofd;			/* output file descriptor */
>  
> +#ifdef CONFIG_CMD_LOADB
> +
>  /* Size of my buffer to write to o/p file */
>  #define MAX_WRITE_BUFFER 4096	/* Write size to o/p file */
>  static char *write_buffer;	/* buffer for finalized data to write */
> -- 
> 1.7.5.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Thu Jul 19 11:08:32 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 19 Jul 2012 17:08:32 +0200
Subject: Compressed barebox image support
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120719150832.GG22657@game.jcrosoft.org>

On 10:12 Thu 19 Jul     , Sascha Hauer wrote:
> The following series allows to create a self extracting barebox image.
> This is done by linking barebox twice, once for the actual binary, but
> without lowlevel initstuff and once for the lowlevel init stuff, the
> decompressor and the compressed image.
> 
> Using lzo compression the pcm038 image shrinks from 252k to 155k. The
> series has been tested on the pcm038 second stage, first stage NAND and
> first stage NOR and also on an i.MX53 LOCO board (also in thumb2 mode)
> 
> Using compressed images currently adds to the boot time, at least on
> my slower arm9 systems. Using the MMU during decompression would help,
> but this currently isn't implemented.
> 
> I think the preparation patches should be ready for merging. The last
> patch in this series adding compression support I am not that confident
> with. Currently I am not very happy with the Makefile changes which
> somehow look like bypassing the kbuild mechanism and handcrufting
> something that looks like kbuild. If someone has ideas how to improve
> this, let me know. Nevertheless I would be happy about Tested-by
> (and does-not-work-for) tags.
> 
> Sascha
> 
> ----------------------------------------------------------------
> Sascha Hauer (9):
>       lzo: Allow for static inlining
>       ARM lds: remove unused got
>       ARM: remove board linker script option
>       ARM: remove exception vectors from boards
>       ARM startup: calculate offset instead of runtime address
>       ARM ep93xx: Get rid of special handling in linker file
>       ARM boards: Use _text rather than TEXT_BASE
>       ARM: Separate assembler functions into their own section
>       Add compressed image support

can you push it on a git?

Best Regards,
J.


From shc_work at mail.ru  Thu Jul 19 11:30:12 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Thu, 19 Jul 2012 19:30:12 +0400
Subject: [PATCH 1/6] mc13xxx: Define maximum SPI clock frequency global to
 driver
Message-ID: <1342711817-866-1-git-send-email-shc_work@mail.ru>

This patch provide setup for SPI clk frequency global to driver.
For MC13783 maximum clock frequency is 20 MHz,
for MC13892 maximum clock frequency is 26 MHz,
so we define 20 MHz as a maximum SPI clk.

Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/ccxmx51/ccxmx51.c          |    1 -
 arch/arm/boards/freescale-mx51-pdk/board.c |    1 -
 arch/arm/boards/pcm038/pcm038.c            |    1 -
 drivers/mfd/mc13xxx.c                      |    1 +
 4 files changed, 1 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c
index f494174..f309e0c 100644
--- a/arch/arm/boards/ccxmx51/ccxmx51.c
+++ b/arch/arm/boards/ccxmx51/ccxmx51.c
@@ -191,7 +191,6 @@ static struct spi_imx_master ecspi_0_data = {
 static const struct spi_board_info ccxmx51_spi_board_info[] = {
 	{
 		.name		= "mc13xxx-spi",
-		.max_speed_hz	= 6000000,
 		.bus_num	= 0,
 		.chip_select	= 0,
 	},
diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
index 3a568d0..7c2c8fe 100644
--- a/arch/arm/boards/freescale-mx51-pdk/board.c
+++ b/arch/arm/boards/freescale-mx51-pdk/board.c
@@ -117,7 +117,6 @@ static struct spi_imx_master spi_0_data = {
 static const struct spi_board_info mx51_babbage_spi_board_info[] = {
 	{
 		.name = "mc13xxx-spi",
-		.max_speed_hz = 300000,
 		.bus_num = 0,
 		.chip_select = 0,
 	},
diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index badc978..fa82b02 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -59,7 +59,6 @@ static struct spi_imx_master pcm038_spi_0_data = {
 static struct spi_board_info pcm038_spi_board_info[] = {
 	{
 		.name = "mc13xxx-spi",
-		.max_speed_hz = 3000000,
 		.bus_num = 0,
 		.chip_select = 0,
 	}
diff --git a/drivers/mfd/mc13xxx.c b/drivers/mfd/mc13xxx.c
index 2934e9d..8bb0d00 100644
--- a/drivers/mfd/mc13xxx.c
+++ b/drivers/mfd/mc13xxx.c
@@ -297,6 +297,7 @@ static int mc_probe(struct device_d *dev, enum mc13xxx_mode mode)
 		mc_dev->spi = dev->type_data;
 		mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
 		mc_dev->spi->bits_per_word = 32;
+		mc_dev->spi->max_speed_hz = 20000000;
 	}
 	mc_dev->cdev.size = 256;
 	mc_dev->cdev.dev = dev;
-- 
1.7.3.4



From shc_work at mail.ru  Thu Jul 19 11:30:13 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Thu, 19 Jul 2012 19:30:13 +0400
Subject: [PATCH 2/6] i.MX: Removed unused declaration for imx_iim_get_mac
In-Reply-To: <1342711817-866-1-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
Message-ID: <1342711817-866-2-git-send-email-shc_work@mail.ru>

Procedure is missing, so remove its declaration.

Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/mach-imx/include/mach/iim.h |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/iim.h b/arch/arm/mach-imx/include/mach/iim.h
index b97c742..ef7b25d 100644
--- a/arch/arm/mach-imx/include/mach/iim.h
+++ b/arch/arm/mach-imx/include/mach/iim.h
@@ -48,7 +48,6 @@ struct imx_iim_platform_data {
 
 #ifdef CONFIG_IMX_IIM
 int imx_iim_read(unsigned int bank, int offset, void *buf, int count);
-int imx_iim_get_mac(unsigned char *mac);
 #else
 static inline int imx_iim_read(unsigned int bank, int offset, void *buf,
 		int count)
-- 
1.7.3.4



From shc_work at mail.ru  Thu Jul 19 11:30:17 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Thu, 19 Jul 2012 19:30:17 +0400
Subject: [PATCH 6/6] PCM038: Read UID from fuses and pass this value to kernel
 as serial number
In-Reply-To: <1342711817-866-1-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
Message-ID: <1342711817-866-6-git-send-email-shc_work@mail.ru>


Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/pcm038/pcm038.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index 5b0afc3..1bdb93c 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -40,6 +40,7 @@
 #include <mach/spi.h>
 #include <mach/iomux-mx27.h>
 #include <mach/devices-imx27.h>
+#include <mach/iim.h>
 #include <mfd/mc13xxx.h>
 
 #include "pll.h"
@@ -193,6 +194,7 @@ mem_initcall(pcm038_mem_init);
 static int pcm038_devices_init(void)
 {
 	int i;
+	u64 uid;
 	char *envdev;
 
 	unsigned int mode[] = {
@@ -316,6 +318,8 @@ static int pcm038_devices_init(void)
 
 	printf("Using environment in %s Flash\n", envdev);
 
+	if (imx_iim_read(1, 1, &uid, 6) == 6)
+		armlinux_set_serial(uid);
 	armlinux_set_bootparams((void *)0xa0000100);
 	armlinux_set_architecture(MACH_TYPE_PCM038);
 
-- 
1.7.3.4



From shc_work at mail.ru  Thu Jul 19 11:30:14 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Thu, 19 Jul 2012 19:30:14 +0400
Subject: [PATCH 3/6] mc13xxx: Added dummy definition for mc13xxx_get() if
 CONFIG_MFD_MC13XXX is not set
In-Reply-To: <1342711817-866-1-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
Message-ID: <1342711817-866-3-git-send-email-shc_work@mail.ru>


Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/pcm038/pcm038.c |    2 --
 include/mfd/mc13xxx.h           |    4 ++++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index fa82b02..875081b 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -124,7 +124,6 @@ static inline uint32_t get_pll_spctl10(void)
  */
 static int pcm038_power_init(void)
 {
-#ifdef CONFIG_MFD_MC13XXX
 	uint32_t spctl0 = get_pll_spctl10();
 	struct mc13xxx *mc13xxx = mc13xxx_get();
 
@@ -158,7 +157,6 @@ static int pcm038_power_init(void)
 			printf("Failed to initialize PMIC. Will continue with low CPU speed\n");
 		}
 	}
-#endif
 
 	/* clock gating enable */
 	GPCR = 0x00050f08;
diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h
index 2880307..51cfdd9 100644
--- a/include/mfd/mc13xxx.h
+++ b/include/mfd/mc13xxx.h
@@ -163,7 +163,11 @@ struct mc13xxx {
 	int			revision;
 };
 
+#ifdef CONFIG_MFD_MC13XXX
 extern struct mc13xxx *mc13xxx_get(void);
+#else
+#define mc13xxx_get()		(NULL)
+#endif
 
 extern int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val);
 extern int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val);
-- 
1.7.3.4



From shc_work at mail.ru  Thu Jul 19 11:30:15 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Thu, 19 Jul 2012 19:30:15 +0400
Subject: [PATCH 4/6] tx51: Unused mc13xxx.h include removed
In-Reply-To: <1342711817-866-1-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
Message-ID: <1342711817-866-4-git-send-email-shc_work@mail.ru>


Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/karo-tx51/tx51.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/karo-tx51/tx51.c b/arch/arm/boards/karo-tx51/tx51.c
index 096683a..5adaaa6 100644
--- a/arch/arm/boards/karo-tx51/tx51.c
+++ b/arch/arm/boards/karo-tx51/tx51.c
@@ -32,7 +32,6 @@
 #include <fcntl.h>
 #include <nand.h>
 #include <spi/spi.h>
-#include <mfd/mc13xxx.h>
 #include <io.h>
 #include <asm/mmu.h>
 #include <mach/imx5.h>
-- 
1.7.3.4



From shc_work at mail.ru  Thu Jul 19 11:30:16 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Thu, 19 Jul 2012 19:30:16 +0400
Subject: [PATCH 5/6] PCM970: Add MMC support
In-Reply-To: <1342711817-866-1-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
Message-ID: <1342711817-866-5-git-send-email-shc_work@mail.ru>

Here is a test output:

barebox 2012.07.0-00136-ge3ab4bc-dirty #23 Tue Jul 3 23:10:44 MSK 2012
Board: Phytec phyCORE-i.MX27
mc13xxx-spi at mc13xxx-spi0: Found MC13783 ID: 0x00009b [Rev: 3.1]
cfi_flash at cfi_flash0: found cfi flash at c0000000, size 33554432
NAND device: Manufacturer ID: 0x20, Chip ID: 0x36 (ST Micro NAND 64MiB 1,8V 8-bit)
Bad block table found at page 131040, version 0x01
Bad block table found at page 131008, version 0x01
imxfb at imxfb0: i.MX Framebuffer driver
cfi_protect: protect 0xc0080000 (size 1048576)
Using environment in NOR Flash
Found NXP ISP150x ULPI transceiver (0x04cc:0x1504).
ehci at ehci0: USB EHCI 1.00
imx-mmc at mci0: registered as mci0
Malloc space: 0xa6f00000 -> 0xa7efffff (size 16 MB)
Stack space : 0xa6ef8000 -> 0xa6f00000 (size 32 kB)
running /env/bin/init...

Hit m for menu or any other key to stop autoboot:  3

type exit to get to the menu
barebox at Phytec phyCORE-i.MX27:/ mci0.probe=1
mci at mci0: registered disk0
barebox at Phytec phyCORE-i.MX27:/ devinfo mci0
resources:
driver: mci

 Card:
 Attached is an SD Card (Version: 1.10)
 Capacity: 1962 MiB
  CID: 1C535653-44432020-1000013C-7E007200
  CSD: 005E0032-5F5A83D5-2DB7FFBF-96800000
 Max. transfer speed: 25000000 Hz
 Manufacturer ID: 1C
 OEM/Application ID: 5356
 Product name: 'SDC  '
 Product revision: 1.0
 Serial no: 81022
 Manufacturing date: 2.2007
 Parameters:
            probe = 1
barebox at Phytec phyCORE-i.MX27:/ mkdir /d
barebox at Phytec phyCORE-i.MX27:/ mount /dev/disk0.0 fat /d
barebox at Phytec phyCORE-i.MX27:/ ls /d
barebox.bin
barebox at Phytec phyCORE-i.MX27:/

Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/pcm038/pcm038.c |   16 ++++++++++++++++
 arch/arm/boards/pcm038/pcm970.c |   24 ++++++++++++++++++++++++
 2 files changed, 40 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index 875081b..5b0afc3 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -145,6 +145,22 @@ static int pcm038_power_init(void)
 				MC13783_SW1B_SOFTSTART |
 				MC13783_SW_PLL_FACTOR(32));
 
+			/* Setup VMMC voltage */
+			if (IS_ENABLED(CONFIG_MCI_IMX)) {
+				u32 val;
+
+				mc13xxx_reg_read(mc13xxx, MC13783_REG_REG_SETTING(1), &val);
+				/* VMMC1 = 3.00 V */
+				val &= ~(7 << 6);
+				val |= 6 << 6;
+				mc13xxx_reg_write(mc13xxx, MC13783_REG_REG_SETTING(1), val);
+
+				mc13xxx_reg_read(mc13xxx, MC13783_REG_REG_MODE(1), &val);
+				/* Enable VMMC1 */
+				val |= 1 << 18;
+				mc13xxx_reg_write(mc13xxx, MC13783_REG_REG_MODE(1), val);
+			}
+
 			/* wait for required power level to run the CPU at 400 MHz */
 			udelay(100000);
 			CSCR = CSCR_VAL_FINAL;
diff --git a/arch/arm/boards/pcm038/pcm970.c b/arch/arm/boards/pcm038/pcm970.c
index df9b852..b956482 100644
--- a/arch/arm/boards/pcm038/pcm970.c
+++ b/arch/arm/boards/pcm038/pcm970.c
@@ -23,6 +23,7 @@
 #include <mach/imx-regs.h>
 #include <mach/iomux-mx27.h>
 #include <mach/gpio.h>
+#include <mach/devices-imx27.h>
 #include <usb/ulpi.h>
 
 #define GPIO_IDE_POWER	(GPIO_PORTE + 18)
@@ -148,6 +149,26 @@ static void pcm970_ide_init(void)
 }
 #endif
 
+static void pcm970_mmc_init(void)
+{
+	uint32_t i;
+	unsigned int mode[] = {
+		/* SD2 */
+		PB4_PF_SD2_D0,
+		PB5_PF_SD2_D1,
+		PB6_PF_SD2_D2,
+		PB7_PF_SD2_D3,
+		PB8_PF_SD2_CMD,
+		PB9_PF_SD2_CLK,
+	};
+
+	for (i = 0; i < ARRAY_SIZE(mode); i++)
+		imx_gpio_mode(mode[i]);
+
+	PCCR0 |= PCCR0_SDHC2_EN;
+	imx27_add_mmc1(NULL);
+}
+
 static int pcm970_init(void)
 {
 	int i;
@@ -181,6 +202,9 @@ static int pcm970_init(void)
 	pcm970_ide_init();
 #endif
 
+	if (IS_ENABLED(CONFIG_MCI_IMX))
+		pcm970_mmc_init();
+
 	return 0;
 }
 
-- 
1.7.3.4



From jkirk865 at gmail.com  Thu Jul 19 11:37:47 2012
From: jkirk865 at gmail.com (Jerry Kirk)
Date: Thu, 19 Jul 2012 15:37:47 +0000 (UTC)
Subject: USB On PCM043?
Message-ID: <loom.20120719T173418-826@post.gmane.org>

We have been attempting to get USB Host mode working under Barebox(2012-07-0) on 
a PCM043 platform (i.mx35), but we are having a bit of trouble.

We have  merged the CONFIG_USB specific code for "imx35_devices_init" and 
"imx35_usb_init" from the Eukrea platform into pcm043.c, added the 
"MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR" and "MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC" 
pad definitions (as per the main kernel pcm043.c file), added the "tmp |= 0x3 << 
CCM_CGR2_USB_SHIFT" to enable the USB clock to "pcm043_core_setup", built 
everything with the "usb" command enabled, and then loaded the new Barebox image 
into our pcm043 board. We have USB_EHCI and USB_STORAGE enabled in the Barebox 
config.

If I execute the "usb" command then it returns that it has found 1 EHCI 
controller. If I plug in any device, the only one it has EVER detected has been 
a USB mouse. It will be detected most of the time following a reset and after 
unplugging/replugging the mouse -- but will never be detected again after this 
unless I do a reset/replug operation (and never on a "usb -f" forced redetect).

Basically, our goal is to get USB flash drives working for use as a means of 
upgrading our Linux kernel in the field -- but right now it won't even EVER 
recognize a USB flash drive when it is plugged into the unit. We also know it is 
not a hardware problem as all USB devices work just fine once the full kernel 
finishes booting.

>From what we have read, it looks like the Eukrea platform had USB working in it, 
and we have attempted to use it as a guide, but we still aren't having any luck.

Does anyone know of any steps we might be missing? Or of anyone who has gotten 
USB host mode working on a pcm043 under Barebox before?

I think we are close, but something (obviously) still isn't right.




From s.hauer at pengutronix.de  Thu Jul 19 12:05:52 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 18:05:52 +0200
Subject: Compressed barebox image support
In-Reply-To: <20120719150832.GG22657@game.jcrosoft.org>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <20120719150832.GG22657@game.jcrosoft.org>
Message-ID: <20120719160552.GA30009@pengutronix.de>

On Thu, Jul 19, 2012 at 05:08:32PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 10:12 Thu 19 Jul     , Sascha Hauer wrote:
> > The following series allows to create a self extracting barebox image.
> > This is done by linking barebox twice, once for the actual binary, but
> > without lowlevel initstuff and once for the lowlevel init stuff, the
> > decompressor and the compressed image.
> > 
> > Using lzo compression the pcm038 image shrinks from 252k to 155k. The
> > series has been tested on the pcm038 second stage, first stage NAND and
> > first stage NOR and also on an i.MX53 LOCO board (also in thumb2 mode)
> > 
> > Using compressed images currently adds to the boot time, at least on
> > my slower arm9 systems. Using the MMU during decompression would help,
> > but this currently isn't implemented.
> > 
> > I think the preparation patches should be ready for merging. The last
> > patch in this series adding compression support I am not that confident
> > with. Currently I am not very happy with the Makefile changes which
> > somehow look like bypassing the kbuild mechanism and handcrufting
> > something that looks like kbuild. If someone has ideas how to improve
> > this, let me know. Nevertheless I would be happy about Tested-by
> > (and does-not-work-for) tags.
> > 
> > Sascha
> > 
> > ----------------------------------------------------------------
> > Sascha Hauer (9):
> >       lzo: Allow for static inlining
> >       ARM lds: remove unused got
> >       ARM: remove board linker script option
> >       ARM: remove exception vectors from boards
> >       ARM startup: calculate offset instead of runtime address
> >       ARM ep93xx: Get rid of special handling in linker file
> >       ARM boards: Use _text rather than TEXT_BASE
> >       ARM: Separate assembler functions into their own section
> >       Add compressed image support
> 
> can you push it on a git?

Here you are. I partly integrated your comments already.

Sascha

The following changes since commit 2f6b1f7690640f571f8e72fc2f2564acb2e13778:

  ARM/MXS: the GPIO bitkeeper enable logic is inverse to the pullup enable logic (2012-07-16 23:30:14 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/barebox.git work/compressed-image

for you to fetch changes up to af1de0f86036ab8cb8f4a434708a31db21b33de2:

  Add compressed image support (2012-07-19 18:02:02 +0200)

----------------------------------------------------------------
Sascha Hauer (9):
      lzo: Allow for static inlining
      ARM lds: remove unused got
      ARM: remove board linker script option
      ARM: remove exception vectors from boards
      ARM startup: calculate offset instead of runtime address
      ARM ep93xx: Get rid of special handling in linker file
      ARM boards: Use _text rather than TEXT_BASE
      ARM: Separate assembler functions into their own section
      Add compressed image support

 Makefile                                           |   31 ++++++-
 arch/arm/Kconfig                                   |   13 +--
 arch/arm/Makefile                                  |    4 +-
 arch/arm/boards/a9m2410/a9m2410.c                  |    3 +-
 arch/arm/boards/a9m2440/a9m2440.c                  |    3 +-
 arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c  |    7 +-
 arch/arm/boards/eukrea_cpuimx25/lowlevel.c         |    4 +-
 arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c  |    4 +-
 arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S    |   11 +--
 arch/arm/boards/eukrea_cpuimx35/flash_header.c     |    2 -
 arch/arm/boards/eukrea_cpuimx35/lowlevel.c         |    4 +-
 arch/arm/boards/freescale-mx25-3-stack/3stack.c    |    8 +-
 .../boards/freescale-mx25-3-stack/lowlevel_init.S  |   11 +--
 arch/arm/boards/freescale-mx35-3-stack/3stack.c    |    4 +-
 .../boards/freescale-mx35-3-stack/flash_header.c   |    4 +-
 .../boards/freescale-mx35-3-stack/lowlevel_init.S  |   11 +--
 arch/arm/boards/freescale-mx53-loco/flash_header.c |    2 +-
 arch/arm/boards/freescale-mx53-smd/flash_header.c  |    2 +-
 arch/arm/boards/freescale-mx6-arm2/flash_header.c  |    5 +-
 arch/arm/boards/guf-cupid/lowlevel.c               |    4 +-
 arch/arm/boards/guf-neso/lowlevel.c                |    4 +-
 arch/arm/boards/imx21ads/imx21ads.c                |    4 +-
 arch/arm/boards/imx21ads/lowlevel_init.S           |   10 +--
 arch/arm/boards/karo-tx25/board.c                  |    3 +-
 arch/arm/boards/karo-tx25/lowlevel.c               |    4 +-
 arch/arm/boards/karo-tx51/flash_header.c           |    2 +-
 arch/arm/boards/mini2440/mini2440.c                |    3 +-
 arch/arm/boards/pcm037/lowlevel_init.S             |    7 +-
 arch/arm/boards/pcm037/pcm037.c                    |    4 +-
 arch/arm/boards/pcm038/lowlevel.c                  |    4 +-
 arch/arm/boards/pcm043/lowlevel.c                  |    4 +-
 arch/arm/boards/phycard-i.MX27/lowlevel_init.S     |    8 +-
 arch/arm/boards/phycard-i.MX27/pca100.c            |    2 +-
 arch/arm/boards/tqma53/flash_header.c              |    5 +-
 arch/arm/cpu/cache-armv4.S                         |    7 +-
 arch/arm/cpu/cache-armv5.S                         |    7 +-
 arch/arm/cpu/cache-armv6.S                         |   11 ++-
 arch/arm/cpu/cache-armv7.S                         |    8 +-
 arch/arm/cpu/start.c                               |   87 +++++++++++++++++---
 arch/arm/lib/Makefile                              |    4 +-
 arch/arm/lib/ashldi3.S                             |    1 +
 arch/arm/lib/ashrdi3.S                             |    1 +
 arch/arm/lib/barebox-compressed.lds.S              |   70 ++++++++++++++++
 arch/arm/lib/barebox.lds.S                         |   11 +--
 arch/arm/lib/findbit.S                             |    9 ++
 arch/arm/lib/io-writesw-armv4.S                    |    2 +
 arch/arm/lib/lib1funcs.S                           |    7 ++
 arch/arm/lib/lshrdi3.S                             |    1 +
 arch/arm/mach-ep93xx/Makefile                      |    2 +-
 arch/arm/mach-ep93xx/header.c                      |    8 ++
 arch/arm/mach-ep93xx/include/mach/barebox.lds.h    |    9 ++
 common/Kconfig                                     |   12 +++
 include/asm-generic/barebox.lds.h                  |    3 +-
 include/asm-generic/memory_layout.h                |    2 +
 include/lzo.h                                      |    8 +-
 lib/decompress_unlzo.c                             |    9 +-
 lib/lzo/lzo1x_decompress.c                         |    2 +-
 lib/vsprintf.c                                     |    2 +-
 piggy.lzo.S                                        |    6 ++
 59 files changed, 358 insertions(+), 132 deletions(-)
 create mode 100644 arch/arm/lib/barebox-compressed.lds.S
 create mode 100644 arch/arm/mach-ep93xx/header.c
 create mode 100644 arch/arm/mach-ep93xx/include/mach/barebox.lds.h
 create mode 100644 piggy.lzo.S
-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul 19 12:11:39 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 18:11:39 +0200
Subject: USB On PCM043?
In-Reply-To: <loom.20120719T173418-826@post.gmane.org>
References: <loom.20120719T173418-826@post.gmane.org>
Message-ID: <20120719161139.GB30009@pengutronix.de>

On Thu, Jul 19, 2012 at 03:37:47PM +0000, Jerry Kirk wrote:
> We have been attempting to get USB Host mode working under Barebox(2012-07-0) on 
> a PCM043 platform (i.mx35), but we are having a bit of trouble.
> 
> We have  merged the CONFIG_USB specific code for "imx35_devices_init" and 
> "imx35_usb_init" from the Eukrea platform into pcm043.c, added the 
> "MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR" and "MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC" 
> pad definitions (as per the main kernel pcm043.c file), added the "tmp |= 0x3 << 
> CCM_CGR2_USB_SHIFT" to enable the USB clock to "pcm043_core_setup", built 
> everything with the "usb" command enabled, and then loaded the new Barebox image 
> into our pcm043 board. We have USB_EHCI and USB_STORAGE enabled in the Barebox 
> config.
> 
> If I execute the "usb" command then it returns that it has found 1 EHCI 
> controller. If I plug in any device, the only one it has EVER detected has been 
> a USB mouse. It will be detected most of the time following a reset and after 
> unplugging/replugging the mouse -- but will never be detected again after this 
> unless I do a reset/replug operation (and never on a "usb -f" forced redetect).
> 
> Basically, our goal is to get USB flash drives working for use as a means of 
> upgrading our Linux kernel in the field -- but right now it won't even EVER 
> recognize a USB flash drive when it is plugged into the unit. We also know it is 
> not a hardware problem as all USB devices work just fine once the full kernel 
> finishes booting.
> 
> From what we have read, it looks like the Eukrea platform had USB working in it, 
> and we have attempted to use it as a guide, but we still aren't having any luck.
> 
> Does anyone know of any steps we might be missing? Or of anyone who has gotten 
> USB host mode working on a pcm043 under Barebox before?
> 
> I think we are close, but something (obviously) still isn't right.

Could it be that the USB clock operates at the wrong rate? I think it
should be 60MHz.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From js at sig21.net  Thu Jul 19 13:08:45 2012
From: js at sig21.net (Johannes Stezenbach)
Date: Thu, 19 Jul 2012 19:08:45 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120719170845.GA3303@sig21.net>

Hi,

On Thu, Jul 19, 2012 at 10:13:02AM +0200, Sascha Hauer wrote:
> --- a/Makefile
> +++ b/Makefile
...
> +ifdef CONFIG_IMAGE_COMPRESSION_LZO
> +barebox: piggy.lzo.o
> +	@echo "  LD     " $@
> +	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
> +		-T $(barebox-compressed-lds) $(barebox-compressed) \
> +		--start-group $(barebox-common) piggy.lzo.o --end-group
> +else

Where is barebox-compressed set?

I tried it and it fails to link:

  LD      arch/arm/lib/built-in.o
  LD      barebox-uncompressed
  SYSMAP  System.map
  OBJCOPY barebox-uncompressed.bin
  LZO     barebox-uncompressed.bin.lzo
  CC      piggy.lzo.o
  LD      barebox
common/built-in.o: In function `start_barebox':
.../barebox/common/startup.c:154: undefined reference to `__barebox_initcalls_start'
.../barebox/common/startup.c:154: undefined reference to `__barebox_initcalls_end'

$ make V=1
...
  LD      barebox
arm-linux-ld -EL  -Map barebox.map -static --gc-sections -o barebox \
                -T arch/arm/lib/barebox-compressed.lds  \
                --start-group  common/built-in.o  drivers/built-in.o  commands/built-in.o  lib/built-in.o  crypto/built-in.o  net/built-in.o  fs/built-in.o  arch/arm/boards/foo/built-in.o  arch/arm/mach-foo/built-in.o  arch/arm/lib/built-in.o  arch/arm/cpu/built-in.o piggy.lzo.o --end-group


It shouldn't link all the -built-in.o into the uncompressor, should it?
Or is it supposed to work via --gc-sections trick?


Thanks,
Johannes


From s.hauer at pengutronix.de  Thu Jul 19 13:41:25 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 19:41:25 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <20120719170845.GA3303@sig21.net>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
 <20120719170845.GA3303@sig21.net>
Message-ID: <20120719174125.GC30009@pengutronix.de>

On Thu, Jul 19, 2012 at 07:08:45PM +0200, Johannes Stezenbach wrote:
> Hi,
> 
> On Thu, Jul 19, 2012 at 10:13:02AM +0200, Sascha Hauer wrote:
> > --- a/Makefile
> > +++ b/Makefile
> ...
> > +ifdef CONFIG_IMAGE_COMPRESSION_LZO
> > +barebox: piggy.lzo.o
> > +	@echo "  LD     " $@
> > +	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
> > +		-T $(barebox-compressed-lds) $(barebox-compressed) \
> > +		--start-group $(barebox-common) piggy.lzo.o --end-group
> > +else
> 
> Where is barebox-compressed set?
> 
> I tried it and it fails to link:
> 
>   LD      arch/arm/lib/built-in.o
>   LD      barebox-uncompressed
>   SYSMAP  System.map
>   OBJCOPY barebox-uncompressed.bin
>   LZO     barebox-uncompressed.bin.lzo
>   CC      piggy.lzo.o
>   LD      barebox
> common/built-in.o: In function `start_barebox':
> .../barebox/common/startup.c:154: undefined reference to `__barebox_initcalls_start'
> .../barebox/common/startup.c:154: undefined reference to `__barebox_initcalls_end'
> 
> $ make V=1
> ...
>   LD      barebox
> arm-linux-ld -EL  -Map barebox.map -static --gc-sections -o barebox \
>                 -T arch/arm/lib/barebox-compressed.lds  \
>                 --start-group  common/built-in.o  drivers/built-in.o  commands/built-in.o  lib/built-in.o  crypto/built-in.o  net/built-in.o  fs/built-in.o  arch/arm/boards/foo/built-in.o  arch/arm/mach-foo/built-in.o  arch/arm/lib/built-in.o  arch/arm/cpu/built-in.o piggy.lzo.o --end-group
> 
> 
> It shouldn't link all the -built-in.o into the uncompressor, should it?
> Or is it supposed to work via --gc-sections trick?

Yes, it works using --gc-sections. Are you building a defconfig or a
custom one? If the error above is correct start_barebox is referenced
from the decompressor code. This should not happen.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul 19 13:55:12 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 19:55:12 +0200
Subject: [PATCH 1/6] mc13xxx: Define maximum SPI clock frequency global
 to driver
In-Reply-To: <1342711817-866-1-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
Message-ID: <20120719175512.GD30009@pengutronix.de>

On Thu, Jul 19, 2012 at 07:30:12PM +0400, Alexander Shiyan wrote:
> This patch provide setup for SPI clk frequency global to driver.
> For MC13783 maximum clock frequency is 20 MHz,
> for MC13892 maximum clock frequency is 26 MHz,
> so we define 20 MHz as a maximum SPI clk.
> 
> Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
> ---
>  arch/arm/boards/ccxmx51/ccxmx51.c          |    1 -
>  arch/arm/boards/freescale-mx51-pdk/board.c |    1 -
>  arch/arm/boards/pcm038/pcm038.c            |    1 -
>  drivers/mfd/mc13xxx.c                      |    1 +
>  4 files changed, 1 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c
> index f494174..f309e0c 100644
> --- a/arch/arm/boards/ccxmx51/ccxmx51.c
> +++ b/arch/arm/boards/ccxmx51/ccxmx51.c
> @@ -191,7 +191,6 @@ static struct spi_imx_master ecspi_0_data = {
>  static const struct spi_board_info ccxmx51_spi_board_info[] = {
>  	{
>  		.name		= "mc13xxx-spi",
> -		.max_speed_hz	= 6000000,
>  		.bus_num	= 0,
>  		.chip_select	= 0,
>  	},
> diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
> index 3a568d0..7c2c8fe 100644
> --- a/arch/arm/boards/freescale-mx51-pdk/board.c
> +++ b/arch/arm/boards/freescale-mx51-pdk/board.c
> @@ -117,7 +117,6 @@ static struct spi_imx_master spi_0_data = {
>  static const struct spi_board_info mx51_babbage_spi_board_info[] = {
>  	{
>  		.name = "mc13xxx-spi",
> -		.max_speed_hz = 300000,
>  		.bus_num = 0,
>  		.chip_select = 0,
>  	},
> diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
> index badc978..fa82b02 100644
> --- a/arch/arm/boards/pcm038/pcm038.c
> +++ b/arch/arm/boards/pcm038/pcm038.c
> @@ -59,7 +59,6 @@ static struct spi_imx_master pcm038_spi_0_data = {
>  static struct spi_board_info pcm038_spi_board_info[] = {
>  	{
>  		.name = "mc13xxx-spi",
> -		.max_speed_hz = 3000000,
>  		.bus_num = 0,
>  		.chip_select = 0,
>  	}
> diff --git a/drivers/mfd/mc13xxx.c b/drivers/mfd/mc13xxx.c
> index 2934e9d..8bb0d00 100644
> --- a/drivers/mfd/mc13xxx.c
> +++ b/drivers/mfd/mc13xxx.c
> @@ -297,6 +297,7 @@ static int mc_probe(struct device_d *dev, enum mc13xxx_mode mode)
>  		mc_dev->spi = dev->type_data;
>  		mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
>  		mc_dev->spi->bits_per_word = 32;
> +		mc_dev->spi->max_speed_hz = 20000000;

The values indeed look quite arbitrary, but it may be that a hardware
design does not support such high frequencies. Maybe better

		if (!mc_dev->spi->max_speed_hz)
			mc_dev->spi->max_speed_hz = 20000000

?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul 19 13:56:06 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 19:56:06 +0200
Subject: [PATCH 3/6] mc13xxx: Added dummy definition for mc13xxx_get() if
 CONFIG_MFD_MC13XXX is not set
In-Reply-To: <1342711817-866-3-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
 <1342711817-866-3-git-send-email-shc_work@mail.ru>
Message-ID: <20120719175606.GE30009@pengutronix.de>

On Thu, Jul 19, 2012 at 07:30:14PM +0400, Alexander Shiyan wrote:
> 
> Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
> ---
>  arch/arm/boards/pcm038/pcm038.c |    2 --
>  include/mfd/mc13xxx.h           |    4 ++++
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
> index fa82b02..875081b 100644
> --- a/arch/arm/boards/pcm038/pcm038.c
> +++ b/arch/arm/boards/pcm038/pcm038.c
> @@ -124,7 +124,6 @@ static inline uint32_t get_pll_spctl10(void)
>   */
>  static int pcm038_power_init(void)
>  {
> -#ifdef CONFIG_MFD_MC13XXX
>  	uint32_t spctl0 = get_pll_spctl10();
>  	struct mc13xxx *mc13xxx = mc13xxx_get();
>  
> @@ -158,7 +157,6 @@ static int pcm038_power_init(void)
>  			printf("Failed to initialize PMIC. Will continue with low CPU speed\n");
>  		}
>  	}
> -#endif
>  
>  	/* clock gating enable */
>  	GPCR = 0x00050f08;
> diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h
> index 2880307..51cfdd9 100644
> --- a/include/mfd/mc13xxx.h
> +++ b/include/mfd/mc13xxx.h
> @@ -163,7 +163,11 @@ struct mc13xxx {
>  	int			revision;
>  };
>  
> +#ifdef CONFIG_MFD_MC13XXX
>  extern struct mc13xxx *mc13xxx_get(void);
> +#else
> +#define mc13xxx_get()		(NULL)

Better a static inline function.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From j.kilb at phytec.de  Thu Jul 19 14:04:09 2012
From: j.kilb at phytec.de (=?ISO-8859-15?Q?J=FCrgen_Kilb?=)
Date: Thu, 19 Jul 2012 20:04:09 +0200
Subject: [PATCH] pca-a-l1: added memory device for int. 60kB RAM.
In-Reply-To: <20120719131024.GX30009@pengutronix.de>
References: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
 <1342616327-2765-3-git-send-email-J.Kilb@phytec.de>
 <20120719131024.GX30009@pengutronix.de>
Message-ID: <50084C19.8070909@phytec.de>

Hi Sascha,

On 19.07.2012 15:10, Sascha Hauer wrote:
> Hi J?rgen,
>
> On Wed, Jul 18, 2012 at 02:58:46PM +0200, Juergen Kilb wrote:
>> Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
>> ---
>>   arch/arm/boards/phycard-a-l1/pca-a-l1.c         |    2 ++
>>   arch/arm/mach-omap/include/mach/omap3-silicon.h |    1 +
>>   2 files changed, 3 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
>> index 1cc2815..8fae405 100644
>> --- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
>> +++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
>> @@ -292,6 +292,8 @@ static int pcaal1_mem_init(void)
>>   	 */
>>   	gpmc_generic_init(0x10);
>>   #endif
>> +	add_mem_device("sram0", OMAP_SRAM_BASE, 60 * SZ_1K,
>> +				   IORESOURCE_MEM_WRITEABLE);
> Isn't this 64K? Or does the ROM code store stuff in the upper 4k which
> you want to preserve?
Yes it is a 64K memory range but it is splitted into 5 regions and they are
used during the booting process.

0x4020_0000 - 0x4020_EFFF => Used for storing a downloaded booting image
0x4020_F000 - 0x4020_FCAF => Public Stack (reserved for stacks)
0x4020_FCB0 - 0x4020_FFC7 => Tracing Data
0x4020_FFC8 - 0x4020_FFFF => RAM exception Vectors

We can increase the size to 0xFCB0 but I think it's better to use only 60K.
At least the tracing vectors should be preserved.
> Sascha
>
J?rgen



From s.hauer at pengutronix.de  Thu Jul 19 14:12:52 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 20:12:52 +0200
Subject: [PATCH 6/6] PCM038: Read UID from fuses and pass this value to
 kernel as serial number
In-Reply-To: <1342711817-866-6-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
 <1342711817-866-6-git-send-email-shc_work@mail.ru>
Message-ID: <20120719181252.GF30009@pengutronix.de>

On Thu, Jul 19, 2012 at 07:30:17PM +0400, Alexander Shiyan wrote:
> 
> Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
> ---
>  arch/arm/boards/pcm038/pcm038.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
> index 5b0afc3..1bdb93c 100644
> --- a/arch/arm/boards/pcm038/pcm038.c
> +++ b/arch/arm/boards/pcm038/pcm038.c
> @@ -40,6 +40,7 @@
>  #include <mach/spi.h>
>  #include <mach/iomux-mx27.h>
>  #include <mach/devices-imx27.h>
> +#include <mach/iim.h>
>  #include <mfd/mc13xxx.h>
>  
>  #include "pll.h"
> @@ -193,6 +194,7 @@ mem_initcall(pcm038_mem_init);
>  static int pcm038_devices_init(void)
>  {
>  	int i;
> +	u64 uid;

The upper two bytes of uid are used unitialized.

>  	char *envdev;
>  
>  	unsigned int mode[] = {
> @@ -316,6 +318,8 @@ static int pcm038_devices_init(void)
>  
>  	printf("Using environment in %s Flash\n", envdev);
>  
> +	if (imx_iim_read(1, 1, &uid, 6) == 6)
> +		armlinux_set_serial(uid);

With this patch I just realized that my serial becomes:

-6345008925011607552

Having negative numbers here is a bit odd. Looking at it export_env_ull
does:

        char *valstr = asprintf("%lld", val);

Which clearly is a signed number. Maybe this should be changed to "0x%016llx"
(which of course is not your fault)

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From js at sig21.net  Thu Jul 19 14:32:38 2012
From: js at sig21.net (Johannes Stezenbach)
Date: Thu, 19 Jul 2012 20:32:38 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <20120719174125.GC30009@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
 <20120719170845.GA3303@sig21.net>
 <20120719174125.GC30009@pengutronix.de>
Message-ID: <20120719183238.GA3721@sig21.net>

On Thu, Jul 19, 2012 at 07:41:25PM +0200, Sascha Hauer wrote:
> On Thu, Jul 19, 2012 at 07:08:45PM +0200, Johannes Stezenbach wrote:
> > On Thu, Jul 19, 2012 at 10:13:02AM +0200, Sascha Hauer wrote:
> > > --- a/Makefile
> > > +++ b/Makefile
> > ...
> > > +ifdef CONFIG_IMAGE_COMPRESSION_LZO
> > > +barebox: piggy.lzo.o
> > > +	@echo "  LD     " $@
> > > +	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
> > > +		-T $(barebox-compressed-lds) $(barebox-compressed) \
> > > +		--start-group $(barebox-common) piggy.lzo.o --end-group
> > > +else
> > 
> > Where is barebox-compressed set?
> > 
> > I tried it and it fails to link:
> > 
> >   LD      arch/arm/lib/built-in.o
> >   LD      barebox-uncompressed
> >   SYSMAP  System.map
> >   OBJCOPY barebox-uncompressed.bin
> >   LZO     barebox-uncompressed.bin.lzo
> >   CC      piggy.lzo.o
> >   LD      barebox
> > common/built-in.o: In function `start_barebox':
> > .../barebox/common/startup.c:154: undefined reference to `__barebox_initcalls_start'
> > .../barebox/common/startup.c:154: undefined reference to `__barebox_initcalls_end'
> > 
> > $ make V=1
> > ...
> >   LD      barebox
> > arm-linux-ld -EL  -Map barebox.map -static --gc-sections -o barebox \
> >                 -T arch/arm/lib/barebox-compressed.lds  \
> >                 --start-group  common/built-in.o  drivers/built-in.o  commands/built-in.o  lib/built-in.o  crypto/built-in.o  net/built-in.o  fs/built-in.o  arch/arm/boards/foo/built-in.o  arch/arm/mach-foo/built-in.o  arch/arm/lib/built-in.o  arch/arm/cpu/built-in.o piggy.lzo.o --end-group
> > 
> > 
> > It shouldn't link all the -built-in.o into the uncompressor, should it?
> > Or is it supposed to work via --gc-sections trick?
> 
> Yes, it works using --gc-sections. Are you building a defconfig or a
> custom one? If the error above is correct start_barebox is referenced
> from the decompressor code. This should not happen.

I'm building a custom one (unpublished code).  It has some SPI flash
boot assembly code, I guess that might cause the issue wrt the new section
annotations.  I'll look at it tomorrow.  However, I still wonder
about the empty $(barebox-compressed)?


Thanks
Johannes


From shc_work at mail.ru  Thu Jul 19 14:48:53 2012
From: shc_work at mail.ru (=?UTF-8?B?QWxleGFuZGVyIFNoaXlhbg==?=)
Date: Thu, 19 Jul 2012 22:48:53 +0400
Subject: =?UTF-8?B?UmVbMl06IFtQQVRDSCA2LzZdIFBDTTAzODogUmVhZCBVSUQgZnJvbSBmdXNl?=
 =?UTF-8?B?cyBhbmQgcGFzcyB0aGlzIHZhbHVlIHRvIGtlcm5lbCBhcyBzZXJpYWwgbnVt?=
 =?UTF-8?B?YmVy?=
In-Reply-To: <20120719181252.GF30009@pengutronix.de>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
 <1342711817-866-6-git-send-email-shc_work@mail.ru>
 <20120719181252.GF30009@pengutronix.de>
Message-ID: <1342723733.758551739@f161.mail.ru>

Hello.

Thu, 19 Jul 2012 20:12:52 +0200 ?? Sascha Hauer <s.hauer at pengutronix.de>:
> On Thu, Jul 19, 2012 at 07:30:17PM +0400, Alexander Shiyan wrote:
> > 
> > Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
> > ---
> >  arch/arm/boards/pcm038/pcm038.c |    4 ++++
> >  1 files changed, 4 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
> > index 5b0afc3..1bdb93c 100644
> > --- a/arch/arm/boards/pcm038/pcm038.c
> > +++ b/arch/arm/boards/pcm038/pcm038.c
> > @@ -40,6 +40,7 @@
> >  #include <mach/spi.h>
> >  #include <mach/iomux-mx27.h>
> >  #include <mach/devices-imx27.h>
> > +#include <mach/iim.h>
> >  #include <mfd/mc13xxx.h>
> >  
> >  #include "pll.h"
> > @@ -193,6 +194,7 @@ mem_initcall(pcm038_mem_init);
> >  static int pcm038_devices_init(void)
> >  {
> >  	int i;
> > +	u64 uid;
> 
> The upper two bytes of uid are used unitialized.
You are right. I'll send updated version for this one patch.

> >  	char *envdev;
> >  
> >  	unsigned int mode[] = {
> > @@ -316,6 +318,8 @@ static int pcm038_devices_init(void)
> >  
> >  	printf("Using environment in %s Flash\n", envdev);
> >  
> > +	if (imx_iim_read(1, 1, &uid, 6) == 6)
> > +		armlinux_set_serial(uid);
> 
> With this patch I just realized that my serial becomes:
> 
> -6345008925011607552
> 
> Having negative numbers here is a bit odd. Looking at it export_env_ull
> does:
> 
>         char *valstr = asprintf("%lld", val);
> 
> Which clearly is a signed number. Maybe this should be changed to "0x%016llx"
> (which of course is not your fault)
I think this will solve the problem. But it's certainly a job for another patch.

From shc_work at mail.ru  Thu Jul 19 14:49:18 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Thu, 19 Jul 2012 22:49:18 +0400
Subject: [PATCH 6/6] PCM038: Read UID from fuses and pass this value to kernel
 as serial number
In-Reply-To: <20120719181252.GF30009@pengutronix.de>
References: <20120719181252.GF30009@pengutronix.de>
Message-ID: <1342723758-1454-1-git-send-email-shc_work@mail.ru>


Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/pcm038/pcm038.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index 5b0afc3..1bdb93c 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -40,6 +40,7 @@
 #include <mach/spi.h>
 #include <mach/iomux-mx27.h>
 #include <mach/devices-imx27.h>
+#include <mach/iim.h>
 #include <mfd/mc13xxx.h>
 
 #include "pll.h"
@@ -193,6 +194,7 @@ mem_initcall(pcm038_mem_init);
 static int pcm038_devices_init(void)
 {
 	int i;
+	u64 uid = 0;
 	char *envdev;
 
 	unsigned int mode[] = {
@@ -316,6 +318,8 @@ static int pcm038_devices_init(void)
 
 	printf("Using environment in %s Flash\n", envdev);
 
+	if (imx_iim_read(1, 1, &uid, 6) == 6)
+		armlinux_set_serial(uid);
 	armlinux_set_bootparams((void *)0xa0000100);
 	armlinux_set_architecture(MACH_TYPE_PCM038);
 
-- 
1.7.3.4



From jbe at pengutronix.de  Thu Jul 19 16:08:52 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 19 Jul 2012 22:08:52 +0200
Subject: [PATCH] ARM: add the vendor 'FriendlyARM' to its board's directory
 names
Message-ID: <1342728533-3750-1-git-send-email-jbe@pengutronix.de>

Since a look into "arch/arm/boards/" offers various boards starting with the
vendor's name in their directory name (like 'eukrea' and 'freescale').
This patch does the same with the currently existing FriendlyARM boards
Mini2440 and Tiny210.

Note: I hope I have used the '-M' parameter in a correct manner ;)

Juergen

The following changes since commit a7953f6e56b1e7e4b6973bf44b016169886f5430:

  Merge branch 'for-next/reset-source' into next (2012-07-18 16:21:48 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/jbe/barebox.git next_rename_fa_boardsV1

for you to fetch changes up to 7061e9e4337e70972923c3b967494ffb7fe20f5e:

  ARM/Samsung: add the vendor FriendlyARM to the board's directory name (2012-07-19 21:52:12 +0200)

----------------------------------------------------------------
Juergen Beisert (1):
      ARM/Samsung: add the vendor FriendlyARM to the board's directory name

 arch/arm/Makefile                                                  |    4 ++--
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Kconfig         |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Makefile        |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/config.h        |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/env/config      |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/lowlevel_init.S |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/mini2440.c      |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/Makefile          |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/config.h          |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/lowlevel.c        |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/tiny210.c         |    0
 .../configs/{mini2440_defconfig => friendlyarm_mini2440_defconfig} |    2 +-
 .../configs/{tiny210_defconfig => friendlyarm_tiny210_defconfig}   |    0
 arch/arm/mach-samsung/Kconfig                                      |    2 +-
 14 files changed, 4 insertions(+), 4 deletions(-)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Kconfig (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Makefile (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/config.h (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/env/config (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/lowlevel_init.S (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/mini2440.c (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/Makefile (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/config.h (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/lowlevel.c (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/tiny210.c (100%)
 rename arch/arm/configs/{mini2440_defconfig => friendlyarm_mini2440_defconfig} (92%)
 rename arch/arm/configs/{tiny210_defconfig => friendlyarm_tiny210_defconfig} (100%)


From jbe at pengutronix.de  Thu Jul 19 16:08:53 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 19 Jul 2012 22:08:53 +0200
Subject: [PATCH] ARM/Samsung: add the vendor FriendlyARM to the board's
 directory name
In-Reply-To: <1342728533-3750-1-git-send-email-jbe@pengutronix.de>
References: <1342728533-3750-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342728533-3750-2-git-send-email-jbe@pengutronix.de>

Since a look into "arch/arm/boards/" offers various boards starting with the
vendor's name in their directory name (like 'eukrea' and 'freescale').
This patch does the same with the currently existing FriendlyARM boards
Mini2440 and Tiny210. More boards of this vendor will follow.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Makefile                                                  |    4 ++--
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Kconfig         |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Makefile        |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/config.h        |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/env/config      |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/lowlevel_init.S |    0
 arch/arm/boards/{mini2440 => friendlyarm-mini2440}/mini2440.c      |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/Makefile          |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/config.h          |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/lowlevel.c        |    0
 arch/arm/boards/{tiny210 => friendlyarm-tiny210}/tiny210.c         |    0
 .../configs/{mini2440_defconfig => friendlyarm_mini2440_defconfig} |    2 +-
 .../configs/{tiny210_defconfig => friendlyarm_tiny210_defconfig}   |    0
 arch/arm/mach-samsung/Kconfig                                      |    2 +-
 14 files changed, 4 insertions(+), 4 deletions(-)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Kconfig (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/Makefile (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/config.h (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/env/config (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/lowlevel_init.S (100%)
 rename arch/arm/boards/{mini2440 => friendlyarm-mini2440}/mini2440.c (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/Makefile (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/config.h (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/lowlevel.c (100%)
 rename arch/arm/boards/{tiny210 => friendlyarm-tiny210}/tiny210.c (100%)
 rename arch/arm/configs/{mini2440_defconfig => friendlyarm_mini2440_defconfig} (92%)
 rename arch/arm/configs/{tiny210_defconfig => friendlyarm_tiny210_defconfig} (100%)

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 9488359..8d661a4 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -122,7 +122,7 @@ board-$(CONFIG_MACH_FREESCALE_MX51_PDK)		:= freescale-mx51-pdk
 board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
 board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
 board-$(CONFIG_MACH_GUF_CUPID)			:= guf-cupid
-board-$(CONFIG_MACH_MINI2440)			:= mini2440
+board-$(CONFIG_MACH_MINI2440)			:= friendlyarm-mini2440
 board-$(CONFIG_MACH_QIL_A9260)			:= qil-a9260
 board-$(CONFIG_MACH_TNY_A9260)			:= tny-a926x
 board-$(CONFIG_MACH_TNY_A9263)			:= tny-a926x
@@ -137,7 +137,7 @@ board-$(CONFIG_MACH_TX51)			:= karo-tx51
 board-$(CONFIG_MACH_MX6Q_ARM2)			:= freescale-mx6-arm2
 board-$(CONFIG_MACH_TOSHIBA_AC100)		:= toshiba-ac100
 board-$(CONFIG_MACH_CCMX51)			:= ccxmx51
-board-$(CONFIG_MACH_TINY210)			:= tiny210
+board-$(CONFIG_MACH_TINY210)			:= friendlyarm-tiny210
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
diff --git a/arch/arm/boards/mini2440/Kconfig b/arch/arm/boards/friendlyarm-mini2440/Kconfig
similarity index 100%
rename from arch/arm/boards/mini2440/Kconfig
rename to arch/arm/boards/friendlyarm-mini2440/Kconfig
diff --git a/arch/arm/boards/mini2440/Makefile b/arch/arm/boards/friendlyarm-mini2440/Makefile
similarity index 100%
rename from arch/arm/boards/mini2440/Makefile
rename to arch/arm/boards/friendlyarm-mini2440/Makefile
diff --git a/arch/arm/boards/mini2440/config.h b/arch/arm/boards/friendlyarm-mini2440/config.h
similarity index 100%
rename from arch/arm/boards/mini2440/config.h
rename to arch/arm/boards/friendlyarm-mini2440/config.h
diff --git a/arch/arm/boards/mini2440/env/config b/arch/arm/boards/friendlyarm-mini2440/env/config
similarity index 100%
rename from arch/arm/boards/mini2440/env/config
rename to arch/arm/boards/friendlyarm-mini2440/env/config
diff --git a/arch/arm/boards/mini2440/lowlevel_init.S b/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S
similarity index 100%
rename from arch/arm/boards/mini2440/lowlevel_init.S
rename to arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S
diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/friendlyarm-mini2440/mini2440.c
similarity index 100%
rename from arch/arm/boards/mini2440/mini2440.c
rename to arch/arm/boards/friendlyarm-mini2440/mini2440.c
diff --git a/arch/arm/boards/tiny210/Makefile b/arch/arm/boards/friendlyarm-tiny210/Makefile
similarity index 100%
rename from arch/arm/boards/tiny210/Makefile
rename to arch/arm/boards/friendlyarm-tiny210/Makefile
diff --git a/arch/arm/boards/tiny210/config.h b/arch/arm/boards/friendlyarm-tiny210/config.h
similarity index 100%
rename from arch/arm/boards/tiny210/config.h
rename to arch/arm/boards/friendlyarm-tiny210/config.h
diff --git a/arch/arm/boards/tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c
similarity index 100%
rename from arch/arm/boards/tiny210/lowlevel.c
rename to arch/arm/boards/friendlyarm-tiny210/lowlevel.c
diff --git a/arch/arm/boards/tiny210/tiny210.c b/arch/arm/boards/friendlyarm-tiny210/tiny210.c
similarity index 100%
rename from arch/arm/boards/tiny210/tiny210.c
rename to arch/arm/boards/friendlyarm-tiny210/tiny210.c
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/friendlyarm_mini2440_defconfig
similarity index 92%
rename from arch/arm/configs/mini2440_defconfig
rename to arch/arm/configs/friendlyarm_mini2440_defconfig
index efe76e4..5551ffe 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/friendlyarm_mini2440_defconfig
@@ -12,7 +12,7 @@ CONFIG_GLOB=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
-CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mini2440/env"
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/friendlyarm-mini2440/env"
 CONFIG_DEBUG_INFO=y
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
diff --git a/arch/arm/configs/tiny210_defconfig b/arch/arm/configs/friendlyarm_tiny210_defconfig
similarity index 100%
rename from arch/arm/configs/tiny210_defconfig
rename to arch/arm/configs/friendlyarm_tiny210_defconfig
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 90cda30..b28cf1f 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -80,7 +80,7 @@ config MACH_A9M2410DEV
 
 endchoice
 
-source arch/arm/boards/mini2440/Kconfig
+source arch/arm/boards/friendlyarm-mini2440/Kconfig
 
 endmenu
 
-- 
1.7.10.4



From robert.jarzmik at free.fr  Thu Jul 19 16:11:06 2012
From: robert.jarzmik at free.fr (Robert Jarzmik)
Date: Thu, 19 Jul 2012 22:11:06 +0200
Subject: Compressed barebox image support
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 (Sascha Hauer's message of "Thu, 19 Jul 2012 10:12:53 +0200")
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <87fw8nv7dx.fsf@free.fr>

Sascha Hauer <s.hauer at pengutronix.de> writes:
> Nevertheless I would be happy about Tested-by (and does-not-work-for) tags.
>
> Sascha

I tried on Xscale PXA (mioa701 board, armv5te).
It works like a charm.

Therefore, feel free to add my :
Tested-by: Robert Jarzmik <robert.jarzmik at free.fr>

-- 
Robert


From s.hauer at pengutronix.de  Thu Jul 19 16:42:12 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 22:42:12 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <20120719183238.GA3721@sig21.net>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
 <20120719170845.GA3303@sig21.net>
 <20120719174125.GC30009@pengutronix.de>
 <20120719183238.GA3721@sig21.net>
Message-ID: <20120719204212.GH30009@pengutronix.de>

On Thu, Jul 19, 2012 at 08:32:38PM +0200, Johannes Stezenbach wrote:
> > > ...
> > >   LD      barebox
> > > arm-linux-ld -EL  -Map barebox.map -static --gc-sections -o barebox \
> > >                 -T arch/arm/lib/barebox-compressed.lds  \
> > >                 --start-group  common/built-in.o  drivers/built-in.o  commands/built-in.o  lib/built-in.o  crypto/built-in.o  net/built-in.o  fs/built-in.o  arch/arm/boards/foo/built-in.o  arch/arm/mach-foo/built-in.o  arch/arm/lib/built-in.o  arch/arm/cpu/built-in.o piggy.lzo.o --end-group
> > > 
> > > 
> > > It shouldn't link all the -built-in.o into the uncompressor, should it?
> > > Or is it supposed to work via --gc-sections trick?
> > 
> > Yes, it works using --gc-sections. Are you building a defconfig or a
> > custom one? If the error above is correct start_barebox is referenced
> > from the decompressor code. This should not happen.
> 
> I'm building a custom one (unpublished code).  It has some SPI flash
> boot assembly code, I guess that might cause the issue wrt the new section
> annotations.  I'll look at it tomorrow.  However, I still wonder
> about the empty $(barebox-compressed)?

It's empty here aswell, so this shouldn't be a problem. Though I should
probably simpy remove it.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul 19 16:45:48 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 19 Jul 2012 22:45:48 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own
 section
In-Reply-To: <20120719140834.GY30009@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
 <5007E38B.8040106@pengutronix.de>
 <20120719140834.GY30009@pengutronix.de>
Message-ID: <20120719204548.GI30009@pengutronix.de>

On Thu, Jul 19, 2012 at 04:08:34PM +0200, Sascha Hauer wrote:
> On Thu, Jul 19, 2012 at 12:38:03PM +0200, Marc Kleine-Budde wrote:
> > On 07/19/2012 10:13 AM, Sascha Hauer wrote:
> > > To let the linker remove unused functions.
> > > 
> > > Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> > > ---
> > >  arch/arm/cpu/cache-armv4.S      |    7 ++++++-
> > >  arch/arm/cpu/cache-armv5.S      |    7 ++++++-
> > >  arch/arm/cpu/cache-armv6.S      |   11 +++++++++--
> > >  arch/arm/cpu/cache-armv7.S      |    8 ++++++--
> > >  arch/arm/lib/ashldi3.S          |    1 +
> > >  arch/arm/lib/ashrdi3.S          |    1 +
> > >  arch/arm/lib/findbit.S          |    9 +++++++++
> > >  arch/arm/lib/io-writesw-armv4.S |    2 ++
> > >  arch/arm/lib/lib1funcs.S        |    7 +++++++
> > >  arch/arm/lib/lshrdi3.S          |    1 +
> > >  10 files changed, 48 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/arch/arm/cpu/cache-armv4.S b/arch/arm/cpu/cache-armv4.S
> > > index 6d03565..2231eee 100644
> > > --- a/arch/arm/cpu/cache-armv4.S
> > > +++ b/arch/arm/cpu/cache-armv4.S
> > > @@ -3,6 +3,7 @@
> > >  
> > >  #define CACHE_DLINESIZE 32
> > >  
> > > +.section .text.__mmu_cache_on
> > >  ENTRY(__mmu_cache_on)
> > 
> > Is it possible to add the section to the ENTRY macro?
> 
> I'm not sure. I was pretty sure that some assembly functions fall
> through to the next function. I cannot find any examples though.

For example we have this:

.section .text.__divsi3
ENTRY(__divsi3)
ENTRY(__aeabi_idiv)
	...

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jkirk865 at gmail.com  Thu Jul 19 16:56:35 2012
From: jkirk865 at gmail.com (Jerry Kirk)
Date: Thu, 19 Jul 2012 20:56:35 +0000 (UTC)
Subject: USB On PCM043?
References: <loom.20120719T173418-826@post.gmane.org>
 <20120719161139.GB30009@pengutronix.de>
Message-ID: <loom.20120719T224910-551@post.gmane.org>

> > We have been attempting to get USB Host mode working under Barebox(2012-07-0)
> > a PCM043 platform (i.mx35), but we are having a bit of trouble.
> 
> Could it be that the USB clock operates at the wrong rate? I think it
> should be 60MHz.

We're not certain how to verify the clock setting for USB in Barebox.
We have used "dump_clocks" but are not certain which of these clocks
the USB clock is derived from. We think we have it set to the same
settings as the Eukrea board.

Do you know of anyone that has used USB on the pcm043 board?






From antonynpavlov at gmail.com  Fri Jul 20 01:46:49 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 09:46:49 +0400
Subject: [PATCH] serial_ns16550: change the driver's name
Message-ID: <1342763209-28029-1-git-send-email-antonynpavlov@gmail.com>

The name "serial_ns16550" is not handy because the devices
will have the names like "serial_ns165500", "serial_ns165501",
"serial_ns165502" etc.

The names like "ns16550_serial0" and "ns16550_serial1" look
much better.

Also it is reasonable to make serial driver's names unification.
E.g. see the names for drivers in drivers/serial directory:
 "netx_serial",
 "mpc5xxx_serial",
 "altera_serial",
 "s3c_serial",
 "imx_serial",
 "pxa_serial",
 "blackfin_serial",
 "stm_serial",
 "pl010_serial",
and even "g_serial" in ./drivers/usb/gadget/serial.c

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 drivers/serial/serial_ns16550.c |    2 +-
 include/driver.h                |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c
index 820aac5..1248bd6 100644
--- a/drivers/serial/serial_ns16550.c
+++ b/drivers/serial/serial_ns16550.c
@@ -263,7 +263,7 @@ static int ns16550_probe(struct device_d *dev)
  * @brief Driver registration structure
  */
 static struct driver_d ns16550_serial_driver = {
-	.name = "serial_ns16550",
+	.name = "ns16550_serial",
 	.probe = ns16550_probe,
 };
 
diff --git a/include/driver.h b/include/driver.h
index 7d597b4..0a8dc8e 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -226,7 +226,7 @@ struct NS16550_plat;
 static inline struct device_d *add_ns16550_device(int id, resource_size_t start,
 		resource_size_t size, int flags, struct NS16550_plat *pdata)
 {
-	return add_generic_device("serial_ns16550", id, NULL, start, size,
+	return add_generic_device("ns16550_serial", id, NULL, start, size,
 				  IORESOURCE_MEM | flags, pdata);
 }
 
-- 
1.7.10



From jbe at pengutronix.de  Fri Jul 20 02:56:15 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 08:56:15 +0200
Subject: [PATCH 1/3] ARM/Samsung: be able to include the nand header multiple
 times
In-Reply-To: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
References: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342767377-24735-2-git-send-email-jbe@pengutronix.de>

This is required in preparation for the following patches.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/include/mach/s3c24xx-nand.h |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h b/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h
index acd78b8..fa88da1 100644
--- a/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h
+++ b/arch/arm/mach-samsung/include/mach/s3c24xx-nand.h
@@ -18,6 +18,9 @@
  *
  */
 
+#ifndef MACH_S3C24XX_NAND_H
+# define MACH_S3C24XX_NAND_H
+
 #ifdef CONFIG_S3C_NAND_BOOT
 extern void s3c24x0_nand_load_image(void*, int, int);
 #endif
@@ -52,3 +55,5 @@ struct s3c24x0_nand_platform_data {
  * @file
  * @brief Basic declaration to use the s3c24x0 NAND driver
  */
+
+#endif /* MACH_S3C24XX_NAND_H */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 02:56:17 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 08:56:17 +0200
Subject: [PATCH 3/3] NAND/Samsung: remove a leftover from architeture clean ups
In-Reply-To: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
References: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342767377-24735-4-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/mtd/nand/Makefile |    1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 4179618..1dcfb76 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -15,5 +15,4 @@ obj-$(CONFIG_NAND_IMX)			+= nand_imx.o
 obj-$(CONFIG_NAND_OMAP_GPMC)		+= nand_omap_gpmc.o nand_omap_bch_decoder.o
 obj-$(CONFIG_NAND_ATMEL)		+= atmel_nand.o
 obj-$(CONFIG_NAND_S3C24XX)		+= nand_s3c24xx.o
-obj-$(CONFIG_NAND_S3C24X0)		+= nand_s3c2410.o
 obj-$(CONFIG_NAND_MXS)			+= nand_mxs.o
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 02:56:14 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 08:56:14 +0200
Subject: [PATCH/master] ARM/Samsung: A required fix and a cleanup
Message-ID: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>

Some fixes and cleanups for master related to boards based on the Samsung
S3C24XX CPU.

The following changes since commit b78e5fe9f3ce155065831d3aa8a480656a8f53c5:

  commands/crc: assert newline after output with big offsets (2012-07-17 20:41:17 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/jbe/barebox.git for_master_s3c24xx_runtime_fix_and_cleanup

for you to fetch changes up to b47220d7f70df9191fc456dbcaeaa6ead72c6c02:

  NAND/Samsung: remove a leftover from architeture clean ups (2012-07-20 08:41:35 +0200)

----------------------------------------------------------------
Juergen Beisert (3):
      ARM/Samsung: be able to include the nand header multiple times
      ARM/Samsung: unify device registration for the S3C24XX SoCs
      NAND/Samsung: remove a leftover from architeture clean ups

 arch/arm/boards/a9m2410/a9m2410.c                  |    7 ++-
 arch/arm/boards/a9m2440/a9m2440.c                  |    7 ++-
 arch/arm/boards/mini2440/mini2440.c                |   16 +++---
 .../mach-samsung/include/mach/devices-s3c24xx.h    |   55 ++++++++++++++++++++
 arch/arm/mach-samsung/include/mach/s3c24xx-nand.h  |    5 ++
 drivers/mtd/nand/Makefile                          |    1 -
 6 files changed, 72 insertions(+), 19 deletions(-)
 create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c24xx.h


From jbe at pengutronix.de  Fri Jul 20 02:56:16 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 08:56:16 +0200
Subject: [PATCH 2/3] ARM/Samsung: unify device registration for the S3C24XX
 SoCs
In-Reply-To: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
References: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342767377-24735-3-git-send-email-jbe@pengutronix.de>

Barebox crashes since it has trouble with a resource size of 0. Most of the
S3C24XX based platforms crashes at runtime and can't use devices with resource
sizes of 0 anymore. This patch fix it by unifying the device registration for
all current Barebox's S3C24XX based platforms.

- A9M2410 and A9M2440 compile time tested only.
- Mini2440 also runtime tested.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/boards/a9m2410/a9m2410.c                  |    7 ++-
 arch/arm/boards/a9m2440/a9m2440.c                  |    7 ++-
 arch/arm/boards/mini2440/mini2440.c                |   16 +++---
 .../mach-samsung/include/mach/devices-s3c24xx.h    |   55 ++++++++++++++++++++
 4 files changed, 67 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c24xx.h

diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c
index eaafdbd..e2044a9 100644
--- a/arch/arm/boards/a9m2410/a9m2410.c
+++ b/arch/arm/boards/a9m2410/a9m2410.c
@@ -32,6 +32,7 @@
 #include <partition.h>
 #include <nand.h>
 #include <io.h>
+#include <mach/devices-s3c24xx.h>
 #include <mach/s3c-iomap.h>
 #include <mach/s3c24xx-nand.h>
 #include <mach/s3c-generic.h>
@@ -109,8 +110,7 @@ static int a9m2410_devices_init(void)
 	writel(reg, S3C_MISCCR);
 
 	/* ----------- the devices the boot loader should work with -------- */
-	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
-			0, IORESOURCE_MEM, &nand_info);
+	s3c24xx_add_nand(&nand_info);
 	/*
 	 * SMSC 91C111 network controller on the baseboard
 	 * connected to CS line 1 and interrupt line
@@ -145,8 +145,7 @@ void __bare_init nand_boot(void)
 
 static int a9m2410_console_init(void)
 {
-	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
-			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+	s3c24xx_add_uart1();
 	return 0;
 }
 
diff --git a/arch/arm/boards/a9m2440/a9m2440.c b/arch/arm/boards/a9m2440/a9m2440.c
index 1d20248..8975c15 100644
--- a/arch/arm/boards/a9m2440/a9m2440.c
+++ b/arch/arm/boards/a9m2440/a9m2440.c
@@ -32,6 +32,7 @@
 #include <partition.h>
 #include <nand.h>
 #include <io.h>
+#include <mach/devices-s3c24xx.h>
 #include <mach/s3c-iomap.h>
 #include <mach/s3c24xx-nand.h>
 #include <mach/s3c-generic.h>
@@ -129,8 +130,7 @@ static int a9m2440_devices_init(void)
 	writel(reg, S3C_MISCCR);
 
 	/* ----------- the devices the boot loader should work with -------- */
-	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE, 0,
-			   IORESOURCE_MEM, &nand_info);
+	s3c24xx_add_nand(&nand_info);
 	/*
 	 * cs8900 network controller onboard
 	 * Connected to CS line 5 + A24 and interrupt line EINT9,
@@ -164,8 +164,7 @@ void __bare_init nand_boot(void)
 
 static int a9m2440_console_init(void)
 {
-	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
-			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+	s3c24xx_add_uart1();
 	return 0;
 }
 
diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 3d3b820..3523949 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -39,6 +39,7 @@
 #include <io.h>
 #include <mach/gpio.h>
 #include <mach/s3c-iomap.h>
+#include <mach/devices-s3c24xx.h>
 #include <mach/s3c24xx-nand.h>
 #include <mach/s3c-generic.h>
 #include <mach/s3c-mci.h>
@@ -297,8 +298,7 @@ static int mini2440_devices_init(void)
 	reg |= 0x10000;
 	writel(reg, S3C_MISCCR);
 
-	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
-			0, IORESOURCE_MEM, &nand_info);
+	s3c24xx_add_nand(&nand_info);
 
 	add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
 			  IORESOURCE_MEM_16BIT, &dm9000_data);
@@ -312,12 +312,9 @@ static int mini2440_devices_init(void)
 	devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
 	dev_add_bb_dev("env_raw", "env0");
 #endif
-	add_generic_device("s3c_mci", 0, NULL, S3C2410_SDI_BASE, 0,
-			   IORESOURCE_MEM, &mci_data);
-	add_generic_device("s3c_fb", 0, NULL, S3C2410_LCD_BASE, 0,
-			   IORESOURCE_MEM, &s3c24x0_fb_data);
-	add_generic_device("ohci", 0, NULL, S3C2410_USB_HOST_BASE, 0x100,
-			   IORESOURCE_MEM, NULL);
+	s3c24xx_add_mci(&mci_data);
+	s3c24xx_add_fb(&s3c24x0_fb_data);
+	s3c24xx_add_ohci();
 	armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
 	armlinux_set_architecture(MACH_TYPE_MINI2440);
 
@@ -344,8 +341,7 @@ static int mini2440_console_init(void)
 	s3c_gpio_mode(GPH2_TXD0);
 	s3c_gpio_mode(GPH3_RXD0);
 
-	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
-			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+	s3c24xx_add_uart1();
 	return 0;
 }
 
diff --git a/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h b/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
new file mode 100644
index 0000000..51fd9a1
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef INCLUDE_MACH_DEVICES_S3C24XX_H
+# define INCLUDE_MACH_DEVICES_S3C24XX_H
+
+#include <driver.h>
+#include <mach/s3c24xx-iomap.h>
+#include <mach/s3c24xx-nand.h>
+#include <mach/s3c-mci.h>
+#include <mach/s3c24xx-fb.h>
+
+static inline void s3c24xx_add_nand(struct s3c24x0_nand_platform_data *d)
+{
+	add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL,
+				S3C24X0_NAND_BASE, 0x80, IORESOURCE_MEM, d);
+}
+
+static inline void s3c24xx_add_mci(struct s3c_mci_platform_data *d)
+{
+	add_generic_device("s3c_mci", DEVICE_ID_DYNAMIC, NULL,
+				S3C2410_SDI_BASE, 0x80, IORESOURCE_MEM, d);
+}
+
+static inline void s3c24xx_add_fb(struct s3c_fb_platform_data *d)
+{
+	add_generic_device("s3c_fb", DEVICE_ID_DYNAMIC, NULL,
+				S3C2410_LCD_BASE, 0x80, IORESOURCE_MEM, d);
+}
+
+static inline void s3c24xx_add_ohci(void)
+{
+	add_generic_device("ohci", DEVICE_ID_DYNAMIC, NULL,
+			S3C2410_USB_HOST_BASE, 0x100, IORESOURCE_MEM, NULL);
+}
+
+static inline void s3c24xx_add_uart1(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
+			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+}
+
+#endif /* INCLUDE_MACH_DEVICES_S3C24XX_H */
-- 
1.7.10.4



From s.hauer at pengutronix.de  Fri Jul 20 03:20:13 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 09:20:13 +0200
Subject: [PATCH 2/3 v2] gpmc: Add reset to gpmc_generic_init
In-Reply-To: <1342684698-3123-1-git-send-email-j.weitzel@phytec.de>
References: <20120718221003.GR30009@pengutronix.de>
 <1342684698-3123-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <20120720072013.GJ30009@pengutronix.de>

Hi Jan,

On Thu, Jul 19, 2012 at 09:58:18AM +0200, Jan Weitzel wrote:
> Add reset to gpmc_generic_init as proposed by TRM.
> This also fixes some strange timing issue while GPMC Initialization for
> NAND OMAP4460
> 
> Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>

Applied this one. I think the rest needs another round.

Sascha

> ---
> v2: fix timeout endless loop
> 
>  arch/arm/mach-omap/gpmc.c |   12 +++++++++++-
>  1 files changed, 11 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
> index 399f68a..b3fa56c 100644
> --- a/arch/arm/mach-omap/gpmc.c
> +++ b/arch/arm/mach-omap/gpmc.c
> @@ -28,6 +28,7 @@
>   * MA 02111-1307 USA
>   */
>  #include <common.h>
> +#include <clock.h>
>  #include <init.h>
>  #include <io.h>
>  #include <mach/silicon.h>
> @@ -48,13 +49,22 @@
>   */
>  void gpmc_generic_init(unsigned int cfg)
>  {
> +	uint64_t start;
>  	unsigned int reg = GPMC_REG(CONFIG7_0);
>  	char x = 0;
>  
>  	debug("gpmccfg=%x\n", cfg);
>  	/* Generic Configurations */
> +	/* reset gpmc */
> +	start = get_time_ns();
>  	/* No idle, L3 clock free running */
> -	writel(0x10, GPMC_REG(SYS_CONFIG));
> +	writel(0x12, GPMC_REG(SYS_CONFIG));
> +	while (!readl(GPMC_REG(SYS_STATUS)))
> +		if (is_timeout(start, MSECOND)) {
> +			printf("timeout on gpmc reset\n");
> +			break;
> +		}
> +
>  	/* No Timeout */
>  	writel(0x00, GPMC_REG(TIMEOUT_CONTROL));
>  	/* No IRQs */
> -- 
> 1.7.0.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 20 03:24:02 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 09:24:02 +0200
Subject: [PATCH] Added SDR-size auto detection.
In-Reply-To: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
References: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
Message-ID: <20120720072402.GK30009@pengutronix.de>

Hi J?rgen,

Applied this series except the hack alert.

Sascha

On Wed, Jul 18, 2012 at 02:58:44PM +0200, Juergen Kilb wrote:
> 
> Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
> ---
>  arch/arm/boards/phycard-a-l1/pca-a-l1.c |  169 +++++++++++++++++++++++--------
>  1 files changed, 125 insertions(+), 44 deletions(-)
> 
> diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> index a388f63..1dc7678 100644
> --- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> +++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> @@ -73,10 +73,82 @@
>  
>  #define SMC911X_BASE 0x2c000000
>  
> +/* Slower full frequency range default timings for x32 operation */
> +#define SDP_SDRC_SHARING	0x00000100
> +/* Diabling power down mode using CKE pin */
> +#define SDP_SDRC_POWER_POP	0x00000081
> +/* rkw - need to find of 90/72 degree recommendation for speed like before. */
> +#define SDP_SDRC_DLLAB_CTRL ((DLL_ENADLL << 3) | \
> +	(DLL_LOCKDLL << 2) | (DLL_DLLPHASE_90 << 1))
> +
> +/* used to create an array of memory configuartions. */
> +struct sdrc_config {
> +	u32	cs_cfg;
> +	u32	mcfg;
> +	u32	mr;
> +	u32	actim_ctrla;
> +	u32	actim_ctrlb;
> +	u32	rfr_ctrl;
> +} const sdrc_config[] = {
> +/* max cs_size for autodetection, common timing */
> +/* 2x256MByte, 14 Rows, 10 Columns , RBC (BAL=2) */
> +{ 0x00000004, 0x03590099, 0x00000032, 0x9A9DB4C6, 0x00011216, 0x0004e201},
> +/* MT46H32M32LF 2x128MByte, 13 Rows, 10 Columns */
> +{ 0x00000001, 0x02584099, 0x00000032, 0x9A9DB4C6, 0x00011216, 0x0004e201},
> +/* MT46H64M32LF 1x256MByte, 14 Rows, 10 Columns */
> +{ 0x00000002, 0x03588099, 0x00000032, 0x629DB4C6, 0x00011113, 0x0004e201},
> +/* MT64H128M32L2 2x256MByte, 14 Rows, 10 Columns */
> +{ 0x00000002, 0x03588099, 0x00000032, 0x629DB4C6, 0x00011113, 0x0004e201},
> +};
> +
>  /*
>   * Boot-time initialization(s)
>   */
>  
> +/*********************************************************************
> + * init_sdram_ddr() - Init DDR controller.
> + *********************************************************************/
> +void init_sdram_ddr(void)
> +{
> +	/* reset sdrc controller */
> +	writel(SOFTRESET, SDRC_REG(SYSCONFIG));
> +	wait_on_value(1<<0, 1<<0, SDRC_REG(STATUS), 12000000);
> +	writel(0, SDRC_REG(SYSCONFIG));
> +
> +	/* setup sdrc to ball mux */
> +	writel(SDP_SDRC_SHARING, SDRC_REG(SHARING));
> +	writel(SDP_SDRC_POWER_POP, SDRC_REG(POWER));
> +
> +	/* set up dll */
> +	writel(SDP_SDRC_DLLAB_CTRL, SDRC_REG(DLLA_CTRL));
> +	sdelay(0x2000);	/* give time to lock */
> +
> +}
> +/*********************************************************************
> + * config_sdram_ddr() - Init DDR on dev board.
> + *********************************************************************/
> +void config_sdram_ddr(u8 cs, u8 cfg)
> +{
> +
> +	writel(sdrc_config[cfg].mcfg, SDRC_REG(MCFG_0) + (0x30 * cs));
> +	writel(sdrc_config[cfg].actim_ctrla, SDRC_REG(ACTIM_CTRLA_0) + (0x28 * cs));
> +	writel(sdrc_config[cfg].actim_ctrlb, SDRC_REG(ACTIM_CTRLB_0) + (0x28 * cs));
> +	writel(sdrc_config[cfg].rfr_ctrl, SDRC_REG(RFR_CTRL_0) + (0x30 * cs));
> +
> +	writel(CMD_NOP, SDRC_REG(MANUAL_0) + (0x30 * cs));
> +
> +	sdelay(5000);
> +
> +	writel(CMD_PRECHARGE, SDRC_REG(MANUAL_0) + (0x30 * cs));
> +	writel(CMD_AUTOREFRESH, SDRC_REG(MANUAL_0) + (0x30 * cs));
> +	writel(CMD_AUTOREFRESH, SDRC_REG(MANUAL_0) + (0x30 * cs));
> +
> +	/* set mr0 */
> +	writel(sdrc_config[cfg].mr, SDRC_REG(MR_0) + (0x30 * cs));
> +
> +	sdelay(2000);
> +}
> +
>  /**
>   * @brief Initialize the SDRC module
>   * Initialisation for 1x256MByte but normally
> @@ -85,49 +157,55 @@
>   */
>  static void pcaal1_sdrc_init(void)
>  {
> -	/* SDRAM software reset */
> -	/* No idle ack and RESET enable */
> -	writel(0x1A, SDRC_REG(SYSCONFIG));
> -	sdelay(100);
> -	/* No idle ack and RESET disable */
> -	writel(0x18, SDRC_REG(SYSCONFIG));
> -
> -	/* SDRC Sharing register */
> -	/* 32-bit SDRAM on data lane [31:0] - CS0 */
> -	/* pin tri-stated = 1 */
> -	writel(0x00000100, SDRC_REG(SHARING));
> -
> -	/* ----- SDRC Registers Configuration --------- */
> -	/* SDRC_MCFG0 register */
> -	writel(0x03588099, SDRC_REG(MCFG_0));
> -
> -	/* SDRC_RFR_CTRL0 register */
> -	writel(0x0004e201, SDRC_REG(RFR_CTRL_0));
> -
> -	/* SDRC_ACTIM_CTRLA0 register */
> -	writel(0x629DB4C6, SDRC_REG(ACTIM_CTRLA_0));
> -
> -	/* SDRC_ACTIM_CTRLB0 register */
> -	writel(0x00011113, SDRC_REG(ACTIM_CTRLB_0));
> -
> -	/* Disble Power Down of CKE due to 1 CKE on combo part */
> -	writel(0x00000081, SDRC_REG(POWER));
> -
> -	/* SDRC_MANUAL command register */
> -	/* NOP command */
> -	writel(0x00000000, SDRC_REG(MANUAL_0));
> -	/* Precharge command */
> -	writel(0x00000001, SDRC_REG(MANUAL_0));
> -	/* Auto-refresh command */
> -	writel(0x00000002, SDRC_REG(MANUAL_0));
> -	/* Auto-refresh command */
> -	writel(0x00000002, SDRC_REG(MANUAL_0));
> -
> -	/* SDRC MR0 register Burst length=4 */
> -	writel(0x00000032, SDRC_REG(MR_0));
> -
> -	/* SDRC DLLA control register */
> -	writel(0x0000000A, SDRC_REG(DLLA_CTRL));
> +	u32 test0, test1;
> +	char cfg;
> +
> +	init_sdram_ddr();
> +
> +	config_sdram_ddr(0, 0); /* 256MByte at CS0 */
> +	config_sdram_ddr(1, 0); /* 256MByte at CS1 */
> +
> +	test0 = get_ram_size((long *) 0x80000000, SZ_256M);
> +	test1 = get_ram_size((long *) 0xA0000000, SZ_256M);
> +
> +	/* mask out lower nible, its not tested with
> +	in common/memsize.c */
> +	test1 &= 0xfffffff0;
> +
> +	if ((test1 > 0) && (test1 != test0))
> +		hang();
> +
> +	cfg = -1; /* illegal configuration found */
> +
> +	if (test1 == 0) {
> +		init_sdram_ddr();
> +		writel((sdrc_config[(uchar) cfg].mcfg & 0xfffc00ff), SDRC_REG(MCFG_1));
> +
> +		/* 1 x 256MByte */
> +		if (test0 == SZ_256M)
> +			cfg = 2;
> +
> +		if (cfg != -1) {
> +			config_sdram_ddr(0, cfg);
> +			writel(sdrc_config[(uchar) cfg].cs_cfg, SDRC_REG(CS_CFG));
> +		}
> +		return;
> +	}
> +
> +	/* reinit both cs with correct size */
> +	/* 2 x 128MByte */
> +	if (test0 == SZ_128M)
> +		cfg = 1;
> +	/* 2 x 256MByte */
> +	if (test0 == SZ_256M)
> +		cfg = 3;
> +
> +	if (cfg != -1) {
> +		init_sdram_ddr();
> +		writel(sdrc_config[(uchar) cfg].cs_cfg, SDRC_REG(CS_CFG));
> +		config_sdram_ddr(0, cfg);
> +		config_sdram_ddr(1, cfg);
> +	}
>  }
>  
>  /**
> @@ -296,9 +374,12 @@ static int pcaal1_mem_init(void)
>  				   IORESOURCE_MEM_WRITEABLE);
>  
>  	arm_add_mem_device("ram0", OMAP_SDRC_CS0, get_sdr_cs_size(SDRC_CS0_OSET));
> +	printf("found %s at SDCS0\n", size_human_readable(get_sdr_cs_size(SDRC_CS0_OSET)));
>  
> -	if ((get_sdr_cs_size(SDRC_CS1_OSET) != 0) && (get_sdr_cs1_base() != OMAP_SDRC_CS0))
> +	if ((get_sdr_cs_size(SDRC_CS1_OSET) != 0) && (get_sdr_cs1_base() != OMAP_SDRC_CS0)) {
>  		arm_add_mem_device("ram1", get_sdr_cs1_base(), get_sdr_cs_size(SDRC_CS1_OSET));
> +		printf("found %s at SDCS1\n", size_human_readable(get_sdr_cs_size(SDRC_CS1_OSET)));
> +	}
>  
>  	return 0;
>  }
> -- 
> 1.7.0.4
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 20 03:46:11 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 09:46:11 +0200
Subject: [PATCH 1/6] mc13xxx: Define maximum SPI clock frequency global
 to driver
In-Reply-To: <1342711817-866-1-git-send-email-shc_work@mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
Message-ID: <20120720074611.GL30009@pengutronix.de>

Hi Alexander,

Applied these except 1/6 and 3/6 which have open comments.

Sascha

On Thu, Jul 19, 2012 at 07:30:12PM +0400, Alexander Shiyan wrote:
> This patch provide setup for SPI clk frequency global to driver.
> For MC13783 maximum clock frequency is 20 MHz,
> for MC13892 maximum clock frequency is 26 MHz,
> so we define 20 MHz as a maximum SPI clk.
> 
> Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
> ---
>  arch/arm/boards/ccxmx51/ccxmx51.c          |    1 -
>  arch/arm/boards/freescale-mx51-pdk/board.c |    1 -
>  arch/arm/boards/pcm038/pcm038.c            |    1 -
>  drivers/mfd/mc13xxx.c                      |    1 +
>  4 files changed, 1 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c
> index f494174..f309e0c 100644
> --- a/arch/arm/boards/ccxmx51/ccxmx51.c
> +++ b/arch/arm/boards/ccxmx51/ccxmx51.c
> @@ -191,7 +191,6 @@ static struct spi_imx_master ecspi_0_data = {
>  static const struct spi_board_info ccxmx51_spi_board_info[] = {
>  	{
>  		.name		= "mc13xxx-spi",
> -		.max_speed_hz	= 6000000,
>  		.bus_num	= 0,
>  		.chip_select	= 0,
>  	},
> diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
> index 3a568d0..7c2c8fe 100644
> --- a/arch/arm/boards/freescale-mx51-pdk/board.c
> +++ b/arch/arm/boards/freescale-mx51-pdk/board.c
> @@ -117,7 +117,6 @@ static struct spi_imx_master spi_0_data = {
>  static const struct spi_board_info mx51_babbage_spi_board_info[] = {
>  	{
>  		.name = "mc13xxx-spi",
> -		.max_speed_hz = 300000,
>  		.bus_num = 0,
>  		.chip_select = 0,
>  	},
> diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
> index badc978..fa82b02 100644
> --- a/arch/arm/boards/pcm038/pcm038.c
> +++ b/arch/arm/boards/pcm038/pcm038.c
> @@ -59,7 +59,6 @@ static struct spi_imx_master pcm038_spi_0_data = {
>  static struct spi_board_info pcm038_spi_board_info[] = {
>  	{
>  		.name = "mc13xxx-spi",
> -		.max_speed_hz = 3000000,
>  		.bus_num = 0,
>  		.chip_select = 0,
>  	}
> diff --git a/drivers/mfd/mc13xxx.c b/drivers/mfd/mc13xxx.c
> index 2934e9d..8bb0d00 100644
> --- a/drivers/mfd/mc13xxx.c
> +++ b/drivers/mfd/mc13xxx.c
> @@ -297,6 +297,7 @@ static int mc_probe(struct device_d *dev, enum mc13xxx_mode mode)
>  		mc_dev->spi = dev->type_data;
>  		mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
>  		mc_dev->spi->bits_per_word = 32;
> +		mc_dev->spi->max_speed_hz = 20000000;
>  	}
>  	mc_dev->cdev.size = 256;
>  	mc_dev->cdev.dev = dev;
> -- 
> 1.7.3.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 20 03:53:32 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 09:53:32 +0200
Subject: [PATCH/master] ARM/Samsung: A required fix and a cleanup
In-Reply-To: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
References: <1342767377-24735-1-git-send-email-jbe@pengutronix.de>
Message-ID: <20120720075332.GM30009@pengutronix.de>

On Fri, Jul 20, 2012 at 08:56:14AM +0200, Juergen Beisert wrote:
> Some fixes and cleanups for master related to boards based on the Samsung
> S3C24XX CPU.
> 
> The following changes since commit b78e5fe9f3ce155065831d3aa8a480656a8f53c5:
> 
>   commands/crc: assert newline after output with big offsets (2012-07-17 20:41:17 +0200)
> 
> are available in the git repository at:
> 
>   git://git.pengutronix.de/git/jbe/barebox.git for_master_s3c24xx_runtime_fix_and_cleanup

Pulled, thanks

Sascha

> 
> for you to fetch changes up to b47220d7f70df9191fc456dbcaeaa6ead72c6c02:
> 
>   NAND/Samsung: remove a leftover from architeture clean ups (2012-07-20 08:41:35 +0200)
> 
> ----------------------------------------------------------------
> Juergen Beisert (3):
>       ARM/Samsung: be able to include the nand header multiple times
>       ARM/Samsung: unify device registration for the S3C24XX SoCs
>       NAND/Samsung: remove a leftover from architeture clean ups
> 
>  arch/arm/boards/a9m2410/a9m2410.c                  |    7 ++-
>  arch/arm/boards/a9m2440/a9m2440.c                  |    7 ++-
>  arch/arm/boards/mini2440/mini2440.c                |   16 +++---
>  .../mach-samsung/include/mach/devices-s3c24xx.h    |   55 ++++++++++++++++++++
>  arch/arm/mach-samsung/include/mach/s3c24xx-nand.h  |    5 ++
>  drivers/mtd/nand/Makefile                          |    1 -
>  6 files changed, 72 insertions(+), 19 deletions(-)
>  create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c24xx.h
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 20 03:59:57 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 09:59:57 +0200
Subject: Compressed barebox image support
In-Reply-To: <87fw8nv7dx.fsf@free.fr>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <87fw8nv7dx.fsf@free.fr>
Message-ID: <20120720075957.GN30009@pengutronix.de>

Hi Robert,

On Thu, Jul 19, 2012 at 10:11:06PM +0200, Robert Jarzmik wrote:
> Sascha Hauer <s.hauer at pengutronix.de> writes:
> > Nevertheless I would be happy about Tested-by (and does-not-work-for) tags.
> >
> > Sascha
> 
> I tried on Xscale PXA (mioa701 board, armv5te).
> It works like a charm.
> 
> Therefore, feel free to add my :
> Tested-by: Robert Jarzmik <robert.jarzmik at free.fr>

Thanks for testing.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 20 04:02:04 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 10:02:04 +0200
Subject: [PATCH] serial_ns16550: change the driver's name
In-Reply-To: <1342763209-28029-1-git-send-email-antonynpavlov@gmail.com>
References: <1342763209-28029-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <20120720080204.GO30009@pengutronix.de>

On Fri, Jul 20, 2012 at 09:46:49AM +0400, Antony Pavlov wrote:
> The name "serial_ns16550" is not handy because the devices
> will have the names like "serial_ns165500", "serial_ns165501",
> "serial_ns165502" etc.
> 
> The names like "ns16550_serial0" and "ns16550_serial1" look
> much better.
> 
> Also it is reasonable to make serial driver's names unification.
> E.g. see the names for drivers in drivers/serial directory:
>  "netx_serial",
>  "mpc5xxx_serial",
>  "altera_serial",
>  "s3c_serial",
>  "imx_serial",
>  "pxa_serial",
>  "blackfin_serial",
>  "stm_serial",
>  "pl010_serial",
> and even "g_serial" in ./drivers/usb/gadget/serial.c

Good idea. Applied.

Sascha

> 
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  drivers/serial/serial_ns16550.c |    2 +-
>  include/driver.h                |    2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c
> index 820aac5..1248bd6 100644
> --- a/drivers/serial/serial_ns16550.c
> +++ b/drivers/serial/serial_ns16550.c
> @@ -263,7 +263,7 @@ static int ns16550_probe(struct device_d *dev)
>   * @brief Driver registration structure
>   */
>  static struct driver_d ns16550_serial_driver = {
> -	.name = "serial_ns16550",
> +	.name = "ns16550_serial",
>  	.probe = ns16550_probe,
>  };
>  
> diff --git a/include/driver.h b/include/driver.h
> index 7d597b4..0a8dc8e 100644
> --- a/include/driver.h
> +++ b/include/driver.h
> @@ -226,7 +226,7 @@ struct NS16550_plat;
>  static inline struct device_d *add_ns16550_device(int id, resource_size_t start,
>  		resource_size_t size, int flags, struct NS16550_plat *pdata)
>  {
> -	return add_generic_device("serial_ns16550", id, NULL, start, size,
> +	return add_generic_device("ns16550_serial", id, NULL, start, size,
>  				  IORESOURCE_MEM | flags, pdata);
>  }
>  
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 20 04:04:35 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 10:04:35 +0200
Subject: USB On PCM043?
In-Reply-To: <loom.20120719T224910-551@post.gmane.org>
References: <loom.20120719T173418-826@post.gmane.org>
 <20120719161139.GB30009@pengutronix.de>
 <loom.20120719T224910-551@post.gmane.org>
Message-ID: <20120720080435.GP30009@pengutronix.de>

On Thu, Jul 19, 2012 at 08:56:35PM +0000, Jerry Kirk wrote:
> > > We have been attempting to get USB Host mode working under Barebox(2012-07-0)
> > > a PCM043 platform (i.mx35), but we are having a bit of trouble.
> > 
> > Could it be that the USB clock operates at the wrong rate? I think it
> > should be 60MHz.
> 
> We're not certain how to verify the clock setting for USB in Barebox.
> We have used "dump_clocks" but are not certain which of these clocks
> the USB clock is derived from. We think we have it set to the same
> settings as the Eukrea board.

The i.MX SoCs have a clko pin which can be muxed to different clocks. I
don't know if this is accessible on the pcm043, but if yes, you could
switch it to the USB clock and measure the clock.
Otherwise it might be good to run a current -rc kernel, you can then
see the complete clock tree in debugfs

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From shc_work at mail.ru  Fri Jul 20 04:05:21 2012
From: shc_work at mail.ru (=?UTF-8?B?QWxleGFuZGVyIFNoaXlhbg==?=)
Date: Fri, 20 Jul 2012 12:05:21 +0400
Subject: =?UTF-8?B?UmVbMl06IFtQQVRDSCAxLzZdIG1jMTN4eHg6IERlZmluZSBtYXhpbXVtIFNQ?=
 =?UTF-8?B?SSBjbG9jayBmcmVxdWVuY3kgZ2xvYmFsIHRvIGRyaXZlcg==?=
In-Reply-To: <20120719175512.GD30009@pengutronix.de>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
 <20120719175512.GD30009@pengutronix.de>
Message-ID: <1342771521.408579760@f31.mail.ru>

Hello.

Thu, 19 Jul 2012 19:55:12 +0200 ?? Sascha Hauer <s.hauer at pengutronix.de>:
> On Thu, Jul 19, 2012 at 07:30:12PM +0400, Alexander Shiyan wrote:
>  > This patch provide setup for SPI clk frequency global to driver.
>  > For MC13783 maximum clock frequency is 20 MHz,
>  > for MC13892 maximum clock frequency is 26 MHz,
>  > so we define 20 MHz as a maximum SPI clk.
>  > 
>  > Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
>  > ---
>  > arch/arm/boards/ccxmx51/ccxmx51.c | 1 -
>  > arch/arm/boards/freescale-mx51-pdk/board.c | 1 -
>  > arch/arm/boards/pcm038/pcm038.c | 1 -
>  > drivers/mfd/mc13xxx.c | 1 +
>  > 4 files changed, 1 insertions(+), 3 deletions(-)
>  > 
>  > diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c
>  > index f494174..f309e0c 100644
>  > --- a/arch/arm/boards/ccxmx51/ccxmx51.c
>  > +++ b/arch/arm/boards/ccxmx51/ccxmx51.c
>  > @@ -191,7 +191,6 @@ static struct spi_imx_master ecspi_0_data = {
>  > static const struct spi_board_info ccxmx51_spi_board_info[] = {
>  > {
>  > .name = "mc13xxx-spi",
>  > - .max_speed_hz = 6000000,
>  > .bus_num = 0,
>  > .chip_select = 0,
>  > },
>  > diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
>  > index 3a568d0..7c2c8fe 100644
>  > --- a/arch/arm/boards/freescale-mx51-pdk/board.c
>  > +++ b/arch/arm/boards/freescale-mx51-pdk/board.c
>  > @@ -117,7 +117,6 @@ static struct spi_imx_master spi_0_data = {
>  > static const struct spi_board_info mx51_babbage_spi_board_info[] = {
>  > {
>  > .name = "mc13xxx-spi",
>  > - .max_speed_hz = 300000,
>  > .bus_num = 0,
>  > .chip_select = 0,
>  > },
>  > diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
>  > index badc978..fa82b02 100644
>  > --- a/arch/arm/boards/pcm038/pcm038.c
>  > +++ b/arch/arm/boards/pcm038/pcm038.c
>  > @@ -59,7 +59,6 @@ static struct spi_imx_master pcm038_spi_0_data = {
>  > static struct spi_board_info pcm038_spi_board_info[] = {
>  > {
>  > .name = "mc13xxx-spi",
>  > - .max_speed_hz = 3000000,
>  > .bus_num = 0,
>  > .chip_select = 0,
>  > }
>  > diff --git a/drivers/mfd/mc13xxx.c b/drivers/mfd/mc13xxx.c
>  > index 2934e9d..8bb0d00 100644
>  > --- a/drivers/mfd/mc13xxx.c
>  > +++ b/drivers/mfd/mc13xxx.c
>  > @@ -297,6 +297,7 @@ static int mc_probe(struct device_d *dev, enum mc13xxx_mode mode)
>  > mc_dev->spi = dev->type_data;
>  > mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
>  > mc_dev->spi->bits_per_word = 32;
>  > + mc_dev->spi->max_speed_hz = 20000000;
> 
>  The values indeed look quite arbitrary, but it may be that a hardware
>  design does not support such high frequencies. Maybe better
> 
>  if (!mc_dev->spi->max_speed_hz)
>  mc_dev->spi->max_speed_hz = 20000000
> 
>  ?
On my opinion, tests for supported speed, is work for SPI-driver, not for device driver.
Is not it?

From shc_work at mail.ru  Fri Jul 20 04:08:15 2012
From: shc_work at mail.ru (=?UTF-8?B?QWxleGFuZGVyIFNoaXlhbg==?=)
Date: Fri, 20 Jul 2012 12:08:15 +0400
Subject: =?UTF-8?B?UmVbMl06IFtQQVRDSCAzLzZdIG1jMTN4eHg6IEFkZGVkIGR1bW15IGRlZmlu?=
 =?UTF-8?B?aXRpb24gZm9yIG1jMTN4eHhfZ2V0KCkgaWYgQ09ORklHX01GRF9NQzEzWFhY?=
 =?UTF-8?B?IGlzIG5vdCBzZXQ=?=
In-Reply-To: <20120719175606.GE30009@pengutronix.de>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
 <1342711817-866-3-git-send-email-shc_work@mail.ru>
 <20120719175606.GE30009@pengutronix.de>
Message-ID: <1342771695.152242357@f98.mail.ru>

Hello.

Thu, 19 Jul 2012 19:56:06 +0200 ?? Sascha Hauer <s.hauer at pengutronix.de>:
> On Thu, Jul 19, 2012 at 07:30:14PM +0400, Alexander Shiyan wrote:
>  > 
>  > Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
>  > ---
>  > arch/arm/boards/pcm038/pcm038.c | 2 --
>  > include/mfd/mc13xxx.h | 4 ++++
>  > 2 files changed, 4 insertions(+), 2 deletions(-)
>  > 
>  > diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
>  > index fa82b02..875081b 100644
>  > --- a/arch/arm/boards/pcm038/pcm038.c
>  > +++ b/arch/arm/boards/pcm038/pcm038.c
>  > @@ -124,7 +124,6 @@ static inline uint32_t get_pll_spctl10(void)
>  > */ 
>  > static int pcm038_power_init(void)
>  > {
>  > -#ifdef CONFIG_MFD_MC13XXX
>  > uint32_t spctl0 = get_pll_spctl10();
>  > struct mc13xxx *mc13xxx = mc13xxx_get();
>  > 
>  > @@ -158,7 +157,6 @@ static int pcm038_power_init(void)
>  > printf("Failed to initialize PMIC. Will continue with low CPU speed\n");
>  > }
>  > }
>  > -#endif
>  > 
>  > /* clock gating enable */ 
>  > GPCR = 0x00050f08;
>  > diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h
>  > index 2880307..51cfdd9 100644
>  > --- a/include/mfd/mc13xxx.h
>  > +++ b/include/mfd/mc13xxx.h
>  > @@ -163,7 +163,11 @@ struct mc13xxx {
>  > int revision;
>  > };
>  > 
>  > +#ifdef CONFIG_MFD_MC13XXX
>  > extern struct mc13xxx *mc13xxx_get(void);
>  > +#else
>  > +#define mc13xxx_get() (NULL)
> 
>  Better a static inline function.

OK, modified version of patch will be sent in new thread.

From s.hauer at pengutronix.de  Fri Jul 20 04:11:36 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 10:11:36 +0200
Subject: [PATCH 1/6] mc13xxx: Define maximum SPI clock frequency global
 to driver
In-Reply-To: <1342771521.408579760@f31.mail.ru>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
 <20120719175512.GD30009@pengutronix.de>
 <1342771521.408579760@f31.mail.ru>
Message-ID: <20120720081136.GQ30009@pengutronix.de>

On Fri, Jul 20, 2012 at 12:05:21PM +0400, Alexander Shiyan wrote:
> > 
> >  The values indeed look quite arbitrary, but it may be that a hardware
> >  design does not support such high frequencies. Maybe better
> > 
> >  if (!mc_dev->spi->max_speed_hz)
> >  mc_dev->spi->max_speed_hz = 20000000
> > 
> >  ?
> On my opinion, tests for supported speed, is work for SPI-driver, not for device driver.
> Is not it?

So you mean that the i.MX spi drivers platform data should have a
maximum speed field instead of the client drivers? Sounds good.
In this case we can apply the patch.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From shc_work at mail.ru  Fri Jul 20 04:17:49 2012
From: shc_work at mail.ru (=?UTF-8?B?QWxleGFuZGVyIFNoaXlhbg==?=)
Date: Fri, 20 Jul 2012 12:17:49 +0400
Subject: =?UTF-8?B?UmVbMl06IFtQQVRDSCAxLzZdIG1jMTN4eHg6IERlZmluZSBtYXhpbXVtIFNQ?=
 =?UTF-8?B?SSBjbG9jayBmcmVxdWVuY3kgZ2xvYmFsIHRvIGRyaXZlcg==?=
In-Reply-To: <20120720081136.GQ30009@pengutronix.de>
References: <1342711817-866-1-git-send-email-shc_work@mail.ru>
 <1342771521.408579760@f31.mail.ru> <20120720081136.GQ30009@pengutronix.de>
Message-ID: <1342772269.79937327@f350.mail.ru>

Hello.

Fri, 20 Jul 2012 10:11:36 +0200 ?? Sascha Hauer <s.hauer at pengutronix.de>:
> On Fri, Jul 20, 2012 at 12:05:21PM +0400, Alexander Shiyan wrote:
>  > > 
>  > > The values indeed look quite arbitrary, but it may be that a hardware
>  > > design does not support such high frequencies. Maybe better
>  > > 
>  > > if (!mc_dev->spi->max_speed_hz)
>  > > mc_dev->spi->max_speed_hz = 20000000
>  > > 
>  > > ?
>  > On my opinion, tests for supported speed, is work for SPI-driver, not for device driver.
>  > Is not it?
> 
>  So you mean that the i.MX spi drivers platform data should have a
>  maximum speed field instead of the client drivers? Sounds good.
>  In this case we can apply the patch.

No additional fields required. We are pass max_speed_hz option in the SPI-driver
to clock divider, so frequency cannot be higher than possible. Fixme.

From s.hauer at pengutronix.de  Fri Jul 20 04:40:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 10:40:37 +0200
Subject: [PATCH] ARM: add the vendor 'FriendlyARM' to its board's
 directory names
In-Reply-To: <1342728533-3750-1-git-send-email-jbe@pengutronix.de>
References: <1342728533-3750-1-git-send-email-jbe@pengutronix.de>
Message-ID: <20120720084037.GR30009@pengutronix.de>

On Thu, Jul 19, 2012 at 10:08:52PM +0200, Juergen Beisert wrote:
> Since a look into "arch/arm/boards/" offers various boards starting with the
> vendor's name in their directory name (like 'eukrea' and 'freescale').
> This patch does the same with the currently existing FriendlyARM boards
> Mini2440 and Tiny210.
> 
> Note: I hope I have used the '-M' parameter in a correct manner ;)

Yes, you did ;)

There is another problem though: Please do not send pull requests based
on next. next is not stable and gets remerged from the topic branches.
In this case the tiny210 is sitting in next, so you can send a rename
patch for this board. I'll squash it into the original patch adding this
board. The rename for the mini2440 should be a separate patch based on
master.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From antonynpavlov at gmail.com  Fri Jul 20 04:47:33 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:33 +0400
Subject: [RFC 1/7] MIPS: move start.S code to .text_entry section
In-Reply-To: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <1342774059-2169-2-git-send-email-antonynpavlov@gmail.com>

This commit make possible lowlevel initialisation code
in the text_bare_init section.

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/boot/start.S |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/boot/start.S b/arch/mips/boot/start.S
index dd302fc..10f7691 100644
--- a/arch/mips/boot/start.S
+++ b/arch/mips/boot/start.S
@@ -50,7 +50,7 @@ _pc:	addiu	\rd, ra, \label - _pc		# label is assumed to be
 
 	.set noreorder
 	.text
-	.section ".text_bare_init"
+	.section ".text_entry"
 	.align 4
 
 EXPORT(_start)
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul 20 04:47:32 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:32 +0400
Subject: [WIP] add very basic ELF support on MIPS
Message-ID: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>

This patch series introduces the basic ELF files support
for bootm command on MIPS based on kexec.

The goal of this work is ELF linux kernel loading for MIPS.

The patches 1-3 used to introduce per-arch low-level init for MIPS.

The patch 4 adds the nessesary low-level initialisation for
qemu-malta suitable for Linux kernel.

Just now barebox for MIPS32 has no support for cache, so
this patch series tries to overcome this disadvantage in
patch 5.

The patch 6 introduce memory region for loading ELFs on qemu-malta.

At last the patch 7 introduces kexec infrastructure for ELF loading.

Current problems:
 * there is no Linux kernel cmdline support;
 * the code is not clean (e.g. there are some '#if 0' and
   some unused declarations);
 * barebox already has ELF support for modules, but
   this patch series just has no integration with it.

This patch series and one additional huge patch with sample
Linux ELF image for malta can be found at
 https://github.com/frantony/barebox/tree/next.mips-malta-elf-linux.20120720

[RFC 1/7] MIPS: move start.S code to .text_entry section
[RFC 2/7] MIPS: add the initial support for lowlevel init
[RFC 3/7] MIPS: malta: add bogus lowlevel init
[RFC 4/7] MIPS: malta: add YAMON-style GT64120 memory map
[RFC 5/7] MIPS: malta: make KSEG0 uncached
[RFC 6/7] MIPS: qemu-malta: add KSEG0 memory region
[RFC 7/7] bootm: add very basic ELF support on MIPS (stealed from


From antonynpavlov at gmail.com  Fri Jul 20 04:47:34 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:34 +0400
Subject: [RFC 2/7] MIPS: add the initial support for lowlevel init
In-Reply-To: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <1342774059-2169-3-git-send-email-antonynpavlov@gmail.com>

This commit introduce the initial support for
machine specific lowlevel initialization
(e.g. RAM controller or cache memory).

To return from mach_init_lowlevel() it uses
explicit mach_init_lowlevel_return label.
This saves ra register for using inside mach_init_lowlevel()

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/boot/start.S |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/mips/boot/start.S b/arch/mips/boot/start.S
index 10f7691..238e2c4 100644
--- a/arch/mips/boot/start.S
+++ b/arch/mips/boot/start.S
@@ -74,6 +74,14 @@ __start:
 	and	k0, k1
 	mtc0	k0, CP0_STATUS
 
+#ifdef CONFIG_MACH_DO_LOWLEVEL_INIT
+	b	mach_init_lowlevel
+	 nop
+
+mach_init_lowlevel_return:
+EXPORT(mach_init_lowlevel_return)
+#endif
+
 	/* copy barebox to link location */
 	ADR	a0, _start, t1	/* a0 <- pc-relative position of _start */
 
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul 20 04:47:36 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:36 +0400
Subject: [RFC 4/7] MIPS: malta: add YAMON-style GT64120 memory map
In-Reply-To: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <1342774059-2169-5-git-send-email-antonynpavlov@gmail.com>

YAMON-style GT64120 memory map make move UART to the new position.

We need YAMON-style GT64120 memory for running Linux kernel from
barebox.

WARNING! WIP! We need add some more effor for compartability
with qemu embedded YAMON.

E.g. we need put special Board ID at the start of bootrom:

--- a/arch/mips/boot/start.S
+++ b/arch/mips/boot/start.S
@@ -59,6 +59,10 @@ EXPORT(_start)
         nop

        .org    0x10
+#if 1
+       /* Board ID = 0x420 (Malta Board with CoreLV) */
+       .word   0x00000420
+#endif

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/mach-malta/include/mach/hardware.h |    2 +-
 arch/mips/mach-malta/lowlevel_init.S         |   33 +++++++++++++++++++++++++-
 2 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/arch/mips/mach-malta/include/mach/hardware.h b/arch/mips/mach-malta/include/mach/hardware.h
index ddeb1b7..fde8f22 100644
--- a/arch/mips/mach-malta/include/mach/hardware.h
+++ b/arch/mips/mach-malta/include/mach/hardware.h
@@ -21,7 +21,7 @@
 #ifndef __INCLUDE_ARCH_HARDWARE_H__
 #define   __INCLUDE_ARCH_HARDWARE_H__
 
-#define DEBUG_LL_UART_ADDR	0xb00003f8
+#define DEBUG_LL_UART_ADDR	0xb80003f8
 #define DEBUG_LL_UART_SHIFT	0
 
 /*
diff --git a/arch/mips/mach-malta/lowlevel_init.S b/arch/mips/mach-malta/lowlevel_init.S
index a34de74..a0134f8 100644
--- a/arch/mips/mach-malta/lowlevel_init.S
+++ b/arch/mips/mach-malta/lowlevel_init.S
@@ -29,7 +29,38 @@
 
 LEAF(mach_init_lowlevel)
 
-	/* nothing special yet */
+	/*
+	 * Load BAR registers of GT64120 as done by YAMON
+	 *
+	 * based on write_bootloader() in qemu.git/hw/mips_malta.c
+	 * see GT64120 manual and qemu.git/hw/gt64xxx.c for details
+	 *
+	 * This is big-endian version of code!
+	 */
+
+	/* move GT64120 registers to 0x1be00000 */
+	lui	t1, 0xb400
+	lui	t0, 0xdf00
+	sw	t0, 104(t1)
+
+	/* setup MEM-to-PCI0 mapping */
+	lui	t1, 0xbbe0
+
+	/* setup PCI0 io window to 18000000-181fffff */
+	lui	t0, 0xc000
+	sw	t0, 72(t1) /* GT_PCI0IOLD */
+	lui	t0, 0x4000
+	sw	t0, 80(t1) /* GT_PCI0IOHD */
+
+	/* setup PCI0 mem windows */
+	lui	t0, 0x8000
+	sw	t0, 88(t1) /* GT_PCI0M0LD */
+	lui	t0, 0x3f00
+	sw	t0, 96(t1) /* GT_PCI0M0HD */
+	lui	t0, 0xc100
+	sw	t0, 128(t1) /* GT_PCI0M1LD */
+	lui	t0, 0x5e00
+	sw	t0, 136(t1) /* GT_PCI0M1HD */
 
 	/* return */
 	b	mach_init_lowlevel_return
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul 20 04:47:35 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:35 +0400
Subject: [RFC 3/7] MIPS: malta: add bogus lowlevel init
In-Reply-To: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <1342774059-2169-4-git-send-email-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/Kconfig                    |    1 +
 arch/mips/mach-malta/Makefile        |    1 +
 arch/mips/mach-malta/lowlevel_init.S |   37 ++++++++++++++++++++++++++++++++++
 3 files changed, 39 insertions(+)
 create mode 100644 arch/mips/mach-malta/lowlevel_init.S

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7a1eeac..92dad9f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -36,6 +36,7 @@ config MACH_MIPS_MALTA
 	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_BIG_ENDIAN
 	select HAS_DEBUG_LL
+	select MACH_HAS_LOWLEVEL_INIT
 
 config MACH_MIPS_BCM47XX
 	bool "Broadcom BCM47xx-based boards"
diff --git a/arch/mips/mach-malta/Makefile b/arch/mips/mach-malta/Makefile
index f3cc668..f4cb8f2 100644
--- a/arch/mips/mach-malta/Makefile
+++ b/arch/mips/mach-malta/Makefile
@@ -1 +1,2 @@
 obj-y += reset.o
+obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += lowlevel_init.o
diff --git a/arch/mips/mach-malta/lowlevel_init.S b/arch/mips/mach-malta/lowlevel_init.S
new file mode 100644
index 0000000..a34de74
--- /dev/null
+++ b/arch/mips/mach-malta/lowlevel_init.S
@@ -0,0 +1,37 @@
+/*
+ * Lowlevel init code for MIPS malta
+ *
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov at gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <config.h>
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+
+	.section ".text_bare_init"
+
+LEAF(mach_init_lowlevel)
+
+	/* nothing special yet */
+
+	/* return */
+	b	mach_init_lowlevel_return
+	 nop
+END(mach_init_lowlevel)
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul 20 04:47:37 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:37 +0400
Subject: [RFC 5/7] MIPS: malta: make KSEG0 uncached
In-Reply-To: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <1342774059-2169-6-git-send-email-antonynpavlov@gmail.com>

On MIPS as usual KSEG0 segment used for cached memory access,
and Linux kernel linked to KSEG0.

As just now we don't have cache memory support on MIPS,
we can change the KSEG0 mode (make it uncached) and
use it without any danger.

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/mach-malta/lowlevel_init.S |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/mach-malta/lowlevel_init.S b/arch/mips/mach-malta/lowlevel_init.S
index a0134f8..368c2fe 100644
--- a/arch/mips/mach-malta/lowlevel_init.S
+++ b/arch/mips/mach-malta/lowlevel_init.S
@@ -62,6 +62,10 @@ LEAF(mach_init_lowlevel)
 	lui	t0, 0x5e00
 	sw	t0, 136(t1) /* GT_PCI0M1HD */
 
+	/* make KSEG0 uncached */
+	li	t0, CONF_CM_UNCACHED
+	mtc0	t0, CP0_CONFIG
+
 	/* return */
 	b	mach_init_lowlevel_return
 	 nop
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul 20 04:47:38 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:38 +0400
Subject: [RFC 6/7] MIPS: qemu-malta: add KSEG0 memory region
In-Reply-To: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <1342774059-2169-7-git-send-email-antonynpavlov@gmail.com>

As most of ELF files are linked to KSEG0,
we need declaration for memory region (KSEG0)
for loading ELF files.

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/boards/qemu-malta/init.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/boards/qemu-malta/init.c b/arch/mips/boards/qemu-malta/init.c
index 0efc92a..1dd268f 100644
--- a/arch/mips/boards/qemu-malta/init.c
+++ b/arch/mips/boards/qemu-malta/init.c
@@ -34,6 +34,7 @@
 static int malta_mem_init(void)
 {
 	barebox_add_memory_bank("ram0", 0xa0000000, SZ_256M);
+	barebox_add_memory_bank("cram0", 0x80000000, SZ_256M);
 
 	return 0;
 }
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul 20 04:47:39 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 12:47:39 +0400
Subject: [RFC 7/7] bootm: add very basic ELF support on MIPS (stealed from
 kexec)
In-Reply-To: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <1342774059-2169-8-git-send-email-antonynpavlov@gmail.com>

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/include/asm/elf.h    |    8 +-
 arch/mips/lib/Makefile         |    2 +
 arch/mips/lib/kexec-elf-mips.c |   85 +++++
 arch/mips/lib/kexec-mips.c     |   66 ++++
 arch/mips/lib/kexec-mips.h     |   26 ++
 common/filetype.c              |    4 +
 include/filetype.h             |    1 +
 lib/Makefile                   |    1 +
 lib/kexec/Makefile             |    1 +
 lib/kexec/kexec-elf-core.c     |   30 ++
 lib/kexec/kexec-elf-exec.c     |  182 +++++++++
 lib/kexec/kexec-elf.c          |  796 ++++++++++++++++++++++++++++++++++++++++
 lib/kexec/kexec-elf.h          |  132 +++++++
 lib/kexec/kexec.c              |  299 +++++++++++++++
 lib/kexec/kexec.h              |  188 ++++++++++
 lib/kexec/unused.h             |   15 +
 16 files changed, 1835 insertions(+), 1 deletion(-)
 create mode 100644 arch/mips/lib/kexec-elf-mips.c
 create mode 100644 arch/mips/lib/kexec-mips.c
 create mode 100644 arch/mips/lib/kexec-mips.h
 create mode 100644 lib/kexec/Makefile
 create mode 100644 lib/kexec/kexec-elf-core.c
 create mode 100644 lib/kexec/kexec-elf-exec.c
 create mode 100644 lib/kexec/kexec-elf.c
 create mode 100644 lib/kexec/kexec-elf.h
 create mode 100644 lib/kexec/kexec.c
 create mode 100644 lib/kexec/kexec.h
 create mode 100644 lib/kexec/unused.h

diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index b8b8219..bf974f5 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -17,12 +17,18 @@
 
 #ifndef ELF_ARCH
 
+/* Legal values for e_machine (architecture).  */
+
+#define EM_MIPS		 8		/* MIPS R3000 big-endian */
+#define EM_MIPS_RS4_BE	10		/* MIPS R4000 big-endian */
+
 #ifdef CONFIG_32BIT
 
 /*
  * This is used to ensure we don't load something for the wrong architecture.
  */
-#define elf_check_arch(hdr)						\
+#define elf_check_arch(x) ((x)->e_machine == EM_MIPS)
+
 /*
  * These are used to set parameters in the core dumps.
  */
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index b99bb71..e520209 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -11,3 +11,5 @@ obj-$(CONFIG_CPU_MIPS64) += c-r4k.o
 
 obj-$(CONFIG_CMD_MIPS_CPUINFO) += cpuinfo.o
 obj-$(CONFIG_CMD_BOOTM)	+= bootm.o
+
+obj-y += kexec-mips.o kexec-elf-mips.o
diff --git a/arch/mips/lib/kexec-elf-mips.c b/arch/mips/lib/kexec-elf-mips.c
new file mode 100644
index 0000000..68c0043
--- /dev/null
+++ b/arch/mips/lib/kexec-elf-mips.c
@@ -0,0 +1,85 @@
+/*
+ * kexec-elf-mips.c - kexec Elf loader for mips
+ * Copyright (C) 2007 Francesco Chiechi, Alessandro Rubini
+ * Copyright (C) 2007 Tvblob s.r.l.
+ *
+ * derived from ../ppc/kexec-elf-ppc.c
+ * Copyright (C) 2004 Albert Herranz
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2.  See the file COPYING for more details.
+*/
+
+#define _GNU_SOURCE
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <linux/types.h>
+#include <fcntl.h>
+#include <elf.h>
+#include "../../../lib/kexec/kexec.h"
+#include "../../../lib/kexec/kexec-elf.h"
+#include "kexec-mips.h"
+
+static const int probe_debug = 0;
+
+int elf_mips_probe(const char *buf, off_t len)
+{
+	struct mem_ehdr ehdr;
+	int result;
+
+	result = build_elf_exec_info(buf, len, &ehdr, 0);
+	if (result < 0) {
+		goto out;
+	}
+
+	/* Verify the architecuture specific bits */
+	if (ehdr.e_machine != EM_MIPS) {
+		/* for a different architecture */
+		if (probe_debug) {
+			fprintf(stderr, "Not for this architecture.\n");
+		}
+		result = -1;
+		goto out;
+	}
+	result = 0;
+ out:
+	free_elf_info(&ehdr);
+
+	return result;
+}
+
+int elf_mips_load(const char *buf, off_t len, struct kexec_info *info)
+{
+	struct mem_ehdr ehdr;
+	int result;
+	unsigned long cmdline_addr;
+	size_t i;
+
+	result = build_elf_exec_info(buf, len, &ehdr, 0);
+	if (result < 0)
+		die("ELF exec parse failed\n");
+
+	/* Read in the PT_LOAD segments and remove CKSEG0 mask from address*/
+	for (i = 0; i < ehdr.e_phnum; i++) {
+		struct mem_phdr *phdr;
+		phdr = &ehdr.e_phdr[i];
+		if (phdr->p_type == PT_LOAD) {
+			/* FIXME: skipped */
+//			phdr->p_paddr = virt_to_phys(phdr->p_paddr);
+		}
+	}
+
+	/* Load the Elf data */
+	result = elf_exec_load(&ehdr, info);
+	if (result < 0)
+		die("ELF exec load failed\n");
+
+	/* FIXME */
+	info->entry = ehdr.e_entry;
+#if 0
+	info->entry = (void *)virt_to_phys(ehdr.e_entry);
+#endif
+	return 0;
+}
diff --git a/arch/mips/lib/kexec-mips.c b/arch/mips/lib/kexec-mips.c
new file mode 100644
index 0000000..0fdb988
--- /dev/null
+++ b/arch/mips/lib/kexec-mips.c
@@ -0,0 +1,66 @@
+/*
+ * kexec-mips.c - kexec for mips
+ * Copyright (C) 2007 Francesco Chiechi, Alessandro Rubini
+ * Copyright (C) 2007 Tvblob s.r.l.
+ *
+ * derived from ../ppc/kexec-mips.c
+ * Copyright (C) 2004, 2005 Albert Herranz
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2.  See the file COPYING for more details.
+ */
+
+#include <stddef.h>
+#include <stdio.h>
+#include <errno.h>
+#include <string.h>
+#include "../../../lib/kexec/kexec.h"
+#include "kexec-mips.h"
+
+static struct memory_range memory_range[MAX_MEMORY_RANGES];
+
+/* Return a sorted list of memory ranges. */
+int get_memory_ranges(struct memory_range **range, int *ranges,
+		      unsigned long UNUSED(kexec_flags))
+{
+	int memory_ranges = 0;
+
+	memory_range[memory_ranges].start = 0;
+	memory_range[memory_ranges].end = 256 * 1024 * 1024;
+	memory_range[memory_ranges].type = RANGE_RAM;
+	memory_ranges++;
+
+	*range = memory_range;
+	*ranges = memory_ranges;
+	return 0;
+}
+
+struct kexec_file_type kexec_file_type[] = {
+	{"elf-mips", elf_mips_probe, elf_mips_load, /*elf_mips_usage*/ NULL},
+};
+int kexec_file_types = sizeof(kexec_file_type) / sizeof(kexec_file_type[0]);
+
+#ifdef __mips64
+struct arch_options_t arch_options = {
+	.core_header_type = CORE_TYPE_ELF64
+};
+#endif
+
+const struct arch_map_entry arches[] = {
+	/* For compatibility with older patches
+	 * use KEXEC_ARCH_DEFAULT instead of KEXEC_ARCH_MIPS here.
+	 */
+	{ "mips", KEXEC_ARCH_MIPS },
+	{ "mips64", KEXEC_ARCH_MIPS },
+	{ NULL, 0 },
+};
+
+int arch_compat_trampoline(struct kexec_info *UNUSED(info))
+{
+
+	return 0;
+}
+
+void arch_update_purgatory(struct kexec_info *UNUSED(info))
+{
+}
diff --git a/arch/mips/lib/kexec-mips.h b/arch/mips/lib/kexec-mips.h
new file mode 100644
index 0000000..474ba0a
--- /dev/null
+++ b/arch/mips/lib/kexec-mips.h
@@ -0,0 +1,26 @@
+#ifndef KEXEC_MIPS_H
+#define KEXEC_MIPS_H
+
+#define MAX_MEMORY_RANGES  64
+#define MAX_LINE          160
+
+#define CORE_TYPE_ELF32 1
+#define CORE_TYPE_ELF64 2
+extern unsigned char setup_simple_start[];
+extern uint32_t setup_simple_size;
+
+extern struct {
+	uint32_t spr8;
+	uint32_t spr9;
+} setup_simple_regs;
+
+int elf_mips_probe(const char *buf, off_t len);
+int elf_mips_load(/*int argc, char **argv,*/ const char *buf, off_t len,
+	struct kexec_info *info);
+void elf_mips_usage(void);
+
+struct arch_options_t {
+	int      core_header_type;
+};
+
+#endif /* KEXEC_MIPS_H */
diff --git a/common/filetype.c b/common/filetype.c
index 1a5b82d..cdedb4d 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -25,6 +25,7 @@
 #include <fcntl.h>
 #include <fs.h>
 #include <malloc.h>
+#include <elf.h>
 
 static const char *filetype_str[] = {
 	[filetype_unknown] = "unknown",
@@ -40,6 +41,7 @@ static const char *filetype_str[] = {
 	[filetype_aimage] = "Android boot image",
 	[filetype_sh] = "Bourne Shell",
 	[filetype_mips_barebox] = "MIPS barebox image",
+	[filetype_elf] = "ELF",
 };
 
 const char *file_type_to_string(enum filetype f)
@@ -81,6 +83,8 @@ enum filetype file_detect_type(void *_buf)
 		return filetype_aimage;
 	if (strncmp(buf8 + 0x10, "barebox", 7) == 0)
 		return filetype_mips_barebox;
+	if (strncmp(buf8, ELFMAG, 4) == 0)
+		return filetype_elf;
 
 	return filetype_unknown;
 }
diff --git a/include/filetype.h b/include/filetype.h
index f5de8ed..0e84937 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -18,6 +18,7 @@ enum filetype {
 	filetype_aimage,
 	filetype_sh,
 	filetype_mips_barebox,
+	filetype_elf,
 };
 
 const char *file_type_to_string(enum filetype f);
diff --git a/lib/Makefile b/lib/Makefile
index 4e6b1ee..4e2c0b4 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -34,3 +34,4 @@ obj-$(CONFIG_UNCOMPRESS)	+= uncompress.o
 obj-$(CONFIG_BCH)	+= bch.o
 obj-$(CONFIG_BITREV)	+= bitrev.o
 obj-$(CONFIG_QSORT)	+= qsort.o
+obj-y			+= kexec/
diff --git a/lib/kexec/Makefile b/lib/kexec/Makefile
new file mode 100644
index 0000000..f60a22d
--- /dev/null
+++ b/lib/kexec/Makefile
@@ -0,0 +1 @@
+obj-y	+= kexec-elf-exec.o kexec-elf.o kexec-elf-core.o kexec.o
diff --git a/lib/kexec/kexec-elf-core.c b/lib/kexec/kexec-elf-core.c
new file mode 100644
index 0000000..6be8713
--- /dev/null
+++ b/lib/kexec/kexec-elf-core.c
@@ -0,0 +1,30 @@
+#include <common.h>
+#include <linux/types.h>
+
+#include <stdio.h>
+#include <errno.h>
+#include <stdlib.h>
+#include "elf.h"
+#include "kexec-elf.h"
+
+int build_elf_core_info(const char *buf, off_t len, struct mem_ehdr *ehdr,
+				uint32_t flags)
+{
+	int result;
+	result = build_elf_info(buf, len, ehdr, flags);
+	if (result < 0) {
+		return result;
+	}
+	if ((ehdr->e_type != ET_CORE)) {
+		/* not an ELF Core */
+		fprintf(stderr, "Not ELF type ET_CORE\n");
+		return -1;
+	}
+	if (!ehdr->e_phdr) {
+		/* No program header */
+		fprintf(stderr, "No ELF program header\n");
+		return -1;
+	}
+
+	return 0;
+}
diff --git a/lib/kexec/kexec-elf-exec.c b/lib/kexec/kexec-elf-exec.c
new file mode 100644
index 0000000..0d5d5e0
--- /dev/null
+++ b/lib/kexec/kexec-elf-exec.c
@@ -0,0 +1,182 @@
+#include <linux/types.h>
+#include <common.h>
+
+//#include <limits.h>
+//#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <errno.h>
+#include <stdlib.h>
+#include <elf.h>
+//#include <boot/elf_boot.h>
+#include "kexec.h"
+#include "kexec-elf.h"
+
+static const int probe_debug = 0;
+
+int build_elf_exec_info(const char *buf, off_t len, struct mem_ehdr *ehdr,
+				uint32_t flags)
+{
+	struct mem_phdr *phdr, *end_phdr;
+	int result;
+	result = build_elf_info(buf, len, ehdr, flags);
+	if (result < 0) {
+		return result;
+	}
+	if ((ehdr->e_type != ET_EXEC) && (ehdr->e_type != ET_DYN) &&
+	    (ehdr->e_type != ET_CORE)) {
+		/* not an ELF executable */
+		if (probe_debug) {
+			fprintf(stderr, "Not ELF type ET_EXEC or ET_DYN\n");
+		}
+		return -1;
+	}
+	if (!ehdr->e_phdr) {
+		/* No program header */
+		fprintf(stderr, "No ELF program header\n");
+		return -1; 
+	}
+	end_phdr = &ehdr->e_phdr[ehdr->e_phnum];
+	for(phdr = ehdr->e_phdr; phdr != end_phdr; phdr++) {
+		/* Kexec does not support loading interpreters.
+		 * In addition this check keeps us from attempting
+		 * to kexec ordinay executables.
+		 */
+		if (phdr->p_type == PT_INTERP) {
+			fprintf(stderr, "Requires an ELF interpreter\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+int elf_exec_load(struct mem_ehdr *ehdr, struct kexec_info *info)
+{
+	unsigned long base;
+	int result;
+	size_t i;
+
+	if (!ehdr->e_phdr) {
+		fprintf(stderr, "No program header?\n");
+		result = -1;
+		goto out;
+	}
+
+	/* If I have a dynamic executable find it's size
+	 * and then find a location for it in memory.
+	 */
+	base = 0;
+	if (ehdr->e_type == ET_DYN) {
+		unsigned long first, last, align;
+		first = ULONG_MAX;
+		last  = 0;
+		align = 0;
+		for(i = 0; i < ehdr->e_phnum; i++) {
+			unsigned long start, stop;
+			struct mem_phdr *phdr;
+			phdr = &ehdr->e_phdr[i];
+			if ((phdr->p_type != PT_LOAD) ||
+				(phdr->p_memsz == 0))
+			{
+				continue;
+			}
+			start = phdr->p_paddr;
+			stop  = start + phdr->p_memsz;
+			if (first > start) {
+				first = start;
+			}
+			if (last < stop) {
+				last = stop;
+			}
+			if (align < phdr->p_align) {
+				align = phdr->p_align;
+			}
+		}
+		/* If I can't use the default paddr find a new
+		 * hole for the dynamic executable.
+		 */
+#if 0
+		if (!valid_memory_range(info, first, last)) {
+			unsigned long hole;
+			hole = locate_hole(info,
+				last - first + 1, align, 
+				0, elf_max_addr(ehdr), 1);
+			if (hole == ULONG_MAX) {
+				result = -1;
+				goto out;
+			}
+			/* Base is the value that when added
+			 * to any virtual address in the file
+			 * yields it's load virtual address.
+			 */
+			base = hole - first;
+		}
+#endif
+	}
+
+	printf("reading in the PT_LOAD segments\n");
+	/* Read in the PT_LOAD segments */
+	for(i = 0; i < ehdr->e_phnum; i++) {
+		struct mem_phdr *phdr;
+		size_t size;
+		phdr = &ehdr->e_phdr[i];
+		printf("    found segment %d p_type = %08x\n", i, phdr->p_type);
+		if (phdr->p_type != PT_LOAD) {
+			continue;
+		}
+		size = phdr->p_filesz;
+		if (size > phdr->p_memsz) {
+			size = phdr->p_memsz;
+		}
+
+		printf("    add_segment(phdr->p_data = %08x, size = %08x, phdr->p_paddr =%08x, base = %08x, phdr->p_memsz = %08x)\n",
+		phdr->p_data, size, phdr->p_paddr, base, phdr->p_memsz);
+#if 0
+		add_segment(info,
+			phdr->p_data, size,
+			phdr->p_paddr + base, phdr->p_memsz);
+#endif
+
+		{
+			struct resource *elf_resource;
+			resource_size_t start;
+
+			/* FIXME */
+			start = phdr->p_vaddr;
+			elf_resource = request_sdram_region("elf",
+				start, size);
+			if (!elf_resource) {
+				printf("unable to request SDRAM 0x%08x-0x%08x\n",
+					start, start + size - 1);
+				result = -1;
+				goto out;
+			}
+			memcpy(start, phdr->p_data, size);
+		}
+	}
+
+	/* Update entry point to reflect new load address*/
+	ehdr->e_entry += base;
+
+	result = 0;
+ out:
+	return result;
+}
+
+void elf_exec_build_load(struct kexec_info *info, struct mem_ehdr *ehdr,
+	const char *buf, off_t len, uint32_t flags)
+{
+	int result;
+	/* Parse the Elf file */
+	result = build_elf_exec_info(buf, len, ehdr, flags);
+	if (result < 0) {
+		die("ELF exec parse failed\n");
+	}
+
+	/* Load the Elf data */
+	result = elf_exec_load(ehdr, info);
+	if (result < 0) {
+		die("ELF exec load failed\n");
+	}
+}
diff --git a/lib/kexec/kexec-elf.c b/lib/kexec/kexec-elf.c
new file mode 100644
index 0000000..4459afa
--- /dev/null
+++ b/lib/kexec/kexec-elf.c
@@ -0,0 +1,796 @@
+#include <linux/types.h>
+#include <common.h>
+
+// FIXME: need UINT64_MAX
+//#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <errno.h>
+#include <stdlib.h>
+#include "elf.h"
+#include "kexec.h"
+#include "kexec-elf.h"
+
+static const int probe_debug = 0;
+
+uint16_t elf16_to_cpu(const struct mem_ehdr *ehdr, uint16_t value)
+{
+	if (ehdr->ei_data == ELFDATA2LSB) {
+		value = le16_to_cpu(value);
+	}
+	else if (ehdr->ei_data == ELFDATA2MSB) {
+		value = be16_to_cpu(value);
+	}
+	return value;
+}
+
+uint32_t elf32_to_cpu(const struct mem_ehdr *ehdr, uint32_t value)
+{
+	if (ehdr->ei_data == ELFDATA2LSB) {
+		value = le32_to_cpu(value);
+	}
+	else if (ehdr->ei_data == ELFDATA2MSB) {
+		value = be32_to_cpu(value);
+	}
+	return value;
+}
+
+uint64_t elf64_to_cpu(const struct mem_ehdr *ehdr, uint64_t value)
+{
+	if (ehdr->ei_data == ELFDATA2LSB) {
+		value = le64_to_cpu(value);
+	}
+	else if (ehdr->ei_data == ELFDATA2MSB) {
+		value = be64_to_cpu(value);
+	}
+	return value;
+}
+
+uint16_t cpu_to_elf16(const struct mem_ehdr *ehdr, uint16_t value)
+{
+	if (ehdr->ei_data == ELFDATA2LSB) {
+		value = cpu_to_le16(value);
+	}
+	else if (ehdr->ei_data == ELFDATA2MSB) {
+		value = cpu_to_be16(value);
+	}
+	return value;
+}
+
+uint32_t cpu_to_elf32(const struct mem_ehdr *ehdr, uint32_t value)
+{
+	if (ehdr->ei_data == ELFDATA2LSB) {
+		value = cpu_to_le32(value);
+	}
+	else if (ehdr->ei_data == ELFDATA2MSB) {
+		value = cpu_to_be32(value);
+	}
+	return value;
+}
+
+uint64_t cpu_to_elf64(const struct mem_ehdr *ehdr, uint64_t value)
+{
+	if (ehdr->ei_data == ELFDATA2LSB) {
+		value = cpu_to_le64(value);
+	}
+	else if (ehdr->ei_data == ELFDATA2MSB) {
+		value = cpu_to_be64(value);
+	}
+	return value;
+}
+
+#define ELF32_MAX 0xffffffff
+#define ELF64_MAX 0xffffffffffffffff
+#if ELF64_MAX > ULONG_MAX
+#undef ELF64_MAX
+#define ELF64_MAX ULONG_MAX
+#endif
+
+unsigned long elf_max_addr(const struct mem_ehdr *ehdr)
+{
+	unsigned long max_addr = 0;
+	if (ehdr->ei_class == ELFCLASS32) {
+		max_addr = ELF32_MAX;
+	}
+	else if (ehdr->ei_class == ELFCLASS64) {
+		max_addr = ELF64_MAX;
+	}
+	return max_addr;
+}
+static int build_mem_elf32_ehdr(const char *buf, off_t len, struct mem_ehdr *ehdr)
+{
+	Elf32_Ehdr lehdr;
+#if 0
+	if ((uintmax_t)len < (uintmax_t)sizeof(lehdr)) {
+		/* Buffer is to small to be an elf executable */
+		if (probe_debug) {
+			fprintf(stderr, "Buffer is to small to hold ELF header\n");
+		}
+		return -1;
+	}
+#endif
+	memcpy(&lehdr, buf, sizeof(lehdr));
+	if (elf16_to_cpu(ehdr, lehdr.e_ehsize) != sizeof(Elf32_Ehdr)) {
+		/* Invalid Elf header size */
+		if (probe_debug) {
+			fprintf(stderr, "Bad ELF header size\n");
+		}
+		return -1;
+	}
+	if (elf32_to_cpu(ehdr, lehdr.e_entry) > UINT32_MAX) {
+		/* entry is to large */
+		if (probe_debug) {
+			fprintf(stderr, "ELF e_entry to large\n");
+		}
+		return -1;
+	}
+	if (elf32_to_cpu(ehdr, lehdr.e_phoff) > UINT32_MAX) {
+		/* phoff is to large */
+		if (probe_debug) {
+			fprintf(stderr, "ELF e_phoff to large\n");
+		}
+		return -1;
+	}
+	if (elf32_to_cpu(ehdr, lehdr.e_shoff) > UINT32_MAX) {
+		/* shoff is to large */
+		if (probe_debug) {
+			fprintf(stderr, "ELF e_shoff to large\n");
+		}
+		return -1;
+	}
+	ehdr->e_type      = elf16_to_cpu(ehdr, lehdr.e_type);
+	ehdr->e_machine   = elf16_to_cpu(ehdr, lehdr.e_machine);
+	ehdr->e_version   = elf32_to_cpu(ehdr, lehdr.e_version);
+	ehdr->e_entry     = elf32_to_cpu(ehdr, lehdr.e_entry);
+	ehdr->e_phoff     = elf32_to_cpu(ehdr, lehdr.e_phoff);
+	ehdr->e_shoff     = elf32_to_cpu(ehdr, lehdr.e_shoff);
+	ehdr->e_flags     = elf32_to_cpu(ehdr, lehdr.e_flags);
+	ehdr->e_phnum     = elf16_to_cpu(ehdr, lehdr.e_phnum);
+	ehdr->e_shnum     = elf16_to_cpu(ehdr, lehdr.e_shnum);
+	ehdr->e_shstrndx  = elf16_to_cpu(ehdr, lehdr.e_shstrndx);
+
+	if ((ehdr->e_phnum > 0) &&
+		(elf16_to_cpu(ehdr, lehdr.e_phentsize) != sizeof(Elf32_Phdr)))
+	{
+		/* Invalid program header size */
+		if (probe_debug) {
+			fprintf(stderr, "ELF bad program header size\n");
+		}
+		return -1;
+	}
+	if ((ehdr->e_shnum > 0) &&
+		(elf16_to_cpu(ehdr, lehdr.e_shentsize) != sizeof(Elf32_Shdr)))
+	{
+		/* Invalid section header size */
+		if (probe_debug) {
+			fprintf(stderr, "ELF bad section header size\n");
+		}
+		return -1;
+	}
+
+	return 0;
+}
+
+static int build_mem_elf64_ehdr(const char *buf, off_t len, struct mem_ehdr *ehdr)
+{
+	Elf64_Ehdr lehdr;
+#if 0
+	if ((uintmax_t)len < (uintmax_t)sizeof(lehdr)) {
+		/* Buffer is to small to be an elf executable */
+		if (probe_debug) {
+			fprintf(stderr, "Buffer is to small to hold ELF header\n");
+		}
+		return -1;
+	}
+#endif
+	memcpy(&lehdr, buf, sizeof(lehdr));
+	if (elf16_to_cpu(ehdr, lehdr.e_ehsize) != sizeof(Elf64_Ehdr)) {
+		/* Invalid Elf header size */
+		if (probe_debug) {
+			fprintf(stderr, "Bad ELF header size\n");
+		}
+		return -1;
+	}
+	if (elf32_to_cpu(ehdr, lehdr.e_entry) > UINT32_MAX) {
+		/* entry is to large */
+		if (probe_debug) {
+			fprintf(stderr, "ELF e_entry to large\n");
+		}
+		return -1;
+	}
+	if (elf32_to_cpu(ehdr, lehdr.e_phoff) > UINT32_MAX) {
+		/* phoff is to large */
+		if (probe_debug) {
+			fprintf(stderr, "ELF e_phoff to large\n");
+		}
+		return -1;
+	}
+	if (elf32_to_cpu(ehdr, lehdr.e_shoff) > UINT32_MAX) {
+		/* shoff is to large */
+		if (probe_debug) {
+			fprintf(stderr, "ELF e_shoff to large\n");
+		}
+		return -1;
+	}
+	ehdr->e_type      = elf16_to_cpu(ehdr, lehdr.e_type);
+	ehdr->e_machine   = elf16_to_cpu(ehdr, lehdr.e_machine);
+	ehdr->e_version   = elf32_to_cpu(ehdr, lehdr.e_version);
+	ehdr->e_entry     = elf64_to_cpu(ehdr, lehdr.e_entry);
+	ehdr->e_phoff     = elf64_to_cpu(ehdr, lehdr.e_phoff);
+	ehdr->e_shoff     = elf64_to_cpu(ehdr, lehdr.e_shoff);
+	ehdr->e_flags     = elf32_to_cpu(ehdr, lehdr.e_flags);
+	ehdr->e_phnum     = elf16_to_cpu(ehdr, lehdr.e_phnum);
+	ehdr->e_shnum     = elf16_to_cpu(ehdr, lehdr.e_shnum);
+	ehdr->e_shstrndx  = elf16_to_cpu(ehdr, lehdr.e_shstrndx);
+
+	if ((ehdr->e_phnum > 0) &&
+		(elf16_to_cpu(ehdr, lehdr.e_phentsize) != sizeof(Elf64_Phdr)))
+	{
+		/* Invalid program header size */
+		if (probe_debug) {
+			fprintf(stderr, "ELF bad program header size\n");
+		}
+		return -1;
+	}
+	if ((ehdr->e_shnum > 0) &&
+		(elf16_to_cpu(ehdr, lehdr.e_shentsize) != sizeof(Elf64_Shdr)))
+	{
+		/* Invalid section header size */
+		if (probe_debug) {
+			fprintf(stderr, "ELF bad section header size\n");
+		}
+		return -1;
+	}
+
+	return 0;
+}
+
+static int build_mem_ehdr(const char *buf, off_t len, struct mem_ehdr *ehdr)
+{
+	unsigned char e_ident[EI_NIDENT];
+	int result;
+	memset(ehdr, 0, sizeof(*ehdr));
+#if 0
+	if ((uintmax_t)len < (uintmax_t)sizeof(e_ident)) {
+		/* Buffer is to small to be an elf executable */
+		if (probe_debug) {
+			fprintf(stderr, "Buffer is to small to hold ELF e_ident\n");
+		}
+		return -1;
+	}
+#endif
+	memcpy(e_ident, buf, sizeof(e_ident));
+	if (memcmp(e_ident, ELFMAG, SELFMAG) != 0) {
+		/* No ELF header magic */
+		if (probe_debug) {
+			fprintf(stderr, "NO ELF header magic\n");
+		}
+		return -1;
+	}
+	ehdr->ei_class   = e_ident[EI_CLASS];
+	ehdr->ei_data    = e_ident[EI_DATA];
+	if (	(ehdr->ei_class != ELFCLASS32) &&
+		(ehdr->ei_class != ELFCLASS64))
+	{
+		/* Not a supported elf class */
+		if (probe_debug) {
+			fprintf(stderr, "Not a supported ELF class\n");
+		}
+		return -1;
+	}
+	if (	(ehdr->ei_data != ELFDATA2LSB) &&
+		(ehdr->ei_data != ELFDATA2MSB))
+	{
+		/* Not a supported elf data type */
+		if (probe_debug) {
+			fprintf(stderr, "Not a supported ELF data format\n");
+		}
+		return -1;
+	}
+
+	result = -1;
+	if (ehdr->ei_class == ELFCLASS32) {
+		result = build_mem_elf32_ehdr(buf, len, ehdr);
+	}
+	else if (ehdr->ei_class == ELFCLASS64) {
+		result = build_mem_elf64_ehdr(buf, len, ehdr);
+	}
+	if (result < 0) {
+		return result;
+	}
+	if ((e_ident[EI_VERSION] != EV_CURRENT) ||
+		(ehdr->e_version != EV_CURRENT))
+	{
+		if (probe_debug) {
+			fprintf(stderr, "Unknown ELF version\n");
+		}
+		/* Unknwon elf version */
+		return -1;
+	}
+	return 0;
+}
+
+static int build_mem_elf32_phdr(const char *buf, struct mem_ehdr *ehdr, int idx)
+{
+	struct mem_phdr *phdr;
+	const char *pbuf;
+	Elf32_Phdr lphdr;
+	pbuf = buf + ehdr->e_phoff + (idx * sizeof(lphdr));
+	phdr = &ehdr->e_phdr[idx];
+	memcpy(&lphdr, pbuf, sizeof(lphdr));
+
+	if (	(elf32_to_cpu(ehdr, lphdr.p_filesz) > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lphdr.p_memsz)  > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lphdr.p_offset) > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lphdr.p_paddr)  > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lphdr.p_vaddr)  > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lphdr.p_align)  > UINT32_MAX))
+	{
+		fprintf(stderr, "Program segment size out of range\n");
+		return -1;
+	}
+
+	phdr->p_type   = elf32_to_cpu(ehdr, lphdr.p_type);
+	phdr->p_paddr  = elf32_to_cpu(ehdr, lphdr.p_paddr);
+	phdr->p_vaddr  = elf32_to_cpu(ehdr, lphdr.p_vaddr);
+	phdr->p_filesz = elf32_to_cpu(ehdr, lphdr.p_filesz);
+	phdr->p_memsz  = elf32_to_cpu(ehdr, lphdr.p_memsz);
+	phdr->p_offset = elf32_to_cpu(ehdr, lphdr.p_offset);
+	phdr->p_flags  = elf32_to_cpu(ehdr, lphdr.p_flags);
+	phdr->p_align  = elf32_to_cpu(ehdr, lphdr.p_align);
+
+	return 0;
+}
+
+static int build_mem_elf64_phdr(const char *buf, struct mem_ehdr *ehdr, int idx)
+{
+	struct mem_phdr *phdr;
+	const char *pbuf;
+	Elf64_Phdr lphdr;
+	pbuf = buf + ehdr->e_phoff + (idx * sizeof(lphdr));
+	phdr = &ehdr->e_phdr[idx];
+	memcpy(&lphdr, pbuf, sizeof(lphdr));
+
+#if 0
+	if (	(elf64_to_cpu(ehdr, lphdr.p_filesz) > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lphdr.p_memsz)  > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lphdr.p_offset) > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lphdr.p_paddr)  > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lphdr.p_vaddr)  > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lphdr.p_align)  > UINT64_MAX))
+	{
+		fprintf(stderr, "Program segment size out of range\n");
+		return -1;
+	}
+#endif
+
+	phdr->p_type   = elf32_to_cpu(ehdr, lphdr.p_type);
+	phdr->p_paddr  = elf64_to_cpu(ehdr, lphdr.p_paddr);
+	phdr->p_vaddr  = elf64_to_cpu(ehdr, lphdr.p_vaddr);
+	phdr->p_filesz = elf64_to_cpu(ehdr, lphdr.p_filesz);
+	phdr->p_memsz  = elf64_to_cpu(ehdr, lphdr.p_memsz);
+	phdr->p_offset = elf64_to_cpu(ehdr, lphdr.p_offset);
+	phdr->p_flags  = elf32_to_cpu(ehdr, lphdr.p_flags);
+	phdr->p_align  = elf64_to_cpu(ehdr, lphdr.p_align);
+
+	return 0;
+}
+
+static int build_mem_phdrs(const char *buf, off_t len, struct mem_ehdr *ehdr,
+				uint32_t flags)
+{
+	size_t phdr_size, mem_phdr_size, i;
+
+	/* e_phnum is at most 65535 so calculating
+	 * the size of the program header cannot overflow.
+	 */
+	/* Is the program header in the file buffer? */
+	phdr_size = 0;
+	if (ehdr->ei_class == ELFCLASS32) {
+		phdr_size = sizeof(Elf32_Phdr);
+	}
+	else if (ehdr->ei_class == ELFCLASS64) {
+		phdr_size = sizeof(Elf64_Phdr);
+	}
+	else {
+		fprintf(stderr, "Invalid ei_class?\n");
+		return -1;
+	}
+	phdr_size *= ehdr->e_phnum;
+#if 0
+	if ((uintmax_t)(ehdr->e_phoff + phdr_size) > (uintmax_t)len) {
+		/* The program header did not fit in the file buffer */
+		if (probe_debug || (flags & ELF_SKIP_FILESZ_CHECK)) {
+			fprintf(stderr, "ELF program headers truncated"
+				" have %ju bytes need %ju bytes\n",
+				(uintmax_t)len,
+				(uintmax_t)(ehdr->e_phoff + phdr_size));
+		}
+		return -1;
+	}
+#endif
+
+	/* Allocate the e_phdr array */
+	mem_phdr_size = sizeof(ehdr->e_phdr[0]) * ehdr->e_phnum;
+	ehdr->e_phdr = xmalloc(mem_phdr_size);
+
+	for(i = 0; i < ehdr->e_phnum; i++) {
+		struct mem_phdr *phdr;
+		int result;
+		result = -1;
+		if (ehdr->ei_class == ELFCLASS32) {
+			result = build_mem_elf32_phdr(buf, ehdr, i);
+
+		}
+		else if (ehdr->ei_class == ELFCLASS64) {
+			result = build_mem_elf64_phdr(buf, ehdr, i);
+		}
+		if (result < 0) {
+			return result;
+		}
+
+		/* Check the program headers to be certain
+		 * they are safe to use.
+		 * Skip the check if ELF_SKIP_FILESZ_CHECK is set.
+		 */
+		phdr = &ehdr->e_phdr[i];
+#if 0
+		if (!(flags & ELF_SKIP_FILESZ_CHECK)
+			&& (uintmax_t)(phdr->p_offset + phdr->p_filesz) >
+			   (uintmax_t)len) {
+			/* The segment does not fit in the buffer */
+			if (probe_debug) {
+				fprintf(stderr, "ELF segment not in file\n");
+			}
+			return -1;
+		}
+#endif
+		if ((phdr->p_paddr + phdr->p_memsz) < phdr->p_paddr) {
+			/* The memory address wraps */
+			if (probe_debug) {
+				fprintf(stderr, "ELF address wrap around\n");
+			}
+			return -1;
+		}
+		/* Remember where the segment lives in the buffer */
+		phdr->p_data = buf + phdr->p_offset;
+	}
+	return 0;
+}
+
+static int build_mem_elf32_shdr(const char *buf, struct mem_ehdr *ehdr, int idx)
+{
+	struct mem_shdr *shdr;
+	const char *sbuf;
+	int size_ok;
+	Elf32_Shdr lshdr;
+	sbuf = buf + ehdr->e_shoff + (idx * sizeof(lshdr));
+	shdr = &ehdr->e_shdr[idx];
+	memcpy(&lshdr, sbuf, sizeof(lshdr));
+
+	if (	(elf32_to_cpu(ehdr, lshdr.sh_flags)     > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lshdr.sh_addr)      > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lshdr.sh_offset)    > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lshdr.sh_size)      > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lshdr.sh_addralign) > UINT32_MAX) ||
+		(elf32_to_cpu(ehdr, lshdr.sh_entsize)   > UINT32_MAX))
+	{
+		fprintf(stderr, "Program section size out of range\n");
+		return -1;
+	}
+
+	shdr->sh_name      = elf32_to_cpu(ehdr, lshdr.sh_name);
+	shdr->sh_type      = elf32_to_cpu(ehdr, lshdr.sh_type);
+	shdr->sh_flags     = elf32_to_cpu(ehdr, lshdr.sh_flags);
+	shdr->sh_addr      = elf32_to_cpu(ehdr, lshdr.sh_addr);
+	shdr->sh_offset    = elf32_to_cpu(ehdr, lshdr.sh_offset);
+	shdr->sh_size      = elf32_to_cpu(ehdr, lshdr.sh_size);
+	shdr->sh_link      = elf32_to_cpu(ehdr, lshdr.sh_link);
+	shdr->sh_info      = elf32_to_cpu(ehdr, lshdr.sh_info);
+	shdr->sh_addralign = elf32_to_cpu(ehdr, lshdr.sh_addralign);
+	shdr->sh_entsize   = elf32_to_cpu(ehdr, lshdr.sh_entsize);
+
+	/* Now verify sh_entsize */
+	size_ok = 0;
+	switch(shdr->sh_type) {
+	case SHT_SYMTAB:
+		size_ok = shdr->sh_entsize == sizeof(Elf32_Sym);
+		break;
+	case SHT_RELA:
+		size_ok = shdr->sh_entsize == sizeof(Elf32_Rela);
+		break;
+	case SHT_DYNAMIC:
+		size_ok = shdr->sh_entsize == sizeof(Elf32_Dyn);
+		break;
+	case SHT_REL:
+		size_ok = shdr->sh_entsize == sizeof(Elf32_Rel);
+		break;
+	case SHT_NOTE:
+	case SHT_NULL:
+	case SHT_PROGBITS:
+	case SHT_HASH:
+	case SHT_NOBITS:
+	default:
+		/* This is a section whose entsize requirements
+		 * I don't care about.  If I don't know about
+		 * the section I can't care about it's entsize
+		 * requirements.
+		 */
+		size_ok = 1;
+		break;
+	}
+	if (!size_ok) {
+		fprintf(stderr, "Bad section header(%x) entsize: %lld\n",
+			shdr->sh_type, shdr->sh_entsize);
+		return -1;
+	}
+	return 0;
+}
+
+static int build_mem_elf64_shdr(const char *buf, struct mem_ehdr *ehdr, int idx)
+{
+	struct mem_shdr *shdr;
+	const char *sbuf;
+	int size_ok;
+	Elf64_Shdr lshdr;
+	sbuf = buf + ehdr->e_shoff + (idx * sizeof(lshdr));
+	shdr = &ehdr->e_shdr[idx];
+	memcpy(&lshdr, sbuf, sizeof(lshdr));
+
+#if 0
+	if (	(elf64_to_cpu(ehdr, lshdr.sh_flags)     > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lshdr.sh_addr)      > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lshdr.sh_offset)    > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lshdr.sh_size)      > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lshdr.sh_addralign) > UINT64_MAX) ||
+		(elf64_to_cpu(ehdr, lshdr.sh_entsize)   > UINT64_MAX))
+	{
+		fprintf(stderr, "Program section size out of range\n");
+		return -1;
+	}
+#endif
+
+	shdr->sh_name      = elf32_to_cpu(ehdr, lshdr.sh_name);
+	shdr->sh_type      = elf32_to_cpu(ehdr, lshdr.sh_type);
+	shdr->sh_flags     = elf64_to_cpu(ehdr, lshdr.sh_flags);
+	shdr->sh_addr      = elf64_to_cpu(ehdr, lshdr.sh_addr);
+	shdr->sh_offset    = elf64_to_cpu(ehdr, lshdr.sh_offset);
+	shdr->sh_size      = elf64_to_cpu(ehdr, lshdr.sh_size);
+	shdr->sh_link      = elf32_to_cpu(ehdr, lshdr.sh_link);
+	shdr->sh_info      = elf32_to_cpu(ehdr, lshdr.sh_info);
+	shdr->sh_addralign = elf64_to_cpu(ehdr, lshdr.sh_addralign);
+	shdr->sh_entsize   = elf64_to_cpu(ehdr, lshdr.sh_entsize);
+
+	/* Now verify sh_entsize */
+	size_ok = 0;
+	switch(shdr->sh_type) {
+	case SHT_SYMTAB:
+		size_ok = shdr->sh_entsize == sizeof(Elf64_Sym);
+		break;
+	case SHT_RELA:
+		size_ok = shdr->sh_entsize == sizeof(Elf64_Rela);
+		break;
+	case SHT_DYNAMIC:
+		size_ok = shdr->sh_entsize == sizeof(Elf64_Dyn);
+		break;
+	case SHT_REL:
+		size_ok = shdr->sh_entsize == sizeof(Elf64_Rel);
+		break;
+	case SHT_NOTE:
+	case SHT_NULL:
+	case SHT_PROGBITS:
+	case SHT_HASH:
+	case SHT_NOBITS:
+	default:
+		/* This is a section whose entsize requirements
+		 * I don't care about.  If I don't know about
+		 * the section I can't care about it's entsize
+		 * requirements.
+		 */
+		size_ok = 1;
+		break;
+	}
+	if (!size_ok) {
+		fprintf(stderr, "Bad section header(%x) entsize: %lld\n",
+			shdr->sh_type, shdr->sh_entsize);
+		return -1;
+	}
+	return 0;
+}
+
+static int build_mem_shdrs(const char *buf, off_t len, struct mem_ehdr *ehdr,
+				uint32_t flags)
+{
+	size_t shdr_size, mem_shdr_size, i;
+
+	/* e_shnum is at most 65536 so calculating
+	 * the size of the section header cannot overflow.
+	 */
+	/* Is the program header in the file buffer? */
+	shdr_size = 0;
+	if (ehdr->ei_class == ELFCLASS32) {
+		shdr_size = sizeof(Elf32_Shdr);
+	}
+	else if (ehdr->ei_class == ELFCLASS64) {
+		shdr_size = sizeof(Elf64_Shdr);
+	}
+	else {
+		fprintf(stderr, "Invalid ei_class?\n");
+		return -1;
+	}
+	shdr_size *= ehdr->e_shnum;
+#if 0
+	if ((uintmax_t)(ehdr->e_shoff + shdr_size) > (uintmax_t)len) {
+		/* The section header did not fit in the file buffer */
+		if (probe_debug) {
+			fprintf(stderr, "ELF section header does not fit in file\n");
+		}
+		return -1;
+	}
+#endif
+
+	/* Allocate the e_shdr array */
+	mem_shdr_size = sizeof(ehdr->e_shdr[0]) * ehdr->e_shnum;
+	ehdr->e_shdr = xmalloc(mem_shdr_size);
+
+	for(i = 0; i < ehdr->e_shnum; i++) {
+		struct mem_shdr *shdr;
+		int result;
+		result = -1;
+		if (ehdr->ei_class == ELFCLASS32) {
+			result = build_mem_elf32_shdr(buf, ehdr, i);
+		}
+		else if (ehdr->ei_class == ELFCLASS64) {
+			result = build_mem_elf64_shdr(buf, ehdr, i);
+		}
+		if (result < 0) {
+			return result;
+		}
+		/* Check the section headers to be certain
+		 * they are safe to use.
+		 * Skip the check if ELF_SKIP_FILESZ_CHECK is set.
+		 */
+		shdr = &ehdr->e_shdr[i];
+#if 0
+		if (!(flags & ELF_SKIP_FILESZ_CHECK)
+			&& (shdr->sh_type != SHT_NOBITS)
+			&& (uintmax_t)(shdr->sh_offset + shdr->sh_size) >
+			   (uintmax_t)len) {
+			/* The section does not fit in the buffer */
+			if (probe_debug) {
+				fprintf(stderr, "ELF section %zd not in file\n",
+					i);
+			}
+			return -1;
+		}
+#endif
+		if ((shdr->sh_addr + shdr->sh_size) < shdr->sh_addr) {
+			/* The memory address wraps */
+			if (probe_debug) {
+				fprintf(stderr, "ELF address wrap around\n");
+			}
+			return -1;
+		}
+		/* Remember where the section lives in the buffer */
+		shdr->sh_data = (unsigned char *)(buf + shdr->sh_offset);
+	}
+	return 0;
+}
+
+static void read_nhdr(const struct mem_ehdr *ehdr,
+	ElfNN_Nhdr *hdr, const unsigned char *note)
+{
+	memcpy(hdr, note, sizeof(*hdr));
+	hdr->n_namesz = elf32_to_cpu(ehdr, hdr->n_namesz);
+	hdr->n_descsz = elf32_to_cpu(ehdr, hdr->n_descsz);
+	hdr->n_type   = elf32_to_cpu(ehdr, hdr->n_type);
+
+}
+static int build_mem_notes(struct mem_ehdr *ehdr)
+{
+	const unsigned char *note_start, *note_end, *note;
+	size_t note_size, i;
+	/* First find the note segment or section */
+	note_start = note_end = NULL;
+	for(i = 0; !note_start && (i < ehdr->e_phnum); i++) {
+		struct mem_phdr *phdr = &ehdr->e_phdr[i];
+		/*
+		 * binutils <= 2.17 has a bug where it can create the
+		 * PT_NOTE segment with an offset of 0. Therefore
+		 * check p_offset > 0.
+		 *
+		 * See: http://sourceware.org/bugzilla/show_bug.cgi?id=594
+		 */
+		if (phdr->p_type == PT_NOTE && phdr->p_offset) {
+			note_start = (unsigned char *)phdr->p_data;
+			note_end = note_start + phdr->p_filesz;
+		}
+	}
+	for(i = 0; !note_start && (i < ehdr->e_shnum); i++) {
+		struct mem_shdr *shdr = &ehdr->e_shdr[i];
+		if (shdr->sh_type == SHT_NOTE) {
+			note_start = shdr->sh_data;
+			note_end = note_start + shdr->sh_size;
+		}
+	}
+	if (!note_start) {
+		return 0;
+	}
+
+	/* Walk through and count the notes */
+	ehdr->e_notenum = 0;
+	for(note = note_start; note < note_end; note+= note_size) {
+		ElfNN_Nhdr hdr;
+		read_nhdr(ehdr, &hdr, note);
+		note_size  = sizeof(hdr);
+		note_size += (hdr.n_namesz + 3) & ~3;
+		note_size += (hdr.n_descsz + 3) & ~3;
+		ehdr->e_notenum += 1;
+	}
+	/* Now walk and normalize the notes */
+	ehdr->e_note = xmalloc(sizeof(*ehdr->e_note) * ehdr->e_notenum);
+	for(i = 0, note = note_start; note < note_end; note+= note_size, i++) {
+		const unsigned char *name, *desc;
+		ElfNN_Nhdr hdr;
+		read_nhdr(ehdr, &hdr, note);
+		note_size  = sizeof(hdr);
+		name       = note + note_size;
+		note_size += (hdr.n_namesz + 3) & ~3;
+		desc       = note + note_size;
+		note_size += (hdr.n_descsz + 3) & ~3;
+
+		if ((hdr.n_namesz != 0) && (name[hdr.n_namesz -1] != '\0')) {
+			/* If note name string is not null terminated, just
+			 * warn user about it and continue processing. This
+			 * allows us to parse /proc/kcore on older kernels
+			 * where /proc/kcore elf notes were not null
+			 * terminated. It has been fixed in 2.6.19.
+			 */
+			fprintf(stderr, "Warning: Elf Note name is not null "
+					"terminated\n");
+		}
+		ehdr->e_note[i].n_type = hdr.n_type;
+		ehdr->e_note[i].n_name = (char *)name;
+		ehdr->e_note[i].n_desc = desc;
+		ehdr->e_note[i].n_descsz = hdr.n_descsz;
+
+	}
+	return 0;
+}
+
+void free_elf_info(struct mem_ehdr *ehdr)
+{
+	free(ehdr->e_phdr);
+	free(ehdr->e_shdr);
+	memset(ehdr, 0, sizeof(*ehdr));
+}
+
+int build_elf_info(const char *buf, off_t len, struct mem_ehdr *ehdr,
+			uint32_t flags)
+{
+	int result;
+	result = build_mem_ehdr(buf, len, ehdr);
+	if (result < 0) {
+		return result;
+	}
+	if ((ehdr->e_phoff > 0) && (ehdr->e_phnum > 0)) {
+		result = build_mem_phdrs(buf, len, ehdr, flags);
+		if (result < 0) {
+			free_elf_info(ehdr);
+			return result;
+		}
+	}
+	if ((ehdr->e_shoff > 0) && (ehdr->e_shnum > 0)) {
+		result = build_mem_shdrs(buf, len, ehdr, flags);
+		if (result < 0) {
+			free_elf_info(ehdr);
+			return result;
+		}
+	}
+	result = build_mem_notes(ehdr);
+	if (result < 0) {
+		free_elf_info(ehdr);
+		return result;
+	}
+	return 0;
+}
diff --git a/lib/kexec/kexec-elf.h b/lib/kexec/kexec-elf.h
new file mode 100644
index 0000000..99cb80b
--- /dev/null
+++ b/lib/kexec/kexec-elf.h
@@ -0,0 +1,132 @@
+#ifndef KEXEC_ELF_H
+#define KEXEC_ELF_H
+
+struct kexec_info;
+
+struct mem_ehdr {
+	unsigned ei_class;
+	unsigned ei_data;
+	unsigned e_type;
+	unsigned e_machine;
+	unsigned e_version;
+	unsigned e_flags;
+	unsigned e_phnum;
+	unsigned e_shnum;
+	unsigned e_shstrndx;
+	unsigned long long e_entry;
+	unsigned long long e_phoff;
+	unsigned long long e_shoff;
+	unsigned e_notenum;
+	struct mem_phdr *e_phdr;
+	struct mem_shdr *e_shdr;
+	struct mem_note *e_note;
+	unsigned long rel_addr, rel_size;
+};
+
+struct mem_phdr {
+	unsigned long long p_paddr;
+	unsigned long long p_vaddr;
+	unsigned long long p_filesz;
+	unsigned long long p_memsz;
+	unsigned long long p_offset;
+	const char *p_data;
+	unsigned p_type;
+	unsigned p_flags;
+	unsigned long long p_align;
+};
+
+struct mem_shdr {
+	unsigned sh_name;
+	unsigned sh_type;
+	unsigned long long sh_flags;
+	unsigned long long sh_addr;
+	unsigned long long sh_offset;
+	unsigned long long sh_size;
+	unsigned sh_link;
+	unsigned sh_info;
+	unsigned long long sh_addralign;
+	unsigned long long sh_entsize;
+	const unsigned char *sh_data;
+};
+
+struct mem_sym {
+	unsigned long st_name;   /* Symbol name (string tbl index) */
+	unsigned char st_info;   /* No defined meaning, 0 */
+	unsigned char st_other;  /* Symbol type and binding */
+	unsigned st_shndx;  /* Section index */
+	unsigned long long st_value;  /* Symbol value */
+	unsigned long long st_size;   /* Symbol size */
+};
+
+struct  mem_rela {
+	unsigned long long r_offset;
+	unsigned r_sym;
+	unsigned r_type;
+	unsigned long long r_addend;
+};
+
+struct mem_note {
+	unsigned n_type;
+	unsigned n_descsz;
+	const char *n_name;
+	const void *n_desc;
+};
+
+/* The definition of an ELF note does not vary depending
+ * on ELFCLASS.
+ */
+typedef struct
+{
+	uint32_t n_namesz;		/* Length of the note's name.  */
+	uint32_t n_descsz;		/* Length of the note's descriptor.  */
+	uint32_t n_type;		/* Type of the note.  */
+} ElfNN_Nhdr;
+
+/* Misc flags */
+
+#define ELF_SKIP_FILESZ_CHECK		0x00000001
+
+extern void free_elf_info(struct mem_ehdr *ehdr);
+extern int build_elf_info(const char *buf, off_t len, struct mem_ehdr *ehdr,
+				uint32_t flags);
+extern int build_elf_exec_info(const char *buf, off_t len,
+				struct mem_ehdr *ehdr, uint32_t flags);
+extern int build_elf_rel_info(const char *buf, off_t len, struct mem_ehdr *ehdr,
+				uint32_t flags);
+
+extern int build_elf_core_info(const char *buf, off_t len,
+					struct mem_ehdr *ehdr, uint32_t flags);
+extern int elf_exec_load(struct mem_ehdr *ehdr, struct kexec_info *info);
+extern int elf_rel_load(struct mem_ehdr *ehdr, struct kexec_info *info,
+	unsigned long min, unsigned long max, int end);
+
+extern void elf_exec_build_load(struct kexec_info *info, struct mem_ehdr *ehdr, 
+				const char *buf, off_t len, uint32_t flags);
+extern void elf_rel_build_load(struct kexec_info *info, struct mem_ehdr *ehdr, 
+	const char *buf, off_t len, unsigned long min, unsigned long max, 
+	int end, uint32_t flags);
+
+extern int elf_rel_find_symbol(struct mem_ehdr *ehdr,
+	const char *name, struct mem_sym *ret_sym);
+extern unsigned long elf_rel_get_addr(struct mem_ehdr *ehdr, const char *name);
+extern void elf_rel_set_symbol(struct mem_ehdr *ehdr,
+	const char *name, const void *buf, size_t size);
+extern void elf_rel_get_symbol(struct mem_ehdr *ehdr,
+	const char *name, void *buf, size_t size);
+
+uint16_t elf16_to_cpu(const struct mem_ehdr *ehdr, uint16_t value);
+uint32_t elf32_to_cpu(const struct mem_ehdr *ehdr, uint32_t value);
+uint64_t elf64_to_cpu(const struct mem_ehdr *ehdr, uint64_t value);
+
+uint16_t cpu_to_elf16(const struct mem_ehdr *ehdr, uint16_t value);
+uint32_t cpu_to_elf32(const struct mem_ehdr *ehdr, uint32_t value);
+uint64_t cpu_to_elf64(const struct mem_ehdr *ehdr, uint64_t value);
+
+unsigned long elf_max_addr(const struct mem_ehdr *ehdr);
+
+/* Architecture specific helper functions */
+extern int machine_verify_elf_rel(struct mem_ehdr *ehdr);
+extern void machine_apply_elf_rel(struct mem_ehdr *ehdr, unsigned long r_type, 
+	void *location, unsigned long address, unsigned long value);
+#endif /* KEXEC_ELF_H */
+
diff --git a/lib/kexec/kexec.c b/lib/kexec/kexec.c
new file mode 100644
index 0000000..3e9a916
--- /dev/null
+++ b/lib/kexec/kexec.c
@@ -0,0 +1,299 @@
+/*
+ * kexec: Linux boots Linux
+ *
+ * Copyright (C) 2003-2005  Eric Biederman (ebiederm at xmission.com)
+ *
+ * Modified (2007-05-15) by Francesco Chiechi to rudely handle mips platform
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation (version 2 of the License).
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#define _GNU_SOURCE
+#include <linux/types.h>
+#include <common.h>
+
+#include <stdio.h>
+#include <stdarg.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+//#include <limits.h>
+//#include <sys/types.h>
+#include <linux/stat.h>
+//#include <unistd.h>
+#include <fcntl.h>
+#include <getopt.h>
+//#include <ctype.h>
+
+#include "config.h"
+
+#include "kexec.h"
+//#include "kexec-syscall.h"
+#include "kexec-elf.h"
+#include <fs.h>
+
+unsigned long long mem_min = 0;
+unsigned long long mem_max = ULONG_MAX;
+int kexec_debug = 0;
+
+void die(char *fmt, ...)
+{
+}
+
+int valid_memory_range(struct kexec_info *info,
+		       unsigned long sstart, unsigned long send)
+{
+	int i;
+	if (sstart > send) {
+		return 0;
+	}
+	if ((send > mem_max) || (sstart < mem_min)) {
+		return 0;
+	}
+	for (i = 0; i < info->memory_ranges; i++) {
+		unsigned long mstart, mend;
+		/* Only consider memory ranges */
+		if (info->memory_range[i].type != RANGE_RAM)
+			continue;
+		mstart = info->memory_range[i].start;
+		mend = info->memory_range[i].end;
+		if (i < info->memory_ranges - 1
+		    && mend == info->memory_range[i+1].start
+		    && info->memory_range[i+1].type == RANGE_RAM)
+			mend = info->memory_range[i+1].end;
+
+		/* Check to see if we are fully contained */
+		if ((mstart <= sstart) && (mend >= send)) {
+			return 1;
+		}
+	}
+	return 0;
+}
+
+static int valid_memory_segment(struct kexec_info *info,
+				struct kexec_segment *segment)
+{
+	unsigned long sstart, send;
+	sstart = (unsigned long)segment->mem;
+	send   = sstart + segment->memsz - 1;
+
+	return valid_memory_range(info, sstart, send);
+}
+
+static void print_segments(int f, struct kexec_info *info)
+{
+	int i;
+
+	fprintf(f, "nr_segments = %d\n", info->nr_segments);
+	for (i = 0; i < info->nr_segments; i++) {
+		fprintf(f, "segment[%d].buf   = %p\n",	i,
+			info->segment[i].buf);
+		fprintf(f, "segment[%d].bufsz = %zx\n", i,
+			info->segment[i].bufsz);
+		fprintf(f, "segment[%d].mem   = %p\n",	i,
+			info->segment[i].mem);
+		fprintf(f, "segment[%d].memsz = %zx\n", i,
+			info->segment[i].memsz);
+	}
+}
+
+int sort_segments(struct kexec_info *info)
+{
+	int i, j;
+	void *end;
+
+	/* Do a stupid insertion sort... */
+	for (i = 0; i < info->nr_segments; i++) {
+		int tidx;
+		struct kexec_segment temp;
+		tidx = i;
+		for (j = i +1; j < info->nr_segments; j++) {
+			if (info->segment[j].mem < info->segment[tidx].mem) {
+				tidx = j;
+			}
+		}
+		if (tidx != i) {
+			temp = info->segment[tidx];
+			info->segment[tidx] = info->segment[i];
+			info->segment[i] = temp;
+		}
+	}
+	/* Now see if any of the segments overlap */
+	end = 0;
+	for (i = 0; i < info->nr_segments; i++) {
+		if (end > info->segment[i].mem) {
+			fprintf(stderr, "Overlapping memory segments at %p\n",
+				end);
+			return -1;
+		}
+		end = ((char *)info->segment[i].mem) + info->segment[i].memsz;
+	}
+	return 0;
+}
+
+/*
+ *	Load the new kernel
+ */
+static int my_load(char *kernel, unsigned long kexec_flags)
+{
+	char *kernel_buf;
+	off_t kernel_size;
+	int i = 0;
+	int result;
+	struct kexec_info info;
+	long native_arch;
+
+//printf("%s:%d\n", __func__, __LINE__);
+	memset(&info, 0, sizeof(info));
+	info.segment = NULL;
+	info.nr_segments = 0;
+	info.entry = NULL;
+	info.backup_start = 0;
+	info.kexec_flags = kexec_flags;
+
+	result = 0;
+	/* slurp in the input kernel */
+	/* FIXME: add a decompresion routines insted of read_file() */
+	kernel_buf = read_file(kernel, &kernel_size);
+	printf("kernel: %p kernel_size: %lx\n", kernel_buf, kernel_size);
+
+//printf("%s:%d\n", __func__, __LINE__);
+	/* FIXME: check memory banks */
+	if (get_memory_ranges(&info.memory_range, &info.memory_ranges,
+		info.kexec_flags) < 0) {
+		fprintf(stderr, "Could not get memory layout\n");
+		return -1;
+	}
+
+//printf("%s:%d\n", __func__, __LINE__);
+	for (i = 0; i < kexec_file_types; i++) {
+		if (kexec_file_type[i].probe(kernel_buf, kernel_size) >= 0)
+			break;
+	}
+//printf("%s:%d\n", __func__, __LINE__);
+	if (i == kexec_file_types) {
+		fprintf(stderr, "Cannot determine the file type "
+				"of %s\n", kernel);
+		return -1;
+	}
+//printf("%s:%d\n", __func__, __LINE__);
+	/* Figure out our native architecture before load */
+#if 0
+	native_arch = physical_arch();
+	if (native_arch < 0) {
+		return -1;
+	}
+#endif
+	native_arch = 0;
+	info.kexec_flags |= native_arch;
+
+//printf("%s:%d\n", __func__, __LINE__);
+	result = kexec_file_type[i].load(kernel_buf, kernel_size, &info);
+//printf("%s:%d\n", __func__, __LINE__);
+	if (result < 0) {
+		switch (result) {
+		case EFAILED:
+		default:
+			fprintf(stderr, "Cannot load %s\n", kernel);
+			break;
+		}
+		return result;
+	}
+#if 0
+	/* If we are not in native mode setup an appropriate trampoline */
+	if (arch_compat_trampoline(&info) < 0) {
+		return -1;
+	}
+#endif
+//printf("%s:%d\n", __func__, __LINE__);
+	/* Verify all of the segments load to a valid location in memory */
+	for (i = 0; i < info.nr_segments; i++) {
+		if (!valid_memory_segment(&info, info.segment +i)) {
+			fprintf(stderr, "Invalid memory segment %p - %p\n",
+				info.segment[i].mem,
+				((char *)info.segment[i].mem) + 
+				info.segment[i].memsz);
+			return -1;
+		}
+	}
+	/* Sort the segments and verify we don't have overlaps */
+	if (sort_segments(&info) < 0) {
+		return -1;
+	}
+#if 1
+	fprintf(stderr, "kexec_load: entry = %p flags = %lx\n", 
+		info.entry, info.kexec_flags);
+	print_segments(stderr, &info);
+#endif
+#if 0
+	result = kexec_load(
+		info.entry, info.nr_segments, info.segment, info.kexec_flags);
+#else
+	{
+		void (*barebox)(int a0, int a1, int a2, int a3);
+
+		barebox = info.entry;
+
+		printf("\njumping to %p\n\n", barebox);
+		barebox(2,              /* number of arguments? */
+			0x80002000,
+			0x80002008,
+			0x10000000      /* no matter */
+                );
+	}
+#endif
+	if (result != 0) {
+		/* The load failed, print some debugging information */
+		fprintf(stderr, "kexec_load failed: %s\n", 
+			strerror(errno));
+		fprintf(stderr, "entry       = %p flags = %lx\n", 
+			info.entry, info.kexec_flags);
+		print_segments(stderr, &info);
+	}
+	return result;
+}
+
+#include <boot.h>
+#include <init.h>
+#include <binfmt.h>
+
+static int do_bootm_elf(struct image_data *data)
+{
+	printf("\ndo_bootm_elf()\n\n");
+
+	my_load(data->os_file, 0);
+
+	/* unreachable(); */
+	return -1;
+}
+
+static struct image_handler elf_handler = {
+	.name = "ELF",
+	.bootm = do_bootm_elf,
+	.filetype = filetype_elf,
+};
+
+static struct binfmt_hook binfmt_elf_hook = {
+	.type = filetype_elf,
+	.exec = "bootm",
+};
+
+static int elf_register_image_handler(void)
+{
+	register_image_handler(&elf_handler);
+	binfmt_register(&binfmt_elf_hook);
+
+	return 0;
+}
+late_initcall(elf_register_image_handler);
diff --git a/lib/kexec/kexec.h b/lib/kexec/kexec.h
new file mode 100644
index 0000000..4233c1f
--- /dev/null
+++ b/lib/kexec/kexec.h
@@ -0,0 +1,188 @@
+#ifndef KEXEC_H
+#define KEXEC_H
+
+#include <common.h>
+
+#include <stdio.h>
+#include <string.h>
+#define USE_BSD
+#include <asm/byteorder.h>
+#define _GNU_SOURCE
+
+#include "kexec-elf.h"
+#include "unused.h"
+
+/*
+ * Document some of the reasons why crashdump may fail, so we can give
+ * better error messages
+ */
+#define EFAILED		-1	/* default error code */
+
+extern unsigned long long mem_min, mem_max;
+extern int kexec_debug;
+
+#define dbgprintf(...) \
+do { \
+	if (kexec_debug) \
+		fprintf(stderr, __VA_ARGS__); \
+} while(0)
+
+struct kexec_segment {
+	const void *buf;
+	size_t bufsz;
+	const void *mem;
+	size_t memsz;
+};
+
+struct memory_range {
+	unsigned long long start, end;
+	unsigned type;
+#define RANGE_RAM	0
+#define RANGE_RESERVED	1
+#define RANGE_ACPI	2
+#define RANGE_ACPI_NVS	3
+#define RANGE_UNCACHED	4
+};
+
+struct kexec_info {
+	struct kexec_segment *segment;
+	int nr_segments;
+	struct memory_range *memory_range;
+	int memory_ranges;
+	void *entry;
+	struct mem_ehdr rhdr;
+	unsigned long backup_start;
+	unsigned long kexec_flags;
+	unsigned long backup_src_start;
+	unsigned long backup_src_size;
+};
+
+struct arch_map_entry {
+	const char *machine;
+	unsigned long arch;
+};
+
+extern const struct arch_map_entry arches[];
+long physical_arch(void);
+
+#define KERNEL_VERSION(major, minor, patch) \
+	(((major) << 16) | ((minor) << 8) | patch)
+long kernel_version(void);
+
+void usage(void);
+int get_memory_ranges(struct memory_range **range, int *ranges,
+						unsigned long kexec_flags);
+int valid_memory_range(struct kexec_info *info,
+		       unsigned long sstart, unsigned long send);
+int sort_segments(struct kexec_info *info);
+unsigned long locate_hole(struct kexec_info *info,
+	unsigned long hole_size, unsigned long hole_align, 
+	unsigned long hole_min, unsigned long hole_max,
+	int hole_end);
+
+typedef int (probe_t)(const char *kernel_buf, off_t kernel_size);
+typedef int (load_t )(//int argc, char **argv,
+	const char *kernel_buf, off_t kernel_size, 
+	struct kexec_info *info);
+typedef void (usage_t)(void);
+struct kexec_file_type {
+	const char *name;
+	probe_t *probe;
+	load_t  *load;
+	usage_t *usage;
+};
+
+extern struct kexec_file_type kexec_file_type[];
+extern int kexec_file_types;
+
+extern void die(char *fmt, ...);
+extern void *xrealloc(void *ptr, size_t size);
+extern unsigned long virt_to_phys(unsigned long addr);
+extern void add_segment(struct kexec_info *info,
+	const void *buf, size_t bufsz, unsigned long base, size_t memsz);
+extern void add_segment_phys_virt(struct kexec_info *info,
+	const void *buf, size_t bufsz, unsigned long base, size_t memsz,
+	int phys);
+extern unsigned long add_buffer(struct kexec_info *info,
+	const void *buf, unsigned long bufsz, unsigned long memsz,
+	unsigned long buf_align, unsigned long buf_min, unsigned long buf_max,
+	int buf_end);
+extern unsigned long add_buffer_virt(struct kexec_info *info,
+	const void *buf, unsigned long bufsz, unsigned long memsz,
+	unsigned long buf_align, unsigned long buf_min, unsigned long buf_max,
+	int buf_end);
+extern unsigned long add_buffer_phys_virt(struct kexec_info *info,
+	const void *buf, unsigned long bufsz, unsigned long memsz,
+	unsigned long buf_align, unsigned long buf_min, unsigned long buf_max,
+	int buf_end, int phys);
+
+extern char purgatory[];
+extern size_t purgatory_size;
+
+int arch_compat_trampoline(struct kexec_info *info);
+char *get_command_line(void);
+
+int kexec_iomem_for_each_line(char *match,
+			      int (*callback)(void *data,
+					      int nr,
+					      char *str,
+					      unsigned long base,
+					      unsigned long length),
+			      void *data);
+int parse_iomem_single(char *str, uint64_t *start, uint64_t *end);
+const char * proc_iomem(void);
+
+extern int add_backup_segments(struct kexec_info *info,
+			       unsigned long backup_base,
+			       unsigned long backup_size);
+
+#define MAX_LINE	160
+
+char *concat_cmdline(const char *base, const char *append);
+
+/* Limits of integral types. */
+#ifndef INT8_MIN
+#define INT8_MIN               (-128)
+#endif
+#ifndef INT16_MIN
+#define INT16_MIN              (-32767-1)
+#endif
+#ifndef INT32_MIN
+#define INT32_MIN              (-2147483647-1)
+#endif
+#ifndef INT8_MAX
+#define INT8_MAX               (127)
+#endif
+#ifndef INT16_MAX
+#define INT16_MAX              (32767)
+#endif
+#ifndef INT32_MAX
+#define INT32_MAX              (2147483647)
+#endif
+#ifndef UINT8_MAX
+#define UINT8_MAX              (255U)
+#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX             (65535U)
+#endif
+#ifndef UINT32_MAX
+#define UINT32_MAX             (4294967295U)
+#endif
+
+/* These values match the ELF architecture values. 
+ * Unless there is a good reason that should continue to be the case.
+ */
+#define KEXEC_ARCH_DEFAULT ( 0 << 16)
+#define KEXEC_ARCH_386     ( 3 << 16)
+#define KEXEC_ARCH_X86_64  (62 << 16)
+#define KEXEC_ARCH_PPC     (20 << 16)
+#define KEXEC_ARCH_PPC64   (21 << 16)
+#define KEXEC_ARCH_IA_64   (50 << 16)
+#define KEXEC_ARCH_ARM     (40 << 16)
+#define KEXEC_ARCH_S390    (22 << 16)
+#define KEXEC_ARCH_SH      (42 << 16)
+#define KEXEC_ARCH_MIPS_LE (10 << 16)
+#define KEXEC_ARCH_MIPS    ( 8 << 16)
+#define KEXEC_ARCH_CRIS    (76 << 16)
+
+#endif /* KEXEC_H */
diff --git a/lib/kexec/unused.h b/lib/kexec/unused.h
new file mode 100644
index 0000000..7b40190
--- /dev/null
+++ b/lib/kexec/unused.h
@@ -0,0 +1,15 @@
+#ifndef UNUSED_H
+#define UNUSED_H
+
+/* http://sourcefrog.net/weblog/software/languages/C/unused.html */
+
+#ifdef UNUSED
+#elif defined(__GNUC__)
+# define UNUSED(x) UNUSED_ ## x __attribute__((unused))
+#elif defined(__LCLINT__)
+# define UNUSED(x) /*@unused@*/ x
+#else
+# define UNUSED(x) x
+#endif
+
+#endif
-- 
1.7.10



From antonynpavlov at gmail.com  Fri Jul 20 06:01:35 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 20 Jul 2012 14:01:35 +0400
Subject: [RFC 4/7] MIPS: malta: add YAMON-style GT64120 memory map
In-Reply-To: <1342774059-2169-5-git-send-email-antonynpavlov@gmail.com>
References: <1342774059-2169-1-git-send-email-antonynpavlov@gmail.com>
 <1342774059-2169-5-git-send-email-antonynpavlov@gmail.com>
Message-ID: <CAA4bVAH9dkYq9QGeS59ftkuC98OUMW-KS5iXC+75Ys9vN0o8fA@mail.gmail.com>

Sorry, this patch can't be applied!
It cites diff-formatted text in the comment.
adding extra spaces to this cited text fixes the problem.

On 20 July 2012 12:47, Antony Pavlov <antonynpavlov at gmail.com> wrote:
> YAMON-style GT64120 memory map make move UART to the new position.
>
> We need YAMON-style GT64120 memory for running Linux kernel from
> barebox.
>
> WARNING! WIP! We need add some more effor for compartability
> with qemu embedded YAMON.
>
> E.g. we need put special Board ID at the start of bootrom:
>
> --- a/arch/mips/boot/start.S
> +++ b/arch/mips/boot/start.S
> @@ -59,6 +59,10 @@ EXPORT(_start)
>          nop
>
>         .org    0x10
> +#if 1
> +       /* Board ID = 0x420 (Malta Board with CoreLV) */
> +       .word   0x00000420
> +#endif
>
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/mips/mach-malta/include/mach/hardware.h |    2 +-
>  arch/mips/mach-malta/lowlevel_init.S         |   33 +++++++++++++++++++++++++-
>  2 files changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/mach-malta/include/mach/hardware.h b/arch/mips/mach-malta/include/mach/hardware.h
> index ddeb1b7..fde8f22 100644
> --- a/arch/mips/mach-malta/include/mach/hardware.h
> +++ b/arch/mips/mach-malta/include/mach/hardware.h
> @@ -21,7 +21,7 @@
>  #ifndef __INCLUDE_ARCH_HARDWARE_H__
>  #define   __INCLUDE_ARCH_HARDWARE_H__
>
> -#define DEBUG_LL_UART_ADDR     0xb00003f8
> +#define DEBUG_LL_UART_ADDR     0xb80003f8
>  #define DEBUG_LL_UART_SHIFT    0
>
>  /*
> diff --git a/arch/mips/mach-malta/lowlevel_init.S b/arch/mips/mach-malta/lowlevel_init.S
> index a34de74..a0134f8 100644
> --- a/arch/mips/mach-malta/lowlevel_init.S
> +++ b/arch/mips/mach-malta/lowlevel_init.S
> @@ -29,7 +29,38 @@
>
>  LEAF(mach_init_lowlevel)
>
> -       /* nothing special yet */
> +       /*
> +        * Load BAR registers of GT64120 as done by YAMON
> +        *
> +        * based on write_bootloader() in qemu.git/hw/mips_malta.c
> +        * see GT64120 manual and qemu.git/hw/gt64xxx.c for details
> +        *
> +        * This is big-endian version of code!
> +        */
> +
> +       /* move GT64120 registers to 0x1be00000 */
> +       lui     t1, 0xb400
> +       lui     t0, 0xdf00
> +       sw      t0, 104(t1)
> +
> +       /* setup MEM-to-PCI0 mapping */
> +       lui     t1, 0xbbe0
> +
> +       /* setup PCI0 io window to 18000000-181fffff */
> +       lui     t0, 0xc000
> +       sw      t0, 72(t1) /* GT_PCI0IOLD */
> +       lui     t0, 0x4000
> +       sw      t0, 80(t1) /* GT_PCI0IOHD */
> +
> +       /* setup PCI0 mem windows */
> +       lui     t0, 0x8000
> +       sw      t0, 88(t1) /* GT_PCI0M0LD */
> +       lui     t0, 0x3f00
> +       sw      t0, 96(t1) /* GT_PCI0M0HD */
> +       lui     t0, 0xc100
> +       sw      t0, 128(t1) /* GT_PCI0M1LD */
> +       lui     t0, 0x5e00
> +       sw      t0, 136(t1) /* GT_PCI0M1HD */
>
>         /* return */
>         b       mach_init_lowlevel_return
> --
> 1.7.10
>



-- 
Best regards,
  Antony Pavlov


From plagnioj at jcrosoft.com  Fri Jul 20 07:16:34 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 20 Jul 2012 13:16:34 +0200
Subject: [PATCH 1/1] piggy.lzo.S: fix out of tree build
Message-ID: <1342782994-21728-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 3ade6cc..4696789 100644
--- a/Makefile
+++ b/Makefile
@@ -719,9 +719,9 @@ barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
 	@echo "  LZO    " $@
 	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
 
-piggy.lzo.o: barebox-uncompressed.bin.lzo piggy.lzo.S
+piggy.lzo.o: barebox-uncompressed.bin.lzo $(src)/piggy.lzo.S
 	@echo "  CC     " $@
-	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c piggy.lzo.S -o $@
+	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.lzo.S -o $@
 
 ifdef CONFIG_IMAGE_COMPRESSION_LZO
 barebox: piggy.lzo.o
-- 
1.7.10



From s.hauer at pengutronix.de  Fri Jul 20 08:24:46 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 20 Jul 2012 14:24:46 +0200
Subject: [PATCH 1/1] piggy.lzo.S: fix out of tree build
In-Reply-To: <1342782994-21728-1-git-send-email-plagnioj@jcrosoft.com>
References: <1342782994-21728-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120720122446.GS30009@pengutronix.de>

On Fri, Jul 20, 2012 at 01:16:34PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
>  Makefile |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Squashed into the original commit. BTW please update
work/compressed-image, I made some changes and added another two cleanup
patches.

Also I want to drop HEAD_TEXT_BASE (the address where the decompressor
is linked to) and use MALLOC_BASE instead, which by definition defaults
to some (at that time) unused valid memory. With this also the omap
xload configs should be compressable. This is not yet implemented
though.

Sascha


> 
> diff --git a/Makefile b/Makefile
> index 3ade6cc..4696789 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -719,9 +719,9 @@ barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
>  	@echo "  LZO    " $@
>  	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
>  
> -piggy.lzo.o: barebox-uncompressed.bin.lzo piggy.lzo.S
> +piggy.lzo.o: barebox-uncompressed.bin.lzo $(src)/piggy.lzo.S
>  	@echo "  CC     " $@
> -	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c piggy.lzo.S -o $@
> +	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.lzo.S -o $@
>  
>  ifdef CONFIG_IMAGE_COMPRESSION_LZO
>  barebox: piggy.lzo.o
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Fri Jul 20 09:34:49 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 15:34:49 +0200
Subject: [PATCH/master] ARM/MXS: pull-up and bitkeeper must be handled
 differently
Message-ID: <201207201534.50481.jbe@pengutronix.de>

Since commit 2f6b1f7690640f571f8e72fc2f2564acb2e13778 the pull-up and
bitkeeper handling for i.MX23/28 is correct. But now it is important to
distinguish these pin features as their programmed bit values are different.
With this patch the bitkeeper and pull-up enable/disable bits are now handled
separately.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>

diff --git a/arch/arm/mach-mxs/include/mach/iomux-imx23.h b/arch/arm/mach-mxs/include/mach/iomux-imx23.h
index 7b2883c..82362d7 100644
--- a/arch/arm/mach-mxs/include/mach/iomux-imx23.h
+++ b/arch/arm/mach-mxs/include/mach/iomux-imx23.h
@@ -22,13 +22,14 @@
  *                          ^^^^____ Bit offset
  *                        ^^________ Function
  *                       ^__________ Drive strength feature present
- *                      ^___________ Pull up / bit keeper present
+ *                      ^___________ Pull up present
  *                    ^^____________ Drive strength setting
  *                   ^______________ Pull up / bit keeper setting
  *                  ^_______________ Voltage select present
  *                 ^________________ Voltage selection
  *             ^____________________ direction if enabled as GPIO (1 = output)
  *            ^_____________________ initial output value if enabled as GPIO and configured as output
+ *           ^______________________ Bit keeper present
  */
 #ifndef __ASM_MACH_IOMUX_H
 #define __ASM_MACH_IOMUX_H
@@ -63,7 +64,7 @@
 
 /* control pad's pull up / bit keeper feature */
 #define PE (1 << 10)
-#define BK (1 << 11)	/* FIXME useful to distinguish? */
+#define BK (1 << 21)
 #define PE_PRESENT(x) (!!((x) & PE))
 #define BK_PRESENT(x) (!!((x) & BK))
 #define PULLUP(x) ((x) << 13)
diff --git a/arch/arm/mach-mxs/include/mach/iomux-imx28.h b/arch/arm/mach-mxs/include/mach/iomux-imx28.h
index ea1c3d8..82918cf 100644
--- a/arch/arm/mach-mxs/include/mach/iomux-imx28.h
+++ b/arch/arm/mach-mxs/include/mach/iomux-imx28.h
@@ -16,7 +16,7 @@
  *                         ^^^______ Register Number
  *                       ^^_________ Function
  *                      ^___________ Drive strength feature present
- *                     ^____________ Pull up / bit keeper present
+ *                     ^____________ Pull up present
  *                   ^^_____________ Drive strength setting
  *                  ^_______________ Pull up / bit keeper setting
  *                 ^________________ Voltage select present
@@ -24,6 +24,7 @@
  *            ^_____________________ direction if enabled as GPIO (1 = output)
  *           ^______________________ initial output value if enabled as GPIO
  *                                   and configured as output
+ *          ^_______________________ Bit keeper present
  */
 #ifndef __MACH_IOMUX_IMX28_H
 #define __MACH_IOMUX_IMX28_H
@@ -57,7 +58,7 @@
 
 /* control pad's pull up / bit keeper feature */
 #define PE (1 << 11)
-#define BK (1 << 11)	/* FIXME useful to distinguish? */
+#define BK (1 << 22)
 #define PE_PRESENT(x) (!!((x) & PE))
 #define BK_PRESENT(x) (!!((x) & BK))
 #define PULLUP(x) ((x) << 14)

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From christian.buettner at rafi.de  Fri Jul 20 09:49:53 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Fri, 20 Jul 2012 15:49:53 +0200
Subject: barebox spi test
Message-ID: <OFC0F11128.AB14A410-ONC1257A41.004B77C2-C1257A41.004BFA44@o0802.rafi.inhouse>

hi,

we use the imx53.
I need to write a little test for the spi interface through barebox. I 
just want to write a few bytes and read them back. 
To do the test i have an spi flash MX25L8005 which is supported by the nor 
driver m25p80.c.
In my board init code, i added spi successfully (imx53_add_spi0(..)) but i 
have problems adding the eeprom.
Can anyone help me out with a little board init code for the MX25L8005?

christian
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From js at sig21.net  Fri Jul 20 11:01:06 2012
From: js at sig21.net (Johannes Stezenbach)
Date: Fri, 20 Jul 2012 17:01:06 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <20120719204212.GH30009@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
 <20120719170845.GA3303@sig21.net>
 <20120719174125.GC30009@pengutronix.de>
 <20120719183238.GA3721@sig21.net>
 <20120719204212.GH30009@pengutronix.de>
Message-ID: <20120720150106.GA20593@sig21.net>

On Thu, Jul 19, 2012 at 10:42:12PM +0200, Sascha Hauer wrote:
> On Thu, Jul 19, 2012 at 08:32:38PM +0200, Johannes Stezenbach wrote:
> > > > ...
> > > >   LD      barebox
> > > > arm-linux-ld -EL  -Map barebox.map -static --gc-sections -o barebox \
> > > >                 -T arch/arm/lib/barebox-compressed.lds  \
> > > >                 --start-group  common/built-in.o  drivers/built-in.o  commands/built-in.o  lib/built-in.o  crypto/built-in.o  net/built-in.o  fs/built-in.o  arch/arm/boards/foo/built-in.o  arch/arm/mach-foo/built-in.o  arch/arm/lib/built-in.o  arch/arm/cpu/built-in.o piggy.lzo.o --end-group
> > > > 
> > > > 
> > > > It shouldn't link all the -built-in.o into the uncompressor, should it?
> > > > Or is it supposed to work via --gc-sections trick?
> > > 
> > > Yes, it works using --gc-sections. Are you building a defconfig or a
> > > custom one? If the error above is correct start_barebox is referenced
> > > from the decompressor code. This should not happen.
> > 
> > I'm building a custom one (unpublished code).  It has some SPI flash
> > boot assembly code, I guess that might cause the issue wrt the new section
> > annotations.  I'll look at it tomorrow.  However, I still wonder
> > about the empty $(barebox-compressed)?
> 
> It's empty here aswell, so this shouldn't be a problem. Though I should
> probably simpy remove it.

OK, got it to work now.  I had a "b start" in my SPI flash boot code
to skip low level init when it was loaded into RAM via JTAG.
That needed to be changed to "b compressed_start".  It seems
there is no real support in ld to debug this, I added --cref
to LDFLAGS_barebox but I still couldn't see why stuff from
common/built-in.o gets pulled into the uncompressor.

BTW, I briefly tried the lzo update from
http://lkml.org/lkml/2012/7/16/355
(don't have much time to do real benchmarks, just tried
"time uncompress somefile.lzo somefile"),
but it seems to be slower on ARM926 than the old version
(504ms vs 362ms).


Thanks,
Johannes


From plagnioj at jcrosoft.com  Fri Jul 20 11:24:17 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 20 Jul 2012 17:24:17 +0200
Subject: [PATCH 9/9] Add compressed image support
In-Reply-To: <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-10-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120720152417.GH22657@game.jcrosoft.org>

> +{
> +	u32 r;
> +
> +	/* Setup the stack */
> +	r = STACK_BASE + STACK_SIZE - 16;
> +	__asm__ __volatile__("mov sp, %0" : : "r"(r));
> +	/* clear bss */
> +	memset(__bss_start, 0, __bss_stop - __bss_start);
> +
> +	start_barebox();
> +}
> +#else
>  void __naked __section(.text_entry) start(void)
>  {
>  	barebox_arm_head();
>  }
> +#endif
>  
>  void __naked __section(.text_exceptions) exception_vectors(void)
>  {
>  	__asm__ __volatile__ (
>  		".arm\n"
> -		"b reset\n"				/* reset */
> +		"1: b 1b\n"					/* reset */
>  #ifdef CONFIG_ARM_EXCEPTIONS
>  		"ldr pc, =undefined_instruction\n"	/* undefined instruction */
>  		"ldr pc, =software_interrupt\n"		/* software interrupt (SWI) */
> @@ -98,6 +118,34 @@ void __naked __bare_init reset(void)
>  	board_init_lowlevel_return();
>  }
>  
> +extern void *input_data;
> +extern void *input_data_end;
> +
> +#define STATIC static
> +#include "../../../lib/decompress_unlzo.c"
> +
> +void barebox_uncompress(void *compressed_start, unsigned int len)
> +{
> +	void (*barebox)(void);
need to check here if we are at TEXT_BASE (I mean if the code run where we are
supposed to uncompress

otherwise on at91 it will not work as the bootstrap put use at TEXT_BASE

so we have need to link at an other address

but the decompressor need work anyway by copying itself with the data before
of after the TEXT_BASE
and we should take the uncompress size about 4 times the compressed one.
There is nearly no change to compress more than 75%


otherwise Tested by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

Best Regards,
J.


From js at sig21.net  Fri Jul 20 12:20:07 2012
From: js at sig21.net (Johannes Stezenbach)
Date: Fri, 20 Jul 2012 18:20:07 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own
 section
In-Reply-To: <20120719204548.GI30009@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
 <5007E38B.8040106@pengutronix.de>
 <20120719140834.GY30009@pengutronix.de>
 <20120719204548.GI30009@pengutronix.de>
Message-ID: <20120720162007.GA22374@sig21.net>

On Thu, Jul 19, 2012 at 10:45:48PM +0200, Sascha Hauer wrote:
> On Thu, Jul 19, 2012 at 04:08:34PM +0200, Sascha Hauer wrote:
> > On Thu, Jul 19, 2012 at 12:38:03PM +0200, Marc Kleine-Budde wrote:
> > > On 07/19/2012 10:13 AM, Sascha Hauer wrote:
> > > >  
> > > > +.section .text.__mmu_cache_on
> > > >  ENTRY(__mmu_cache_on)
> > > 
> > > Is it possible to add the section to the ENTRY macro?
> > 
> > I'm not sure. I was pretty sure that some assembly functions fall
> > through to the next function. I cannot find any examples though.
> 
> For example we have this:
> 
> .section .text.__divsi3
> ENTRY(__divsi3)
> ENTRY(__aeabi_idiv)
> 	...

and also:
ENTRY(__lshrdi3)
ENTRY(__aeabi_llsr)

However, this is the rare exception.  How about
adding __ENTRY for these cases?


Johannes


From jbe at pengutronix.de  Fri Jul 20 15:29:38 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:38 +0200
Subject: [PATCH 2/9] ARM/Samsung: follow the name style of the other source
 files in this directory
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-3-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                               |    3 +--
 arch/arm/mach-samsung/{s3c24xx-clocks.c => clocks-s3c24xx.c} |    0
 2 files changed, 1 insertion(+), 2 deletions(-)
 rename arch/arm/mach-samsung/{s3c24xx-clocks.c => clocks-s3c24xx.c} (100%)

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index d7344c8..40180d7 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,6 +1,5 @@
 obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
-obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o
+obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/s3c24xx-clocks.c b/arch/arm/mach-samsung/clocks-s3c24xx.c
similarity index 100%
rename from arch/arm/mach-samsung/s3c24xx-clocks.c
rename to arch/arm/mach-samsung/clocks-s3c24xx.c
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:41 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:41 +0200
Subject: [PATCH 5/9] Samsung/serial: there is no need to ifdef these register
 defines
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-6-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index c537bc0..3565edf 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -42,12 +42,8 @@
 #define UTXH 0x20		/* transmitt */
 #define URXH 0x24		/* receive */
 #define UBRDIV 0x28		/* baudrate generator */
-#ifdef S3C_UART_HAS_UBRDIVSLOT
-# define UBRDIVSLOT 0x2c	/* baudrate slot generator */
-#endif
-#ifdef S3C_UART_HAS_UINTM
-# define UINTM 0x38		/* interrupt mask register */
-#endif
+#define UBRDIVSLOT 0x2c		/* baudrate slot generator */
+#define UINTM 0x38		/* interrupt mask register */
 
 #ifndef S3C_UART_CLKSEL
 /* Use pclk */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:45 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:45 +0200
Subject: [PATCH 9/9] Samsung/serial: make the clock source configureable
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-10-git-send-email-jbe@pengutronix.de>

Instead of taking the value from somewhere, use the selected architecture to
select one. This ensures the selected clock source corresponds to the values
setup in the clocks-*.c from the mach directory.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |   18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 39680ae..53ac77f 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -45,11 +45,6 @@
 #define UBRDIVSLOT 0x2c		/* baudrate slot generator */
 #define UINTM 0x38		/* interrupt mask register */
 
-#ifndef S3C_UART_CLKSEL
-/* Use pclk */
-# define S3C_UART_CLKSEL 0
-#endif
-
 struct s3c_uart {
 	void __iomem *regs;
 	struct console_device cdev;
@@ -57,6 +52,17 @@ struct s3c_uart {
 
 #define to_s3c_uart(c)	container_of(c, struct s3c_uart, cdev)
 
+/* each architecture has a preferred reference clock for its UARTs */
+static unsigned s3c_select_arch_input_clock(void)
+{
+	/* S3C24xx: 0=2=PCLK, 1=UEXTCLK, 3=FCLK/n */
+	if (IS_ENABLED(CONFIG_ARCH_S3C24xx))
+		return 0;	/* use the internal PCLK */
+	/* S5PCxx: 0=PCLK, 1=SCLK_UART */
+	if (IS_ENABLED(CONFIG_ARCH_S5PCxx))
+		return 0;	/* use the internal PCLK */
+}
+
 static unsigned s3c_get_arch_uart_input_clock(void __iomem *base)
 {
 	unsigned reg = readw(base + UCON);
@@ -108,7 +114,7 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	 * all SoCs:
 	 *  - enable receive and transmit mode
 	 */
-	writew(0x0005 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
+	writew(0x0005 | UCON_SET_CLK_SRC(s3c_select_arch_input_clock()),
 						base + UCON);
 
 	if (IS_ENABLED(CONFIG_SAMSUNG_IMPROVED_UART))
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:40 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:40 +0200
Subject: [PATCH 4/9] Samsung/serial: make the code more readable
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-5-git-send-email-jbe@pengutronix.de>

This bit magic is just setting and reading the UART's selected clock source.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index ff3792b..c537bc0 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -31,6 +31,8 @@
 /* Note: Offsets are for little endian access */
 #define ULCON 0x00		/* line control */
 #define UCON 0x04		/* UART control */
+# define UCON_SET_CLK_SRC(x) (((x) & 0x03) << 10)
+# define UCON_GET_CLK_SRC(x) (((x) >> 10) & 0x03)
 #define UFCON 0x08		/* FIFO control */
 #define UMCON 0x0c		/* modem control */
 #define UTRSTAT 0x10		/* Rx/Tx status */
@@ -62,8 +64,7 @@ struct s3c_uart {
 static unsigned s3c_get_arch_uart_input_clock(void __iomem *base)
 {
 	unsigned reg = readw(base + UCON);
-	reg = (reg >> 10) & 0x3;
-	return s3c_get_uart_clk(reg);
+	return s3c_get_uart_clk(UCON_GET_CLK_SRC(reg));
 }
 
 #ifdef S3C_UART_HAS_UBRDIVSLOT
@@ -108,7 +109,8 @@ static int s3c_serial_init_port(struct console_device *cdev)
 
 	/* tx=level,rx=edge,disable timeout int.,enable rx error int.,
 	 * normal, interrupt or polling, no pre-divider */
-	writew(0x0245 | ((S3C_UART_CLKSEL) << 10), base + UCON);
+	writew(0x0245 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
+						base + UCON);
 
 #ifdef S3C_UART_HAS_UINTM
 	/* 'interrupt or polling mode' for both directions */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:36 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:36 +0200
Subject: [PATCH] ARM/Samsung: more clean up...
Message-ID: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>

...in preparation to add the S3C6410 SoC support.

Mostly simplifying the Samsung serial driver and some more cosmetic.

Comments are welcome.

Regards,
Juergen

The following changes since commit b47220d7f70df9191fc456dbcaeaa6ead72c6c02:

  NAND/Samsung: remove a leftover from architeture clean ups (2012-07-20 08:41:35 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/jbe/barebox.git master_samsung_clean_up

for you to fetch changes up to fc361ff7de449f9bb8a7653a5705621320d84560:

  Samsung/serial: make the clock source configureable (2012-07-20 21:16:02 +0200)

----------------------------------------------------------------
Juergen Beisert (9):
      ARM/Samsung: List only really supported S3C24xx SoCs
      ARM/Samsung: follow the name style of the other source files in this directory
      Samsung/serial: remove more ugly ifdef lines
      Samsung/serial: make the code more readable
      Samsung/serial: there is no need to ifdef these register defines
      Samsung/serial: there is no need to ifdef the slot table
      Samsung/serial: move the decision about an improved UART into Kconfig
      Samsung/serial: unify UCON register settings
      Samsung/serial: make the clock source configureable

 arch/arm/Kconfig                                   |    2 +-
 arch/arm/mach-samsung/Kconfig                      |    5 ++
 arch/arm/mach-samsung/Makefile                     |    3 +-
 .../{s3c24xx-clocks.c => clocks-s3c24xx.c}         |    0
 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h  |    5 +-
 drivers/serial/serial_s3c.c                        |   71 +++++++++++---------
 6 files changed, 48 insertions(+), 38 deletions(-)
 rename arch/arm/mach-samsung/{s3c24xx-clocks.c => clocks-s3c24xx.c} (100%)



From jbe at pengutronix.de  Fri Jul 20 15:29:44 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:44 +0200
Subject: [PATCH 8/9] Samsung/serial: unify UCON register settings
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-9-git-send-email-jbe@pengutronix.de>

This should work on S3C24XX and S3C64XX SoCs.

Tested at runtime on a Mini2440 and Mini6410.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |   10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 01f2246..39680ae 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -102,9 +102,13 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	/* Normal,No parity,1 stop,8 bit */
 	writeb(0x03, base + ULCON);
 
-	/* tx=level,rx=edge,disable timeout int.,enable rx error int.,
-	 * normal, interrupt or polling, no pre-divider */
-	writew(0x0245 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
+	/*
+	 * S3C2440 SoC:
+	 *  - no clock divider
+	 * all SoCs:
+	 *  - enable receive and transmit mode
+	 */
+	writew(0x0005 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
 						base + UCON);
 
 	if (IS_ENABLED(CONFIG_SAMSUNG_IMPROVED_UART))
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:37 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:37 +0200
Subject: [PATCH 1/9] ARM/Samsung: List only really supported S3C24xx SoCs
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-2-git-send-email-jbe@pengutronix.de>

The other SoCs differs in many ways from the currently supported S3C2410 and
S3C2440, so remove them.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Kconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index af4cb59..2dbac66 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -68,7 +68,7 @@ config ARCH_PXA
 	select GENERIC_GPIO
 
 config ARCH_S3C24xx
-	bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"
+	bool "Samsung S3C2410, S3C2440"
 	select ARCH_SAMSUNG
 	select CPU_ARM920T
 	select GENERIC_GPIO
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:39 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:39 +0200
Subject: [PATCH 3/9] Samsung/serial: remove more ugly ifdef lines
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-4-git-send-email-jbe@pengutronix.de>

More or less just cosmetic. Easier to read, and lets the compiler remove unused
code.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 7a9b355..ff3792b 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -115,11 +115,10 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	writeb(0xf, base + UINTM);
 #endif
 
-#ifdef CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC
-	writeb(0x10, base + UMCON); /* enable auto flow control */
-#else
-	writeb(0x01, base + UMCON); /* RTS up */
-#endif
+	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC))
+		writeb(0x10, base + UMCON); /* enable auto flow control */
+	else
+		writeb(0x01, base + UMCON); /* RTS up */
 
 	return 0;
 }
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:43 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:43 +0200
Subject: [PATCH 7/9] Samsung/serial: move the decision about an improved UART
 into Kconfig
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-8-git-send-email-jbe@pengutronix.de>

More or less just cosmetic (removing ifdefs!).

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Kconfig                     |    5 +++++
 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h |    5 +++--
 drivers/serial/serial_s3c.c                       |   16 ++++++++--------
 3 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index c60f5ed..37d1aa3 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -18,6 +18,9 @@ config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
 	hex
 	default 0x1ff0 if ARCH_S5PCxx
 
+config SAMSUNG_IMPROVED_UART
+	bool
+
 if ARCH_S3C24xx
 
 config CPU_S3C2410
@@ -87,9 +90,11 @@ endif
 if ARCH_S5PCxx
 
 config CPU_S5PC110
+	select SAMSUNG_IMPROVED_UART
 	bool
 
 config CPU_S5PV210
+	select SAMSUNG_IMPROVED_UART
 	bool
 
 #choice
diff --git a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
index cb05527..448e3b8 100644
--- a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
@@ -45,5 +45,6 @@
 #define S3C_UART2_SIZE 0x400
 #define S3C_UART3_BASE (S3C_UART_BASE + 0x800)
 #define S3C_UART3_SIZE 0x400
-#define S3C_UART_HAS_UBRDIVSLOT
-#define S3C_UART_HAS_UINTM
+
+#define S5P_DMC0_BASE 0xF0000000
+#define S5P_DMC1_BASE 0xF1400000
diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 2cb2eef..01f2246 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -79,10 +79,11 @@ static int s3c_serial_setbaudrate(struct console_device *cdev, int baudrate)
 	void __iomem *base = priv->regs;
 	unsigned val;
 
-#ifdef S3C_UART_HAS_UBRDIVSLOT
-	val = s3c_get_arch_uart_input_clock(base) / baudrate;
-	writew(udivslot_table[val & 15], base + UBRDIVSLOT);
-#endif
+	if (IS_ENABLED(CONFIG_SAMSUNG_IMPROVED_UART)) {
+		val = s3c_get_arch_uart_input_clock(base) / baudrate;
+		writew(udivslot_table[val & 15], base + UBRDIVSLOT);
+	}
+
 	val = s3c_get_arch_uart_input_clock(base) / (16 * baudrate) - 1;
 	writew(val, base + UBRDIV);
 
@@ -106,10 +107,9 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	writew(0x0245 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
 						base + UCON);
 
-#ifdef S3C_UART_HAS_UINTM
-	/* 'interrupt or polling mode' for both directions */
-	writeb(0xf, base + UINTM);
-#endif
+	if (IS_ENABLED(CONFIG_SAMSUNG_IMPROVED_UART))
+		/* 'interrupt or polling mode' for both directions */
+		writeb(0xf, base + UINTM);
 
 	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC))
 		writeb(0x10, base + UMCON); /* enable auto flow control */
-- 
1.7.10.4



From jbe at pengutronix.de  Fri Jul 20 15:29:42 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 20 Jul 2012 21:29:42 +0200
Subject: [PATCH 6/9] Samsung/serial: there is no need to ifdef the slot table
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342812585-22017-7-git-send-email-jbe@pengutronix.de>

The '__maybe_unused' attribute prevents the compiler from warning about an
unused variable and the 'static' will remove it entirely if it's not used.
This patch is only cosmetic.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |    2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 3565edf..2cb2eef 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -63,7 +63,6 @@ static unsigned s3c_get_arch_uart_input_clock(void __iomem *base)
 	return s3c_get_uart_clk(UCON_GET_CLK_SRC(reg));
 }
 
-#ifdef S3C_UART_HAS_UBRDIVSLOT
 /*
  * This table takes the fractional value of the baud divisor and gives
  * the recommended setting for the UDIVSLOT register. Refer the datasheet
@@ -73,7 +72,6 @@ static const uint16_t udivslot_table[] __maybe_unused = {
 	0x0000, 0x0080, 0x0808, 0x0888, 0x2222, 0x4924, 0x4A52, 0x54AA,
 	0x5555, 0xD555, 0xD5D5, 0xDDD5, 0xDDDD, 0xDFDD, 0xDFDF, 0xFFDF,
 };
-#endif
 
 static int s3c_serial_setbaudrate(struct console_device *cdev, int baudrate)
 {
-- 
1.7.10.4



From shc_work at mail.ru  Sat Jul 21 00:50:08 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Sat, 21 Jul 2012 08:50:08 +0400
Subject: [PATCH 2/3] mc13xxx: Hide struct mc13xxx from board support code
In-Reply-To: <1342846209-10461-1-git-send-email-shc_work@mail.ru>
References: <1342846209-10461-1-git-send-email-shc_work@mail.ru>
Message-ID: <1342846209-10461-2-git-send-email-shc_work@mail.ru>

Board support units should use only provided functions.

Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 drivers/mfd/mc13xxx.c |   13 +++++++++++++
 include/mfd/mc13xxx.h |   13 +------------
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/mfd/mc13xxx.c b/drivers/mfd/mc13xxx.c
index 2934e9d..b1417c8 100644
--- a/drivers/mfd/mc13xxx.c
+++ b/drivers/mfd/mc13xxx.c
@@ -32,6 +32,19 @@
 
 #define DRIVERNAME		"mc13xxx"
 
+enum mc13xxx_mode {
+	MC13XXX_MODE_I2C,
+	MC13XXX_MODE_SPI,
+};
+
+struct mc13xxx {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+	struct spi_device	*spi;
+	enum mc13xxx_mode	mode;
+	int			revision;
+};
+
 #define to_mc13xxx(a)		container_of(a, struct mc13xxx, cdev)
 
 static struct mc13xxx *mc_dev;
diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h
index 632c9fb..f4e3302 100644
--- a/include/mfd/mc13xxx.h
+++ b/include/mfd/mc13xxx.h
@@ -150,18 +150,7 @@
 #define MC13783_SW1B_SOFTSTART		(1 << 17)
 #define MC13783_SW_PLL_FACTOR(x)	(((x) - 28) << 19)
 
-enum mc13xxx_mode {
-	MC13XXX_MODE_I2C,
-	MC13XXX_MODE_SPI,
-};
-
-struct mc13xxx {
-	struct cdev		cdev;
-	struct i2c_client	*client;
-	struct spi_device	*spi;
-	enum mc13xxx_mode	mode;
-	int			revision;
-};
+struct mc13xxx;
 
 #ifdef CONFIG_MFD_MC13XXX
 extern struct mc13xxx *mc13xxx_get(void);
-- 
1.7.3.4



From shc_work at mail.ru  Sat Jul 21 00:50:07 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Sat, 21 Jul 2012 08:50:07 +0400
Subject: [PATCH 1/3] mc13xxx: Added dummy definitions if CONFIG_MFD_MC13XXX is
 not set
Message-ID: <1342846209-10461-1-git-send-email-shc_work@mail.ru>


Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/pcm038/pcm038.c |    2 --
 include/mfd/mc13xxx.h           |   23 ++++++++++++++++++++++-
 2 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index badc978..ffd8d87 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -125,7 +125,6 @@ static inline uint32_t get_pll_spctl10(void)
  */
 static int pcm038_power_init(void)
 {
-#ifdef CONFIG_MFD_MC13XXX
 	uint32_t spctl0 = get_pll_spctl10();
 	struct mc13xxx *mc13xxx = mc13xxx_get();
 
@@ -159,7 +158,6 @@ static int pcm038_power_init(void)
 			printf("Failed to initialize PMIC. Will continue with low CPU speed\n");
 		}
 	}
-#endif
 
 	/* clock gating enable */
 	GPCR = 0x00050f08;
diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h
index 2880307..632c9fb 100644
--- a/include/mfd/mc13xxx.h
+++ b/include/mfd/mc13xxx.h
@@ -163,10 +163,31 @@ struct mc13xxx {
 	int			revision;
 };
 
+#ifdef CONFIG_MFD_MC13XXX
 extern struct mc13xxx *mc13xxx_get(void);
-
 extern int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val);
 extern int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val);
 extern int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val);
+#else
+static inline struct mc13xxx *mc13xxx_get(void)
+{
+	return NULL;
+}
+
+static inline int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val)
+{
+	return -ENODEV;
+}
+
+static inline int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val)
+{
+	return -ENODEV;
+}
+
+static inline int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val)
+{
+	return -ENODEV;
+}
+#endif
 
 #endif /* __MFD_MC13XXX_H */
-- 
1.7.3.4



From shc_work at mail.ru  Sat Jul 21 00:50:09 2012
From: shc_work at mail.ru (Alexander Shiyan)
Date: Sat, 21 Jul 2012 08:50:09 +0400
Subject: [PATCH 3/3] PCM038: Added setup for OTG host pins
In-Reply-To: <1342846209-10461-1-git-send-email-shc_work@mail.ru>
References: <1342846209-10461-1-git-send-email-shc_work@mail.ru>
Message-ID: <1342846209-10461-3-git-send-email-shc_work@mail.ru>


Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
---
 arch/arm/boards/pcm038/pcm038.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index ffd8d87..fdf7431 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -236,6 +236,19 @@ static int pcm038_devices_init(void)
 		PA29_PF_VSYNC,
 		PA30_PF_CONTRAST,
 		PA31_PF_OE_ACD,
+		/* OTG host */
+		PC7_PF_USBOTG_DATA5,
+		PC8_PF_USBOTG_DATA6,
+		PC9_PF_USBOTG_DATA0,
+		PC10_PF_USBOTG_DATA2,
+		PC11_PF_USBOTG_DATA1,
+		PC12_PF_USBOTG_DATA4,
+		PC13_PF_USBOTG_DATA3,
+		PE0_PF_USBOTG_NXT,
+		PE1_PF_USBOTG_STP,
+		PE2_PF_USBOTG_DIR,
+		PE24_PF_USBOTG_CLK,
+		PE25_PF_USBOTG_DATA7,
 		/* I2C1 */
 		PD17_PF_I2C_DATA | GPIO_PUEN,
 		PD18_PF_I2C_CLK,
-- 
1.7.3.4



From shc_work at mail.ru  Sat Jul 21 01:11:25 2012
From: shc_work at mail.ru (=?UTF-8?B?QWxleGFuZGVyIFNoaXlhbg==?=)
Date: Sat, 21 Jul 2012 09:11:25 +0400
Subject: =?UTF-8?B?UmU6IFtQQVRDSCAyLzNdIG1jMTN4eHg6IEhpZGUgc3RydWN0IG1jMTN4eHgg?=
 =?UTF-8?B?ZnJvbSBib2FyZCBzdXBwb3J0IGNvZGU=?=
In-Reply-To: <1342846209-10461-2-git-send-email-shc_work@mail.ru>
References: <1342846209-10461-1-git-send-email-shc_work@mail.ru>
 <1342846209-10461-2-git-send-email-shc_work@mail.ru>
Message-ID: <1342847485.310039897@f214.mail.ru>

Hello.

Sat, 21 Jul 2012 08:50:08 +0400 ?? Alexander Shiyan <shc_work at mail.ru>:
> Board support units should use only provided functions.
>  Signed-off-by: Alexander Shiyan <shc_work at mail.ru>
...

After posting this one, I found some problems, so just drop this one patch.
Sorry.

From jbe at pengutronix.de  Sat Jul 21 06:04:31 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:31 +0200
Subject: [PATCH 6/8] ARM/Samsung: add the S3C6410 SoC
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-7-git-send-email-jbe@pengutronix.de>

After adding the base support, the CPU can now be enabled in the build system.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Kconfig              |    6 ++++++
 arch/arm/mach-samsung/Kconfig |   21 ++++++++++++++++++++-
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2dbac66..4b7a39c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -79,6 +79,12 @@ config ARCH_S5PCxx
 	select CPU_V7
 	select GENERIC_GPIO
 
+config ARCH_S3C64xx
+	bool "Samsung S3C64xx"
+	select ARCH_SAMSUNG
+	select CPU_V6
+	select GENERIC_GPIO
+
 config ARCH_VERSATILE
 	bool "ARM Versatile boards (ARM926EJ-S)"
 	select CPU_ARM926T
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 37d1aa3..8f63963 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -17,6 +17,8 @@ config BOARDINFO
 config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
 	hex
 	default 0x1ff0 if ARCH_S5PCxx
+# TODO
+	default 0x2000 if ARCH_S3C64xx
 
 config SAMSUNG_IMPROVED_UART
 	bool
@@ -87,6 +89,24 @@ endmenu
 
 endif
 
+if ARCH_S3C64xx
+
+config CPU_S3C6410
+	select SAMSUNG_IMPROVED_UART
+	bool
+
+choice
+
+	prompt "S3C64xx Board Type"
+
+endchoice
+
+menu "Board specific settings       "
+
+endmenu
+
+endif
+
 if ARCH_S5PCxx
 
 config CPU_S5PC110
@@ -106,7 +126,6 @@ config CPU_S5PV210
 
 endif
 
-
 menu "S3C Features              "
 
 config S3C_LOWLEVEL_INIT
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 21 06:04:27 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:27 +0200
Subject: [PATCH 2/8] ARM/Samsung: adapt the generic timer driver to support
 the S3C6410 SoC
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-3-git-send-email-jbe@pengutronix.de>

The S3C64XX SoC has a real 32 bit counter, but almost the same style of
registers. It's enough to change the parameters, to get the routines work on
this SoC.

TODO: what about the S5P SoCs?

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/s3c-timer.c |   17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-samsung/s3c-timer.c b/arch/arm/mach-samsung/s3c-timer.c
index 6665c8c..271f97d 100644
--- a/arch/arm/mach-samsung/s3c-timer.c
+++ b/arch/arm/mach-samsung/s3c-timer.c
@@ -37,11 +37,20 @@
 #define S3C_TCNTB4 (S3C_TIMER_BASE + 0x3c)
 #define S3C_TCNTO4 (S3C_TIMER_BASE + 0x40)
 
-#define TIMER_WIDTH 16
-#define TIMER_SHIFT 10
-#define PRE_MUX 3
-#define PRE_MUX_ADD 1
+#ifdef CONFIG_ARCH_S3C24xx
+# define TIMER_WIDTH 16
+# define TIMER_SHIFT 10
+# define PRE_MUX 3
+# define PRE_MUX_ADD 1
 static const uint32_t max = 0x0000ffff;
+#endif
+#ifdef CONFIG_ARCH_S3C64xx
+# define TIMER_WIDTH 32
+# define TIMER_SHIFT 10
+# define PRE_MUX 4
+# define PRE_MUX_ADD 0
+static const uint32_t max = ~0;
+#endif
 
 static void s3c_init_t4_clk_source(void)
 {
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 21 06:04:25 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:25 +0200
Subject: [PATCH] Addd the Samsung S3C6410 SoC to Barebox
Message-ID: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>

This patch series tries to add support for the Samsung's S3C6410 ARMv11 SoC
and with this main support also two popular platforms which are using this
SoC: FriendlyARM's Mini6410 and Tiny6410.

Comments are welcome.

If someone wants to try this series it can be found here
git://git.pengutronix.de/git/jbe/barebox.git, branch "master_s3c6410_inclusion"

Note: this series depends on the previously sent patch series
"ARM/Samsung: more clean up..."

Juergen



From jbe at pengutronix.de  Sat Jul 21 06:04:26 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:26 +0200
Subject: [PATCH 1/8] ARM/Samsung: add S3C6410 SoC iomap
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-2-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/include/mach/s3c-iomap.h     |    3 ++
 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h |   51 ++++++++++++++++++++
 2 files changed, 54 insertions(+)
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h

diff --git a/arch/arm/mach-samsung/include/mach/s3c-iomap.h b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
index d34ace4..09a6891 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
@@ -22,6 +22,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/s3c24xx-iomap.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/s3c64xx-iomap.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/s5pcxx-iomap.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h b/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h
new file mode 100644
index 0000000..9cc3a1b
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* S3C64xx device base addresses */
+#define S3C_SROM_SFR		0x70000000
+#define S3C_NAND_BASE		0x70200000
+#define S3C_SDI0_BASE		0x7c200000
+#define S3C_SDI0_SIZE		0x100
+#define S3C_SDI1_BASE		0x7c300000
+#define S3C_SDI1_SIZE		0x100
+#define S3C_SDI2_BASE		0x7c400000
+#define S3C_SDI2_SIZE		0x100
+#define S3C_DRAMC		0x7e001000
+#define S3C_WATCHDOG_BASE	0x7e004000
+#define S3C_CLOCK_POWER_BASE	0x7e00f000
+#define S3C_UART_BASE		0x7f005000
+#define S3C_TIMER_BASE		0x7f006000
+#define S3C_GPIO_BASE		0x7f008000
+
+#define S3C_UART1_BASE (S3C_UART_BASE)
+#define S3C_UART1_SIZE 0x400
+#define S3C_UART2_BASE (S3C_UART_BASE + 0x400)
+#define S3C_UART2_SIZE 0x400
+#define S3C_UART3_BASE (S3C_UART_BASE + 0x800)
+#define S3C_UART3_SIZE 0x400
+#define S3C_UART4_BASE (S3C_UART_BASE + 0xc00)
+#define S3C_UART4_SIZE 0x400
+
+#define S3C_SDRAM_BASE 0x50000000
+#define S3C_SDRAM_END (S3C_SDRAM_BASE + 0x10000000)
+
+#define S3C_SROM_BW (S3C_SROM_SFR)
+#define S3C_SROM_BC0 (S3C_SROM_SFR + 4)
+
+#define S3C_CS0_BASE 0x10000000
+#define S3C_CS1_BASE 0x18000000
+#define S3C_CS2_BASE 0x20000000
+#define S3C_CS3_BASE 0x28000000
+#define S3C_CS4_BASE 0x30000000
+#define S3C_CS5_BASE 0x38000000
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 21 06:04:30 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:30 +0200
Subject: [PATCH 5/8] ARM/Samsung: add generic S3C6410 SoC specific functions
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-6-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    2 +-
 .../mach-samsung/include/mach/devices-s3c64xx.h    |   40 ++++++++++++
 arch/arm/mach-samsung/include/mach/s3c-generic.h   |   16 +++++
 arch/arm/mach-samsung/mem-s3c64xx.c                |   66 ++++++++++++++++++++
 4 files changed, 123 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c64xx.h
 create mode 100644 arch/arm/mach-samsung/mem-s3c64xx.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 9a2484f..42a6708 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -2,5 +2,5 @@ obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o
+obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o mem-s3c64xx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/include/mach/devices-s3c64xx.h b/arch/arm/mach-samsung/include/mach/devices-s3c64xx.h
new file mode 100644
index 0000000..bcbee97
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/devices-s3c64xx.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef INCLUDE_MACH_DEVICES_S3C64XX_H
+# define INCLUDE_MACH_DEVICES_S3C64XX_H
+
+#include <driver.h>
+#include <mach/s3c64xx-iomap.h>
+
+static inline void s3c64xx_add_uart1(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
+			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+}
+
+static inline void s3c64xx_add_uart2(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART2_BASE,
+			S3C_UART2_SIZE, IORESOURCE_MEM, NULL);
+}
+
+static inline void s3c64xx_add_uart3(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART3_BASE,
+			S3C_UART3_SIZE, IORESOURCE_MEM, NULL);
+}
+
+#endif /* INCLUDE_MACH_DEVICES_S3C64XX_H */
diff --git a/arch/arm/mach-samsung/include/mach/s3c-generic.h b/arch/arm/mach-samsung/include/mach/s3c-generic.h
index 11b083d..b4a9e69 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-generic.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-generic.h
@@ -41,3 +41,19 @@ void s3c24xx_disable_second_sdram_bank(void);
 #ifdef CONFIG_ARCH_S5PCxx
 void s5p_init_pll(void);
 #endif
+
+#ifdef CONFIG_ARCH_S3C64xx
+uint32_t s3c_get_epllclk(void);
+unsigned s3c_get_hsmmc_clk(int);
+void s3c_set_hsmmc_clk(int, int, unsigned);
+unsigned s3c6410_get_memory_size(void);
+struct s3c6410_chipselect {
+	unsigned adr_setup_t; /* in [ns] */
+	unsigned access_setup_t; /* in [ns] */
+	unsigned access_t; /* in [ns] */
+	unsigned cs_hold_t; /* in [ns] */
+	unsigned adr_hold_t; /* in [ns] */
+	unsigned char width; /* 8 or 16 */
+};
+int s3c6410_setup_chipselect(int, const struct s3c6410_chipselect*);
+#endif
diff --git a/arch/arm/mach-samsung/mem-s3c64xx.c b/arch/arm/mach-samsung/mem-s3c64xx.c
new file mode 100644
index 0000000..aca2cf5
--- /dev/null
+++ b/arch/arm/mach-samsung/mem-s3c64xx.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <io.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+
+#define S3C_DRAMC_CHIP_0_CFG (S3C_DRAMC + 0x200)
+
+/* note: this routine honors the first memory bank only */
+unsigned s3c6410_get_memory_size(void)
+{
+	unsigned reg = readl(S3C_DRAMC_CHIP_0_CFG) & 0xff;
+
+	return ~(reg << 24) + 1;
+}
+
+/* configure the timing of one of the available external chip select lines */
+int s3c6410_setup_chipselect(int no, const struct s3c6410_chipselect *c)
+{
+	unsigned per_t = 1000000000 / s3c_get_hclk();
+	unsigned tacs, tcos, tacc, tcoh, tcah, shift;
+	uint32_t reg;
+
+	/* start of cycle to chip select assertion (= address/data setup) */
+	tacs = DIV_ROUND_UP(c->adr_setup_t, per_t);
+	/* start of CS to read/write assertion (= access setup) */
+	tcos = DIV_ROUND_UP(c->access_setup_t, per_t);
+	/* length of read/write assertion (= access lenght) */
+	tacc = DIV_ROUND_UP(c->access_t, per_t) - 1;
+	/* CS hold after access is finished */
+	tcoh = DIV_ROUND_UP(c->cs_hold_t, per_t);
+	/* adress/data hold after CS is deasserted */
+	tcah = DIV_ROUND_UP(c->adr_hold_t, per_t);
+
+	shift = no * 4;
+	reg = readl(S3C_SROM_BW) & ~(0xf << shift);
+	if (c->width == 16)
+		reg |= 0x1 << shift;
+	writel(reg, S3C_SROM_BW);
+#ifdef DEBUG
+	if (tacs > 15 || tcos > 15 || tacc > 31 || tcoh > 15 || tcah > 15) {
+		pr_err("At least one of the timings are invalid\n");
+		return -EINVAL;
+	}
+	pr_info("Will write 0x%08X\n", tacs << 28 | tcos << 24 | tacc << 16 |
+					tcoh << 12 | tcah << 8);
+#endif
+	writel(tacs << 28 | tcos << 24 | tacc << 16 | tcoh << 12 | tcah << 8,
+						S3C_SROM_BC0 + shift);
+
+	return 0;
+}
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 21 06:04:32 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:32 +0200
Subject: [PATCH 7/8] ARM/Samsung: add the Mini6410 platform as the first user
 of the S3C6410 SoC
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-8-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Makefile                               |    1 +
 arch/arm/boards/friendlyarm-mini6410/Makefile   |    1 +
 arch/arm/boards/friendlyarm-mini6410/config.h   |    8 +
 arch/arm/boards/friendlyarm-mini6410/env/config |   56 +++++
 arch/arm/boards/friendlyarm-mini6410/mini6410.c |  305 +++++++++++++++++++++++
 arch/arm/configs/friendlyarm_mini6410_defconfig |   40 +++
 arch/arm/mach-samsung/Kconfig                   |   10 +
 7 files changed, 421 insertions(+)
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/Makefile
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/config.h
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/env/config
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/mini6410.c
 create mode 100644 arch/arm/configs/friendlyarm_mini6410_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..bd03fe6 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -123,6 +123,7 @@ board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
 board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
 board-$(CONFIG_MACH_GUF_CUPID)			:= guf-cupid
 board-$(CONFIG_MACH_MINI2440)			:= mini2440
+board-$(CONFIG_MACH_MINI6410)			:= friendlyarm-mini6410
 board-$(CONFIG_MACH_QIL_A9260)			:= qil-a9260
 board-$(CONFIG_MACH_TNY_A9260)			:= tny-a926x
 board-$(CONFIG_MACH_TNY_A9263)			:= tny-a926x
diff --git a/arch/arm/boards/friendlyarm-mini6410/Makefile b/arch/arm/boards/friendlyarm-mini6410/Makefile
new file mode 100644
index 0000000..cd7a427
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/Makefile
@@ -0,0 +1 @@
+obj-y += mini6410.o
diff --git a/arch/arm/boards/friendlyarm-mini6410/config.h b/arch/arm/boards/friendlyarm-mini6410/config.h
new file mode 100644
index 0000000..ee38192
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/config.h
@@ -0,0 +1,8 @@
+/* FriendlyARM Mini6410 specific global settings */
+
+#ifndef _MINI6410_CONFIG_H_
+# define _MINI6410_CONFIG_H_
+
+#define S3C64XX_CLOCK_REFERENCE 12000000
+
+#endif /* _MINI6410_CONFIG_H_ */
diff --git a/arch/arm/boards/friendlyarm-mini6410/env/config b/arch/arm/boards/friendlyarm-mini6410/env/config
new file mode 100644
index 0000000..a1c86e1
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/env/config
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+machine=mini6410
+eth0.serverip=a.b.c.d.e
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d.e
+#eth0.netmask=a.b.c.d.e
+#eth0.gateway=a.b.c.d.e
+eth0.ethaddr=08:90:90:90:90:90
+
+# can be either 'nfs', 'tftp' or 'nand'
+kernel_loc=tftp
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-${machine}.${rootfs_type}
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-${machine}
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+	kernelimage="${user}"-"${kernelimage}"
+	nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
+	rootfsimage="${user}"-"${rootfsimage}"
+else
+	nfsroot="${eth0.serverip}:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+#
+# "mini6410" kernel parameter
+# 0 .. 9 = screen type
+# i = touchscreen with propritary FriendlyARM protocol
+# Note: can be "minit6410= " if nothing of these components are connected
+#
+bootargs="console=ttySAC0,115200 mini6410=0"
+
+nand_device="nand"
+nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nand=3
diff --git a/arch/arm/boards/friendlyarm-mini6410/mini6410.c b/arch/arm/boards/friendlyarm-mini6410/mini6410.c
new file mode 100644
index 0000000..01437ac
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/mini6410.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <dm9000.h>
+#include <gpio.h>
+#include <generated/mach-types.h>
+#include <asm/armlinux.h>
+#include <mach/s3c-iomap.h>
+#include <mach/devices-s3c64xx.h>
+#include <mach/s3c-generic.h>
+
+/*
+ * dm9000 network controller onboard
+ * Connected to CS line 1 and interrupt line EINT7,
+ * data width is 16 bit
+ * Area 1: Offset 0x300...0x301
+ * Area 2: Offset 0x304...0x305
+ */
+static struct dm9000_platform_data dm9000_data = {
+	.srom = 0,	/* no serial ROM for the ethernet address */
+};
+
+static const unsigned pin_usage[] = {
+	/* UART2 (spare, 3,3 V TTL level only) */
+	GPA4_RXD1 | ENABLE_PU,
+	GPA5_TXD1,
+	GPA6_NCTS1 | ENABLE_PU,
+	GPA7_NRTS1,
+	/* UART3 (spare, 3,3 V TTL level only) */
+	GPB0_RXD2 | ENABLE_PU,
+	GPB1_TXD2,
+	/* UART4 (spare, 3,3 V TTL level only) */
+	GPB2_RXD3 | ENABLE_PU,
+	GPB3_TXD3,
+
+	GPB4_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* I2C bus */
+	GPB5_IIC0_SCL,	/* external PU */
+	GPB6_IIC0_SDA,	/* external PU */
+
+	GPC0_SPI0_MISO | ENABLE_PU,
+	GPC1_SPI0_CLK,
+	GPC2_SPI0_MOSI,
+	GPC3_SPI0_NCS,
+
+	GPC4_SPI1_MISO | ENABLE_PU,
+	GPC5_SPI1_CLK,
+	GPC6_SPI1_MOSI,
+	GPC7_SPI1_NCS,
+
+	GPD0_AC97_BITCLK,
+	GPD1_AC97_NRST,
+	GPD2_AC97_SYNC,
+	GPD3_AC97_SDI | ENABLE_PU,
+	GPD4_AC97_SDO,
+
+	GPE0_GPIO | GPIO_OUT | GPIO_VAL(0), /* LCD backlight off */
+	GPE1_GPIO | GPIO_IN | ENABLE_PU,
+	GPE2_GPIO | GPIO_IN | ENABLE_PU,
+	GPE3_GPIO | GPIO_IN | ENABLE_PU,
+	GPE4_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* keep all camera signals at reasonable values */
+	GPF0_GPIO | GPIO_IN | ENABLE_PU,
+	GPF1_GPIO | GPIO_IN | ENABLE_PU,
+	GPF2_GPIO | GPIO_IN | ENABLE_PU,
+	GPF3_GPIO | GPIO_IN | ENABLE_PU,
+	GPF4_GPIO | GPIO_IN | ENABLE_PU,
+	GPF5_GPIO | GPIO_IN | ENABLE_PU,
+	GPF6_GPIO | GPIO_IN | ENABLE_PU,
+	GPF7_GPIO | GPIO_IN | ENABLE_PU,
+	GPF8_GPIO | GPIO_IN | ENABLE_PU,
+	GPF9_GPIO | GPIO_IN | ENABLE_PU,
+	GPF10_GPIO | GPIO_IN | ENABLE_PU,
+	GPF11_GPIO | GPIO_IN | ENABLE_PU,
+	GPF12_GPIO | GPIO_IN | ENABLE_PU,
+	GPF13_GPIO | GPIO_OUT | GPIO_VAL(0), /* USB power off */
+#if 0
+	GPF14_CLKOUT, /* for testing purposes, but very noisy */
+#else
+	GPF14_GPIO | GPIO_OUT | GPIO_VAL(0), /* Buzzer off */
+#endif
+	GPF15_GPIO | GPIO_OUT | GPIO_VAL(0), /* Backlight PWM inactive */
+
+	/* SD card slot (all signals have external 10k PU) */
+	GPG0_MMC0_CLK,
+	GPG1_MMC0_CMD,
+	GPG2_MMC0_DAT0,
+	GPG3_MMC0_DAT1,
+	GPG4_MMC0_DAT2,
+	GPG5_MMC0_DAT3,
+	GPG6_MMC0_NCD,
+
+	/* SDIO slot (all used signals have external PU) */
+	GPH0_GPIO | GPIO_IN,	/* CLK */
+	GPH1_GPIO | GPIO_IN,	/* CMD */
+	GPH2_GPIO | GPIO_IN,	/* DAT0 */
+	GPH3_GPIO | GPIO_IN,	/* DAT1 */
+	GPH4_GPIO | GPIO_IN,	/* DAT2 */
+	GPH5_GPIO | GPIO_IN,	/* DAT3 */
+	GPH6_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH7_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH8_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH9_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+
+	/* as long as we are not using the LCD controller, disable the pins */
+	GPI0_GPIO | GPIO_IN | ENABLE_PD,
+	GPI1_GPIO | GPIO_IN | ENABLE_PD,
+	GPI2_GPIO | GPIO_IN | ENABLE_PD,
+	GPI3_GPIO | GPIO_IN | ENABLE_PD,
+	GPI4_GPIO | GPIO_IN | ENABLE_PD,
+	GPI5_GPIO | GPIO_IN | ENABLE_PD,
+	GPI6_GPIO | GPIO_IN | ENABLE_PD,
+	GPI7_GPIO | GPIO_IN | ENABLE_PD,
+	GPI8_GPIO | GPIO_IN | ENABLE_PD,
+	GPI9_GPIO | GPIO_IN | ENABLE_PD,
+	GPI10_GPIO | GPIO_IN | ENABLE_PD,
+	GPI11_GPIO | GPIO_IN | ENABLE_PD,
+	GPI12_GPIO | GPIO_IN | ENABLE_PD,
+	GPI13_GPIO | GPIO_IN | ENABLE_PD,
+	GPI14_GPIO | GPIO_IN | ENABLE_PD,
+	GPI15_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ0_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ1_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ2_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ3_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ4_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ5_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ6_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ7_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ8_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ9_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ10_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ11_GPIO | GPIO_IN | ENABLE_PD,
+
+	GPK0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK2_GPIO | GPIO_IN,
+	GPK3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK4_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #1 (high = LED off) */
+	GPK5_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #2 (high = LED off) */
+	GPK6_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #3 (high = LED off) */
+	GPK7_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #4 (high = LED off) */
+	GPK8_GPIO | GPIO_IN, 			/* (external PU) */
+	GPK9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK10_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK11_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK12_GPIO | GPIO_IN,			/* OCT_DET */
+	GPK13_GPIO | GPIO_IN,			/* WIFI power (external PU) */
+	GPK14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK15_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPL0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL2_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL4_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL5_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL6_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL7_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL8_GPIO | GPIO_IN,			/* EINT16 (external PU) */
+	GPL9_GPIO | GPIO_IN | ENABLE_PU,	/* EINT17 */
+	GPL10_GPIO | GPIO_IN | ENABLE_PU,	/* EINT18 */
+	GPL11_GPIO | GPIO_IN,			/* EINT19 + K7 (external PU) */
+	GPL12_GPIO | GPIO_IN,			/* EINT20 + K6 (external PU) */
+	GPL13_GPIO | GPIO_IN,			/* SD0 WP (external PU) */
+	GPL14_GPIO | GPIO_IN,			/* SD1 WP (external PU) */
+
+	GPM0_GPIO | GPIO_IN,			/* (external PU) */
+	GPM1_GPIO | GPIO_IN,			/* (external PU) */
+	GPM2_GPIO | GPIO_IN,			/* (external PU) */
+	GPM3_GPIO | GPIO_IN,			/* (external PU) */
+	GPM4_GPIO | GPIO_IN,			/* (external PU) */
+	GPM5_GPIO | GPIO_IN,			/* (external PU) */
+
+	GPN0_GPIO | GPIO_IN,			/* EINT0 (external PU) */
+	GPN1_GPIO | GPIO_IN,			/* EINT1 (external PU) */
+	GPN2_GPIO | GPIO_IN,			/* EINT2 (external PU) */
+	GPN3_GPIO | GPIO_IN,			/* EINT3 (external PU) */
+	GPN4_GPIO | GPIO_IN,			/* EINT4 (external PU) */
+	GPN5_GPIO | GPIO_IN,			/* EINT5 (external PU) */
+	GPN6_GPIO | GPIO_IN,			/* EINT6 (external PU) */
+	GPN7_GPIO | GPIO_IN | ENABLE_PU,	/* EINT7 DM9000 interrupt */
+	GPN8_GPIO | GPIO_IN,			/* EINT8 USB detect (external PU) */
+	GPN9_GPIO | GPIO_IN,			/* EINT9 (external PU) */
+	GPN10_GPIO | GPIO_IN,			/* SD1 CD (external PU) */
+	GPN11_GPIO | GPIO_IN,			/* EINT11 (external PU) */
+	GPN12_GPIO | GPIO_IN,			/* EINT12 IR in (external PU) */
+	GPN13_GPIO | GPIO_IN,			/* BOOT0/EINT13 (externally fixed) */
+	GPN14_GPIO | GPIO_IN,			/* BOOT1/EINT14 (externally fixed) */
+	GPN15_GPIO | GPIO_IN,			/* BOOT2/EINT15 (externally fixed) */
+
+	GPO0_NCS2,				/* NAND */
+	GPO1_NCS3,				/* NAND */
+	GPO2_NCS4,				/* CON5 */
+	GPO3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO4_GPIO | GPIO_IN | ENABLE_PU,	/* CON5 pin 8 */
+	GPO5_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO6_ADDR6,				/* CON5 */
+	GPO7_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO8_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO10_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO11_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO12_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO13_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO15_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPP0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP2_NWAIT | ENABLE_PU,			/* CON5 */
+	GPP3_FALE,				/* NAND */
+	GPP4_FCLE,				/* NAND */
+	GPP5_FWE,				/* NAND */
+	GPP6_FRE,				/* NAND */
+	GPP7_RNB,				/* NAND (external PU) */
+	GPP8_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP10_GPIO | GPIO_IN,			/* (external PU) */
+	GPP11_GPIO | GPIO_IN,			/* (external PU) */
+	GPP12_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP13_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPQ0_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR18 */
+	GPQ1_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ2_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ3_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ4_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ5_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ6_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ7_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR17 */
+	GPQ8_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR16 */
+};
+
+static int mini6410_mem_init(void)
+{
+	arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c6410_get_memory_size());
+
+	return 0;
+}
+mem_initcall(mini6410_mem_init);
+
+static const struct s3c6410_chipselect dm900_cs = {
+	.adr_setup_t = 0,
+	.access_setup_t = 0,
+	.access_t = 20,
+	.cs_hold_t = 3,
+	.adr_hold_t = 20, /* CS must be de-asserted for at least 20 ns */
+	.width = 16,
+};
+
+static void mini6410_setup_dm9000_cs(void)
+{
+	s3c6410_setup_chipselect(1, &dm900_cs);
+}
+
+static int mini6410_devices_init(void)
+{
+	int i;
+
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
+		s3c_gpio_mode(pin_usage[i]);
+
+	mini6410_setup_dm9000_cs();
+	add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
+				IORESOURCE_MEM_16BIT, &dm9000_data);
+
+	armlinux_set_bootparams((void *)S3C_SDRAM_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_MINI6410);
+
+	return 0;
+}
+
+device_initcall(mini6410_devices_init);
+
+static int mini6410_console_init(void)
+{
+	s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU);
+	s3c_gpio_mode(GPA1_TXD0);
+	s3c_gpio_mode(GPA2_NCTS0 | ENABLE_PU);
+	s3c_gpio_mode(GPA3_NRTS0);
+
+	s3c64xx_add_uart1();
+
+	return 0;
+}
+
+console_initcall(mini6410_console_init);
diff --git a/arch/arm/configs/friendlyarm_mini6410_defconfig b/arch/arm/configs/friendlyarm_mini6410_defconfig
new file mode 100644
index 0000000..b80f8fb
--- /dev/null
+++ b/arch/arm/configs/friendlyarm_mini6410_defconfig
@@ -0,0 +1,40 @@
+CONFIG_ARCH_S3C64xx=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_BROKEN=y
+CONFIG_PROMPT="mini6410:"
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_PARTITION_DISK=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/friendlyarm-mini6410/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_DRIVER_NET_DM9K=y
+# CONFIG_SPI is not set
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 8f63963..e621259 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -6,11 +6,13 @@ if ARCH_SAMSUNG
 config ARCH_TEXT_BASE
 	hex
 	default 0x31fc0000 if MACH_MINI2440
+	default 0x57fc0000 if MACH_MINI6410
 	default 0x31fc0000 if MACH_A9M2440
 	default 0x31fc0000 if MACH_A9M2410
 
 config BOARDINFO
 	default "Mini 2440"    if MACH_MINI2440
+	default "Mini 6410"    if MACH_MINI6410
 	default "Digi A9M2440" if MACH_A9M2440
 	default "Digi A9M2410" if MACH_A9M2410
 
@@ -99,6 +101,14 @@ choice
 
 	prompt "S3C64xx Board Type"
 
+config MACH_MINI6410
+	bool "Mini 6410"
+	select CPU_S3C6410
+	select HAS_DM9000
+	help
+	  Say Y here if you are using FriendlyARM Mini6410 board equipped
+	  with a Samsung S3C6410 Processor
+
 endchoice
 
 menu "Board specific settings       "
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 21 06:04:28 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:28 +0200
Subject: [PATCH 3/8] ARM/Samsung: add the clock tree support for the S3C6410
 SoC
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-4-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    1 +
 arch/arm/mach-samsung/clocks-s3c64xx.c             |  296 ++++++++++++++++++++
 arch/arm/mach-samsung/include/mach/s3c-clocks.h    |    3 +
 .../arm/mach-samsung/include/mach/s3c64xx-clocks.h |   58 ++++
 drivers/serial/serial_s3c.c                        |    3 +
 5 files changed, 361 insertions(+)
 create mode 100644 arch/arm/mach-samsung/clocks-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 40180d7..807e91b 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -2,4 +2,5 @@ obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
+obj-$(CONFIG_ARCH_S3C64xx) += clocks-s3c64xx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/clocks-s3c64xx.c b/arch/arm/mach-samsung/clocks-s3c64xx.c
new file mode 100644
index 0000000..a4beaf7
--- /dev/null
+++ b/arch/arm/mach-samsung/clocks-s3c64xx.c
@@ -0,0 +1,296 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <init.h>
+#include <clock.h>
+#include <io.h>
+#include <asm-generic/div64.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+#include <mach/s3c-clocks.h>
+
+/*
+ * The main clock tree:
+ *
+ *  ref_in ----o-----------\
+ *             |            MUX -o------------\
+ *             |           / ^   |             MUX --- DIV_APLL ------- ARMCLK -> CPU core
+ *             o--- APLL --  |   |            / |
+ *             |             |   o--/2 -------  |
+ *             |       APLL_SEL  |              |<-MISC_CON_SYN667
+ *             |                 \              |
+ *             o-----------\      MUX-o-------\ |
+ *             |            MUX--/ ^  |        MUX --- DIV -o--------- HCLKx2 -> SDRAM (max. 266 MHz)
+ *             |           / ^     |  |       /             |
+ *             o---- MPLL--  |     |  o--/5 --              o-- DIV -- HCLK -> AXI / AHB (max. 133 MHz)
+ *             |             |     |                        |
+ *             |       MPLL_SEL  OTHERS_CLK_SELECT          o-- DIV -- PCLK -> APB (max. 66 MHz)
+ *             |
+ *             o-----------\
+ *             |            MUX---- to various hardware
+ *             |           / ^
+ *             o---- EPLL--  EPLL_SEL
+ *
+ */
+
+static unsigned s3c_get_apllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	if (!(readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTAPLL))
+		return S3C64XX_CLOCK_REFERENCE;
+
+	reg_val = readl(S3C_APLLCON);
+	m = S3C_APLLCON_GET_MDIV(reg_val);
+	p = S3C_APLLCON_GET_PDIV(reg_val);
+	s = S3C_APLLCON_GET_SDIV(reg_val);
+
+	return (S3C64XX_CLOCK_REFERENCE * m) / (p << s);
+}
+
+uint32_t s3c_get_mpllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	if (!(readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTMPLL))
+		return S3C64XX_CLOCK_REFERENCE;
+
+	reg_val = readl(S3C_MPLLCON);
+	m = S3C_MPLLCON_GET_MDIV(reg_val);
+	p = S3C_MPLLCON_GET_PDIV(reg_val);
+	s = S3C_MPLLCON_GET_SDIV(reg_val);
+
+	return (S3C64XX_CLOCK_REFERENCE * m) / (p << s);
+}
+
+unsigned s3c_get_epllclk(void)
+{
+	u32 m, p, s, k, reg0_val, reg1_val;
+	u64 tmp;
+
+	if (!(readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTEPLL))
+		return S3C64XX_CLOCK_REFERENCE;
+
+	reg0_val = readl(S3C_EPLLCON0);
+	reg1_val = readl(S3C_EPLLCON1);
+	m = S3C_EPLLCON0_GET_MDIV(reg0_val);
+	p = S3C_EPLLCON0_GET_PDIV(reg0_val);
+	s = S3C_EPLLCON0_GET_SDIV(reg0_val);
+	k = S3C_EPLLCON1_GET_KDIV(reg1_val);
+
+	tmp = S3C64XX_CLOCK_REFERENCE;
+	tmp *= (m << 16) + k;
+	do_div(tmp, (p << s));
+
+	return (unsigned)tmp >> 16;
+}
+
+uint32_t s3c_get_fclk(void)
+{
+	unsigned clk;
+
+	clk = s3c_get_apllclk();
+	if (readl(S3C_MISC_CON) & S3C_MISC_CON_SYN667)
+		clk /= 2;
+
+	return clk / (S3C_CLK_DIV0_GET_ADIV(readl(S3C_CLK_DIV0)) + 1);
+}
+
+static unsigned s3c_get_hclk_in(void)
+{
+	unsigned clk;
+
+	if (readl(S3C_OTHERS) & S3C_OTHERS_CLK_SELECT)
+		clk = s3c_get_apllclk();
+	else
+		clk = s3c_get_mpllclk();
+
+	if (readl(S3C_MISC_CON) & S3C_MISC_CON_SYN667)
+		clk /= 5;
+
+	return clk;
+}
+
+static unsigned s3c_get_hclkx2(void)
+{
+	return s3c_get_hclk_in() /
+			(S3C_CLK_DIV0_GET_HCLK2(readl(S3C_CLK_DIV0)) + 1);
+}
+
+uint32_t s3c_get_hclk(void)
+{
+	return s3c_get_hclkx2() /
+			(S3C_CLK_DIV0_GET_HCLK(readl(S3C_CLK_DIV0)) + 1);
+}
+
+uint32_t s3c_get_pclk(void)
+{
+	return s3c_get_hclkx2() /
+			(S3C_CLK_DIV0_GET_PCLK(readl(S3C_CLK_DIV0)) + 1);
+}
+
+static void s3c_init_mpll_dout(void)
+{
+	unsigned reg;
+
+	/* keep it at the same frequency as HCLKx2 */
+	reg = readl(S3C_CLK_DIV0) | S3C_CLK_DIV0_SET_MPLL_DIV(1); /* e.g. / 2 */
+	writel(reg, S3C_CLK_DIV0);
+}
+
+/* configure and enable UCLK1 */
+static int s3c_init_uart_clock(void)
+{
+	unsigned reg;
+
+	s3c_init_mpll_dout();	/* to have a reliable clock source */
+
+	/* source the UART clock from the MPLL, currently *not* from EPLL */
+	reg = readl(S3C_CLK_SRC) | S3C_CLK_SRC_UARTMPLL;
+	writel(reg, S3C_CLK_SRC);
+
+	/* keep UART clock at the same frequency than the PCLK */
+	reg = readl(S3C_CLK_DIV2) & ~S3C_CLK_DIV2_UART_MASK;
+	reg |= S3C_CLK_DIV2_SET_UART(0x3);	/* / 4 */
+	writel(reg, S3C_CLK_DIV2);
+
+	/* ensure this very special clock is running */
+	reg = readl(S3C_SCLK_GATE) | S3C_SCLK_GATE_UART;
+	writel(reg, S3C_SCLK_GATE);
+
+	return 0;
+}
+core_initcall(s3c_init_uart_clock);
+
+/*
+ * The UART related clock path:
+ *
+ * PCLK --------------------------------------o-----0-\
+ * ???? -------------------------------UCLK0--|-----1--\MUX----- UART
+ * MPLL -----DIV0------\                      +-----2--/ ^
+ *                     MUX---DIV2------UCLK1--------3-/  UART setting (source)
+ * EPLL ---------------/
+ *                      ^SRC_UARTMPLL
+ */
+unsigned s3c_get_uart_clk(unsigned source)
+{
+	u32 reg;
+	unsigned clk, pdiv, uartpdiv;
+
+	switch (source) {
+	default: /* PCLK */
+		clk = s3c_get_pclk();
+		pdiv = uartpdiv = 1;
+		break;
+	case 1: /* UCLK0 */
+		clk = 0;
+		pdiv = uartpdiv = 1;	/* TODO */
+		break;
+	case 3: /* UCLK1 */
+		reg = readl(S3C_CLK_SRC);
+		if (reg & S3C_CLK_SRC_UARTMPLL) {
+			clk = s3c_get_mpllclk();
+			pdiv = S3C_CLK_DIV0_GET_MPLL_DIV(readl(S3C_CLK_DIV0)) + 1;
+		} else {
+			clk = s3c_get_epllclk();
+			pdiv = 1;
+		}
+		uartpdiv = S3C_CLK_DIV2_GET_UART(readl(S3C_CLK_DIV2)) + 1;
+		break;
+	}
+
+	return clk / pdiv / uartpdiv;
+}
+
+/*
+ * The MMC related clock path:
+ *
+ *             MMCx_SEL
+ *                |
+ * EPLLout --0-\  v
+ * MPLLout --1--\MUX----SCLK_MMCx----DIV_MMCx------>HSMMCx
+ * EPLLin  --2--/       on/off     / 1..16
+ * 27 MHz  --3-/
+ *
+ * The datasheet is not very precise here, so the schematic shown above was
+ * made by checking various bits in the SYSCON.
+ */
+unsigned s3c_get_hsmmc_clk(int id)
+{
+	u32 sel, div, sclk = readl(S3C_SCLK_GATE);
+	unsigned bclk;
+
+	if (!(sclk & S3C_SCLK_GATE_MMC(id)))
+		return 0; /* disabled */
+
+	sel = S3C_CLK_SRC_GET_MMC_SEL(id, readl(S3C_CLK_SRC));
+	switch (sel) {
+	case 0:
+		bclk = s3c_get_epllclk();
+		break;
+	case 1:
+		bclk = s3c_get_mpllclk();
+		break;
+	case 2:
+		bclk = S3C64XX_CLOCK_REFERENCE;
+		break;
+	case 3:
+		bclk = 27000000;
+		break;
+	}
+
+	div = S3C_CLK_DIV0_GET_MMC(id, readl(S3C_CLK_DIV0)) + 1;
+
+	return bclk / div;
+}
+
+void s3c_set_hsmmc_clk(int id, int src, unsigned div)
+{
+	u32 reg;
+
+	if (!div)
+		div = 1;
+
+	writel(readl(S3C_SCLK_GATE) & ~S3C_SCLK_GATE_MMC(id), S3C_SCLK_GATE);
+
+	/* select the new clock source */
+	reg = readl(S3C_CLK_SRC) & ~S3C_CLK_SRC_SET_MMC_SEL(id, ~0);
+	reg |= S3C_CLK_SRC_SET_MMC_SEL(id, src);
+	writel(reg, S3C_CLK_SRC);
+
+	/* select the new pre-divider */
+	reg = readl(S3C_CLK_DIV0) & ~ S3C_CLK_DIV0_SET_MMC(id, ~0);
+	reg |= S3C_CLK_DIV0_SET_MMC(id, div - 1);
+	writel(reg, S3C_CLK_DIV0);
+
+	/* calling this function implies enabling of the clock */
+	writel(readl(S3C_SCLK_GATE) | S3C_SCLK_GATE_MMC(id), S3C_SCLK_GATE);
+}
+
+int s3c64xx_dump_clocks(void)
+{
+	printf("refclk:  %7d kHz\n", S3C64XX_CLOCK_REFERENCE / 1000);
+	printf("apll:    %7d kHz\n", s3c_get_apllclk() / 1000);
+	printf("mpll:    %7d kHz\n", s3c_get_mpllclk() / 1000);
+	printf("epll:    %7d kHz\n", s3c_get_epllclk() / 1000);
+	printf("CPU:     %7d kHz\n", s3c_get_fclk() / 1000);
+	printf("hclkx2:  %7d kHz\n", s3c_get_hclkx2() / 1000);
+	printf("hclk:    %7d kHz\n", s3c_get_hclk() / 1000);
+	printf("pclk:    %7d kHz\n", s3c_get_pclk() / 1000);
+	return 0;
+}
+
+late_initcall(s3c64xx_dump_clocks);
diff --git a/arch/arm/mach-samsung/include/mach/s3c-clocks.h b/arch/arm/mach-samsung/include/mach/s3c-clocks.h
index f577306..6920ca9 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-clocks.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-clocks.h
@@ -25,6 +25,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/s3c24xx-clocks.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/s3c64xx-clocks.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/s5pcxx-clocks.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h b/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h
new file mode 100644
index 0000000..9646705
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define S3C_APLLCON (S3C_CLOCK_POWER_BASE + 0x0c)
+# define S3C_APLLCON_GET_MDIV(x) (((x) >> 16) & 0x3ff)
+# define S3C_APLLCON_GET_PDIV(x) (((x) >> 8) & 0x3f)
+# define S3C_APLLCON_GET_SDIV(x) ((x) & 0x7)
+#define S3C_MPLLCON (S3C_CLOCK_POWER_BASE + 0x10)
+# define S3C_MPLLCON_GET_MDIV(x) (((x) >> 16) & 0x3ff)
+# define S3C_MPLLCON_GET_PDIV(x) (((x) >> 8) & 0x3f)
+# define S3C_MPLLCON_GET_SDIV(x) ((x) & 0x7)
+#define S3C_EPLLCON0 (S3C_CLOCK_POWER_BASE + 0x14)
+# define S3C_EPLLCON0_GET_MDIV(x) (((x) >> 16) & 0x3ff)
+# define S3C_EPLLCON0_GET_PDIV(x) (((x) >> 8) & 0x3f)
+# define S3C_EPLLCON0_GET_SDIV(x) ((x) & 0x7)
+#define S3C_EPLLCON1 (S3C_CLOCK_POWER_BASE + 0x18)
+# define S3C_EPLLCON1_GET_KDIV(x) ((x) & 0xffff)
+#define S3C_CLKCON (S3C_CLOCK_POWER_BASE + 0xc)
+#define S3C_CLKSLOW (S3C_CLOCK_POWER_BASE + 0x10)
+#define S3C_CLKDIVN (S3C_CLOCK_POWER_BASE + 0x14)
+#define S3C_CLK_SRC (S3C_CLOCK_POWER_BASE + 0x01c)
+# define S3C_CLK_SRC_GET_MMC_SEL(x, v) (((v) >> (18 + (x * 2))) & 0x3)
+# define S3C_CLK_SRC_SET_MMC_SEL(x, v) (((v) & 0x3) << (18 + (x * 2)))
+# define S3C_CLK_SRC_UARTMPLL (1 << 13)
+# define S3C_CLK_SRC_FOUTEPLL (1 << 2)
+# define S3C_CLK_SRC_FOUTMPLL (1 << 1)
+# define S3C_CLK_SRC_FOUTAPLL (1 << 0)
+#define S3C_CLK_DIV0 (S3C_CLOCK_POWER_BASE + 0x020)
+# define S3C_CLK_DIV0_GET_ADIV(x) ((x) & 0xf)
+# define S3C_CLK_DIV0_GET_HCLK2(x) (((x) >> 9) & 0x7)
+# define S3C_CLK_DIV0_GET_HCLK(x) (((x) >> 8) & 0x1)
+# define S3C_CLK_DIV0_GET_PCLK(x) (((x) >> 12) & 0xf)
+# define S3C_CLK_DIV0_SET_MPLL_DIV(x) (((x) & 0x1) << 4)
+# define S3C_CLK_DIV0_GET_MPLL_DIV(x) (((x) >> 4) & 0x1)
+# define S3C_CLK_DIV0_GET_MMC(x, v) (((v) >> (4 * x)) & 0xf)
+# define S3C_CLK_DIV0_SET_MMC(x, v) (((v) & 0xf) << (4 * x))
+#define S3C_CLK_DIV2 (S3C_CLOCK_POWER_BASE + 0x028)
+# define S3C_CLK_DIV2_UART_MASK (0xf << 16)
+# define S3C_CLK_DIV2_SET_UART(x) ((x) << 16)
+# define S3C_CLK_DIV2_GET_UART(x) (((x) >> 16) & 0xf)
+#define S3C_SCLK_GATE (S3C_CLOCK_POWER_BASE + 0x038)
+# define S3C_SCLK_GATE_UART (1 << 5)
+# define S3C_SCLK_GATE_MMC(x) (1 << (24 + x))
+#define S3C_MISC_CON (S3C_CLOCK_POWER_BASE + 0x838)
+# define S3C_MISC_CON_SYN667 (1 << 19)
+#define S3C_OTHERS (S3C_CLOCK_POWER_BASE + 0x900)
+# define S3C_OTHERS_CLK_SELECT (1 << 6)
diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 53ac77f..0611f24 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -58,6 +58,9 @@ static unsigned s3c_select_arch_input_clock(void)
 	/* S3C24xx: 0=2=PCLK, 1=UEXTCLK, 3=FCLK/n */
 	if (IS_ENABLED(CONFIG_ARCH_S3C24xx))
 		return 0;	/* use the internal PCLK */
+	/* S3C64xx: 0=2=PCLK, 1=UCLK0, 3=UCLK1 */
+	if (IS_ENABLED(CONFIG_ARCH_S3C64xx))
+		return 3;	/* use the internal UCLK1 */
 	/* S5PCxx: 0=PCLK, 1=SCLK_UART */
 	if (IS_ENABLED(CONFIG_ARCH_S5PCxx))
 		return 0;	/* use the internal PCLK */
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 21 06:04:33 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:33 +0200
Subject: [PATCH 8/8] ARM/Samsung: add the Tiny6410 platform as the second user
 of the S3C6410 SoC
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-9-git-send-email-jbe@pengutronix.de>

The Tiny6410 and its base board is a pure development platform.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/friendlyarm-tiny6410/Kconfig       |   19 ++++
 arch/arm/boards/friendlyarm-tiny6410/Makefile      |    3 +
 arch/arm/boards/friendlyarm-tiny6410/config.h      |    8 ++
 .../friendlyarm-tiny6410/development-board.c       |  100 ++++++++++++++++++++
 arch/arm/boards/friendlyarm-tiny6410/env/config    |   56 +++++++++++
 arch/arm/boards/friendlyarm-tiny6410/tiny6410.c    |   80 ++++++++++++++++
 arch/arm/boards/friendlyarm-tiny6410/tiny6410.h    |   14 +++
 arch/arm/configs/friendlyarm_tiny6410_defconfig    |   41 ++++++++
 arch/arm/configs/tiny6410_defconfig                |   41 ++++++++
 arch/arm/mach-samsung/Kconfig                      |   11 +++
 11 files changed, 374 insertions(+)
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/Kconfig
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/Makefile
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/config.h
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/development-board.c
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/env/config
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/tiny6410.c
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/tiny6410.h
 create mode 100644 arch/arm/configs/friendlyarm_tiny6410_defconfig
 create mode 100644 arch/arm/configs/tiny6410_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bd03fe6..ab3f730 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -124,6 +124,7 @@ board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
 board-$(CONFIG_MACH_GUF_CUPID)			:= guf-cupid
 board-$(CONFIG_MACH_MINI2440)			:= mini2440
 board-$(CONFIG_MACH_MINI6410)			:= friendlyarm-mini6410
+board-$(CONFIG_MACH_TINY6410)			:= friendlyarm-tiny6410
 board-$(CONFIG_MACH_QIL_A9260)			:= qil-a9260
 board-$(CONFIG_MACH_TNY_A9260)			:= tny-a926x
 board-$(CONFIG_MACH_TNY_A9263)			:= tny-a926x
diff --git a/arch/arm/boards/friendlyarm-tiny6410/Kconfig b/arch/arm/boards/friendlyarm-tiny6410/Kconfig
new file mode 100644
index 0000000..374820f
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/Kconfig
@@ -0,0 +1,19 @@
+if MACH_TINY6410
+
+choice
+	prompt "FriendlyARM Tiny6410 baseboard"
+	help
+	  Since the Tiny6410 is a CPU card only, it requires a basebord to make
+	  it work. Select here the baseboard Barebox should expect and
+	  configure.
+
+config MACH_TINY6410_FA
+	bool
+	select HAS_DM9000
+	prompt "FA development platform"
+	help
+	  FriendlyARM's Tiny6410 evaluation board.
+
+endchoice
+
+endif
diff --git a/arch/arm/boards/friendlyarm-tiny6410/Makefile b/arch/arm/boards/friendlyarm-tiny6410/Makefile
new file mode 100644
index 0000000..b3ab12e
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/Makefile
@@ -0,0 +1,3 @@
+obj-y += tiny6410.o
+
+obj-$(CONFIG_MACH_TINY6410_FA) += development-board.o
diff --git a/arch/arm/boards/friendlyarm-tiny6410/config.h b/arch/arm/boards/friendlyarm-tiny6410/config.h
new file mode 100644
index 0000000..04f6857
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/config.h
@@ -0,0 +1,8 @@
+/* FriendlyARM Tiny6410 specific global settings */
+
+#ifndef _TINY6410_CONFIG_H_
+# define _TINY6410_CONFIG_H_
+
+#define S3C64XX_CLOCK_REFERENCE 12000000
+
+#endif /* _TINY6410_CONFIG_H_ */
diff --git a/arch/arm/boards/friendlyarm-tiny6410/development-board.c b/arch/arm/boards/friendlyarm-tiny6410/development-board.c
new file mode 100644
index 0000000..5595900
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/development-board.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * The FriendlyARM's Tiny6410 evaluation board comes with all connectors and
+ * devices to make the Tiny6410 CPU card work. This includes:
+ *
+ * - the DM9000 network controller
+ * - USB/MCI connectors
+ * - display connector
+ *
+ */
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <gpio.h>
+#include <dm9000.h>
+#include <mach/devices-s3c64xx.h>
+#include <mach/s3c-generic.h>
+
+#include "tiny6410.h"
+
+/*
+ * dm9000 network controller onboard
+ * Connected to CS line 1 and interrupt line EINT7,
+ * data width is 16 bit
+ * Area 1: Offset 0x300...0x301
+ * Area 2: Offset 0x304...0x305
+ */
+static struct dm9000_platform_data dm9000_data = {
+	.srom = 0,	/* no serial ROM for the ethernet address */
+};
+
+static const struct s3c6410_chipselect dm900_cs = {
+	.adr_setup_t = 0,
+	.access_setup_t = 0,
+	.access_t = 20,
+	.cs_hold_t = 3,
+	.adr_hold_t = 20, /* CS must be de-asserted for at least 20 ns */
+	.width = 16,
+};
+
+static void tiny6410evk_setup_dm9000_cs(void)
+{
+	s3c6410_setup_chipselect(1, &dm900_cs);
+}
+
+static const unsigned tiny6410evk_pin_usage[] = {
+	/* UART1 (V24) */
+	GPA4_RXD1 | ENABLE_PU,
+	GPA5_TXD1,
+	GPA6_NCTS1 | ENABLE_PU,
+	GPA7_NRTS1,
+	/* UART2 (V24) */
+	GPB0_RXD2 | ENABLE_PU,
+	GPB1_TXD2,
+	/* UART3 (spare, 3,3 V TTL level only) */
+	GPB2_RXD3 | ENABLE_PU,
+	GPB3_TXD3,
+};
+
+static int tiny6410evk_devices_init(void)
+{
+	int i;
+
+	/* init CPU card specific devices first */
+	tiny6410_init("FA EVK");
+
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(tiny6410evk_pin_usage); i++)
+		s3c_gpio_mode(tiny6410evk_pin_usage[i]);
+
+	tiny6410evk_setup_dm9000_cs();
+	add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
+				IORESOURCE_MEM_16BIT, &dm9000_data);
+	return 0;
+}
+device_initcall(tiny6410evk_devices_init);
+
+static int tiny6410evk_console_init(void)
+{
+	/* note: UART0 has no RTS/CTS connected */
+	s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU);
+	s3c_gpio_mode(GPA1_TXD0);
+
+	s3c64xx_add_uart1();
+
+	return 0;
+}
+console_initcall(tiny6410evk_console_init);
+
diff --git a/arch/arm/boards/friendlyarm-tiny6410/env/config b/arch/arm/boards/friendlyarm-tiny6410/env/config
new file mode 100644
index 0000000..35d0fac
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/env/config
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+machine=tiny6410
+eth0.serverip=a.b.c.d.e
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d.e
+#eth0.netmask=a.b.c.d.e
+#eth0.gateway=a.b.c.d.e
+eth0.ethaddr=08:90:90:90:90:90
+
+# can be either 'nfs', 'tftp' or 'nand'
+kernel_loc=tftp
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-${machine}.${rootfs_type}
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-${machine}
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+	kernelimage="${user}"-"${kernelimage}"
+	nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
+	rootfsimage="${user}"-"${rootfsimage}"
+else
+	nfsroot="${eth0.serverip}:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+#
+# "tiny6410" kernel parameter
+# 0 .. 9 = screen type
+# i = touchscreen with propritary FriendlyARM protocol
+# Note: can be "tiny6410= " if nothing of these components are connected
+#
+bootargs="console=ttySAC0,115200 tiny6410=0"
+
+nand_device="nand"
+nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nand=3
diff --git a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c
new file mode 100644
index 0000000..db13c06
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <gpio.h>
+#include <generated/mach-types.h>
+#include <asm/armlinux.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+
+static const unsigned tiny6410_pin_usage[] = {
+	/* UART0 */
+	GPA2_GPIO | GPIO_IN | ENABLE_PU, /* CTS not connected */
+	GPA3_GPIO | GPIO_IN | ENABLE_PU, /* RTS not connected */
+
+	/* local bus' D0 ... D15 are always active */
+	/* local bus' A0...A5 are always active */
+
+	/* internal NAND memory */
+	GPO0_NCS2,	/* NAND's first chip select line */
+	/* NAND's second chip select line, not used */
+	GPO1_GPIO | GPIO_OUT | GPIO_VAL(1),
+	GPP3_FALE,
+	GPP4_FCLE,
+	GPP5_FWE,
+	GPP6_FRE,
+	GPP7_RNB, /* external pull-up */
+
+	GPF13_GPIO  | GPIO_OUT | GPIO_VAL(0), /* OTG power supply, 0 = off */
+
+	/* nowhere connected */
+	GPO2_GPIO | GPIO_IN | ENABLE_PU,
+	GPO3_GPIO | GPIO_IN | ENABLE_PU,
+	GPO4_GPIO | GPIO_IN | ENABLE_PU,
+	GPO5_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* local bus address lines 6...15 are nowhere connected */
+	GPO6_GPIO | GPIO_IN | ENABLE_PU,
+	GPO7_GPIO | GPIO_IN | ENABLE_PU,
+	GPO8_GPIO | GPIO_IN | ENABLE_PU,
+	GPO9_GPIO | GPIO_IN | ENABLE_PU,
+	GPO10_GPIO | GPIO_IN | ENABLE_PU,
+	GPO11_GPIO | GPIO_IN | ENABLE_PU,
+	GPO12_GPIO | GPIO_IN | ENABLE_PU,
+	GPO13_GPIO | GPIO_IN | ENABLE_PU,
+	GPO14_GPIO | GPIO_IN | ENABLE_PU,
+	GPO15_GPIO | GPIO_IN | ENABLE_PU,
+};
+
+static int tiny6410_mem_init(void)
+{
+	arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c6410_get_memory_size());
+
+	return 0;
+}
+mem_initcall(tiny6410_mem_init);
+
+void tiny6410_init(const char *bb_name)
+{
+	int i;
+
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(tiny6410_pin_usage); i++)
+		s3c_gpio_mode(tiny6410_pin_usage[i]);
+
+	armlinux_set_bootparams((void *)S3C_SDRAM_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_TINY6410);
+}
diff --git a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h
new file mode 100644
index 0000000..98db422
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h
@@ -0,0 +1,14 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* to be called by the base board */
+void tiny6410_init(const char*);
diff --git a/arch/arm/configs/friendlyarm_tiny6410_defconfig b/arch/arm/configs/friendlyarm_tiny6410_defconfig
new file mode 100644
index 0000000..3af5e04
--- /dev/null
+++ b/arch/arm/configs/friendlyarm_tiny6410_defconfig
@@ -0,0 +1,41 @@
+CONFIG_ARCH_S3C64xx=y
+CONFIG_MACH_TINY6410=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_BROKEN=y
+CONFIG_PROMPT="mini6410:"
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_PARTITION_DISK=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/friendlyarm-mini6410/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_DRIVER_NET_DM9K=y
+# CONFIG_SPI is not set
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/configs/tiny6410_defconfig b/arch/arm/configs/tiny6410_defconfig
new file mode 100644
index 0000000..5246196
--- /dev/null
+++ b/arch/arm/configs/tiny6410_defconfig
@@ -0,0 +1,41 @@
+CONFIG_ARCH_S3C64xx=y
+CONFIG_MACH_TINY6410=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_BROKEN=y
+CONFIG_PROMPT="tiny6410:"
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_PARTITION_DISK=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/friendlyarm-tiny6410/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_DRIVER_NET_DM9K=y
+# CONFIG_SPI is not set
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index e621259..51253db 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -7,12 +7,14 @@ config ARCH_TEXT_BASE
 	hex
 	default 0x31fc0000 if MACH_MINI2440
 	default 0x57fc0000 if MACH_MINI6410
+	default 0x57fc0000 if MACH_TINY6410
 	default 0x31fc0000 if MACH_A9M2440
 	default 0x31fc0000 if MACH_A9M2410
 
 config BOARDINFO
 	default "Mini 2440"    if MACH_MINI2440
 	default "Mini 6410"    if MACH_MINI6410
+	default "Tiny 6410"    if MACH_TINY6410
 	default "Digi A9M2440" if MACH_A9M2440
 	default "Digi A9M2410" if MACH_A9M2410
 
@@ -109,10 +111,19 @@ config MACH_MINI6410
 	  Say Y here if you are using FriendlyARM Mini6410 board equipped
 	  with a Samsung S3C6410 Processor
 
+config MACH_TINY6410
+	bool "Tiny 6410"
+	select CPU_S3C6410
+	help
+	  Say Y here if you are using FriendlyARM Tiny6410 CPU card equipped
+	  with a Samsung S3C6410 Processor
+
 endchoice
 
 menu "Board specific settings       "
 
+source arch/arm/boards/friendlyarm-tiny6410/Kconfig
+
 endmenu
 
 endif
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 21 06:04:29 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 21 Jul 2012 12:04:29 +0200
Subject: [PATCH 4/8] ARM/Samsung: add GPIO handling support for the S3C6410 SoC
In-Reply-To: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
References: <1342865073-5209-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1342865073-5209-5-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    2 +-
 arch/arm/mach-samsung/gpio-s3c64xx.c               |  301 +++++++++++
 arch/arm/mach-samsung/include/mach/gpio.h          |    3 +
 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h |  542 ++++++++++++++++++++
 4 files changed, 847 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-samsung/gpio-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 807e91b..9a2484f 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -2,5 +2,5 @@ obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o clocks-s3c24xx.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S3C64xx) += clocks-s3c64xx.o
+obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/gpio-s3c64xx.c b/arch/arm/mach-samsung/gpio-s3c64xx.c
new file mode 100644
index 0000000..bb3ac52
--- /dev/null
+++ b/arch/arm/mach-samsung/gpio-s3c64xx.c
@@ -0,0 +1,301 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This codes bases partially on code from the Linux kernel:
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *	http://armlinux.simtec.co.uk/
+ *	Ben Dooks <ben at simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <io.h>
+#include <gpio.h>
+#include <mach/s3c-iomap.h>
+
+#define S3C_GPACON (S3C_GPIO_BASE)
+#define S3C_GPADAT (S3C_GPIO_BASE + 0x04)
+#define S3C_GPAPUD (S3C_GPIO_BASE + 0x08)
+
+static const unsigned short group_offset[] = {
+	0x000,	/* GPA */ /* 8 pins, 4 bit each */
+	0x020,	/* GPB */ /* 7 pins, 4 bit each */
+	0x040,	/* GPC */ /* 8 pins, 4 bit each */
+	0x060,	/* GPD */ /* 5 pins, 4 bit each */
+	0x080,	/* GPE */ /* 5 pins, 4 bit each */
+	0x0a0,	/* GPF */ /* 16 pins, 2 bit each */
+	0x0c0,	/* GPG */ /* 7 pins, 4 bit each */
+	0x0e0,	/* GPH */ /* two registers, 8 + 2 pins, 4 bit each */
+	0x100,	/* GPI */ /* 16 pins, 2 bit each */
+	0x120,	/* GPJ */ /* 12 pins, 2 bit each */
+	0x800,	/* GPK */ /* two registers, 8 + 8 pins, 4 bit each */
+	0x810,	/* GPL */ /* two registers, 8 + 8 pins, 4 bit each */
+	0x820,	/* GPM */ /* 6 pins, 4 bit each */
+	0x830,	/* GPN */ /* 16 pins, 2 bit each */
+	0x140,	/* GPO */ /* 16 pins, 2 bit each */
+	0x160,	/* GPP */ /* 15 pins, 2 bit each */
+	0x180,	/* GPQ */ /* 9 pins, 2 bit each */
+};
+
+void gpio_set_value(unsigned gpio, int value)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+	uint32_t reg;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		offset += 4;
+		break;
+	}
+
+	reg = readl(S3C_GPADAT + offset);
+	reg &= ~(1 << bit);
+	reg |= (!!value) << bit;
+	writel(reg, S3C_GPADAT + offset);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+	uint32_t reg;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		offset += 4;
+		break;
+	}
+
+	/* value */
+	reg = readl(S3C_GPADAT + offset);
+
+	return !!(reg & (1 << bit));
+}
+
+static void gpio_direction_input_4b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	if (bit > 31) {
+		offset += 4;
+		bit -= 32;
+	}
+
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	writel(reg, S3C_GPACON + offset); /* b0000 means 'GPIO input' */
+}
+
+static void gpio_direction_input_2b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	writel(reg, S3C_GPACON + offset); /* b00 means 'GPIO input' */
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		gpio_direction_input_2b(offset, bit << 1);
+		break;
+	default:
+		gpio_direction_input_4b(offset, bit << 2);
+	}
+
+	return 0;
+}
+
+static void gpio_direction_output_4b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	if (bit > 31) {
+		offset += 4;
+		bit -= 32;
+	}
+
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	reg |= 0x1 << bit;
+	writel(reg, S3C_GPACON + offset); /* b0001 means 'GPIO output' */
+}
+
+static void gpio_direction_output_2b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	/* direction */
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	reg |= 0x1 << bit;
+	writel(reg, S3C_GPACON + offset);
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+
+	gpio_set_value(gpio, value);
+
+	offset = group_offset[group];
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		gpio_direction_output_2b(offset, bit << 1);
+		break;
+	default:
+		gpio_direction_output_4b(offset, bit << 2);
+	}
+
+	return 0;
+}
+
+/* one register, 2 bits per function -> GPF, GPI, GPJ, GPN, GPO, GPP, GPQ */
+static void s3c_d2pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	unsigned reg;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + offset);
+		reg &= ~(PUD_MASK << bit);
+		reg |= GET_PUD(pin_mode) << bit;
+		writel(reg, S3C_GPAPUD + offset);
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + offset) & ~(1 << (bit >> 1));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPADAT + offset);
+	}
+}
+
+/* one register, 4 bits per function -> GPA, GPB, GPC, GPD, GPE, GPG, GPM */
+static void s3c_d4pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	unsigned reg;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + offset);
+		reg &= ~(PUD_MASK << (bit >> 1));
+		reg |= GET_PUD(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPAPUD + offset);
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + offset) & ~(1 << (bit >> 2));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 2);
+		writel(reg, S3C_GPADAT + offset);
+	}
+}
+
+/* two registers, 4 bits per pin -> GPH, GPK, GPL */
+static void s3c_d42pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	uint32_t reg;
+	unsigned reg_offs = 0;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + 4 + offset);
+		reg &= ~(PUD_MASK << (bit >> 1));
+		reg |= GET_PUD(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPACON + 4 + offset);
+	}
+
+	if (bit > 31) {
+		reg_offs = 4;
+		bit -= 32;
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset + reg_offs) & ~(0xf << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset + reg_offs);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + 4 + offset) & ~(1 << (bit >> 2));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 2);
+		writel(reg, S3C_GPADAT + 4 + offset);
+	}
+}
+
+/* 'gpio_mode' must be one of the 'GP?_*' macros */
+void s3c_gpio_mode(unsigned gpio_mode)
+{
+	unsigned group, offset;
+
+	group = GET_GROUP(gpio_mode);
+	offset = group_offset[group];
+
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		s3c_d2pins(offset, gpio_mode);
+		break;
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		s3c_d42pins(offset, gpio_mode);
+		break;
+	default:
+		s3c_d4pins(offset, gpio_mode);
+	}
+}
diff --git a/arch/arm/mach-samsung/include/mach/gpio.h b/arch/arm/mach-samsung/include/mach/gpio.h
index 4d7d217..2b45695 100644
--- a/arch/arm/mach-samsung/include/mach/gpio.h
+++ b/arch/arm/mach-samsung/include/mach/gpio.h
@@ -16,6 +16,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/iomux-s3c24x0.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/iomux-s3c64xx.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/iomux-s5pcxx.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h b/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h
new file mode 100644
index 0000000..5d68b71
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h
@@ -0,0 +1,542 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_IOMUX_S3C64XX_H
+# define __MACH_IOMUX_S3C64XX_H
+
+/* 3322222222221111111111
+ * 10987654321098765432109876543210
+ *                           ^^^^^^_ Bit offset
+ *                      ^^^^^_______ Group Number
+ *                  ^^^^____________ Function
+ *                 ^________________ initial GPIO out value
+ *                ^_________________ Pull up/down feature present
+ *              ^^__________________ initial pull up/down setting
+ */
+
+#define PIN(group,bit) ((group << 6) + bit)
+#define FUNC(x) (((x) & 0xf) << 11)
+#define GET_FUNC(x) (((x) >> 11) & 0xf)
+#define GET_GROUP(x) (((x) >> 6) & 0x1f)
+#define GET_BIT(x) ((x) & 0x3f)
+#define GET_GPIOVAL(x) (!!((x) & (1 << 15)))
+#define GPIO_OUT (1 << 11)
+#define GPIO_IN (0 << 11)
+#define GPIO_VAL(x) ((!!(x)) << 15)
+#define PUD_MASK 0x3
+#define PUD (1 << 16)
+#define PUD_PRESENT(x) (!!((x) & (1 << 16)))
+#define DISABLE_PUD (0 << 17)
+#define ENABLE_PU (2 << 17)
+#define ENABLE_PD (1 << 17)
+#define GET_PUD(x) (((x) >> 17) & PUD_MASK)
+
+/*
+ * To have a chance for simple GPIO manipulation routines
+ * define the GPIO numbers with a real simple scheme.
+ *
+ * Keep in mind: The 'GPIO_2_NO' creates a value to be used with the real gpio
+ * routines and *not* for the multiplexer routines!
+ */
+#define GPIO_2_NO(x,y) (PIN(x,y))
+
+/*
+ * Group A: GPIO 0...7
+ * Used GPIO: 0...7
+ * These pins can also act as GPIO outputs
+ */
+#define GPA0		(PIN(0,0) | PUD)
+#define GPA0_GPIO	(GPA0 | FUNC(0))
+#define GPA0_RXD0	(GPA0 | FUNC(2))
+#define GPA1		(PIN(0,4) | PUD)
+#define GPA1_GPIO	(GPA1 | FUNC(0))
+#define GPA1_TXD0	(GPA1 | FUNC(2))
+#define GPA2		(PIN(0,8) | PUD)
+#define GPA2_GPIO	(GPA2 | FUNC(0))
+#define GPA2_NCTS0	(GPA2 | FUNC(2))
+#define GPA3		(PIN(0,12) | PUD)
+#define GPA3_GPIO	(GPA3 | FUNC(0))
+#define GPA3_NRTS0	(GPA3 | FUNC(2))
+#define GPA4		(PIN(0,16) | PUD)
+#define GPA4_GPIO	(GPA4 | FUNC(0))
+#define GPA4_RXD1	(GPA4 | FUNC(2))
+#define GPA5		(PIN(0,20) | PUD)
+#define GPA5_GPIO	(GPA5 | FUNC(0))
+#define GPA5_TXD1	(GPA5 | FUNC(2))
+#define GPA6		(PIN(0,24) | PUD)
+#define GPA6_GPIO	(GPA6 | FUNC(0))
+#define GPA6_NCTS1	(GPA6 | FUNC(2))
+#define GPA7		(PIN(0,28) | PUD)
+#define GPA7_GPIO	(GPA7 | FUNC(0))
+#define GPA7_NRTS1	(GPA7 | FUNC(2))
+
+/*
+ * Group B: GPIO 0...7
+ * Used GPIO: 8...15
+ * These pins can also act as GPIO outputs
+ */
+#define GPB0		(PIN(1,0) | PUD)
+#define GPB0_GPIO	(GPB0 | FUNC(0))
+#define GPB0_RXD2	(GPB0 | FUNC(2))
+#define GPB0_DMAREQ	(GPB0 | FUNC(3))
+#define GPB0_IRDA_RXD	(GPB0 | FUNC(4))
+#define GPB0_ADDR_CF0	(GPB0 | FUNC(5))
+#define GPB1		(PIN(1,4) | PUD)
+#define GPB1_GPIO	(GPB1 | FUNC(0))
+#define GPB1_TXD2	(GPB1 | FUNC(2))
+#define GPB1_DMAREQ	(GPB1 | FUNC(3))
+#define GPB1_IRDA_TXD	(GPB1 | FUNC(4))
+#define GPB1_ADDR_CF1	(GPB1 | FUNC(5))
+#define GPB2		(PIN(1,8) | PUD)
+#define GPB2_GPIO	(GPB2 | FUNC(0))
+#define GPB2_RXD3	(GPB2 | FUNC(2))
+#define GPB2_IRDA_RXD	(GPB2 | FUNC(3))
+#define GPB2_DMAREQ	(GPB2 | FUNC(4))
+#define GPB2_ADDR_CF2	(GPB2 | FUNC(5))
+#define GPB2_IIC1_SCL	(GPB2 | FUNC(6))
+#define GPB3		(PIN(1,12) | PUD)
+#define GPB3_GPIO	(GPB3 | FUNC(0))
+#define GPB3_TXD3	(GPB3 | FUNC(2))
+#define GPB3_IRDA_TXD	(GPB3 | FUNC(3))
+#define GPB3_DMAREQ	(GPB3 | FUNC(4))
+#define GPB3_IIC1_SDA	(GPB3 | FUNC(6))
+#define GPB4		(PIN(1,16) | PUD)
+#define GPB4_GPIO	(GPB4 | FUNC(0))
+#define GPB4_SDBW	(GPB4 | FUNC(2))
+#define GPB4_CAM_FLD	(GPB4 | FUNC(3))
+#define GPB4_CF_DIR	(GPB4 | FUNC(4))
+#define GPB5		(PIN(1,20) | PUD)
+#define GPB5_GPIO	(GPB5 | FUNC(0))
+#define GPB5_IIC0_SCL	(GPB5 | FUNC(2))
+#define GPB6		(PIN(1,24) | PUD)
+#define GPB6_GPIO	(GPB6 | FUNC(0))
+#define GPB6_IIC0_SDA	(GPB6 | FUNC(2))
+
+#define GPC0		(PIN(2,0) | PUD)
+#define GPC0_GPIO	(GPC0 | FUNC(0))
+#define GPC0_SPI0_MISO	(GPC0 | FUNC(2))
+#define GPC1		(PIN(2,4) | PUD)
+#define GPC1_GPIO	(GPC1 | FUNC(0))
+#define GPC1_SPI0_CLK	(GPC1 | FUNC(2))
+#define GPC2		(PIN(2,8) | PUD)
+#define GPC2_GPIO	(GPC2 | FUNC(0))
+#define GPC2_SPI0_MOSI	(GPC2 | FUNC(2))
+#define GPC3		(PIN(2,12) | PUD)
+#define GPC3_GPIO	(GPC3 | FUNC(0))
+#define GPC3_SPI0_NCS	(GPC3 | FUNC(2))
+#define GPC4		(PIN(2,16) | PUD)
+#define GPC4_GPIO	(GPC4 | FUNC(0))
+#define GPC4_SPI1_MISO	(GPC4 | FUNC(2))
+#define GPC5		(PIN(2,20) | PUD)
+#define GPC5_GPIO	(GPC5 | FUNC(0))
+#define GPC5_SPI1_CLK	(GPC5 | FUNC(2))
+#define GPC6		(PIN(2,24) | PUD)
+#define GPC6_GPIO	(GPC6 | FUNC(0))
+#define GPC6_SPI1_MOSI	(GPC6 | FUNC(2))
+#define GPC7		(PIN(2,28) | PUD)
+#define GPC7_GPIO	(GPC7 | FUNC(0))
+#define GPC7_SPI1_NCS	(GPC7 | FUNC(2))
+
+#define GPD0		(PIN(3,0) | PUD)
+#define GPD0_AC97_BITCLK (GPD0 | FUNC(4))
+#define GPD1		(PIN(3,4) | PUD)
+#define GPD1_AC97_NRST	(GPD1 | FUNC(4))
+#define GPD2		(PIN(3,8) | PUD)
+#define GPD2_AC97_SYNC	(GPD2 | FUNC(4))
+#define GPD3		(PIN(3,12) | PUD)
+#define GPD3_AC97_SDI	(GPD3 | FUNC(4))
+#define GPD4		(PIN(3,16) | PUD)
+#define GPD4_AC97_SDO	(GPD4 | FUNC(4))
+
+#define GPE0		(PIN(4,0) | PUD)
+#define GPE0_GPIO	(GPE0 | FUNC(0))
+#define GPE1		(PIN(4,4) | PUD)
+#define GPE1_GPIO	(GPE1 | FUNC(0))
+#define GPE2		(PIN(4,8) | PUD)
+#define GPE2_GPIO	(GPE2 | FUNC(0))
+#define GPE3		(PIN(4,12) | PUD)
+#define GPE3_GPIO	(GPE3 | FUNC(0))
+#define GPE4		(PIN(4,16) | PUD)
+#define GPE4_GPIO	(GPE4 | FUNC(0))
+
+#define GPF0		(PIN(5,0) | PUD)
+#define GPF0_GPIO	(GPF0 | FUNC(0))
+#define GPF1		(PIN(5,2) | PUD)
+#define GPF1_GPIO	(GPF1 | FUNC(0))
+#define GPF2		(PIN(5,4) | PUD)
+#define GPF2_GPIO	(GPF2 | FUNC(0))
+#define GPF3		(PIN(5,6) | PUD)
+#define GPF3_GPIO	(GPF3 | FUNC(0))
+#define GPF4		(PIN(5,8) | PUD)
+#define GPF4_GPIO	(GPF4 | FUNC(0))
+#define GPF5		(PIN(5,10) | PUD)
+#define GPF5_GPIO	(GPF5 | FUNC(0))
+#define GPF6		(PIN(5,12) | PUD)
+#define GPF6_GPIO	(GPF6 | FUNC(0))
+#define GPF7		(PIN(5,14) | PUD)
+#define GPF7_GPIO	(GPF7 | FUNC(0))
+#define GPF8		(PIN(5,16) | PUD)
+#define GPF8_GPIO	(GPF8 | FUNC(0))
+#define GPF9		(PIN(5,18) | PUD)
+#define GPF9_GPIO	(GPF9 | FUNC(0))
+#define GPF10		(PIN(5,20) | PUD)
+#define GPF10_GPIO	(GPF10 | FUNC(0))
+#define GPF11		(PIN(5,22) | PUD)
+#define GPF11_GPIO	(GPF11 | FUNC(0))
+#define GPF12		(PIN(5,24) | PUD)
+#define GPF12_GPIO	(GPF12 | FUNC(0))
+#define GPF13		(PIN(5,26) | PUD)
+#define GPF13_GPIO	(GPF13 | FUNC(0))
+#define GPF14		(PIN(5,28) | PUD)
+#define GPF14_GPIO	(GPF14 | FUNC(0))
+#define GPF14_PWM0	(GPF14 | FUNC(2))
+#define GPF14_CLKOUT	(GPF14 | FUNC(3))
+#define GPF15		(PIN(5,30) | PUD)
+#define GPF15_GPIO	(GPF15 | FUNC(0))
+#define GPF15_PWM1	(GPF15 | FUNC(2))
+
+#define GPG0		(PIN(6,0) | PUD)
+#define GPG0_MMC0_CLK	(GPG0 | FUNC(2))
+#define GPG1		(PIN(6,4) | PUD)
+#define GPG1_MMC0_CMD	(GPG1 | FUNC(2))
+#define GPG2		(PIN(6,8) | PUD)
+#define GPG2_MMC0_DAT0	(GPG2 | FUNC(2))
+#define GPG3		(PIN(6,12) | PUD)
+#define GPG3_MMC0_DAT1	(GPG3 | FUNC(2))
+#define GPG4		(PIN(6,16) | PUD)
+#define GPG4_MMC0_DAT2	(GPG4 | FUNC(2))
+#define GPG5		(PIN(6,20) | PUD)
+#define GPG5_MMC0_DAT3	(GPG5 | FUNC(2))
+#define GPG6		(PIN(6,24) | PUD)
+#define GPG6_MMC0_NCD	(GPG6 | FUNC(2))
+
+#define GPH0		(PIN(7,0) | PUD)
+#define GPH0_GPIO	(GPH0 | FUNC(0))
+#define GPH1		(PIN(7,4) | PUD)
+#define GPH1_GPIO	(GPH1 | FUNC(0))
+#define GPH2		(PIN(7,8) | PUD)
+#define GPH2_GPIO	(GPH2 | FUNC(0))
+#define GPH3		(PIN(7,12) | PUD)
+#define GPH3_GPIO	(GPH3 | FUNC(0))
+#define GPH4		(PIN(7,16) | PUD)
+#define GPH4_GPIO	(GPH4 | FUNC(0))
+#define GPH5		(PIN(7,20) | PUD)
+#define GPH5_GPIO	(GPH5 | FUNC(0))
+#define GPH6		(PIN(7,24) | PUD)
+#define GPH6_GPIO	(GPH6 | FUNC(0))
+#define GPH7		(PIN(7,28) | PUD)
+#define GPH7_GPIO	(GPH7 | FUNC(0))
+#define GPH8		(PIN(7,32) | PUD)
+#define GPH8_GPIO	(GPH8 | FUNC(0))
+#define GPH9		(PIN(7,36) | PUD)
+#define GPH9_GPIO	(GPH9 | FUNC(0))
+
+#define GPI0		(PIN(8,0) | PUD)
+#define GPI0_GPIO	(GPI0 | FUNC(0))
+#define GPI1		(PIN(8,2) | PUD)
+#define GPI1_GPIO	(GPI1 | FUNC(0))
+#define GPI2		(PIN(8,4) | PUD)
+#define GPI2_GPIO	(GPI2 | FUNC(0))
+#define GPI3		(PIN(8,6) | PUD)
+#define GPI3_GPIO	(GPI3 | FUNC(0))
+#define GPI4		(PIN(8,8) | PUD)
+#define GPI4_GPIO	(GPI4 | FUNC(0))
+#define GPI5		(PIN(8,10) | PUD)
+#define GPI5_GPIO	(GPI5 | FUNC(0))
+#define GPI6		(PIN(8,12) | PUD)
+#define GPI6_GPIO	(GPI6 | FUNC(0))
+#define GPI7		(PIN(8,14) | PUD)
+#define GPI7_GPIO	(GPI7 | FUNC(0))
+#define GPI8		(PIN(8,16) | PUD)
+#define GPI8_GPIO	(GPI8 | FUNC(0))
+#define GPI9		(PIN(8,18) | PUD)
+#define GPI9_GPIO	(GPI9 | FUNC(0))
+#define GPI10		(PIN(8,20) | PUD)
+#define GPI10_GPIO	(GPI10 | FUNC(0))
+#define GPI11		(PIN(8,22) | PUD)
+#define GPI11_GPIO	(GPI11 | FUNC(0))
+#define GPI12		(PIN(8,24) | PUD)
+#define GPI12_GPIO	(GPI12 | FUNC(0))
+#define GPI13		(PIN(8,26) | PUD)
+#define GPI13_GPIO	(GPI13 | FUNC(0))
+#define GPI14		(PIN(8,28) | PUD)
+#define GPI14_GPIO	(GPI14 | FUNC(0))
+#define GPI15		(PIN(8,30) | PUD)
+#define GPI15_GPIO	(GPI15 | FUNC(0))
+
+#define GPJ0		(PIN(9,0) | PUD)
+#define GPJ0_GPIO	(GPJ0 | FUNC(0))
+#define GPJ1		(PIN(9,2) | PUD)
+#define GPJ1_GPIO	(GPJ1 | FUNC(0))
+#define GPJ2		(PIN(9,4) | PUD)
+#define GPJ2_GPIO	(GPJ2 | FUNC(0))
+#define GPJ3		(PIN(9,6) | PUD)
+#define GPJ3_GPIO	(GPJ3 | FUNC(0))
+#define GPJ4		(PIN(9,8) | PUD)
+#define GPJ4_GPIO	(GPJ4 | FUNC(0))
+#define GPJ5		(PIN(9,10) | PUD)
+#define GPJ5_GPIO	(GPJ5 | FUNC(0))
+#define GPJ6		(PIN(9,12) | PUD)
+#define GPJ6_GPIO	(GPJ6 | FUNC(0))
+#define GPJ7		(PIN(9,14) | PUD)
+#define GPJ7_GPIO	(GPJ7 | FUNC(0))
+#define GPJ8		(PIN(9,16) | PUD)
+#define GPJ8_GPIO	(GPJ8 | FUNC(0))
+#define GPJ9		(PIN(9,18) | PUD)
+#define GPJ9_GPIO	(GPJ9 | FUNC(0))
+#define GPJ10		(PIN(9,20) | PUD)
+#define GPJ10_GPIO	(GPJ10 | FUNC(0))
+#define GPJ11		(PIN(9,22) | PUD)
+#define GPJ11_GPIO	(GPJ11 | FUNC(0))
+
+#define GPK0		(PIN(10,0) | PUD)
+#define GPK0_DATA0	(GPK0 | FUNC(2))
+#define GPK0_GPIO	(GPK0 | FUNC(0))
+#define GPK1		(PIN(10,4) | PUD)
+#define GPK1_DATA1	(GPK1 | FUNC(2))
+#define GPK1_GPIO	(GPK1 | FUNC(0))
+#define GPK2		(PIN(10,8) | PUD)
+#define GPK2_DATA2	(GPK2 | FUNC(2))
+#define GPK2_GPIO	(GPK2 | FUNC(0))
+#define GPK3		(PIN(10,12) | PUD)
+#define GPK3_DATA3	(GPK3 | FUNC(2))
+#define GPK3_GPIO	(GPK3 | FUNC(0))
+#define GPK4		(PIN(10,16) | PUD)
+#define GPK4_DATA4	(GPK4 | FUNC(2))
+#define GPK4_GPIO	(GPK4 | FUNC(0))
+#define GPK5		(PIN(10,20) | PUD)
+#define GPK5_DATA5	(GPK5 | FUNC(2))
+#define GPK5_GPIO	(GPK5 | FUNC(0))
+#define GPK6		(PIN(10,24) | PUD)
+#define GPK6_DATA6	(GPK6 | FUNC(2))
+#define GPK6_GPIO	(GPK6 | FUNC(0))
+#define GPK7		(PIN(10,28) | PUD)
+#define GPK7_DATA7	(GPK7 | FUNC(2))
+#define GPK7_GPIO	(GPK7 | FUNC(0))
+#define GPK8		(PIN(10,32) | PUD)
+#define GPK8_DATA8	(GPK8 | FUNC(2))
+#define GPK8_GPIO	(GPK8 | FUNC(0))
+#define GPK9		(PIN(10,36) | PUD)
+#define GPK9_DATA9	(GPK9 | FUNC(2))
+#define GPK9_GPIO	(GPK9 | FUNC(0))
+#define GPK10		(PIN(10,40) | PUD)
+#define GPK10_DATA10	(GPK10 | FUNC(2))
+#define GPK10_GPIO	(GPK10 | FUNC(0))
+#define GPK11		(PIN(10,44) | PUD)
+#define GPK11_DATA11	(GPK11 | FUNC(2))
+#define GPK11_GPIO	(GPK11 | FUNC(0))
+#define GPK12		(PIN(10,48) | PUD)
+#define GPK12_DATA12	(GPK12 | FUNC(2))
+#define GPK12_GPIO	(GPK12 | FUNC(0))
+#define GPK13		(PIN(10,52) | PUD)
+#define GPK13_DATA13	(GPK13 | FUNC(2))
+#define GPK13_GPIO	(GPK13 | FUNC(0))
+#define GPK14		(PIN(10,56) | PUD)
+#define GPK14_DATA14	(GPK14 | FUNC(2))
+#define GPK14_GPIO	(GPK14 | FUNC(0))
+#define GPK15		(PIN(10,60) | PUD)
+#define GPK15_DATA15	(GPK15 | FUNC(2))
+#define GPK15_GPIO	(GPK15 | FUNC(0))
+
+#define GPL0		(PIN(11,0) | PUD)
+#define GPL0_ADDR0	(GPL0 | FUNC(2))
+#define GPL0_GPIO	(GPL0 | FUNC(0))
+#define GPL1		(PIN(11,4) | PUD)
+#define GPL1_ADDR1	(GPL1 | FUNC(2))
+#define GPL1_GPIO	(GPL1 | FUNC(0))
+#define GPL2		(PIN(11,8) | PUD)
+#define GPL2_ADDR2	(GPL2 | FUNC(2))
+#define GPL2_GPIO	(GPL2 | FUNC(0))
+#define GPL3		(PIN(11,12) | PUD)
+#define GPL3_ADDR3	(GPL3 | FUNC(2))
+#define GPL3_GPIO	(GPL3 | FUNC(0))
+#define GPL4		(PIN(11,16) | PUD)
+#define GPL4_ADDR3	(GPL4 | FUNC(2))
+#define GPL4_GPIO	(GPL4 | FUNC(0))
+#define GPL5		(PIN(11,20) | PUD)
+#define GPL5_ADDR3	(GPL5 | FUNC(2))
+#define GPL5_GPIO	(GPL5 | FUNC(0))
+#define GPL6		(PIN(11,24) | PUD)
+#define GPL6_ADDR3	(GPL6 | FUNC(2))
+#define GPL6_GPIO	(GPL6 | FUNC(0))
+#define GPL7		(PIN(11,28) | PUD)
+#define GPL7_ADDR3	(GPL7 | FUNC(2))
+#define GPL7_GPIO	(GPL7 | FUNC(0))
+#define GPL8		(PIN(11,32) | PUD)
+#define GPL8_ADDR3	(GPL8 | FUNC(2))
+#define GPL8_GPIO	(GPL8 | FUNC(0))
+#define GPL9		(PIN(11,36) | PUD)
+#define GPL9_ADDR3	(GPL9 | FUNC(2))
+#define GPL9_GPIO	(GPL9 | FUNC(0))
+#define GPL10		(PIN(11,40) | PUD)
+#define GPL10_ADDR3	(GPL10 | FUNC(2))
+#define GPL10_GPIO	(GPL10 | FUNC(0))
+#define GPL11		(PIN(11,44) | PUD)
+#define GPL11_ADDR3	(GPL11 | FUNC(2))
+#define GPL11_GPIO	(GPL11 | FUNC(0))
+#define GPL12		(PIN(11,48) | PUD)
+#define GPL12_ADDR3	(GPL12 | FUNC(2))
+#define GPL12_GPIO	(GPL12 | FUNC(0))
+#define GPL13		(PIN(11,52) | PUD)
+#define GPL13_ADDR16	(GPL13 | FUNC(2))
+#define GPL13_GPIO	(GPL13 | FUNC(0))
+#define GPL14		(PIN(11,65) | PUD)
+#define GPL14_ADDR17	(GPL14 | FUNC(2))
+#define GPL14_GPIO	(GPL14 | FUNC(0))
+
+#define GPM0		(PIN(12,0) | PUD)
+#define GPM0_GPIO	(GPM0 | FUNC(0))
+#define GPM1		(PIN(12,4) | PUD)
+#define GPM1_GPIO	(GPM1 | FUNC(0))
+#define GPM2		(PIN(12,8) | PUD)
+#define GPM2_GPIO	(GPM2 | FUNC(0))
+#define GPM3		(PIN(12,12) | PUD)
+#define GPM3_GPIO	(GPM3 | FUNC(0))
+#define GPM4		(PIN(12,16) | PUD)
+#define GPM4_GPIO	(GPM4 | FUNC(0))
+#define GPM5		(PIN(12,20) | PUD)
+#define GPM5_GPIO	(GPM5 | FUNC(0))
+
+#define GPN0		(PIN(13,0) | PUD)
+#define GPN0_GPIO	(GPN0 | FUNC(0))
+#define GPN1		(PIN(13,0) | PUD)
+#define GPN1_GPIO	(GPN1 | FUNC(0))
+#define GPN2		(PIN(13,0) | PUD)
+#define GPN2_GPIO	(GPN2 | FUNC(0))
+#define GPN3		(PIN(13,0) | PUD)
+#define GPN3_GPIO	(GPN3 | FUNC(0))
+#define GPN4		(PIN(13,0) | PUD)
+#define GPN4_GPIO	(GPN4 | FUNC(0))
+#define GPN5		(PIN(13,0) | PUD)
+#define GPN5_GPIO	(GPN5 | FUNC(0))
+#define GPN6		(PIN(13,0) | PUD)
+#define GPN6_GPIO	(GPN6 | FUNC(0))
+#define GPN7		(PIN(13,0) | PUD)
+#define GPN7_GPIO	(GPN7 | FUNC(0))
+#define GPN8		(PIN(13,0) | PUD)
+#define GPN8_GPIO	(GPN8 | FUNC(0))
+#define GPN9		(PIN(13,0) | PUD)
+#define GPN9_GPIO	(GPN9 | FUNC(0))
+#define GPN10		(PIN(13,20) | PUD)
+#define GPN10_GPIO	(GPN10 | FUNC(0))
+#define GPN11		(PIN(13,20) | PUD)
+#define GPN11_GPIO	(GPN11 | FUNC(0))
+#define GPN12		(PIN(13,20) | PUD)
+#define GPN12_GPIO	(GPN12 | FUNC(0))
+#define GPN13		(PIN(13,20) | PUD)
+#define GPN13_GPIO	(GPN13 | FUNC(0))
+#define GPN14		(PIN(13,20) | PUD)
+#define GPN14_GPIO	(GPN14 | FUNC(0))
+#define GPN15		(PIN(13,20) | PUD)
+#define GPN15_GPIO	(GPN15 | FUNC(0))
+
+#define GPO0		(PIN(14,0) | PUD)
+#define GPO0_GPIO	(GPO0 | FUNC(0))
+#define GPO0_NCS2	(GPO0 | FUNC(2))
+#define GPO1		(PIN(14,2) | PUD)
+#define GPO1_GPIO	(GPO1 | FUNC(0))
+#define GPO1_NCS3	(GPO1 | FUNC(2))
+#define GPO2		(PIN(14,4) | PUD)
+#define GPO2_GPIO	(GPO2 | FUNC(0))
+#define GPO2_NCS4	(GPO2 | FUNC(2))
+#define GPO3		(PIN(14,6) | PUD)
+#define GPO3_GPIO	(GPO3 | FUNC(0))
+#define GPO3_NCS5	(GPO3 | FUNC(2))
+#define GPO4		(PIN(14,8) | PUD)
+#define GPO4_GPIO	(GPO4 | FUNC(0))
+#define GPO5		(PIN(14,10) | PUD)
+#define GPO5_GPIO	(GPO5 | FUNC(0))
+#define GPO6		(PIN(14,12) | PUD)
+#define GPO6_GPIO	(GPO6 | FUNC(0))
+#define GPO6_ADDR6	(GPO6 | FUNC(2))
+#define GPO7		(PIN(14,14) | PUD)
+#define GPO7_GPIO	(GPO7 | FUNC(0))
+#define GPO7_ADDR7	(GPO7 | FUNC(2))
+#define GPO8		(PIN(14,16) | PUD)
+#define GPO8_GPIO	(GPO8 | FUNC(0))
+#define GPO8_ADDR8	(GPO8 | FUNC(2))
+#define GPO9		(PIN(14,18) | PUD)
+#define GPO9_GPIO	(GPO9 | FUNC(0))
+#define GPO9_ADDR9	(GPO9 | FUNC(2))
+#define GPO10		(PIN(14,20) | PUD)
+#define GPO10_GPIO	(GPO10 | FUNC(2))
+#define GPO10_ADDR10	(GPO10 | FUNC(2))
+#define GPO11		(PIN(14,22) | PUD)
+#define GPO11_GPIO	(GPO11 | FUNC(0))
+#define GPO11_ADDR11	(GPO11 | FUNC(2))
+#define GPO12		(PIN(14,24) | PUD)
+#define GPO12_GPIO	(GPO12 | FUNC(0))
+#define GPO12_ADDR12	(GPO12 | FUNC(2))
+#define GPO13		(PIN(14,26) | PUD)
+#define GPO13_GPIO	(GPO13 | FUNC(0))
+#define GPO13_ADDR13	(GPO13 | FUNC(2))
+#define GPO14		(PIN(14,28) | PUD)
+#define GPO14_GPIO	(GPO14 | FUNC(0))
+#define GPO14_ADDR14	(GPO14 | FUNC(2))
+#define GPO15		(PIN(14,30) | PUD)
+#define GPO15_GPIO	(GPO15 | FUNC(0))
+#define GPO15_ADDR15	(GPO15 | FUNC(2))
+
+#define GPP0		(PIN(15,0) | PUD)
+#define GPP0_GPIO	(GPP0 | FUNC(0))
+#define GPP1		(PIN(15,2) | PUD)
+#define GPP1_GPIO	(GPP1 | FUNC(0))
+#define GPP2		(PIN(15,4) | PUD)
+#define GPP2_NWAIT	(GPP2 | FUNC(2))
+#define GPP3		(PIN(15,6) | PUD)
+#define GPP3_FALE	(GPP3 | FUNC(2))
+#define GPP4		(PIN(15,8) | PUD)
+#define GPP4_FCLE	(GPP4 | FUNC(2))
+#define GPP5		(PIN(15,10) | PUD)
+#define GPP5_FWE	(GPP5 | FUNC(2))
+#define GPP6		(PIN(15,12) | PUD)
+#define GPP6_FRE	(GPP6 | FUNC(2))
+#define GPP7		(PIN(15,14) | PUD)
+#define GPP7_RNB	(GPP7 | FUNC(2))
+#define GPP8		(PIN(15,16) | PUD)
+#define GPP8_GPIO	(GPP8 | FUNC(0))
+#define GPP9		(PIN(15,18) | PUD)
+#define GPP9_GPIO	(GPP9 | FUNC(0))
+#define GPP10		(PIN(15,20) | PUD)
+#define GPP10_GPIO	(GPP10 | FUNC(0))
+#define GPP11		(PIN(15,22) | PUD)
+#define GPP11_GPIO	(GPP11 | FUNC(0))
+#define GPP12		(PIN(15,24) | PUD)
+#define GPP12_GPIO	(GPP12 | FUNC(0))
+#define GPP13		(PIN(15,26) | PUD)
+#define GPP13_GPIO	(GPP13 | FUNC(0))
+#define GPP14		(PIN(15,28) | PUD)
+#define GPP14_GPIO	(GPP14 | FUNC(0))
+
+#define GPQ0		(PIN(16,0) | PUD)
+#define GPQ0_GPIO	(GPQ0 | FUNC(0))
+#define GPQ1		(PIN(16,2) | PUD)
+#define GPQ1_GPIO	(GPQ1 | FUNC(0))
+#define GPQ2		(PIN(16,4) | PUD)
+#define GPQ2_GPIO	(GPQ2 | FUNC(0))
+#define GPQ3		(PIN(16,8) | PUD)
+#define GPQ3_GPIO	(GPQ3 | FUNC(0))
+#define GPQ4		(PIN(16,8) | PUD)
+#define GPQ4_GPIO	(GPQ4 | FUNC(0))
+#define GPQ5		(PIN(16,10) | PUD)
+#define GPQ5_GPIO	(GPQ5 | FUNC(0))
+#define GPQ6		(PIN(16,12) | PUD)
+#define GPQ6_GPIO	(GPQ6 | FUNC(0))
+#define GPQ7		(PIN(16,14) | PUD)
+#define GPQ7_GPIO	(GPQ7 | FUNC(0))
+#define GPQ8		(PIN(16,16) | PUD)
+#define GPQ8_GPIO	(GPQ7 | FUNC(0))
+
+
+#endif /* __MACH_IOMUX_S3C64XX_H */
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Sun Jul 22 09:03:01 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 15:03:01 +0200
Subject: [PATCH 0/7] compressed image update
Message-ID: <20120722130301.GI22657@game.jcrosoft.org>

Hi,

The following changes since commit 63ac9c743b1304b0b4b792643e4704394f6f8aeb:

  only compress default env in uncompressed images (2012-07-20 14:20:15 +0200)

are available in the git repository at:

  git://git.jcrosoft.org/barebox.git tags/compressed-gzip

for you to fetch changes up to 5c808702b4235a39d78042f9ad4f99647c9b8c54:

  compressed image: add gzip support (2012-07-22 20:35:48 +0800)

----------------------------------------------------------------
compressed: gzip support and cleanup

The follwing patch series add the support of GZIP

And allow now to link only what is need in the decompressor

This is needed if you want to compile a barebox with modules support

as we current rely on gcc and it's garbage colector to clean the non
needed object.

With modules support gcc will not do this.

This will allow to have a version of barebox shrink to the first
128KiB so it can fit in the first page of nand which is garanty
badblock free and then if we need more feature we will use modules
store in an other partitions.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (7):
      stddev: make it selectable via Kconfig
      decompress_unlzo: define decompress_unlzo as decompress
      compressed image: factorise compressor type
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed: allow to link only what is needed
      compressed image: add gzip support

 Makefile                      |   31 +++++++++++++++++++++----------
 arch/arm/Makefile             |    7 +++++++
 arch/arm/cpu/start.c          |   20 +++++++++++++++++---
 arch/arm/lib/Makefile         |    2 +-
 arch/arm/lib/barebox.lds.S    |    2 +-
 commands/Makefile             |    2 +-
 common/Kconfig                |   25 ++++++++++++++++++++++---
 compressed/Makefile           |    5 +++++
 compressed/misc.c             |   10 ++++++++++
 compressed/string.c           |  127 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/linux/decompress/mm.h |   68 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c      |    1 +
 lib/decompress_unlzo.c        |    1 +
 piggy.gzip.S                  |    6 ++++++
 14 files changed, 288 insertions(+), 19 deletions(-)
 create mode 100644 compressed/Makefile
 create mode 100644 compressed/misc.c
 create mode 100644 compressed/string.c
 create mode 100644 include/linux/decompress/mm.h
 create mode 100644 piggy.gzip.S

Best Regards,
J.


From plagnioj at jcrosoft.com  Sun Jul 22 09:16:28 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 15:16:28 +0200
Subject: [PATCH 0/7] compressed inmage update
Message-ID: <20120722131628.GJ22657@game.jcrosoft.org>

HI,

The following changes since commit 63ac9c743b1304b0b4b792643e4704394f6f8aeb:

  only compress default env in uncompressed images (2012-07-20 14:20:15 +0200)

are available in the git repository at:

  git://git.jcrosoft.org/barebox.git tags/compressed-gzip

for you to fetch changes up to 5c808702b4235a39d78042f9ad4f99647c9b8c54:

  compressed image: add gzip support (2012-07-22 20:35:48 +0800)

----------------------------------------------------------------
compressed: gzip support and cleanup

The follwing patch series add the support of GZIP

And allow now to link only what is need in the decompressor

This is needed if you want to compile a barebox with modules support

as we current rely on gcc and it's garbage colector to clean the non
needed object.

With modules support gcc will not do this.

This will allow to have a version of barebox shrink to the first
128KiB so it can fit in the first page of nand which is garanty
badblock free and then if we need more feature we will use modules
store in an other partitions.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (7):
      stddev: make it selectable via Kconfig
      decompress_unlzo: define decompress_unlzo as decompress
      compressed image: factorise compressor type
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed: allow to link only what is needed
      compressed image: add gzip support

 Makefile                      |   31 +++++++++++++++++++++----------
 arch/arm/Makefile             |    7 +++++++
 arch/arm/cpu/start.c          |   20 +++++++++++++++++---
 arch/arm/lib/Makefile         |    2 +-
 arch/arm/lib/barebox.lds.S    |    2 +-
 commands/Makefile             |    2 +-
 common/Kconfig                |   25 ++++++++++++++++++++++---
 compressed/Makefile           |    5 +++++
 compressed/misc.c             |   10 ++++++++++
 compressed/string.c           |  127 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/linux/decompress/mm.h |   68 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c      |    1 +
 lib/decompress_unlzo.c        |    1 +
 piggy.gzip.S                  |    6 ++++++
 14 files changed, 288 insertions(+), 19 deletions(-)
 create mode 100644 compressed/Makefile
 create mode 100644 compressed/misc.c
 create mode 100644 compressed/string.c
 create mode 100644 include/linux/decompress/mm.h
 create mode 100644 piggy.gzip.S

Best Regards,
J.


From bernhard at bwalle.de  Sun Jul 22 09:21:20 2012
From: bernhard at bwalle.de (Bernhard Walle)
Date: Sun, 22 Jul 2012 15:21:20 +0200
Subject: [PATCH] lib/Kconfig: Fix alignment of arrows in label
Message-ID: <1342963280-4297-1-git-send-email-bernhard@bwalle.de>

Signed-off-by: Bernhard Walle <bernhard at bwalle.de>
---
 lib/Kconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/Kconfig b/lib/Kconfig
index 3bcde5c..32634df 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -1,4 +1,4 @@
-menu "Library routines"
+menu "Library routines              "
 config PARAMETER
 	bool
 
-- 
1.7.9.5



From plagnioj at jcrosoft.com  Sun Jul 22 10:02:45 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 16:02:45 +0200
Subject: [PATCH 4/7] decompressor: import malloc/free implementation for linux
 3.4
In-Reply-To: <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120722130301.GI22657@game.jcrosoft.org>
 <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1342965768-3796-4-git-send-email-plagnioj@jcrosoft.com>

This is need for gunzip support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 include/linux/decompress/mm.h |   68 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 include/linux/decompress/mm.h

diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
new file mode 100644
index 0000000..0c35411
--- /dev/null
+++ b/include/linux/decompress/mm.h
@@ -0,0 +1,68 @@
+/*
+ * linux/compr_mm.h
+ *
+ * Memory management for pre-boot and ramdisk uncompressors
+ *
+ * Authors: Alain Knaff <alain at knaff.lu>
+ *
+ */
+
+#ifndef DECOMPR_MM_H
+#define DECOMPR_MM_H
+
+#ifdef STATIC
+
+/* Code active when included from pre-boot environment: */
+
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitrarily relocated (via
+ * GOT references).  This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
+/* A trivial malloc implementation, adapted from
+ *  malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ */
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
+
+static void *malloc(int size)
+{
+	void *p;
+
+	if (size < 0)
+		return NULL;
+	if (!malloc_ptr)
+		malloc_ptr = free_mem_ptr;
+
+	malloc_ptr = (malloc_ptr + 3) & ~3;     /* Align */
+
+	p = (void *)malloc_ptr;
+	malloc_ptr += size;
+
+	if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr)
+		return NULL;
+
+	malloc_count++;
+	return p;
+}
+
+static void free(void *where)
+{
+	malloc_count--;
+	if (!malloc_count)
+		malloc_ptr = free_mem_ptr;
+}
+
+#define large_malloc(a) malloc(a)
+#define large_free(a) free(a)
+
+#define INIT
+
+#endif /* STATIC */
+
+#endif /* DECOMPR_MM_H */
-- 
1.7.10



From plagnioj at jcrosoft.com  Sun Jul 22 10:02:42 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 16:02:42 +0200
Subject: [PATCH 1/7] stddev: make it selectable via Kconfig
In-Reply-To: <20120722130301.GI22657@game.jcrosoft.org>
References: <20120722130301.GI22657@game.jcrosoft.org>
Message-ID: <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>

enable is by default for simple and hush
we do not need to NO_SHELL

this allow to save 1KiB

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 commands/Makefile |    2 +-
 common/Kconfig    |    5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/commands/Makefile b/commands/Makefile
index 54191b4..e9157bf 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -1,4 +1,4 @@
-obj-y				+= stddev.o
+obj-$(CONFIG_STDDEV)		+= stddev.o
 obj-$(CONFIG_CMD_BOOTM)		+= bootm.o
 obj-$(CONFIG_CMD_UIMAGE)	+= uimage.o
 obj-$(CONFIG_CMD_LINUX16)	+= linux16.o
diff --git a/common/Kconfig b/common/Kconfig
index 1c996aa..c6f1afa 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -50,6 +50,9 @@ config BINFMT
 config GLOBALVAR
 	bool
 
+config STDDEV
+	bool
+
 menu "General Settings              "
 
 config LOCALVERSION
@@ -295,6 +298,7 @@ choice
 		select COMMAND_SUPPORT
 		select PARAMETER
 		select BINFMT
+		select STDDEV
 		help
 		  Enable hush support. This is the most advanced shell available
 		  for barebox.
@@ -304,6 +308,7 @@ choice
 		select ENVIRONMENT_VARIABLES
 		select COMMAND_SUPPORT
 		select PARAMETER
+		select STDDEV
 		help
 		  simple shell. No if/then, no return values from commands, no loops
 
-- 
1.7.10



From plagnioj at jcrosoft.com  Sun Jul 22 10:02:46 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 16:02:46 +0200
Subject: [PATCH 5/7] ARM: add early malloc support needed by the decompressor
In-Reply-To: <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120722130301.GI22657@game.jcrosoft.org>
 <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1342965768-3796-5-git-send-email-plagnioj@jcrosoft.com>

This is not needed by lzo but by gunzip, xz and others.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/cpu/start.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 18c5c83..8ab6fdc 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,6 +28,9 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+unsigned long free_mem_ptr;
+unsigned long free_mem_end_ptr;
+
 #ifdef CONFIG_IMAGE_COMPRESSION
 void __naked __section(.text_head_entry) compressed_start(void)
 {
@@ -158,6 +161,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
 
+	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
+	free_mem_ptr = STACK_BASE - 0x20000 - 16;
+	free_mem_end_ptr = STACK_BASE - 16;
+
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-- 
1.7.10



From plagnioj at jcrosoft.com  Sun Jul 22 10:02:43 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 16:02:43 +0200
Subject: [PATCH 2/7] decompress_unlzo: define decompress_unlzo as decompress
In-Reply-To: <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120722130301.GI22657@game.jcrosoft.org>
 <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1342965768-3796-2-git-send-email-plagnioj@jcrosoft.com>

so we can use decompress in the decompressor
this will simplify multi decompress support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 lib/decompress_unlzo.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
index 0e6a7ad..56abfc6 100644
--- a/lib/decompress_unlzo.c
+++ b/lib/decompress_unlzo.c
@@ -289,3 +289,4 @@ exit_1:
 exit:
 	return ret;
 }
+#define decompress decompress_unlzo
-- 
1.7.10



From plagnioj at jcrosoft.com  Sun Jul 22 10:02:47 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 16:02:47 +0200
Subject: [PATCH 6/7] compressed: allow to link only what is needed
In-Reply-To: <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120722130301.GI22657@game.jcrosoft.org>
 <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1342965768-3796-6-git-send-email-plagnioj@jcrosoft.com>

Today we link to whole barebox and rely on gcc to cleanup via it's garbage
collector.

Now we specify only what is needed and introduce a new directory with source
only related to the compressed target.

The architecture will have to specify the needed file for the link via comp-arch-y.

Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile            |   16 ++++---
 arch/arm/Makefile   |    7 +++
 compressed/Makefile |    5 ++
 compressed/misc.c   |   10 ++++
 compressed/string.c |  127 +++++++++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 159 insertions(+), 6 deletions(-)
 create mode 100644 compressed/Makefile
 create mode 100644 compressed/misc.c
 create mode 100644 compressed/string.c

diff --git a/Makefile b/Makefile
index 0b3da03..d6a3ae5 100644
--- a/Makefile
+++ b/Makefile
@@ -412,6 +412,7 @@ scripts: scripts_basic include/config/auto.conf
 
 # Objects we will link into barebox / subdirs we need to visit
 common-y		:= common/ drivers/ commands/ lib/ crypto/ net/ fs/
+comp-y			:= compressed/
 
 ifeq ($(dot-config),1)
 # Read in config
@@ -474,7 +475,7 @@ CFLAGS += $(call cc-option,-Wno-pointer-sign,)
 # this default value
 export KBUILD_IMAGE ?= barebox
 
-barebox-dirs	:= $(patsubst %/,%,$(filter %/, $(common-y)))
+barebox-dirs	:= $(patsubst %/,%,$(filter %/, $(common-y) $(comp-y)))
 
 barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
 		     $(common-n) $(common-) \
@@ -482,6 +483,8 @@ barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
 		     $(net-n)  $(net-)  $(libs-n)    $(libs-))))
 
 common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
+comp-y		:= $(patsubst %/, %/built-in.o, $(comp-y))
+comp-arch-y	:= $(patsubst %/, %/built-in.o, $(comp-arch-y))
 
 # Build barebox
 # ---------------------------------------------------------------------------
@@ -509,8 +512,9 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 #
 # System.map is generated to document addresses of all kernel symbols
 
+barebox-comp := $(comp-y)
 barebox-common := $(common-y)
-barebox-all    := $(barebox-common)
+barebox-all    := $(barebox-common) $(barebox-comp)
 barebox-lds    := $(lds-y)
 barebox-compressed-lds    := $(lds-compressed-y)
 
@@ -726,11 +730,11 @@ piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_
 	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
 
 ifdef CONFIG_IMAGE_COMPRESSION
-barebox: piggy.$(suffix_y).o
-	@echo "  LD     " $@
+barebox: piggy.$(suffix_y).o $(barebox-comp)
+	@echo "  LD     " $@ $(barebox-comp)
 	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
 		-T $(barebox-compressed-lds) \
-		--start-group $(barebox-common) piggy.$(suffix_y).o --end-group
+		--start-group $(barebox-comp) $(comp-arch-y) piggy.$(suffix_y).o --end-group
 else
 barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
@@ -743,7 +747,7 @@ barebox.srec: barebox
 
 # The actual objects are generated when descending,
 # make sure no implicit rule kicks in
-$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds): $(barebox-dirs) ;
+$(sort $(barebox-head) $(barebox-common) $(barebox-comp) ) $(barebox-lds): $(barebox-dirs) ;
 
 # Handle descending into subdirectories listed in $(barebox-dirs)
 # Preset locale variables to speed up the build process. Limit locale
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a93c4d5..0c666dc 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -207,6 +207,13 @@ endif
 common-y += $(BOARD) $(MACH)
 common-y += arch/arm/lib/ arch/arm/cpu/
 
+# those file will not be recompibled
+# we assume they are already compiled
+# for the normal barebox
+comp-arch-y += arch/arm/lib/lib1funcs.o
+comp-arch-y += arch/arm/lib/div0.o
+comp-arch-y += arch/arm/cpu/start.o
+
 lds-y	:= arch/arm/lib/barebox.lds
 lds-compressed-y := arch/arm/lib/barebox-compressed.lds
 
diff --git a/compressed/Makefile b/compressed/Makefile
new file mode 100644
index 0000000..720a0cb
--- /dev/null
+++ b/compressed/Makefile
@@ -0,0 +1,5 @@
+#
+# only unsed by the decompressor
+#
+obj-y += misc.o
+obj-y += string.o
diff --git a/compressed/misc.c b/compressed/misc.c
new file mode 100644
index 0000000..7bb0f50
--- /dev/null
+++ b/compressed/misc.c
@@ -0,0 +1,10 @@
+#include <common.h>
+#include <init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+void __noreturn panic(const char *fmt, ...)
+{
+	while(1);
+}
diff --git a/compressed/string.c b/compressed/string.c
new file mode 100644
index 0000000..6787e82
--- /dev/null
+++ b/compressed/string.c
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/compressed/string.c
+ *
+ * Small subset of simple string routines
+ */
+
+#include <linux/types.h>
+
+void *memcpy(void *__dest, __const void *__src, size_t __n)
+{
+	int i = 0;
+	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
+
+	for (i = __n >> 3; i > 0; i--) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 2) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 1) {
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1)
+		*d++ = *s++;
+
+	return __dest;
+}
+
+void *memmove(void *__dest, __const void *__src, size_t count)
+{
+	unsigned char *d = __dest;
+	const unsigned char *s = __src;
+
+	if (__dest == __src)
+		return __dest;
+
+	if (__dest < __src)
+		return memcpy(__dest, __src, count);
+
+	while (count--)
+		d[count] = s[count];
+	return __dest;
+}
+
+size_t strlen(const char *s)
+{
+	const char *sc = s;
+
+	while (*sc != '\0')
+		sc++;
+	return sc - s;
+}
+
+int memcmp(const void *cs, const void *ct, size_t count)
+{
+	const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;
+	int res = 0;
+
+	while (su1 < end) {
+		res = *su1++ - *su2++;
+		if (res)
+			break;
+	}
+	return res;
+}
+
+int strcmp(const char *cs, const char *ct)
+{
+	unsigned char c1, c2;
+	int res = 0;
+
+	do {
+		c1 = *cs++;
+		c2 = *ct++;
+		res = c1 - c2;
+		if (res)
+			break;
+	} while (c1);
+	return res;
+}
+
+void *memchr(const void *s, int c, size_t count)
+{
+	const unsigned char *p = s;
+
+	while (count--)
+		if ((unsigned char)c == *p++)
+			return (void *)(p - 1);
+	return NULL;
+}
+
+char *strchr(const char *s, int c)
+{
+	while (*s != (char)c)
+		if (*s++ == '\0')
+			return NULL;
+	return (char *)s;
+}
+
+#undef memset
+
+void *memset(void *s, int c, size_t count)
+{
+	char *xs = s;
+	while (count--)
+		*xs++ = c;
+	return s;
+}
+
+void __memzero(void *s, size_t count)
+{
+	memset(s, 0, count);
+}
-- 
1.7.10



From plagnioj at jcrosoft.com  Sun Jul 22 10:02:48 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 16:02:48 +0200
Subject: [PATCH 7/7] compressed image: add gzip support
In-Reply-To: <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120722130301.GI22657@game.jcrosoft.org>
 <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1342965768-3796-7-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                 |    7 ++++++-
 arch/arm/cpu/start.c     |    4 ++++
 common/Kconfig           |    3 +++
 lib/decompress_inflate.c |    1 +
 piggy.gzip.S             |    6 ++++++
 5 files changed, 20 insertions(+), 1 deletion(-)
 create mode 100644 piggy.gzip.S

diff --git a/Makefile b/Makefile
index d6a3ae5..1003786 100644
--- a/Makefile
+++ b/Makefile
@@ -719,8 +719,13 @@ barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsym
 barebox-uncompressed.bin: barebox-uncompressed
 	$(call if_changed,objcopy)
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
 suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
 
+barebox-uncompressed.bin.gzip: barebox-uncompressed.bin
+	@echo "  GZIP   " $@
+	$(Q)gzip -n -9 -c barebox-uncompressed.bin > $@
+
 barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
 	@echo "  LZO    " $@
 	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
@@ -1039,7 +1044,7 @@ CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
 		.tmp_kallsyms* barebox_default_env* barebox.ldr \
 		scripts/bareboxenv-target \
 		Doxyfile.version barebox.srec barebox.s5p \
-		barebox-uncompressed barebox-uncompressed.bin barebox-uncompressed.bin.lzo
+		barebox-uncompressed barebox-uncompressed.bin*
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include2 usr/include
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 8ab6fdc..8e63523 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -109,6 +109,10 @@ extern void *input_data_end;
 #include "../../../lib/decompress_unlzo.c"
 #endif
 
+#ifdef CONFIG_IMAGE_COMPRESSION_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
 	void (*barebox)(void);
diff --git a/common/Kconfig b/common/Kconfig
index 8437e1c..702a0bd 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -110,6 +110,9 @@ choice
 config IMAGE_COMPRESSION_LZO
 	bool "lzo"
 
+config IMAGE_COMPRESSION_GZIP
+	bool "gzip"
+
 endchoice
 
 endif
diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c
index 526d6a1..5c1ebb6 100644
--- a/lib/decompress_inflate.c
+++ b/lib/decompress_inflate.c
@@ -4,6 +4,7 @@
 /* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
  * errors about console_printk etc... on ARM */
 #define _LINUX_KERNEL_H
+#include <linux/decompress/mm.h>
 
 #include "zlib_inflate/inftrees.c"
 #include "zlib_inflate/inffast.c"
diff --git a/piggy.gzip.S b/piggy.gzip.S
new file mode 100644
index 0000000..2ca7d78
--- /dev/null
+++ b/piggy.gzip.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl  input_data
+input_data:
+	.incbin "barebox-uncompressed.bin.gzip"
+	.globl  input_data_end
+input_data_end:
-- 
1.7.10



From plagnioj at jcrosoft.com  Sun Jul 22 10:02:44 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 16:02:44 +0200
Subject: [PATCH 3/7] compressed image: factorise compressor type
In-Reply-To: <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120722130301.GI22657@game.jcrosoft.org>
 <1342965768-3796-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1342965768-3796-3-git-send-email-plagnioj@jcrosoft.com>

This will simplify to support of multi compressor support such as gzip, lzma,
xz.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                   |   12 +++++++-----
 arch/arm/cpu/start.c       |    9 ++++++---
 arch/arm/lib/Makefile      |    2 +-
 arch/arm/lib/barebox.lds.S |    2 +-
 common/Kconfig             |   17 ++++++++++++++---
 5 files changed, 29 insertions(+), 13 deletions(-)

diff --git a/Makefile b/Makefile
index e0a3c07..0b3da03 100644
--- a/Makefile
+++ b/Makefile
@@ -715,20 +715,22 @@ barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsym
 barebox-uncompressed.bin: barebox-uncompressed
 	$(call if_changed,objcopy)
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
+
 barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
 	@echo "  LZO    " $@
 	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
 
-piggy.lzo.o: barebox-uncompressed.bin.lzo $(src)/piggy.lzo.S
+piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
 	@echo "  CC     " $@
-	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.lzo.S -o $@
+	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
 
-ifdef CONFIG_IMAGE_COMPRESSION_LZO
-barebox: piggy.lzo.o
+ifdef CONFIG_IMAGE_COMPRESSION
+barebox: piggy.$(suffix_y).o
 	@echo "  LD     " $@
 	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
 		-T $(barebox-compressed-lds) \
-		--start-group $(barebox-common) piggy.lzo.o --end-group
+		--start-group $(barebox-common) piggy.$(suffix_y).o --end-group
 else
 barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 6743804..18c5c83 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,7 +28,7 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
-#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+#ifdef CONFIG_IMAGE_COMPRESSION
 void __naked __section(.text_head_entry) compressed_start(void)
 {
 	barebox_arm_head();
@@ -101,7 +101,10 @@ extern void *input_data;
 extern void *input_data_end;
 
 #define STATIC static
+
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
 #include "../../../lib/decompress_unlzo.c"
+#endif
 
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
@@ -112,7 +115,7 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
 	else
 		barebox = (void *)TEXT_BASE;
 
-	decompress_unlzo((void *)compressed_start,
+	decompress((void *)compressed_start,
 			len,
 			NULL, NULL,
 			(void *)TEXT_BASE, NULL, NULL);
@@ -158,7 +161,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION_LZO)) {
+	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION)) {
 		compressed_start = (uint32_t)&input_data - offset;
 		compressed_end = (uint32_t)&input_data_end - offset;
 		len = compressed_end - compressed_start;
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 044d3e6..1b6f7f4 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -21,4 +21,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
 obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
 extra-y += barebox.lds
-extra-$(CONFIG_IMAGE_COMPRESSION_LZO) += barebox-compressed.lds
+extra-$(CONFIG_IMAGE_COMPRESSION) += barebox-compressed.lds
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index b415830..b22cf98 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -31,7 +31,7 @@ SECTIONS
 {
 	. = TEXT_BASE;
 
-#ifndef CONFIG_IMAGE_COMPRESSION_LZO
+#ifndef CONFIG_IMAGE_COMPRESSION
 	PRE_IMAGE
 #endif
 	. = ALIGN(4);
diff --git a/common/Kconfig b/common/Kconfig
index c6f1afa..8437e1c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -99,9 +99,20 @@ menu "memory layout                 "
 config HAVE_IMAGE_COMPRESSION
 	bool
 
+config IMAGE_COMPRESSION
+	bool "Compressed image"
+
+if IMAGE_COMPRESSION
+
+choice
+	prompt "Compression"
+
 config IMAGE_COMPRESSION_LZO
-	depends on HAVE_IMAGE_COMPRESSION
-	bool "lzo compressed image"
+	bool "lzo"
+
+endchoice
+
+endif
 
 config MMU
 	bool "Enable MMU"
@@ -185,7 +196,7 @@ config MALLOC_SIZE
 	prompt "malloc area size"
 
 config HEAD_TEXT_BASE
-	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION_LZO
+	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION
 	hex
 	prompt "HEAD_TEXT_BASE"
 endmenu
-- 
1.7.10



From bernhard at bwalle.de  Sun Jul 22 11:29:44 2012
From: bernhard at bwalle.de (Bernhard Walle)
Date: Sun, 22 Jul 2012 17:29:44 +0200
Subject: Booting kernel from FAT partition on beagle board
Message-ID: <juh698$uj7$1@dough.gmane.org>

Hi,

this may be a very stupid question, but I'm using Barebox for the first
time. My kernel is located on a SD card on the 1st FAT partition. I
tried following sequence:

------------------------------------------------------------
barebox at Texas Instrument's Beagle:/ bootargs="console=ttyO2,115200 \
	vram=12M omapfb.mode=dvi:1024x768MR-16 at 60 omapfb.debug=y \
	omapdss.def_disp=dvi root=/dev/mmcblk0p2 ro rootfstype=ext3 \
	rootwait earlyprintk=ttyO2,115200"
barebox at Texas Instrument's Beagle:/ mount /dev/disk0.0 fat /mnt
barebox at Texas Instrument's Beagle:/ bootm -c -v /mnt/uImage
------------------------------------------------------------

But that doesn't work:

------------------------------------------------------------
   Image Name:   Linux-3.5.0
   OS:           Linux
   Architecture: ARM
   Type:         Kernel Image
   Compression:  uncompressed
   Data Size:    3362776 Bytes =  3.2 MB
   Load Address: 80008000
   Entry Point:  80008000

Loading OS U-Boot uImage '/mnt/uImage'
OS image is at 0x80008000-0x8033cfd7
Passing control to ARM Linux uImage handler

Starting kernel at 0x80008000...
commandline: console=ttyO2,115200 vram=12M
omapfb.mode=dvi:1024x768MR-16 at 60 omapfb.debug=y omapdss.def_disp=dvi
root=/dev/mmcblk0p2 ro rootfstype=ext3 rootwait earlyprintk=ttyO2,115200
arch_number: 1546
------------------------------------------------------------

The same kernel boots fine using u-boot. I'm using Barebox 2012.07.0 and
u-boot 2012.07-rc1.

Did I do something wrong? Or is that just a bug?



Regards,
Bernhard




From plagnioj at jcrosoft.com  Sun Jul 22 15:31:36 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 22 Jul 2012 21:31:36 +0200
Subject: [PATCH 1/1] compressed: rename barebox target to zbarebox and
 zbarebox.bin
Message-ID: <1342985496-18182-1-git-send-email-plagnioj@jcrosoft.com>

Keep the previous target untouched.
This will allow to do not brake the modules support.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
This patch apply over my previous patch series that add gzip support

Best Regards,
J.
 Makefile     |   49 ++++++++++++++++++++++++++-----------------------
 piggy.gzip.S |    2 +-
 piggy.lzo.S  |    2 +-
 3 files changed, 28 insertions(+), 25 deletions(-)

diff --git a/Makefile b/Makefile
index 1003786..16a81d3 100644
--- a/Makefile
+++ b/Makefile
@@ -300,6 +300,7 @@ CFLAGS          := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
 AFLAGS          := -D__ASSEMBLY__
 
 LDFLAGS_barebox	:= -Map barebox.map
+LDFLAGS_zbarebox	:= -Map zbarebox.map
 
 # Read KERNELRELEASE from include/config/kernel.release (if it exists)
 KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null)
@@ -441,7 +442,10 @@ endif # $(dot-config)
 # command line.
 # This allow a user to issue only 'make' to build a kernel
 # Defaults barebox but it is usually overridden in the arch makefile
-all: barebox.bin
+
+zbarebox.bin-$(CONFIG_IMAGE_COMPRESSION) := zbarebox.bin
+
+all: barebox.bin $(zbarebox.bin-y)
 
 include $(srctree)/arch/$(ARCH)/Makefile
 
@@ -672,11 +676,13 @@ quiet_cmd_objcopy = OBJCOPY $@
       cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
 
 OBJCOPYFLAGS_barebox.bin = -O binary
-OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
+OBJCOPYFLAGS_zbarebox.bin = -O binary
 
 barebox.bin: barebox FORCE
 	$(call if_changed,objcopy)
+ifndef CONFIG_IMAGE_COMPRESSION
 	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+endif
 
 ifdef CONFIG_X86
 barebox.S: barebox
@@ -706,46 +712,43 @@ quiet_cmd_disasm = DISASM  $@
 
 barebox.S: barebox FORCE
 	$(call if_changed,disasm)
-barebox-uncompressed.S: barebox-uncompressed FORCE
+zbarebox.S: zbarebox FORCE
 	$(call if_changed,disasm)
 endif
 
 # barebox image
-barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
+barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
 	$(call if_changed_rule,barebox__)
 	$(Q)rm -f .old_version
 
-barebox-uncompressed.bin: barebox-uncompressed
-	$(call if_changed,objcopy)
-
 suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
 suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
 
-barebox-uncompressed.bin.gzip: barebox-uncompressed.bin
+barebox.bin.gzip: barebox.bin
 	@echo "  GZIP   " $@
-	$(Q)gzip -n -9 -c barebox-uncompressed.bin > $@
+	$(Q)gzip -n -9 -c barebox.bin > $@
 
-barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
+barebox.bin.lzo: barebox.bin
 	@echo "  LZO    " $@
-	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
+	$(Q)lzop -f -9 -o $@ barebox.bin
 
-piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
+piggy.$(suffix_y).o:  barebox.bin.$(suffix_y) FORCE
 	@echo "  CC     " $@
 	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
 
-ifdef CONFIG_IMAGE_COMPRESSION
-barebox: piggy.$(suffix_y).o $(barebox-comp)
+zbarebox: piggy.$(suffix_y).o $(barebox-comp) FORCE
 	@echo "  LD     " $@ $(barebox-comp)
-	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
+	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
 		-T $(barebox-compressed-lds) \
 		--start-group $(barebox-comp) $(comp-arch-y) piggy.$(suffix_y).o --end-group
-else
-barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
-	$(call barebox-modpost)
-	$(call if_changed_rule,barebox__)
-	$(Q)rm -f .old_version
-endif
+
+zbarebox.bin: zbarebox 
+	$(call if_changed,objcopy)
+	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+
+zbarebox.srec: zbarebox
+	$(OBJCOPY) -O srec $< $@
 
 barebox.srec: barebox
 	$(OBJCOPY) -O srec $< $@
@@ -1040,11 +1043,11 @@ endif # CONFIG_MODULES
 # Directories & files removed with 'make clean'
 CLEAN_DIRS  += $(MODVERDIR)
 CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
-                .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
+                .tmp_version .tmp_barebox* barebox.* \
 		.tmp_kallsyms* barebox_default_env* barebox.ldr \
 		scripts/bareboxenv-target \
 		Doxyfile.version barebox.srec barebox.s5p \
-		barebox-uncompressed barebox-uncompressed.bin*
+		zbarebox*
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include2 usr/include
diff --git a/piggy.gzip.S b/piggy.gzip.S
index 2ca7d78..ffd85cb 100644
--- a/piggy.gzip.S
+++ b/piggy.gzip.S
@@ -1,6 +1,6 @@
 	.section .piggydata,#alloc
 	.globl  input_data
 input_data:
-	.incbin "barebox-uncompressed.bin.gzip"
+	.incbin "barebox.bin.gzip"
 	.globl  input_data_end
 input_data_end:
diff --git a/piggy.lzo.S b/piggy.lzo.S
index 6cc618d..ae5b2db 100644
--- a/piggy.lzo.S
+++ b/piggy.lzo.S
@@ -1,6 +1,6 @@
 	.section .piggydata,#alloc
 	.globl  input_data
 input_data:
-	.incbin "barebox-uncompressed.bin.lzo"
+	.incbin "barebox.bin.lzo"
 	.globl  input_data_end
 input_data_end:
-- 
1.7.10



From stutzsven at web.de  Sun Jul 22 17:10:54 2012
From: stutzsven at web.de (Stutz Sven)
Date: Sun, 22 Jul 2012 23:10:54 +0200
Subject: AT91SAM9263-ek - Kernel panic
In-Reply-To: <500C4933.8050202@web.de>
References: <500C4933.8050202@web.de>
Message-ID: <500C6C5E.2020604@web.de>

Hello to everybody,

previously I have had some doubts to run a Linux kernel on this evalboard.
Especially to find a BSP for my board ....

In the meantime I have had some problems which I was able to solve by 
myself or reading through different forums.

I still have some problems with Barebox and it's ECC for the NAND-Flash 
and also the asterix * in this nand -a /dev/nand0.* is not working. (It 
is working when I am doing it manually).

But in total I am able to load and start Barebox and then again loading 
and starting the kernel.

First I have seen nothing until I switch on the special function 
earlyprintk=serial,ttyS0,115200n8
After that I saw that I have mounting/partitioning problem, so I changed 
the board specific init.c
in that way that the first three partitions match exactly to the 
definition in the configuration file for the init script of Barebox.

     init.c > devfs_add_partition("nand0", 0x00000, SZ_128K, 
DEVFS_PARTITION_FIXED,"at91bootstrap_raw");
                 dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap");
                 devfs_add_partition("nand0", SZ_128K, SZ_256K, 
DEVFS_PARTITION_FIXED, "self_raw");
                 dev_add_bb_dev("self_raw", "self0");
                 devfs_add_partition("nand0", SZ_256K + SZ_128K, 
SZ_128K, DEVFS_PARTITION_FIXED, "env_raw");
                 dev_add_bb_dev("env_raw", "env0");

     env/config > 
nand_parts="128k(at91bootstrap),256k(barebox),128k(bareboxenv),4M(kernel),80M(rootfs),-(data)"
                 rootfs_mtdblock_nand=4
                 rootfs_mtdblock_type=jffs2

After that I was really happy that the kernel is prompting "VFS: Mounted 
root (jffs2 filesystem)"
But the next kernel panic is near
It cannot find a init script.
I tried init=/bin/init, init=/sbin/init init=linuxrc everything with out 
success each time the same failure occur. I also tried to execute a 
simple command like init=/bin/ls ...

But I see in sysroot-target a softlink linuxrc -> /bin/busybox and also
in the root-folder root/sbin/ init-> ../bin/busybox
Waht is the difference of those directories? (I thought the root folder 
is the result for the target, so everything in there will be contained 
in the root.jffs2)

I have also changed in busybox between soft and hard links ...
How can I solve this problem?
Has anyone a hint for me, pls?

If it  is helpfull here the last kernel outputs >

>    Image Name:   Linux-3.4.0
>    Created:      2012-07-20  11:10:09 UTC
>    OS:           Linux
>    Architecture: ARM
>    Type:         Kernel Image
>    Compression:  uncompressed
>    Data Size:    1720712 Bytes =  1.6 MB
>    Load Address: 20008000
>    Entry Point:  20008000
>
> commandline: console=ttyS0,115200n8 mem=64M 
> earlyprintk=serial,ttyS0,115200n8 init=/sbin/init root=/dev/mtdblock4 
> rw rootfstype=jffs2 noinitrd 
> mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox),128k(bareboxenv),4M(kernel),80M(rootfs),-(data)
> arch_number: 1202
> Uncompressing Linux... done, booting the kernel.
> [    0.000000] Booting Linux on physical CPU 0
> [    0.000000] Linux version 3.4.0 (user at ubuntu) (gcc version 4.5.2 
> (OSELAS.Toolchain-2011.03.1) ) #30 Fri Jul 20 13:09:33 CEST 2012
> [    0.000000] bootconsole [earlycon0] enabled
> [    0.000000] AT91: Detected soc type: at91sam9263
> [    0.000000] AT91: Detected soc subtype: Unknown
> [    0.000000] AT91: sram at 0x300000 of 0x14000 mapped at 0xfef64000
> [    0.000000] AT91: sram at 0x500000 of 0x4000 mapped at 0xfef60000
> [    0.000000] gpiochip_add: registered GPIOs 0 to 31 on device: pioA
> [    0.000000] gpiochip_add: registered GPIOs 32 to 63 on device: pioB
> [    0.000000] gpiochip_add: registered GPIOs 64 to 95 on device: pioC
> [    0.000000] gpiochip_add: registered GPIOs 96 to 127 on device: pioD
> [    0.000000] gpiochip_add: registered GPIOs 128 to 159 on device: pioE
> [    0.000000] Kernel command line: console=ttyS0,115200n8 mem=64M 
> earlyprintk=serial,ttyS0,115200n8 init=/sbin/init root=/dev/mtdblock4 
> rw rootfstype=jffs2 noinitrd 
> mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox),128k(bareboxenv),4M(kernel),80M(rootfs),-(data)
> [    0.000000] PID hash table entries: 256 (order: -2, 1024 bytes)
> [    0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 
> bytes)
> [    0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 
> bytes)
> [    0.000000] Memory: 64MB = 64MB total
> [    0.000000] Memory: 61072k/61072k available, 4464k reserved, 0K highmem
> [    0.000000] Virtual kernel memory layout:
> [    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
> [    0.000000]     fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
> [    0.000000]     vmalloc : 0xc4800000 - 0xff000000   ( 936 MB)
> [    0.000000]     lowmem  : 0xc0000000 - 0xc4000000   (  64 MB)
> [    0.000000]     modules : 0xbf000000 - 0xc0000000   (  16 MB)
> [    0.000000]       .text : 0xc0008000 - 0xc0324000   (3184 kB)
> [    0.000000]       .init : 0xc0324000 - 0xc0349000   ( 148 kB)
> [    0.000000]       .data : 0xc034a000 - 0xc03767a8   ( 178 kB)
> [    0.000000]        .bss : 0xc03767cc - 0xc03c313c   ( 307 kB)
> [    0.000000] SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, 
> CPUs=1, Nodes=1
> [    0.000000] NR_IRQS:192
> [    0.000000] AT91: 160 gpio irqs in 5 banks
> [    0.000000] sched_clock: 32 bits at 100 Hz, resolution 10000000ns, 
> wraps every 4294967286ms
> [    0.000000] Calibrating delay loop... 99.22 BogoMIPS (lpj=496128)
> [    0.100000] pid_max: default: 32768 minimum: 301
> [    0.100000] Mount-cache hash table entries: 512
> [    0.110000] CPU: Testing write buffer coherency: ok
> [    0.120000] ftrace: allocating 10076 entries in 30 pages
> [    0.230000] Setting up static identity map for 0x2025add0 - 0x2025ae0c
> [    0.240000] devtmpfs: initialized
> [    0.260000] NET: Registered protocol family 16
> [    0.270000] AT91: Power Management
> [    0.270000] AT91: Starting after user reset
> [    0.290000] bio: create slab <bio-0> at 0
> [    0.290000] Switching to clocksource pit
> [    0.330000] NET: Registered protocol family 2
> [    0.340000] IP route cache hash table entries: 1024 (order: 0, 4096 
> bytes)
> [    0.350000] TCP established hash table entries: 2048 (order: 2, 
> 16384 bytes)
> [    0.350000] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
> [    0.360000] TCP: Hash tables configured (established 2048 bind 2048)
> [    0.370000] TCP: reno registered
> [    0.370000] UDP hash table entries: 256 (order: 0, 4096 bytes)
> [    0.380000] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
> [    0.390000] NET: Registered protocol family 1
> [    0.390000] NetWinder Floating Point Emulator V0.97 (double precision)
> [    0.440000] VFS: Disk quotas dquot_6.5.2
> [    0.440000] jffs2: version 2.2. (NAND) ? 2001-2006 Red Hat, Inc.
> [    0.450000] msgmni has been set to 119
> [    0.460000] Block layer SCSI generic (bsg) driver version 0.4 
> loaded (major 254)
> [    0.470000] io scheduler noop registered
> [    0.470000] io scheduler deadline registered
> [    0.480000] io scheduler cfq registered (default)
> [    0.490000] atmel_usart.0: ttyS0 at MMIO 0xffffee00 (irq = 1) is a 
> ATMEL_SERIAL
> [    0.500000] console [ttyS0] enabled, bootconsole disabled
> [    0.500000] console [ttyS0] enabled, bootconsole disabled
> [    0.510000] atmel_usart.1: ttyS1 at MMIO 0xfff8c000 (irq = 7) is a 
> ATMEL_SERIAL
> [    0.540000] atmel_nand: Use On Flash BBT
> [    0.550000] atmel_nand atmel_nand: No DMA support for NAND access.
> [    0.550000] NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda 
> (Micron NAND 256MiB 3,3V 8-bit)
> [    0.560000] Bad block table found at page 131008, version 0x01
> [    0.570000] Bad block table found at page 130944, version 0x01
> [    0.580000] 6 cmdlinepart partitions found on MTD device atmel_nand
> [    0.580000] Creating 6 MTD partitions on "atmel_nand":
> [    0.590000] 0x000000000000-0x000000020000 : "at91bootstrap"
> [    0.600000] 0x000000020000-0x000000060000 : "barebox"
> [    0.610000] 0x000000060000-0x000000080000 : "bareboxenv"
> [    0.620000] 0x000000080000-0x000000480000 : "kernel"
> [    0.630000] 0x000000480000-0x000005480000 : "rootfs"
> [    0.640000] 0x000005480000-0x000010000000 : "data"
> [    0.650000] GPIO NAND driver, ? 2004 Simtec Electronics
> [    0.660000] TCP: cubic registered
> [    0.660000] NET: Registered protocol family 17
> [    0.670000] Registering the dns_resolver key type
> [    9.860000] VFS: Mounted root (jffs2 filesystem) on device 31:4.
> [    9.870000] devtmpfs: mounted
> [    9.870000] Freeing init memory: 148K
> [   11.830000] Failed to execute /sbin/init.  Attempting defaults...
> [   11.860000] Kernel panic - not syncing: No init found.  Try passing 
> init= option to kernel. See Linux Documentation/init.txt for guidance.
> [   11.870000] Backtrace:
> [   11.870000] [<c00120f4>] (dump_backtrace+0x0/0x118) from 
> [<c02587e0>] (dump_stack+0x20/0x24)
> [   11.880000]  r6:c033a44c r5:c033a46c r4:c03767e0
> [   11.890000] [<c02587c0>] (dump_stack+0x0/0x24) from [<c0258864>] 
> (panic+0x80/0x1c8)
> [   11.890000] [<c02587e4>] (panic+0x0/0x1c8) from [<c0008850>] 
> (init_post+0xb0/0xd4)
> [   11.900000]  r3:00000001 r2:c04460a8 r1:c04342e0 r0:c02dad7e
> [   11.910000]  r7:c03767e0
> [   11.910000] [<c00087a0>] (init_post+0x0/0xd4) from [<c0324924>] 
> (kernel_init+0x164/0x1a4)
> [   11.920000]  r4:c03767e0
> [   11.920000] [<c03247c0>] (kernel_init+0x0/0x1a4) from [<c00209f8>] 
> (do_exit+0x0/0x334)


best regards
Sven


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From plagnioj at jcrosoft.com  Mon Jul 23 00:20:52 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:20:52 +0200
Subject: [PATCH 0/7 V2] compressed image update
Message-ID: <20120723042052.GK22657@game.jcrosoft.org>

Hi,

v2:
	fix modules support
	move compressed barebox to arch/<arch?compressed
	rename target to zbarebox*

The following changes since commit 63ac9c743b1304b0b4b792643e4704394f6f8aeb:

  only compress default env in uncompressed images (2012-07-20 14:20:15 +0200)

are available in the git repository at:

  git://git.jcrosoft.org/barebox.git tags/compressed-gzip2

for you to fetch changes up to 225bc30b768479030889a0995acc446ddcfd949d:

  compressed image: add gzip support (2012-07-23 12:13:38 +0800)

----------------------------------------------------------------
compressed: gzip support and cleanup

The follwing patch series add the support of GZIP

And allow now to link only what is need in the decompressor

This is needed if you want to compile a barebox with modules support

as we current rely on gcc and it's garbage colector to clean the non
needed object.

With modules support gcc will not do this.

This will allow to have a version of barebox shrink to the first
128KiB so it can fit in the first page of nand which is garanty
badblock free and then if we need more feature we will use modules
store in an other partitions.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (7):
      stddev: make it selectable via Kconfig
      decompress_unlzo: define decompress_unlzo as decompress
      compressed image: factorise compressor type
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed: rename barebox target to zbarebox and zbarebox.bin
      compressed image: add gzip support

 Makefile                                        |   35 +++-----------------------
 arch/arm/Makefile                               |    9 ++++++-
 arch/arm/compressed/Makefile                    |   70 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/compressed/barebox.lds.S               |   70 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 piggy.lzo.S => arch/arm/compressed/piggy.gzip.S |    2 +-
 arch/arm/compressed/piggy.lzo.S                 |    6 +++++
 arch/arm/cpu/start.c                            |   61 +++++++++++++++++++++++++++++++---------------
 arch/arm/lib/Makefile                           |    2 +-
 arch/arm/lib/barebox.lds.S                      |    2 +-
 commands/Makefile                               |    2 +-
 common/Kconfig                                  |   25 ++++++++++++++++---
 compressed/misc.c                               |   14 +++++++++++
 compressed/string.c                             |  127 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/linux/decompress/mm.h                   |   68 +++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c                        |    1 +
 lib/decompress_unlzo.c                          |    1 +
 16 files changed, 437 insertions(+), 58 deletions(-)
 create mode 100644 arch/arm/compressed/Makefile
 create mode 100644 arch/arm/compressed/barebox.lds.S
 rename piggy.lzo.S => arch/arm/compressed/piggy.gzip.S (70%)
 create mode 100644 arch/arm/compressed/piggy.lzo.S
 create mode 100644 compressed/misc.c
 create mode 100644 compressed/string.c
 create mode 100644 include/linux/decompress/mm.h

Best Regards,
J.


From plagnioj at jcrosoft.com  Mon Jul 23 00:26:01 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:26:01 +0200
Subject: [PATCH 5/7] ARM: add early malloc support needed by the decompressor
In-Reply-To: <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343017563-27932-5-git-send-email-plagnioj@jcrosoft.com>

This is not needed by lzo but by gunzip, xz and others.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/cpu/start.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 18c5c83..8ab6fdc 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,6 +28,9 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+unsigned long free_mem_ptr;
+unsigned long free_mem_end_ptr;
+
 #ifdef CONFIG_IMAGE_COMPRESSION
 void __naked __section(.text_head_entry) compressed_start(void)
 {
@@ -158,6 +161,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
 
+	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
+	free_mem_ptr = STACK_BASE - 0x20000 - 16;
+	free_mem_end_ptr = STACK_BASE - 16;
+
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-- 
1.7.10



From plagnioj at jcrosoft.com  Mon Jul 23 00:25:57 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:25:57 +0200
Subject: [PATCH 1/7] stddev: make it selectable via Kconfig
In-Reply-To: <20120723042052.GK22657@game.jcrosoft.org>
References: <20120723042052.GK22657@game.jcrosoft.org>
Message-ID: <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>

enable is by default for simple and hush
we do not need to NO_SHELL

this allow to save 1KiB

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 commands/Makefile |    2 +-
 common/Kconfig    |    5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/commands/Makefile b/commands/Makefile
index 54191b4..e9157bf 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -1,4 +1,4 @@
-obj-y				+= stddev.o
+obj-$(CONFIG_STDDEV)		+= stddev.o
 obj-$(CONFIG_CMD_BOOTM)		+= bootm.o
 obj-$(CONFIG_CMD_UIMAGE)	+= uimage.o
 obj-$(CONFIG_CMD_LINUX16)	+= linux16.o
diff --git a/common/Kconfig b/common/Kconfig
index 1c996aa..c6f1afa 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -50,6 +50,9 @@ config BINFMT
 config GLOBALVAR
 	bool
 
+config STDDEV
+	bool
+
 menu "General Settings              "
 
 config LOCALVERSION
@@ -295,6 +298,7 @@ choice
 		select COMMAND_SUPPORT
 		select PARAMETER
 		select BINFMT
+		select STDDEV
 		help
 		  Enable hush support. This is the most advanced shell available
 		  for barebox.
@@ -304,6 +308,7 @@ choice
 		select ENVIRONMENT_VARIABLES
 		select COMMAND_SUPPORT
 		select PARAMETER
+		select STDDEV
 		help
 		  simple shell. No if/then, no return values from commands, no loops
 
-- 
1.7.10



From plagnioj at jcrosoft.com  Mon Jul 23 00:26:00 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:26:00 +0200
Subject: [PATCH 4/7] decompressor: import malloc/free implementation for linux
 3.4
In-Reply-To: <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343017563-27932-4-git-send-email-plagnioj@jcrosoft.com>

This is need for gunzip support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 include/linux/decompress/mm.h |   68 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 include/linux/decompress/mm.h

diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
new file mode 100644
index 0000000..0c35411
--- /dev/null
+++ b/include/linux/decompress/mm.h
@@ -0,0 +1,68 @@
+/*
+ * linux/compr_mm.h
+ *
+ * Memory management for pre-boot and ramdisk uncompressors
+ *
+ * Authors: Alain Knaff <alain at knaff.lu>
+ *
+ */
+
+#ifndef DECOMPR_MM_H
+#define DECOMPR_MM_H
+
+#ifdef STATIC
+
+/* Code active when included from pre-boot environment: */
+
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitrarily relocated (via
+ * GOT references).  This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
+/* A trivial malloc implementation, adapted from
+ *  malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ */
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
+
+static void *malloc(int size)
+{
+	void *p;
+
+	if (size < 0)
+		return NULL;
+	if (!malloc_ptr)
+		malloc_ptr = free_mem_ptr;
+
+	malloc_ptr = (malloc_ptr + 3) & ~3;     /* Align */
+
+	p = (void *)malloc_ptr;
+	malloc_ptr += size;
+
+	if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr)
+		return NULL;
+
+	malloc_count++;
+	return p;
+}
+
+static void free(void *where)
+{
+	malloc_count--;
+	if (!malloc_count)
+		malloc_ptr = free_mem_ptr;
+}
+
+#define large_malloc(a) malloc(a)
+#define large_free(a) free(a)
+
+#define INIT
+
+#endif /* STATIC */
+
+#endif /* DECOMPR_MM_H */
-- 
1.7.10



From plagnioj at jcrosoft.com  Mon Jul 23 00:25:58 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:25:58 +0200
Subject: [PATCH 2/7] decompress_unlzo: define decompress_unlzo as decompress
In-Reply-To: <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343017563-27932-2-git-send-email-plagnioj@jcrosoft.com>

so we can use decompress in the decompressor
this will simplify multi decompress support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 lib/decompress_unlzo.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
index 0e6a7ad..56abfc6 100644
--- a/lib/decompress_unlzo.c
+++ b/lib/decompress_unlzo.c
@@ -289,3 +289,4 @@ exit_1:
 exit:
 	return ret;
 }
+#define decompress decompress_unlzo
-- 
1.7.10



From plagnioj at jcrosoft.com  Mon Jul 23 00:26:02 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:26:02 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>

Today we link to whole barebox and rely on gcc to cleanup via it's garbage
collector.
Now we specify only what is needed and introduce a new directory with source
only related to the compressed target.

Build it in arch/<arm>/compressed
Rebuild all the needed object.

Keep the previous target untouched.
This fix the modules support and allow custom flags for each file.

Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                          |   37 ++---------
 arch/arm/Makefile                 |    9 ++-
 arch/arm/compressed/Makefile      |   69 ++++++++++++++++++++
 arch/arm/compressed/barebox.lds.S |   70 ++++++++++++++++++++
 arch/arm/compressed/piggy.lzo.S   |    6 ++
 arch/arm/cpu/start.c              |   41 +++++++-----
 compressed/misc.c                 |   14 ++++
 compressed/string.c               |  127 +++++++++++++++++++++++++++++++++++++
 piggy.lzo.S                       |    6 --
 9 files changed, 323 insertions(+), 56 deletions(-)
 create mode 100644 arch/arm/compressed/Makefile
 create mode 100644 arch/arm/compressed/barebox.lds.S
 create mode 100644 arch/arm/compressed/piggy.lzo.S
 create mode 100644 compressed/misc.c
 create mode 100644 compressed/string.c
 delete mode 100644 piggy.lzo.S

diff --git a/Makefile b/Makefile
index 0b3da03..46c9491 100644
--- a/Makefile
+++ b/Makefile
@@ -512,7 +512,6 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 barebox-common := $(common-y)
 barebox-all    := $(barebox-common)
 barebox-lds    := $(lds-y)
-barebox-compressed-lds    := $(lds-compressed-y)
 
 # Rule to link barebox
 # May be overridden by arch/$(ARCH)/Makefile
@@ -668,11 +667,12 @@ quiet_cmd_objcopy = OBJCOPY $@
       cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
 
 OBJCOPYFLAGS_barebox.bin = -O binary
-OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
 
 barebox.bin: barebox FORCE
 	$(call if_changed,objcopy)
+ifndef CONFIG_IMAGE_COMPRESSION
 	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+endif
 
 ifdef CONFIG_X86
 barebox.S: barebox
@@ -702,41 +702,13 @@ quiet_cmd_disasm = DISASM  $@
 
 barebox.S: barebox FORCE
 	$(call if_changed,disasm)
-barebox-uncompressed.S: barebox-uncompressed FORCE
-	$(call if_changed,disasm)
 endif
 
 # barebox image
-barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
-	$(call barebox-modpost)
-	$(call if_changed_rule,barebox__)
-	$(Q)rm -f .old_version
-
-barebox-uncompressed.bin: barebox-uncompressed
-	$(call if_changed,objcopy)
-
-suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
-
-barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
-	@echo "  LZO    " $@
-	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
-
-piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
-	@echo "  CC     " $@
-	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
-
-ifdef CONFIG_IMAGE_COMPRESSION
-barebox: piggy.$(suffix_y).o
-	@echo "  LD     " $@
-	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
-		-T $(barebox-compressed-lds) \
-		--start-group $(barebox-common) piggy.$(suffix_y).o --end-group
-else
 barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
 	$(call if_changed_rule,barebox__)
 	$(Q)rm -f .old_version
-endif
 
 barebox.srec: barebox
 	$(OBJCOPY) -O srec $< $@
@@ -1031,11 +1003,10 @@ endif # CONFIG_MODULES
 # Directories & files removed with 'make clean'
 CLEAN_DIRS  += $(MODVERDIR)
 CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
-                .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
+                .tmp_version .tmp_barebox* barebox.* \
 		.tmp_kallsyms* barebox_default_env* barebox.ldr \
 		scripts/bareboxenv-target \
-		Doxyfile.version barebox.srec barebox.s5p \
-		barebox-uncompressed barebox-uncompressed.bin barebox-uncompressed.bin.lzo
+		Doxyfile.version barebox.srec barebox.s5p
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include2 usr/include
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a93c4d5..647c536 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,6 +184,14 @@ ifeq ($(CONFIG_OMAP_BUILD_IFT),y)
 KBUILD_IMAGE := MLO
 endif
 
+ifdef CONFIG_IMAGE_COMPRESSION
+KBUILD_IMAGE := zbarebox.bin
+endif
+
+comp := arch/arm/compressed
+zbarebox.S zbarebox.bin zbarebox: barebox.bin
+	$(Q)$(MAKE) $(build)=$(comp) $(comp)/$@
+
 all: $(KBUILD_IMAGE)
 
 archprepare: maketools
@@ -208,6 +216,5 @@ common-y += $(BOARD) $(MACH)
 common-y += arch/arm/lib/ arch/arm/cpu/
 
 lds-y	:= arch/arm/lib/barebox.lds
-lds-compressed-y := arch/arm/lib/barebox-compressed.lds
 
 CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds
diff --git a/arch/arm/compressed/Makefile b/arch/arm/compressed/Makefile
new file mode 100644
index 0000000..627a411
--- /dev/null
+++ b/arch/arm/compressed/Makefile
@@ -0,0 +1,69 @@
+
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
+
+OBJCOPYFLAGS_zbarebox.bin = -O binary
+
+targets := zbarebox zbarebox.bin zbarebox.S \
+	   piggy.$(suffix_y) piggy.$(suffix_y).o \
+	   lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
+	   misc.o string.o start.o
+
+# Make sure files are removed during clean
+extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
+		 lib1funcs.S ashldi3.S start.c string.c misc.c
+
+$(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
+	$(call if_changed,objcopy)
+	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+	@echo '  Barebox: $@ is ready'
+
+$(obj)/zbarebox.S: $(obj)/zbarebox FORCE
+	$(call if_changed,disasm)
+
+# For __aeabi_uidivmod
+lib1funcs = $(obj)/lib1funcs.o
+
+$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S
+	$(call cmd,shipped)
+
+CFLAGS_start.o = -D CONFIG_COMPRESSOR
+start= $(obj)/start.o
+$(obj)/start.c: $(srctree)/arch/$(SRCARCH)/cpu/start.c
+	$(call cmd,shipped)
+
+string= $(obj)/string.o
+$(obj)/string.c: $(srctree)/compressed/string.c
+	$(call cmd,shipped)
+
+misc= $(obj)/misc.o
+$(obj)/misc.c: $(srctree)/compressed/misc.c
+	$(call cmd,shipped)
+
+# For __aeabi_llsl
+ashldi3 = $(obj)/ashldi3.o
+
+$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
+	$(call cmd,shipped)
+
+# For __div0
+div0 = $(obj)/div0.o
+
+$(obj)/div0.c: $(srctree)/arch/$(SRCARCH)/lib/div0.c
+	$(call cmd,shipped)
+
+LDFLAGS_zbarebox	:= -Map zbarebox.map
+comp := $(obj)/piggy.$(suffix_y).o \
+	$(lib1funcs) $(ashldi3) $(start) $(string) $(misc) $(div0)
+
+$(obj)/zbarebox: $(obj)/barebox.lds $(comp) FORCE
+	@echo "  LD     " $@
+	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
+		-T $(obj)/barebox.lds \
+		--start-group $(comp) --end-group
+
+$(obj)/piggy.$(suffix_y): $(obj)/../../../barebox.bin FORCE
+	$(call if_changed,$(suffix_y))
+
+$(obj)/piggy.$(suffix_y).o:  $(obj)/piggy.$(suffix_y) FORCE
+
+$(obj)/barebox.lds: $(obj)/barebox.lds.S
diff --git a/arch/arm/compressed/barebox.lds.S b/arch/arm/compressed/barebox.lds.S
new file mode 100644
index 0000000..809e567
--- /dev/null
+++ b/arch/arm/compressed/barebox.lds.S
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2012 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <asm-generic/barebox.lds.h>
+#include <asm-generic/memory_layout.h>
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(compressed_start)
+SECTIONS
+{
+	. = HEAD_TEXT_BASE;
+
+	PRE_IMAGE
+
+	. = ALIGN(4);
+	.text      :
+	{
+		_stext = .;
+		_text = .;
+		*(.text_head_entry*)
+		__ll_return = .;
+		*(.text_ll_return*)
+		__bare_init_start = .;
+		*(.text_bare_init*)
+		__bare_init_end = .;
+		*(.text*)
+	}
+	BAREBOX_BARE_INIT_SIZE
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata*) }
+
+	_etext = .;			/* End of text and rodata section */
+
+	. = ALIGN(4);
+	.piggydata : {
+		*(.piggydata)
+	}
+
+	. = ALIGN(4);
+	.data : { *(.data*) }
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss*) }
+	__bss_stop = .;
+	_end = .;
+	_barebox_image_size = __bss_start - HEAD_TEXT_BASE;
+}
diff --git a/arch/arm/compressed/piggy.lzo.S b/arch/arm/compressed/piggy.lzo.S
new file mode 100644
index 0000000..0c0d216
--- /dev/null
+++ b/arch/arm/compressed/piggy.lzo.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl	input_data
+input_data:
+	.incbin	"arch/arm/compressed/piggy.lzo"
+	.globl	input_data_end
+input_data_end:
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 8ab6fdc..6c745f7 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -100,6 +100,7 @@ void __naked __bare_init reset(void)
 	board_init_lowlevel_return();
 }
 
+#ifdef CONFIG_COMPRESSOR
 extern void *input_data;
 extern void *input_data_end;
 
@@ -129,6 +130,29 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
 	barebox();
 }
 
+void barebox_decompress(uint32_t offset)
+{
+	uint32_t compressed_start, compressed_end, len;
+	void (*uncompress)(void *compressed_start, unsigned int len);
+
+	compressed_start = (uint32_t)&input_data - offset;
+	compressed_end = (uint32_t)&input_data_end - offset;
+	len = compressed_end - compressed_start;
+
+	uncompress = barebox_uncompress;
+
+	/* call barebox_uncompress with its absolute address */
+	__asm__ __volatile__(
+		"mov r0, %1\n"
+		"mov r1, %2\n"
+		"mov pc, %0\n"
+		:
+		: "r"(uncompress), "r"(compressed_start), "r"(len)
+		: "r0", "r1");
+}
+#else
+void barebox_decompress(uint32_t offset) {}
+#endif
 
 /*
  * Board code can jump here by either returning from board_init_lowlevel
@@ -137,8 +161,6 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
 void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 {
 	uint32_t r, addr, offset;
-	uint32_t compressed_start, compressed_end, len;
-	void (*uncompress)(void *compressed_start, unsigned int len);
 
 	/*
 	 * Get runtime address of this function. Do not
@@ -169,20 +191,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
 	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION)) {
-		compressed_start = (uint32_t)&input_data - offset;
-		compressed_end = (uint32_t)&input_data_end - offset;
-		len = compressed_end - compressed_start;
-
-		uncompress = barebox_uncompress;
-
-		/* call barebox_uncompress with its absolute address */
-		__asm__ __volatile__(
-			"mov r0, %1\n"
-			"mov r1, %2\n"
-			"mov pc, %0\n"
-			:
-			: "r"(uncompress), "r"(compressed_start), "r"(len)
-			: "r0", "r1");
+		barebox_decompress(offset);
 	} else {
 		/* call start_barebox with its absolute address */
 		r = (unsigned int)&start_barebox;
diff --git a/compressed/misc.c b/compressed/misc.c
new file mode 100644
index 0000000..47e9cea
--- /dev/null
+++ b/compressed/misc.c
@@ -0,0 +1,14 @@
+#include <common.h>
+#include <init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+void __noreturn panic(const char *fmt, ...)
+{
+	while(1);
+}
+
+void start_barebox(void)
+{
+}
diff --git a/compressed/string.c b/compressed/string.c
new file mode 100644
index 0000000..6787e82
--- /dev/null
+++ b/compressed/string.c
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/compressed/string.c
+ *
+ * Small subset of simple string routines
+ */
+
+#include <linux/types.h>
+
+void *memcpy(void *__dest, __const void *__src, size_t __n)
+{
+	int i = 0;
+	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
+
+	for (i = __n >> 3; i > 0; i--) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 2) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 1) {
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1)
+		*d++ = *s++;
+
+	return __dest;
+}
+
+void *memmove(void *__dest, __const void *__src, size_t count)
+{
+	unsigned char *d = __dest;
+	const unsigned char *s = __src;
+
+	if (__dest == __src)
+		return __dest;
+
+	if (__dest < __src)
+		return memcpy(__dest, __src, count);
+
+	while (count--)
+		d[count] = s[count];
+	return __dest;
+}
+
+size_t strlen(const char *s)
+{
+	const char *sc = s;
+
+	while (*sc != '\0')
+		sc++;
+	return sc - s;
+}
+
+int memcmp(const void *cs, const void *ct, size_t count)
+{
+	const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;
+	int res = 0;
+
+	while (su1 < end) {
+		res = *su1++ - *su2++;
+		if (res)
+			break;
+	}
+	return res;
+}
+
+int strcmp(const char *cs, const char *ct)
+{
+	unsigned char c1, c2;
+	int res = 0;
+
+	do {
+		c1 = *cs++;
+		c2 = *ct++;
+		res = c1 - c2;
+		if (res)
+			break;
+	} while (c1);
+	return res;
+}
+
+void *memchr(const void *s, int c, size_t count)
+{
+	const unsigned char *p = s;
+
+	while (count--)
+		if ((unsigned char)c == *p++)
+			return (void *)(p - 1);
+	return NULL;
+}
+
+char *strchr(const char *s, int c)
+{
+	while (*s != (char)c)
+		if (*s++ == '\0')
+			return NULL;
+	return (char *)s;
+}
+
+#undef memset
+
+void *memset(void *s, int c, size_t count)
+{
+	char *xs = s;
+	while (count--)
+		*xs++ = c;
+	return s;
+}
+
+void __memzero(void *s, size_t count)
+{
+	memset(s, 0, count);
+}
diff --git a/piggy.lzo.S b/piggy.lzo.S
deleted file mode 100644
index 6cc618d..0000000
--- a/piggy.lzo.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.section .piggydata,#alloc
-	.globl  input_data
-input_data:
-	.incbin "barebox-uncompressed.bin.lzo"
-	.globl  input_data_end
-input_data_end:
-- 
1.7.10



From plagnioj at jcrosoft.com  Mon Jul 23 00:25:59 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:25:59 +0200
Subject: [PATCH 3/7] compressed image: factorise compressor type
In-Reply-To: <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343017563-27932-3-git-send-email-plagnioj@jcrosoft.com>

This will simplify to support of multi compressor support such as gzip, lzma,
xz.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                   |   12 +++++++-----
 arch/arm/cpu/start.c       |    9 ++++++---
 arch/arm/lib/Makefile      |    2 +-
 arch/arm/lib/barebox.lds.S |    2 +-
 common/Kconfig             |   17 ++++++++++++++---
 5 files changed, 29 insertions(+), 13 deletions(-)

diff --git a/Makefile b/Makefile
index e0a3c07..0b3da03 100644
--- a/Makefile
+++ b/Makefile
@@ -715,20 +715,22 @@ barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsym
 barebox-uncompressed.bin: barebox-uncompressed
 	$(call if_changed,objcopy)
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
+
 barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
 	@echo "  LZO    " $@
 	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
 
-piggy.lzo.o: barebox-uncompressed.bin.lzo $(src)/piggy.lzo.S
+piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
 	@echo "  CC     " $@
-	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.lzo.S -o $@
+	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
 
-ifdef CONFIG_IMAGE_COMPRESSION_LZO
-barebox: piggy.lzo.o
+ifdef CONFIG_IMAGE_COMPRESSION
+barebox: piggy.$(suffix_y).o
 	@echo "  LD     " $@
 	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
 		-T $(barebox-compressed-lds) \
-		--start-group $(barebox-common) piggy.lzo.o --end-group
+		--start-group $(barebox-common) piggy.$(suffix_y).o --end-group
 else
 barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 6743804..18c5c83 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,7 +28,7 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
-#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+#ifdef CONFIG_IMAGE_COMPRESSION
 void __naked __section(.text_head_entry) compressed_start(void)
 {
 	barebox_arm_head();
@@ -101,7 +101,10 @@ extern void *input_data;
 extern void *input_data_end;
 
 #define STATIC static
+
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
 #include "../../../lib/decompress_unlzo.c"
+#endif
 
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
@@ -112,7 +115,7 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
 	else
 		barebox = (void *)TEXT_BASE;
 
-	decompress_unlzo((void *)compressed_start,
+	decompress((void *)compressed_start,
 			len,
 			NULL, NULL,
 			(void *)TEXT_BASE, NULL, NULL);
@@ -158,7 +161,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION_LZO)) {
+	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION)) {
 		compressed_start = (uint32_t)&input_data - offset;
 		compressed_end = (uint32_t)&input_data_end - offset;
 		len = compressed_end - compressed_start;
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 044d3e6..1b6f7f4 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -21,4 +21,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
 obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
 extra-y += barebox.lds
-extra-$(CONFIG_IMAGE_COMPRESSION_LZO) += barebox-compressed.lds
+extra-$(CONFIG_IMAGE_COMPRESSION) += barebox-compressed.lds
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index b415830..b22cf98 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -31,7 +31,7 @@ SECTIONS
 {
 	. = TEXT_BASE;
 
-#ifndef CONFIG_IMAGE_COMPRESSION_LZO
+#ifndef CONFIG_IMAGE_COMPRESSION
 	PRE_IMAGE
 #endif
 	. = ALIGN(4);
diff --git a/common/Kconfig b/common/Kconfig
index c6f1afa..8437e1c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -99,9 +99,20 @@ menu "memory layout                 "
 config HAVE_IMAGE_COMPRESSION
 	bool
 
+config IMAGE_COMPRESSION
+	bool "Compressed image"
+
+if IMAGE_COMPRESSION
+
+choice
+	prompt "Compression"
+
 config IMAGE_COMPRESSION_LZO
-	depends on HAVE_IMAGE_COMPRESSION
-	bool "lzo compressed image"
+	bool "lzo"
+
+endchoice
+
+endif
 
 config MMU
 	bool "Enable MMU"
@@ -185,7 +196,7 @@ config MALLOC_SIZE
 	prompt "malloc area size"
 
 config HEAD_TEXT_BASE
-	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION_LZO
+	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION
 	hex
 	prompt "HEAD_TEXT_BASE"
 endmenu
-- 
1.7.10



From plagnioj at jcrosoft.com  Mon Jul 23 00:26:03 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 06:26:03 +0200
Subject: [PATCH 7/7] compressed image: add gzip support
In-Reply-To: <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343017563-27932-7-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/compressed/Makefile     |    1 +
 arch/arm/compressed/piggy.gzip.S |    6 ++++++
 arch/arm/cpu/start.c             |    4 ++++
 common/Kconfig                   |    3 +++
 lib/decompress_inflate.c         |    1 +
 5 files changed, 15 insertions(+)
 create mode 100644 arch/arm/compressed/piggy.gzip.S

diff --git a/arch/arm/compressed/Makefile b/arch/arm/compressed/Makefile
index 627a411..59e7d59 100644
--- a/arch/arm/compressed/Makefile
+++ b/arch/arm/compressed/Makefile
@@ -1,4 +1,5 @@
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
 suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
 
 OBJCOPYFLAGS_zbarebox.bin = -O binary
diff --git a/arch/arm/compressed/piggy.gzip.S b/arch/arm/compressed/piggy.gzip.S
new file mode 100644
index 0000000..ef3dd77
--- /dev/null
+++ b/arch/arm/compressed/piggy.gzip.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl  input_data
+input_data:
+	.incbin "arch/arm/compressed/piggy.gzip"
+	.globl  input_data_end
+input_data_end:
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 6c745f7..5503552 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -110,6 +110,10 @@ extern void *input_data_end;
 #include "../../../lib/decompress_unlzo.c"
 #endif
 
+#ifdef CONFIG_IMAGE_COMPRESSION_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
 	void (*barebox)(void);
diff --git a/common/Kconfig b/common/Kconfig
index 8437e1c..702a0bd 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -110,6 +110,9 @@ choice
 config IMAGE_COMPRESSION_LZO
 	bool "lzo"
 
+config IMAGE_COMPRESSION_GZIP
+	bool "gzip"
+
 endchoice
 
 endif
diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c
index 526d6a1..5c1ebb6 100644
--- a/lib/decompress_inflate.c
+++ b/lib/decompress_inflate.c
@@ -4,6 +4,7 @@
 /* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
  * errors about console_printk etc... on ARM */
 #define _LINUX_KERNEL_H
+#include <linux/decompress/mm.h>
 
 #include "zlib_inflate/inftrees.c"
 #include "zlib_inflate/inffast.c"
-- 
1.7.10



From plagnioj at jcrosoft.com  Mon Jul 23 01:48:50 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 07:48:50 +0200
Subject: AT91SAM9263-ek - Kernel panic
In-Reply-To: <500C6C5E.2020604@web.de>
References: <500C4933.8050202@web.de>
 <500C6C5E.2020604@web.de>
Message-ID: <20120723054850.GL22657@game.jcrosoft.org>

On 23:10 Sun 22 Jul     , Stutz Sven wrote:
>    Hello to everybody,
> 
>    previously I have had some doubts to run a Linux kernel on this evalboard.
>    Especially to find a BSP for my board ....
> 
>    In the meantime I have had some problems which I was able to solve by
>    myself or reading through different forums.
the mainline kernel work perfectly on it
> 
>    I still have some problems with Barebox and it's ECC for the NAND-Flash
>    and also the asterix * in this nand -a /dev/nand0.* is not working. (It is
>    working when I am doing it manually).
> 
>    But in total I am able to load and start Barebox and then again loading
>    and starting the kernel.
> 
>    First I have seen nothing until I switch on the special function
>    earlyprintk=serial,ttyS0,115200n8
>    After that I saw that I have mounting/partitioning problem, so I changed
>    the board specific init.c
>    in that way that the first three partitions match exactly to the
>    definition in the configuration file for the init script of Barebox.
> 
>        init.c > devfs_add_partition("nand0", 0x00000, SZ_128K,
>    DEVFS_PARTITION_FIXED,"at91bootstrap_raw");
>                    dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap");
>                    devfs_add_partition("nand0", SZ_128K, SZ_256K,
>    DEVFS_PARTITION_FIXED, "self_raw");
>                    dev_add_bb_dev("self_raw", "self0");
>                    devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K,
>    DEVFS_PARTITION_FIXED, "env_raw");
>                    dev_add_bb_dev("env_raw", "env0");
> 
>        env/config >
>    nand_parts="128k(at91bootstrap),256k(barebox),128k(bareboxenv),4M(kernel),80M(rootfs),-(data)"
>                    rootfs_mtdblock_nand=4
>                    rootfs_mtdblock_type=jffs2
> 
>    After that I was really happy that the kernel is prompting "VFS: Mounted
>    root (jffs2 filesystem)"
>    But the next kernel panic is near
>    It cannot find a init script.
>    I tried init=/bin/init, init=/sbin/init init=linuxrc everything with out
>    success each time the same failure occur. I also tried to execute a simple
>    command like init=/bin/ls ...
> 
>    But I see in sysroot-target a softlink linuxrc -> /bin/busybox and also
>    in the root-folder root/sbin/ init-> ../bin/busybox
>    Waht is the difference of those directories? (I thought the root folder is
>    the result for the target, so everything in there will be contained in the
>    root.jffs2)
> 
>    I have also changed in busybox between soft and hard links ...
>    How can I solve this problem?
>    Has anyone a hint for me, pls?
it seems you use the wrong ABI to complie your rootfs

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 23 02:24:40 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 08:24:40 +0200
Subject: [PATCH 1/1] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <1342985496-18182-1-git-send-email-plagnioj@jcrosoft.com>
References: <1342985496-18182-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120723062440.GT30009@pengutronix.de>

Hi Jean-Christophe,

On Sun, Jul 22, 2012 at 09:31:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Keep the previous target untouched.
> This will allow to do not brake the modules support.

This breaks images which use barebox.bin as an input for their SoC
specific image, like MLO (Omap xload), barebox.netx, barebox.s5p

Sascha

> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
> This patch apply over my previous patch series that add gzip support
> 
> Best Regards,
> J.
>  Makefile     |   49 ++++++++++++++++++++++++++-----------------------
>  piggy.gzip.S |    2 +-
>  piggy.lzo.S  |    2 +-
>  3 files changed, 28 insertions(+), 25 deletions(-)
> 
> diff --git a/Makefile b/Makefile
> index 1003786..16a81d3 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -300,6 +300,7 @@ CFLAGS          := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
>  AFLAGS          := -D__ASSEMBLY__
>  
>  LDFLAGS_barebox	:= -Map barebox.map
> +LDFLAGS_zbarebox	:= -Map zbarebox.map
>  
>  # Read KERNELRELEASE from include/config/kernel.release (if it exists)
>  KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null)
> @@ -441,7 +442,10 @@ endif # $(dot-config)
>  # command line.
>  # This allow a user to issue only 'make' to build a kernel
>  # Defaults barebox but it is usually overridden in the arch makefile
> -all: barebox.bin
> +
> +zbarebox.bin-$(CONFIG_IMAGE_COMPRESSION) := zbarebox.bin
> +
> +all: barebox.bin $(zbarebox.bin-y)
>  
>  include $(srctree)/arch/$(ARCH)/Makefile
>  
> @@ -672,11 +676,13 @@ quiet_cmd_objcopy = OBJCOPY $@
>        cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
>  
>  OBJCOPYFLAGS_barebox.bin = -O binary
> -OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
> +OBJCOPYFLAGS_zbarebox.bin = -O binary
>  
>  barebox.bin: barebox FORCE
>  	$(call if_changed,objcopy)
> +ifndef CONFIG_IMAGE_COMPRESSION
>  	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
> +endif
>  
>  ifdef CONFIG_X86
>  barebox.S: barebox
> @@ -706,46 +712,43 @@ quiet_cmd_disasm = DISASM  $@
>  
>  barebox.S: barebox FORCE
>  	$(call if_changed,disasm)
> -barebox-uncompressed.S: barebox-uncompressed FORCE
> +zbarebox.S: zbarebox FORCE
>  	$(call if_changed,disasm)
>  endif
>  
>  # barebox image
> -barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
> +barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
>  	$(call barebox-modpost)
>  	$(call if_changed_rule,barebox__)
>  	$(Q)rm -f .old_version
>  
> -barebox-uncompressed.bin: barebox-uncompressed
> -	$(call if_changed,objcopy)
> -
>  suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
>  suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
>  
> -barebox-uncompressed.bin.gzip: barebox-uncompressed.bin
> +barebox.bin.gzip: barebox.bin
>  	@echo "  GZIP   " $@
> -	$(Q)gzip -n -9 -c barebox-uncompressed.bin > $@
> +	$(Q)gzip -n -9 -c barebox.bin > $@
>  
> -barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
> +barebox.bin.lzo: barebox.bin
>  	@echo "  LZO    " $@
> -	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
> +	$(Q)lzop -f -9 -o $@ barebox.bin
>  
> -piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
> +piggy.$(suffix_y).o:  barebox.bin.$(suffix_y) FORCE
>  	@echo "  CC     " $@
>  	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
>  
> -ifdef CONFIG_IMAGE_COMPRESSION
> -barebox: piggy.$(suffix_y).o $(barebox-comp)
> +zbarebox: piggy.$(suffix_y).o $(barebox-comp) FORCE
>  	@echo "  LD     " $@ $(barebox-comp)
> -	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
> +	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
>  		-T $(barebox-compressed-lds) \
>  		--start-group $(barebox-comp) $(comp-arch-y) piggy.$(suffix_y).o --end-group
> -else
> -barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
> -	$(call barebox-modpost)
> -	$(call if_changed_rule,barebox__)
> -	$(Q)rm -f .old_version
> -endif
> +
> +zbarebox.bin: zbarebox 
> +	$(call if_changed,objcopy)
> +	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
> +
> +zbarebox.srec: zbarebox
> +	$(OBJCOPY) -O srec $< $@
>  
>  barebox.srec: barebox
>  	$(OBJCOPY) -O srec $< $@
> @@ -1040,11 +1043,11 @@ endif # CONFIG_MODULES
>  # Directories & files removed with 'make clean'
>  CLEAN_DIRS  += $(MODVERDIR)
>  CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
> -                .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
> +                .tmp_version .tmp_barebox* barebox.* \
>  		.tmp_kallsyms* barebox_default_env* barebox.ldr \
>  		scripts/bareboxenv-target \
>  		Doxyfile.version barebox.srec barebox.s5p \
> -		barebox-uncompressed barebox-uncompressed.bin*
> +		zbarebox*
>  
>  # Directories & files removed with 'make mrproper'
>  MRPROPER_DIRS  += include/config include2 usr/include
> diff --git a/piggy.gzip.S b/piggy.gzip.S
> index 2ca7d78..ffd85cb 100644
> --- a/piggy.gzip.S
> +++ b/piggy.gzip.S
> @@ -1,6 +1,6 @@
>  	.section .piggydata,#alloc
>  	.globl  input_data
>  input_data:
> -	.incbin "barebox-uncompressed.bin.gzip"
> +	.incbin "barebox.bin.gzip"
>  	.globl  input_data_end
>  input_data_end:
> diff --git a/piggy.lzo.S b/piggy.lzo.S
> index 6cc618d..ae5b2db 100644
> --- a/piggy.lzo.S
> +++ b/piggy.lzo.S
> @@ -1,6 +1,6 @@
>  	.section .piggydata,#alloc
>  	.globl  input_data
>  input_data:
> -	.incbin "barebox-uncompressed.bin.lzo"
> +	.incbin "barebox.bin.lzo"
>  	.globl  input_data_end
>  input_data_end:
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 02:26:48 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 08:26:48 +0200
Subject: [PATCH 1/1] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723062440.GT30009@pengutronix.de>
References: <1342985496-18182-1-git-send-email-plagnioj@jcrosoft.com>
 <20120723062440.GT30009@pengutronix.de>
Message-ID: <20120723062648.GU30009@pengutronix.de>

On Mon, Jul 23, 2012 at 08:24:40AM +0200, Sascha Hauer wrote:
> Hi Jean-Christophe,
> 
> On Sun, Jul 22, 2012 at 09:31:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Keep the previous target untouched.
> > This will allow to do not brake the modules support.
> 
> This breaks images which use barebox.bin as an input for their SoC
> specific image, like MLO (Omap xload), barebox.netx, barebox.s5p

If you want to do this, you have to add a make variable for the target
which can be used for these SoC images.

Sascha

> 
> Sascha
> 
> > 
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > ---
> > This patch apply over my previous patch series that add gzip support
> > 
> > Best Regards,
> > J.
> >  Makefile     |   49 ++++++++++++++++++++++++++-----------------------
> >  piggy.gzip.S |    2 +-
> >  piggy.lzo.S  |    2 +-
> >  3 files changed, 28 insertions(+), 25 deletions(-)
> > 
> > diff --git a/Makefile b/Makefile
> > index 1003786..16a81d3 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -300,6 +300,7 @@ CFLAGS          := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
> >  AFLAGS          := -D__ASSEMBLY__
> >  
> >  LDFLAGS_barebox	:= -Map barebox.map
> > +LDFLAGS_zbarebox	:= -Map zbarebox.map
> >  
> >  # Read KERNELRELEASE from include/config/kernel.release (if it exists)
> >  KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null)
> > @@ -441,7 +442,10 @@ endif # $(dot-config)
> >  # command line.
> >  # This allow a user to issue only 'make' to build a kernel
> >  # Defaults barebox but it is usually overridden in the arch makefile
> > -all: barebox.bin
> > +
> > +zbarebox.bin-$(CONFIG_IMAGE_COMPRESSION) := zbarebox.bin
> > +
> > +all: barebox.bin $(zbarebox.bin-y)
> >  
> >  include $(srctree)/arch/$(ARCH)/Makefile
> >  
> > @@ -672,11 +676,13 @@ quiet_cmd_objcopy = OBJCOPY $@
> >        cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
> >  
> >  OBJCOPYFLAGS_barebox.bin = -O binary
> > -OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
> > +OBJCOPYFLAGS_zbarebox.bin = -O binary
> >  
> >  barebox.bin: barebox FORCE
> >  	$(call if_changed,objcopy)
> > +ifndef CONFIG_IMAGE_COMPRESSION
> >  	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
> > +endif
> >  
> >  ifdef CONFIG_X86
> >  barebox.S: barebox
> > @@ -706,46 +712,43 @@ quiet_cmd_disasm = DISASM  $@
> >  
> >  barebox.S: barebox FORCE
> >  	$(call if_changed,disasm)
> > -barebox-uncompressed.S: barebox-uncompressed FORCE
> > +zbarebox.S: zbarebox FORCE
> >  	$(call if_changed,disasm)
> >  endif
> >  
> >  # barebox image
> > -barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
> > +barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
> >  	$(call barebox-modpost)
> >  	$(call if_changed_rule,barebox__)
> >  	$(Q)rm -f .old_version
> >  
> > -barebox-uncompressed.bin: barebox-uncompressed
> > -	$(call if_changed,objcopy)
> > -
> >  suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
> >  suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
> >  
> > -barebox-uncompressed.bin.gzip: barebox-uncompressed.bin
> > +barebox.bin.gzip: barebox.bin
> >  	@echo "  GZIP   " $@
> > -	$(Q)gzip -n -9 -c barebox-uncompressed.bin > $@
> > +	$(Q)gzip -n -9 -c barebox.bin > $@
> >  
> > -barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
> > +barebox.bin.lzo: barebox.bin
> >  	@echo "  LZO    " $@
> > -	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
> > +	$(Q)lzop -f -9 -o $@ barebox.bin
> >  
> > -piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
> > +piggy.$(suffix_y).o:  barebox.bin.$(suffix_y) FORCE
> >  	@echo "  CC     " $@
> >  	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
> >  
> > -ifdef CONFIG_IMAGE_COMPRESSION
> > -barebox: piggy.$(suffix_y).o $(barebox-comp)
> > +zbarebox: piggy.$(suffix_y).o $(barebox-comp) FORCE
> >  	@echo "  LD     " $@ $(barebox-comp)
> > -	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
> > +	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
> >  		-T $(barebox-compressed-lds) \
> >  		--start-group $(barebox-comp) $(comp-arch-y) piggy.$(suffix_y).o --end-group
> > -else
> > -barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
> > -	$(call barebox-modpost)
> > -	$(call if_changed_rule,barebox__)
> > -	$(Q)rm -f .old_version
> > -endif
> > +
> > +zbarebox.bin: zbarebox 
> > +	$(call if_changed,objcopy)
> > +	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
> > +
> > +zbarebox.srec: zbarebox
> > +	$(OBJCOPY) -O srec $< $@
> >  
> >  barebox.srec: barebox
> >  	$(OBJCOPY) -O srec $< $@
> > @@ -1040,11 +1043,11 @@ endif # CONFIG_MODULES
> >  # Directories & files removed with 'make clean'
> >  CLEAN_DIRS  += $(MODVERDIR)
> >  CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
> > -                .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
> > +                .tmp_version .tmp_barebox* barebox.* \
> >  		.tmp_kallsyms* barebox_default_env* barebox.ldr \
> >  		scripts/bareboxenv-target \
> >  		Doxyfile.version barebox.srec barebox.s5p \
> > -		barebox-uncompressed barebox-uncompressed.bin*
> > +		zbarebox*
> >  
> >  # Directories & files removed with 'make mrproper'
> >  MRPROPER_DIRS  += include/config include2 usr/include
> > diff --git a/piggy.gzip.S b/piggy.gzip.S
> > index 2ca7d78..ffd85cb 100644
> > --- a/piggy.gzip.S
> > +++ b/piggy.gzip.S
> > @@ -1,6 +1,6 @@
> >  	.section .piggydata,#alloc
> >  	.globl  input_data
> >  input_data:
> > -	.incbin "barebox-uncompressed.bin.gzip"
> > +	.incbin "barebox.bin.gzip"
> >  	.globl  input_data_end
> >  input_data_end:
> > diff --git a/piggy.lzo.S b/piggy.lzo.S
> > index 6cc618d..ae5b2db 100644
> > --- a/piggy.lzo.S
> > +++ b/piggy.lzo.S
> > @@ -1,6 +1,6 @@
> >  	.section .piggydata,#alloc
> >  	.globl  input_data
> >  input_data:
> > -	.incbin "barebox-uncompressed.bin.lzo"
> > +	.incbin "barebox.bin.lzo"
> >  	.globl  input_data_end
> >  input_data_end:
> > -- 
> > 1.7.10
> > 
> > 
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> > 
> 
> -- 
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 23 02:28:58 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 08:28:58 +0200
Subject: [PATCH 1/1] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723062440.GT30009@pengutronix.de>
References: <1342985496-18182-1-git-send-email-plagnioj@jcrosoft.com>
 <20120723062440.GT30009@pengutronix.de>
Message-ID: <20120723062858.GM22657@game.jcrosoft.org>

On 08:24 Mon 23 Jul     , Sascha Hauer wrote:
> Hi Jean-Christophe,
> 
> On Sun, Jul 22, 2012 at 09:31:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Keep the previous target untouched.
> > This will allow to do not brake the modules support.
> 
> This breaks images which use barebox.bin as an input for their SoC
> specific image, like MLO (Omap xload), barebox.netx, barebox.s5p
but the compressed image break the modules support

so I send a new patch

now you can an the MLO and support to the zbarebox.bin

Best Regards,
J.


From plagnioj at jcrosoft.com  Mon Jul 23 02:30:36 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 08:30:36 +0200
Subject: [PATCH 1/1] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723062648.GU30009@pengutronix.de>
References: <1342985496-18182-1-git-send-email-plagnioj@jcrosoft.com>
 <20120723062440.GT30009@pengutronix.de>
 <20120723062648.GU30009@pengutronix.de>
Message-ID: <20120723063036.GN22657@game.jcrosoft.org>

On 08:26 Mon 23 Jul     , Sascha Hauer wrote:
> On Mon, Jul 23, 2012 at 08:24:40AM +0200, Sascha Hauer wrote:
> > Hi Jean-Christophe,
> > 
> > On Sun, Jul 22, 2012 at 09:31:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > Keep the previous target untouched.
> > > This will allow to do not brake the modules support.
> > 
> > This breaks images which use barebox.bin as an input for their SoC
> > specific image, like MLO (Omap xload), barebox.netx, barebox.s5p
> 
> If you want to do this, you have to add a make variable for the target
> which can be used for these SoC images.
so we can do this in arch/arm/compressed/Makefile

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 23 02:35:23 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 08:35:23 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120723063523.GV30009@pengutronix.de>

On Mon, Jul 23, 2012 at 06:26:02AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Today we link to whole barebox and rely on gcc to cleanup via it's garbage
> collector.
> Now we specify only what is needed and introduce a new directory with source
> only related to the compressed target.
> 
> Build it in arch/<arm>/compressed
> Rebuild all the needed object.
> 
> Keep the previous target untouched.
> This fix the modules support and allow custom flags for each file.
> 
> Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
> implement a dummy panic.

This does not work on all targets having a lowlevel init:

arch/arm/compressed/start.o: In function `reset':
start.c:(.text_bare_init.text+0x28): undefined reference to `board_init_lowlevel'

Why don't we simply do this:


diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 647c536..12869b3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -150,11 +150,9 @@ TEXT_BASE = $(CONFIG_TEXT_BASE)
 
 CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
 
-ifndef CONFIG_MODULES
 # Add cleanup flags
 CPPFLAGS += -fdata-sections -ffunction-sections
 LDFLAGS_barebox += -static --gc-sections
-endif
 
 barebox.netx: barebox.bin
 	$(Q)scripts/gen_netx_image -i barebox.bin -o barebox.netx		\

>  
> +void barebox_decompress(uint32_t offset)
> +{
> +	uint32_t compressed_start, compressed_end, len;
> +	void (*uncompress)(void *compressed_start, unsigned int len);
> +
> +	compressed_start = (uint32_t)&input_data - offset;
> +	compressed_end = (uint32_t)&input_data_end - offset;
> +	len = compressed_end - compressed_start;
> +
> +	uncompress = barebox_uncompress;
> +
> +	/* call barebox_uncompress with its absolute address */
> +	__asm__ __volatile__(
> +		"mov r0, %1\n"
> +		"mov r1, %2\n"
> +		"mov pc, %0\n"
> +		:
> +		: "r"(uncompress), "r"(compressed_start), "r"(len)
> +		: "r0", "r1");
> +}
> +#else
> +void barebox_decompress(uint32_t offset) {}
> +#endif
>  
>  /*
>   * Board code can jump here by either returning from board_init_lowlevel
> @@ -137,8 +161,6 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
>  void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
>  {
>  	uint32_t r, addr, offset;
> -	uint32_t compressed_start, compressed_end, len;
> -	void (*uncompress)(void *compressed_start, unsigned int len);
>  
>  	/*
>  	 * Get runtime address of this function. Do not
> @@ -169,20 +191,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
>  	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
>  
>  	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION)) {
> -		compressed_start = (uint32_t)&input_data - offset;
> -		compressed_end = (uint32_t)&input_data_end - offset;
> -		len = compressed_end - compressed_start;
> -
> -		uncompress = barebox_uncompress;
> -
> -		/* call barebox_uncompress with its absolute address */
> -		__asm__ __volatile__(
> -			"mov r0, %1\n"
> -			"mov r1, %2\n"
> -			"mov pc, %0\n"
> -			:
> -			: "r"(uncompress), "r"(compressed_start), "r"(len)
> -			: "r0", "r1");
> +		barebox_decompress(offset);

With this you don't call the decompressor with it's absolute address
anymore, which means that the decompressor won't run at the address it's
linked at.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 23 02:41:34 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 08:41:34 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723063523.GV30009@pengutronix.de>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
 <20120723063523.GV30009@pengutronix.de>
Message-ID: <20120723064134.GO22657@game.jcrosoft.org>

On 08:35 Mon 23 Jul     , Sascha Hauer wrote:
> On Mon, Jul 23, 2012 at 06:26:02AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Today we link to whole barebox and rely on gcc to cleanup via it's garbage
> > collector.
> > Now we specify only what is needed and introduce a new directory with source
> > only related to the compressed target.
> > 
> > Build it in arch/<arm>/compressed
> > Rebuild all the needed object.
> > 
> > Keep the previous target untouched.
> > This fix the modules support and allow custom flags for each file.
> > 
> > Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
> > implement a dummy panic.
> 
> This does not work on all targets having a lowlevel init:
> 
> arch/arm/compressed/start.o: In function `reset':
> start.c:(.text_bare_init.text+0x28): undefined reference to `board_init_lowlevel'
> 
> Why don't we simply do this:
> 
> 
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 647c536..12869b3 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -150,11 +150,9 @@ TEXT_BASE = $(CONFIG_TEXT_BASE)
>  
>  CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
>  
> -ifndef CONFIG_MODULES
>  # Add cleanup flags
>  CPPFLAGS += -fdata-sections -ffunction-sections
>  LDFLAGS_barebox += -static --gc-sections
> -endif
you can not do this as this break modules

for board_init_lowlevel we need to add it to the decompressor

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 23 02:41:21 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 08:41:21 +0200
Subject: [PATCH 7/9] Samsung/serial: move the decision about an improved
 UART into Kconfig
In-Reply-To: <1342812585-22017-8-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
 <1342812585-22017-8-git-send-email-jbe@pengutronix.de>
Message-ID: <20120723064121.GW30009@pengutronix.de>

On Fri, Jul 20, 2012 at 09:29:43PM +0200, Juergen Beisert wrote:
> More or less just cosmetic (removing ifdefs!).
> 
> Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
> ---
>  arch/arm/mach-samsung/Kconfig                     |    5 +++++
>  arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h |    5 +++--
>  drivers/serial/serial_s3c.c                       |   16 ++++++++--------
>  3 files changed, 16 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
> index c60f5ed..37d1aa3 100644
> --- a/arch/arm/mach-samsung/Kconfig
> +++ b/arch/arm/mach-samsung/Kconfig
> @@ -18,6 +18,9 @@ config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
>  	hex
>  	default 0x1ff0 if ARCH_S5PCxx
>  
> +config SAMSUNG_IMPROVED_UART
> +	bool

This is a Samsung UART specific define, so it should be in
drivers/serial/Kconfig and be renamed to
DRIVER_SERIAL_S3C_IMPROVED.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 03:16:22 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 09:16:22 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723064134.GO22657@game.jcrosoft.org>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
 <20120723063523.GV30009@pengutronix.de>
 <20120723064134.GO22657@game.jcrosoft.org>
Message-ID: <20120723071622.GX30009@pengutronix.de>

On Mon, Jul 23, 2012 at 08:41:34AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 08:35 Mon 23 Jul     , Sascha Hauer wrote:
> > On Mon, Jul 23, 2012 at 06:26:02AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > Today we link to whole barebox and rely on gcc to cleanup via it's garbage
> > > collector.
> > > Now we specify only what is needed and introduce a new directory with source
> > > only related to the compressed target.
> > > 
> > > Build it in arch/<arm>/compressed
> > > Rebuild all the needed object.
> > > 
> > > Keep the previous target untouched.
> > > This fix the modules support and allow custom flags for each file.
> > > 
> > > Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
> > > implement a dummy panic.
> > 
> > This does not work on all targets having a lowlevel init:
> > 
> > arch/arm/compressed/start.o: In function `reset':
> > start.c:(.text_bare_init.text+0x28): undefined reference to `board_init_lowlevel'
> > 
> > Why don't we simply do this:
> > 
> > 
> > diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> > index 647c536..12869b3 100644
> > --- a/arch/arm/Makefile
> > +++ b/arch/arm/Makefile
> > @@ -150,11 +150,9 @@ TEXT_BASE = $(CONFIG_TEXT_BASE)
> >  
> >  CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
> >  
> > -ifndef CONFIG_MODULES
> >  # Add cleanup flags
> >  CPPFLAGS += -fdata-sections -ffunction-sections
> >  LDFLAGS_barebox += -static --gc-sections
> > -endif
> you can not do this as this break modules

Does it really?

I see this goes back to:

commit 8a03bff03ebf36b7460e6ec43259bc8b40731ece
Author: Sascha Hauer <s.hauer at pengutronix.de>
Date:   Thu Jul 3 10:30:44 2008 +0200

    [arm] Add cleanup flags only when modules are disabled. Otherwise
          we remove functions from the binary which are needed for
          modules

I can't see though why this should happen. What is needed for modules
is defined by EXPORT_SYMBOL.

Unfortunately modules are quite broken atm for me anyway, so I can't
test.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 23 04:02:08 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 10:02:08 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723071622.GX30009@pengutronix.de>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
 <20120723063523.GV30009@pengutronix.de>
 <20120723064134.GO22657@game.jcrosoft.org>
 <20120723071622.GX30009@pengutronix.de>
Message-ID: <20120723080208.GP22657@game.jcrosoft.org>

On 09:16 Mon 23 Jul     , Sascha Hauer wrote:
> On Mon, Jul 23, 2012 at 08:41:34AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 08:35 Mon 23 Jul     , Sascha Hauer wrote:
> > > On Mon, Jul 23, 2012 at 06:26:02AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > Today we link to whole barebox and rely on gcc to cleanup via it's garbage
> > > > collector.
> > > > Now we specify only what is needed and introduce a new directory with source
> > > > only related to the compressed target.
> > > > 
> > > > Build it in arch/<arm>/compressed
> > > > Rebuild all the needed object.
> > > > 
> > > > Keep the previous target untouched.
> > > > This fix the modules support and allow custom flags for each file.
> > > > 
> > > > Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
> > > > implement a dummy panic.
> > > 
> > > This does not work on all targets having a lowlevel init:
> > > 
> > > arch/arm/compressed/start.o: In function `reset':
> > > start.c:(.text_bare_init.text+0x28): undefined reference to `board_init_lowlevel'
> > > 
> > > Why don't we simply do this:
> > > 
> > > 
> > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> > > index 647c536..12869b3 100644
> > > --- a/arch/arm/Makefile
> > > +++ b/arch/arm/Makefile
> > > @@ -150,11 +150,9 @@ TEXT_BASE = $(CONFIG_TEXT_BASE)
> > >  
> > >  CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
> > >  
> > > -ifndef CONFIG_MODULES
> > >  # Add cleanup flags
> > >  CPPFLAGS += -fdata-sections -ffunction-sections
> > >  LDFLAGS_barebox += -static --gc-sections
> > > -endif
> > you can not do this as this break modules
> 
> Does it really?
> 
> I see this goes back to:
> 
> commit 8a03bff03ebf36b7460e6ec43259bc8b40731ece
> Author: Sascha Hauer <s.hauer at pengutronix.de>
> Date:   Thu Jul 3 10:30:44 2008 +0200
> 
>     [arm] Add cleanup flags only when modules are disabled. Otherwise
>           we remove functions from the binary which are needed for
>           modules
> 
> I can't see though why this should happen. What is needed for modules
> is defined by EXPORT_SYMBOL.
> 
> Unfortunately modules are quite broken atm for me anyway, so I can't
> test.
except you need to use the barebox file to link the ko

and that is one of the reason we do need to call the compressed barebox
zbarebox

and I'd like to be able to detect when it's a normal barebox and a zbarebox
so need to have start.c compiled 2 times

I really do not like this link with the whole barebox in the zbarebox

keep stuff clean and seperated is really better

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 23 04:05:07 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 10:05:07 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723080208.GP22657@game.jcrosoft.org>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
 <20120723063523.GV30009@pengutronix.de>
 <20120723064134.GO22657@game.jcrosoft.org>
 <20120723071622.GX30009@pengutronix.de>
 <20120723080208.GP22657@game.jcrosoft.org>
Message-ID: <20120723080507.GY30009@pengutronix.de>

On Mon, Jul 23, 2012 at 10:02:08AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 09:16 Mon 23 Jul     , Sascha Hauer wrote:
> > 
> > Does it really?
> > 
> > I see this goes back to:
> > 
> > commit 8a03bff03ebf36b7460e6ec43259bc8b40731ece
> > Author: Sascha Hauer <s.hauer at pengutronix.de>
> > Date:   Thu Jul 3 10:30:44 2008 +0200
> > 
> >     [arm] Add cleanup flags only when modules are disabled. Otherwise
> >           we remove functions from the binary which are needed for
> >           modules
> > 
> > I can't see though why this should happen. What is needed for modules
> > is defined by EXPORT_SYMBOL.
> > 
> > Unfortunately modules are quite broken atm for me anyway, so I can't
> > test.
> except you need to use the barebox file to link the ko
> 
> and that is one of the reason we do need to call the compressed barebox
> zbarebox
> 
> and I'd like to be able to detect when it's a normal barebox and a zbarebox
> so need to have start.c compiled 2 times
> 
> I really do not like this link with the whole barebox in the zbarebox
> 
> keep stuff clean and seperated is really better

Well, send patches ;)

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 23 04:18:07 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 10:18:07 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723080507.GY30009@pengutronix.de>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
 <20120723063523.GV30009@pengutronix.de>
 <20120723064134.GO22657@game.jcrosoft.org>
 <20120723071622.GX30009@pengutronix.de>
 <20120723080208.GP22657@game.jcrosoft.org>
 <20120723080507.GY30009@pengutronix.de>
Message-ID: <20120723081807.GQ22657@game.jcrosoft.org>

On 10:05 Mon 23 Jul     , Sascha Hauer wrote:
> On Mon, Jul 23, 2012 at 10:02:08AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 09:16 Mon 23 Jul     , Sascha Hauer wrote:
> > > 
> > > Does it really?
> > > 
> > > I see this goes back to:
> > > 
> > > commit 8a03bff03ebf36b7460e6ec43259bc8b40731ece
> > > Author: Sascha Hauer <s.hauer at pengutronix.de>
> > > Date:   Thu Jul 3 10:30:44 2008 +0200
> > > 
> > >     [arm] Add cleanup flags only when modules are disabled. Otherwise
> > >           we remove functions from the binary which are needed for
> > >           modules
> > > 
> > > I can't see though why this should happen. What is needed for modules
> > > is defined by EXPORT_SYMBOL.
> > > 
> > > Unfortunately modules are quite broken atm for me anyway, so I can't
> > > test.
> > except you need to use the barebox file to link the ko
> > 
> > and that is one of the reason we do need to call the compressed barebox
> > zbarebox
> > 
> > and I'd like to be able to detect when it's a normal barebox and a zbarebox
> > so need to have start.c compiled 2 times
> > 
> > I really do not like this link with the whole barebox in the zbarebox
> > 
> > keep stuff clean and seperated is really better
> 
> Well, send patches ;)
THis is what this patch do

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 23 04:22:31 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 10:22:31 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723081807.GQ22657@game.jcrosoft.org>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
 <20120723063523.GV30009@pengutronix.de>
 <20120723064134.GO22657@game.jcrosoft.org>
 <20120723071622.GX30009@pengutronix.de>
 <20120723080208.GP22657@game.jcrosoft.org>
 <20120723080507.GY30009@pengutronix.de>
 <20120723081807.GQ22657@game.jcrosoft.org>
Message-ID: <20120723082231.GZ30009@pengutronix.de>

On Mon, Jul 23, 2012 at 10:18:07AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 10:05 Mon 23 Jul     , Sascha Hauer wrote:
> > On Mon, Jul 23, 2012 at 10:02:08AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > On 09:16 Mon 23 Jul     , Sascha Hauer wrote:
> > > > 
> > > > Does it really?
> > > > 
> > > > I see this goes back to:
> > > > 
> > > > commit 8a03bff03ebf36b7460e6ec43259bc8b40731ece
> > > > Author: Sascha Hauer <s.hauer at pengutronix.de>
> > > > Date:   Thu Jul 3 10:30:44 2008 +0200
> > > > 
> > > >     [arm] Add cleanup flags only when modules are disabled. Otherwise
> > > >           we remove functions from the binary which are needed for
> > > >           modules
> > > > 
> > > > I can't see though why this should happen. What is needed for modules
> > > > is defined by EXPORT_SYMBOL.
> > > > 
> > > > Unfortunately modules are quite broken atm for me anyway, so I can't
> > > > test.
> > > except you need to use the barebox file to link the ko
> > > 
> > > and that is one of the reason we do need to call the compressed barebox
> > > zbarebox
> > > 
> > > and I'd like to be able to detect when it's a normal barebox and a zbarebox
> > > so need to have start.c compiled 2 times
> > > 
> > > I really do not like this link with the whole barebox in the zbarebox
> > > 
> > > keep stuff clean and seperated is really better
> > 
> > Well, send patches ;)
> THis is what this patch do

But it breaks the build

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 23 05:05:43 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 11:05:43 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120723090543.GR22657@game.jcrosoft.org>

Hi Sam,

	I put the linux-kbuild ml as in barebox we use the kbuild system

	we are adding the compressed image support to barebox

	but we have some trouble to integrate it correctly in the kbuild
	system

	we have file needed by the decompressor store arround the source code

	arch/<arch>/boards/<baord>/
	arch/<arch>/mach-<mach>/

	the idea was to introduce a new target called comp-y => build-comp.o
	that will be build acrros the tree and then we do the finally link in
	the main Makefile

	Could you help us to archive it or do have an other way to do so

Best Regards,
J.
On 06:26 Mon 23 Jul     , Jean-Christophe PLAGNIOL-VILLARD wrote:
> Today we link to whole barebox and rely on gcc to cleanup via it's garbage
> collector.
> Now we specify only what is needed and introduce a new directory with source
> only related to the compressed target.
> 
> Build it in arch/<arm>/compressed
> Rebuild all the needed object.
> 
> Keep the previous target untouched.
> This fix the modules support and allow custom flags for each file.
> 
> Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
> implement a dummy panic.
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
>  Makefile                          |   37 ++---------
>  arch/arm/Makefile                 |    9 ++-
>  arch/arm/compressed/Makefile      |   69 ++++++++++++++++++++
>  arch/arm/compressed/barebox.lds.S |   70 ++++++++++++++++++++
>  arch/arm/compressed/piggy.lzo.S   |    6 ++
>  arch/arm/cpu/start.c              |   41 +++++++-----
>  compressed/misc.c                 |   14 ++++
>  compressed/string.c               |  127 +++++++++++++++++++++++++++++++++++++
>  piggy.lzo.S                       |    6 --
>  9 files changed, 323 insertions(+), 56 deletions(-)
>  create mode 100644 arch/arm/compressed/Makefile
>  create mode 100644 arch/arm/compressed/barebox.lds.S
>  create mode 100644 arch/arm/compressed/piggy.lzo.S
>  create mode 100644 compressed/misc.c
>  create mode 100644 compressed/string.c
>  delete mode 100644 piggy.lzo.S
> 
> diff --git a/Makefile b/Makefile
> index 0b3da03..46c9491 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -512,7 +512,6 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
>  barebox-common := $(common-y)
>  barebox-all    := $(barebox-common)
>  barebox-lds    := $(lds-y)
> -barebox-compressed-lds    := $(lds-compressed-y)
>  
>  # Rule to link barebox
>  # May be overridden by arch/$(ARCH)/Makefile
> @@ -668,11 +667,12 @@ quiet_cmd_objcopy = OBJCOPY $@
>        cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
>  
>  OBJCOPYFLAGS_barebox.bin = -O binary
> -OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
>  
>  barebox.bin: barebox FORCE
>  	$(call if_changed,objcopy)
> +ifndef CONFIG_IMAGE_COMPRESSION
>  	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
> +endif
>  
>  ifdef CONFIG_X86
>  barebox.S: barebox
> @@ -702,41 +702,13 @@ quiet_cmd_disasm = DISASM  $@
>  
>  barebox.S: barebox FORCE
>  	$(call if_changed,disasm)
> -barebox-uncompressed.S: barebox-uncompressed FORCE
> -	$(call if_changed,disasm)
>  endif
>  
>  # barebox image
> -barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
> -	$(call barebox-modpost)
> -	$(call if_changed_rule,barebox__)
> -	$(Q)rm -f .old_version
> -
> -barebox-uncompressed.bin: barebox-uncompressed
> -	$(call if_changed,objcopy)
> -
> -suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
> -
> -barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
> -	@echo "  LZO    " $@
> -	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
> -
> -piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
> -	@echo "  CC     " $@
> -	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
> -
> -ifdef CONFIG_IMAGE_COMPRESSION
> -barebox: piggy.$(suffix_y).o
> -	@echo "  LD     " $@
> -	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
> -		-T $(barebox-compressed-lds) \
> -		--start-group $(barebox-common) piggy.$(suffix_y).o --end-group
> -else
>  barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
>  	$(call barebox-modpost)
>  	$(call if_changed_rule,barebox__)
>  	$(Q)rm -f .old_version
> -endif
>  
>  barebox.srec: barebox
>  	$(OBJCOPY) -O srec $< $@
> @@ -1031,11 +1003,10 @@ endif # CONFIG_MODULES
>  # Directories & files removed with 'make clean'
>  CLEAN_DIRS  += $(MODVERDIR)
>  CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
> -                .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
> +                .tmp_version .tmp_barebox* barebox.* \
>  		.tmp_kallsyms* barebox_default_env* barebox.ldr \
>  		scripts/bareboxenv-target \
> -		Doxyfile.version barebox.srec barebox.s5p \
> -		barebox-uncompressed barebox-uncompressed.bin barebox-uncompressed.bin.lzo
> +		Doxyfile.version barebox.srec barebox.s5p
>  
>  # Directories & files removed with 'make mrproper'
>  MRPROPER_DIRS  += include/config include2 usr/include
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index a93c4d5..647c536 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -184,6 +184,14 @@ ifeq ($(CONFIG_OMAP_BUILD_IFT),y)
>  KBUILD_IMAGE := MLO
>  endif
>  
> +ifdef CONFIG_IMAGE_COMPRESSION
> +KBUILD_IMAGE := zbarebox.bin
> +endif
> +
> +comp := arch/arm/compressed
> +zbarebox.S zbarebox.bin zbarebox: barebox.bin
> +	$(Q)$(MAKE) $(build)=$(comp) $(comp)/$@
> +
>  all: $(KBUILD_IMAGE)
>  
>  archprepare: maketools
> @@ -208,6 +216,5 @@ common-y += $(BOARD) $(MACH)
>  common-y += arch/arm/lib/ arch/arm/cpu/
>  
>  lds-y	:= arch/arm/lib/barebox.lds
> -lds-compressed-y := arch/arm/lib/barebox-compressed.lds
>  
>  CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds
> diff --git a/arch/arm/compressed/Makefile b/arch/arm/compressed/Makefile
> new file mode 100644
> index 0000000..627a411
> --- /dev/null
> +++ b/arch/arm/compressed/Makefile
> @@ -0,0 +1,69 @@
> +
> +suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
> +
> +OBJCOPYFLAGS_zbarebox.bin = -O binary
> +
> +targets := zbarebox zbarebox.bin zbarebox.S \
> +	   piggy.$(suffix_y) piggy.$(suffix_y).o \
> +	   lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
> +	   misc.o string.o start.o
> +
> +# Make sure files are removed during clean
> +extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
> +		 lib1funcs.S ashldi3.S start.c string.c misc.c
> +
> +$(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
> +	$(call if_changed,objcopy)
> +	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
> +	@echo '  Barebox: $@ is ready'
> +
> +$(obj)/zbarebox.S: $(obj)/zbarebox FORCE
> +	$(call if_changed,disasm)
> +
> +# For __aeabi_uidivmod
> +lib1funcs = $(obj)/lib1funcs.o
> +
> +$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S
> +	$(call cmd,shipped)
> +
> +CFLAGS_start.o = -D CONFIG_COMPRESSOR
> +start= $(obj)/start.o
> +$(obj)/start.c: $(srctree)/arch/$(SRCARCH)/cpu/start.c
> +	$(call cmd,shipped)
> +
> +string= $(obj)/string.o
> +$(obj)/string.c: $(srctree)/compressed/string.c
> +	$(call cmd,shipped)
> +
> +misc= $(obj)/misc.o
> +$(obj)/misc.c: $(srctree)/compressed/misc.c
> +	$(call cmd,shipped)
> +
> +# For __aeabi_llsl
> +ashldi3 = $(obj)/ashldi3.o
> +
> +$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
> +	$(call cmd,shipped)
> +
> +# For __div0
> +div0 = $(obj)/div0.o
> +
> +$(obj)/div0.c: $(srctree)/arch/$(SRCARCH)/lib/div0.c
> +	$(call cmd,shipped)
> +
> +LDFLAGS_zbarebox	:= -Map zbarebox.map
> +comp := $(obj)/piggy.$(suffix_y).o \
> +	$(lib1funcs) $(ashldi3) $(start) $(string) $(misc) $(div0)
> +
> +$(obj)/zbarebox: $(obj)/barebox.lds $(comp) FORCE
> +	@echo "  LD     " $@
> +	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
> +		-T $(obj)/barebox.lds \
> +		--start-group $(comp) --end-group
> +
> +$(obj)/piggy.$(suffix_y): $(obj)/../../../barebox.bin FORCE
> +	$(call if_changed,$(suffix_y))
> +
> +$(obj)/piggy.$(suffix_y).o:  $(obj)/piggy.$(suffix_y) FORCE
> +
> +$(obj)/barebox.lds: $(obj)/barebox.lds.S
> diff --git a/arch/arm/compressed/barebox.lds.S b/arch/arm/compressed/barebox.lds.S
> new file mode 100644
> index 0000000..809e567
> --- /dev/null
> +++ b/arch/arm/compressed/barebox.lds.S
> @@ -0,0 +1,70 @@
> +/*
> + * (C) Copyright 2012 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#include <asm-generic/barebox.lds.h>
> +#include <asm-generic/memory_layout.h>
> +
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +OUTPUT_ARCH(arm)
> +ENTRY(compressed_start)
> +SECTIONS
> +{
> +	. = HEAD_TEXT_BASE;
> +
> +	PRE_IMAGE
> +
> +	. = ALIGN(4);
> +	.text      :
> +	{
> +		_stext = .;
> +		_text = .;
> +		*(.text_head_entry*)
> +		__ll_return = .;
> +		*(.text_ll_return*)
> +		__bare_init_start = .;
> +		*(.text_bare_init*)
> +		__bare_init_end = .;
> +		*(.text*)
> +	}
> +	BAREBOX_BARE_INIT_SIZE
> +
> +	. = ALIGN(4);
> +	.rodata : { *(.rodata*) }
> +
> +	_etext = .;			/* End of text and rodata section */
> +
> +	. = ALIGN(4);
> +	.piggydata : {
> +		*(.piggydata)
> +	}
> +
> +	. = ALIGN(4);
> +	.data : { *(.data*) }
> +
> +	. = ALIGN(4);
> +	__bss_start = .;
> +	.bss : { *(.bss*) }
> +	__bss_stop = .;
> +	_end = .;
> +	_barebox_image_size = __bss_start - HEAD_TEXT_BASE;
> +}
> diff --git a/arch/arm/compressed/piggy.lzo.S b/arch/arm/compressed/piggy.lzo.S
> new file mode 100644
> index 0000000..0c0d216
> --- /dev/null
> +++ b/arch/arm/compressed/piggy.lzo.S
> @@ -0,0 +1,6 @@
> +	.section .piggydata,#alloc
> +	.globl	input_data
> +input_data:
> +	.incbin	"arch/arm/compressed/piggy.lzo"
> +	.globl	input_data_end
> +input_data_end:
> diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> index 8ab6fdc..6c745f7 100644
> --- a/arch/arm/cpu/start.c
> +++ b/arch/arm/cpu/start.c
> @@ -100,6 +100,7 @@ void __naked __bare_init reset(void)
>  	board_init_lowlevel_return();
>  }
>  
> +#ifdef CONFIG_COMPRESSOR
>  extern void *input_data;
>  extern void *input_data_end;
>  
> @@ -129,6 +130,29 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
>  	barebox();
>  }
>  
> +void barebox_decompress(uint32_t offset)
> +{
> +	uint32_t compressed_start, compressed_end, len;
> +	void (*uncompress)(void *compressed_start, unsigned int len);
> +
> +	compressed_start = (uint32_t)&input_data - offset;
> +	compressed_end = (uint32_t)&input_data_end - offset;
> +	len = compressed_end - compressed_start;
> +
> +	uncompress = barebox_uncompress;
> +
> +	/* call barebox_uncompress with its absolute address */
> +	__asm__ __volatile__(
> +		"mov r0, %1\n"
> +		"mov r1, %2\n"
> +		"mov pc, %0\n"
> +		:
> +		: "r"(uncompress), "r"(compressed_start), "r"(len)
> +		: "r0", "r1");
> +}
> +#else
> +void barebox_decompress(uint32_t offset) {}
> +#endif
>  
>  /*
>   * Board code can jump here by either returning from board_init_lowlevel
> @@ -137,8 +161,6 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
>  void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
>  {
>  	uint32_t r, addr, offset;
> -	uint32_t compressed_start, compressed_end, len;
> -	void (*uncompress)(void *compressed_start, unsigned int len);
>  
>  	/*
>  	 * Get runtime address of this function. Do not
> @@ -169,20 +191,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
>  	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
>  
>  	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION)) {
> -		compressed_start = (uint32_t)&input_data - offset;
> -		compressed_end = (uint32_t)&input_data_end - offset;
> -		len = compressed_end - compressed_start;
> -
> -		uncompress = barebox_uncompress;
> -
> -		/* call barebox_uncompress with its absolute address */
> -		__asm__ __volatile__(
> -			"mov r0, %1\n"
> -			"mov r1, %2\n"
> -			"mov pc, %0\n"
> -			:
> -			: "r"(uncompress), "r"(compressed_start), "r"(len)
> -			: "r0", "r1");
> +		barebox_decompress(offset);
>  	} else {
>  		/* call start_barebox with its absolute address */
>  		r = (unsigned int)&start_barebox;
> diff --git a/compressed/misc.c b/compressed/misc.c
> new file mode 100644
> index 0000000..47e9cea
> --- /dev/null
> +++ b/compressed/misc.c
> @@ -0,0 +1,14 @@
> +#include <common.h>
> +#include <init.h>
> +#include <linux/types.h>
> +#include <linux/string.h>
> +#include <linux/ctype.h>
> +
> +void __noreturn panic(const char *fmt, ...)
> +{
> +	while(1);
> +}
> +
> +void start_barebox(void)
> +{
> +}
> diff --git a/compressed/string.c b/compressed/string.c
> new file mode 100644
> index 0000000..6787e82
> --- /dev/null
> +++ b/compressed/string.c
> @@ -0,0 +1,127 @@
> +/*
> + * arch/arm/boot/compressed/string.c
> + *
> + * Small subset of simple string routines
> + */
> +
> +#include <linux/types.h>
> +
> +void *memcpy(void *__dest, __const void *__src, size_t __n)
> +{
> +	int i = 0;
> +	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
> +
> +	for (i = __n >> 3; i > 0; i--) {
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +	}
> +
> +	if (__n & 1 << 2) {
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +		*d++ = *s++;
> +	}
> +
> +	if (__n & 1 << 1) {
> +		*d++ = *s++;
> +		*d++ = *s++;
> +	}
> +
> +	if (__n & 1)
> +		*d++ = *s++;
> +
> +	return __dest;
> +}
> +
> +void *memmove(void *__dest, __const void *__src, size_t count)
> +{
> +	unsigned char *d = __dest;
> +	const unsigned char *s = __src;
> +
> +	if (__dest == __src)
> +		return __dest;
> +
> +	if (__dest < __src)
> +		return memcpy(__dest, __src, count);
> +
> +	while (count--)
> +		d[count] = s[count];
> +	return __dest;
> +}
> +
> +size_t strlen(const char *s)
> +{
> +	const char *sc = s;
> +
> +	while (*sc != '\0')
> +		sc++;
> +	return sc - s;
> +}
> +
> +int memcmp(const void *cs, const void *ct, size_t count)
> +{
> +	const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;
> +	int res = 0;
> +
> +	while (su1 < end) {
> +		res = *su1++ - *su2++;
> +		if (res)
> +			break;
> +	}
> +	return res;
> +}
> +
> +int strcmp(const char *cs, const char *ct)
> +{
> +	unsigned char c1, c2;
> +	int res = 0;
> +
> +	do {
> +		c1 = *cs++;
> +		c2 = *ct++;
> +		res = c1 - c2;
> +		if (res)
> +			break;
> +	} while (c1);
> +	return res;
> +}
> +
> +void *memchr(const void *s, int c, size_t count)
> +{
> +	const unsigned char *p = s;
> +
> +	while (count--)
> +		if ((unsigned char)c == *p++)
> +			return (void *)(p - 1);
> +	return NULL;
> +}
> +
> +char *strchr(const char *s, int c)
> +{
> +	while (*s != (char)c)
> +		if (*s++ == '\0')
> +			return NULL;
> +	return (char *)s;
> +}
> +
> +#undef memset
> +
> +void *memset(void *s, int c, size_t count)
> +{
> +	char *xs = s;
> +	while (count--)
> +		*xs++ = c;
> +	return s;
> +}
> +
> +void __memzero(void *s, size_t count)
> +{
> +	memset(s, 0, count);
> +}
> diff --git a/piggy.lzo.S b/piggy.lzo.S
> deleted file mode 100644
> index 6cc618d..0000000
> --- a/piggy.lzo.S
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -	.section .piggydata,#alloc
> -	.globl  input_data
> -input_data:
> -	.incbin "barebox-uncompressed.bin.lzo"
> -	.globl  input_data_end
> -input_data_end:
> -- 
> 1.7.10
> 


From plagnioj at jcrosoft.com  Mon Jul 23 05:08:11 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 23 Jul 2012 11:08:11 +0200
Subject: [PATCH 6/7] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <20120723082231.GZ30009@pengutronix.de>
References: <20120723042052.GK22657@game.jcrosoft.org>
 <1343017563-27932-1-git-send-email-plagnioj@jcrosoft.com>
 <1343017563-27932-6-git-send-email-plagnioj@jcrosoft.com>
 <20120723063523.GV30009@pengutronix.de>
 <20120723064134.GO22657@game.jcrosoft.org>
 <20120723071622.GX30009@pengutronix.de>
 <20120723080208.GP22657@game.jcrosoft.org>
 <20120723080507.GY30009@pengutronix.de>
 <20120723081807.GQ22657@game.jcrosoft.org>
 <20120723082231.GZ30009@pengutronix.de>
Message-ID: <20120723090811.GS22657@game.jcrosoft.org>

On 10:22 Mon 23 Jul     , Sascha Hauer wrote:
> On Mon, Jul 23, 2012 at 10:18:07AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 10:05 Mon 23 Jul     , Sascha Hauer wrote:
> > > On Mon, Jul 23, 2012 at 10:02:08AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > On 09:16 Mon 23 Jul     , Sascha Hauer wrote:
> > > > > 
> > > > > Does it really?
> > > > > 
> > > > > I see this goes back to:
> > > > > 
> > > > > commit 8a03bff03ebf36b7460e6ec43259bc8b40731ece
> > > > > Author: Sascha Hauer <s.hauer at pengutronix.de>
> > > > > Date:   Thu Jul 3 10:30:44 2008 +0200
> > > > > 
> > > > >     [arm] Add cleanup flags only when modules are disabled. Otherwise
> > > > >           we remove functions from the binary which are needed for
> > > > >           modules
> > > > > 
> > > > > I can't see though why this should happen. What is needed for modules
> > > > > is defined by EXPORT_SYMBOL.
> > > > > 
> > > > > Unfortunately modules are quite broken atm for me anyway, so I can't
> > > > > test.
> > > > except you need to use the barebox file to link the ko
> > > > 
> > > > and that is one of the reason we do need to call the compressed barebox
> > > > zbarebox
> > > > 
> > > > and I'd like to be able to detect when it's a normal barebox and a zbarebox
> > > > so need to have start.c compiled 2 times
> > > > 
> > > > I really do not like this link with the whole barebox in the zbarebox
> > > > 
> > > > keep stuff clean and seperated is really better
> > > 
> > > Well, send patches ;)
> > THis is what this patch do
> 
> But it breaks the build
For this we need some help because one of the way would be to have a new
target comp-y so we can specify it accross the source

Best Regards,
J.


From wjatscheslaw.stoljarski at kiwigrid.com  Mon Jul 23 08:07:25 2012
From: wjatscheslaw.stoljarski at kiwigrid.com (Wjatscheslaw Stoljarski (Slawa))
Date: Mon, 23 Jul 2012 14:07:25 +0200
Subject: [PATCH] i.MX53 boards: notify clocksource after init_lowlevel
Message-ID: <500D3E7D.8040006@kiwigrid.com>


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From sv.khafizova at gmail.com  Mon Jul 23 09:36:48 2012
From: sv.khafizova at gmail.com (Svetlana Khafizova)
Date: Mon, 23 Jul 2012 17:36:48 +0400
Subject: [PATCH] Makefile: update barebox version if CONFIG_KALLSYMS is not set
Message-ID: <1343050608-2091-1-git-send-email-sv.khafizova@gmail.com>

If CONFIG_KALLSYMS is not set then barebox version is always "#0".
By-default on mips boards CONFIG_KALLSYMS don't set, so barebox
version does not increase after every build.
This patch fixes the problem.

Signed-off-by: Svetlana Khafizova <sv.khafizova at gmail.com>
Signed-off-by: Aleksey Kuleshov <rndfax at yandex.ru>
Acked-by:: Antony Pavlov <antonynpavlov at gmail.com>
---
 Makefile |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index ebcf9bf..ac5eaaf 100644
--- a/Makefile
+++ b/Makefile
@@ -549,12 +549,13 @@ quiet_cmd_sysmap = SYSMAP
       cmd_sysmap = $(CONFIG_SHELL) $(srctree)/scripts/mksysmap
 
 # Link of barebox
+# If CONFIG_KALLSYMS is set .version is already updated
 # Generate System.map and verify that the content is consistent
 # Use + in front of the barebox_version rule to silent warning with make -j2
 # First command is ':' to allow us to use + in front of the rule
 define rule_barebox__
 	:
-
+	$(if $(CONFIG_KALLSYMS),,+$(call cmd,barebox_version))
 	$(call cmd,barebox__)
 
 	$(Q)echo 'cmd_$@ := $(cmd_barebox__)' > $(@D)/.$(@F).cmd
-- 
1.7.10.4



From s.hauer at pengutronix.de  Mon Jul 23 15:59:21 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 21:59:21 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own
 section
In-Reply-To: <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
Message-ID: <20120723195921.GP24458@pengutronix.de>

On Thu, Jul 19, 2012 at 10:13:01AM +0200, Sascha Hauer wrote:
 diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
> index ef4caff..422455d 100644
> --- a/arch/arm/lib/findbit.S
> +++ b/arch/arm/lib/findbit.S
> @@ -22,6 +22,7 @@
>   * Purpose  : Find a 'zero' bit
>   * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit);
>   */
> +.section .text._find_first_zero_bit_le
>  ENTRY(_find_first_zero_bit_le)
>  		teq	r1, #0
>  		beq	3f
> @@ -43,6 +44,7 @@ ENDPROC(_find_first_zero_bit_le)
>   * Purpose  : Find next 'zero' bit
>   * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
>   */
> +.section .text._find_next_zero_bit_le
>  ENTRY(_find_next_zero_bit_le)
>  		teq	r1, #0
>  		beq	3b
> @@ -63,6 +65,7 @@ ENDPROC(_find_next_zero_bit_le)
>   * Purpose  : Find a 'one' bit
>   * Prototype: int find_first_bit(const unsigned long *addr, unsigned int maxbit);
>   */
> +.section .text._find_first_bit_le
>  ENTRY(_find_first_bit_le)
>  		teq	r1, #0
>  		beq	3f

The changes in this file are completely wrong. These functions use
different jump labels (1b, 1f,...) to jump over function borders.
The bad thing is that the compiler does not issue any warning, it only
generates broken code.
Will fix.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 16:00:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 22:00:37 +0200
Subject: [PATCH 8/9] ARM: Separate assembler functions into their own
 section
In-Reply-To: <20120720162007.GA22374@sig21.net>
References: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
 <1342685582-13244-9-git-send-email-s.hauer@pengutronix.de>
 <5007E38B.8040106@pengutronix.de>
 <20120719140834.GY30009@pengutronix.de>
 <20120719204548.GI30009@pengutronix.de>
 <20120720162007.GA22374@sig21.net>
Message-ID: <20120723200037.GA30009@pengutronix.de>

On Fri, Jul 20, 2012 at 06:20:07PM +0200, Johannes Stezenbach wrote:
> > For example we have this:
> > 
> > .section .text.__divsi3
> > ENTRY(__divsi3)
> > ENTRY(__aeabi_idiv)
> > 	...
> 
> and also:
> ENTRY(__lshrdi3)
> ENTRY(__aeabi_llsr)
> 
> However, this is the rare exception.  How about
> adding __ENTRY for these cases?

I think it's better to keep the ENTRY semantics (which is derived from
the Linux Kernel) and just live with it that we have to add the .section
at the beginning of each function.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 16:05:26 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 22:05:26 +0200
Subject: Booting kernel from FAT partition on beagle board
In-Reply-To: <juh698$uj7$1@dough.gmane.org>
References: <juh698$uj7$1@dough.gmane.org>
Message-ID: <20120723200526.GB30009@pengutronix.de>

On Sun, Jul 22, 2012 at 05:29:44PM +0200, Bernhard Walle wrote:
> Hi,
> 
> Passing control to ARM Linux uImage handler
> 
> Starting kernel at 0x80008000...
> commandline: console=ttyO2,115200 vram=12M
> omapfb.mode=dvi:1024x768MR-16 at 60 omapfb.debug=y omapdss.def_disp=dvi
> root=/dev/mmcblk0p2 ro rootfstype=ext3 rootwait earlyprintk=ttyO2,115200

earlyprintk does not take options.

Have you enabled earlyprintk support in your config? At least you
should something then.

> arch_number: 1546
> ------------------------------------------------------------
> 
> The same kernel boots fine using u-boot. I'm using Barebox 2012.07.0 and
> u-boot 2012.07-rc1.
> 
> Did I do something wrong? Or is that just a bug?

What you tried should work, I can't see something obviously wrong.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 16:11:20 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 22:11:20 +0200
Subject: [PATCH/master] ARM/MXS: pull-up and bitkeeper must be handled
 differently
In-Reply-To: <201207201534.50481.jbe@pengutronix.de>
References: <201207201534.50481.jbe@pengutronix.de>
Message-ID: <20120723201120.GD30009@pengutronix.de>

On Fri, Jul 20, 2012 at 03:34:49PM +0200, Juergen Beisert wrote:
> Since commit 2f6b1f7690640f571f8e72fc2f2564acb2e13778 the pull-up and
> bitkeeper handling for i.MX23/28 is correct. But now it is important to
> distinguish these pin features as their programmed bit values are different.
> With this patch the bitkeeper and pull-up enable/disable bits are now handled
> separately.
> 

Applied, thanks

 Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 16:10:12 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 22:10:12 +0200
Subject: [PATCH] Makefile: update barebox version if CONFIG_KALLSYMS is
 not set
In-Reply-To: <1343050608-2091-1-git-send-email-sv.khafizova@gmail.com>
References: <1343050608-2091-1-git-send-email-sv.khafizova@gmail.com>
Message-ID: <20120723201012.GC30009@pengutronix.de>

On Mon, Jul 23, 2012 at 05:36:48PM +0400, Svetlana Khafizova wrote:
> If CONFIG_KALLSYMS is not set then barebox version is always "#0".
> By-default on mips boards CONFIG_KALLSYMS don't set, so barebox
> version does not increase after every build.
> This patch fixes the problem.

Same here. Applied.

Thanks,
 Sascha

> 
> Signed-off-by: Svetlana Khafizova <sv.khafizova at gmail.com>
> Signed-off-by: Aleksey Kuleshov <rndfax at yandex.ru>
> Acked-by:: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  Makefile |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Makefile b/Makefile
> index ebcf9bf..ac5eaaf 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -549,12 +549,13 @@ quiet_cmd_sysmap = SYSMAP
>        cmd_sysmap = $(CONFIG_SHELL) $(srctree)/scripts/mksysmap
>  
>  # Link of barebox
> +# If CONFIG_KALLSYMS is set .version is already updated
>  # Generate System.map and verify that the content is consistent
>  # Use + in front of the barebox_version rule to silent warning with make -j2
>  # First command is ':' to allow us to use + in front of the rule
>  define rule_barebox__
>  	:
> -
> +	$(if $(CONFIG_KALLSYMS),,+$(call cmd,barebox_version))
>  	$(call cmd,barebox__)
>  
>  	$(Q)echo 'cmd_$@ := $(cmd_barebox__)' > $(@D)/.$(@F).cmd
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 16:13:48 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 Jul 2012 22:13:48 +0200
Subject: [PATCH 1/3] mc13xxx: Added dummy definitions if
 CONFIG_MFD_MC13XXX is not set
In-Reply-To: <1342846209-10461-1-git-send-email-shc_work@mail.ru>
References: <1342846209-10461-1-git-send-email-shc_work@mail.ru>
Message-ID: <20120723201348.GE30009@pengutronix.de>

On Sat, Jul 21, 2012 at 08:50:07AM +0400, Alexander Shiyan wrote:
> 
> Signed-off-by: Alexander Shiyan <shc_work at mail.ru>

Applied 1/3 and 3/3. Thanks

 Sascha

> ---
>  arch/arm/boards/pcm038/pcm038.c |    2 --
>  include/mfd/mc13xxx.h           |   23 ++++++++++++++++++++++-
>  2 files changed, 22 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
> index badc978..ffd8d87 100644
> --- a/arch/arm/boards/pcm038/pcm038.c
> +++ b/arch/arm/boards/pcm038/pcm038.c
> @@ -125,7 +125,6 @@ static inline uint32_t get_pll_spctl10(void)
>   */
>  static int pcm038_power_init(void)
>  {
> -#ifdef CONFIG_MFD_MC13XXX
>  	uint32_t spctl0 = get_pll_spctl10();
>  	struct mc13xxx *mc13xxx = mc13xxx_get();
>  
> @@ -159,7 +158,6 @@ static int pcm038_power_init(void)
>  			printf("Failed to initialize PMIC. Will continue with low CPU speed\n");
>  		}
>  	}
> -#endif
>  
>  	/* clock gating enable */
>  	GPCR = 0x00050f08;
> diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h
> index 2880307..632c9fb 100644
> --- a/include/mfd/mc13xxx.h
> +++ b/include/mfd/mc13xxx.h
> @@ -163,10 +163,31 @@ struct mc13xxx {
>  	int			revision;
>  };
>  
> +#ifdef CONFIG_MFD_MC13XXX
>  extern struct mc13xxx *mc13xxx_get(void);
> -
>  extern int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val);
>  extern int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val);
>  extern int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val);
> +#else
> +static inline struct mc13xxx *mc13xxx_get(void)
> +{
> +	return NULL;
> +}
> +
> +static inline int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val)
> +{
> +	return -ENODEV;
> +}
> +
> +static inline int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val)
> +{
> +	return -ENODEV;
> +}
> +
> +static inline int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val)
> +{
> +	return -ENODEV;
> +}
> +#endif
>  
>  #endif /* __MFD_MC13XXX_H */
> -- 
> 1.7.3.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 18:03:05 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 24 Jul 2012 00:03:05 +0200
Subject: [PATCH] ARM: move exception vector table to exceptions.S
Message-ID: <1343080985-4068-1-git-send-email-s.hauer@pengutronix.de>

start.c has nothing to do with the exception vector table anymore,
so move it next to the exception handling code in exceptions.S

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/cpu/exceptions.S |   28 +++++++++++++++++++---------
 arch/arm/cpu/start.c      |   25 -------------------------
 2 files changed, 19 insertions(+), 34 deletions(-)

diff --git a/arch/arm/cpu/exceptions.S b/arch/arm/cpu/exceptions.S
index c08537a..7f94f9f 100644
--- a/arch/arm/cpu/exceptions.S
+++ b/arch/arm/cpu/exceptions.S
@@ -109,39 +109,30 @@ _STACK_START:
 	.arm
 
 	.align  5
-.globl undefined_instruction
 undefined_instruction:
 	get_bad_stack
 	bad_save_user_regs
 	bl 	do_undefined_instruction
 
 	.align	5
-.globl software_interrupt
 software_interrupt:
 	get_bad_stack
 	bad_save_user_regs
 	bl 	do_software_interrupt
 
 	.align	5
-.globl prefetch_abort
 prefetch_abort:
 	get_bad_stack
 	bad_save_user_regs
 	bl 	do_prefetch_abort
 
 	.align	5
-.globl data_abort
 data_abort:
 	get_bad_stack
 	bad_save_user_regs
 	bl 	do_data_abort
 
 	.align	5
-
-.globl irq
-.globl fiq
-
-	.align	5
 irq:
 	get_bad_stack
 	bad_save_user_regs
@@ -153,3 +144,22 @@ fiq:
 	bad_save_user_regs
 	bl 	do_fiq
 
+.section .text_exceptions
+1:	b 1b				/* reset */
+#ifdef CONFIG_ARM_EXCEPTIONS
+	ldr pc, =undefined_instruction	/* undefined instruction */
+	ldr pc, =software_interrupt	/* software interrupt (SWI) */
+	ldr pc, =prefetch_abort		/* prefetch abort */
+	ldr pc, =data_abort		/* data abort */
+1:	b 1b				/* (reserved) */
+	ldr pc, =irq			/* irq (interrupt) */
+	ldr pc, =fiq			/* fiq (fast interrupt) */
+#else
+1:	b 1b				/* undefined instruction */
+1:	b 1b				/* software interrupt (SWI) */
+1:	b 1b				/* prefetch abort */
+1:	b 1b				/* data abort */
+1:	b 1b				/* (reserved) */
+1:	b 1b				/* irq (interrupt) */
+1:	b 1b				/* fiq (fast interrupt) */
+#endif
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index cabe4d2..112403e 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -33,31 +33,6 @@ void __naked __section(.text_entry) start(void)
 	barebox_arm_head();
 }
 
-void __naked __section(.text_exceptions) exception_vectors(void)
-{
-	__asm__ __volatile__ (
-		".arm\n"
-		"b reset\n"				/* reset */
-#ifdef CONFIG_ARM_EXCEPTIONS
-		"ldr pc, =undefined_instruction\n"	/* undefined instruction */
-		"ldr pc, =software_interrupt\n"		/* software interrupt (SWI) */
-		"ldr pc, =prefetch_abort\n"		/* prefetch abort */
-		"ldr pc, =data_abort\n"			/* data abort */
-		"1: b 1b\n"				/* (reserved) */
-		"ldr pc, =irq\n"			/* irq (interrupt) */
-		"ldr pc, =fiq\n"			/* fiq (fast interrupt) */
-#else
-		"1: b 1b\n"				/* undefined instruction */
-		"1: b 1b\n"				/* software interrupt (SWI) */
-		"1: b 1b\n"				/* prefetch abort */
-		"1: b 1b\n"				/* data abort */
-		"1: b 1b\n"				/* (reserved) */
-		"1: b 1b\n"				/* irq (interrupt) */
-		"1: b 1b\n"				/* fiq (fast interrupt) */
-#endif
-	);
-}
-
 /*
  * The actual reset vector. This code is position independent and usually
  * does not run at the address it's linked at.
-- 
1.7.10.4



From s.hauer at pengutronix.de  Mon Jul 23 18:10:29 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 24 Jul 2012 00:10:29 +0200
Subject: [PATCH] ARM/Samsung: more clean up...
In-Reply-To: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
References: <1342812585-22017-1-git-send-email-jbe@pengutronix.de>
Message-ID: <20120723221029.GQ24458@pengutronix.de>

Hi J?rgen,

On Fri, Jul 20, 2012 at 09:29:36PM +0200, Juergen Beisert wrote:
> ...in preparation to add the S3C6410 SoC support.
> 
> Mostly simplifying the Samsung serial driver and some more cosmetic.
> 
> Comments are welcome.

Applied up to 6/9

Thanks
 Sascha

> 
> Regards,
> Juergen
> 
> The following changes since commit b47220d7f70df9191fc456dbcaeaa6ead72c6c02:
> 
>   NAND/Samsung: remove a leftover from architeture clean ups (2012-07-20 08:41:35 +0200)
> 
> are available in the git repository at:
> 
>   git://git.pengutronix.de/git/jbe/barebox.git master_samsung_clean_up
> 
> for you to fetch changes up to fc361ff7de449f9bb8a7653a5705621320d84560:
> 
>   Samsung/serial: make the clock source configureable (2012-07-20 21:16:02 +0200)
> 
> ----------------------------------------------------------------
> Juergen Beisert (9):
>       ARM/Samsung: List only really supported S3C24xx SoCs
>       ARM/Samsung: follow the name style of the other source files in this directory
>       Samsung/serial: remove more ugly ifdef lines
>       Samsung/serial: make the code more readable
>       Samsung/serial: there is no need to ifdef these register defines
>       Samsung/serial: there is no need to ifdef the slot table
>       Samsung/serial: move the decision about an improved UART into Kconfig
>       Samsung/serial: unify UCON register settings
>       Samsung/serial: make the clock source configureable
> 
>  arch/arm/Kconfig                                   |    2 +-
>  arch/arm/mach-samsung/Kconfig                      |    5 ++
>  arch/arm/mach-samsung/Makefile                     |    3 +-
>  .../{s3c24xx-clocks.c => clocks-s3c24xx.c}         |    0
>  arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h  |    5 +-
>  drivers/serial/serial_s3c.c                        |   71 +++++++++++---------
>  6 files changed, 48 insertions(+), 38 deletions(-)
>  rename arch/arm/mach-samsung/{s3c24xx-clocks.c => clocks-s3c24xx.c} (100%)
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 23 18:14:01 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 24 Jul 2012 00:14:01 +0200
Subject: [PATCH] i.MX53 boards: notify clocksource after init_lowlevel
In-Reply-To: <500D3E7D.8040006@kiwigrid.com>
References: <500D3E7D.8040006@kiwigrid.com>
Message-ID: <20120723221401.GF30009@pengutronix.de>

Hi Wjatscheslaw,

On Mon, Jul 23, 2012 at 02:07:25PM +0200, Wjatscheslaw Stoljarski (Slawa) wrote:
> 

> From 4d9a8e960654c02205cf4a8e47b4e86cac4b2a95 Mon Sep 17 00:00:00 2001
> From: "Wjatscheslaw Stoljarski" <wjatscheslaw.stoljarski at kiwigrid.com>
> Date: Mon, 23 Jul 2012 13:48:07 +0200
> Subject: [PATCH] i.MX53 boards: notify clocksource after init_lowlevel
> 
> @@ -215,6 +216,7 @@ static int loco_console_init(void)
>  	mxc_iomux_v3_setup_multiple_pads(loco_pads, ARRAY_SIZE(loco_pads));
>  
>  	imx53_init_lowlevel(1000);
> +	clock_notifier_call_chain();
>  

Maybe better add it to imx53_init_lowlevel?

Sascha

>  	imx53_add_uart0();
>  	return 0;
> diff --git a/arch/arm/boards/freescale-mx53-smd/board.c b/arch/arm/boards/freescale-mx53-smd/board.c
> index 0483103..74b38bd 100644
> --- a/arch/arm/boards/freescale-mx53-smd/board.c
> +++ b/arch/arm/boards/freescale-mx53-smd/board.c
> @@ -22,6 +22,7 @@
>  #include <init.h>
>  #include <nand.h>
>  #include <net.h>
> +#include <notifier.h>
>  #include <partition.h>
>  #include <sizes.h>
>  
> @@ -161,6 +162,7 @@ static int smd_console_init(void)
>  	mxc_iomux_v3_setup_multiple_pads(smd_pads, ARRAY_SIZE(smd_pads));
>  
>  	imx53_init_lowlevel(1000);
> +	clock_notifier_call_chain();
>  
>  	imx53_add_uart0();
>  	imx53_add_uart1();
> diff --git a/arch/arm/boards/tqma53/board.c b/arch/arm/boards/tqma53/board.c
> index 8c3d855..c4837cb 100644
> --- a/arch/arm/boards/tqma53/board.c
> +++ b/arch/arm/boards/tqma53/board.c
> @@ -21,6 +21,7 @@
>  #include <init.h>
>  #include <nand.h>
>  #include <net.h>
> +#include <notifier.h>
>  #include <partition.h>
>  #include <sizes.h>
>  #include <mci.h>
> @@ -265,6 +266,7 @@ static int tqma53_console_init(void)
>  {
>  	mxc_iomux_v3_setup_multiple_pads(tqma53_pads, ARRAY_SIZE(tqma53_pads));
>  	imx53_init_lowlevel(800);
> +	clock_notifier_call_chain();
>  	imx53_add_uart0();
>  
>  	return 0;
> -- 
> 1.7.9.5
> 

> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From wjatscheslaw.stoljarski at kiwigrid.com  Tue Jul 24 05:11:51 2012
From: wjatscheslaw.stoljarski at kiwigrid.com (Wjatscheslaw Stoljarski (Slawa))
Date: Tue, 24 Jul 2012 11:11:51 +0200
Subject: [PATCH] Add JTAG bitbang driver
Message-ID: <500E66D7.5030002@kiwigrid.com>


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From jbe at pengutronix.de  Tue Jul 24 05:24:48 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 24 Jul 2012 11:24:48 +0200
Subject: [PATCH] ARM/Samsung: remaining clean up...
In-Reply-To: <20120723064121.GW30009@pengutronix.de>
References: <20120723064121.GW30009@pengutronix.de>
Message-ID: <1343121891-1643-1-git-send-email-jbe@pengutronix.de>

...in preparation to add the S3C6410 SoC support.

Mostly simplifying the Samsung serial driver and some more cosmetic. These
patches are a re-work and re-send of the remaining ones not yet included from
the previous "ARM/Samsung: more clean up..." series.

The patches 1/3 and 3/3 base on the current "next", because they touch code
for the new S5Pxx SoCs.

jbe



From jbe at pengutronix.de  Tue Jul 24 05:24:50 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 24 Jul 2012 11:24:50 +0200
Subject: [PATCH 2/3] Samsung/serial: unify UCON register settings
In-Reply-To: <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
References: <20120723064121.GW30009@pengutronix.de>
 <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343121891-1643-3-git-send-email-jbe@pengutronix.de>

This should work on S3C24XX and S3C64XX SoCs.

Tested at runtime on a Mini2440 and Mini6410.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |   10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 877ccd2..96fe847 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -102,9 +102,13 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	/* Normal,No parity,1 stop,8 bit */
 	writeb(0x03, base + ULCON);
 
-	/* tx=level,rx=edge,disable timeout int.,enable rx error int.,
-	 * normal, interrupt or polling, no pre-divider */
-	writew(0x0245 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
+	/*
+	 * S3C2440 SoC:
+	 *  - no clock divider
+	 * all SoCs:
+	 *  - enable receive and transmit mode
+	 */
+	writew(0x0005 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
 						base + UCON);
 
 	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_IMPROVED))
-- 
1.7.10.4



From jbe at pengutronix.de  Tue Jul 24 05:24:49 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 24 Jul 2012 11:24:49 +0200
Subject: [PATCH 1/3] Samsung/serial: move the decision about an improved UART
 into Kconfig
In-Reply-To: <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
References: <20120723064121.GW30009@pengutronix.de>
 <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343121891-1643-2-git-send-email-jbe@pengutronix.de>

More or less just cosmetic (removing ifdefs!).

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h |    2 --
 drivers/serial/Kconfig                            |    4 ++++
 drivers/serial/serial_s3c.c                       |   16 ++++++++--------
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
index 248f868..448e3b8 100644
--- a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h
@@ -45,8 +45,6 @@
 #define S3C_UART2_SIZE 0x400
 #define S3C_UART3_BASE (S3C_UART_BASE + 0x800)
 #define S3C_UART3_SIZE 0x400
-#define S3C_UART_HAS_UBRDIVSLOT
-#define S3C_UART_HAS_UINTM
 
 #define S5P_DMC0_BASE 0xF0000000
 #define S5P_DMC1_BASE 0xF1400000
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index a9383da..2b9a9b9 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -78,9 +78,13 @@ config DRIVER_SERIAL_PL010
 	help
 	  Enable this to get support for AMBA PL010 based serial devices
 
+config DRIVER_SERIAL_S3C_IMPROVED
+	bool
+
 config DRIVER_SERIAL_S3C
 	bool "Samsung S3C serial driver"
 	depends on ARCH_SAMSUNG
+	select DRIVER_SERIAL_S3C_IMPROVED if (CPU_S5PC110 || CPU_S5PV210)
 	default y
 	help
 	  Say Y here if you want to use the CONS on a Samsung S3C CPU
diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 2cb2eef..877ccd2 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -79,10 +79,11 @@ static int s3c_serial_setbaudrate(struct console_device *cdev, int baudrate)
 	void __iomem *base = priv->regs;
 	unsigned val;
 
-#ifdef S3C_UART_HAS_UBRDIVSLOT
-	val = s3c_get_arch_uart_input_clock(base) / baudrate;
-	writew(udivslot_table[val & 15], base + UBRDIVSLOT);
-#endif
+	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_IMPROVED)) {
+		val = s3c_get_arch_uart_input_clock(base) / baudrate;
+		writew(udivslot_table[val & 15], base + UBRDIVSLOT);
+	}
+
 	val = s3c_get_arch_uart_input_clock(base) / (16 * baudrate) - 1;
 	writew(val, base + UBRDIV);
 
@@ -106,10 +107,9 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	writew(0x0245 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
 						base + UCON);
 
-#ifdef S3C_UART_HAS_UINTM
-	/* 'interrupt or polling mode' for both directions */
-	writeb(0xf, base + UINTM);
-#endif
+	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_IMPROVED))
+		/* 'interrupt or polling mode' for both directions */
+		writeb(0xf, base + UINTM);
 
 	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC))
 		writeb(0x10, base + UMCON); /* enable auto flow control */
-- 
1.7.10.4



From jbe at pengutronix.de  Tue Jul 24 05:24:51 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 24 Jul 2012 11:24:51 +0200
Subject: [PATCH 3/3] Samsung/serial: make the clock source configureable
In-Reply-To: <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
References: <20120723064121.GW30009@pengutronix.de>
 <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343121891-1643-4-git-send-email-jbe@pengutronix.de>

Instead of taking the value from somewhere, use the selected architecture to
select one. This ensures the selected clock source corresponds to the values
setup in the clocks-*.c from the mach directory.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 drivers/serial/serial_s3c.c |   18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c
index 96fe847..0a7b137 100644
--- a/drivers/serial/serial_s3c.c
+++ b/drivers/serial/serial_s3c.c
@@ -45,11 +45,6 @@
 #define UBRDIVSLOT 0x2c		/* baudrate slot generator */
 #define UINTM 0x38		/* interrupt mask register */
 
-#ifndef S3C_UART_CLKSEL
-/* Use pclk */
-# define S3C_UART_CLKSEL 0
-#endif
-
 struct s3c_uart {
 	void __iomem *regs;
 	struct console_device cdev;
@@ -57,6 +52,17 @@ struct s3c_uart {
 
 #define to_s3c_uart(c)	container_of(c, struct s3c_uart, cdev)
 
+/* each architecture has a preferred reference clock for its UARTs */
+static unsigned s3c_select_arch_input_clock(void)
+{
+	/* S3C24xx: 0=2=PCLK, 1=UEXTCLK, 3=FCLK/n */
+	if (IS_ENABLED(CONFIG_ARCH_S3C24xx))
+		return 0;	/* use the internal PCLK */
+	/* S5PCxx: 0=PCLK, 1=SCLK_UART */
+	if (IS_ENABLED(CONFIG_ARCH_S5PCxx))
+		return 0;	/* use the internal PCLK */
+}
+
 static unsigned s3c_get_arch_uart_input_clock(void __iomem *base)
 {
 	unsigned reg = readw(base + UCON);
@@ -108,7 +114,7 @@ static int s3c_serial_init_port(struct console_device *cdev)
 	 * all SoCs:
 	 *  - enable receive and transmit mode
 	 */
-	writew(0x0005 | UCON_SET_CLK_SRC(S3C_UART_CLKSEL),
+	writew(0x0005 | UCON_SET_CLK_SRC(s3c_select_arch_input_clock()),
 						base + UCON);
 
 	if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_IMPROVED))
-- 
1.7.10.4



From antonynpavlov at gmail.com  Tue Jul 24 05:30:51 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Tue, 24 Jul 2012 13:30:51 +0400
Subject: [PATCH] Add JTAG bitbang driver
In-Reply-To: <500E66D7.5030002@kiwigrid.com>
References: <500E66D7.5030002@kiwigrid.com>
Message-ID: <CAA4bVAGDrLTazTqHd9t=K2dPB50ONX0sk3LRVv2Mgv_d+Ah5YA@mail.gmail.com>

Hi, Slawa!

Use 'git-send-email' for submiting patches to this maillist!

Please, do not send attached patches!

On 24 July 2012 13:11, Wjatscheslaw Stoljarski (Slawa)
<wjatscheslaw.stoljarski at kiwigrid.com> wrote:
>
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>

-- 
Best regards,
  Antony Pavlov


From t.gamez at phytec.de  Tue Jul 24 07:45:03 2012
From: t.gamez at phytec.de (=?UTF-8?q?Teresa=20G=C3=A1mez?=)
Date: Tue, 24 Jul 2012 13:45:03 +0200
Subject: [PATCH] OMAP4: small header cleanup
Message-ID: <1343130303-32201-1-git-send-email-t.gamez@phytec.de>

Use <mach/clocks.h> for OMAP4.

Signed-off-by: Teresa G?mez <t.gamez at phytec.de>
---
 arch/arm/mach-omap/include/mach/clocks.h |    3 +++
 arch/arm/mach-omap/omap4_clock.c         |    4 ++--
 arch/arm/mach-omap/omap4_generic.c       |    5 ++---
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap/include/mach/clocks.h b/arch/arm/mach-omap/include/mach/clocks.h
index 1221238..3efa057 100644
--- a/arch/arm/mach-omap/include/mach/clocks.h
+++ b/arch/arm/mach-omap/include/mach/clocks.h
@@ -44,5 +44,8 @@
 #ifdef CONFIG_ARCH_OMAP3
 #include <mach/omap3-clock.h>
 #endif
+#ifdef CONFIG_ARCH_OMAP4
+#include <mach/omap4-clock.h>
+#endif
 
 #endif /* __OMAP_CLOCKS_H_ */
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index f8bab5f..3ab01f0 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -1,7 +1,7 @@
 #include <common.h>
-#include <mach/syslib.h>
 #include <io.h>
-#include <mach/omap4-clock.h>
+#include <mach/syslib.h>
+#include <mach/clocks.h>
 
 #define LDELAY	12000000
 
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index 5092242..de69934 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -1,10 +1,9 @@
 #include <common.h>
 #include <init.h>
-#include <mach/silicon.h>
 #include <io.h>
-#include <mach/omap4-silicon.h>
+#include <mach/clocks.h>
+#include <mach/silicon.h>
 #include <mach/omap4-mux.h>
-#include <mach/omap4-clock.h>
 #include <mach/syslib.h>
 #include <mach/xload.h>
 #include <mach/gpmc.h>
-- 
1.7.0.4



From t.gamez at phytec.de  Tue Jul 24 07:44:42 2012
From: t.gamez at phytec.de (=?UTF-8?q?Teresa=20G=C3=A1mez?=)
Date: Tue, 24 Jul 2012 13:44:42 +0200
Subject: [PATCH] scripts/checkpatch.pl: reset rpt_cleaners warnings
Message-ID: <1343130282-32096-1-git-send-email-t.gamez@phytec.de>

When running checkpatch against multiple patches and one
of them has a whitespace issue, all following patches will
contain the same note, even if they are ok.

This patch is taken from the linux kernel:

scripts/checkpatch.pl: reset rpt_cleaners warnings
b0781216e7bff68aca2fbcd275b4db7531d1e22f
Written by Mike Frysinger <vapier at gentoo.org>

Signed-off-by: Teresa G?mez <t.gamez at phytec.de>
---
 scripts/checkpatch.pl |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 151c53a..0d94f98 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2934,6 +2934,7 @@ sub process {
 		if ($rpt_cleaners) {
 			print "NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or\n";
 			print "      scripts/cleanfile\n\n";
+			$rpt_cleaners = 0;
 		}
 	}
 
-- 
1.7.0.4



From wjatscheslaw.stoljarski at kiwigrid.com  Tue Jul 24 09:48:24 2012
From: wjatscheslaw.stoljarski at kiwigrid.com (Wjatscheslaw Stoljarski (Slawa))
Date: Tue, 24 Jul 2012 15:48:24 +0200
Subject: [PATCH] Add JTAG bitbang driver
Message-ID: <500EA7A8.4020603@kiwigrid.com>

Signed-off-by: Wjatscheslaw Stoljarski 
<wjatscheslaw.stoljarski at kiwigrid.com>
---
  drivers/Kconfig       |    1 +
  drivers/Makefile      |    1 +
  drivers/misc/Kconfig  |   27 ++++
  drivers/misc/Makefile |    5 +
  drivers/misc/jtag.c   |  395 
+++++++++++++++++++++++++++++++++++++++++++++++++
  include/jtag.h        |  113 ++++++++++++++
  6 files changed, 542 insertions(+)
  create mode 100644 drivers/misc/Kconfig
  create mode 100644 drivers/misc/Makefile
  create mode 100644 drivers/misc/jtag.c
  create mode 100644 include/jtag.h

diff --git a/drivers/Kconfig b/drivers/Kconfig
index c52c56a..c4d7962 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -12,6 +12,7 @@ source "drivers/video/Kconfig"
  source "drivers/mci/Kconfig"
  source "drivers/clk/Kconfig"
  source "drivers/mfd/Kconfig"
+source "drivers/misc/Kconfig"
  source "drivers/led/Kconfig"
  source "drivers/eeprom/Kconfig"
  source "drivers/input/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 3aefc12..8e692cb 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_LED) += led/
  obj-y	+= eeprom/
  obj-$(CONFIG_PWM) += pwm/
  obj-y	+= input/
+obj-y	+= misc/
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
new file mode 100644
index 0000000..122e065
--- /dev/null
+++ b/drivers/misc/Kconfig
@@ -0,0 +1,27 @@
+#
+# Misc strange devices
+#
+
+menuconfig MISC_DEVICES
+	bool "Misc devices                  "
+	default y
+	---help---
+	  Say Y here to get to see options for device drivers from various
+	  different categories. This option alone does not add any kernel code.
+
+	  If you say N, all options in this submenu will be skipped and disabled.
+
+if MISC_DEVICES
+
+config JTAG
+	tristate "Jtag Bitbang driver"
+	default n
+	---help---
+	Controls jtag chains connected to I/O pins
+
+	This driver can also be built as a module. If so, the module
+	will be called jtag.
+
+	If unsure, say N.
+
+endif # MISC_DEVICES
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
new file mode 100644
index 0000000..b085577
--- /dev/null
+++ b/drivers/misc/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for misc devices that really don't fit anywhere else.
+#
+
+obj-$(CONFIG_JTAG)		+= jtag.o
diff --git a/drivers/misc/jtag.c b/drivers/misc/jtag.c
new file mode 100644
index 0000000..1bd927b
--- /dev/null
+++ b/drivers/misc/jtag.c
@@ -0,0 +1,395 @@
+/*
+ * drivers/misc/jtag.c - More infos in include/jtag.h
+ *
+ * Written Aug 2009 by Davide Rizzo <elpa.rizzo at gmail.com>
+ *
+ * Ported to barebox Jul 2012 by
+ *       Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski at kiwigrid.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <fs.h>
+#include <errno.h>
+#include <linux/list.h>
+#include <jtag.h>
+#include <gpio.h>
+#include <driver.h>
+#include <malloc.h>
+#include <common.h>
+#include <init.h>
+#include <ioctl.h>
+#include <io.h>
+
+#define VERSION_MAJ 1
+#define VERSION_MIN 0
+
+/* Max devices in the jtag chain */
+#define MAX_DEVICES 16
+
+static LIST_HEAD(jtag_device_list);
+
+struct jtag_info {
+	struct jtag_platdata *pdata;
+	struct cdev cdev;
+	unsigned int devices; /* Number of devices found in the jtag chain */
+	struct list_head device_entry;
+	/* Instruction register length of every device in the chain */
+	unsigned int ir_len[];	/* [devices] */
+};
+
+static const unsigned long bypass = 0xFFFFFFFF;
+
+static void pulseTMS0(const struct jtag_platdata *pdata)
+{
+	gpio_set_value(pdata->pin_tms, 0);
+	gpio_set_value(pdata->pin_tclk, 0);
+	gpio_set_value(pdata->pin_tclk, 1);
+}
+
+static void pulseTMS1(const struct jtag_platdata *pdata)
+{
+	gpio_set_value(pdata->pin_tms, 1);
+	gpio_set_value(pdata->pin_tclk, 0);
+	gpio_set_value(pdata->pin_tclk, 1);
+}
+
+static void jtag_reset(const struct jtag_platdata *pdata)
+{
+	gpio_set_value(pdata->pin_tms, 1);
+	gpio_set_value(pdata->pin_tclk, 0);
+	gpio_set_value(pdata->pin_tclk, 1);
+	gpio_set_value(pdata->pin_tclk, 0);
+	gpio_set_value(pdata->pin_tclk, 1);
+	gpio_set_value(pdata->pin_tclk, 0);
+	gpio_set_value(pdata->pin_tclk, 1);
+	gpio_set_value(pdata->pin_tclk, 0);
+	gpio_set_value(pdata->pin_tclk, 1);
+	gpio_set_value(pdata->pin_tclk, 0);
+	gpio_set_value(pdata->pin_tclk, 1);
+}
+
+static void jtag_output(const struct jtag_platdata *pdata,
+	const unsigned long *data, unsigned int bitlen, int notlast)
+{
+	unsigned int a;
+	unsigned long mask;
+	gpio_set_value(pdata->pin_tms, 0);
+	while (bitlen > 0) {
+		for (a = *data++, mask = 0x00000001; mask != 0 && bitlen > 0;
+		      mask <<= 1, bitlen--) {
+			gpio_set_value(pdata->pin_tdo, (a & mask) ? 1 : 0);
+			if ((bitlen == 1) && !notlast)
+				gpio_set_value(pdata->pin_tms, 1);
+			gpio_set_value(pdata->pin_tclk, 0);
+			gpio_set_value(pdata->pin_tclk, 1);
+		}
+	}
+}
+
+static int jtag_ioctl(struct cdev *inode, int cmd, void *arg)
+{
+	int ret = 0;
+	struct jtag_info *info = (struct jtag_info *)inode->priv;
+	int devices = info->devices;
+	struct jtag_cmd *jcmd = (struct jtag_cmd *)arg;
+	struct jtag_platdata *pdata = info->pdata;
+
+	if (_IOC_TYPE(cmd) != JTAG_IOC_MAGIC) return -ENOTTY;
+	if (_IOC_NR(cmd) > JTAG_IOC_MAXNR) return -ENOTTY;
+
+	switch (cmd) {
+
+	case JTAG_GET_DEVICES:
+		/* Returns how many devices found in the chain */
+		ret = info->devices;
+		break;
+
+	case JTAG_GET_ID:
+		/* Returns ID register of selected device */
+		if ((((struct jtag_rd_id *)arg)->device < 0) ||
+			(((struct jtag_rd_id *)arg)->device >= devices)) {
+			ret = -EINVAL;
+			break;
+		}
+		jtag_reset(pdata);
+		pulseTMS0(pdata);
+		pulseTMS1(pdata);
+		pulseTMS0(pdata);
+		pulseTMS0(pdata);
+		while (devices-- > 0) {
+			unsigned long id = 0;
+			pulseTMS0(pdata);
+			if (gpio_get_value(pdata->pin_tdi)) {
+				unsigned long mask;
+				for (id = 1, mask = 0x00000002; (mask != 0);
+				      mask <<= 1) {
+					pulseTMS0(pdata);
+					if (gpio_get_value(pdata->pin_tdi))
+						id |= mask;
+				}
+			}
+			if (devices == ((struct jtag_rd_id *)arg)->device) {
+				((struct jtag_rd_id *)arg)->id = id;
+				ret = 0;
+				break;
+			}
+		}
+		jtag_reset(pdata);
+		break;
+
+	case JTAG_SET_IR_LENGTH:
+		/* Sets up IR length of one device */
+		if ((jcmd->device >= 0) && (jcmd->device < devices))
+			info->ir_len[jcmd->device] = jcmd->bitlen;
+		else
+			ret = -EINVAL;
+		break;
+
+	case JTAG_RESET:
+		/* Resets all JTAG states */
+		jtag_reset(pdata);
+		break;
+
+	case JTAG_IR_WR:
+		/* Writes Instruction Register
+		If device == -1 writes same Instruction Register in all devices
+		If device >= 0 writes Instruction Register in selected device
+		 and loads BYPASS instruction in all others */
+		if ((jcmd->device < -1) || (jcmd->device >= devices)) {
+			ret = -EINVAL;
+			break;
+		}
+		pulseTMS0(pdata);
+		pulseTMS1(pdata);
+		pulseTMS1(pdata);
+		pulseTMS0(pdata);
+		pulseTMS0(pdata);
+		while (devices-- > 0) {
+			if ((jcmd->device == -1) || (jcmd->device == devices))
+				/* Loads desired instruction */
+				jtag_output(pdata, jcmd->data,
+					info->ir_len[devices], devices);
+			else
+				/* Loads BYPASS instruction */
+				jtag_output(pdata, &bypass,
+					info->ir_len[devices], devices);
+		}
+		pulseTMS1(pdata);
+		pulseTMS0(pdata);
+		break;
+
+	case JTAG_DR_WR:
+		/* Writes Data Register of all devices
+		If device == -1 writes same Data Register in all devices
+		If device >= 0 writes Data Register in selected device
+		 and loads BYPASS instruction in all others */
+		if ((jcmd->device < -1) || (jcmd->device >= devices)) {
+			ret = -EINVAL;
+			break;
+		}
+		pulseTMS0(pdata);
+		pulseTMS1(pdata);
+		pulseTMS0(pdata);
+		pulseTMS0(pdata);
+		while (devices-- > 0) {
+			if ((jcmd->device == -1) || (devices == jcmd->device))
+				/* Loads desired data */
+				jtag_output(pdata, jcmd->data, jcmd->bitlen,
+					devices);
+			else
+				/* Loads 1 dummy bit in BYPASS data register */
+				jtag_output(pdata, &bypass, 1, devices);
+		}
+		pulseTMS1(pdata);
+		pulseTMS0(pdata);
+		break;
+
+	case JTAG_DR_RD:
+		/* Reads data register of selected device */
+		if ((jcmd->device < 0) || (jcmd->device >= devices))
+			ret = -EINVAL;
+		else {
+			unsigned long mask;
+			int bitlen = jcmd->bitlen;
+			unsigned long *data = jcmd->data;
+			pulseTMS0(pdata);
+			pulseTMS1(pdata);
+			pulseTMS0(pdata);
+			pulseTMS0(pdata);
+			devices -= (jcmd->device + 1);
+			while (devices-- > 0)
+				pulseTMS0(pdata);
+			while (bitlen > 0) {
+				for (*data = 0, mask = 0x00000001;
+				      (mask != 0) && (bitlen > 0);
+				      mask <<= 1, bitlen--) {
+					if (bitlen == 1)
+						pulseTMS1(pdata);
+					else
+						pulseTMS0(pdata);
+					if (gpio_get_value(pdata->pin_tdi))
+						*data |= mask;
+				}
+				data++;
+			}
+			pulseTMS1(pdata);
+			pulseTMS0(pdata);
+		}
+		break;
+
+	case JTAG_CLK:
+		/* Generates arg clock pulses */
+		gpio_set_value(pdata->pin_tms, 0);
+		while ((*(unsigned int *) arg)--) {
+			gpio_set_value(pdata->pin_tclk, 0);
+			gpio_set_value(pdata->pin_tclk, 1);
+		}
+		break;
+
+	default:
+		ret = -EFAULT;
+	}
+
+	return ret;
+}
+
+struct file_operations jtag_operations = {
+	.ioctl = jtag_ioctl,
+};
+
+static int jtag_probe(struct device_d *pdev)
+{
+	int i, ret;
+	struct jtag_info *info;
+	struct jtag_platdata *pdata = pdev->platform_data;
+
+	/* Setup gpio pins */
+	gpio_direction_output(pdata->pin_tms, 0);
+	gpio_direction_output(pdata->pin_tclk, 1);
+	gpio_direction_output(pdata->pin_tdo, 0);
+	gpio_direction_input(pdata->pin_tdi);
+	if (pdata->use_pin_trst) {
+		/* Keep fixed at 1 because some devices in the chain could
+			not use it, to reset chain use jtag_reset() */
+		gpio_direction_output(pdata->pin_trst, 1);
+	}
+
+	/* Find how many devices in chain */
+	jtag_reset(pdata);
+	pulseTMS0(pdata);
+	pulseTMS1(pdata);
+	pulseTMS1(pdata);
+	pulseTMS0(pdata);
+	pulseTMS0(pdata);
+	gpio_set_value(pdata->pin_tdo, 1);
+	/* Fills all IR with bypass instruction */
+	for (i = 0; i < 32 * MAX_DEVICES; i++)
+		pulseTMS0(pdata);
+	pulseTMS1(pdata);
+	pulseTMS1(pdata);
+	pulseTMS1(pdata);
+	pulseTMS0(pdata);
+	pulseTMS0(pdata);
+	gpio_set_value(pdata->pin_tdo, 0);
+	/* Fills all 1-bit bypass register with 0 */
+	for (i = 0; i < MAX_DEVICES + 2; i++)
+		pulseTMS0(pdata);
+	gpio_set_value(pdata->pin_tdo, 1);
+	/* Counts chain's bit length */
+	for (i = 0; i < MAX_DEVICES + 1; i++) {
+		pulseTMS0(pdata);
+		if (gpio_get_value(pdata->pin_tdi))
+			break;
+	}
+	dev_notice(pdev, "%d devices found in chain\n", i);
+
+	/* Allocate structure with chain specific infos */
+	info = xzalloc(sizeof(struct jtag_info) + sizeof(info->ir_len[0]) * i);
+	if (!info) {
+		dev_err(pdev, "out of kernel memory\n");
+		return -ENOMEM;
+	}
+	info->devices = i;
+	INIT_LIST_HEAD(&info->device_entry);
+	list_add(&info->device_entry, &jtag_device_list);
+	info->pdata = pdata;
+	pdev->priv = info;
+
+	info->cdev.name = JTAG_NAME;
+	info->cdev.dev = pdev;
+	info->cdev.ops = &jtag_operations;
+	info->cdev.priv = info;
+	ret = devfs_create(&info->cdev);
+
+	if (ret)
+		goto fail_devfs_create;
+
+	return 0;
+
+fail_devfs_create:
+	pdev->priv = NULL;
+	free(info);
+	return ret;
+}
+
+static void jtag_info(struct device_d *pdev)
+{
+	int dn, ret;
+	struct jtag_rd_id jid;
+	struct jtag_info *info = pdev->priv;
+
+	printf(" JTAG:\n");
+	printf("  Devices found: %d\n", info->devices);
+	for(dn = 0; dn < info->devices; dn++) {
+		jid.device = dn;
+		ret = jtag_ioctl(&info->cdev, JTAG_GET_ID, &jid);
+		printf("  Device number: %d\n", dn);
+		if ( ret == -1 )
+			printf("   JTAG_GET_ID failed: %s\n", strerror(errno));
+		else
+			printf("   ID: 0x%lX\n", jid.id);
+	}
+}
+
+static void jtag_remove(struct device_d *pdev)
+{
+	struct jtag_info *info = (struct jtag_info *) pdev->priv;
+
+	list_del(&info->device_entry);
+	devfs_remove(&info->cdev);
+	pdev->priv = NULL;
+	free(info);
+	dev_notice(pdev, "Device removed\n");
+}
+
+static struct driver_d jtag_driver = {
+	.name = JTAG_NAME,
+	.probe = jtag_probe,
+	.remove = jtag_remove,
+	.info = jtag_info,
+};
+
+static int jtag_module_init(void)
+{
+	return register_driver(&jtag_driver);
+}
+
+device_initcall(jtag_module_init);
+
+MODULE_AUTHOR("Davide Rizzo <elpa.rizzo at gmail.com>");
+MODULE_AUTHOR("Wjatscheslaw Stoljarski 
<wjatscheslaw.stoljarski at kiwigrid.com>");
+MODULE_DESCRIPTION("JTAG bitbang driver");
+MODULE_LICENSE("GPL");
diff --git a/include/jtag.h b/include/jtag.h
new file mode 100644
index 0000000..d8f0606
--- /dev/null
+++ b/include/jtag.h
@@ -0,0 +1,113 @@
+/*
+ * include/linux/jtag.h
+ *
+ * Written Aug 2009 by Davide Rizzo <elpa.rizzo at gmail.com>
+ * Ported to barebox Jul 2012 by
+ *       Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski at kiwigrid.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * This driver manages one or more jtag chains controlled by host pins.
+ * Jtag chains must be defined during setup using jtag_platdata structs.
+ * All operations must be done from user programs using ioctls to /dev/jtag
+ * Typical operation sequence is:
+ * - open() the device (normally /dev/jtag)
+ * - ioctl JTAG_GET_DEVICES reads how many devices in the chain
+ * (repeat for each chip in the chain)
+ * - ioctl JTAG_GET_ID identifies the chip
+ * - ioctl JTAG_SET_IR_LENGTH sets the instruction register length
+ * Before accessing the data registers, instruction registers' lenghtes
+ *  MUST be programmed for all chips.
+ * After this initialization, you can execute JTAG_IR_WR, JTAG_DR_RD, 
JTAG_DR_WR
+ *  commands in any sequence.
+ */
+
+#ifndef __JTAG_H__
+#define __JTAG_H__
+
+#ifdef __KERNEL__
+/* Controller's pin_tdi must be connected to last device's pin_tdo */
+/* Controller's pin_tdo must be connected to first device's pin_tdi */
+struct jtag_platdata {
+	unsigned int pin_tclk;
+	unsigned int pin_tms;
+	unsigned int pin_tdi;
+	unsigned int pin_tdo;
+	unsigned int pin_trst;
+	int use_pin_trst;
+};
+#endif /* __KERNEL__ */
+
+#define JTAG_NAME "jtag"
+
+/* structures used for passing arguments to ioctl */
+
+struct jtag_rd_id {
+	int device; /* Device in the chain */
+	unsigned long id;
+};
+
+struct jtag_cmd {
+	int device; /* Device in the chain (-1 = all devices) */
+	unsigned int bitlen; /* Bit length of the register to be transfered */
+	unsigned long *data; /* Data to be transfered */
+};
+
+/* Use 'j' as magic number */
+#define JTAG_IOC_MAGIC		'j'
+
+/* ioctl commands */
+
+/* Resets jtag chain status, arg is ignored */
+#define JTAG_RESET		_IO(JTAG_IOC_MAGIC, 0)
+
+/* Returns the number of devices in the jtag chain, arg is ignored. */
+#define JTAG_GET_DEVICES	_IO(JTAG_IOC_MAGIC, 1)
+
+/* arg must point to a jtag_rd_id structure.
+   Fills up the id field with ID of selected device */
+#define JTAG_GET_ID		_IOR(JTAG_IOC_MAGIC, 2, struct jtag_rd_id)
+
+/* arg must point to a struct jtag_cmd.
+   Programs the Instruction Register length of specified device at 
bitlen value.
+   *data is ignored. */
+#define JTAG_SET_IR_LENGTH	_IOW(JTAG_IOC_MAGIC, 3, struct jtag_rd_id)
+
+/* arg must point to a struct jtag_cmd.
+   Writes *data in the Instruction Register of selected device, and BYPASS
+    instruction into Instruction Registers of all other devices in the 
chain.
+   If device == -1, the Instruction Registers of all devices are programmed
+    to the same value.
+   bitlen is always ignored, before using this command you have to 
program all
+    Instruction Register's lengthes with JTAG_SET_IR_LENGTH command. */
+#define JTAG_IR_WR		_IOW(JTAG_IOC_MAGIC, 4, struct jtag_cmd)
+
+/* arg must point to a struct jtag_cmd.
+   Reads data register of selected device, with length bitlen */
+#define JTAG_DR_RD		_IOR(JTAG_IOC_MAGIC, 5, struct jtag_cmd)
+
+/* arg must point to a struct jtag_cmd.
+   Writes data register of selected device, with length bitlen.
+   If device == -1, writes same data on all devices. */
+#define JTAG_DR_WR		_IOW(JTAG_IOC_MAGIC, 6, struct jtag_cmd)
+
+/* Generates arg pulses on TCLK pin */
+#define JTAG_CLK		_IOW(JTAG_IOC_MAGIC, 7, unsigned int)
+
+#define JTAG_IOC_MAXNR		9
+
+#endif /* __JTAG_H__ */
-- 
1.7.9.5



From wjatscheslaw.stoljarski at kiwigrid.com  Tue Jul 24 09:50:08 2012
From: wjatscheslaw.stoljarski at kiwigrid.com (Wjatscheslaw Stoljarski (Slawa))
Date: Tue, 24 Jul 2012 15:50:08 +0200
Subject: [PATCH] ARM i.MX53: notify clocksource about changing clock
Message-ID: <500EA810.3050902@kiwigrid.com>

This fix a clock inaccuracy in get_time_ns (used by sleep, time, etc).

At i.MX53 power-on GPT clock is typically 55500000 Hz, and it will be used
to calc the clock multiplier. After call imx53_init_lowlevel() GPT clock 
will
changed (e.g. to 66666666 Hz), but multiplier not. To fix this behavior call
clock_notifier_call_chain() after changing clock in imx53_init_lowlevel().

Signed-off-by: Wjatscheslaw Stoljarski 
<wjatscheslaw.stoljarski at kiwigrid.com>
---
  arch/arm/mach-imx/imx53.c |    3 +++
  1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
index e20b60a..3359819 100644
--- a/arch/arm/mach-imx/imx53.c
+++ b/arch/arm/mach-imx/imx53.c
@@ -18,6 +18,7 @@
  #include <init.h>
  #include <common.h>
  #include <io.h>
+#include <notifier.h>
  #include <sizes.h>
  #include <mach/imx5.h>
  #include <mach/imx-regs.h>
@@ -211,4 +212,6 @@ void imx53_init_lowlevel(unsigned int cpufreq_mhz)
  	writel(0xffffffff, ccm + MX53_CCM_CCGR7);
   	writel(0, ccm + MX5_CCM_CCDR);
+
+	clock_notifier_call_chain();
  }
-- 
1.7.9.5



From j.weitzel at phytec.de  Tue Jul 24 10:39:55 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Tue, 24 Jul 2012 16:39:55 +0200
Subject: [PATCH 2/3] OMAP GPMC NAND: add set_buswidth callback
In-Reply-To: <1343140796-21934-1-git-send-email-j.weitzel@phytec.de>
References: <1343140796-21934-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1343140796-21934-3-git-send-email-j.weitzel@phytec.de>

If buswidth is not configured in platformdata (=0) set NAND_BUSWIDTH_UNKNOWN
flag to allow nand_base to autodetect the setting.

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/mach-omap/devices-gpmc-nand.c |    8 ++---
 arch/arm/mach-omap/gpmc.c              |   19 ++++++++++++++
 arch/arm/mach-omap/include/mach/gpmc.h |    8 ++++++
 drivers/mtd/nand/nand_omap_gpmc.c      |   43 ++++++++++++++++++++++++++++---
 4 files changed, 68 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
index 54625ca..8a867f6 100644
--- a/arch/arm/mach-omap/devices-gpmc-nand.c
+++ b/arch/arm/mach-omap/devices-gpmc-nand.c
@@ -36,9 +36,6 @@
 #include <mach/gpmc.h>
 #include <mach/gpmc_nand.h>
 
-#define GPMC_CONF1_VALx8	0x00000800
-#define GPMC_CONF1_VALx16	0x00001800
-
 /** NAND platform specific settings settings */
 static struct gpmc_nand_platform_data nand_plat = {
 	.cs = 0,
@@ -57,9 +54,10 @@ int gpmc_generic_nand_devices_init(int cs, int width,
 	nand_plat.cs = cs;
 
 	if (width == 16)
-		nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
+		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+					GPMC_CONFIG1_DEVICESIZE_16;
 	else
-		nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
+		nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
 
 	nand_plat.device_width = width;
 	nand_plat.ecc_mode = eccmode;
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index 92a8ae0..b3fa56c 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -125,3 +125,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
 	mdelay(1);		/* Settling time */
 }
 EXPORT_SYMBOL(gpmc_cs_config);
+
+void gpmc_get_config(char cs, struct gpmc_config *config)
+{
+	unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
+	unsigned int cfg7;
+	unsigned char i;
+
+	/* Read the CFG1-6 regs */
+	for (i = 0; i < 6; i++) {
+		config->cfg[i] = readl(reg);
+		reg += GPMC_CONFIG_REG_OFF;
+	}
+
+	cfg7 = readl(reg);
+
+	config->size = (cfg7 >> 8) & 0xf;
+	config->base = (cfg7 & 0x3F) << 24;
+}
+EXPORT_SYMBOL(gpmc_get_config);
diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
index 3ddc5f5..84260fc 100644
--- a/arch/arm/mach-omap/include/mach/gpmc.h
+++ b/arch/arm/mach-omap/include/mach/gpmc.h
@@ -140,6 +140,11 @@
 
 #define NAND_WP_BIT		0x00000010
 
+#define GPMC_CONFIG1_DEVICESIZE(val)	((val & 3) << 12)
+#define GPMC_CONFIG1_DEVICESIZE_16	GPMC_CONFIG1_DEVICESIZE(1)
+#define GPMC_CONFIG1_DEVICETYPE(val)	((val & 3) << 10)
+#define GPMC_CONFIG1_DEVICETYPE_NAND	GPMC_CONFIG1_DEVICETYPE(2)
+
 #ifndef __ASSEMBLY__
 
 /** Generic GPMC configuration structure to be used to configure a
@@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
 /** Configuration for a specific chip select */
 void gpmc_cs_config(char cs, struct gpmc_config *config);
 
+/** Get Configuration for a specific chip select */
+void gpmc_get_config(char cs, struct gpmc_config *config);
+
 #endif
 
 #endif /* __ASM_ARCH_OMAP_GPMC_H */
diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
index d55dcaa..63aae81 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -803,6 +803,28 @@ static int omap_gpmc_eccmode_set(struct device_d *dev, struct param_d *param, co
 	return omap_gpmc_eccmode(oinfo, i);
 }
 
+static int gpmc_set_buswidth(struct mtd_info *mtd, struct nand_chip *nand)
+{
+	struct gpmc_nand_info *oinfo = nand->priv;
+	struct gpmc_nand_platform_data *pdata = oinfo->pdata;
+	struct gpmc_config cfg;
+
+	gpmc_get_config(oinfo->gpmc_cs, &cfg);
+
+	if (nand->options & NAND_BUSWIDTH_16)
+		cfg.cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+				GPMC_CONFIG1_DEVICESIZE_16;
+	else
+		cfg.cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
+
+	pdata->device_width = (nand->options & NAND_BUSWIDTH_16) ? 16 : 8;
+	dev_dbg(oinfo->pdev, "set buswidth to %d bit\n", pdata->device_width);
+
+	gpmc_cs_config(oinfo->gpmc_cs, &cfg);
+
+	return 0;
+}
+
 /**
  * @brief nand device probe.
  *
@@ -836,6 +858,7 @@ static int gpmc_nand_probe(struct device_d *pdev)
 
 	nand = &oinfo->nand;
 	nand->priv = (void *)oinfo;
+	nand->set_buswidth = gpmc_set_buswidth;
 
 	minfo = &oinfo->minfo;
 	minfo->priv = (void *)nand;
@@ -854,14 +877,23 @@ static int gpmc_nand_probe(struct device_d *pdev)
 	oinfo->gpmc_address = (void *)(cs_base + GPMC_CS_NAND_ADDRESS);
 	oinfo->gpmc_data = (void *)(cs_base + GPMC_CS_NAND_DATA);
 	oinfo->timeout = pdata->max_timeout;
-	dev_dbg(pdev, "GPMC base=0x%p cmd=0x%p address=0x%p data=0x%p cs_base=0x%p\n",
+	dev_dbg(pdev, "GPMC base=0x%p cmd=0x%p address=0x%p data=0x%p "
+		"cs_base=0x%p buswidth=%d\n",
 		oinfo->gpmc_base, oinfo->gpmc_command, oinfo->gpmc_address,
-		oinfo->gpmc_data, cs_base);
+		oinfo->gpmc_data, cs_base, pdata->device_width);
 
-	/* If we are 16 bit dev, our gpmc config tells us that */
-	if ((readl(cs_base) & 0x3000) == 0x1000) {
-		dev_dbg(pdev, "16 bit dev\n");
+	switch (pdata->device_width) {
+	case 0:
+		nand->options |= NAND_BUSWIDTH_UNKNOWN;
+		break;
+	case 8:
+		break;
+	case 16:
 		nand->options |= NAND_BUSWIDTH_16;
+		break;
+	default:
+		err = -EINVAL;
+		goto out_release_mem;
 	}
 
 	/* Same data register for in and out */
@@ -938,6 +970,7 @@ static int gpmc_nand_probe(struct device_d *pdev)
 		llp = &ecc_lp_x16;
 		break;
 	default:
+		dev_dbg(pdev, "buswidth %d unknown\n", pdata->device_width);
 		err = -EINVAL;
 		goto out_release_mem;
 	}
-- 
1.7.0.4



From j.weitzel at phytec.de  Tue Jul 24 10:39:56 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Tue, 24 Jul 2012 16:39:56 +0200
Subject: [PATCH 3/3] PCA-A_XL2 PCM049: Use autodetection for NAND width
In-Reply-To: <1343140796-21934-1-git-send-email-j.weitzel@phytec.de>
References: <1343140796-21934-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1343140796-21934-4-git-send-email-j.weitzel@phytec.de>


Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/boards/pcm049/board.c            |    4 ++--
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |    3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 8718d2b..006e924 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -111,9 +111,9 @@ static int pcm049_devices_init(void)
 
 	pcm049_network_init();
 
-	gpmc_generic_nand_devices_init(0, 8,
+	/* Autodetect buswidth */
+	gpmc_generic_nand_devices_init(0, 0,
 			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
-
 #ifdef CONFIG_PARTITION
 	devfs_add_partition("nand0", 0x00000, SZ_128K, PARTITION_FIXED, "xload_raw");
 	dev_add_bb_dev("xload_raw", "xload");
diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
index 9bbb054..f246f86 100644
--- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
+++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
@@ -124,7 +124,8 @@ static int pcaaxl2_devices_init(void)
 
 	pcaaxl2_network_init();
 
-	gpmc_generic_nand_devices_init(0, 16,
+	/* Autodetect buswidth */
+	gpmc_generic_nand_devices_init(0, 0,
 			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
 
 #ifdef CONFIG_PARTITION
-- 
1.7.0.4



From j.weitzel at phytec.de  Tue Jul 24 10:39:53 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Tue, 24 Jul 2012 16:39:53 +0200
Subject: [PATCH 0/3] nand: autodetect buswith
Message-ID: <1343140796-21934-1-git-send-email-j.weitzel@phytec.de>

Add flag NAND_BUSWIDTH_UNKNOWN to allow the nand driver to detect the buswidth.
Driver must provide callback set_buswidth which configure buswidth set in
(struct nand_chip) nand->options

Jan Weitzel (3):
  nand: base: Add autodetect buswidth
  OMAP GPMC NAND: add set_buswidth callback
  PCA-A_XL2 PCM049: Use autodetection for NAND width

 arch/arm/boards/pcm049/board.c            |    4 +-
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |    3 +-
 arch/arm/mach-omap/devices-gpmc-nand.c    |    8 ++---
 arch/arm/mach-omap/gpmc.c                 |   19 ++++++++++++
 arch/arm/mach-omap/include/mach/gpmc.h    |    8 +++++
 drivers/mtd/nand/nand_base.c              |   45 ++++++++++++++++++++++++++--
 drivers/mtd/nand/nand_omap_gpmc.c         |   43 ++++++++++++++++++++++++---
 include/linux/mtd/nand.h                  |    4 ++
 8 files changed, 117 insertions(+), 17 deletions(-)



From j.weitzel at phytec.de  Tue Jul 24 10:39:54 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Tue, 24 Jul 2012 16:39:54 +0200
Subject: [PATCH 1/3] nand: base: Add autodetect buswidth
In-Reply-To: <1343140796-21934-1-git-send-email-j.weitzel@phytec.de>
References: <1343140796-21934-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1343140796-21934-2-git-send-email-j.weitzel@phytec.de>

If a 16bit NAND is attached, but configured with 8bit nand_base will fail.
Add a flag NAND_BUSWIDTH_UNKNOWN and callback set_buswidth to allow it to
change the configuration to 16bit.

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 drivers/mtd/nand/nand_base.c |   45 ++++++++++++++++++++++++++++++++++++++---
 include/linux/mtd/nand.h     |    4 +++
 2 files changed, 45 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c4eca0d..055c710 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1027,6 +1027,23 @@ static void nand_set_defaults(struct nand_chip *chip, int busw)
 }
 
 /*
+ * Override defaults with 16 bit ones
+ */
+static void nand_set_defaults16(struct nand_chip *chip)
+{
+	if (chip->read_byte == nand_read_byte)
+		chip->read_byte = nand_read_byte16;
+#ifdef CONFIG_MTD_WRITE
+	if (chip->write_buf == nand_write_buf)
+		chip->write_buf = nand_write_buf16;
+#endif
+	if (chip->read_buf == nand_read_buf)
+		chip->read_buf = nand_read_buf16;
+	if (chip->verify_buf == nand_verify_buf)
+		chip->verify_buf = nand_verify_buf16;
+}
+
+/*
  * Get the flash and manufacturer id and lookup if the type is supported
  */
 static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
@@ -1128,9 +1145,12 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 
 	/*
 	 * Check, if buswidth is correct. Hardware drivers should set
-	 * chip correct !
+	 * chip correct or ask for autodetection!
 	 */
-	if (busw != (chip->options & NAND_BUSWIDTH_16)) {
+	if (chip->options & NAND_BUSWIDTH_UNKNOWN) {
+		printk(KERN_INFO "NAND bus width %d bit detected\n",
+		       (type->options & NAND_BUSWIDTH_16) ? 16 : 8);
+	} else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
 		printk(KERN_INFO "NAND device: Manufacturer ID:"
 		       " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
 		       dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
@@ -1202,8 +1222,18 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips)
 	struct nand_chip *chip = mtd->priv;
 	struct nand_flash_dev *type;
 
-	/* Get buswidth to select the correct functions */
-	busw = chip->options & NAND_BUSWIDTH_16;
+	if (chip->options & NAND_BUSWIDTH_UNKNOWN) {
+		if (!chip->set_buswidth) {
+			chip->options &= ~NAND_BUSWIDTH_UNKNOWN;
+			printk(KERN_WARNING "Buswidth unknown, but no callback to fix it.\n");
+		}
+		/* Detect NAND with 8bit buswidth*/
+		busw = 0;
+	} else {
+		/* Get buswidth to select the correct functions */
+		busw = chip->options & NAND_BUSWIDTH_16;
+	}
+
 	/* Set the default functions */
 	nand_set_defaults(chip, busw);
 
@@ -1216,6 +1246,13 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips)
 		return PTR_ERR(type);
 	}
 
+	if (chip->options & NAND_BUSWIDTH_UNKNOWN) {
+		chip->set_buswidth(mtd, chip);
+		if (chip->options & NAND_BUSWIDTH_16)
+			/* Change buswidth to 16 bit*/
+			nand_set_defaults16(chip);
+	}
+
 	/* Check for a chip array */
 	for (i = 1; i < maxchips; i++) {
 		chip->select_chip(mtd, i);
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 8e20876..184fc69 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -192,6 +192,8 @@ typedef enum {
 /* This option is defined if the board driver allocates its own buffers
    (e.g. because it needs them DMA-coherent */
 #define NAND_OWN_BUFFERS	0x00040000
+/* Buswitdh is currently unknown */
+#define NAND_BUSWIDTH_UNKNOWN	0x00080000
 /* Options set by nand scan */
 /* Nand scan has allocated controller struct */
 #define NAND_CONTROLLER_ALLOC	0x80000000
@@ -358,6 +360,7 @@ struct nand_buffers {
  * @errstat:		[OPTIONAL] hardware specific function to perform additional error status checks
  *			(determine if errors are correctable)
  * @write_page:		[REPLACEABLE] High-level page write function
+ * @set_buswidth:	[BOARDSPECIFIC] hardware specific function to configure buswidth
  */
 struct nand_chip {
 
@@ -382,6 +385,7 @@ struct nand_chip {
 	int		(*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
 	int		(*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
 				      const uint8_t *buf, int page, int cached, int raw);
+	int		(*set_buswidth)(struct mtd_info *mtd, struct nand_chip *this);
 
 	int		chip_delay;
 	unsigned int	options;
-- 
1.7.0.4



From bernhard at bwalle.de  Tue Jul 24 15:47:22 2012
From: bernhard at bwalle.de (Bernhard Walle)
Date: Tue, 24 Jul 2012 21:47:22 +0200
Subject: Booting kernel from FAT partition on beagle board
In-Reply-To: <20120723200526.GB30009@pengutronix.de>
References: <juh698$uj7$1@dough.gmane.org>
 <20120723200526.GB30009@pengutronix.de>
Message-ID: <jumu48$on5$1@dough.gmane.org>

Am 23.07.12 22:05, schrieb Sascha Hauer:
> On Sun, Jul 22, 2012 at 05:29:44PM +0200, Bernhard Walle wrote:
>
> earlyprintk does not take options.

Ok, but IIRC it doesn't harm. However, I tried without that options and
it does't work.

> Have you enabled earlyprintk support in your config? At least you
> should something then.

Sure,

bwalle at kopernikus % grep EARLY_PR configs/beagle/kernelconfig-3.5
CONFIG_EARLY_PRINTK=y

Any ideas? How to debug (without JTAG)?


Regards,
Bernhard



From s.hauer at pengutronix.de  Wed Jul 25 02:31:07 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 25 Jul 2012 08:31:07 +0200
Subject: [PATCH] ARM/Samsung: remaining clean up...
In-Reply-To: <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
References: <20120723064121.GW30009@pengutronix.de>
 <1343121891-1643-1-git-send-email-jbe@pengutronix.de>
Message-ID: <20120725063107.GG30009@pengutronix.de>

On Tue, Jul 24, 2012 at 11:24:48AM +0200, Juergen Beisert wrote:
> ...in preparation to add the S3C6410 SoC support.
> 
> Mostly simplifying the Samsung serial driver and some more cosmetic. These
> patches are a re-work and re-send of the remaining ones not yet included from
> the previous "ARM/Samsung: more clean up..." series.
> 
> The patches 1/3 and 3/3 base on the current "next", because they touch code
> for the new S5Pxx SoCs.

Applied, thanks

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul 25 02:35:21 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 25 Jul 2012 08:35:21 +0200
Subject: [PATCH] scripts/checkpatch.pl: reset rpt_cleaners warnings
In-Reply-To: <1343130282-32096-1-git-send-email-t.gamez@phytec.de>
References: <1343130282-32096-1-git-send-email-t.gamez@phytec.de>
Message-ID: <20120725063521.GH30009@pengutronix.de>

On Tue, Jul 24, 2012 at 01:44:42PM +0200, Teresa G?mez wrote:
> When running checkpatch against multiple patches and one
> of them has a whitespace issue, all following patches will
> contain the same note, even if they are ok.
> 
> This patch is taken from the linux kernel:
> 
> scripts/checkpatch.pl: reset rpt_cleaners warnings
> b0781216e7bff68aca2fbcd275b4db7531d1e22f
> Written by Mike Frysinger <vapier at gentoo.org>
> 
> Signed-off-by: Teresa G?mez <t.gamez at phytec.de>

Applied, thanks

 Sascha

> ---
>  scripts/checkpatch.pl |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> index 151c53a..0d94f98 100755
> --- a/scripts/checkpatch.pl
> +++ b/scripts/checkpatch.pl
> @@ -2934,6 +2934,7 @@ sub process {
>  		if ($rpt_cleaners) {
>  			print "NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or\n";
>  			print "      scripts/cleanfile\n\n";
> +			$rpt_cleaners = 0;
>  		}
>  	}
>  
> -- 
> 1.7.0.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul 25 02:36:47 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 25 Jul 2012 08:36:47 +0200
Subject: [PATCH] OMAP4: small header cleanup
In-Reply-To: <1343130303-32201-1-git-send-email-t.gamez@phytec.de>
References: <1343130303-32201-1-git-send-email-t.gamez@phytec.de>
Message-ID: <20120725063647.GI30009@pengutronix.de>

On Tue, Jul 24, 2012 at 01:45:03PM +0200, Teresa G?mez wrote:
> Use <mach/clocks.h> for OMAP4.
> 
> Signed-off-by: Teresa G?mez <t.gamez at phytec.de>

Applied, thanks

 Sascha

> ---
>  arch/arm/mach-omap/include/mach/clocks.h |    3 +++
>  arch/arm/mach-omap/omap4_clock.c         |    4 ++--
>  arch/arm/mach-omap/omap4_generic.c       |    5 ++---
>  3 files changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-omap/include/mach/clocks.h b/arch/arm/mach-omap/include/mach/clocks.h
> index 1221238..3efa057 100644
> --- a/arch/arm/mach-omap/include/mach/clocks.h
> +++ b/arch/arm/mach-omap/include/mach/clocks.h
> @@ -44,5 +44,8 @@
>  #ifdef CONFIG_ARCH_OMAP3
>  #include <mach/omap3-clock.h>
>  #endif
> +#ifdef CONFIG_ARCH_OMAP4
> +#include <mach/omap4-clock.h>
> +#endif
>  
>  #endif /* __OMAP_CLOCKS_H_ */
> diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
> index f8bab5f..3ab01f0 100644
> --- a/arch/arm/mach-omap/omap4_clock.c
> +++ b/arch/arm/mach-omap/omap4_clock.c
> @@ -1,7 +1,7 @@
>  #include <common.h>
> -#include <mach/syslib.h>
>  #include <io.h>
> -#include <mach/omap4-clock.h>
> +#include <mach/syslib.h>
> +#include <mach/clocks.h>
>  
>  #define LDELAY	12000000
>  
> diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
> index 5092242..de69934 100644
> --- a/arch/arm/mach-omap/omap4_generic.c
> +++ b/arch/arm/mach-omap/omap4_generic.c
> @@ -1,10 +1,9 @@
>  #include <common.h>
>  #include <init.h>
> -#include <mach/silicon.h>
>  #include <io.h>
> -#include <mach/omap4-silicon.h>
> +#include <mach/clocks.h>
> +#include <mach/silicon.h>
>  #include <mach/omap4-mux.h>
> -#include <mach/omap4-clock.h>
>  #include <mach/syslib.h>
>  #include <mach/xload.h>
>  #include <mach/gpmc.h>
> -- 
> 1.7.0.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul 25 02:42:09 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 25 Jul 2012 08:42:09 +0200
Subject: [PATCH] ARM i.MX53: notify clocksource about changing clock
In-Reply-To: <500EA810.3050902@kiwigrid.com>
References: <500EA810.3050902@kiwigrid.com>
Message-ID: <20120725064209.GJ30009@pengutronix.de>

On Tue, Jul 24, 2012 at 03:50:08PM +0200, Wjatscheslaw Stoljarski (Slawa) wrote:
> This fix a clock inaccuracy in get_time_ns (used by sleep, time, etc).
> 
> At i.MX53 power-on GPT clock is typically 55500000 Hz, and it will be used
> to calc the clock multiplier. After call imx53_init_lowlevel() GPT
> clock will
> changed (e.g. to 66666666 Hz), but multiplier not. To fix this behavior call
> clock_notifier_call_chain() after changing clock in imx53_init_lowlevel().
> 
> Signed-off-by: Wjatscheslaw Stoljarski
> <wjatscheslaw.stoljarski at kiwigrid.com>

Your patch has some formatting problems, for example the line above is
broken into two. Please consider using git send-email next time.

Applied manually. Thanks

 Sascha

> ---
>  arch/arm/mach-imx/imx53.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
> index e20b60a..3359819 100644
> --- a/arch/arm/mach-imx/imx53.c
> +++ b/arch/arm/mach-imx/imx53.c
> @@ -18,6 +18,7 @@
>  #include <init.h>
>  #include <common.h>
>  #include <io.h>
> +#include <notifier.h>
>  #include <sizes.h>
>  #include <mach/imx5.h>
>  #include <mach/imx-regs.h>
> @@ -211,4 +212,6 @@ void imx53_init_lowlevel(unsigned int cpufreq_mhz)
>  	writel(0xffffffff, ccm + MX53_CCM_CCGR7);
>   	writel(0, ccm + MX5_CCM_CCDR);
> +
> +	clock_notifier_call_chain();
>  }
> -- 
> 1.7.9.5
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Wed Jul 25 03:19:47 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 25 Jul 2012 09:19:47 +0200
Subject: [PATCH] Add JTAG bitbang driver
In-Reply-To: <500EA7A8.4020603@kiwigrid.com>
References: <500EA7A8.4020603@kiwigrid.com>
Message-ID: <20120725071947.GK30009@pengutronix.de>

Hi Wjatscheslaw,

The driver looks mostly ok, some minor stuff below. Please run
scripts/checkpatch.pl, there are some coding style issues.

How do you use this driver? From C code, or is there some command
planned?

On Tue, Jul 24, 2012 at 03:48:24PM +0200, Wjatscheslaw Stoljarski (Slawa) wrote:
> Signed-off-by: Wjatscheslaw Stoljarski
> <wjatscheslaw.stoljarski at kiwigrid.com>
> ---
>  drivers/Kconfig       |    1 +
>  drivers/Makefile      |    1 +
>  drivers/misc/Kconfig  |   27 ++++
>  drivers/misc/Makefile |    5 +
>  drivers/misc/jtag.c   |  395
> +++++++++++++++++++++++++++++++++++++++++++++++++

linewrap here, please use git send-email.

> +#define MAX_DEVICES 16
> +
> +static LIST_HEAD(jtag_device_list);

Each device is added to this list and removed from this list on remove,
but otherwise it's unused. Please remove.

> +
> +struct jtag_info {
> +	struct jtag_platdata *pdata;
> +	struct cdev cdev;
> +	unsigned int devices; /* Number of devices found in the jtag chain */
> +	struct list_head device_entry;
> +	/* Instruction register length of every device in the chain */
> +	unsigned int ir_len[];	/* [devices] */

Better use a fixed len array here: ir_len[MAX_DEVICES]
It makes the code more obviously correct.

> +};
> +
> +static const unsigned long bypass = 0xFFFFFFFF;
> +
> +static void pulseTMS0(const struct jtag_platdata *pdata)

Better name it to pulse_tms0. Lower case function names are preferred.

> +{
> +	gpio_set_value(pdata->pin_tms, 0);
> +	gpio_set_value(pdata->pin_tclk, 0);
> +	gpio_set_value(pdata->pin_tclk, 1);
> +}
> +
> +static void pulseTMS1(const struct jtag_platdata *pdata)
> +{
> +	gpio_set_value(pdata->pin_tms, 1);
> +	gpio_set_value(pdata->pin_tclk, 0);
> +	gpio_set_value(pdata->pin_tclk, 1);
> +}
> +
> +static void jtag_reset(const struct jtag_platdata *pdata)
> +{
> +	gpio_set_value(pdata->pin_tms, 1);
> +	gpio_set_value(pdata->pin_tclk, 0);
> +	gpio_set_value(pdata->pin_tclk, 1);
> +	gpio_set_value(pdata->pin_tclk, 0);
> +	gpio_set_value(pdata->pin_tclk, 1);
> +	gpio_set_value(pdata->pin_tclk, 0);
> +	gpio_set_value(pdata->pin_tclk, 1);
> +	gpio_set_value(pdata->pin_tclk, 0);
> +	gpio_set_value(pdata->pin_tclk, 1);
> +	gpio_set_value(pdata->pin_tclk, 0);
> +	gpio_set_value(pdata->pin_tclk, 1);
> +}
> +
> +static void jtag_output(const struct jtag_platdata *pdata,
> +	const unsigned long *data, unsigned int bitlen, int notlast)
> +{
> +	unsigned int a;
> +	unsigned long mask;
> +	gpio_set_value(pdata->pin_tms, 0);
> +	while (bitlen > 0) {
> +		for (a = *data++, mask = 0x00000001; mask != 0 && bitlen > 0;
> +		      mask <<= 1, bitlen--) {
> +			gpio_set_value(pdata->pin_tdo, (a & mask) ? 1 : 0);
> +			if ((bitlen == 1) && !notlast)
> +				gpio_set_value(pdata->pin_tms, 1);
> +			gpio_set_value(pdata->pin_tclk, 0);
> +			gpio_set_value(pdata->pin_tclk, 1);
> +		}
> +	}
> +}
> +
> +static int jtag_ioctl(struct cdev *inode, int cmd, void *arg)
> +{
> +	int ret = 0;
> +	struct jtag_info *info = (struct jtag_info *)inode->priv;
> +	int devices = info->devices;
> +	struct jtag_cmd *jcmd = (struct jtag_cmd *)arg;
> +	struct jtag_platdata *pdata = info->pdata;
> +
> +	if (_IOC_TYPE(cmd) != JTAG_IOC_MAGIC) return -ENOTTY;
> +	if (_IOC_NR(cmd) > JTAG_IOC_MAXNR) return -ENOTTY;
> +
> +	switch (cmd) {
> +
> +	case JTAG_GET_DEVICES:
> +		/* Returns how many devices found in the chain */
> +		ret = info->devices;
> +		break;
> +
> +	case JTAG_GET_ID:
> +		/* Returns ID register of selected device */
> +		if ((((struct jtag_rd_id *)arg)->device < 0) ||
> +			(((struct jtag_rd_id *)arg)->device >= devices)) {
> +			ret = -EINVAL;
> +			break;
> +		}
> +		jtag_reset(pdata);
> +		pulseTMS0(pdata);
> +		pulseTMS1(pdata);
> +		pulseTMS0(pdata);
> +		pulseTMS0(pdata);
> +		while (devices-- > 0) {
> +			unsigned long id = 0;
> +			pulseTMS0(pdata);
> +			if (gpio_get_value(pdata->pin_tdi)) {
> +				unsigned long mask;
> +				for (id = 1, mask = 0x00000002; (mask != 0);
> +				      mask <<= 1) {
> +					pulseTMS0(pdata);
> +					if (gpio_get_value(pdata->pin_tdi))
> +						id |= mask;
> +				}
> +			}
> +			if (devices == ((struct jtag_rd_id *)arg)->device) {
> +				((struct jtag_rd_id *)arg)->id = id;
> +				ret = 0;
> +				break;
> +			}
> +		}
> +		jtag_reset(pdata);
> +		break;
> +
> +	case JTAG_SET_IR_LENGTH:
> +		/* Sets up IR length of one device */
> +		if ((jcmd->device >= 0) && (jcmd->device < devices))
> +			info->ir_len[jcmd->device] = jcmd->bitlen;
> +		else
> +			ret = -EINVAL;
> +		break;
> +
> +	case JTAG_RESET:
> +		/* Resets all JTAG states */
> +		jtag_reset(pdata);
> +		break;
> +
> +	case JTAG_IR_WR:
> +		/* Writes Instruction Register
> +		If device == -1 writes same Instruction Register in all devices
> +		If device >= 0 writes Instruction Register in selected device
> +		 and loads BYPASS instruction in all others */
> +		if ((jcmd->device < -1) || (jcmd->device >= devices)) {
> +			ret = -EINVAL;
> +			break;
> +		}
> +		pulseTMS0(pdata);
> +		pulseTMS1(pdata);
> +		pulseTMS1(pdata);
> +		pulseTMS0(pdata);
> +		pulseTMS0(pdata);
> +		while (devices-- > 0) {
> +			if ((jcmd->device == -1) || (jcmd->device == devices))
> +				/* Loads desired instruction */
> +				jtag_output(pdata, jcmd->data,
> +					info->ir_len[devices], devices);
> +			else
> +				/* Loads BYPASS instruction */
> +				jtag_output(pdata, &bypass,
> +					info->ir_len[devices], devices);
> +		}
> +		pulseTMS1(pdata);
> +		pulseTMS0(pdata);
> +		break;
> +
> +	case JTAG_DR_WR:
> +		/* Writes Data Register of all devices
> +		If device == -1 writes same Data Register in all devices
> +		If device >= 0 writes Data Register in selected device
> +		 and loads BYPASS instruction in all others */

	/*
	 * multiline comments
	 * like this please
	 */

> +		if ((jcmd->device < -1) || (jcmd->device >= devices)) {
> +			ret = -EINVAL;
> +			break;
> +		}
> +		pulseTMS0(pdata);
> +		pulseTMS1(pdata);
> +		pulseTMS0(pdata);
> +		pulseTMS0(pdata);
> +		while (devices-- > 0) {
> +			if ((jcmd->device == -1) || (devices == jcmd->device))
> +				/* Loads desired data */
> +				jtag_output(pdata, jcmd->data, jcmd->bitlen,
> +					devices);
> +			else
> +				/* Loads 1 dummy bit in BYPASS data register */
> +				jtag_output(pdata, &bypass, 1, devices);
> +		}
> +		pulseTMS1(pdata);
> +		pulseTMS0(pdata);
> +		break;
> +
> +	case JTAG_DR_RD:
> +		/* Reads data register of selected device */
> +		if ((jcmd->device < 0) || (jcmd->device >= devices))
> +			ret = -EINVAL;
> +		else {
> +			unsigned long mask;
> +			int bitlen = jcmd->bitlen;
> +			unsigned long *data = jcmd->data;
> +			pulseTMS0(pdata);
> +			pulseTMS1(pdata);
> +			pulseTMS0(pdata);
> +			pulseTMS0(pdata);
> +			devices -= (jcmd->device + 1);
> +			while (devices-- > 0)
> +				pulseTMS0(pdata);
> +			while (bitlen > 0) {
> +				for (*data = 0, mask = 0x00000001;
> +				      (mask != 0) && (bitlen > 0);
> +				      mask <<= 1, bitlen--) {
> +					if (bitlen == 1)
> +						pulseTMS1(pdata);
> +					else
> +						pulseTMS0(pdata);
> +					if (gpio_get_value(pdata->pin_tdi))
> +						*data |= mask;
> +				}
> +				data++;
> +			}
> +			pulseTMS1(pdata);
> +			pulseTMS0(pdata);
> +		}
> +		break;
> +
> +	case JTAG_CLK:
> +		/* Generates arg clock pulses */
> +		gpio_set_value(pdata->pin_tms, 0);
> +		while ((*(unsigned int *) arg)--) {
> +			gpio_set_value(pdata->pin_tclk, 0);
> +			gpio_set_value(pdata->pin_tclk, 1);
> +		}
> +		break;
> +
> +	default:
> +		ret = -EFAULT;
> +	}
> +
> +	return ret;
> +}
> +
> +struct file_operations jtag_operations = {
> +	.ioctl = jtag_ioctl,
> +};
> +
> +static int jtag_probe(struct device_d *pdev)
> +{
> +	int i, ret;
> +	struct jtag_info *info;
> +	struct jtag_platdata *pdata = pdev->platform_data;
> +
> +	/* Setup gpio pins */
> +	gpio_direction_output(pdata->pin_tms, 0);
> +	gpio_direction_output(pdata->pin_tclk, 1);
> +	gpio_direction_output(pdata->pin_tdo, 0);
> +	gpio_direction_input(pdata->pin_tdi);
> +	if (pdata->use_pin_trst) {
> +		/* Keep fixed at 1 because some devices in the chain could
> +			not use it, to reset chain use jtag_reset() */
> +		gpio_direction_output(pdata->pin_trst, 1);
> +	}
> +
> +	/* Find how many devices in chain */
> +	jtag_reset(pdata);
> +	pulseTMS0(pdata);
> +	pulseTMS1(pdata);
> +	pulseTMS1(pdata);
> +	pulseTMS0(pdata);
> +	pulseTMS0(pdata);
> +	gpio_set_value(pdata->pin_tdo, 1);
> +	/* Fills all IR with bypass instruction */
> +	for (i = 0; i < 32 * MAX_DEVICES; i++)
> +		pulseTMS0(pdata);
> +	pulseTMS1(pdata);
> +	pulseTMS1(pdata);
> +	pulseTMS1(pdata);
> +	pulseTMS0(pdata);
> +	pulseTMS0(pdata);
> +	gpio_set_value(pdata->pin_tdo, 0);
> +	/* Fills all 1-bit bypass register with 0 */
> +	for (i = 0; i < MAX_DEVICES + 2; i++)
> +		pulseTMS0(pdata);
> +	gpio_set_value(pdata->pin_tdo, 1);
> +	/* Counts chain's bit length */
> +	for (i = 0; i < MAX_DEVICES + 1; i++) {
> +		pulseTMS0(pdata);
> +		if (gpio_get_value(pdata->pin_tdi))
> +			break;
> +	}
> +	dev_notice(pdev, "%d devices found in chain\n", i);
> +
> +	/* Allocate structure with chain specific infos */
> +	info = xzalloc(sizeof(struct jtag_info) + sizeof(info->ir_len[0]) * i);
> +	if (!info) {
> +		dev_err(pdev, "out of kernel memory\n");
> +		return -ENOMEM;
> +	}

the x* memory allocation functions never return an error, barebox panics
instead. They are suitable for small memory allocations like above. You
don't have to check the result.

> +	info->devices = i;
> +	INIT_LIST_HEAD(&info->device_entry);
> +	list_add(&info->device_entry, &jtag_device_list);
> +	info->pdata = pdata;
> +	pdev->priv = info;
> +
> +	info->cdev.name = JTAG_NAME;
> +	info->cdev.dev = pdev;
> +	info->cdev.ops = &jtag_operations;
> +	info->cdev.priv = info;
> +	ret = devfs_create(&info->cdev);
> +
> +	if (ret)
> +		goto fail_devfs_create;
> +
> +	return 0;
> +
> +fail_devfs_create:
> +	pdev->priv = NULL;
> +	free(info);
> +	return ret;
> +}
> +
> +static void jtag_info(struct device_d *pdev)
> +{
> +	int dn, ret;
> +	struct jtag_rd_id jid;
> +	struct jtag_info *info = pdev->priv;
> +
> +	printf(" JTAG:\n");
> +	printf("  Devices found: %d\n", info->devices);
> +	for(dn = 0; dn < info->devices; dn++) {
> +		jid.device = dn;
> +		ret = jtag_ioctl(&info->cdev, JTAG_GET_ID, &jid);
> +		printf("  Device number: %d\n", dn);
> +		if ( ret == -1 )
> +			printf("   JTAG_GET_ID failed: %s\n", strerror(errno));
> +		else
> +			printf("   ID: 0x%lX\n", jid.id);
> +	}
> +}
> +
> +static void jtag_remove(struct device_d *pdev)
> +{
> +	struct jtag_info *info = (struct jtag_info *) pdev->priv;
> +
> +	list_del(&info->device_entry);
> +	devfs_remove(&info->cdev);
> +	pdev->priv = NULL;
> +	free(info);
> +	dev_notice(pdev, "Device removed\n");
> +}
> +
> +static struct driver_d jtag_driver = {
> +	.name = JTAG_NAME,
> +	.probe = jtag_probe,
> +	.remove = jtag_remove,
> +	.info = jtag_info,
> +};
> +
> +static int jtag_module_init(void)
> +{
> +	return register_driver(&jtag_driver);
> +}
> +
> +device_initcall(jtag_module_init);
> +
> +MODULE_AUTHOR("Davide Rizzo <elpa.rizzo at gmail.com>");
> +MODULE_AUTHOR("Wjatscheslaw Stoljarski
> <wjatscheslaw.stoljarski at kiwigrid.com>");
> +MODULE_DESCRIPTION("JTAG bitbang driver");
> +MODULE_LICENSE("GPL");
> diff --git a/include/jtag.h b/include/jtag.h
> new file mode 100644
> index 0000000..d8f0606
> --- /dev/null
> +++ b/include/jtag.h
> @@ -0,0 +1,113 @@
> +/*
> + * include/linux/jtag.h
> + *
> + * Written Aug 2009 by Davide Rizzo <elpa.rizzo at gmail.com>
> + * Ported to barebox Jul 2012 by
> + *       Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski at kiwigrid.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +/*
> + * This driver manages one or more jtag chains controlled by host pins.
> + * Jtag chains must be defined during setup using jtag_platdata structs.
> + * All operations must be done from user programs using ioctls to /dev/jtag
> + * Typical operation sequence is:
> + * - open() the device (normally /dev/jtag)
> + * - ioctl JTAG_GET_DEVICES reads how many devices in the chain
> + * (repeat for each chip in the chain)
> + * - ioctl JTAG_GET_ID identifies the chip
> + * - ioctl JTAG_SET_IR_LENGTH sets the instruction register length
> + * Before accessing the data registers, instruction registers' lenghtes
> + *  MUST be programmed for all chips.
> + * After this initialization, you can execute JTAG_IR_WR,
> JTAG_DR_RD, JTAG_DR_WR
> + *  commands in any sequence.
> + */
> +
> +#ifndef __JTAG_H__
> +#define __JTAG_H__
> +
> +#ifdef __KERNEL__

You don't need this ifdef

> +/* Controller's pin_tdi must be connected to last device's pin_tdo */
> +/* Controller's pin_tdo must be connected to first device's pin_tdi */
> +struct jtag_platdata {
> +	unsigned int pin_tclk;
> +	unsigned int pin_tms;
> +	unsigned int pin_tdi;
> +	unsigned int pin_tdo;
> +	unsigned int pin_trst;

Better gpio_t*? It makes it more obvious that these variables refer to
gpios.

> +	int use_pin_trst;
> +};
> +#endif /* __KERNEL__ */
> +
> +#define JTAG_NAME "jtag"
> +
> +/* structures used for passing arguments to ioctl */
> +
> +struct jtag_rd_id {
> +	int device; /* Device in the chain */
> +	unsigned long id;
> +};
> +
> +struct jtag_cmd {
> +	int device; /* Device in the chain (-1 = all devices) */
> +	unsigned int bitlen; /* Bit length of the register to be transfered */
> +	unsigned long *data; /* Data to be transfered */
> +};
> +
> +/* Use 'j' as magic number */
> +#define JTAG_IOC_MAGIC		'j'
> +
> +/* ioctl commands */
> +
> +/* Resets jtag chain status, arg is ignored */
> +#define JTAG_RESET		_IO(JTAG_IOC_MAGIC, 0)
> +
> +/* Returns the number of devices in the jtag chain, arg is ignored. */
> +#define JTAG_GET_DEVICES	_IO(JTAG_IOC_MAGIC, 1)
> +
> +/* arg must point to a jtag_rd_id structure.
> +   Fills up the id field with ID of selected device */
> +#define JTAG_GET_ID		_IOR(JTAG_IOC_MAGIC, 2, struct jtag_rd_id)
> +
> +/* arg must point to a struct jtag_cmd.
> +   Programs the Instruction Register length of specified device at
> bitlen value.
> +   *data is ignored. */
> +#define JTAG_SET_IR_LENGTH	_IOW(JTAG_IOC_MAGIC, 3, struct jtag_rd_id)
> +
> +/* arg must point to a struct jtag_cmd.
> +   Writes *data in the Instruction Register of selected device, and BYPASS
> +    instruction into Instruction Registers of all other devices in
> the chain.
> +   If device == -1, the Instruction Registers of all devices are programmed
> +    to the same value.
> +   bitlen is always ignored, before using this command you have to
> program all
> +    Instruction Register's lengthes with JTAG_SET_IR_LENGTH command. */
> +#define JTAG_IR_WR		_IOW(JTAG_IOC_MAGIC, 4, struct jtag_cmd)
> +
> +/* arg must point to a struct jtag_cmd.
> +   Reads data register of selected device, with length bitlen */
> +#define JTAG_DR_RD		_IOR(JTAG_IOC_MAGIC, 5, struct jtag_cmd)
> +
> +/* arg must point to a struct jtag_cmd.
> +   Writes data register of selected device, with length bitlen.
> +   If device == -1, writes same data on all devices. */
> +#define JTAG_DR_WR		_IOW(JTAG_IOC_MAGIC, 6, struct jtag_cmd)
> +
> +/* Generates arg pulses on TCLK pin */
> +#define JTAG_CLK		_IOW(JTAG_IOC_MAGIC, 7, unsigned int)
> +
> +#define JTAG_IOC_MAXNR		9
> +
> +#endif /* __JTAG_H__ */
> -- 
> 1.7.9.5
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Wed Jul 25 03:47:30 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 09:47:30 +0200
Subject: [PATCH 1/4] vsprintf: fix EXPORT_SYMBOL typo on simple_strtoull
Message-ID: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 lib/vsprintf.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 0607db3..d3bd1d3 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -84,7 +84,7 @@ unsigned long long simple_strtoull (const char *cp, char **endp, unsigned int ba
 		*endp = (char *) cp;
 	return result;
 }
-EXPORT_SYMBOL(simple_strtoll);
+EXPORT_SYMBOL(simple_strtoull);
 
 /* we use this so that we can do without the ctype library */
 #define is_digit(c)	((c) >= '0' && (c) <= '9')
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 03:47:32 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 09:47:32 +0200
Subject: [PATCH 3/4] version: add missing EXPORT_SYMBOL for version_string
In-Reply-To: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
References: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343202453-16279-3-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 common/version.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/version.c b/common/version.c
index 51a8e7c..a557904 100644
--- a/common/version.c
+++ b/common/version.c
@@ -4,7 +4,7 @@
 
 const char version_string[] =
 	"barebox " UTS_RELEASE " " UTS_VERSION "\n";
-
+EXPORT_SYMBOL(version_string);
 
 void barebox_banner (void)
 {
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 03:47:33 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 09:47:33 +0200
Subject: [PATCH 4/4] command: add missing EXPORT_SYMBOL for find_cmd
In-Reply-To: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
References: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343202453-16279-4-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 common/command.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/common/command.c b/common/command.c
index f21bcc2..c18998c 100644
--- a/common/command.c
+++ b/common/command.c
@@ -166,6 +166,7 @@ struct command *find_cmd (const char *cmd)
 
 	return NULL;	/* not found or ambiguous command */
 }
+EXPORT_SYMBOL(find_cmd);
 
 /*
  * Put all commands into a linked list. Without module support we could use
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 03:47:31 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 09:47:31 +0200
Subject: [PATCH 2/4] complete: add missing EXPORT_SYMBOL for {command, device,
 empty, command}_var_complete
In-Reply-To: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
References: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343202453-16279-2-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 common/complete.c |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/common/complete.c b/common/complete.c
index a8bde8d..6a871ef 100644
--- a/common/complete.c
+++ b/common/complete.c
@@ -149,6 +149,7 @@ int command_complete(struct string_list *sl, char *instr)
 
 	return 0;
 }
+EXPORT_SYMBOL(command_complete);
 
 int device_complete(struct string_list *sl, char *instr)
 {
@@ -169,6 +170,7 @@ int device_complete(struct string_list *sl, char *instr)
 
 	return COMPLETE_CONTINUE;
 }
+EXPORT_SYMBOL(device_complete);
 
 static int device_param_complete(char *begin, struct device_d *dev,
 				 struct string_list *sl, char *instr)
@@ -197,11 +199,13 @@ int empty_complete(struct string_list *sl, char *instr)
 {
 	return COMPLETE_END;
 }
+EXPORT_SYMBOL(empty_complete);
 
 int command_var_complete(struct string_list *sl, char *instr)
 {
 	return COMPLETE_CONTINUE;
 }
+EXPORT_SYMBOL(command_var_complete);
 
 static int env_param_complete(struct string_list *sl, char *instr, int eval)
 {
-- 
1.7.10.4



From s.hauer at pengutronix.de  Wed Jul 25 03:53:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 25 Jul 2012 09:53:37 +0200
Subject: [PATCH 1/4] vsprintf: fix EXPORT_SYMBOL typo on simple_strtoull
In-Reply-To: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
References: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120725075337.GM30009@pengutronix.de>

On Wed, Jul 25, 2012 at 09:47:30AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

I had the same patches locally already, but didn't come along posting
them. Applied all.

btw you'll need the following for using modules with data cache enabled.
I haven't posted it yet because using dma_* functions doesn't look right.
Maybe we need some flush_dcache_range and flush_icache_range functions

Sascha


>From 23fda4644ca033f001f96eef86bd6a7c4349d18e Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer at pengutronix.de>
Date: Mon, 23 Jul 2012 23:54:39 +0200
Subject: [PATCH] ARM module: flush caches

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/insmod.c |    2 ++
 common/module.c   |    7 ++++++-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/commands/insmod.c b/commands/insmod.c
index f547e9d..da0bb47 100644
--- a/commands/insmod.c
+++ b/commands/insmod.c
@@ -21,6 +21,8 @@ static int do_insmod(int argc, char *argv[])
 	}
 
 	module = load_module(buf, len);
+	/* flush I-cache before jumping to the copied binary */
+	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
 	free(buf);
 
diff --git a/common/module.c b/common/module.c
index c0ff0f2..af98422 100644
--- a/common/module.c
+++ b/common/module.c
@@ -25,6 +25,7 @@
 #include <xfuncs.h>
 #include <command.h>
 #include <fs.h>
+#include <dma.h>
 #include <kallsyms.h>
 #include <linux/list.h>
 
@@ -257,7 +258,7 @@ struct module * load_module(void *mod_image, unsigned long len)
 	   special cases for the architectures. */
 	layout_sections(module, ehdr, sechdrs, secstrings);
 
-	ptr = xzalloc(module->core_size);
+	ptr = dma_alloc(module->core_size);
 	module->module_core = ptr;
 
 	/* Transfer each section which specifies SHF_ALLOC */
@@ -310,6 +311,10 @@ struct module * load_module(void *mod_image, unsigned long len)
 		}
 	}
 
+#ifdef CONFIG_MMU
+	dma_flush_range((unsigned long)ptr,
+			(unsigned long)ptr + module->core_size);
+#endif
 	list_add_tail(&module->list, &module_list);
 
 	return module;
-- 
1.7.10.4

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Wed Jul 25 03:57:30 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 09:57:30 +0200
Subject: [PATCH 00/11 V3] compressed image update
Message-ID: <20120725075730.GT22657@game.jcrosoft.org>

Hi,

v3:
	add comp-y Kbuild target

v2:
	fix modules support
	move compressed barebox to arch/<arch?compressed
	rename target to zbarebox*


The following changes since commit 63ac9c743b1304b0b4b792643e4704394f6f8aeb:

  only compress default env in uncompressed images (2012-07-20 14:20:15 +0200)

are available in the git repository at:

  git://git.jcrosoft.org/barebox.git tags/compressed-gzip2

for you to fetch changes up to eaab1eff304c26f5470cc381f333115708d55cd6:

  at91: add lowlevel init to the decompressor (2012-07-25 15:45:40 +0800)

----------------------------------------------------------------
compressed: gzip support and cleanup

The follwing patch series add the support of GZIP

And allow now to link only what is need in the decompressor

This is needed if you want to compile a barebox with modules support

as we current rely on gcc and it's garbage colector to clean the non
needed object.

With modules support gcc will not do this.

This will allow to have a version of barebox shrink to the first
128KiB so it can fit in the first page of nand which is garanty
badblock free and then if we need more feature we will use modules
store in an other partitions.

Kbuild: Introduce built-comp to have related decompressor object across the
source tree.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (11):
      stddev: make it selectable via Kconfig
      decompress_unlzo: define decompress_unlzo as decompress
      compressed image: factorise compressor type
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed: rename barebox target to zbarebox and zbarebox.bin
      compressed image: add gzip support
      kbuild: Init all relevant variables used in kbuild files so
      kbuild: add comp-y target
      arm: use the new built-comp.o generated files
      at91: add lowlevel init to the decompressor

 Makefile                                        |   43 +++++++++++--------------------------------
 arch/arm/Makefile                               |    9 ++++++++-
 arch/arm/compressed/Makefile                    |   43 +++++++++++++++++++++++++++++++++++++++++++
 arch/arm/compressed/barebox.lds.S               |   70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 piggy.lzo.S => arch/arm/compressed/piggy.gzip.S |    2 +-
 arch/arm/compressed/piggy.lzo.S                 |    6 ++++++
 arch/arm/cpu/start.c                            |   61 ++++++++++++++++++++++++++++++++++++++++++-------------------
 arch/arm/lib/Makefile                           |    6 +++++-
 arch/arm/lib/barebox.lds.S                      |    2 +-
 arch/arm/mach-at91/Makefile                     |    2 ++
 commands/Makefile                               |    2 +-
 common/Kconfig                                  |   25 ++++++++++++++++++++++---
 compressed/Makefile                             |    5 +++++
 compressed/misc.c                               |   14 ++++++++++++++
 compressed/string.c                             |  127 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 include/linux/decompress/mm.h                   |   68 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c                        |    1 +
 lib/decompress_unlzo.c                          |    1 +
 scripts/Makefile.build                          |   47 ++++++++++++++++++++++++++++++++++++++++++++---
 scripts/Makefile.lib                            |    3 +++
 20 files changed, 475 insertions(+), 62 deletions(-)
 create mode 100644 arch/arm/compressed/Makefile
 create mode 100644 arch/arm/compressed/barebox.lds.S
 rename piggy.lzo.S => arch/arm/compressed/piggy.gzip.S (70%)
 create mode 100644 arch/arm/compressed/piggy.lzo.S
 create mode 100644 compressed/Makefile
 create mode 100644 compressed/misc.c
 create mode 100644 compressed/string.c
 create mode 100644 include/linux/decompress/mm.h

Best Regards,
J.


From plagnioj at jcrosoft.com  Wed Jul 25 04:00:23 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:00:23 +0200
Subject: [PATCH 1/4] vsprintf: fix EXPORT_SYMBOL typo on simple_strtoull
In-Reply-To: <20120725075337.GM30009@pengutronix.de>
References: <1343202453-16279-1-git-send-email-plagnioj@jcrosoft.com>
 <20120725075337.GM30009@pengutronix.de>
Message-ID: <20120725080023.GU22657@game.jcrosoft.org>

On 09:53 Wed 25 Jul     , Sascha Hauer wrote:
> On Wed, Jul 25, 2012 at 09:47:30AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> 
> I had the same patches locally already, but didn't come along posting
> them. Applied all.
> 
> btw you'll need the following for using modules with data cache enabled.
> I haven't posted it yet because using dma_* functions doesn't look right.
> Maybe we need some flush_dcache_range and flush_icache_range functions
so far I test them without MMU enable

I take a look and I agree

Best Regards,
J.


From plagnioj at jcrosoft.com  Wed Jul 25 04:02:43 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:43 +0200
Subject: [PATCH 01/11] stddev: make it selectable via Kconfig
In-Reply-To: <20120725075730.GT22657@game.jcrosoft.org>
References: <20120725075730.GT22657@game.jcrosoft.org>
Message-ID: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>

enable is by default for simple and hush
we do not need to NO_SHELL

this allow to save 1KiB

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 commands/Makefile |    2 +-
 common/Kconfig    |    5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/commands/Makefile b/commands/Makefile
index 54191b4..e9157bf 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -1,4 +1,4 @@
-obj-y				+= stddev.o
+obj-$(CONFIG_STDDEV)		+= stddev.o
 obj-$(CONFIG_CMD_BOOTM)		+= bootm.o
 obj-$(CONFIG_CMD_UIMAGE)	+= uimage.o
 obj-$(CONFIG_CMD_LINUX16)	+= linux16.o
diff --git a/common/Kconfig b/common/Kconfig
index 1c996aa..c6f1afa 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -50,6 +50,9 @@ config BINFMT
 config GLOBALVAR
 	bool
 
+config STDDEV
+	bool
+
 menu "General Settings              "
 
 config LOCALVERSION
@@ -295,6 +298,7 @@ choice
 		select COMMAND_SUPPORT
 		select PARAMETER
 		select BINFMT
+		select STDDEV
 		help
 		  Enable hush support. This is the most advanced shell available
 		  for barebox.
@@ -304,6 +308,7 @@ choice
 		select ENVIRONMENT_VARIABLES
 		select COMMAND_SUPPORT
 		select PARAMETER
+		select STDDEV
 		help
 		  simple shell. No if/then, no return values from commands, no loops
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:44 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:44 +0200
Subject: [PATCH 02/11] decompress_unlzo: define decompress_unlzo as decompress
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-2-git-send-email-plagnioj@jcrosoft.com>

so we can use decompress in the decompressor
this will simplify multi decompress support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 lib/decompress_unlzo.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
index 0e6a7ad..56abfc6 100644
--- a/lib/decompress_unlzo.c
+++ b/lib/decompress_unlzo.c
@@ -289,3 +289,4 @@ exit_1:
 exit:
 	return ret;
 }
+#define decompress decompress_unlzo
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:46 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:46 +0200
Subject: [PATCH 04/11] decompressor: import malloc/free implementation for
 linux 3.4
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-4-git-send-email-plagnioj@jcrosoft.com>

This is need for gunzip support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 include/linux/decompress/mm.h |   68 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 include/linux/decompress/mm.h

diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
new file mode 100644
index 0000000..0c35411
--- /dev/null
+++ b/include/linux/decompress/mm.h
@@ -0,0 +1,68 @@
+/*
+ * linux/compr_mm.h
+ *
+ * Memory management for pre-boot and ramdisk uncompressors
+ *
+ * Authors: Alain Knaff <alain at knaff.lu>
+ *
+ */
+
+#ifndef DECOMPR_MM_H
+#define DECOMPR_MM_H
+
+#ifdef STATIC
+
+/* Code active when included from pre-boot environment: */
+
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitrarily relocated (via
+ * GOT references).  This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
+/* A trivial malloc implementation, adapted from
+ *  malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ */
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
+
+static void *malloc(int size)
+{
+	void *p;
+
+	if (size < 0)
+		return NULL;
+	if (!malloc_ptr)
+		malloc_ptr = free_mem_ptr;
+
+	malloc_ptr = (malloc_ptr + 3) & ~3;     /* Align */
+
+	p = (void *)malloc_ptr;
+	malloc_ptr += size;
+
+	if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr)
+		return NULL;
+
+	malloc_count++;
+	return p;
+}
+
+static void free(void *where)
+{
+	malloc_count--;
+	if (!malloc_count)
+		malloc_ptr = free_mem_ptr;
+}
+
+#define large_malloc(a) malloc(a)
+#define large_free(a) free(a)
+
+#define INIT
+
+#endif /* STATIC */
+
+#endif /* DECOMPR_MM_H */
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:47 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:47 +0200
Subject: [PATCH 05/11] ARM: add early malloc support needed by the decompressor
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-5-git-send-email-plagnioj@jcrosoft.com>

This is not needed by lzo but by gunzip, xz and others.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/cpu/start.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 18c5c83..8ab6fdc 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,6 +28,9 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+unsigned long free_mem_ptr;
+unsigned long free_mem_end_ptr;
+
 #ifdef CONFIG_IMAGE_COMPRESSION
 void __naked __section(.text_head_entry) compressed_start(void)
 {
@@ -158,6 +161,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
 
+	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
+	free_mem_ptr = STACK_BASE - 0x20000 - 16;
+	free_mem_end_ptr = STACK_BASE - 16;
+
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:50 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:50 +0200
Subject: [PATCH 08/11] kbuild: Init all relevant variables used in kbuild
 files so
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-8-git-send-email-plagnioj@jcrosoft.com>

import from linux 3.5-rc5

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 scripts/Makefile.build |   25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index f70e2b9..1a82c44 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -7,7 +7,30 @@ src := $(obj)
 PHONY := __build
 __build:
 
-# Read .config if it exist, otherwise ignore
+# Init all relevant variables used in kbuild files so
+# 1) they have correct type
+# 2) they do not inherit any value from the environment
+obj-y :=
+obj-m :=
+lib-y :=
+lib-m :=
+always :=
+targets :=
+subdir-y :=
+subdir-m :=
+EXTRA_AFLAGS   :=
+EXTRA_CFLAGS   :=
+EXTRA_CPPFLAGS :=
+EXTRA_LDFLAGS  :=
+asflags-y  :=
+ccflags-y  :=
+cppflags-y :=
+ldflags-y  :=
+
+subdir-asflags-y :=
+subdir-ccflags-y :=
+
+# Read auto.conf if it exists, otherwise ignore
 -include include/config/auto.conf
 
 include scripts/Kbuild.include
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:45 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:45 +0200
Subject: [PATCH 03/11] compressed image: factorise compressor type
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-3-git-send-email-plagnioj@jcrosoft.com>

This will simplify to support of multi compressor support such as gzip, lzma,
xz.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                   |   12 +++++++-----
 arch/arm/cpu/start.c       |    9 ++++++---
 arch/arm/lib/Makefile      |    2 +-
 arch/arm/lib/barebox.lds.S |    2 +-
 common/Kconfig             |   17 ++++++++++++++---
 5 files changed, 29 insertions(+), 13 deletions(-)

diff --git a/Makefile b/Makefile
index e0a3c07..0b3da03 100644
--- a/Makefile
+++ b/Makefile
@@ -715,20 +715,22 @@ barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsym
 barebox-uncompressed.bin: barebox-uncompressed
 	$(call if_changed,objcopy)
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
+
 barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
 	@echo "  LZO    " $@
 	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
 
-piggy.lzo.o: barebox-uncompressed.bin.lzo $(src)/piggy.lzo.S
+piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
 	@echo "  CC     " $@
-	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.lzo.S -o $@
+	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
 
-ifdef CONFIG_IMAGE_COMPRESSION_LZO
-barebox: piggy.lzo.o
+ifdef CONFIG_IMAGE_COMPRESSION
+barebox: piggy.$(suffix_y).o
 	@echo "  LD     " $@
 	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
 		-T $(barebox-compressed-lds) \
-		--start-group $(barebox-common) piggy.lzo.o --end-group
+		--start-group $(barebox-common) piggy.$(suffix_y).o --end-group
 else
 barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 6743804..18c5c83 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,7 +28,7 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
-#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+#ifdef CONFIG_IMAGE_COMPRESSION
 void __naked __section(.text_head_entry) compressed_start(void)
 {
 	barebox_arm_head();
@@ -101,7 +101,10 @@ extern void *input_data;
 extern void *input_data_end;
 
 #define STATIC static
+
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
 #include "../../../lib/decompress_unlzo.c"
+#endif
 
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
@@ -112,7 +115,7 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
 	else
 		barebox = (void *)TEXT_BASE;
 
-	decompress_unlzo((void *)compressed_start,
+	decompress((void *)compressed_start,
 			len,
 			NULL, NULL,
 			(void *)TEXT_BASE, NULL, NULL);
@@ -158,7 +161,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION_LZO)) {
+	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION)) {
 		compressed_start = (uint32_t)&input_data - offset;
 		compressed_end = (uint32_t)&input_data_end - offset;
 		len = compressed_end - compressed_start;
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 044d3e6..1b6f7f4 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -21,4 +21,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
 obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
 extra-y += barebox.lds
-extra-$(CONFIG_IMAGE_COMPRESSION_LZO) += barebox-compressed.lds
+extra-$(CONFIG_IMAGE_COMPRESSION) += barebox-compressed.lds
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index b415830..b22cf98 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -31,7 +31,7 @@ SECTIONS
 {
 	. = TEXT_BASE;
 
-#ifndef CONFIG_IMAGE_COMPRESSION_LZO
+#ifndef CONFIG_IMAGE_COMPRESSION
 	PRE_IMAGE
 #endif
 	. = ALIGN(4);
diff --git a/common/Kconfig b/common/Kconfig
index c6f1afa..8437e1c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -99,9 +99,20 @@ menu "memory layout                 "
 config HAVE_IMAGE_COMPRESSION
 	bool
 
+config IMAGE_COMPRESSION
+	bool "Compressed image"
+
+if IMAGE_COMPRESSION
+
+choice
+	prompt "Compression"
+
 config IMAGE_COMPRESSION_LZO
-	depends on HAVE_IMAGE_COMPRESSION
-	bool "lzo compressed image"
+	bool "lzo"
+
+endchoice
+
+endif
 
 config MMU
 	bool "Enable MMU"
@@ -185,7 +196,7 @@ config MALLOC_SIZE
 	prompt "malloc area size"
 
 config HEAD_TEXT_BASE
-	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION_LZO
+	depends on MEMORY_LAYOUT_FIXED && IMAGE_COMPRESSION
 	hex
 	prompt "HEAD_TEXT_BASE"
 endmenu
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:49 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:49 +0200
Subject: [PATCH 07/11] compressed image: add gzip support
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-7-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/compressed/Makefile     |    1 +
 arch/arm/compressed/piggy.gzip.S |    6 ++++++
 arch/arm/cpu/start.c             |    4 ++++
 common/Kconfig                   |    3 +++
 lib/decompress_inflate.c         |    1 +
 5 files changed, 15 insertions(+)
 create mode 100644 arch/arm/compressed/piggy.gzip.S

diff --git a/arch/arm/compressed/Makefile b/arch/arm/compressed/Makefile
index 627a411..59e7d59 100644
--- a/arch/arm/compressed/Makefile
+++ b/arch/arm/compressed/Makefile
@@ -1,4 +1,5 @@
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
 suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
 
 OBJCOPYFLAGS_zbarebox.bin = -O binary
diff --git a/arch/arm/compressed/piggy.gzip.S b/arch/arm/compressed/piggy.gzip.S
new file mode 100644
index 0000000..ef3dd77
--- /dev/null
+++ b/arch/arm/compressed/piggy.gzip.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl  input_data
+input_data:
+	.incbin "arch/arm/compressed/piggy.gzip"
+	.globl  input_data_end
+input_data_end:
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 6c745f7..5503552 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -110,6 +110,10 @@ extern void *input_data_end;
 #include "../../../lib/decompress_unlzo.c"
 #endif
 
+#ifdef CONFIG_IMAGE_COMPRESSION_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
 	void (*barebox)(void);
diff --git a/common/Kconfig b/common/Kconfig
index 8437e1c..702a0bd 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -110,6 +110,9 @@ choice
 config IMAGE_COMPRESSION_LZO
 	bool "lzo"
 
+config IMAGE_COMPRESSION_GZIP
+	bool "gzip"
+
 endchoice
 
 endif
diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c
index 526d6a1..5c1ebb6 100644
--- a/lib/decompress_inflate.c
+++ b/lib/decompress_inflate.c
@@ -4,6 +4,7 @@
 /* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
  * errors about console_printk etc... on ARM */
 #define _LINUX_KERNEL_H
+#include <linux/decompress/mm.h>
 
 #include "zlib_inflate/inftrees.c"
 #include "zlib_inflate/inffast.c"
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:53 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:53 +0200
Subject: [PATCH 11/11] at91: add lowlevel init to the decompressor
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-11-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/mach-at91/Makefile |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 491c454..5565989 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -4,6 +4,8 @@ lowlevel_init-y = at91sam926x_lowlevel_init.o
 lowlevel_init-$(CONFIG_ARCH_AT91RM9200) = at91rm9200_lowlevel_init.o
 obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y)
 
+comp-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y)
+
 obj-$(CONFIG_AT91SAM9_RESET) += at91sam9_reset.o
 obj-$(CONFIG_AT91SAM9G45_RESET) += at91sam9g45_reset.o
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:52 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:52 +0200
Subject: [PATCH 10/11] arm: use the new built-comp.o generated files
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-10-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                     |    2 ++
 arch/arm/compressed/Makefile |   33 +++------------------------------
 arch/arm/lib/Makefile        |    4 ++++
 compressed/Makefile          |    5 +++++
 4 files changed, 14 insertions(+), 30 deletions(-)
 create mode 100644 compressed/Makefile

diff --git a/Makefile b/Makefile
index 277f7da..35a681f 100644
--- a/Makefile
+++ b/Makefile
@@ -474,6 +474,8 @@ CFLAGS += $(call cc-option,-Wno-pointer-sign,)
 # this default value
 export KBUILD_IMAGE ?= barebox
 
+common-$(CONFIG_IMAGE_COMPRESSION)	+= compressed/
+
 barebox-dirs	:= $(patsubst %/,%,$(filter %/, $(common-y)))
 
 barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
diff --git a/arch/arm/compressed/Makefile b/arch/arm/compressed/Makefile
index 59e7d59..9d8c051 100644
--- a/arch/arm/compressed/Makefile
+++ b/arch/arm/compressed/Makefile
@@ -6,12 +6,11 @@ OBJCOPYFLAGS_zbarebox.bin = -O binary
 
 targets := zbarebox zbarebox.bin zbarebox.S \
 	   piggy.$(suffix_y) piggy.$(suffix_y).o \
-	   lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
-	   misc.o string.o start.o
+	   start.o
 
 # Make sure files are removed during clean
 extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
-		 lib1funcs.S ashldi3.S start.c string.c misc.c
+		 start.c
 
 $(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
 	$(call if_changed,objcopy)
@@ -21,39 +20,13 @@ $(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
 $(obj)/zbarebox.S: $(obj)/zbarebox FORCE
 	$(call if_changed,disasm)
 
-# For __aeabi_uidivmod
-lib1funcs = $(obj)/lib1funcs.o
-
-$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S
-	$(call cmd,shipped)
-
 CFLAGS_start.o = -D CONFIG_COMPRESSOR
 start= $(obj)/start.o
 $(obj)/start.c: $(srctree)/arch/$(SRCARCH)/cpu/start.c
 	$(call cmd,shipped)
 
-string= $(obj)/string.o
-$(obj)/string.c: $(srctree)/compressed/string.c
-	$(call cmd,shipped)
-
-misc= $(obj)/misc.o
-$(obj)/misc.c: $(srctree)/compressed/misc.c
-	$(call cmd,shipped)
-
-# For __aeabi_llsl
-ashldi3 = $(obj)/ashldi3.o
-
-$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
-	$(call cmd,shipped)
-
-# For __div0
-div0 = $(obj)/div0.o
-
-$(obj)/div0.c: $(srctree)/arch/$(SRCARCH)/lib/div0.c
-	$(call cmd,shipped)
-
 LDFLAGS_zbarebox	:= -Map zbarebox.map
-comp := $(obj)/piggy.$(suffix_y).o \
+comp := $(barebox-common-comp) $(obj)/piggy.$(suffix_y).o \
 	$(lib1funcs) $(ashldi3) $(start) $(string) $(misc) $(div0)
 
 $(obj)/zbarebox: $(obj)/barebox.lds $(comp) FORCE
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 1b6f7f4..2291dc2 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -22,3 +22,7 @@ obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
 extra-y += barebox.lds
 extra-$(CONFIG_IMAGE_COMPRESSION) += barebox-compressed.lds
+
+comp-y	+= lib1funcs.o
+comp-y	+= ashldi3.o
+comp-y	+= div0.o
diff --git a/compressed/Makefile b/compressed/Makefile
new file mode 100644
index 0000000..c2c4f7f
--- /dev/null
+++ b/compressed/Makefile
@@ -0,0 +1,5 @@
+#
+# only unsed by the decompressor
+#
+comp-y += misc.o
+comp-y += string.o
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:51 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:51 +0200
Subject: [PATCH 09/11] kbuild: add comp-y target
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-9-git-send-email-plagnioj@jcrosoft.com>

This will allow to link compiled object to the built-comp.o across the source
tree that will be finally link to the decompressor.

Limitation:

if the object is present in both decompressor and barebox the object is
generated once only

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile               |    6 +++++-
 scripts/Makefile.build |   22 ++++++++++++++++++++--
 scripts/Makefile.lib   |    3 +++
 3 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 46c9491..277f7da 100644
--- a/Makefile
+++ b/Makefile
@@ -481,6 +481,8 @@ barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
 		     $(core-n) $(core-) $(drivers-n) $(drivers-) \
 		     $(net-n)  $(net-)  $(libs-n)    $(libs-))))
 
+comp-common-y	:= $(common-y)
+comp-common-y	:= $(patsubst %/, %/built-comp.o, $(common-y))
 common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 
 # Build barebox
@@ -510,6 +512,8 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 # System.map is generated to document addresses of all kernel symbols
 
 barebox-common := $(common-y)
+barebox-common-comp := $(comp-common-y)
+export barebox-common-comp
 barebox-all    := $(barebox-common)
 barebox-lds    := $(lds-y)
 
@@ -715,7 +719,7 @@ barebox.srec: barebox
 
 # The actual objects are generated when descending,
 # make sure no implicit rule kicks in
-$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds): $(barebox-dirs) ;
+$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds) $(barebox-common-comp): $(barebox-dirs) ;
 
 # Handle descending into subdirectories listed in $(barebox-dirs)
 # Preset locale variables to speed up the build process. Limit locale
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 1a82c44..7b3f711 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -13,6 +13,7 @@ __build:
 obj-y :=
 obj-m :=
 lib-y :=
+comp-y :=
 lib-m :=
 always :=
 targets :=
@@ -97,13 +98,17 @@ ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
 lib-target := $(obj)/lib.a
 endif
 
-ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
+ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target) $(comp-y)),)
 builtin-target := $(obj)/built-in.o
 endif
 
+ifneq ($(strip $(comp-y) $(builtin-target)),)
+comp-target := $(obj)/built-comp.o
+endif
+
 # We keep a list of all modules in $(MODVERDIR)
 
-__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
+__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(comp-target) $(extra-y)) \
 	 $(if $(KBUILD_MODULES),$(obj-m)) \
 	 $(subdir-ym) $(always)
 	@:
@@ -294,6 +299,19 @@ $(builtin-target): $(obj-y) FORCE
 targets += $(builtin-target)
 endif # builtin-target
 
+ifdef comp-target
+quiet_cmd_link_comp_o_target = COMPLD  $@
+# If the list of objects to link is empty, just create an empty built-comp.o
+cmd_link_comp_o_target = $(if $(strip $(comp-y)),\
+		      $(LD) $(ld_flags) -r -o $@ $(filter $(comp-y), $^),\
+		      rm -f $@; $(AR) rcs $@)
+
+$(comp-target): $(comp-y) FORCE
+	$(call if_changed,link_comp_o_target)
+
+targets += $(comp-target)
+endif # comp-target
+
 #
 # Rule to compile a set of .o files into one .a file
 #
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index b842c48..f0ea147 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -28,6 +28,8 @@ subdir-m	+= $(__subdir-m)
 obj-y		:= $(patsubst %/, %/built-in.o, $(obj-y))
 obj-m		:= $(filter-out %/, $(obj-m))
 
+comp-y		:= $(patsubst %/, %/built-comp.o, $(comp-y))
+
 # Subdirectories we need to descend into
 
 subdir-ym	:= $(sort $(subdir-y) $(subdir-m))
@@ -63,6 +65,7 @@ targets		:= $(addprefix $(obj)/,$(targets))
 obj-y		:= $(addprefix $(obj)/,$(obj-y))
 obj-m		:= $(addprefix $(obj)/,$(obj-m))
 lib-y		:= $(addprefix $(obj)/,$(lib-y))
+comp-y		:= $(addprefix $(obj)/,$(comp-y))
 subdir-obj-y	:= $(addprefix $(obj)/,$(subdir-obj-y))
 real-objs-y	:= $(addprefix $(obj)/,$(real-objs-y))
 real-objs-m	:= $(addprefix $(obj)/,$(real-objs-m))
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Wed Jul 25 04:02:48 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 25 Jul 2012 10:02:48 +0200
Subject: [PATCH 06/11] compressed: rename barebox target to zbarebox and
 zbarebox.bin
In-Reply-To: <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120725075730.GT22657@game.jcrosoft.org>
 <1343203373-18641-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343203373-18641-6-git-send-email-plagnioj@jcrosoft.com>

Today we link to whole barebox and rely on gcc to cleanup via it's garbage
collector.
Now we specify only what is needed and introduce a new directory with source
only related to the compressed target.

Build it in arch/<arm>/compressed
Rebuild all the needed object.

Keep the previous target untouched.
This fix the modules support and allow custom flags for each file.

Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                          |   37 ++---------
 arch/arm/Makefile                 |    9 ++-
 arch/arm/compressed/Makefile      |   69 ++++++++++++++++++++
 arch/arm/compressed/barebox.lds.S |   70 ++++++++++++++++++++
 arch/arm/compressed/piggy.lzo.S   |    6 ++
 arch/arm/cpu/start.c              |   41 +++++++-----
 compressed/misc.c                 |   14 ++++
 compressed/string.c               |  127 +++++++++++++++++++++++++++++++++++++
 piggy.lzo.S                       |    6 --
 9 files changed, 323 insertions(+), 56 deletions(-)
 create mode 100644 arch/arm/compressed/Makefile
 create mode 100644 arch/arm/compressed/barebox.lds.S
 create mode 100644 arch/arm/compressed/piggy.lzo.S
 create mode 100644 compressed/misc.c
 create mode 100644 compressed/string.c
 delete mode 100644 piggy.lzo.S

diff --git a/Makefile b/Makefile
index 0b3da03..46c9491 100644
--- a/Makefile
+++ b/Makefile
@@ -512,7 +512,6 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 barebox-common := $(common-y)
 barebox-all    := $(barebox-common)
 barebox-lds    := $(lds-y)
-barebox-compressed-lds    := $(lds-compressed-y)
 
 # Rule to link barebox
 # May be overridden by arch/$(ARCH)/Makefile
@@ -668,11 +667,12 @@ quiet_cmd_objcopy = OBJCOPY $@
       cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
 
 OBJCOPYFLAGS_barebox.bin = -O binary
-OBJCOPYFLAGS_barebox-uncompressed.bin = -O binary
 
 barebox.bin: barebox FORCE
 	$(call if_changed,objcopy)
+ifndef CONFIG_IMAGE_COMPRESSION
 	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+endif
 
 ifdef CONFIG_X86
 barebox.S: barebox
@@ -702,41 +702,13 @@ quiet_cmd_disasm = DISASM  $@
 
 barebox.S: barebox FORCE
 	$(call if_changed,disasm)
-barebox-uncompressed.S: barebox-uncompressed FORCE
-	$(call if_changed,disasm)
 endif
 
 # barebox image
-barebox-uncompressed: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o)
-	$(call barebox-modpost)
-	$(call if_changed_rule,barebox__)
-	$(Q)rm -f .old_version
-
-barebox-uncompressed.bin: barebox-uncompressed
-	$(call if_changed,objcopy)
-
-suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
-
-barebox-uncompressed.bin.lzo: barebox-uncompressed.bin
-	@echo "  LZO    " $@
-	$(Q)lzop -f -9 -o $@ barebox-uncompressed.bin
-
-piggy.$(suffix_y).o: barebox-uncompressed.bin.$(suffix_y) $(src)/piggy.$(suffix_y).S
-	@echo "  CC     " $@
-	$(Q)$(CC) $(CFLAGS) $(CPPFLAGS) -c $(src)/piggy.$(suffix_y).S -o $@
-
-ifdef CONFIG_IMAGE_COMPRESSION
-barebox: piggy.$(suffix_y).o
-	@echo "  LD     " $@
-	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
-		-T $(barebox-compressed-lds) \
-		--start-group $(barebox-common) piggy.$(suffix_y).o --end-group
-else
 barebox: $(barebox-lds) $(barebox-head) $(barebox-common) $(kallsyms.o) FORCE
 	$(call barebox-modpost)
 	$(call if_changed_rule,barebox__)
 	$(Q)rm -f .old_version
-endif
 
 barebox.srec: barebox
 	$(OBJCOPY) -O srec $< $@
@@ -1031,11 +1003,10 @@ endif # CONFIG_MODULES
 # Directories & files removed with 'make clean'
 CLEAN_DIRS  += $(MODVERDIR)
 CLEAN_FILES +=	barebox System.map include/generated/barebox_default_env.h \
-                .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
+                .tmp_version .tmp_barebox* barebox.* \
 		.tmp_kallsyms* barebox_default_env* barebox.ldr \
 		scripts/bareboxenv-target \
-		Doxyfile.version barebox.srec barebox.s5p \
-		barebox-uncompressed barebox-uncompressed.bin barebox-uncompressed.bin.lzo
+		Doxyfile.version barebox.srec barebox.s5p
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include2 usr/include
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a93c4d5..647c536 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,6 +184,14 @@ ifeq ($(CONFIG_OMAP_BUILD_IFT),y)
 KBUILD_IMAGE := MLO
 endif
 
+ifdef CONFIG_IMAGE_COMPRESSION
+KBUILD_IMAGE := zbarebox.bin
+endif
+
+comp := arch/arm/compressed
+zbarebox.S zbarebox.bin zbarebox: barebox.bin
+	$(Q)$(MAKE) $(build)=$(comp) $(comp)/$@
+
 all: $(KBUILD_IMAGE)
 
 archprepare: maketools
@@ -208,6 +216,5 @@ common-y += $(BOARD) $(MACH)
 common-y += arch/arm/lib/ arch/arm/cpu/
 
 lds-y	:= arch/arm/lib/barebox.lds
-lds-compressed-y := arch/arm/lib/barebox-compressed.lds
 
 CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds
diff --git a/arch/arm/compressed/Makefile b/arch/arm/compressed/Makefile
new file mode 100644
index 0000000..627a411
--- /dev/null
+++ b/arch/arm/compressed/Makefile
@@ -0,0 +1,69 @@
+
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
+
+OBJCOPYFLAGS_zbarebox.bin = -O binary
+
+targets := zbarebox zbarebox.bin zbarebox.S \
+	   piggy.$(suffix_y) piggy.$(suffix_y).o \
+	   lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
+	   misc.o string.o start.o
+
+# Make sure files are removed during clean
+extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
+		 lib1funcs.S ashldi3.S start.c string.c misc.c
+
+$(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
+	$(call if_changed,objcopy)
+	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+	@echo '  Barebox: $@ is ready'
+
+$(obj)/zbarebox.S: $(obj)/zbarebox FORCE
+	$(call if_changed,disasm)
+
+# For __aeabi_uidivmod
+lib1funcs = $(obj)/lib1funcs.o
+
+$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S
+	$(call cmd,shipped)
+
+CFLAGS_start.o = -D CONFIG_COMPRESSOR
+start= $(obj)/start.o
+$(obj)/start.c: $(srctree)/arch/$(SRCARCH)/cpu/start.c
+	$(call cmd,shipped)
+
+string= $(obj)/string.o
+$(obj)/string.c: $(srctree)/compressed/string.c
+	$(call cmd,shipped)
+
+misc= $(obj)/misc.o
+$(obj)/misc.c: $(srctree)/compressed/misc.c
+	$(call cmd,shipped)
+
+# For __aeabi_llsl
+ashldi3 = $(obj)/ashldi3.o
+
+$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
+	$(call cmd,shipped)
+
+# For __div0
+div0 = $(obj)/div0.o
+
+$(obj)/div0.c: $(srctree)/arch/$(SRCARCH)/lib/div0.c
+	$(call cmd,shipped)
+
+LDFLAGS_zbarebox	:= -Map zbarebox.map
+comp := $(obj)/piggy.$(suffix_y).o \
+	$(lib1funcs) $(ashldi3) $(start) $(string) $(misc) $(div0)
+
+$(obj)/zbarebox: $(obj)/barebox.lds $(comp) FORCE
+	@echo "  LD     " $@
+	$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
+		-T $(obj)/barebox.lds \
+		--start-group $(comp) --end-group
+
+$(obj)/piggy.$(suffix_y): $(obj)/../../../barebox.bin FORCE
+	$(call if_changed,$(suffix_y))
+
+$(obj)/piggy.$(suffix_y).o:  $(obj)/piggy.$(suffix_y) FORCE
+
+$(obj)/barebox.lds: $(obj)/barebox.lds.S
diff --git a/arch/arm/compressed/barebox.lds.S b/arch/arm/compressed/barebox.lds.S
new file mode 100644
index 0000000..809e567
--- /dev/null
+++ b/arch/arm/compressed/barebox.lds.S
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2012 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <asm-generic/barebox.lds.h>
+#include <asm-generic/memory_layout.h>
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(compressed_start)
+SECTIONS
+{
+	. = HEAD_TEXT_BASE;
+
+	PRE_IMAGE
+
+	. = ALIGN(4);
+	.text      :
+	{
+		_stext = .;
+		_text = .;
+		*(.text_head_entry*)
+		__ll_return = .;
+		*(.text_ll_return*)
+		__bare_init_start = .;
+		*(.text_bare_init*)
+		__bare_init_end = .;
+		*(.text*)
+	}
+	BAREBOX_BARE_INIT_SIZE
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata*) }
+
+	_etext = .;			/* End of text and rodata section */
+
+	. = ALIGN(4);
+	.piggydata : {
+		*(.piggydata)
+	}
+
+	. = ALIGN(4);
+	.data : { *(.data*) }
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss*) }
+	__bss_stop = .;
+	_end = .;
+	_barebox_image_size = __bss_start - HEAD_TEXT_BASE;
+}
diff --git a/arch/arm/compressed/piggy.lzo.S b/arch/arm/compressed/piggy.lzo.S
new file mode 100644
index 0000000..0c0d216
--- /dev/null
+++ b/arch/arm/compressed/piggy.lzo.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl	input_data
+input_data:
+	.incbin	"arch/arm/compressed/piggy.lzo"
+	.globl	input_data_end
+input_data_end:
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 8ab6fdc..6c745f7 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -100,6 +100,7 @@ void __naked __bare_init reset(void)
 	board_init_lowlevel_return();
 }
 
+#ifdef CONFIG_COMPRESSOR
 extern void *input_data;
 extern void *input_data_end;
 
@@ -129,6 +130,29 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
 	barebox();
 }
 
+void barebox_decompress(uint32_t offset)
+{
+	uint32_t compressed_start, compressed_end, len;
+	void (*uncompress)(void *compressed_start, unsigned int len);
+
+	compressed_start = (uint32_t)&input_data - offset;
+	compressed_end = (uint32_t)&input_data_end - offset;
+	len = compressed_end - compressed_start;
+
+	uncompress = barebox_uncompress;
+
+	/* call barebox_uncompress with its absolute address */
+	__asm__ __volatile__(
+		"mov r0, %1\n"
+		"mov r1, %2\n"
+		"mov pc, %0\n"
+		:
+		: "r"(uncompress), "r"(compressed_start), "r"(len)
+		: "r0", "r1");
+}
+#else
+void barebox_decompress(uint32_t offset) {}
+#endif
 
 /*
  * Board code can jump here by either returning from board_init_lowlevel
@@ -137,8 +161,6 @@ void barebox_uncompress(void *compressed_start, unsigned int len)
 void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 {
 	uint32_t r, addr, offset;
-	uint32_t compressed_start, compressed_end, len;
-	void (*uncompress)(void *compressed_start, unsigned int len);
 
 	/*
 	 * Get runtime address of this function. Do not
@@ -169,20 +191,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
 	if (IS_ENABLED(CONFIG_IMAGE_COMPRESSION)) {
-		compressed_start = (uint32_t)&input_data - offset;
-		compressed_end = (uint32_t)&input_data_end - offset;
-		len = compressed_end - compressed_start;
-
-		uncompress = barebox_uncompress;
-
-		/* call barebox_uncompress with its absolute address */
-		__asm__ __volatile__(
-			"mov r0, %1\n"
-			"mov r1, %2\n"
-			"mov pc, %0\n"
-			:
-			: "r"(uncompress), "r"(compressed_start), "r"(len)
-			: "r0", "r1");
+		barebox_decompress(offset);
 	} else {
 		/* call start_barebox with its absolute address */
 		r = (unsigned int)&start_barebox;
diff --git a/compressed/misc.c b/compressed/misc.c
new file mode 100644
index 0000000..47e9cea
--- /dev/null
+++ b/compressed/misc.c
@@ -0,0 +1,14 @@
+#include <common.h>
+#include <init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+void __noreturn panic(const char *fmt, ...)
+{
+	while(1);
+}
+
+void start_barebox(void)
+{
+}
diff --git a/compressed/string.c b/compressed/string.c
new file mode 100644
index 0000000..6787e82
--- /dev/null
+++ b/compressed/string.c
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/compressed/string.c
+ *
+ * Small subset of simple string routines
+ */
+
+#include <linux/types.h>
+
+void *memcpy(void *__dest, __const void *__src, size_t __n)
+{
+	int i = 0;
+	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
+
+	for (i = __n >> 3; i > 0; i--) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 2) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 1) {
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1)
+		*d++ = *s++;
+
+	return __dest;
+}
+
+void *memmove(void *__dest, __const void *__src, size_t count)
+{
+	unsigned char *d = __dest;
+	const unsigned char *s = __src;
+
+	if (__dest == __src)
+		return __dest;
+
+	if (__dest < __src)
+		return memcpy(__dest, __src, count);
+
+	while (count--)
+		d[count] = s[count];
+	return __dest;
+}
+
+size_t strlen(const char *s)
+{
+	const char *sc = s;
+
+	while (*sc != '\0')
+		sc++;
+	return sc - s;
+}
+
+int memcmp(const void *cs, const void *ct, size_t count)
+{
+	const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;
+	int res = 0;
+
+	while (su1 < end) {
+		res = *su1++ - *su2++;
+		if (res)
+			break;
+	}
+	return res;
+}
+
+int strcmp(const char *cs, const char *ct)
+{
+	unsigned char c1, c2;
+	int res = 0;
+
+	do {
+		c1 = *cs++;
+		c2 = *ct++;
+		res = c1 - c2;
+		if (res)
+			break;
+	} while (c1);
+	return res;
+}
+
+void *memchr(const void *s, int c, size_t count)
+{
+	const unsigned char *p = s;
+
+	while (count--)
+		if ((unsigned char)c == *p++)
+			return (void *)(p - 1);
+	return NULL;
+}
+
+char *strchr(const char *s, int c)
+{
+	while (*s != (char)c)
+		if (*s++ == '\0')
+			return NULL;
+	return (char *)s;
+}
+
+#undef memset
+
+void *memset(void *s, int c, size_t count)
+{
+	char *xs = s;
+	while (count--)
+		*xs++ = c;
+	return s;
+}
+
+void __memzero(void *s, size_t count)
+{
+	memset(s, 0, count);
+}
diff --git a/piggy.lzo.S b/piggy.lzo.S
deleted file mode 100644
index 6cc618d..0000000
--- a/piggy.lzo.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.section .piggydata,#alloc
-	.globl  input_data
-input_data:
-	.incbin "barebox-uncompressed.bin.lzo"
-	.globl  input_data_end
-input_data_end:
-- 
1.7.10.4



From u.kleine-koenig at pengutronix.de  Wed Jul 25 05:05:14 2012
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Wed, 25 Jul 2012 11:05:14 +0200
Subject: [PATCH] i2c: fix printf format specifier
Message-ID: <1343207114-6238-1-git-send-email-u.kleine-koenig@pengutronix.de>

Use %u instead of %d for an u32 variable

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 drivers/i2c/i2c.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
index 9e52b86..b3c3c93 100644
--- a/drivers/i2c/i2c.c
+++ b/drivers/i2c/i2c.c
@@ -181,7 +181,7 @@ int i2c_read_reg(struct i2c_client *client, u32 addr, u8 *buf, u16 count)
 	msg->len = i;
 
 	status = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
-	dev_dbg(&client->dev, "%s: %zu@%d --> %d\n", __func__,
+	dev_dbg(&client->dev, "%s: %zu@%u --> %d\n", __func__,
 		count, addr, status);
 
 	if (status == ARRAY_SIZE(msg))
@@ -214,7 +214,7 @@ int i2c_write_reg(struct i2c_client *client, u32 addr, const u8 *buf, u16 count)
 	memcpy(msg->buf + i, buf, count);
 
 	status = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
-	dev_dbg(&client->dev, "%s: %u@%d --> %d\n", __func__,
+	dev_dbg(&client->dev, "%s: %u@%u --> %d\n", __func__,
 		count, addr, status);
 
 	if (status == ARRAY_SIZE(msg))
-- 
1.7.10.4



From t.gamez at phytec.de  Wed Jul 25 08:55:07 2012
From: t.gamez at phytec.de (=?UTF-8?q?Teresa=20G=C3=A1mez?=)
Date: Wed, 25 Jul 2012 14:55:07 +0200
Subject: [PATCH] defaultenv-2: Add bootargs for booting from disk
Message-ID: <1343220907-28336-1-git-send-email-t.gamez@phytec.de>

Add support in defaultenv-2 for booting from disk (SD-Card, USB-Stick).

Signed-off-by: Teresa G?mez <t.gamez at phytec.de>
---
 defaultenv-2/base/bin/bootargs-root-disk |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 defaultenv-2/base/bin/bootargs-root-disk

diff --git a/defaultenv-2/base/bin/bootargs-root-disk b/defaultenv-2/base/bin/bootargs-root-disk
new file mode 100644
index 0000000..076afdf
--- /dev/null
+++ b/defaultenv-2/base/bin/bootargs-root-disk
@@ -0,0 +1,26 @@
+#!/bin/sh
+
+usage="$0 [OPTIONS]\n -p <partition>\n -t <fstype>"
+
+while getopt "p:t:h" opt; do
+	if [ ${opt} = p ]; then
+		part=${OPTARG}
+	elif [ ${opt} = t ]; then
+		fstype=${OPTARG}
+	elif [ ${opt} = h ]; then
+		echo -e "$usage"
+		exit 0
+	fi
+done
+
+if [ -z "${part}" ]; then
+	echo "$0: no partiton given"
+	exit
+fi
+
+if [ -z "${fstype}" ]; then
+	echo "$0: no filesystem type given"
+	exit
+fi
+
+global.linux.bootargs.root="root=/dev/$part rootfstype=$fstype rootwait"
-- 
1.7.0.4



From rnibali at gmail.com  Wed Jul 25 10:22:09 2012
From: rnibali at gmail.com (Roberto Nibali)
Date: Wed, 25 Jul 2012 16:22:09 +0200
Subject: [PATCH] defaultenv-2: Add bootargs for booting from disk
In-Reply-To: <1343220907-28336-1-git-send-email-t.gamez@phytec.de>
References: <1343220907-28336-1-git-send-email-t.gamez@phytec.de>
Message-ID: <CAONxwYM7q_TsB3T93q6JsaLeU8sOB+Auy7yHVAZ-+vdkP0gHSw@mail.gmail.com>

Hi

On Wed, Jul 25, 2012 at 2:55 PM, Teresa G?mez <t.gamez at phytec.de> wrote:
> Add support in defaultenv-2 for booting from disk (SD-Card, USB-Stick).
>
> Signed-off-by: Teresa G?mez <t.gamez at phytec.de>
> ---
>  defaultenv-2/base/bin/bootargs-root-disk |   26 ++++++++++++++++++++++++++
>  1 files changed, 26 insertions(+), 0 deletions(-)
>  create mode 100644 defaultenv-2/base/bin/bootargs-root-disk
>
> diff --git a/defaultenv-2/base/bin/bootargs-root-disk b/defaultenv-2/base/bin/bootargs-root-disk
> new file mode 100644
> index 0000000..076afdf
> --- /dev/null
> +++ b/defaultenv-2/base/bin/bootargs-root-disk
> @@ -0,0 +1,26 @@
> +#!/bin/sh
> +
> +usage="$0 [OPTIONS]\n -p <partition>\n -t <fstype>"
> +
> +while getopt "p:t:h" opt; do
> +       if [ ${opt} = p ]; then
> +               part=${OPTARG}
> +       elif [ ${opt} = t ]; then
> +               fstype=${OPTARG}
> +       elif [ ${opt} = h ]; then
> +               echo -e "$usage"
> +               exit 0
> +       fi
> +done
> +
> +if [ -z "${part}" ]; then
> +       echo "$0: no partiton given"

s/partiton/partition/

> +       exit
> +fi
> +
> +if [ -z "${fstype}" ]; then
> +       echo "$0: no filesystem type given"
> +       exit
> +fi
> +
> +global.linux.bootargs.root="root=/dev/$part rootfstype=$fstype rootwait"

Looks fine otherwise, besides considering returning a non-zero return
value upon exit for errors.

Regards
Roberto


From christian.buettner at rafi.de  Wed Jul 25 10:31:56 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Wed, 25 Jul 2012 16:31:56 +0200
Subject: nor flash board init code
Message-ID: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>

hi all,
is there any example board init code to load the mx25l8005 spi nor-flash 
through the imx53 (TX53 from KARO)?
I want to use the m25p80 driver to read and write.

christian
-------------- next part --------------
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From t.gamez at phytec.de  Wed Jul 25 10:42:05 2012
From: t.gamez at phytec.de (=?UTF-8?q?Teresa=20G=C3=A1mez?=)
Date: Wed, 25 Jul 2012 16:42:05 +0200
Subject: [PATCHv2] defaultenv-2: Add bootargs for booting from disk
Message-ID: <1343227325-28925-1-git-send-email-t.gamez@phytec.de>

Add support in defaultenv-2 for booting from disk (SD-Card, USB-Stick).

Signed-off-by: Teresa G?mez <t.gamez at phytec.de>
---
Fixed since v1:
	- spell fix
	- added return value on failure

 defaultenv-2/base/bin/bootargs-root-disk |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 defaultenv-2/base/bin/bootargs-root-disk

diff --git a/defaultenv-2/base/bin/bootargs-root-disk b/defaultenv-2/base/bin/bootargs-root-disk
new file mode 100644
index 0000000..df8750e
--- /dev/null
+++ b/defaultenv-2/base/bin/bootargs-root-disk
@@ -0,0 +1,26 @@
+#!/bin/sh
+
+usage="$0 [OPTIONS]\n -p <partition>\n -t <fstype>"
+
+while getopt "p:t:h" opt; do
+	if [ ${opt} = p ]; then
+		part=${OPTARG}
+	elif [ ${opt} = t ]; then
+		fstype=${OPTARG}
+	elif [ ${opt} = h ]; then
+		echo -e "$usage"
+		exit 0
+	fi
+done
+
+if [ -z "${part}" ]; then
+	echo "$0: no partition given"
+	exit 1
+fi
+
+if [ -z "${fstype}" ]; then
+	echo "$0: no filesystem type given"
+	exit 1
+fi
+
+global.linux.bootargs.root="root=/dev/$part rootfstype=$fstype rootwait"
-- 
1.7.0.4



From renaud.barbier at ge.com  Wed Jul 25 12:01:01 2012
From: renaud.barbier at ge.com (Renaud Barbier)
Date: Wed, 25 Jul 2012 17:01:01 +0100
Subject: [PATCH 3/3] ppc: P2020RDB Ethernet configuration
In-Reply-To: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
References: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
Message-ID: <1343232061-1789-4-git-send-email-renaud.barbier@ge.com>

Minimal support of the Ethernet interface on the P2020RDB board. Only
the eTSEC3 interface is supported.

Signed-off-by: Renaud Barbier <renaud.barbier at ge.com>
---
 arch/ppc/boards/freescale-p2020rdb/p2020rdb.c |   38 +++++++++++++++++++++++++
 arch/ppc/configs/p2020rdb_defconfig           |    6 ++++
 2 files changed, 44 insertions(+), 0 deletions(-)

diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
index 20897cb..201220f 100644
--- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
+++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
@@ -35,6 +35,7 @@
 #include <mach/mmu.h>
 #include <mach/immap_85xx.h>
 #include <mach/clocks.h>
+#include <mach/gianfar.h>
 #include <mach/early_udelay.h>
 
 #define VSC7385_RST_SET		0x00080000
@@ -61,10 +62,47 @@
 #define SYSCLK_50	50000000
 #define SYSCLK_100	100000000
 
+/* Ethernet. Use eTSEC3 */
+static struct gfar_info_struct gfar_info[] = {
+	{
+	.phyaddr = 1,
+	.tbiana = 0,
+	.tbicr = 0,
+	.flags = 0,
+	},
+};
+
+static int board_eth_init(int num, int idx)
+{
+	struct resource *res;
+
+	res = xzalloc(3 * sizeof(struct resource));
+	/* TSEC interface registers */
+	res[0].start = GFAR_BASE_ADDR + ((num - 1) * 0x1000);
+	res[0].end = res[0].start + 0x1000;
+	res[0].flags = IORESOURCE_MEM;
+	/* External PHY access always through eTSEC1 */
+	res[1].start = MDIO_BASE_ADDR;
+	res[1].end = res[1].start + 0x1000;
+	res[1].flags = IORESOURCE_MEM;
+	/* Access to TBI/RTBI interface. */
+	res[2].start = MDIO_BASE_ADDR + ((num - 1) * 0x1000);
+	res[2].end = res[2].start + 0x1000;
+	res[2].flags = IORESOURCE_MEM;
+
+	add_generic_device_res("gfar", DEVICE_ID_DYNAMIC, res, 3,
+				&gfar_info[idx]);
+
+	return 0;
+}
+
 static int devices_init(void)
 {
 	add_cfi_flash_device(-1, CFG_FLASH_BASE, 16 << 20, 0);
 
+	/* eTSEC3 */
+	board_eth_init(3, 0);
+
 	devfs_add_partition("nor0", 0xf80000, 0x80000, DEVFS_PARTITION_FIXED,
 			    "self0");
 	return 0;
diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig
index f8a0687..d025a40 100644
--- a/arch/ppc/configs/p2020rdb_defconfig
+++ b/arch/ppc/configs/p2020rdb_defconfig
@@ -21,3 +21,9 @@ CONFIG_MALLOC_SIZE=0x200000
 CONFIG_BAUDRATE=115200
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_RELOCATABLE=y
+CONFIG_DRIVER_NET_GIANFAR=y
+CONFIG_NET=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_PING=y
+CONFIG_TFTP=y
-- 
1.7.1



From renaud.barbier at ge.com  Wed Jul 25 12:00:59 2012
From: renaud.barbier at ge.com (Renaud Barbier)
Date: Wed, 25 Jul 2012 17:00:59 +0100
Subject: [PATCH 1/3] ppc: GIANFAR base address definition
In-Reply-To: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
References: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
Message-ID: <1343232061-1789-2-git-send-email-renaud.barbier@ge.com>

In view of the introduction of the GIANFAR Ethernet driver,
the mdio and gianfar base address are defined.

Signed-off-by: Renaud Barbier <renaud.barbier at ge.com>
---
 arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h b/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
index b802249..bf0f7f5 100644
--- a/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
+++ b/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
@@ -39,6 +39,11 @@
 
 #define MPC85xx_GPIO_OFFSET	0xf000
 #define MPC85xx_L2_OFFSET	0x20000
+#ifdef CONFIG_TSECV2
+#define TSEC1_OFFSET		0xB0000
+#else
+#define TSEC1_OFFSET		0x24000
+#endif
 
 #define MPC85xx_PIC_OFFSET	0x40000
 #define MPC85xx_GUTS_OFFSET	0xe0000
@@ -129,4 +134,6 @@
 #define		MPC85xx_DEVDISR_TB1	0x00001000
 #define MPC85xx_GUTS_RSTCR_OFFSET	0xb0
 
+#define GFAR_BASE_ADDR		(CFG_IMMR + TSEC1_OFFSET)
+#define MDIO_BASE_ADDR		(CFG_IMMR + 0x24000)
 #endif /*__IMMAP_85xx__*/
-- 
1.7.1



From renaud.barbier at ge.com  Wed Jul 25 12:00:58 2012
From: renaud.barbier at ge.com (Renaud Barbier)
Date: Wed, 25 Jul 2012 17:00:58 +0100
Subject: [PATCH 0/3] ppc: Freescale TSEC driver.
Message-ID: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>

This patchset adds support for the Freescale Ethernet driver(TSEC).
It is tested on a P2020RDB board using the eTSEC3 interface(RGMII)
only.

Renaud Barbier (3):
  ppc: GIANFAR base address definition
  net: GIANFAR driver
  ppc: P2020RDB Ethernet configuration

 arch/ppc/boards/freescale-p2020rdb/p2020rdb.c   |   38 ++
 arch/ppc/configs/p2020rdb_defconfig             |    6 +
 arch/ppc/mach-mpc85xx/include/mach/gianfar.h    |   31 ++
 arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h |    7 +
 drivers/net/Kconfig                             |    5 +
 drivers/net/Makefile                            |    1 +
 drivers/net/gianfar.c                           |  558 +++++++++++++++++++++++
 drivers/net/gianfar.h                           |  288 ++++++++++++
 8 files changed, 934 insertions(+), 0 deletions(-)
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/gianfar.h
 create mode 100644 drivers/net/gianfar.c
 create mode 100644 drivers/net/gianfar.h



From renaud.barbier at ge.com  Wed Jul 25 12:01:00 2012
From: renaud.barbier at ge.com (Renaud Barbier)
Date: Wed, 25 Jul 2012 17:01:00 +0100
Subject: [PATCH 2/3] net: GIANFAR driver
In-Reply-To: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
References: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
Message-ID: <1343232061-1789-3-git-send-email-renaud.barbier@ge.com>

This update adds the GIANFAR driver along with the configuration
and build files.

Signed-off-by: Renaud Barbier <renaud.barbier at ge.com>
---
 arch/ppc/mach-mpc85xx/include/mach/gianfar.h |   31 ++
 drivers/net/Kconfig                          |    5 +
 drivers/net/Makefile                         |    1 +
 drivers/net/gianfar.c                        |  558 ++++++++++++++++++++++++++
 drivers/net/gianfar.h                        |  288 +++++++++++++
 5 files changed, 883 insertions(+), 0 deletions(-)
 create mode 100644 arch/ppc/mach-mpc85xx/include/mach/gianfar.h
 create mode 100644 drivers/net/gianfar.c
 create mode 100644 drivers/net/gianfar.h

diff --git a/arch/ppc/mach-mpc85xx/include/mach/gianfar.h b/arch/ppc/mach-mpc85xx/include/mach/gianfar.h
new file mode 100644
index 0000000..1527536
--- /dev/null
+++ b/arch/ppc/mach-mpc85xx/include/mach/gianfar.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2012 GE Intelligent Platforms, Inc.
+ * Copyright 2004, 2007, 2009  Freescale Semiconductor, Inc.
+ * (C) Copyright 2003, Motorola, Inc.
+ * based on tsec.h by Xianghua Xiao and Andy Fleming 2003-2009
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Platform data for the Motorola Triple Speed Ethernet Controller
+ */
+
+struct gfar_info_struct {
+	unsigned int phyaddr;
+	unsigned int tbiana;
+	unsigned int tbicr;
+	u32 flags;
+	int (*get_mac)(struct gfar_info_struct *, unsigned char *);
+};
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 749ea6a..7d21ed8 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -124,6 +124,11 @@ config DRIVER_NET_DESIGNWARE_ALTDESCRIPTOR
 	depends on DRIVER_NET_DESIGNWARE
 	default n
 
+config DRIVER_NET_GIANFAR
+	bool "Gianfar Ethernet"
+	depends on ARCH_MPC85XX
+	select MIIDEV
+
 source "drivers/net/usb/Kconfig"
 
 endmenu
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 29727b7..4d960e8 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_NET_USB)			+= usb/
 obj-$(CONFIG_DRIVER_NET_TSE)		+= altera_tse.o
 obj-$(CONFIG_DRIVER_NET_KS8851_MLL)	+= ks8851_mll.o
 obj-$(CONFIG_DRIVER_NET_DESIGNWARE)	+= designware.o
+obj-$(CONFIG_DRIVER_NET_GIANFAR)	+= gianfar.o
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
new file mode 100644
index 0000000..d12c18d
--- /dev/null
+++ b/drivers/net/gianfar.c
@@ -0,0 +1,558 @@
+/*
+ * Freescale Three Speed Ethernet Controller driver
+ *
+ * This software may be used and distributed according to the
+ * terms of the GNU Public License, Version 2, incorporated
+ * herein by reference.
+ *
+ * Copyright 2012 GE Intelligent Platforms, Inc.
+ * based on work by Andy Fleming
+ */
+
+#include <config.h>
+#include <common.h>
+#include <malloc.h>
+#include <net.h>
+#include <init.h>
+#include <driver.h>
+#include <miidev.h>
+#include <command.h>
+#include <errno.h>
+#include <asm/io.h>
+#include "gianfar.h"
+
+#define TX_BUF_CNT	2
+#define RX_BUF_CNT 	PKTBUFSRX
+#define BUF_ALIGN	8
+
+/*
+ * Initialize required registers to appropriate values, zeroing
+ * those we don't care about (unless zero is bad, in which case,
+ * choose a more appropriate value)
+ */
+static void init_registers(void __iomem *regs)
+{
+	out_be32(regs + GFAR_IEVENT_OFFSET, GFAR_IEVENT_INIT_CLEAR);
+
+	out_be32(regs + GFAR_IMASK_OFFSET, GFAR_IMASK_INIT_CLEAR);
+
+	out_be32(regs + GFAR_IADDR(0), 0);
+	out_be32(regs + GFAR_IADDR(1), 0);
+	out_be32(regs + GFAR_IADDR(2), 0);
+	out_be32(regs + GFAR_IADDR(3), 0);
+	out_be32(regs + GFAR_IADDR(4), 0);
+	out_be32(regs + GFAR_IADDR(5), 0);
+	out_be32(regs + GFAR_IADDR(6), 0);
+	out_be32(regs + GFAR_IADDR(7), 0);
+
+	out_be32(regs + GFAR_GADDR(0), 0);
+	out_be32(regs + GFAR_GADDR(1), 0);
+	out_be32(regs + GFAR_GADDR(2), 0);
+	out_be32(regs + GFAR_GADDR(3), 0);
+	out_be32(regs + GFAR_GADDR(4), 0);
+	out_be32(regs + GFAR_GADDR(5), 0);
+	out_be32(regs + GFAR_GADDR(6), 0);
+	out_be32(regs + GFAR_GADDR(7), 0);
+
+	out_be32(regs + GFAR_RCTRL_OFFSET, 0x00000000);
+
+	memset((void *)(regs + GFAR_TR64_OFFSET), 0,
+			GFAR_CAM2_OFFSET - GFAR_TR64_OFFSET);
+
+	out_be32(regs + GFAR_CAM1_OFFSET, 0xffffffff);
+	out_be32(regs + GFAR_CAM2_OFFSET, 0xffffffff);
+
+	out_be32(regs + GFAR_MRBLR_OFFSET, MRBLR_INIT_SETTINGS);
+
+	out_be32(regs + GFAR_MINFLR_OFFSET, MINFLR_INIT_SETTINGS);
+
+	out_be32(regs + GFAR_ATTR_OFFSET, ATTR_INIT_SETTINGS);
+	out_be32(regs + GFAR_ATTRELI_OFFSET, ATTRELI_INIT_SETTINGS);
+}
+
+/*
+ * Configure maccfg2 based on negotiated speed and duplex
+ * reported by PHY handling code
+ */
+static void adjust_link(struct eth_device *dev)
+{
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+	u32 ecntrl, maccfg2;
+	uint32_t status;
+
+	status = miidev_get_status(&priv->miidev);
+
+	priv->link = status & MIIDEV_STATUS_IS_UP;
+	if (status & MIIDEV_STATUS_IS_FULL_DUPLEX)
+		priv->duplexity = 1;
+	else
+		priv->duplexity = 0;
+
+	if (status & MIIDEV_STATUS_IS_1000MBIT)
+		priv->speed = 1000;
+	else if (status & MIIDEV_STATUS_IS_100MBIT)
+		priv->speed = 100;
+	else
+		priv->speed = 10;
+
+	if (priv->link) {
+		/* clear all bits relative with interface mode */
+		ecntrl = in_be32(regs + GFAR_ECNTRL_OFFSET);
+		ecntrl &= ~GFAR_ECNTRL_R100;
+
+		maccfg2 = in_be32(regs + GFAR_MACCFG2_OFFSET);
+		maccfg2 &= ~(GFAR_MACCFG2_IF | GFAR_MACCFG2_FULL_DUPLEX);
+
+		if (priv->duplexity != 0)
+			maccfg2 |= GFAR_MACCFG2_FULL_DUPLEX;
+		else
+			maccfg2 &= ~(GFAR_MACCFG2_FULL_DUPLEX);
+
+		switch (priv->speed) {
+		case 1000:
+			maccfg2 |= GFAR_MACCFG2_GMII;
+			break;
+		case 100:
+		case 10:
+			maccfg2 |= GFAR_MACCFG2_MII;
+			/*
+			 * Set R100 bit in all modes although
+			 * it is only used in RGMII mode
+			 */
+			if (priv->speed == 100)
+				ecntrl |= GFAR_ECNTRL_R100;
+			break;
+		default:
+			printf("%s: Speed was bad\n", dev->dev.name);
+			break;
+		}
+
+		out_be32(regs + GFAR_ECNTRL_OFFSET, ecntrl);
+		out_be32(regs + GFAR_MACCFG2_OFFSET, maccfg2);
+
+		printf("Speed: %d, %s duplex\n", priv->speed,
+		       (priv->duplexity) ? "full" : "half");
+
+	} else {
+		printf("%s: No link.\n", dev->dev.name);
+	}
+}
+
+/* Stop the interface */
+static void gfar_halt(struct eth_device *dev)
+{
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+	int value;
+
+	clrbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
+			GFAR_DMACTRL_GTS);
+	setbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
+			GFAR_DMACTRL_GTS);
+
+	value = in_be32(regs + GFAR_IEVENT_OFFSET);
+	value &= (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC);
+
+	while (value != (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC)) {
+		value = in_be32(regs + GFAR_IEVENT_OFFSET);
+		value &= (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC);
+	}
+
+	clrbits_be32(regs + GFAR_MACCFG1_OFFSET,
+			GFAR_MACCFG1_TX_EN | GFAR_MACCFG1_RX_EN);
+}
+
+/* Initializes registers for the controller. */
+static int gfar_init(struct eth_device *dev)
+{
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+
+	gfar_halt(dev);
+
+	/* Init MACCFG2. Default to GMII */
+	out_be32(regs + GFAR_MACCFG2_OFFSET, MACCFG2_INIT_SETTINGS);
+	out_be32(regs + GFAR_ECNTRL_OFFSET, ECNTRL_INIT_SETTINGS);
+
+	priv->rxIdx = 0;
+	priv->txIdx = 0;
+
+	init_registers(regs);
+
+	miidev_restart_aneg(&priv->miidev);
+
+	return  0;
+}
+
+static int gfar_open(struct eth_device *dev)
+{
+	int ix;
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+
+	/* Point to the buffer descriptors */
+	out_be32(regs + GFAR_TBASE0_OFFSET, (unsigned int)priv->txbd);
+	out_be32(regs + GFAR_RBASE0_OFFSET, (unsigned int)priv->rxbd);
+
+	/* Initialize the Rx Buffer descriptors */
+	for (ix = 0; ix < RX_BUF_CNT; ix++) {
+		priv->rxbd[ix].status = RXBD_EMPTY;
+		priv->rxbd[ix].length = 0;
+		priv->rxbd[ix].bufPtr = (uint) NetRxPackets[ix];
+	}
+	priv->rxbd[RX_BUF_CNT - 1].status |= RXBD_WRAP;
+
+	/* Initialize the TX Buffer Descriptors */
+	for (ix = 0; ix < TX_BUF_CNT; ix++) {
+		priv->txbd[ix].status = 0;
+		priv->txbd[ix].length = 0;
+		priv->txbd[ix].bufPtr = 0;
+	}
+	priv->txbd[TX_BUF_CNT - 1].status |= TXBD_WRAP;
+
+	miidev_wait_aneg(&priv->miidev);
+	adjust_link(dev);
+
+	/* Enable Transmit and Receive */
+	setbits_be32(regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_RX_EN |
+			GFAR_MACCFG1_TX_EN);
+
+	/* Tell the DMA it is clear to go */
+	setbits_be32(regs + GFAR_DMACTRL_OFFSET, DMACTRL_INIT_SETTINGS);
+	out_be32(regs + GFAR_TSTAT_OFFSET, GFAR_TSTAT_CLEAR_THALT);
+	out_be32(regs + GFAR_RSTAT_OFFSET, GFAR_RSTAT_CLEAR_RHALT);
+	clrbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
+			GFAR_DMACTRL_GTS);
+
+	return 0;
+}
+
+static int gfar_get_ethaddr(struct eth_device *dev, unsigned char *mac)
+{
+	struct device_d *edev = dev->parent;
+	struct gfar_info_struct *gfar_info =
+		(struct gfar_info_struct *)edev->platform_data;
+	int (*get_mac)(struct gfar_info_struct *, unsigned char *) =
+		gfar_info->get_mac;
+
+	if (get_mac)
+		get_mac(gfar_info, mac);
+	else
+		return -ENODEV;
+
+	return 0;
+}
+
+static int gfar_set_ethaddr(struct eth_device *dev, unsigned char *mac)
+{
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+	char tmpbuf[MAC_ADDR_LEN];
+	uint tempval;
+	int ix;
+
+	for (ix = 0; ix < MAC_ADDR_LEN; ix++)
+		tmpbuf[MAC_ADDR_LEN - 1 - ix] = mac[ix];
+
+	tempval = (tmpbuf[0] << 24) | (tmpbuf[1] << 16) | (tmpbuf[2] << 8) |
+		  tmpbuf[3];
+
+	out_be32(regs + GFAR_MACSTRADDR1_OFFSET, tempval);
+
+	tempval = *((uint *)(tmpbuf + 4));
+
+	out_be32(regs + GFAR_MACSTRADDR2_OFFSET, tempval);
+
+	return 0;
+}
+
+/* Writes the given phy's reg with value, using the specified MDIO regs */
+static int gfar_local_mdio_write(void __iomem *phyregs, uint addr, uint reg,
+				uint value)
+{
+	uint64_t start;
+
+	out_be32(phyregs + GFAR_MIIMADD_OFFSET, (addr << 8) | (reg & 0x1f));
+	out_be32(phyregs + GFAR_MIIMCON_OFFSET, value);
+
+	start = get_time_ns();
+
+	while (!is_timeout(start, 10 * MSECOND)) {
+		if (!(in_be32(phyregs + GFAR_MIIMMIND_OFFSET) &
+					GFAR_MIIMIND_BUSY))
+			return 0;
+	}
+
+	return -EIO;
+}
+
+/*
+ * Reads register regnum on the device's PHY through the
+ * specified registers. It lowers and raises the read
+ * command, and waits for the data to become valid (miimind
+ * notvalid bit cleared), and the bus to cease activity (miimind
+ * busy bit cleared), and then returns the value
+ */
+static uint gfar_local_mdio_read(void __iomem *phyregs, uint phyid, uint regnum)
+{
+	uint64_t start;
+
+	/* Put the address of the phy, and the register number into MIIMADD */
+	out_be32(phyregs + GFAR_MIIMADD_OFFSET, (phyid << 8) | (regnum & 0x1f));
+
+	/* Clear the command register, and wait */
+	out_be32(phyregs + GFAR_MIIMCOM_OFFSET, 0);
+
+	/* Initiate a read command, and wait */
+	out_be32(phyregs + GFAR_MIIMCOM_OFFSET, GFAR_MIIM_READ_COMMAND);
+
+	start = get_time_ns();
+
+	while (!is_timeout(start, 10 * MSECOND)) {
+		if (!(in_be32(phyregs + GFAR_MIIMMIND_OFFSET) &
+			(GFAR_MIIMIND_NOTVALID | GFAR_MIIMIND_BUSY)))
+			return in_be32(phyregs + GFAR_MIIMSTAT_OFFSET);
+	}
+	return -EIO;
+}
+
+static void gfar_configure_serdes(struct gfar_private *priv)
+{
+	gfar_local_mdio_write(priv->phyregs_sgmii,
+			in_be32(priv->regs + GFAR_TBIPA_OFFSET), GFAR_TBI_ANA,
+			priv->tbiana);
+	gfar_local_mdio_write(priv->phyregs_sgmii,
+			in_be32(priv->regs + GFAR_TBIPA_OFFSET),
+			GFAR_TBI_TBICON, GFAR_TBICON_CLK_SELECT);
+	gfar_local_mdio_write(priv->phyregs_sgmii,
+			in_be32(priv->regs + GFAR_TBIPA_OFFSET), GFAR_TBI_CR,
+			priv->tbicr);
+}
+
+/* Reset the internal and external PHYs. */
+static void init_phy(struct eth_device *dev)
+{
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+	uint64_t start;
+
+	/* Assign a Physical address to the TBI */
+	out_be32(regs + GFAR_TBIPA_OFFSET, GFAR_TBIPA_VALUE);
+
+	/* Reset MII (due to new addresses) */
+	out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_RESET);
+	out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_INIT_VALUE);
+
+	start = get_time_ns();
+	while (!is_timeout(start, 10 * MSECOND)) {
+		if (!(in_be32(priv->phyregs + GFAR_MIIMMIND_OFFSET) &
+			GFAR_MIIMIND_BUSY))
+			break;
+	}
+
+	gfar_local_mdio_write(priv->phyregs, priv->phyaddr, GFAR_MIIM_CR,
+			GFAR_MIIM_CR_RST);
+
+	start = get_time_ns();
+	while (!is_timeout(start, 10 * MSECOND)) {
+		if (!(gfar_local_mdio_read(priv->phyregs, priv->phyaddr,
+					GFAR_MIIM_CR) & GFAR_MIIM_CR_RST))
+			break;
+	}
+
+	if (in_be32(regs + GFAR_ECNTRL_OFFSET) & GFAR_ECNTRL_SGMII_MODE)
+		gfar_configure_serdes(priv);
+}
+
+static int gfar_send(struct eth_device *dev, void *packet, int length)
+{
+	int ix;
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+
+	/* Find an empty buffer descriptor */
+	for (ix = 0; priv->txbd[priv->txIdx].status & TXBD_READY; ix++) {
+		if (ix >= TOUT_LOOP) {
+			debug("gfar: tx buffers full\n");
+			return -EBUSY;
+		}
+	}
+
+	priv->txbd[priv->txIdx].bufPtr = (uint) packet;
+	priv->txbd[priv->txIdx].length = length;
+	priv->txbd[priv->txIdx].status |= (TXBD_READY | TXBD_LAST | TXBD_CRC);
+
+	/* Tell the DMA to go */
+	out_be32(regs + GFAR_TSTAT_OFFSET, GFAR_TSTAT_CLEAR_THALT);
+
+	/* Wait for buffer to be transmitted */
+	for (ix = 0; priv->txbd[priv->txIdx].status & TXBD_READY; ix++) {
+		if (ix >= TOUT_LOOP) {
+			debug("gfar: tx error: 0x%x\n",
+				priv->txbd[priv->txIdx].status);
+			return -EBUSY;
+		}
+	}
+
+	if (priv->txbd[priv->txIdx].status & TXBD_STATS) {
+		printf("TX error: 0x%x\n", priv->txbd[priv->txIdx].status);
+		return -EIO;
+	}
+
+	priv->txIdx = (priv->txIdx + 1) % TX_BUF_CNT;
+
+	return 0;
+}
+
+static int gfar_recv(struct eth_device *dev)
+{
+	int length;
+	struct gfar_private *priv = (struct gfar_private *)dev->priv;
+	void __iomem *regs = priv->regs;
+
+	while (!(priv->rxbd[priv->rxIdx].status & RXBD_EMPTY)) {
+		length = priv->rxbd[priv->rxIdx].length;
+
+		/* Send the packet up if there were no errors */
+		if (!(priv->rxbd[priv->rxIdx].status & RXBD_STATS)) {
+			net_receive(NetRxPackets[priv->rxIdx], length - 4);
+		} else {
+			printf("Got error %x\n",
+			       (priv->rxbd[priv->rxIdx].status & RXBD_STATS));
+		}
+
+		priv->rxbd[priv->rxIdx].length = 0;
+
+		/* Set the wrap bit if this is the last element in the list */
+		if ((priv->rxIdx + 1) == RX_BUF_CNT)
+			priv->rxbd[priv->rxIdx].status = RXBD_WRAP;
+		else
+			priv->rxbd[priv->rxIdx].status = 0;
+
+		priv->rxbd[priv->rxIdx].status |= RXBD_EMPTY;
+		priv->rxIdx = (priv->rxIdx + 1) % RX_BUF_CNT;
+	}
+
+	if (in_be32(regs + GFAR_IEVENT_OFFSET) & GFAR_IEVENT_BSY) {
+		out_be32(regs + GFAR_IEVENT_OFFSET, GFAR_IEVENT_BSY);
+		out_be32(regs + GFAR_RSTAT_OFFSET, GFAR_RSTAT_CLEAR_RHALT);
+	}
+
+	return 0;
+}
+
+/* Read a MII PHY register. */
+static int gfar_miiphy_read(struct mii_device *mdev, int addr, int reg)
+{
+	unsigned short ret;
+	struct eth_device *edev = mdev->edev;
+	struct gfar_private *priv = (struct gfar_private *)edev->priv;
+
+	if (NULL == priv) {
+		printf("Can't read PHY at address %d\n", addr);
+		return -1;
+	}
+
+	return gfar_local_mdio_read(priv->phyregs, addr, reg);
+}
+
+/* Write a MII PHY register.  */
+static int gfar_miiphy_write(struct mii_device *mdev, int addr,
+			     int reg, int value)
+{
+	struct eth_device *edev = mdev->edev;
+	struct gfar_private *priv = (struct gfar_private *)edev->priv;
+	unsigned short val = value;
+
+	if (NULL == priv) {
+		printf("Can't write PHY at address %d\n", addr);
+		return -1;
+	}
+
+	gfar_local_mdio_write(priv->phyregs, addr, reg, val);
+
+	return 0;
+}
+
+/*
+ * Initialize device structure. Returns success if
+ * initialization succeeded.
+ */
+static int gfar_probe(struct device_d *dev)
+{
+	struct gfar_info_struct *gfar_info =
+		(struct gfar_info_struct *)dev->platform_data;
+	struct eth_device *edev;
+	struct gfar_private *priv;
+	size_t size;
+	char *p;
+
+	edev = (struct eth_device *)xzalloc(sizeof(struct eth_device) +
+					    sizeof(struct gfar_private));
+
+	if (NULL == edev)
+		return -ENODEV;
+
+	priv = (struct gfar_private *)(edev + 1);
+
+	priv->regs = dev_request_mem_region(dev, 0);
+	priv->phyregs = dev_request_mem_region(dev, 1);
+	priv->phyregs_sgmii = dev_request_mem_region(dev, 2);
+
+	priv->phyaddr = gfar_info->phyaddr;
+	priv->flags = gfar_info->flags;
+	priv->tbicr = gfar_info->tbicr;
+	priv->tbiana = gfar_info->tbiana;
+
+	/* Allocate descriptors. 64-byte aligned. */
+	size = (TX_BUF_CNT * (sizeof(struct txbd8) +
+		(RX_BUF_CNT * sizeof(struct rxbd8)))) + BUF_ALIGN;
+	p = (char *)xzalloc(size);
+	p += BUF_ALIGN;
+	p = (char *)((ulong)p & (~(BUF_ALIGN - 1)));
+
+	priv->txbd = (struct txbd8 *)p;
+	priv->rxbd = (struct rxbd8 *)(p +
+			(TX_BUF_CNT * sizeof(struct txbd8)));
+
+	edev->priv = priv;
+	edev->init = gfar_init;
+	edev->open = gfar_open;
+	edev->halt = gfar_halt;
+	edev->send = gfar_send;
+	edev->recv = gfar_recv;
+	edev->get_ethaddr = gfar_get_ethaddr;
+	edev->set_ethaddr = gfar_set_ethaddr;
+	edev->parent = dev;
+
+	setbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET);
+	udelay(2);
+	clrbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET);
+
+	priv->miidev.read = gfar_miiphy_read;
+	priv->miidev.write = gfar_miiphy_write;
+	priv->miidev.address = priv->phyaddr;
+	priv->miidev.flags = 0;
+	priv->miidev.edev = edev;
+	priv->miidev.parent = dev;
+
+	init_phy(edev);
+
+	mii_register(&priv->miidev);
+
+	return eth_register(edev);
+}
+
+static struct driver_d gfar_eth_driver = {
+	.name  = "gfar",
+	.probe = gfar_probe,
+};
+
+static int gfar_eth_init(void)
+{
+	register_driver(&gfar_eth_driver);
+	return 0;
+}
+
+device_initcall(gfar_eth_init);
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
new file mode 100644
index 0000000..9edbd12
--- /dev/null
+++ b/drivers/net/gianfar.h
@@ -0,0 +1,288 @@
+/*
+ *  gianfar.h
+ *
+ *  Driver for the Motorola Triple Speed Ethernet Controller
+ *
+ *  This software may be used and distributed according to the
+ *  terms of the GNU Public License, Version 2, incorporated
+ *  herein by reference.
+ *
+ * Copyright 2012 GE Intelligent Platforms, Inc.
+ * Copyright 2004, 2007, 2009  Freescale Semiconductor, Inc.
+ * (C) Copyright 2003, Motorola, Inc.
+ * based on tsec.h by Xianghua Xiao and Andy Fleming 2003-2009
+ */
+
+#ifndef __GIANFAR_H
+#define __GIANFAR_H
+
+#include <net.h>
+#include <config.h>
+#include <mach/gianfar.h>
+
+#define MAC_ADDR_LEN 6
+
+#define TOUT_LOOP	1000000
+
+#define PHY_AUTONEGOTIATE_TIMEOUT	5000 /* in ms */
+
+/* TBI register addresses */
+#define GFAR_TBI_CR		0x00
+#define GFAR_TBI_SR		0x01
+#define GFAR_TBI_ANA		0x04
+#define GFAR_TBI_ANLPBPA	0x05
+#define GFAR_TBI_ANEX		0x06
+#define GFAR_TBI_TBICON		0x11
+
+/* TBI MDIO register bit fields*/
+#define GFAR_TBICON_CLK_SELECT		0x0020
+#define GFAR_TBIANA_ASYMMETRIC_PAUSE	0x0100
+#define GFAR_TBIANA_SYMMETRIC_PAUSE	0x0080
+#define GFAR_TBIANA_HALF_DUPLEX		0x0040
+#define GFAR_TBIANA_FULL_DUPLEX		0x0020
+/* The two reserved bits below are used in AN3869 to enable SGMII. */
+#define GFAR_TBIANA_RESERVED1		0x4000
+#define GFAR_TBIANA_RESERVED15		0x0001
+#define GFAR_TBICR_PHY_RESET		0x8000
+#define GFAR_TBICR_ANEG_ENABLE		0x1000
+#define GFAR_TBICR_RESTART_ANEG		0x0200
+#define GFAR_TBICR_FULL_DUPLEX		0x0100
+#define GFAR_TBICR_SPEED1_SET		0x0040
+
+/* MAC register bits */
+#define GFAR_MACCFG1_SOFT_RESET		0x80000000
+#define GFAR_MACCFG1_RESET_RX_MC	0x00080000
+#define GFAR_MACCFG1_RESET_TX_MC	0x00040000
+#define GFAR_MACCFG1_RESET_RX_FUN	0x00020000
+#define TESC_MACCFG1_RESET_TX_FUN	0x00010000
+#define GFAR_MACCFG1_LOOPBACK		0x00000100
+#define GFAR_MACCFG1_RX_FLOW		0x00000020
+#define GFAR_MACCFG1_TX_FLOW		0x00000010
+#define GFAR_MACCFG1_SYNCD_RX_EN	0x00000008
+#define GFAR_MACCFG1_RX_EN		0x00000004
+#define GFAR_MACCFG1_SYNCD_TX_EN	0x00000002
+#define GFAR_MACCFG1_TX_EN		0x00000001
+
+#define MACCFG2_INIT_SETTINGS		0x00007205
+#define GFAR_MACCFG2_FULL_DUPLEX	0x00000001
+#define GFAR_MACCFG2_IF			0x00000300
+#define GFAR_MACCFG2_GMII		0x00000200
+#define GFAR_MACCFG2_MII		0x00000100
+
+#define ECNTRL_INIT_SETTINGS		0x00001000
+#define GFAR_ECNTRL_TBI_MODE		0x00000020
+#define GFAR_ECNTRL_R100		0x00000008
+#define GFAR_ECNTRL_SGMII_MODE		0x00000002
+
+#ifndef GFAR_TBIPA_VALUE
+	#define GFAR_TBIPA_VALUE	0x1f
+#endif
+#define GFAR_MIIMCFG_INIT_VALUE		0x00000003
+#define GFAR_MIIMCFG_RESET		0x80000000
+
+#define GFAR_MIIMIND_BUSY		0x00000001
+#define GFAR_MIIMIND_NOTVALID		0x00000004
+
+#define GFAR_MIIM_CONTROL		0x00000000
+#define GFAR_MIIM_CONTROL_RESET		0x00009140
+#define GFAR_MIIM_CONTROL_INIT		0x00001140
+#define GFAR_MIIM_CONTROL_RESTART	0x00001340
+#define GFAR_MIIM_ANEN			0x00001000
+
+#define GFAR_MIIM_CR			0x00000000
+#define GFAR_MIIM_CR_RST		0x00008000
+#define GFAR_MIIM_CR_INIT		0x00001000
+
+#define GFAR_MIIM_STATUS		0x1
+#define GFAR_MIIM_STATUS_AN_DONE	0x00000020
+#define GFAR_MIIM_STATUS_LINK		0x0004
+
+#define GFAR_MIIM_PHYIR1		0x2
+#define GFAR_MIIM_PHYIR2		0x3
+
+#define GFAR_MIIM_ANAR			0x4
+#define GFAR_MIIM_ANAR_INIT		0x1e1
+
+#define GFAR_MIIM_TBI_ANLPBPA		0x5
+#define GFAR_MIIM_TBI_ANLPBPA_HALF	0x00000040
+#define GFAR_MIIM_TBI_ANLPBPA_FULL	0x00000020
+
+#define GFAR_MIIM_TBI_ANEX		0x6
+#define GFAR_MIIM_TBI_ANEX_NP		0x00000004
+#define GFAR_MIIM_TBI_ANEX_PRX		0x00000002
+
+#define GFAR_MIIM_GBIT_CONTROL		0x9
+#define GFAR_MIIM_GBIT_CONTROL_INIT	0xe00
+
+#define GFAR_MIIM_EXT_PAGE_ACCESS	0x1f
+
+#define GFAR_MIIM_GBIT_CON		0x09
+#define GFAR_MIIM_GBIT_CON_ADVERT	0x0e00
+
+#define GFAR_MIIM_READ_COMMAND		0x00000001
+
+#define MRBLR_INIT_SETTINGS	1536
+
+#define MINFLR_INIT_SETTINGS	0x00000040
+
+#define DMACTRL_INIT_SETTINGS	0x000000c3
+#define GFAR_DMACTRL_GRS	0x00000010
+#define GFAR_DMACTRL_GTS	0x00000008
+
+#define GFAR_TSTAT_CLEAR_THALT	0x80000000
+#define GFAR_RSTAT_CLEAR_RHALT	0x00800000
+
+#define GFAR_IEVENT_INIT_CLEAR	0xffffffff
+#define GFAR_IEVENT_BABR	0x80000000
+#define GFAR_IEVENT_RXC		0x40000000
+#define GFAR_IEVENT_BSY		0x20000000
+#define GFAR_IEVENT_EBERR	0x10000000
+#define GFAR_IEVENT_MSRO	0x04000000
+#define GFAR_IEVENT_GTSC	0x02000000
+#define GFAR_IEVENT_BABT	0x01000000
+#define GFAR_IEVENT_TXC		0x00800000
+#define GFAR_IEVENT_TXE		0x00400000
+#define GFAR_IEVENT_TXB		0x00200000
+#define GFAR_IEVENT_TXF		0x00100000
+#define GFAR_IEVENT_IE		0x00080000
+#define GFAR_IEVENT_LC		0x00040000
+#define GFAR_IEVENT_CRL		0x00020000
+#define GFAR_IEVENT_XFUN	0x00010000
+#define GFAR_IEVENT_RXB0	0x00008000
+#define GFAR_IEVENT_GRSC	0x00000100
+#define GFAR_IEVENT_RXF0	0x00000080
+
+#define GFAR_IMASK_INIT_CLEAR	0x00000000
+
+/* Default Attribute fields */
+#define ATTR_INIT_SETTINGS     0x000000c0
+#define ATTRELI_INIT_SETTINGS  0x00000000
+
+/* TxBD status field bits */
+#define TXBD_READY		0x8000
+#define TXBD_PADCRC		0x4000
+#define TXBD_WRAP		0x2000
+#define TXBD_INTERRUPT		0x1000
+#define TXBD_LAST		0x0800
+#define TXBD_CRC		0x0400
+#define TXBD_DEF		0x0200
+#define TXBD_HUGEFRAME		0x0080
+#define TXBD_LATECOLLISION	0x0080
+#define TXBD_RETRYLIMIT		0x0040
+#define	TXBD_RETRYCOUNTMASK	0x003c
+#define TXBD_UNDERRUN		0x0002
+#define TXBD_STATS		0x03ff
+
+/* RxBD status field bits */
+#define RXBD_EMPTY		0x8000
+#define RXBD_RO1		0x4000
+#define RXBD_WRAP		0x2000
+#define RXBD_INTERRUPT		0x1000
+#define RXBD_LAST		0x0800
+#define RXBD_FIRST		0x0400
+#define RXBD_MISS		0x0100
+#define RXBD_BROADCAST		0x0080
+#define RXBD_MULTICAST		0x0040
+#define RXBD_LARGE		0x0020
+#define RXBD_NONOCTET		0x0010
+#define RXBD_SHORT		0x0008
+#define RXBD_CRCERR		0x0004
+#define RXBD_OVERRUN		0x0002
+#define RXBD_TRUNCATED		0x0001
+#define RXBD_STATS		0x003f
+
+struct txbd8 {
+	ushort	     status;	     /* Status Fields */
+	ushort	     length;	     /* Buffer length */
+	uint	     bufPtr;	     /* Buffer Pointer */
+};
+
+struct rxbd8 {
+	ushort	     status;	     /* Status Fields */
+	ushort	     length;	     /* Buffer Length */
+	uint	     bufPtr;	     /* Buffer Pointer */
+};
+
+/* eTSEC general control and status registers */
+#define GFAR_IEVENT_OFFSET	0x010	/* Interrupt Event */
+#define GFAR_IMASK_OFFSET	0x014	/* Interrupt Mask */
+#define GFAR_ECNTRL_OFFSET	0x020	/* Ethernet Control */
+#define GFAR_MINFLR_OFFSET	0x024	/* Minimum Frame Length */
+#define GFAR_DMACTRL_OFFSET	0x02c	/* DMA Control */
+#define GFAR_TBIPA_OFFSET	0x030	/* TBI PHY address */
+
+/* eTSEC transmit control and status register */
+#define GFAR_TSTAT_OFFSET	0x104	/* transmit status register */
+#define GFAR_TBASE0_OFFSET	0x204	/* TxBD Base Address */
+
+/* eTSEC receive control and status register */
+#define GFAR_RCTRL_OFFSET	0x300	/* Receive Control */
+#define GFAR_RSTAT_OFFSET	0x304	/* transmit status register */
+#define GFAR_MRBLR_OFFSET	0x340	/* Maximum Receive Buffer Length */
+#define GFAR_RBASE0_OFFSET	0x404	/* RxBD Base Address */
+
+/* eTSEC MAC registers */
+#define GFAR_MACCFG1_OFFSET	0x500	/* MAC Configuration #1 */
+#define GFAR_MACCFG2_OFFSET	0x504	/* MAC Configuration #2 */
+#define GFAR_MIIMCFG_OFFSET	0x520	/* MII management configuration */
+#define GFAR_MIIMCOM_OFFSET	0x524	/* MII management command */
+#define GFAR_MIIMADD_OFFSET	0x528	/* MII management address */
+#define GFAR_MIIMCON_OFFSET	0x52c	/* MII management control */
+#define GFAR_MIIMSTAT_OFFSET	0x530	/* MII management status */
+#define GFAR_MIIMMIND_OFFSET	0x534	/* MII management indicator */
+#define GFAR_MACSTRADDR1_OFFSET 0x540	/* MAC station address #1 */
+#define GFAR_MACSTRADDR2_OFFSET 0x544	/* MAC station address #2 */
+
+/* eTSEC transmit and receive counters registers. */
+#define GFAR_TR64_OFFSET	0x680
+/* eTSEC counter control and TOE statistics registers */
+#define GFAR_CAM1_OFFSET	0x738
+#define GFAR_CAM2_OFFSET	0x73c
+
+/* Individual/group address registers */
+#define GFAR_IADDR0_OFFSET	0x800
+#define GFAR_IADDR1_OFFSET	0x804
+#define GFAR_IADDR2_OFFSET	0x808
+#define GFAR_IADDR3_OFFSET	0x80c
+#define GFAR_IADDR4_OFFSET	0x810
+#define GFAR_IADDR5_OFFSET	0x814
+#define GFAR_IADDR6_OFFSET	0x818
+#define GFAR_IADDR7_OFFSET	0x81c
+
+#define GFAR_IADDR(REGNUM) (GFAR_IADDR##REGNUM##_OFFSET)
+
+/* Group address registers */
+#define GFAR_GADDR0_OFFSET	0x880
+#define GFAR_GADDR1_OFFSET	0x884
+#define GFAR_GADDR2_OFFSET	0x888
+#define GFAR_GADDR3_OFFSET	0x88c
+#define GFAR_GADDR4_OFFSET	0x890
+#define GFAR_GADDR5_OFFSET	0x894
+#define GFAR_GADDR6_OFFSET	0x898
+#define GFAR_GADDR7_OFFSET	0x89c
+
+#define GFAR_GADDR(REGNUM) (GFAR_GADDR##REGNUM##_OFFSET)
+
+/* eTSEC DMA attributes registers */
+#define GFAR_ATTR_OFFSET	0xbf8	/* Default Attribute Register */
+#define GFAR_ATTRELI_OFFSET	0xbfc	/* Default Attribute Extract Len/Idx */
+
+struct gfar_private {
+	void __iomem *regs;
+	void __iomem *phyregs;
+	void __iomem *phyregs_sgmii;
+	struct phy_info *phyinfo;
+	struct mii_device miidev;
+	volatile struct txbd8 *txbd;
+	volatile struct rxbd8 *rxbd;
+	uint txIdx;
+	uint rxIdx;
+	uint phyaddr;
+	uint tbicr;
+	uint tbiana;
+	u32 flags;
+	uint link;
+	uint duplexity;
+	uint speed;
+};
+#endif /* __GIANFAR_H */
-- 
1.7.1



From stutzsven at web.de  Wed Jul 25 16:39:34 2012
From: stutzsven at web.de (Stutz Sven)
Date: Wed, 25 Jul 2012 22:39:34 +0200
Subject: AT91SAM9263-ek - Kernel panic
In-Reply-To: <20120723054850.GL22657@game.jcrosoft.org>
References: <500C4933.8050202@web.de> <500C6C5E.2020604@web.de>
 <20120723054850.GL22657@game.jcrosoft.org>
Message-ID: <50105986.5040300@web.de>

Hello,

I am sorry for my late message.

But
Am 23.07.2012 07:48, schrieb Jean-Christophe PLAGNIOL-VILLARD:

> On 23:10 Sun 22 Jul     , Stutz Sven wrote:
>>     Hello to everybody,
>>
>>     previously I have had some doubts to run a Linux kernel on this evalboard.
>>     Especially to find a BSP for my board ....
>>
>>     In the meantime I have had some problems which I was able to solve by
>>     myself or reading through different forums.
> the mainline kernel work perfectly on it

I guess it should so and with ptxdist it is also more or less easy to adjust the correct settings.
(I hope so :-) )

>>     But in total I am able to load and start Barebox and then again loading
>>     and starting the kernel.
>>
>>     First I have seen nothing until I switch on the special function
>>     earlyprintk=serial,ttyS0,115200n8
>>     After that I saw that I have mounting/partitioning problem, so I changed
>>     the board specific init.c
>>     in that way that the first three partitions match exactly to the
>>     definition in the configuration file for the init script of Barebox.
>>
>>         init.c > devfs_add_partition("nand0", 0x00000, SZ_128K,
>>     DEVFS_PARTITION_FIXED,"at91bootstrap_raw");
>>                     dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap");
>>                     devfs_add_partition("nand0", SZ_128K, SZ_256K,
>>     DEVFS_PARTITION_FIXED, "self_raw");
>>                     dev_add_bb_dev("self_raw", "self0");
>>                     devfs_add_partition("nand0", SZ_256K + SZ_128K, SZ_128K,
>>     DEVFS_PARTITION_FIXED, "env_raw");
>>                     dev_add_bb_dev("env_raw", "env0");
>>
>>         env/config >
>>     nand_parts="128k(at91bootstrap),256k(barebox),128k(bareboxenv),4M(kernel),80M(rootfs),-(data)"
>>                     rootfs_mtdblock_nand=4
>>                     rootfs_mtdblock_type=jffs2
>>
>>     After that I was really happy that the kernel is prompting "VFS: Mounted
>>     root (jffs2 filesystem)"
>>     But the next kernel panic is near
>>     It cannot find a init script.
>>     I tried init=/bin/init, init=/sbin/init init=linuxrc everything with out
>>     success each time the same failure occur. I also tried to execute a simple
>>     command like init=/bin/ls ...
>>
>>     But I see in sysroot-target a softlink linuxrc -> /bin/busybox and also
>>     in the root-folder root/sbin/ init-> ../bin/busybox
>>     Waht is the difference of those directories? (I thought the root folder is
>>     the result for the target, so everything in there will be contained in the
>>     root.jffs2)
>>
>>     I have also changed in busybox between soft and hard links ...
>>     How can I solve this problem?
>>     Has anyone a hint for me, pls?
> it seems you use the wrong ABI to complie your rootfs

But when I mount the rootfs.jffs2 on my Pc I see all directories (bin/, sbin/, etc/ , ....) and all the commands are build in and linked to busybox.

file test/bin/busybox

test/bin/busybox: setuid ELF 32-bit LSB shared object, ARM, version 1 (SYSV), dynamically linked (uses shared libs), for GNU/Linux 2.6.23, stripped

>
> Best Regards,
> J.

Unfortunately I have done some bad changes that the rootfs is no longer been mounted on startup :-(

see ..

> barebox 2012.07.0 #53 Mon Jul 23 11:14:05 CEST 2012 Board: Atmel 
> at91sam9263-ek Just for test 21 Clocks: CPU 199 MHz, master 99 MHz, 
> main 16.367 MHz atmel_nand: Use On Flash BBT NAND device: Manufacturer 
> ID: 0x2c, Chip ID: 0xda (Micron NaND 256MiB 3,3V 8-bit) NAND_ECC_NONE 
> selected by board driver. This is not recommended !! 
I now I try to fix this later ...
> Bad block table found at page 131008, version 0x01 Bad block table 
> found at page 130944, version 0x01 cfi_flash at cfi_flash0: found cfi 
> flash at 10000000, size 4194304 Malloc space: 0x23b00000 -> 0x23efffff 
> (size 4 MB) Stack space : 0x23af8000 -> 0x23b00000 (size 32 kB) Hit 
> any key to stop autoboot: 0 booting kernel from /dev/nand0.kernel.bb 
> Image Name: Linux-3.4.0 Created: 2012-07-25 15:30:15 UTC OS: Linux 
> Architecture: ARM Type: Kernel Image Compression: uncompressed Data 
> Size: 1683440 Bytes = 1.6 MB Load Address: 20008000 Entry Point: 
> 20008000 ***************************************** *** LOADING IMAGE 
> TO SDRAM! *** ***************************************** commandline: 
> console=ttyS0,115200n8 mem=64M earlyprintk=serial,ttyS0,115200n8, 
> init=/bin/ls root=/dev/mtdblock4 rootfstype=jffs2 noinitrd 
> mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox),128k(bareboxenv),4M(kernel)ro,20M(root)ro,-(data) 
> arch_number: 1202 Uncompressing Linux... done, booting the kernel. [ 
> 0.000000] Booting Linux on physical CPU 0 [ 0.000000] Linux version 
> 3.4.0 (user at ubuntu) (gcc version 4.6.2 (OSELAS.Toolchain-2011.11.1) ) 
> #14 Wed Jul 25 17:29:36 CEST 2012 [ 0.000000] bootconsole [earlycon0] 
> enabled [ 0.000000] AT91: Detected soc type: at91sam9263 [ 0.000000] 
> AT91: Detected soc subtype: Unknown [ 0.000000] AT91: sram at 0x300000 
> of 0x14000 mapped at 0xfef64000 [ 0.000000] AT91: sram at 0x500000 of 
> 0x4000 mapped at 0xfef60000 [ 0.000000] gpiochip_add: registered GPIOs 
> 0 to 31 on device: pioA [ 0.000000] gpiochip_add: registered GPIOs 32 
> to 63 on device: pioB [ 0.000000] gpiochip_add: registered GPIOs 64 to 
> 95 on device: pioC [ 0.000000] gpiochip_add: registered GPIOs 96 to 
> 127 on device: pioD [ 0.000000] gpiochip_add: registered GPIOs 128 to 
> 159 on device: pioE [ 0.000000] Kernel command line: 
> console=ttyS0,115200n8 mem=64M earlyprintk=serial,ttyS0,115200n8, 
> init=/bin/ls root=/dev/mtdblock4 rootfstype=jffs2 noinitrd 
> mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox),128k(bareboxenv),4M(kernel)ro,20M(root)ro,-(data) 
> [ 0.000000] PID hash table entries: 256 (order: -2, 1024 bytes) [ 
> 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 
> bytes) [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 
> 16384 bytes) [ 0.000000] Memory: 64MB = 64MB total [ 0.000000] Memory: 
> 60964k/60964k available, 4572k reserved, 0K highmem [ 0.000000] 
> Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 
> 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 
> kB) [ 0.000000] vmalloc : 0xc4800000 - 0xff000000 ( 936 MB) [ 
> 0.000000] lowmem : 0xc0000000 - 0xc4000000 ( 64 MB) [ 0.000000] 
> modules : 0xbf000000 - 0xc0000000 ( 16 MB) [ 0.000000] .text : 
> 0xc0008000 - 0xc032da1c (3223 kB) [ 0.000000] .init : 0xc032e000 - 
> 0xc0354000 ( 152 kB) [ 0.000000] .data : 0xc0354000 - 0xc0381b40 ( 183 
> kB) [ 0.000000] .bss : 0xc0381b64 - 0xc03ceafc ( 308 kB) [ 0.000000] 
> NR_IRQS:192 [ 0.000000] AT91: 160 gpio irqs in 5 banks [ 0.000000] 
> sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 
> 4294967286ms [ 0.010000] Calibrating delay loop... 99.22 BogoMIPS 
> (lpj=496128) [ 0.100000] pid_max: default: 32768 minimum: 301 [ 
> 0.110000] Mount-cache hash table entries: 512 [ 0.130000] CPU: Testing 
> write buffer coherency: ok [ 0.140000] ftrace: allocating 9496 entries 
> in 28 pages [ 0.250000] Setting up static identity map for 0x20231900 
> - 0x2023193c [ 0.270000] devtmpfs: initialized [ 0.410000] NET: 
> Registered protocol family 16 [ 0.420000] AT91: Power Management [ 
> 0.430000] AT91: Starting after software reset [ 0.960000] DMA-API: 
> preallocated 4096 debug entries [ 0.970000] DMA-API: debugging enabled 
> by kernel config [ 0.980000] Switching to clocksource tcb_clksrc [ 
> 1.250000] NET: Registered protocol family 2 [ 1.250000] IP route cache 
> hash table entries: 1024 (order: 0, 4096 bytes) [ 1.270000] TCP 
> established hash table entries: 2048 (order: 2, 16384 bytes) [ 
> 1.280000] TCP bind hash table entries: 2048 (order: 1, 8192 bytes) [ 
> 1.290000] TCP: Hash tables configured (established 2048 bind 2048) [ 
> 1.290000] TCP: reno registered [ 1.300000] UDP hash table entries: 256 
> (order: 0, 4096 bytes) [ 1.310000] UDP-Lite hash table entries: 256 
> (order: 0, 4096 bytes) [ 1.320000] NET: Registered protocol family 1 [ 
> 1.350000] VFS: Disk quotas dquot_6.5.2 [ 1.360000] jffs2: version 2.2. 
> (NAND) ? 2001-2006 Red Hat, Inc. [ 1.380000] fuse init (API version 
> 7.18) [ 1.390000] msgmni has been set to 119 [ 1.420000] crc32: 
> CRC_LE_BITS = 64, CRC_BE BITS = 64 [ 1.430000] crc32: self tests 
> passed, processed 225944 bytes in 10137617 nsec [ 1.450000] crc32c: 
> CRC_LE_BITS = 64 [ 1.450000] crc32c: self tests passed, processed 
> 225944 bytes in 4237472 nsec [ 1.480000] atmel_usart.0: ttyS0 at MMIO 
> 0xffffee00 (irq = 1) is a ATMEL_SERIAL [ 1.490000] console [ttyS0] 
> enabled, bootconsole disabled [ 1.490000] console [ttyS0] enabled, 
> bootconsole disabled [ 1.500000] atmel_usart.1: ttyS1 at MMIO 
> 0xfff8c000 (irq = 7) is a ATMEL_SERIAL [ 1.540000] atmel_nand: Use On 
> Flash BBT [ 1.550000] atmel_nand atmel_nand: No DMA support for NAND 
> access. 
Is this a problem that I have no DMA support?
> [ 1.550000] NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron 
> NAND 256MiB 3,3V 8-bit) [ 1.560000] Bad block table found at page 
> 131008, version 0x01 [ 1.570000] Bad block table found at page 130944, 
> version 0x01 [ 1.580000] 6 cmdlinepart partitions found on MTD device 
> atmel_nand [ 1.580000] Creating 6 MTD partitions on "atmel_nand": [ 
> 1.590000] 0x000000000000-0x000000020000 : "at91bootstrap" [ 1.600000] 
> 0x000000020000-0x000000060000 : "barebox" [ 1.610000] 
> 0x000000060000-0x000000080000 : "bareboxenv" [ 1.620000] 
> 0x000000080000-0x000000480000 : "kernel" [ 1.630000] 
> 0x000000480000-0x000001880000 : "root" [ 1.630000] 
> 0x000001880000-0x000010000000 : "data" [ 1.650000] GPIO NAND driver, ? 
> 2004 Simtec Electronics [ 1.650000] atmel_spi atmel_spi.0: Atmel SPI 
> Controller at 0xfffa4000 (irq 14) [ 1.660000] atmel_spi atmel_spi.0: 
> master is unqueued, this is deprecated [ 1.680000] TCP: cubic registered 
here I miss mount rootfs
> [ 1.680000] NET: Registered protocol family 17 [ 1.700000] devtmpfs: 
> mounted [ 1.700000] Freeing init memory: 152K [ 1.710000] Failed to 
> execute /bin/ls. Attempting defaults... [ 1.720000] Kernel panic - not 
> syncing: No init found. Try passing init= option to kernel. See Linux 
> Documentation/init.txt for guidance. [ 1.730000] [<c000e254>] 
> (unwind_backtrace+0x0/0x128) from [<c02292e0>] (dump_stack+0x20/0x24) 
> [ 1.740000] [<c02292e0>] (dump_stack+0x20/0x24) from [<c02293e8>] 
> (panic+0x80/0x1c8) [ 1.750000] [<c02293e8>] (panic+0x80/0x1c8) from 
> [<c02290a8>] (init_post+0xb0/0xd4) [ 1.750000] [<c02290a8>] 
> (init_post+0xb0/0xd4) from [<c032e998>] (kernel_init+0xcc/0xf0) 



I will report my results ....


best regards
Sven



From antonynpavlov at gmail.com  Wed Jul 25 18:00:27 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Thu, 26 Jul 2012 02:00:27 +0400
Subject: [PATCH] MIPS: add initial exceptions handling
Message-ID: <1343253627-5247-1-git-send-email-antonynpavlov@gmail.com>

Checking exception handling:

    $ make qemu-malta_defconfig
    $ make

    ...

    $ qemu-system-mips -nodefaults -M malta -m 256 \
       -nographic -serial stdio -bios ./barebox.bin

    ...

    barebox:/ md -l 0x03

    Ooops, address error on load or ifetch!
    EPC = 0xa082783c
    CP0_STATUS = 0x00000006
    CP0_CAUSE = 0x00000410
    CP0_CONFIG = 0x80008482

    ### ERROR ### Please RESET the board ###

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/boot/main_entry.c       |   47 ++++++++++++++++
 arch/mips/include/asm/addrspace.h |  109 +++++++++++++++++++++++++++++++++++++
 arch/mips/lib/Makefile            |    2 +
 arch/mips/lib/genex.S             |   31 +++++++++++
 arch/mips/lib/traps.c             |  107 ++++++++++++++++++++++++++++++++++++
 5 files changed, 296 insertions(+)
 create mode 100644 arch/mips/include/asm/addrspace.h
 create mode 100644 arch/mips/lib/genex.S
 create mode 100644 arch/mips/lib/traps.c

diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
index 8f5f6fc..a38ad31 100644
--- a/arch/mips/boot/main_entry.c
+++ b/arch/mips/boot/main_entry.c
@@ -25,11 +25,56 @@
 #include <string.h>
 #include <asm/sections.h>
 #include <asm/cpu-features.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
 
 extern void start_barebox(void);
+extern void handle_reserved(void);
 
 void main_entry(void);
 
+unsigned long exception_handlers[32];
+
+static void set_except_vector(int n, void *addr)
+{
+	unsigned handler = (unsigned long) addr;
+
+	exception_handlers[n] = handler;
+}
+
+static void trap_init(void)
+{
+	extern char except_vec3_generic;
+	int i;
+
+	unsigned long ebase;
+
+	ebase = CKSEG1;
+
+	/*
+	 * Copy the generic exception handlers to their final destination.
+	 * This will be overriden later as suitable for a particular
+	 * configuration.
+	 */
+	memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
+
+	/*
+	 * Setup default vectors
+	 */
+	for (i = 0; i <= 31; i++) {
+		set_except_vector(i, &handle_reserved);
+	}
+
+	if (!cpu_has_4kex)
+		memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
+
+	/* FIXME: handle tlb */
+	memcpy((void *)(ebase), &except_vec3_generic, 0x80);
+
+	/* unset BOOT EXCEPTION VECTOR bit */
+	write_c0_status(read_c0_status() & ~ST0_BEV);
+}
+
 /**
  * Called plainly from assembler code
  *
@@ -48,5 +93,7 @@ void main_entry(void)
 		r4k_cache_init();
 	}
 
+	trap_init();
+
 	start_barebox();
 }
diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
new file mode 100644
index 0000000..17d480d
--- /dev/null
+++ b/arch/mips/include/asm/addrspace.h
@@ -0,0 +1,109 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 99 Ralf Baechle
+ * Copyright (C) 2000, 2002  Maciej W. Rozycki
+ * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
+ */
+#ifndef _ASM_ADDRSPACE_H
+#define _ASM_ADDRSPACE_H
+
+/*
+ *  Configure language
+ */
+#ifdef __ASSEMBLY__
+#define _ATYPE_
+#define _ATYPE32_
+#define _ATYPE64_
+#define _CONST64_(x)	x
+#else
+#define _ATYPE_		__PTRDIFF_TYPE__
+#define _ATYPE32_	int
+#define _ATYPE64_	__s64
+#ifdef CONFIG_64BIT
+#define _CONST64_(x)	x ## L
+#else
+#define _CONST64_(x)	x ## LL
+#endif
+#endif
+
+/*
+ *  32-bit MIPS address spaces
+ */
+#ifdef __ASSEMBLY__
+#define _ACAST32_
+#define _ACAST64_
+#else
+#define _ACAST32_		(_ATYPE_)(_ATYPE32_)	/* widen if necessary */
+#define _ACAST64_		(_ATYPE64_)		/* do _not_ narrow */
+#endif
+
+/*
+ * Returns the kernel segment base of a given address
+ */
+#define KSEGX(a)		((_ACAST32_(a)) & 0xe0000000)
+
+/*
+ * Returns the physical address of a CKSEGx / XKPHYS address
+ */
+#define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
+#define XPHYSADDR(a)            ((_ACAST64_(a)) &			\
+				 _CONST64_(0x000000ffffffffff))
+
+#ifdef CONFIG_64BIT
+
+/*
+ * Memory segments (64bit kernel mode addresses)
+ * The compatibility segments use the full 64-bit sign extended value.  Note
+ * the R8000 doesn't have them so don't reference these in generic MIPS code.
+ */
+#define XKUSEG			_CONST64_(0x0000000000000000)
+#define XKSSEG			_CONST64_(0x4000000000000000)
+#define XKPHYS			_CONST64_(0x8000000000000000)
+#define XKSEG			_CONST64_(0xc000000000000000)
+#define CKSEG0			_CONST64_(0xffffffff80000000)
+#define CKSEG1			_CONST64_(0xffffffffa0000000)
+#define CKSSEG			_CONST64_(0xffffffffc0000000)
+#define CKSEG3			_CONST64_(0xffffffffe0000000)
+
+#define CKSEG0ADDR(a)		(CPHYSADDR(a) | CKSEG0)
+#define CKSEG1ADDR(a)		(CPHYSADDR(a) | CKSEG1)
+#define CKSEG2ADDR(a)		(CPHYSADDR(a) | CKSEG2)
+#define CKSEG3ADDR(a)		(CPHYSADDR(a) | CKSEG3)
+
+#else
+
+#define CKSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
+#define CKSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
+#define CKSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2)
+#define CKSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3)
+
+/*
+ * Map an address to a certain kernel segment
+ */
+#define KSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
+#define KSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
+#define KSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2)
+#define KSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3)
+
+/*
+ * Memory segments (32bit kernel mode addresses)
+ * These are the traditional names used in the 32-bit universe.
+ */
+#define KUSEG			0x00000000
+#define KSEG0			0x80000000
+#define KSEG1			0xa0000000
+#define KSEG2			0xc0000000
+#define KSEG3			0xe0000000
+
+#define CKUSEG			0x00000000
+#define CKSEG0			0x80000000
+#define CKSEG1			0xa0000000
+#define CKSEG2			0xc0000000
+#define CKSEG3			0xe0000000
+
+#endif
+
+#endif /* _ASM_ADDRSPACE_H */
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index b99bb71..a31046b 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -5,6 +5,8 @@ obj-y += ashldi3.o
 obj-y += ashrdi3.o
 obj-y += memory.o
 obj-y += cpu-probe.o
+obj-y += traps.o
+obj-y += genex.o
 
 obj-$(CONFIG_CPU_MIPS32) += c-r4k.o
 obj-$(CONFIG_CPU_MIPS64) += c-r4k.o
diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
new file mode 100644
index 0000000..d6f65a2
--- /dev/null
+++ b/arch/mips/lib/genex.S
@@ -0,0 +1,31 @@
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+
+	.text
+	.set	macro
+	.set	noat
+	.set	noreorder
+	.align	5
+
+/* Exception vector */
+NESTED(handle_reserved, 0, sp)
+	la	k0, barebox_exc_handler
+	jal	k0
+	 move	a0, sp
+	/* will never return here */
+	END(handle_reserved)
+
+/* General exception vector */
+NESTED(except_vec3_generic, 0, sp)
+	.set	noat
+	mfc0	k1, CP0_CAUSE
+	la	k0, exception_handlers
+	andi	k1, k1, 0x7c
+	addu	k0, k0, k1
+	lw	k0, (k0)
+	nop
+	jr	k0
+	 nop
+	END(except_vec3_generic)
+	.set	at
diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
new file mode 100644
index 0000000..4e167cc
--- /dev/null
+++ b/arch/mips/lib/traps.c
@@ -0,0 +1,107 @@
+#include <common.h>
+
+#include <asm/mipsregs.h>
+
+void barebox_exc_handler(void *regs);
+
+/*
+ * Trap codes from OpenBSD trap.h
+ */
+#define T_INT			0	/* Interrupt pending */
+#define T_TLB_MOD		1	/* TLB modified fault */
+#define T_TLB_LD_MISS		2	/* TLB miss on load or ifetch */
+#define T_TLB_ST_MISS		3	/* TLB miss on a store */
+#define T_ADDR_ERR_LD		4	/* Address error on a load or ifetch */
+#define T_ADDR_ERR_ST		5	/* Address error on a store */
+#define T_BUS_ERR_IFETCH	6	/* Bus error on an ifetch */
+#define T_BUS_ERR_LD_ST		7	/* Bus error on a load or store */
+#define T_SYSCALL		8	/* System call */
+#define T_BREAK			9	/* Breakpoint */
+#define T_RES_INST		10	/* Reserved instruction exception */
+#define T_COP_UNUSABLE		11	/* Coprocessor unusable */
+#define T_OVFLOW		12	/* Arithmetic overflow */
+#define T_TRAP			13	/* Trap instruction */
+#define T_VCEI			14	/* Virtual coherency instruction */
+#define T_FPE			15	/* Floating point exception */
+#define T_IWATCH		16	/* Inst. Watch address reference */
+#define T_DWATCH		23	/* Data Watch address reference */
+#define T_VCED			31	/* Virtual coherency data */
+
+#define CR_EXC_CODE             0x0000007c
+#define CR_EXC_CODE_SHIFT       2
+
+static char *get_exc_name(u32 cause)
+{
+	switch ((cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT) {
+
+	case T_INT:
+		return "interrupt pending";
+
+	case T_TLB_MOD:
+		return "TLB modified";
+
+	case T_TLB_LD_MISS:
+		return "TLB miss on load or ifetch";
+
+	case T_TLB_ST_MISS:
+		return "TLB miss on store";
+
+	case T_ADDR_ERR_LD:
+		return "address error on load or ifetch";
+
+	case T_ADDR_ERR_ST:
+		return "address error on store";
+
+	case T_BUS_ERR_IFETCH:
+		return "bus error on ifetch";
+
+	case T_BUS_ERR_LD_ST:
+		return "bus error on load or store";
+
+	case T_SYSCALL:
+		return "system call";
+
+	case T_BREAK:
+		return "breakpoint";
+
+	case T_RES_INST:
+		return "reserved instruction";
+
+	case T_COP_UNUSABLE:
+		return "coprocessor unusable";
+
+	case T_OVFLOW:
+		return "arithmetic overflow";
+
+	case T_TRAP:
+		return "trap instruction";
+
+	case T_VCEI:
+		return "virtual coherency instruction";
+
+	case T_FPE:
+		return "floating point";
+
+	case T_IWATCH:
+		return "iwatch";
+
+	case T_DWATCH:
+		return "dwatch";
+
+	case T_VCED:
+		return "virtual coherency data";
+	}
+
+	return "unknown exception";
+}
+
+void barebox_exc_handler(void *regs)
+{
+	printf("\nOoops, %s!\n", get_exc_name(read_c0_cause()));
+	printf("EPC = 0x%08x\n", read_c0_epc());
+	printf("CP0_STATUS = 0x%08x\n", read_c0_status());
+	printf("CP0_CAUSE = 0x%08x\n", read_c0_cause());
+	printf("CP0_CONFIG = 0x%08x\n\n", read_c0_config());
+
+	hang();
+}
-- 
1.7.10



From marc at cpdesign.com.au  Thu Jul 26 04:25:24 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Thu, 26 Jul 2012 18:25:24 +1000
Subject: Way to clear nand bad block table
Message-ID: <002601cd6b08$37498d50$a5dca7f0$@cpdesign.com.au>

Hi,

Is there a way to clear the nand bad block table?

I'm not sure what happened, but I was playing around with barebox init and
didn't register the nand device - then when I booted the kernel there were a
stack of UBI errors. 
I assume this also did something to the bbt as subsequent barebox startups
give a heap of bad block messages. Note not all blocks are bad - tested with
nandtest and there's still some R/W going on.
All the code I looked at seemed to indicate that once a block is marked bad
you can't go back.

Any ideas much appreciated.

Cheers,
Marc



From jbe at pengutronix.de  Thu Jul 26 05:27:48 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 26 Jul 2012 11:27:48 +0200
Subject: Way to clear nand bad block table
In-Reply-To: <002601cd6b08$37498d50$a5dca7f0$@cpdesign.com.au>
References: <002601cd6b08$37498d50$a5dca7f0$@cpdesign.com.au>
Message-ID: <201207261127.48919.jbe@pengutronix.de>

HI Marc,

Marc Reilly wrote:
> Is there a way to clear the nand bad block table?
>
> I'm not sure what happened, but I was playing around with barebox init and
> didn't register the nand device - then when I booted the kernel there were
> a stack of UBI errors.
> I assume this also did something to the bbt as subsequent barebox startups
> give a heap of bad block messages. Note not all blocks are bad - tested
> with nandtest and there's still some R/W going on.
> All the code I looked at seemed to indicate that once a block is marked bad
> you can't go back.
>
> Any ideas much appreciated.

The flash blocks which contains the "bad block table" are protected by 
the "bad block table" aware MTD layer.

So, the ugly way: run a bootloader which does not use the in-flash bad block 
table. Then the tables are regular blocks in the flash and can be erased. 
After that run again the bad block table aware bootloader and it will 
re-create the in-flash table. But be careful: In this case the generic 
functions scans all blocks in the NAND to collect the bad block markers in 
each NAND block's OOB. If this information is already destroyed somehow, this 
solution does not help.

Regards,
Juergen

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Thu Jul 26 05:53:40 2012
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Thu, 26 Jul 2012 11:53:40 +0200
Subject: [PATCH RFC] arm/imx: provide command to add ram device with
 autodetected size
Message-ID: <1343296420-25857-1-git-send-email-u.kleine-koenig@pengutronix.de>

The amount of available ram is determined by the ESDCTL register, so
better don't hardcode the value.

This commit provides a command that can be used instead of
arm_add_mem_device and convertes pcm043 (on which this patch was tested)
to it.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
Hello,

maybe better move the new function into a new file
arch/arm/mach-imx/esdctl.c and the prototype into <mach/esdctl.h>?

Also imx_add_ram1() is still missing. I will implement that when we
agree the patch's idea is useful.

Best regards
Uwe

 arch/arm/boards/pcm043/pcm043.c          |    2 +-
 arch/arm/mach-imx/devices.c              |   34 ++++++++++++++++++++++++++++++
 arch/arm/mach-imx/include/mach/devices.h |    1 +
 arch/arm/mach-imx/include/mach/esdctl.h  |    1 +
 4 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
index 152b47c..b1bf8ef 100644
--- a/arch/arm/boards/pcm043/pcm043.c
+++ b/arch/arm/boards/pcm043/pcm043.c
@@ -103,7 +103,7 @@ static struct imx_ipu_fb_platform_data ipu_fb_data = {
 
 static int pcm043_mem_init(void)
 {
-	arm_add_mem_device("ram0", IMX_SDRAM_CS0, SZ_128M);
+	imx_add_ram0();
 
 	return 0;
 }
diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c
index 6cd50f3..ca98a80 100644
--- a/arch/arm/mach-imx/devices.c
+++ b/arch/arm/mach-imx/devices.c
@@ -1,6 +1,10 @@
 #include <common.h>
 #include <driver.h>
 #include <mach/devices.h>
+#include <mach/esdctl.h>
+#include <mach/imx-regs.h>
+#include <asm/io.h>
+#include <asm/memory.h>
 
 static inline struct device_d *imx_add_device(char *name, int id, void *base, int size, void *pdata)
 {
@@ -52,3 +56,33 @@ struct device_d *imx_add_esdhc(void *base, int id, struct esdhc_platform_data *p
 {
 	return imx_add_device("imx-esdhc", id, base, 0x1000, pdata);
 }
+
+static void imx_add_ram(const char* name, resource_size_t base,
+		void __iomem *esdctladdr)
+{
+	u32 esdctl = readl(esdctladdr);
+	/*
+	 * with the fields ROW, COL and DSIZ all zero we have 11 rows, 8 cols
+	 * and 2 bytes bus width on 4 banks.
+	 */
+	resource_size_t size = 4 << (11 + 8 + 1);
+
+	if (!(esdctl & ESDCTL0_SDE))
+		/* SDRAM controller disabled, so no RAM here */
+		return;
+
+	/* calculate memory size: 4 banks * 2^#rows * 2^#cols * bytes/word */
+	size <<= (esdctl & ESDCTL0_ROW_MASK) >> 24;
+	size <<= (esdctl & ESDCTL0_COL_MASK) >> 20;
+
+	if ((esdctl & ESDCTL0_DSIZ_MASK) == ESDCTL0_DSIZ_31_0)
+		/* 4 bytes bus width */
+		size <<= 1;
+
+	arm_add_mem_device(name, base, size);
+}
+
+void imx_add_ram0(void)
+{
+	imx_add_ram("ram0", (resource_size_t)IMX_SDRAM_CS0, (void __iomem *)ESDCTL0);
+}
diff --git a/arch/arm/mach-imx/include/mach/devices.h b/arch/arm/mach-imx/include/mach/devices.h
index f0f730a..317ad17 100644
--- a/arch/arm/mach-imx/include/mach/devices.h
+++ b/arch/arm/mach-imx/include/mach/devices.h
@@ -17,3 +17,4 @@ struct device_d *imx_add_ipufb(void *base, struct imx_ipu_fb_platform_data *pdat
 struct device_d *imx_add_mmc(void *base, int id, void *pdata);
 struct device_d *imx_add_esdhc(void *base, int id, struct esdhc_platform_data *pdata);
 
+void imx_add_ram0(void);
diff --git a/arch/arm/mach-imx/include/mach/esdctl.h b/arch/arm/mach-imx/include/mach/esdctl.h
index 10c8b9b..91d4141 100644
--- a/arch/arm/mach-imx/include/mach/esdctl.h
+++ b/arch/arm/mach-imx/include/mach/esdctl.h
@@ -26,6 +26,7 @@
 #define ESDCTL0_DSIZ_31_16			(0 << 16)
 #define ESDCTL0_DSIZ_15_0			(1 << 16)
 #define ESDCTL0_DSIZ_31_0			(2 << 16)
+#define ESDCTL0_DSIZ_MASK			(3 << 16)
 #define ESDCTL0_REF1				(1 << 13)
 #define ESDCTL0_REF2				(2 << 13)
 #define ESDCTL0_REF4				(3 << 13)
-- 
1.7.10.4



From jbe at pengutronix.de  Thu Jul 26 06:17:17 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 26 Jul 2012 12:17:17 +0200
Subject: [PATCH RFC] arm/imx: provide command to add ram device with
 autodetected size
In-Reply-To: <1343296420-25857-1-git-send-email-u.kleine-koenig@pengutronix.de>
References: <1343296420-25857-1-git-send-email-u.kleine-koenig@pengutronix.de>
Message-ID: <201207261217.17308.jbe@pengutronix.de>

Uwe Kleine-K?nig wrote:
> The amount of available ram is determined by the ESDCTL register, so
> better don't hardcode the value.
>
> This commit provides a command that can be used instead of
> arm_add_mem_device and convertes pcm043 (on which this patch was tested)
> to it.
>
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
> Hello,
>
> maybe better move the new function into a new file
> arch/arm/mach-imx/esdctl.c and the prototype into <mach/esdctl.h>?
>
> Also imx_add_ram1() is still missing. I will implement that when we
> agree the patch's idea is useful.

It is a really good idea. I is useful for all my Samsung targets, too.
Maybe it should be a generic feature, because *most* of the supported SoCs are 
able to detect the available RAM size in such a way.

jbe


-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Thu Jul 26 06:42:10 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 26 Jul 2012 12:42:10 +0200
Subject: [PATCH] i2c: fix printf format specifier
In-Reply-To: <1343207114-6238-1-git-send-email-u.kleine-koenig@pengutronix.de>
References: <1343207114-6238-1-git-send-email-u.kleine-koenig@pengutronix.de>
Message-ID: <20120726104210.GP30009@pengutronix.de>

On Wed, Jul 25, 2012 at 11:05:14AM +0200, Uwe Kleine-K?nig wrote:
> Use %u instead of %d for an u32 variable
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>

Applied, thanks

  Sascha

> ---
>  drivers/i2c/i2c.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
> index 9e52b86..b3c3c93 100644
> --- a/drivers/i2c/i2c.c
> +++ b/drivers/i2c/i2c.c
> @@ -181,7 +181,7 @@ int i2c_read_reg(struct i2c_client *client, u32 addr, u8 *buf, u16 count)
>  	msg->len = i;
>  
>  	status = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
> -	dev_dbg(&client->dev, "%s: %zu@%d --> %d\n", __func__,
> +	dev_dbg(&client->dev, "%s: %zu@%u --> %d\n", __func__,
>  		count, addr, status);
>  
>  	if (status == ARRAY_SIZE(msg))
> @@ -214,7 +214,7 @@ int i2c_write_reg(struct i2c_client *client, u32 addr, const u8 *buf, u16 count)
>  	memcpy(msg->buf + i, buf, count);
>  
>  	status = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
> -	dev_dbg(&client->dev, "%s: %u@%d --> %d\n", __func__,
> +	dev_dbg(&client->dev, "%s: %u@%u --> %d\n", __func__,
>  		count, addr, status);
>  
>  	if (status == ARRAY_SIZE(msg))
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Jul 26 06:43:43 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 26 Jul 2012 12:43:43 +0200
Subject: [PATCHv2] defaultenv-2: Add bootargs for booting from disk
In-Reply-To: <1343227325-28925-1-git-send-email-t.gamez@phytec.de>
References: <1343227325-28925-1-git-send-email-t.gamez@phytec.de>
Message-ID: <20120726104343.GQ30009@pengutronix.de>

On Wed, Jul 25, 2012 at 04:42:05PM +0200, Teresa G?mez wrote:
> Add support in defaultenv-2 for booting from disk (SD-Card, USB-Stick).
> 
> Signed-off-by: Teresa G?mez <t.gamez at phytec.de>

Applied, thanks

  Sascha

> ---
> Fixed since v1:
> 	- spell fix
> 	- added return value on failure
> 
>  defaultenv-2/base/bin/bootargs-root-disk |   26 ++++++++++++++++++++++++++
>  1 files changed, 26 insertions(+), 0 deletions(-)
>  create mode 100644 defaultenv-2/base/bin/bootargs-root-disk
> 
> diff --git a/defaultenv-2/base/bin/bootargs-root-disk b/defaultenv-2/base/bin/bootargs-root-disk
> new file mode 100644
> index 0000000..df8750e
> --- /dev/null
> +++ b/defaultenv-2/base/bin/bootargs-root-disk
> @@ -0,0 +1,26 @@
> +#!/bin/sh
> +
> +usage="$0 [OPTIONS]\n -p <partition>\n -t <fstype>"
> +
> +while getopt "p:t:h" opt; do
> +	if [ ${opt} = p ]; then
> +		part=${OPTARG}
> +	elif [ ${opt} = t ]; then
> +		fstype=${OPTARG}
> +	elif [ ${opt} = h ]; then
> +		echo -e "$usage"
> +		exit 0
> +	fi
> +done
> +
> +if [ -z "${part}" ]; then
> +	echo "$0: no partition given"
> +	exit 1
> +fi
> +
> +if [ -z "${fstype}" ]; then
> +	echo "$0: no filesystem type given"
> +	exit 1
> +fi
> +
> +global.linux.bootargs.root="root=/dev/$part rootfstype=$fstype rootwait"
> -- 
> 1.7.0.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Thu Jul 26 08:13:17 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 26 Jul 2012 14:13:17 +0200
Subject: Barebox crashes when the first console should stop
Message-ID: <201207261413.17674.jbe@pengutronix.de>

Environemnt: a system with a generic serial console and OTG capability.
The generic serial console comes up when the system starts. After that I
add the USB console with:

usbmode device
usbserial -a
cs1.active=ioe

After these commands both consoles are working as expected. But then I
want to disable the generic serial console:

barebox at Bosch SCM:/ cs0.active=
unable to handle NULL pointer dereference at address 0x00000000
pc : [<4301e0dc>]    lr : [<43004d40>]
sp : 40fff960  ip : 0000000a  fp : 00000000
r10: 00000000  r9 : 00000000  r8 : 410ebda8
r7 : 00000000  r6 : 41002ad8  r5 : 00000000  r4 : 410029b4
r3 : 43004d1c  r2 : 00000003  r1 : 00000069  r0 : 00000000
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
[<4301e0dc>] (_strchr+0x18/0x34) from [<43004d40>] (console_std_set+0x24/0xe4)
[<43004d40>] (console_std_set+0x24/0xe4) from [<4301f314>] (dev_set_param+0x74/0x8c)
[<4301f314>] (dev_set_param+0x74/0x8c) from [<430057dc>] (setenv+0x60/0xd4)
[<430057dc>] (setenv+0x60/0xd4) from [<4300100c>] (set_local_var.isra.2+0x58/0x78)
[<4300100c>] (set_local_var.isra.2+0x58/0x78) from [<430016d4>] (run_list_real+0x504/0x9dc)
[<430016d4>] (run_list_real+0x504/0x9dc) from [<43001cf4>] (parse_stream_outer+0x148/0x238)
[<43001cf4>] (parse_stream_outer+0x148/0x238) from [<4300207c>] (run_shell+0x3c/0x7c)
[<4300207c>] (run_shell+0x3c/0x7c) from [<43004c38>] (execute_command+0x38/0x7c)
[<43004c38>] (execute_command+0x38/0x7c) from [<43001aac>] (run_list_real+0x8dc/0x9dc)
[<43001aac>] (run_list_real+0x8dc/0x9dc) from [<43001608>] (run_list_real+0x438/0x9dc)

[<4302e184>] (unwind_backtrace+0x0/0x9c) from [<4301eee0>] (panic+0x28/0x3c)
[<4301eee0>] (panic+0x28/0x3c) from [<4302e65c>] (do_exception+0x10/0x14)
[<4302e65c>] (do_exception+0x10/0x14) from [<4302e6e8>] (do_data_abort+0x2c/0x38)
[<4302e6e8>] (do_data_abort+0x2c/0x38) from [<4302e3b0>] (data_abort+0x50/0x60)

Known/intended behaviour?

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From marc at cpdesign.com.au  Thu Jul 26 21:24:48 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Fri, 27 Jul 2012 11:24:48 +1000
Subject: Way to clear nand bad block table
In-Reply-To: <201207261127.48919.jbe@pengutronix.de>
References: <002601cd6b08$37498d50$a5dca7f0$@cpdesign.com.au>
 <201207261127.48919.jbe@pengutronix.de>
Message-ID: <1440381.IzydBDPxna@dev1>

Hi Juergen,

Thanks for your ideas.

I managed to clear the BBT, it was a bit of a hack... the saga is below for 
anyone who runs into similar problem.

On Thursday, July 26, 2012 11:27:48 AM Juergen Beisert wrote:
> The flash blocks which contains the "bad block table" are protected by
> the "bad block table" aware MTD layer.
> 
> So, the ugly way: run a bootloader which does not use the in-flash bad block
> table. Then the tables are regular blocks in the flash and can be erased.
> After that run again the bad block table aware bootloader and it will
> re-create the in-flash table. But be careful: In this case the generic
> functions scans all blocks in the NAND to collect the bad block markers in
> each NAND block's OOB. If this information is already destroyed somehow,
> this solution does not help.

Recompiling barebox with bbt support disabled stopped the all the bad block 
messages, however erasing the nand didn't clear the BBT for subsequent 
reboots...
The issue was that the erase commands and functions skip erasing bad blocks, 
and the blocks that held the actual BBT were being considered bad, so they 
weren't getting erased. After commenting out calls to nand_block_checkbad() in 
nand_write.c and block_isbad() in mtd_erase()/core.c I was able to manually 
erase the blocks. (erasing actual bad blocks results in I/O error)
Next restart of barebox the BBT was regenerated with the two actual bad 
blocks.

After all that, I noticed imx_low_erase() in nand_imx.c. Probably would have 
been easier to make up a command around that.

Cheer,s
Marc


From s.hauer at pengutronix.de  Fri Jul 27 03:43:49 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 09:43:49 +0200
Subject: [PATCH 2/3] net: GIANFAR driver
In-Reply-To: <1343232061-1789-3-git-send-email-renaud.barbier@ge.com>
References: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
 <1343232061-1789-3-git-send-email-renaud.barbier@ge.com>
Message-ID: <20120727074349.GS30009@pengutronix.de>

Hi Renaud,

comments inline.


> + * those we don't care about (unless zero is bad, in which case,
> + * choose a more appropriate value)
> + */
> +static void init_registers(void __iomem *regs)

Not really important, but could you add a gfar_ prefix consistently to
all functions?

> +{
> +	out_be32(regs + GFAR_IEVENT_OFFSET, GFAR_IEVENT_INIT_CLEAR);
> +
> +	out_be32(regs + GFAR_IMASK_OFFSET, GFAR_IMASK_INIT_CLEAR);
> +
> +	out_be32(regs + GFAR_IADDR(0), 0);
> +	out_be32(regs + GFAR_IADDR(1), 0);
> +	out_be32(regs + GFAR_IADDR(2), 0);
> +	out_be32(regs + GFAR_IADDR(3), 0);
> +	out_be32(regs + GFAR_IADDR(4), 0);
> +	out_be32(regs + GFAR_IADDR(5), 0);
> +	out_be32(regs + GFAR_IADDR(6), 0);
> +	out_be32(regs + GFAR_IADDR(7), 0);
> +
> +	out_be32(regs + GFAR_GADDR(0), 0);
> +	out_be32(regs + GFAR_GADDR(1), 0);
> +	out_be32(regs + GFAR_GADDR(2), 0);
> +	out_be32(regs + GFAR_GADDR(3), 0);
> +	out_be32(regs + GFAR_GADDR(4), 0);
> +	out_be32(regs + GFAR_GADDR(5), 0);
> +	out_be32(regs + GFAR_GADDR(6), 0);
> +	out_be32(regs + GFAR_GADDR(7), 0);
> +
> +	out_be32(regs + GFAR_RCTRL_OFFSET, 0x00000000);
> +
> +	memset((void *)(regs + GFAR_TR64_OFFSET), 0,
> +			GFAR_CAM2_OFFSET - GFAR_TR64_OFFSET);
> +
> +	out_be32(regs + GFAR_CAM1_OFFSET, 0xffffffff);
> +	out_be32(regs + GFAR_CAM2_OFFSET, 0xffffffff);
> +
> +	out_be32(regs + GFAR_MRBLR_OFFSET, MRBLR_INIT_SETTINGS);
> +
> +	out_be32(regs + GFAR_MINFLR_OFFSET, MINFLR_INIT_SETTINGS);
> +
> +	out_be32(regs + GFAR_ATTR_OFFSET, ATTR_INIT_SETTINGS);
> +	out_be32(regs + GFAR_ATTRELI_OFFSET, ATTRELI_INIT_SETTINGS);
> +}
> +
> +/*
> + * Configure maccfg2 based on negotiated speed and duplex
> + * reported by PHY handling code
> + */
> +static void adjust_link(struct eth_device *dev)
> +{
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;
> +	void __iomem *regs = priv->regs;
> +	u32 ecntrl, maccfg2;
> +	uint32_t status;
> +
> +	status = miidev_get_status(&priv->miidev);
> +
> +	priv->link = status & MIIDEV_STATUS_IS_UP;
> +	if (status & MIIDEV_STATUS_IS_FULL_DUPLEX)
> +		priv->duplexity = 1;
> +	else
> +		priv->duplexity = 0;
> +
> +	if (status & MIIDEV_STATUS_IS_1000MBIT)
> +		priv->speed = 1000;
> +	else if (status & MIIDEV_STATUS_IS_100MBIT)
> +		priv->speed = 100;
> +	else
> +		priv->speed = 10;
> +
> +	if (priv->link) {
> +		/* clear all bits relative with interface mode */
> +		ecntrl = in_be32(regs + GFAR_ECNTRL_OFFSET);
> +		ecntrl &= ~GFAR_ECNTRL_R100;
> +
> +		maccfg2 = in_be32(regs + GFAR_MACCFG2_OFFSET);
> +		maccfg2 &= ~(GFAR_MACCFG2_IF | GFAR_MACCFG2_FULL_DUPLEX);
> +
> +		if (priv->duplexity != 0)
> +			maccfg2 |= GFAR_MACCFG2_FULL_DUPLEX;
> +		else
> +			maccfg2 &= ~(GFAR_MACCFG2_FULL_DUPLEX);
> +
> +		switch (priv->speed) {
> +		case 1000:
> +			maccfg2 |= GFAR_MACCFG2_GMII;
> +			break;
> +		case 100:
> +		case 10:
> +			maccfg2 |= GFAR_MACCFG2_MII;
> +			/*
> +			 * Set R100 bit in all modes although
> +			 * it is only used in RGMII mode
> +			 */
> +			if (priv->speed == 100)
> +				ecntrl |= GFAR_ECNTRL_R100;
> +			break;
> +		default:
> +			printf("%s: Speed was bad\n", dev->dev.name);
> +			break;
> +		}
> +
> +		out_be32(regs + GFAR_ECNTRL_OFFSET, ecntrl);
> +		out_be32(regs + GFAR_MACCFG2_OFFSET, maccfg2);
> +
> +		printf("Speed: %d, %s duplex\n", priv->speed,
> +		       (priv->duplexity) ? "full" : "half");
> +
> +	} else {
> +		printf("%s: No link.\n", dev->dev.name);
> +	}
> +}
> +
> +/* Stop the interface */
> +static void gfar_halt(struct eth_device *dev)
> +{
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;
> +	void __iomem *regs = priv->regs;
> +	int value;
> +
> +	clrbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
> +			GFAR_DMACTRL_GTS);
> +	setbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
> +			GFAR_DMACTRL_GTS);
> +
> +	value = in_be32(regs + GFAR_IEVENT_OFFSET);
> +	value &= (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC);
> +
> +	while (value != (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC)) {
> +		value = in_be32(regs + GFAR_IEVENT_OFFSET);
> +		value &= (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC);
> +	}
> +
> +	clrbits_be32(regs + GFAR_MACCFG1_OFFSET,
> +			GFAR_MACCFG1_TX_EN | GFAR_MACCFG1_RX_EN);
> +}
> +
> +/* Initializes registers for the controller. */
> +static int gfar_init(struct eth_device *dev)
> +{
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;
> +	void __iomem *regs = priv->regs;
> +
> +	gfar_halt(dev);
> +
> +	/* Init MACCFG2. Default to GMII */
> +	out_be32(regs + GFAR_MACCFG2_OFFSET, MACCFG2_INIT_SETTINGS);
> +	out_be32(regs + GFAR_ECNTRL_OFFSET, ECNTRL_INIT_SETTINGS);
> +
> +	priv->rxIdx = 0;
> +	priv->txIdx = 0;

No camel case variable names please.

> +
> +	init_registers(regs);
> +
> +	miidev_restart_aneg(&priv->miidev);
> +
> +	return  0;
> +}
> +
> +static int gfar_open(struct eth_device *dev)
> +{
> +	int ix;
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;

unnecessary cast.

> +	void __iomem *regs = priv->regs;
> +
> +	/* Point to the buffer descriptors */
> +	out_be32(regs + GFAR_TBASE0_OFFSET, (unsigned int)priv->txbd);
> +	out_be32(regs + GFAR_RBASE0_OFFSET, (unsigned int)priv->rxbd);
> +
> +	/* Initialize the Rx Buffer descriptors */
> +	for (ix = 0; ix < RX_BUF_CNT; ix++) {
> +		priv->rxbd[ix].status = RXBD_EMPTY;
> +		priv->rxbd[ix].length = 0;
> +		priv->rxbd[ix].bufPtr = (uint) NetRxPackets[ix];
> +	}
> +	priv->rxbd[RX_BUF_CNT - 1].status |= RXBD_WRAP;
> +
> +	/* Initialize the TX Buffer Descriptors */
> +	for (ix = 0; ix < TX_BUF_CNT; ix++) {
> +		priv->txbd[ix].status = 0;
> +		priv->txbd[ix].length = 0;
> +		priv->txbd[ix].bufPtr = 0;
> +	}
> +	priv->txbd[TX_BUF_CNT - 1].status |= TXBD_WRAP;
> +
> +	miidev_wait_aneg(&priv->miidev);
> +	adjust_link(dev);
> +
> +	/* Enable Transmit and Receive */
> +	setbits_be32(regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_RX_EN |
> +			GFAR_MACCFG1_TX_EN);
> +
> +	/* Tell the DMA it is clear to go */
> +	setbits_be32(regs + GFAR_DMACTRL_OFFSET, DMACTRL_INIT_SETTINGS);
> +	out_be32(regs + GFAR_TSTAT_OFFSET, GFAR_TSTAT_CLEAR_THALT);
> +	out_be32(regs + GFAR_RSTAT_OFFSET, GFAR_RSTAT_CLEAR_RHALT);
> +	clrbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
> +			GFAR_DMACTRL_GTS);
> +
> +	return 0;
> +}
> +
> +static int gfar_get_ethaddr(struct eth_device *dev, unsigned char *mac)
> +{
> +	struct device_d *edev = dev->parent;
> +	struct gfar_info_struct *gfar_info =
> +		(struct gfar_info_struct *)edev->platform_data;
> +	int (*get_mac)(struct gfar_info_struct *, unsigned char *) =
> +		gfar_info->get_mac;
> +
> +	if (get_mac)
> +		get_mac(gfar_info, mac);
> +	else
> +		return -ENODEV;
> +
> +	return 0;
> +}
> +
> +static int gfar_set_ethaddr(struct eth_device *dev, unsigned char *mac)
> +{
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;
> +	void __iomem *regs = priv->regs;
> +	char tmpbuf[MAC_ADDR_LEN];
> +	uint tempval;
> +	int ix;
> +
> +	for (ix = 0; ix < MAC_ADDR_LEN; ix++)
> +		tmpbuf[MAC_ADDR_LEN - 1 - ix] = mac[ix];
> +
> +	tempval = (tmpbuf[0] << 24) | (tmpbuf[1] << 16) | (tmpbuf[2] << 8) |
> +		  tmpbuf[3];
> +
> +	out_be32(regs + GFAR_MACSTRADDR1_OFFSET, tempval);
> +
> +	tempval = *((uint *)(tmpbuf + 4));
> +
> +	out_be32(regs + GFAR_MACSTRADDR2_OFFSET, tempval);
> +
> +	return 0;
> +}
> +
> +/* Writes the given phy's reg with value, using the specified MDIO regs */
> +static int gfar_local_mdio_write(void __iomem *phyregs, uint addr, uint reg,
> +				uint value)
> +{
> +	uint64_t start;
> +
> +	out_be32(phyregs + GFAR_MIIMADD_OFFSET, (addr << 8) | (reg & 0x1f));
> +	out_be32(phyregs + GFAR_MIIMCON_OFFSET, value);
> +
> +	start = get_time_ns();
> +
> +	while (!is_timeout(start, 10 * MSECOND)) {
> +		if (!(in_be32(phyregs + GFAR_MIIMMIND_OFFSET) &
> +					GFAR_MIIMIND_BUSY))
> +			return 0;
> +	}
> +
> +	return -EIO;
> +}
> +
> +/*
> + * Reads register regnum on the device's PHY through the
> + * specified registers. It lowers and raises the read
> + * command, and waits for the data to become valid (miimind
> + * notvalid bit cleared), and the bus to cease activity (miimind
> + * busy bit cleared), and then returns the value
> + */
> +static uint gfar_local_mdio_read(void __iomem *phyregs, uint phyid, uint regnum)
> +{
> +	uint64_t start;
> +
> +	/* Put the address of the phy, and the register number into MIIMADD */
> +	out_be32(phyregs + GFAR_MIIMADD_OFFSET, (phyid << 8) | (regnum & 0x1f));
> +
> +	/* Clear the command register, and wait */
> +	out_be32(phyregs + GFAR_MIIMCOM_OFFSET, 0);
> +
> +	/* Initiate a read command, and wait */
> +	out_be32(phyregs + GFAR_MIIMCOM_OFFSET, GFAR_MIIM_READ_COMMAND);
> +
> +	start = get_time_ns();
> +
> +	while (!is_timeout(start, 10 * MSECOND)) {
> +		if (!(in_be32(phyregs + GFAR_MIIMMIND_OFFSET) &
> +			(GFAR_MIIMIND_NOTVALID | GFAR_MIIMIND_BUSY)))
> +			return in_be32(phyregs + GFAR_MIIMSTAT_OFFSET);
> +	}
> +	return -EIO;
> +}
> +
> +static void gfar_configure_serdes(struct gfar_private *priv)
> +{
> +	gfar_local_mdio_write(priv->phyregs_sgmii,
> +			in_be32(priv->regs + GFAR_TBIPA_OFFSET), GFAR_TBI_ANA,
> +			priv->tbiana);
> +	gfar_local_mdio_write(priv->phyregs_sgmii,
> +			in_be32(priv->regs + GFAR_TBIPA_OFFSET),
> +			GFAR_TBI_TBICON, GFAR_TBICON_CLK_SELECT);
> +	gfar_local_mdio_write(priv->phyregs_sgmii,
> +			in_be32(priv->regs + GFAR_TBIPA_OFFSET), GFAR_TBI_CR,
> +			priv->tbicr);
> +}
> +
> +/* Reset the internal and external PHYs. */
> +static void init_phy(struct eth_device *dev)
> +{
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;
> +	void __iomem *regs = priv->regs;
> +	uint64_t start;
> +
> +	/* Assign a Physical address to the TBI */
> +	out_be32(regs + GFAR_TBIPA_OFFSET, GFAR_TBIPA_VALUE);
> +
> +	/* Reset MII (due to new addresses) */
> +	out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_RESET);
> +	out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_INIT_VALUE);
> +
> +	start = get_time_ns();
> +	while (!is_timeout(start, 10 * MSECOND)) {
> +		if (!(in_be32(priv->phyregs + GFAR_MIIMMIND_OFFSET) &
> +			GFAR_MIIMIND_BUSY))
> +			break;
> +	}
> +
> +	gfar_local_mdio_write(priv->phyregs, priv->phyaddr, GFAR_MIIM_CR,
> +			GFAR_MIIM_CR_RST);
> +
> +	start = get_time_ns();
> +	while (!is_timeout(start, 10 * MSECOND)) {
> +		if (!(gfar_local_mdio_read(priv->phyregs, priv->phyaddr,
> +					GFAR_MIIM_CR) & GFAR_MIIM_CR_RST))
> +			break;
> +	}
> +
> +	if (in_be32(regs + GFAR_ECNTRL_OFFSET) & GFAR_ECNTRL_SGMII_MODE)
> +		gfar_configure_serdes(priv);
> +}
> +
> +static int gfar_send(struct eth_device *dev, void *packet, int length)
> +{
> +	int ix;
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;
> +	void __iomem *regs = priv->regs;
> +
> +	/* Find an empty buffer descriptor */
> +	for (ix = 0; priv->txbd[priv->txIdx].status & TXBD_READY; ix++) {
> +		if (ix >= TOUT_LOOP) {
> +			debug("gfar: tx buffers full\n");
> +			return -EBUSY;
> +		}
> +	}

This seems unnecessary. After initialization the tx buffer is ready. The
second time you get here the tx buffer is also ready, because you waited
for it to become ready below.

> +
> +	priv->txbd[priv->txIdx].bufPtr = (uint) packet;
> +	priv->txbd[priv->txIdx].length = length;
> +	priv->txbd[priv->txIdx].status |= (TXBD_READY | TXBD_LAST | TXBD_CRC);
> +
> +	/* Tell the DMA to go */
> +	out_be32(regs + GFAR_TSTAT_OFFSET, GFAR_TSTAT_CLEAR_THALT);
> +
> +	/* Wait for buffer to be transmitted */
> +	for (ix = 0; priv->txbd[priv->txIdx].status & TXBD_READY; ix++) {
> +		if (ix >= TOUT_LOOP) {
> +			debug("gfar: tx error: 0x%x\n",
> +				priv->txbd[priv->txIdx].status);
> +			return -EBUSY;
> +		}

Add a proper timeout loop here.

> +	}
> +
> +	if (priv->txbd[priv->txIdx].status & TXBD_STATS) {
> +		printf("TX error: 0x%x\n", priv->txbd[priv->txIdx].status);
> +		return -EIO;
> +	}
> +
> +	priv->txIdx = (priv->txIdx + 1) % TX_BUF_CNT;

Remove this and use a single tx buffer only. The driver doesn't make use
of more buffers anyway, since it polls for a buffer to be ready before
queuing another one.

> +
> +	return 0;
> +}
> +
> +static int gfar_recv(struct eth_device *dev)
> +{
> +	int length;
> +	struct gfar_private *priv = (struct gfar_private *)dev->priv;
> +	void __iomem *regs = priv->regs;
> +
> +	while (!(priv->rxbd[priv->rxIdx].status & RXBD_EMPTY)) {
> +		length = priv->rxbd[priv->rxIdx].length;
> +
> +		/* Send the packet up if there were no errors */
> +		if (!(priv->rxbd[priv->rxIdx].status & RXBD_STATS)) {
> +			net_receive(NetRxPackets[priv->rxIdx], length - 4);
> +		} else {
> +			printf("Got error %x\n",
> +			       (priv->rxbd[priv->rxIdx].status & RXBD_STATS));

Please use dev_dbg/dev_info and friends inside drivers.

> +		}
> +
> +		priv->rxbd[priv->rxIdx].length = 0;
> +
> +		/* Set the wrap bit if this is the last element in the list */
> +		if ((priv->rxIdx + 1) == RX_BUF_CNT)
> +			priv->rxbd[priv->rxIdx].status = RXBD_WRAP;
> +		else
> +			priv->rxbd[priv->rxIdx].status = 0;
> +
> +		priv->rxbd[priv->rxIdx].status |= RXBD_EMPTY;
> +		priv->rxIdx = (priv->rxIdx + 1) % RX_BUF_CNT;
> +	}

Don't loop here until you receive packets. The caller will do this for
you (which also handles the ctrl-c case).

> +
> +	if (in_be32(regs + GFAR_IEVENT_OFFSET) & GFAR_IEVENT_BSY) {
> +		out_be32(regs + GFAR_IEVENT_OFFSET, GFAR_IEVENT_BSY);
> +		out_be32(regs + GFAR_RSTAT_OFFSET, GFAR_RSTAT_CLEAR_RHALT);
> +	}
> +
> +	return 0;
> +}
> +
> +/* Read a MII PHY register. */
> +static int gfar_miiphy_read(struct mii_device *mdev, int addr, int reg)
> +{
> +	unsigned short ret;
> +	struct eth_device *edev = mdev->edev;
> +	struct gfar_private *priv = (struct gfar_private *)edev->priv;
> +
> +	if (NULL == priv) {
> +		printf("Can't read PHY at address %d\n", addr);
> +		return -1;
> +	}

This should never happen. You can drop this test.

> +
> +	return gfar_local_mdio_read(priv->phyregs, addr, reg);
> +}
> +
> +/* Write a MII PHY register.  */
> +static int gfar_miiphy_write(struct mii_device *mdev, int addr,
> +			     int reg, int value)
> +{
> +	struct eth_device *edev = mdev->edev;
> +	struct gfar_private *priv = (struct gfar_private *)edev->priv;
> +	unsigned short val = value;
> +
> +	if (NULL == priv) {
> +		printf("Can't write PHY at address %d\n", addr);
> +		return -1;
> +	}
> +
> +	gfar_local_mdio_write(priv->phyregs, addr, reg, val);
> +
> +	return 0;
> +}
> +
> +/*
> + * Initialize device structure. Returns success if
> + * initialization succeeded.
> + */
> +static int gfar_probe(struct device_d *dev)
> +{
> +	struct gfar_info_struct *gfar_info =
> +		(struct gfar_info_struct *)dev->platform_data;
> +	struct eth_device *edev;
> +	struct gfar_private *priv;
> +	size_t size;
> +	char *p;
> +
> +	edev = (struct eth_device *)xzalloc(sizeof(struct eth_device) +
> +					    sizeof(struct gfar_private));
> +
> +	if (NULL == edev)
> +		return -ENODEV;
> +
> +	priv = (struct gfar_private *)(edev + 1);

You should embed a struct eth_device in struct gfar_private instead,
it's cleaner.

> +
> +	priv->regs = dev_request_mem_region(dev, 0);
> +	priv->phyregs = dev_request_mem_region(dev, 1);
> +	priv->phyregs_sgmii = dev_request_mem_region(dev, 2);
> +
> +	priv->phyaddr = gfar_info->phyaddr;
> +	priv->flags = gfar_info->flags;
> +	priv->tbicr = gfar_info->tbicr;
> +	priv->tbiana = gfar_info->tbiana;
> +
> +	/* Allocate descriptors. 64-byte aligned. */
> +	size = (TX_BUF_CNT * (sizeof(struct txbd8) +
> +		(RX_BUF_CNT * sizeof(struct rxbd8)))) + BUF_ALIGN;
> +	p = (char *)xzalloc(size);
> +	p += BUF_ALIGN;
> +	p = (char *)((ulong)p & (~(BUF_ALIGN - 1)));

Use memalign instead.

> +
> +	priv->txbd = (struct txbd8 *)p;
> +	priv->rxbd = (struct rxbd8 *)(p +
> +			(TX_BUF_CNT * sizeof(struct txbd8)));
> +
> +	edev->priv = priv;
> +	edev->init = gfar_init;
> +	edev->open = gfar_open;
> +	edev->halt = gfar_halt;
> +	edev->send = gfar_send;
> +	edev->recv = gfar_recv;
> +	edev->get_ethaddr = gfar_get_ethaddr;
> +	edev->set_ethaddr = gfar_set_ethaddr;
> +	edev->parent = dev;
> +
> +	setbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET);
> +	udelay(2);
> +	clrbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET);
> +
> +	priv->miidev.read = gfar_miiphy_read;
> +	priv->miidev.write = gfar_miiphy_write;
> +	priv->miidev.address = priv->phyaddr;
> +	priv->miidev.flags = 0;
> +	priv->miidev.edev = edev;
> +	priv->miidev.parent = dev;
> +
> +	init_phy(edev);
> +
> +	mii_register(&priv->miidev);
> +
> +	return eth_register(edev);
> +}
> +
> +static struct driver_d gfar_eth_driver = {
> +	.name  = "gfar",
> +	.probe = gfar_probe,
> +};
> +
> +static int gfar_eth_init(void)
> +{
> +	register_driver(&gfar_eth_driver);
> +	return 0;
> +}
> +
> +device_initcall(gfar_eth_init);
> diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
> new file mode 100644
> index 0000000..9edbd12
> --- /dev/null
> +++ b/drivers/net/gianfar.h
> @@ -0,0 +1,288 @@
> +/*
> + *  gianfar.h
> + *
> + *  Driver for the Motorola Triple Speed Ethernet Controller
> + *
> + *  This software may be used and distributed according to the
> + *  terms of the GNU Public License, Version 2, incorporated
> + *  herein by reference.
> + *
> + * Copyright 2012 GE Intelligent Platforms, Inc.
> + * Copyright 2004, 2007, 2009  Freescale Semiconductor, Inc.
> + * (C) Copyright 2003, Motorola, Inc.
> + * based on tsec.h by Xianghua Xiao and Andy Fleming 2003-2009
> + */
> +
> +#ifndef __GIANFAR_H
> +#define __GIANFAR_H
> +
> +#include <net.h>
> +#include <config.h>
> +#include <mach/gianfar.h>
> +
> +#define MAC_ADDR_LEN 6
> +
> +#define TOUT_LOOP	1000000
> +
> +#define PHY_AUTONEGOTIATE_TIMEOUT	5000 /* in ms */

Unused define

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 27 03:45:53 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 09:45:53 +0200
Subject: [PATCH 3/3] ppc: P2020RDB Ethernet configuration
In-Reply-To: <1343232061-1789-4-git-send-email-renaud.barbier@ge.com>
References: <1343232061-1789-1-git-send-email-renaud.barbier@ge.com>
 <1343232061-1789-4-git-send-email-renaud.barbier@ge.com>
Message-ID: <20120727074553.GT30009@pengutronix.de>

On Wed, Jul 25, 2012 at 05:01:01PM +0100, Renaud Barbier wrote:
> Minimal support of the Ethernet interface on the P2020RDB board. Only
> the eTSEC3 interface is supported.
> 
> Signed-off-by: Renaud Barbier <renaud.barbier at ge.com>
> ---
>  arch/ppc/boards/freescale-p2020rdb/p2020rdb.c |   38 +++++++++++++++++++++++++
>  arch/ppc/configs/p2020rdb_defconfig           |    6 ++++
>  2 files changed, 44 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
> index 20897cb..201220f 100644
> --- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
> +++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
> @@ -35,6 +35,7 @@
>  #include <mach/mmu.h>
>  #include <mach/immap_85xx.h>
>  #include <mach/clocks.h>
> +#include <mach/gianfar.h>
>  #include <mach/early_udelay.h>
>  
>  #define VSC7385_RST_SET		0x00080000
> @@ -61,10 +62,47 @@
>  #define SYSCLK_50	50000000
>  #define SYSCLK_100	100000000
>  
> +/* Ethernet. Use eTSEC3 */
> +static struct gfar_info_struct gfar_info[] = {
> +	{
> +	.phyaddr = 1,
> +	.tbiana = 0,
> +	.tbicr = 0,
> +	.flags = 0,
> +	},

Please use tabs for indention.

> +};
> +
> +static int board_eth_init(int num, int idx)
> +{
> +	struct resource *res;
> +
> +	res = xzalloc(3 * sizeof(struct resource));
> +	/* TSEC interface registers */
> +	res[0].start = GFAR_BASE_ADDR + ((num - 1) * 0x1000);
> +	res[0].end = res[0].start + 0x1000;
> +	res[0].flags = IORESOURCE_MEM;
> +	/* External PHY access always through eTSEC1 */
> +	res[1].start = MDIO_BASE_ADDR;
> +	res[1].end = res[1].start + 0x1000;
> +	res[1].flags = IORESOURCE_MEM;
> +	/* Access to TBI/RTBI interface. */
> +	res[2].start = MDIO_BASE_ADDR + ((num - 1) * 0x1000);
> +	res[2].end = res[2].start + 0x1000;
> +	res[2].flags = IORESOURCE_MEM;
> +
> +	add_generic_device_res("gfar", DEVICE_ID_DYNAMIC, res, 3,
> +				&gfar_info[idx]);
> +
> +	return 0;
> +}

It's probably worth to make this a SoC specific function somewhere. It
could be used by other boards aswell, right?

Sascha

> +
>  static int devices_init(void)
>  {
>  	add_cfi_flash_device(-1, CFG_FLASH_BASE, 16 << 20, 0);
>  
> +	/* eTSEC3 */
> +	board_eth_init(3, 0);
> +
>  	devfs_add_partition("nor0", 0xf80000, 0x80000, DEVFS_PARTITION_FIXED,
>  			    "self0");
>  	return 0;
> diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig
> index f8a0687..d025a40 100644
> --- a/arch/ppc/configs/p2020rdb_defconfig
> +++ b/arch/ppc/configs/p2020rdb_defconfig
> @@ -21,3 +21,9 @@ CONFIG_MALLOC_SIZE=0x200000
>  CONFIG_BAUDRATE=115200
>  CONFIG_DRIVER_SERIAL_NS16550=y
>  CONFIG_RELOCATABLE=y
> +CONFIG_DRIVER_NET_GIANFAR=y
> +CONFIG_NET=y
> +CONFIG_NET_PING=y
> +CONFIG_NET_TFTP=y
> +CONFIG_PING=y
> +CONFIG_TFTP=y
> -- 
> 1.7.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 27 03:48:05 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 09:48:05 +0200
Subject: [PATCH] MIPS: add initial exceptions handling
In-Reply-To: <1343253627-5247-1-git-send-email-antonynpavlov@gmail.com>
References: <1343253627-5247-1-git-send-email-antonynpavlov@gmail.com>
Message-ID: <20120727074805.GU30009@pengutronix.de>

Hi Antony,

Looks fine from my perspective. Should I apply this one?

Sascha

On Thu, Jul 26, 2012 at 02:00:27AM +0400, Antony Pavlov wrote:
> Checking exception handling:
> 
>     $ make qemu-malta_defconfig
>     $ make
> 
>     ...
> 
>     $ qemu-system-mips -nodefaults -M malta -m 256 \
>        -nographic -serial stdio -bios ./barebox.bin
> 
>     ...
> 
>     barebox:/ md -l 0x03
> 
>     Ooops, address error on load or ifetch!
>     EPC = 0xa082783c
>     CP0_STATUS = 0x00000006
>     CP0_CAUSE = 0x00000410
>     CP0_CONFIG = 0x80008482
> 
>     ### ERROR ### Please RESET the board ###
> 
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
>  arch/mips/boot/main_entry.c       |   47 ++++++++++++++++
>  arch/mips/include/asm/addrspace.h |  109 +++++++++++++++++++++++++++++++++++++
>  arch/mips/lib/Makefile            |    2 +
>  arch/mips/lib/genex.S             |   31 +++++++++++
>  arch/mips/lib/traps.c             |  107 ++++++++++++++++++++++++++++++++++++
>  5 files changed, 296 insertions(+)
>  create mode 100644 arch/mips/include/asm/addrspace.h
>  create mode 100644 arch/mips/lib/genex.S
>  create mode 100644 arch/mips/lib/traps.c
> 
> diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
> index 8f5f6fc..a38ad31 100644
> --- a/arch/mips/boot/main_entry.c
> +++ b/arch/mips/boot/main_entry.c
> @@ -25,11 +25,56 @@
>  #include <string.h>
>  #include <asm/sections.h>
>  #include <asm/cpu-features.h>
> +#include <asm/mipsregs.h>
> +#include <asm/addrspace.h>
>  
>  extern void start_barebox(void);
> +extern void handle_reserved(void);
>  
>  void main_entry(void);
>  
> +unsigned long exception_handlers[32];
> +
> +static void set_except_vector(int n, void *addr)
> +{
> +	unsigned handler = (unsigned long) addr;
> +
> +	exception_handlers[n] = handler;
> +}
> +
> +static void trap_init(void)
> +{
> +	extern char except_vec3_generic;
> +	int i;
> +
> +	unsigned long ebase;
> +
> +	ebase = CKSEG1;
> +
> +	/*
> +	 * Copy the generic exception handlers to their final destination.
> +	 * This will be overriden later as suitable for a particular
> +	 * configuration.
> +	 */
> +	memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
> +
> +	/*
> +	 * Setup default vectors
> +	 */
> +	for (i = 0; i <= 31; i++) {
> +		set_except_vector(i, &handle_reserved);
> +	}
> +
> +	if (!cpu_has_4kex)
> +		memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
> +
> +	/* FIXME: handle tlb */
> +	memcpy((void *)(ebase), &except_vec3_generic, 0x80);
> +
> +	/* unset BOOT EXCEPTION VECTOR bit */
> +	write_c0_status(read_c0_status() & ~ST0_BEV);
> +}
> +
>  /**
>   * Called plainly from assembler code
>   *
> @@ -48,5 +93,7 @@ void main_entry(void)
>  		r4k_cache_init();
>  	}
>  
> +	trap_init();
> +
>  	start_barebox();
>  }
> diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
> new file mode 100644
> index 0000000..17d480d
> --- /dev/null
> +++ b/arch/mips/include/asm/addrspace.h
> @@ -0,0 +1,109 @@
> +/*
> + * This file is subject to the terms and conditions of the GNU General Public
> + * License.  See the file "COPYING" in the main directory of this archive
> + * for more details.
> + *
> + * Copyright (C) 1996, 99 Ralf Baechle
> + * Copyright (C) 2000, 2002  Maciej W. Rozycki
> + * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
> + */
> +#ifndef _ASM_ADDRSPACE_H
> +#define _ASM_ADDRSPACE_H
> +
> +/*
> + *  Configure language
> + */
> +#ifdef __ASSEMBLY__
> +#define _ATYPE_
> +#define _ATYPE32_
> +#define _ATYPE64_
> +#define _CONST64_(x)	x
> +#else
> +#define _ATYPE_		__PTRDIFF_TYPE__
> +#define _ATYPE32_	int
> +#define _ATYPE64_	__s64
> +#ifdef CONFIG_64BIT
> +#define _CONST64_(x)	x ## L
> +#else
> +#define _CONST64_(x)	x ## LL
> +#endif
> +#endif
> +
> +/*
> + *  32-bit MIPS address spaces
> + */
> +#ifdef __ASSEMBLY__
> +#define _ACAST32_
> +#define _ACAST64_
> +#else
> +#define _ACAST32_		(_ATYPE_)(_ATYPE32_)	/* widen if necessary */
> +#define _ACAST64_		(_ATYPE64_)		/* do _not_ narrow */
> +#endif
> +
> +/*
> + * Returns the kernel segment base of a given address
> + */
> +#define KSEGX(a)		((_ACAST32_(a)) & 0xe0000000)
> +
> +/*
> + * Returns the physical address of a CKSEGx / XKPHYS address
> + */
> +#define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
> +#define XPHYSADDR(a)            ((_ACAST64_(a)) &			\
> +				 _CONST64_(0x000000ffffffffff))
> +
> +#ifdef CONFIG_64BIT
> +
> +/*
> + * Memory segments (64bit kernel mode addresses)
> + * The compatibility segments use the full 64-bit sign extended value.  Note
> + * the R8000 doesn't have them so don't reference these in generic MIPS code.
> + */
> +#define XKUSEG			_CONST64_(0x0000000000000000)
> +#define XKSSEG			_CONST64_(0x4000000000000000)
> +#define XKPHYS			_CONST64_(0x8000000000000000)
> +#define XKSEG			_CONST64_(0xc000000000000000)
> +#define CKSEG0			_CONST64_(0xffffffff80000000)
> +#define CKSEG1			_CONST64_(0xffffffffa0000000)
> +#define CKSSEG			_CONST64_(0xffffffffc0000000)
> +#define CKSEG3			_CONST64_(0xffffffffe0000000)
> +
> +#define CKSEG0ADDR(a)		(CPHYSADDR(a) | CKSEG0)
> +#define CKSEG1ADDR(a)		(CPHYSADDR(a) | CKSEG1)
> +#define CKSEG2ADDR(a)		(CPHYSADDR(a) | CKSEG2)
> +#define CKSEG3ADDR(a)		(CPHYSADDR(a) | CKSEG3)
> +
> +#else
> +
> +#define CKSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
> +#define CKSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
> +#define CKSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2)
> +#define CKSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3)
> +
> +/*
> + * Map an address to a certain kernel segment
> + */
> +#define KSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
> +#define KSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
> +#define KSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2)
> +#define KSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3)
> +
> +/*
> + * Memory segments (32bit kernel mode addresses)
> + * These are the traditional names used in the 32-bit universe.
> + */
> +#define KUSEG			0x00000000
> +#define KSEG0			0x80000000
> +#define KSEG1			0xa0000000
> +#define KSEG2			0xc0000000
> +#define KSEG3			0xe0000000
> +
> +#define CKUSEG			0x00000000
> +#define CKSEG0			0x80000000
> +#define CKSEG1			0xa0000000
> +#define CKSEG2			0xc0000000
> +#define CKSEG3			0xe0000000
> +
> +#endif
> +
> +#endif /* _ASM_ADDRSPACE_H */
> diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
> index b99bb71..a31046b 100644
> --- a/arch/mips/lib/Makefile
> +++ b/arch/mips/lib/Makefile
> @@ -5,6 +5,8 @@ obj-y += ashldi3.o
>  obj-y += ashrdi3.o
>  obj-y += memory.o
>  obj-y += cpu-probe.o
> +obj-y += traps.o
> +obj-y += genex.o
>  
>  obj-$(CONFIG_CPU_MIPS32) += c-r4k.o
>  obj-$(CONFIG_CPU_MIPS64) += c-r4k.o
> diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
> new file mode 100644
> index 0000000..d6f65a2
> --- /dev/null
> +++ b/arch/mips/lib/genex.S
> @@ -0,0 +1,31 @@
> +#include <asm/asm.h>
> +#include <asm/regdef.h>
> +#include <asm/mipsregs.h>
> +
> +	.text
> +	.set	macro
> +	.set	noat
> +	.set	noreorder
> +	.align	5
> +
> +/* Exception vector */
> +NESTED(handle_reserved, 0, sp)
> +	la	k0, barebox_exc_handler
> +	jal	k0
> +	 move	a0, sp
> +	/* will never return here */
> +	END(handle_reserved)
> +
> +/* General exception vector */
> +NESTED(except_vec3_generic, 0, sp)
> +	.set	noat
> +	mfc0	k1, CP0_CAUSE
> +	la	k0, exception_handlers
> +	andi	k1, k1, 0x7c
> +	addu	k0, k0, k1
> +	lw	k0, (k0)
> +	nop
> +	jr	k0
> +	 nop
> +	END(except_vec3_generic)
> +	.set	at
> diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
> new file mode 100644
> index 0000000..4e167cc
> --- /dev/null
> +++ b/arch/mips/lib/traps.c
> @@ -0,0 +1,107 @@
> +#include <common.h>
> +
> +#include <asm/mipsregs.h>
> +
> +void barebox_exc_handler(void *regs);
> +
> +/*
> + * Trap codes from OpenBSD trap.h
> + */
> +#define T_INT			0	/* Interrupt pending */
> +#define T_TLB_MOD		1	/* TLB modified fault */
> +#define T_TLB_LD_MISS		2	/* TLB miss on load or ifetch */
> +#define T_TLB_ST_MISS		3	/* TLB miss on a store */
> +#define T_ADDR_ERR_LD		4	/* Address error on a load or ifetch */
> +#define T_ADDR_ERR_ST		5	/* Address error on a store */
> +#define T_BUS_ERR_IFETCH	6	/* Bus error on an ifetch */
> +#define T_BUS_ERR_LD_ST		7	/* Bus error on a load or store */
> +#define T_SYSCALL		8	/* System call */
> +#define T_BREAK			9	/* Breakpoint */
> +#define T_RES_INST		10	/* Reserved instruction exception */
> +#define T_COP_UNUSABLE		11	/* Coprocessor unusable */
> +#define T_OVFLOW		12	/* Arithmetic overflow */
> +#define T_TRAP			13	/* Trap instruction */
> +#define T_VCEI			14	/* Virtual coherency instruction */
> +#define T_FPE			15	/* Floating point exception */
> +#define T_IWATCH		16	/* Inst. Watch address reference */
> +#define T_DWATCH		23	/* Data Watch address reference */
> +#define T_VCED			31	/* Virtual coherency data */
> +
> +#define CR_EXC_CODE             0x0000007c
> +#define CR_EXC_CODE_SHIFT       2
> +
> +static char *get_exc_name(u32 cause)
> +{
> +	switch ((cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT) {
> +
> +	case T_INT:
> +		return "interrupt pending";
> +
> +	case T_TLB_MOD:
> +		return "TLB modified";
> +
> +	case T_TLB_LD_MISS:
> +		return "TLB miss on load or ifetch";
> +
> +	case T_TLB_ST_MISS:
> +		return "TLB miss on store";
> +
> +	case T_ADDR_ERR_LD:
> +		return "address error on load or ifetch";
> +
> +	case T_ADDR_ERR_ST:
> +		return "address error on store";
> +
> +	case T_BUS_ERR_IFETCH:
> +		return "bus error on ifetch";
> +
> +	case T_BUS_ERR_LD_ST:
> +		return "bus error on load or store";
> +
> +	case T_SYSCALL:
> +		return "system call";
> +
> +	case T_BREAK:
> +		return "breakpoint";
> +
> +	case T_RES_INST:
> +		return "reserved instruction";
> +
> +	case T_COP_UNUSABLE:
> +		return "coprocessor unusable";
> +
> +	case T_OVFLOW:
> +		return "arithmetic overflow";
> +
> +	case T_TRAP:
> +		return "trap instruction";
> +
> +	case T_VCEI:
> +		return "virtual coherency instruction";
> +
> +	case T_FPE:
> +		return "floating point";
> +
> +	case T_IWATCH:
> +		return "iwatch";
> +
> +	case T_DWATCH:
> +		return "dwatch";
> +
> +	case T_VCED:
> +		return "virtual coherency data";
> +	}
> +
> +	return "unknown exception";
> +}
> +
> +void barebox_exc_handler(void *regs)
> +{
> +	printf("\nOoops, %s!\n", get_exc_name(read_c0_cause()));
> +	printf("EPC = 0x%08x\n", read_c0_epc());
> +	printf("CP0_STATUS = 0x%08x\n", read_c0_status());
> +	printf("CP0_CAUSE = 0x%08x\n", read_c0_cause());
> +	printf("CP0_CONFIG = 0x%08x\n\n", read_c0_config());
> +
> +	hang();
> +}
> -- 
> 1.7.10
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From antonynpavlov at gmail.com  Fri Jul 27 03:49:43 2012
From: antonynpavlov at gmail.com (Antony Pavlov)
Date: Fri, 27 Jul 2012 11:49:43 +0400
Subject: [PATCH] MIPS: add initial exceptions handling
In-Reply-To: <20120727074805.GU30009@pengutronix.de>
References: <1343253627-5247-1-git-send-email-antonynpavlov@gmail.com>
 <20120727074805.GU30009@pengutronix.de>
Message-ID: <CAA4bVAELeJx-45MZujY0QGpWr4PxQ3gCKjHWJQ-XF05XR6ABxA@mail.gmail.com>

On 27 July 2012 11:48, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> Hi Antony,
>
> Looks fine from my perspective. Should I apply this one?

Apply this one please.

> On Thu, Jul 26, 2012 at 02:00:27AM +0400, Antony Pavlov wrote:
>> Checking exception handling:
>>
>>     $ make qemu-malta_defconfig
>>     $ make
>>
>>     ...
>>
>>     $ qemu-system-mips -nodefaults -M malta -m 256 \
>>        -nographic -serial stdio -bios ./barebox.bin
>>
>>     ...
>>
>>     barebox:/ md -l 0x03
>>
>>     Ooops, address error on load or ifetch!
>>     EPC = 0xa082783c
>>     CP0_STATUS = 0x00000006
>>     CP0_CAUSE = 0x00000410
>>     CP0_CONFIG = 0x80008482
>>
>>     ### ERROR ### Please RESET the board ###
>>
>> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
>> ---
>>  arch/mips/boot/main_entry.c       |   47 ++++++++++++++++
>>  arch/mips/include/asm/addrspace.h |  109 +++++++++++++++++++++++++++++++++++++
>>  arch/mips/lib/Makefile            |    2 +
>>  arch/mips/lib/genex.S             |   31 +++++++++++
>>  arch/mips/lib/traps.c             |  107 ++++++++++++++++++++++++++++++++++++
>>  5 files changed, 296 insertions(+)
>>  create mode 100644 arch/mips/include/asm/addrspace.h
>>  create mode 100644 arch/mips/lib/genex.S
>>  create mode 100644 arch/mips/lib/traps.c
>>
>> diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
>> index 8f5f6fc..a38ad31 100644
>> --- a/arch/mips/boot/main_entry.c
>> +++ b/arch/mips/boot/main_entry.c
>> @@ -25,11 +25,56 @@
>>  #include <string.h>
>>  #include <asm/sections.h>
>>  #include <asm/cpu-features.h>
>> +#include <asm/mipsregs.h>
>> +#include <asm/addrspace.h>
>>
>>  extern void start_barebox(void);
>> +extern void handle_reserved(void);
>>
>>  void main_entry(void);
>>
>> +unsigned long exception_handlers[32];
>> +
>> +static void set_except_vector(int n, void *addr)
>> +{
>> +     unsigned handler = (unsigned long) addr;
>> +
>> +     exception_handlers[n] = handler;
>> +}
>> +
>> +static void trap_init(void)
>> +{
>> +     extern char except_vec3_generic;
>> +     int i;
>> +
>> +     unsigned long ebase;
>> +
>> +     ebase = CKSEG1;
>> +
>> +     /*
>> +      * Copy the generic exception handlers to their final destination.
>> +      * This will be overriden later as suitable for a particular
>> +      * configuration.
>> +      */
>> +     memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
>> +
>> +     /*
>> +      * Setup default vectors
>> +      */
>> +     for (i = 0; i <= 31; i++) {
>> +             set_except_vector(i, &handle_reserved);
>> +     }
>> +
>> +     if (!cpu_has_4kex)
>> +             memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
>> +
>> +     /* FIXME: handle tlb */
>> +     memcpy((void *)(ebase), &except_vec3_generic, 0x80);
>> +
>> +     /* unset BOOT EXCEPTION VECTOR bit */
>> +     write_c0_status(read_c0_status() & ~ST0_BEV);
>> +}
>> +
>>  /**
>>   * Called plainly from assembler code
>>   *
>> @@ -48,5 +93,7 @@ void main_entry(void)
>>               r4k_cache_init();
>>       }
>>
>> +     trap_init();
>> +
>>       start_barebox();
>>  }
>> diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
>> new file mode 100644
>> index 0000000..17d480d
>> --- /dev/null
>> +++ b/arch/mips/include/asm/addrspace.h
>> @@ -0,0 +1,109 @@
>> +/*
>> + * This file is subject to the terms and conditions of the GNU General Public
>> + * License.  See the file "COPYING" in the main directory of this archive
>> + * for more details.
>> + *
>> + * Copyright (C) 1996, 99 Ralf Baechle
>> + * Copyright (C) 2000, 2002  Maciej W. Rozycki
>> + * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
>> + */
>> +#ifndef _ASM_ADDRSPACE_H
>> +#define _ASM_ADDRSPACE_H
>> +
>> +/*
>> + *  Configure language
>> + */
>> +#ifdef __ASSEMBLY__
>> +#define _ATYPE_
>> +#define _ATYPE32_
>> +#define _ATYPE64_
>> +#define _CONST64_(x) x
>> +#else
>> +#define _ATYPE_              __PTRDIFF_TYPE__
>> +#define _ATYPE32_    int
>> +#define _ATYPE64_    __s64
>> +#ifdef CONFIG_64BIT
>> +#define _CONST64_(x) x ## L
>> +#else
>> +#define _CONST64_(x) x ## LL
>> +#endif
>> +#endif
>> +
>> +/*
>> + *  32-bit MIPS address spaces
>> + */
>> +#ifdef __ASSEMBLY__
>> +#define _ACAST32_
>> +#define _ACAST64_
>> +#else
>> +#define _ACAST32_            (_ATYPE_)(_ATYPE32_)    /* widen if necessary */
>> +#define _ACAST64_            (_ATYPE64_)             /* do _not_ narrow */
>> +#endif
>> +
>> +/*
>> + * Returns the kernel segment base of a given address
>> + */
>> +#define KSEGX(a)             ((_ACAST32_(a)) & 0xe0000000)
>> +
>> +/*
>> + * Returns the physical address of a CKSEGx / XKPHYS address
>> + */
>> +#define CPHYSADDR(a)         ((_ACAST32_(a)) & 0x1fffffff)
>> +#define XPHYSADDR(a)            ((_ACAST64_(a)) &                    \
>> +                              _CONST64_(0x000000ffffffffff))
>> +
>> +#ifdef CONFIG_64BIT
>> +
>> +/*
>> + * Memory segments (64bit kernel mode addresses)
>> + * The compatibility segments use the full 64-bit sign extended value.  Note
>> + * the R8000 doesn't have them so don't reference these in generic MIPS code.
>> + */
>> +#define XKUSEG                       _CONST64_(0x0000000000000000)
>> +#define XKSSEG                       _CONST64_(0x4000000000000000)
>> +#define XKPHYS                       _CONST64_(0x8000000000000000)
>> +#define XKSEG                        _CONST64_(0xc000000000000000)
>> +#define CKSEG0                       _CONST64_(0xffffffff80000000)
>> +#define CKSEG1                       _CONST64_(0xffffffffa0000000)
>> +#define CKSSEG                       _CONST64_(0xffffffffc0000000)
>> +#define CKSEG3                       _CONST64_(0xffffffffe0000000)
>> +
>> +#define CKSEG0ADDR(a)                (CPHYSADDR(a) | CKSEG0)
>> +#define CKSEG1ADDR(a)                (CPHYSADDR(a) | CKSEG1)
>> +#define CKSEG2ADDR(a)                (CPHYSADDR(a) | CKSEG2)
>> +#define CKSEG3ADDR(a)                (CPHYSADDR(a) | CKSEG3)
>> +
>> +#else
>> +
>> +#define CKSEG0ADDR(a)                (CPHYSADDR(a) | KSEG0)
>> +#define CKSEG1ADDR(a)                (CPHYSADDR(a) | KSEG1)
>> +#define CKSEG2ADDR(a)                (CPHYSADDR(a) | KSEG2)
>> +#define CKSEG3ADDR(a)                (CPHYSADDR(a) | KSEG3)
>> +
>> +/*
>> + * Map an address to a certain kernel segment
>> + */
>> +#define KSEG0ADDR(a)         (CPHYSADDR(a) | KSEG0)
>> +#define KSEG1ADDR(a)         (CPHYSADDR(a) | KSEG1)
>> +#define KSEG2ADDR(a)         (CPHYSADDR(a) | KSEG2)
>> +#define KSEG3ADDR(a)         (CPHYSADDR(a) | KSEG3)
>> +
>> +/*
>> + * Memory segments (32bit kernel mode addresses)
>> + * These are the traditional names used in the 32-bit universe.
>> + */
>> +#define KUSEG                        0x00000000
>> +#define KSEG0                        0x80000000
>> +#define KSEG1                        0xa0000000
>> +#define KSEG2                        0xc0000000
>> +#define KSEG3                        0xe0000000
>> +
>> +#define CKUSEG                       0x00000000
>> +#define CKSEG0                       0x80000000
>> +#define CKSEG1                       0xa0000000
>> +#define CKSEG2                       0xc0000000
>> +#define CKSEG3                       0xe0000000
>> +
>> +#endif
>> +
>> +#endif /* _ASM_ADDRSPACE_H */
>> diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
>> index b99bb71..a31046b 100644
>> --- a/arch/mips/lib/Makefile
>> +++ b/arch/mips/lib/Makefile
>> @@ -5,6 +5,8 @@ obj-y += ashldi3.o
>>  obj-y += ashrdi3.o
>>  obj-y += memory.o
>>  obj-y += cpu-probe.o
>> +obj-y += traps.o
>> +obj-y += genex.o
>>
>>  obj-$(CONFIG_CPU_MIPS32) += c-r4k.o
>>  obj-$(CONFIG_CPU_MIPS64) += c-r4k.o
>> diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
>> new file mode 100644
>> index 0000000..d6f65a2
>> --- /dev/null
>> +++ b/arch/mips/lib/genex.S
>> @@ -0,0 +1,31 @@
>> +#include <asm/asm.h>
>> +#include <asm/regdef.h>
>> +#include <asm/mipsregs.h>
>> +
>> +     .text
>> +     .set    macro
>> +     .set    noat
>> +     .set    noreorder
>> +     .align  5
>> +
>> +/* Exception vector */
>> +NESTED(handle_reserved, 0, sp)
>> +     la      k0, barebox_exc_handler
>> +     jal     k0
>> +      move   a0, sp
>> +     /* will never return here */
>> +     END(handle_reserved)
>> +
>> +/* General exception vector */
>> +NESTED(except_vec3_generic, 0, sp)
>> +     .set    noat
>> +     mfc0    k1, CP0_CAUSE
>> +     la      k0, exception_handlers
>> +     andi    k1, k1, 0x7c
>> +     addu    k0, k0, k1
>> +     lw      k0, (k0)
>> +     nop
>> +     jr      k0
>> +      nop
>> +     END(except_vec3_generic)
>> +     .set    at
>> diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
>> new file mode 100644
>> index 0000000..4e167cc
>> --- /dev/null
>> +++ b/arch/mips/lib/traps.c
>> @@ -0,0 +1,107 @@
>> +#include <common.h>
>> +
>> +#include <asm/mipsregs.h>
>> +
>> +void barebox_exc_handler(void *regs);
>> +
>> +/*
>> + * Trap codes from OpenBSD trap.h
>> + */
>> +#define T_INT                        0       /* Interrupt pending */
>> +#define T_TLB_MOD            1       /* TLB modified fault */
>> +#define T_TLB_LD_MISS                2       /* TLB miss on load or ifetch */
>> +#define T_TLB_ST_MISS                3       /* TLB miss on a store */
>> +#define T_ADDR_ERR_LD                4       /* Address error on a load or ifetch */
>> +#define T_ADDR_ERR_ST                5       /* Address error on a store */
>> +#define T_BUS_ERR_IFETCH     6       /* Bus error on an ifetch */
>> +#define T_BUS_ERR_LD_ST              7       /* Bus error on a load or store */
>> +#define T_SYSCALL            8       /* System call */
>> +#define T_BREAK                      9       /* Breakpoint */
>> +#define T_RES_INST           10      /* Reserved instruction exception */
>> +#define T_COP_UNUSABLE               11      /* Coprocessor unusable */
>> +#define T_OVFLOW             12      /* Arithmetic overflow */
>> +#define T_TRAP                       13      /* Trap instruction */
>> +#define T_VCEI                       14      /* Virtual coherency instruction */
>> +#define T_FPE                        15      /* Floating point exception */
>> +#define T_IWATCH             16      /* Inst. Watch address reference */
>> +#define T_DWATCH             23      /* Data Watch address reference */
>> +#define T_VCED                       31      /* Virtual coherency data */
>> +
>> +#define CR_EXC_CODE             0x0000007c
>> +#define CR_EXC_CODE_SHIFT       2
>> +
>> +static char *get_exc_name(u32 cause)
>> +{
>> +     switch ((cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT) {
>> +
>> +     case T_INT:
>> +             return "interrupt pending";
>> +
>> +     case T_TLB_MOD:
>> +             return "TLB modified";
>> +
>> +     case T_TLB_LD_MISS:
>> +             return "TLB miss on load or ifetch";
>> +
>> +     case T_TLB_ST_MISS:
>> +             return "TLB miss on store";
>> +
>> +     case T_ADDR_ERR_LD:
>> +             return "address error on load or ifetch";
>> +
>> +     case T_ADDR_ERR_ST:
>> +             return "address error on store";
>> +
>> +     case T_BUS_ERR_IFETCH:
>> +             return "bus error on ifetch";
>> +
>> +     case T_BUS_ERR_LD_ST:
>> +             return "bus error on load or store";
>> +
>> +     case T_SYSCALL:
>> +             return "system call";
>> +
>> +     case T_BREAK:
>> +             return "breakpoint";
>> +
>> +     case T_RES_INST:
>> +             return "reserved instruction";
>> +
>> +     case T_COP_UNUSABLE:
>> +             return "coprocessor unusable";
>> +
>> +     case T_OVFLOW:
>> +             return "arithmetic overflow";
>> +
>> +     case T_TRAP:
>> +             return "trap instruction";
>> +
>> +     case T_VCEI:
>> +             return "virtual coherency instruction";
>> +
>> +     case T_FPE:
>> +             return "floating point";
>> +
>> +     case T_IWATCH:
>> +             return "iwatch";
>> +
>> +     case T_DWATCH:
>> +             return "dwatch";
>> +
>> +     case T_VCED:
>> +             return "virtual coherency data";
>> +     }
>> +
>> +     return "unknown exception";
>> +}
>> +
>> +void barebox_exc_handler(void *regs)
>> +{
>> +     printf("\nOoops, %s!\n", get_exc_name(read_c0_cause()));
>> +     printf("EPC = 0x%08x\n", read_c0_epc());
>> +     printf("CP0_STATUS = 0x%08x\n", read_c0_status());
>> +     printf("CP0_CAUSE = 0x%08x\n", read_c0_cause());
>> +     printf("CP0_CONFIG = 0x%08x\n\n", read_c0_config());
>> +
>> +     hang();
>> +}
>> --
>> 1.7.10
>>
>>
>> _______________________________________________
>> barebox mailing list
>> barebox at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox
>>
>
> --
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



-- 
Best regards,
  Antony Pavlov


From j.weitzel at phytec.de  Fri Jul 27 03:52:31 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 09:52:31 +0200
Subject: [PATCH] OMAP4: cleanup
Message-ID: <1343375551-9176-1-git-send-email-j.weitzel@phytec.de>

use rev to check revision

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/mach-omap/omap4_generic.c |    9 ++++-----
 1 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index c6fb91f..f44fa4b 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -23,7 +23,7 @@
 #define MIDR_CORTEX_A9_R1P3	0x411FC093
 #define MIDR_CORTEX_A9_R2P10	0x412FC09A
 
-#define CONTROL_ID_CODE         0x4A002204
+#define CONTROL_ID_CODE	  0x4A002204
 
 #define OMAP4_CONTROL_ID_CODE_ES1_0     0x0B85202F
 #define OMAP4_CONTROL_ID_CODE_ES2_0     0x1B85202F
@@ -278,8 +278,7 @@ static void reset_phy(unsigned int base)
 void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 		const struct dpll_param *core)
 {
-	unsigned int rev;
-	rev = omap4_revision();
+	unsigned int rev = omap4_revision();
 
 	if (rev == OMAP4430_ES2_0) {
 		writel(0x9e9e9e9e, 0x4A100638);
@@ -302,7 +301,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x00000000;
 	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
 
-	if (omap4_revision() >= OMAP4460_ES1_0) {
+	if (rev >= OMAP4460_ES1_0) {
 		writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
 
 		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 0x00000000;
@@ -351,7 +350,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 	*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x80000000;
 	*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x80000000;
 
-	if (omap4_revision() >= OMAP4460_ES1_0) {
+	if (rev >= OMAP4460_ES1_0) {
 		writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
 				OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
 		writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
-- 
1.7.0.4



From s.hauer at pengutronix.de  Fri Jul 27 03:53:34 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 09:53:34 +0200
Subject: Way to clear nand bad block table
In-Reply-To: <1440381.IzydBDPxna@dev1>
References: <002601cd6b08$37498d50$a5dca7f0$@cpdesign.com.au>
 <201207261127.48919.jbe@pengutronix.de> <1440381.IzydBDPxna@dev1>
Message-ID: <20120727075333.GV30009@pengutronix.de>

On Fri, Jul 27, 2012 at 11:24:48AM +1000, Marc Reilly wrote:
> Hi Juergen,
> 
> Thanks for your ideas.
> 
> I managed to clear the BBT, it was a bit of a hack... the saga is below for 
> anyone who runs into similar problem.
> 
> On Thursday, July 26, 2012 11:27:48 AM Juergen Beisert wrote:
> > The flash blocks which contains the "bad block table" are protected by
> > the "bad block table" aware MTD layer.
> > 
> > So, the ugly way: run a bootloader which does not use the in-flash bad block
> > table. Then the tables are regular blocks in the flash and can be erased.
> > After that run again the bad block table aware bootloader and it will
> > re-create the in-flash table. But be careful: In this case the generic
> > functions scans all blocks in the NAND to collect the bad block markers in
> > each NAND block's OOB. If this information is already destroyed somehow,
> > this solution does not help.
> 
> Recompiling barebox with bbt support disabled stopped the all the bad block 
> messages, however erasing the nand didn't clear the BBT for subsequent 
> reboots...
> The issue was that the erase commands and functions skip erasing bad blocks, 
> and the blocks that held the actual BBT were being considered bad, so they 
> weren't getting erased. After commenting out calls to nand_block_checkbad() in 
> nand_write.c and block_isbad() in mtd_erase()/core.c I was able to manually 
> erase the blocks. (erasing actual bad blocks results in I/O error)
> Next restart of barebox the BBT was regenerated with the two actual bad 
> blocks.
> 
> After all that, I noticed imx_low_erase() in nand_imx.c. Probably would have 
> been easier to make up a command around that.

This problem comes up regularly. I remember Wolfram implemented a nand
'scrub' command. He was working on i.MX28. I don't know wether his
command was i.MX28 specific, but it would be nice to have such a command
around.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From J.Weitzel at phytec.de  Fri Jul 27 04:02:42 2012
From: J.Weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 10:02:42 +0200
Subject: [PATCH] OMAP4: cleanup
In-Reply-To: <1343375551-9176-1-git-send-email-j.weitzel@phytec.de>
References: <1343375551-9176-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1343376162.3793.4.camel@lws-weitzel>

Am Freitag, den 27.07.2012, 09:52 +0200 schrieb Jan Weitzel:
> use rev to check revision
> 

sorry didn't apply on master, will rework

> Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> ---
>  arch/arm/mach-omap/omap4_generic.c |    9 ++++-----
>  1 files changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
> index c6fb91f..f44fa4b 100644
> --- a/arch/arm/mach-omap/omap4_generic.c
> +++ b/arch/arm/mach-omap/omap4_generic.c
> @@ -23,7 +23,7 @@
>  #define MIDR_CORTEX_A9_R1P3	0x411FC093
>  #define MIDR_CORTEX_A9_R2P10	0x412FC09A
>  
> -#define CONTROL_ID_CODE         0x4A002204
> +#define CONTROL_ID_CODE	  0x4A002204
>  
>  #define OMAP4_CONTROL_ID_CODE_ES1_0     0x0B85202F
>  #define OMAP4_CONTROL_ID_CODE_ES2_0     0x1B85202F
> @@ -278,8 +278,7 @@ static void reset_phy(unsigned int base)
>  void omap4_ddr_init(const struct ddr_regs *ddr_regs,
>  		const struct dpll_param *core)
>  {
> -	unsigned int rev;
> -	rev = omap4_revision();
> +	unsigned int rev = omap4_revision();
>  
>  	if (rev == OMAP4430_ES2_0) {
>  		writel(0x9e9e9e9e, 0x4A100638);
> @@ -302,7 +301,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
>  	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x00000000;
>  	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
>  
> -	if (omap4_revision() >= OMAP4460_ES1_0) {
> +	if (rev >= OMAP4460_ES1_0) {
>  		writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
>  
>  		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 0x00000000;
> @@ -351,7 +350,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
>  	*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x80000000;
>  	*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x80000000;
>  
> -	if (omap4_revision() >= OMAP4460_ES1_0) {
> +	if (rev >= OMAP4460_ES1_0) {
>  		writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
>  				OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
>  		writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,




From s.hauer at pengutronix.de  Fri Jul 27 04:05:41 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 10:05:41 +0200
Subject: [PATCH] MIPS: add initial exceptions handling
In-Reply-To: <CAA4bVAELeJx-45MZujY0QGpWr4PxQ3gCKjHWJQ-XF05XR6ABxA@mail.gmail.com>
References: <1343253627-5247-1-git-send-email-antonynpavlov@gmail.com>
 <20120727074805.GU30009@pengutronix.de>
 <CAA4bVAELeJx-45MZujY0QGpWr4PxQ3gCKjHWJQ-XF05XR6ABxA@mail.gmail.com>
Message-ID: <20120727080541.GW30009@pengutronix.de>

On Fri, Jul 27, 2012 at 11:49:43AM +0400, Antony Pavlov wrote:
> On 27 July 2012 11:48, Sascha Hauer <s.hauer at pengutronix.de> wrote:
> > Hi Antony,
> >
> > Looks fine from my perspective. Should I apply this one?
> 
> Apply this one please.

Ok, did that.

Thanks
  Sascha

> 
> > On Thu, Jul 26, 2012 at 02:00:27AM +0400, Antony Pavlov wrote:
> >> Checking exception handling:
> >>
> >>     $ make qemu-malta_defconfig
> >>     $ make
> >>
> >>     ...
> >>
> >>     $ qemu-system-mips -nodefaults -M malta -m 256 \
> >>        -nographic -serial stdio -bios ./barebox.bin
> >>
> >>     ...
> >>
> >>     barebox:/ md -l 0x03
> >>
> >>     Ooops, address error on load or ifetch!
> >>     EPC = 0xa082783c
> >>     CP0_STATUS = 0x00000006
> >>     CP0_CAUSE = 0x00000410
> >>     CP0_CONFIG = 0x80008482
> >>
> >>     ### ERROR ### Please RESET the board ###
> >>
> >> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> >> ---
> >>  arch/mips/boot/main_entry.c       |   47 ++++++++++++++++
> >>  arch/mips/include/asm/addrspace.h |  109 +++++++++++++++++++++++++++++++++++++
> >>  arch/mips/lib/Makefile            |    2 +
> >>  arch/mips/lib/genex.S             |   31 +++++++++++
> >>  arch/mips/lib/traps.c             |  107 ++++++++++++++++++++++++++++++++++++
> >>  5 files changed, 296 insertions(+)
> >>  create mode 100644 arch/mips/include/asm/addrspace.h
> >>  create mode 100644 arch/mips/lib/genex.S
> >>  create mode 100644 arch/mips/lib/traps.c
> >>
> >> diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
> >> index 8f5f6fc..a38ad31 100644
> >> --- a/arch/mips/boot/main_entry.c
> >> +++ b/arch/mips/boot/main_entry.c
> >> @@ -25,11 +25,56 @@
> >>  #include <string.h>
> >>  #include <asm/sections.h>
> >>  #include <asm/cpu-features.h>
> >> +#include <asm/mipsregs.h>
> >> +#include <asm/addrspace.h>
> >>
> >>  extern void start_barebox(void);
> >> +extern void handle_reserved(void);
> >>
> >>  void main_entry(void);
> >>
> >> +unsigned long exception_handlers[32];
> >> +
> >> +static void set_except_vector(int n, void *addr)
> >> +{
> >> +     unsigned handler = (unsigned long) addr;
> >> +
> >> +     exception_handlers[n] = handler;
> >> +}
> >> +
> >> +static void trap_init(void)
> >> +{
> >> +     extern char except_vec3_generic;
> >> +     int i;
> >> +
> >> +     unsigned long ebase;
> >> +
> >> +     ebase = CKSEG1;
> >> +
> >> +     /*
> >> +      * Copy the generic exception handlers to their final destination.
> >> +      * This will be overriden later as suitable for a particular
> >> +      * configuration.
> >> +      */
> >> +     memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
> >> +
> >> +     /*
> >> +      * Setup default vectors
> >> +      */
> >> +     for (i = 0; i <= 31; i++) {
> >> +             set_except_vector(i, &handle_reserved);
> >> +     }
> >> +
> >> +     if (!cpu_has_4kex)
> >> +             memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
> >> +
> >> +     /* FIXME: handle tlb */
> >> +     memcpy((void *)(ebase), &except_vec3_generic, 0x80);
> >> +
> >> +     /* unset BOOT EXCEPTION VECTOR bit */
> >> +     write_c0_status(read_c0_status() & ~ST0_BEV);
> >> +}
> >> +
> >>  /**
> >>   * Called plainly from assembler code
> >>   *
> >> @@ -48,5 +93,7 @@ void main_entry(void)
> >>               r4k_cache_init();
> >>       }
> >>
> >> +     trap_init();
> >> +
> >>       start_barebox();
> >>  }
> >> diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
> >> new file mode 100644
> >> index 0000000..17d480d
> >> --- /dev/null
> >> +++ b/arch/mips/include/asm/addrspace.h
> >> @@ -0,0 +1,109 @@
> >> +/*
> >> + * This file is subject to the terms and conditions of the GNU General Public
> >> + * License.  See the file "COPYING" in the main directory of this archive
> >> + * for more details.
> >> + *
> >> + * Copyright (C) 1996, 99 Ralf Baechle
> >> + * Copyright (C) 2000, 2002  Maciej W. Rozycki
> >> + * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
> >> + */
> >> +#ifndef _ASM_ADDRSPACE_H
> >> +#define _ASM_ADDRSPACE_H
> >> +
> >> +/*
> >> + *  Configure language
> >> + */
> >> +#ifdef __ASSEMBLY__
> >> +#define _ATYPE_
> >> +#define _ATYPE32_
> >> +#define _ATYPE64_
> >> +#define _CONST64_(x) x
> >> +#else
> >> +#define _ATYPE_              __PTRDIFF_TYPE__
> >> +#define _ATYPE32_    int
> >> +#define _ATYPE64_    __s64
> >> +#ifdef CONFIG_64BIT
> >> +#define _CONST64_(x) x ## L
> >> +#else
> >> +#define _CONST64_(x) x ## LL
> >> +#endif
> >> +#endif
> >> +
> >> +/*
> >> + *  32-bit MIPS address spaces
> >> + */
> >> +#ifdef __ASSEMBLY__
> >> +#define _ACAST32_
> >> +#define _ACAST64_
> >> +#else
> >> +#define _ACAST32_            (_ATYPE_)(_ATYPE32_)    /* widen if necessary */
> >> +#define _ACAST64_            (_ATYPE64_)             /* do _not_ narrow */
> >> +#endif
> >> +
> >> +/*
> >> + * Returns the kernel segment base of a given address
> >> + */
> >> +#define KSEGX(a)             ((_ACAST32_(a)) & 0xe0000000)
> >> +
> >> +/*
> >> + * Returns the physical address of a CKSEGx / XKPHYS address
> >> + */
> >> +#define CPHYSADDR(a)         ((_ACAST32_(a)) & 0x1fffffff)
> >> +#define XPHYSADDR(a)            ((_ACAST64_(a)) &                    \
> >> +                              _CONST64_(0x000000ffffffffff))
> >> +
> >> +#ifdef CONFIG_64BIT
> >> +
> >> +/*
> >> + * Memory segments (64bit kernel mode addresses)
> >> + * The compatibility segments use the full 64-bit sign extended value.  Note
> >> + * the R8000 doesn't have them so don't reference these in generic MIPS code.
> >> + */
> >> +#define XKUSEG                       _CONST64_(0x0000000000000000)
> >> +#define XKSSEG                       _CONST64_(0x4000000000000000)
> >> +#define XKPHYS                       _CONST64_(0x8000000000000000)
> >> +#define XKSEG                        _CONST64_(0xc000000000000000)
> >> +#define CKSEG0                       _CONST64_(0xffffffff80000000)
> >> +#define CKSEG1                       _CONST64_(0xffffffffa0000000)
> >> +#define CKSSEG                       _CONST64_(0xffffffffc0000000)
> >> +#define CKSEG3                       _CONST64_(0xffffffffe0000000)
> >> +
> >> +#define CKSEG0ADDR(a)                (CPHYSADDR(a) | CKSEG0)
> >> +#define CKSEG1ADDR(a)                (CPHYSADDR(a) | CKSEG1)
> >> +#define CKSEG2ADDR(a)                (CPHYSADDR(a) | CKSEG2)
> >> +#define CKSEG3ADDR(a)                (CPHYSADDR(a) | CKSEG3)
> >> +
> >> +#else
> >> +
> >> +#define CKSEG0ADDR(a)                (CPHYSADDR(a) | KSEG0)
> >> +#define CKSEG1ADDR(a)                (CPHYSADDR(a) | KSEG1)
> >> +#define CKSEG2ADDR(a)                (CPHYSADDR(a) | KSEG2)
> >> +#define CKSEG3ADDR(a)                (CPHYSADDR(a) | KSEG3)
> >> +
> >> +/*
> >> + * Map an address to a certain kernel segment
> >> + */
> >> +#define KSEG0ADDR(a)         (CPHYSADDR(a) | KSEG0)
> >> +#define KSEG1ADDR(a)         (CPHYSADDR(a) | KSEG1)
> >> +#define KSEG2ADDR(a)         (CPHYSADDR(a) | KSEG2)
> >> +#define KSEG3ADDR(a)         (CPHYSADDR(a) | KSEG3)
> >> +
> >> +/*
> >> + * Memory segments (32bit kernel mode addresses)
> >> + * These are the traditional names used in the 32-bit universe.
> >> + */
> >> +#define KUSEG                        0x00000000
> >> +#define KSEG0                        0x80000000
> >> +#define KSEG1                        0xa0000000
> >> +#define KSEG2                        0xc0000000
> >> +#define KSEG3                        0xe0000000
> >> +
> >> +#define CKUSEG                       0x00000000
> >> +#define CKSEG0                       0x80000000
> >> +#define CKSEG1                       0xa0000000
> >> +#define CKSEG2                       0xc0000000
> >> +#define CKSEG3                       0xe0000000
> >> +
> >> +#endif
> >> +
> >> +#endif /* _ASM_ADDRSPACE_H */
> >> diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
> >> index b99bb71..a31046b 100644
> >> --- a/arch/mips/lib/Makefile
> >> +++ b/arch/mips/lib/Makefile
> >> @@ -5,6 +5,8 @@ obj-y += ashldi3.o
> >>  obj-y += ashrdi3.o
> >>  obj-y += memory.o
> >>  obj-y += cpu-probe.o
> >> +obj-y += traps.o
> >> +obj-y += genex.o
> >>
> >>  obj-$(CONFIG_CPU_MIPS32) += c-r4k.o
> >>  obj-$(CONFIG_CPU_MIPS64) += c-r4k.o
> >> diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
> >> new file mode 100644
> >> index 0000000..d6f65a2
> >> --- /dev/null
> >> +++ b/arch/mips/lib/genex.S
> >> @@ -0,0 +1,31 @@
> >> +#include <asm/asm.h>
> >> +#include <asm/regdef.h>
> >> +#include <asm/mipsregs.h>
> >> +
> >> +     .text
> >> +     .set    macro
> >> +     .set    noat
> >> +     .set    noreorder
> >> +     .align  5
> >> +
> >> +/* Exception vector */
> >> +NESTED(handle_reserved, 0, sp)
> >> +     la      k0, barebox_exc_handler
> >> +     jal     k0
> >> +      move   a0, sp
> >> +     /* will never return here */
> >> +     END(handle_reserved)
> >> +
> >> +/* General exception vector */
> >> +NESTED(except_vec3_generic, 0, sp)
> >> +     .set    noat
> >> +     mfc0    k1, CP0_CAUSE
> >> +     la      k0, exception_handlers
> >> +     andi    k1, k1, 0x7c
> >> +     addu    k0, k0, k1
> >> +     lw      k0, (k0)
> >> +     nop
> >> +     jr      k0
> >> +      nop
> >> +     END(except_vec3_generic)
> >> +     .set    at
> >> diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
> >> new file mode 100644
> >> index 0000000..4e167cc
> >> --- /dev/null
> >> +++ b/arch/mips/lib/traps.c
> >> @@ -0,0 +1,107 @@
> >> +#include <common.h>
> >> +
> >> +#include <asm/mipsregs.h>
> >> +
> >> +void barebox_exc_handler(void *regs);
> >> +
> >> +/*
> >> + * Trap codes from OpenBSD trap.h
> >> + */
> >> +#define T_INT                        0       /* Interrupt pending */
> >> +#define T_TLB_MOD            1       /* TLB modified fault */
> >> +#define T_TLB_LD_MISS                2       /* TLB miss on load or ifetch */
> >> +#define T_TLB_ST_MISS                3       /* TLB miss on a store */
> >> +#define T_ADDR_ERR_LD                4       /* Address error on a load or ifetch */
> >> +#define T_ADDR_ERR_ST                5       /* Address error on a store */
> >> +#define T_BUS_ERR_IFETCH     6       /* Bus error on an ifetch */
> >> +#define T_BUS_ERR_LD_ST              7       /* Bus error on a load or store */
> >> +#define T_SYSCALL            8       /* System call */
> >> +#define T_BREAK                      9       /* Breakpoint */
> >> +#define T_RES_INST           10      /* Reserved instruction exception */
> >> +#define T_COP_UNUSABLE               11      /* Coprocessor unusable */
> >> +#define T_OVFLOW             12      /* Arithmetic overflow */
> >> +#define T_TRAP                       13      /* Trap instruction */
> >> +#define T_VCEI                       14      /* Virtual coherency instruction */
> >> +#define T_FPE                        15      /* Floating point exception */
> >> +#define T_IWATCH             16      /* Inst. Watch address reference */
> >> +#define T_DWATCH             23      /* Data Watch address reference */
> >> +#define T_VCED                       31      /* Virtual coherency data */
> >> +
> >> +#define CR_EXC_CODE             0x0000007c
> >> +#define CR_EXC_CODE_SHIFT       2
> >> +
> >> +static char *get_exc_name(u32 cause)
> >> +{
> >> +     switch ((cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT) {
> >> +
> >> +     case T_INT:
> >> +             return "interrupt pending";
> >> +
> >> +     case T_TLB_MOD:
> >> +             return "TLB modified";
> >> +
> >> +     case T_TLB_LD_MISS:
> >> +             return "TLB miss on load or ifetch";
> >> +
> >> +     case T_TLB_ST_MISS:
> >> +             return "TLB miss on store";
> >> +
> >> +     case T_ADDR_ERR_LD:
> >> +             return "address error on load or ifetch";
> >> +
> >> +     case T_ADDR_ERR_ST:
> >> +             return "address error on store";
> >> +
> >> +     case T_BUS_ERR_IFETCH:
> >> +             return "bus error on ifetch";
> >> +
> >> +     case T_BUS_ERR_LD_ST:
> >> +             return "bus error on load or store";
> >> +
> >> +     case T_SYSCALL:
> >> +             return "system call";
> >> +
> >> +     case T_BREAK:
> >> +             return "breakpoint";
> >> +
> >> +     case T_RES_INST:
> >> +             return "reserved instruction";
> >> +
> >> +     case T_COP_UNUSABLE:
> >> +             return "coprocessor unusable";
> >> +
> >> +     case T_OVFLOW:
> >> +             return "arithmetic overflow";
> >> +
> >> +     case T_TRAP:
> >> +             return "trap instruction";
> >> +
> >> +     case T_VCEI:
> >> +             return "virtual coherency instruction";
> >> +
> >> +     case T_FPE:
> >> +             return "floating point";
> >> +
> >> +     case T_IWATCH:
> >> +             return "iwatch";
> >> +
> >> +     case T_DWATCH:
> >> +             return "dwatch";
> >> +
> >> +     case T_VCED:
> >> +             return "virtual coherency data";
> >> +     }
> >> +
> >> +     return "unknown exception";
> >> +}
> >> +
> >> +void barebox_exc_handler(void *regs)
> >> +{
> >> +     printf("\nOoops, %s!\n", get_exc_name(read_c0_cause()));
> >> +     printf("EPC = 0x%08x\n", read_c0_epc());
> >> +     printf("CP0_STATUS = 0x%08x\n", read_c0_status());
> >> +     printf("CP0_CAUSE = 0x%08x\n", read_c0_cause());
> >> +     printf("CP0_CONFIG = 0x%08x\n\n", read_c0_config());
> >> +
> >> +     hang();
> >> +}
> >> --
> >> 1.7.10
> >>
> >>
> >> _______________________________________________
> >> barebox mailing list
> >> barebox at lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/barebox
> >>
> >
> > --
> > Pengutronix e.K.                           |                             |
> > Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> > Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
> 
> 
> 
> -- 
> Best regards,
>   Antony Pavlov
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 27 04:14:14 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 10:14:14 +0200
Subject: [PATCH RFC] arm/imx: provide command to add ram device with
 autodetected size
In-Reply-To: <1343296420-25857-1-git-send-email-u.kleine-koenig@pengutronix.de>
References: <1343296420-25857-1-git-send-email-u.kleine-koenig@pengutronix.de>
Message-ID: <20120727081414.GX30009@pengutronix.de>

On Thu, Jul 26, 2012 at 11:53:40AM +0200, Uwe Kleine-K?nig wrote:
> The amount of available ram is determined by the ESDCTL register, so
> better don't hardcode the value.
> 
> This commit provides a command that can be used instead of
> arm_add_mem_device and convertes pcm043 (on which this patch was tested)
> to it.
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
> Hello,
> 
> maybe better move the new function into a new file
> arch/arm/mach-imx/esdctl.c and the prototype into <mach/esdctl.h>?
> 
> Also imx_add_ram1() is still missing. I will implement that when we
> agree the patch's idea is useful.

I agree it's useful

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 27 04:28:20 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 10:28:20 +0200
Subject: [PATCH] lib/Kconfig: Fix alignment of arrows in label
In-Reply-To: <1342963280-4297-1-git-send-email-bernhard@bwalle.de>
References: <1342963280-4297-1-git-send-email-bernhard@bwalle.de>
Message-ID: <20120727082820.GA30009@pengutronix.de>

On Sun, Jul 22, 2012 at 03:21:20PM +0200, Bernhard Walle wrote:
> Signed-off-by: Bernhard Walle <bernhard at bwalle.de>

Applied, thanks

Sascha

> ---
>  lib/Kconfig |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/Kconfig b/lib/Kconfig
> index 3bcde5c..32634df 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -1,4 +1,4 @@
> -menu "Library routines"
> +menu "Library routines              "
>  config PARAMETER
>  	bool
>  
> -- 
> 1.7.9.5
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 27 04:30:58 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 10:30:58 +0200
Subject: [PATCH] Add /dev/urandom device.
In-Reply-To: <1342686830-30950-1-git-send-email-J.Kilb@phytec.de>
References: <1342686830-30950-1-git-send-email-J.Kilb@phytec.de>
Message-ID: <20120727083058.GB30009@pengutronix.de>

On Thu, Jul 19, 2012 at 10:33:49AM +0200, Juergen Kilb wrote:
> Nice for testing purposes.

Can we have an extra file with an extra config option for this? I agree
this is nice for debugging, but no need to bloat every build with it.

Sascha

> 
> Signed-off-by: Juergen Kilb <J.Kilb at phytec.de>
> ---
>  commands/stddev.c |   39 +++++++++++++++++++++++++++++++++++++++
>  1 files changed, 39 insertions(+), 0 deletions(-)
> 
> diff --git a/commands/stddev.c b/commands/stddev.c
> index 098aea8..b807df6 100644
> --- a/commands/stddev.c
> +++ b/commands/stddev.c
> @@ -20,7 +20,9 @@
>   */
>  
>  #include <common.h>
> +#include <clock.h>
>  #include <init.h>
> +#include <stdlib.h>
>  
>  static ssize_t zero_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, ulong flags)
>  {
> @@ -104,3 +106,40 @@ static int null_init(void)
>  }
>  
>  device_initcall(null_init);
> +
> +static ssize_t urandom_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, ulong flags)
> +{
> +	size_t i;
> +	unsigned int *buffer;
> +
> +	buffer = (unsigned int *) buf;
> +
> +	for (i = 0; i < (count / sizeof(size_t)); i++)
> +		buffer[i] = rand() | rand() << 16;
> +
> +	return count;
> +}
> +
> +static struct file_operations urandomops = {
> +	.read  = urandom_read,
> +	.lseek = dev_lseek_default,
> +};
> +
> +static int urandom_init(void)
> +{
> +	struct cdev *cdev;
> +
> +	cdev = xzalloc(sizeof(*cdev));
> +
> +	cdev->name = "urandom";
> +	cdev->size = ~0;
> +	cdev->ops = &urandomops;
> +
> +	devfs_create(cdev);
> +
> +	srand(get_time_ns());
> +
> +	return 0;
> +}
> +
> +device_initcall(urandom_init);
> -- 
> 1.7.0.4
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Fri Jul 27 04:31:53 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 27 Jul 2012 10:31:53 +0200
Subject: RFC: How to setup and handle NAND flashes in Barebox
In-Reply-To: <20120727075333.GV30009@pengutronix.de>
References: <002601cd6b08$37498d50$a5dca7f0$@cpdesign.com.au>
 <1440381.IzydBDPxna@dev1> <20120727075333.GV30009@pengutronix.de>
Message-ID: <201207271031.53984.jbe@pengutronix.de>

Sascha Hauer wrote:
> On Fri, Jul 27, 2012 at 11:24:48AM +1000, Marc Reilly wrote:
> > Thanks for your ideas.
> >
> > I managed to clear the BBT, it was a bit of a hack... the saga is below
> > for anyone who runs into similar problem.
> >
> > On Thursday, July 26, 2012 11:27:48 AM Juergen Beisert wrote:
> > > The flash blocks which contains the "bad block table" are protected by
> > > the "bad block table" aware MTD layer.
> > >
> > > So, the ugly way: run a bootloader which does not use the in-flash bad
> > > block table. Then the tables are regular blocks in the flash and can be
> > > erased. After that run again the bad block table aware bootloader and
> > > it will re-create the in-flash table. But be careful: In this case the
> > > generic functions scans all blocks in the NAND to collect the bad block
> > > markers in each NAND block's OOB. If this information is already
> > > destroyed somehow, this solution does not help.
> >
> > Recompiling barebox with bbt support disabled stopped the all the bad
> > block messages, however erasing the nand didn't clear the BBT for
> > subsequent reboots...
> > The issue was that the erase commands and functions skip erasing bad
> > blocks, and the blocks that held the actual BBT were being considered
> > bad, so they weren't getting erased. After commenting out calls to
> > nand_block_checkbad() in nand_write.c and block_isbad() in
> > mtd_erase()/core.c I was able to manually erase the blocks. (erasing
> > actual bad blocks results in I/O error) Next restart of barebox the BBT
> > was regenerated with the two actual bad blocks.
> >
> > After all that, I noticed imx_low_erase() in nand_imx.c. Probably would
> > have been easier to make up a command around that.
>
> This problem comes up regularly. I remember Wolfram implemented a nand
> 'scrub' command. He was working on i.MX28. I don't know wether his
> command was i.MX28 specific, but it would be nice to have such a command
> around.

Just an idea:

I think we need something like a "NAND handling environment". For example the 
MTD generates a in-flash bad block table without any interaction. That might 
be a nice feature, but only when:

 - the factory bad block markers are still intact
 - the regular NAND driver can read the factory bad block markers (the i.MX
   driver for example cannot)
 - the flash is more or less untouched yet

Whenever one of these dependencies are not valid (anymore), we are in trouble 
with automatically generation of the in-flash bad block table.
Use cases are for example: general development on NAND drivers, a Linux driver 
that crashes the NAND somehow or a different bootloader/operation system that 
uses its own ways to handle and mark bad blocks.
For these use-cases we need a different approach: something we can do 
manually.

 - a 'test' command that checks if the factory bad block markers seems still
   intact (or not). This command should have some parameters where you can
   describe the expected OOB layout to be able to check for various ways to
   mark bad blocks
 - a 'list' command which lists all the currently known bad blocks (from
   whatever source, in-flash or in-ram BBT or freshly read from the OOB area)
   This list could be stored somewhere (like the "bad sector table" in the
   early days of hard disks). At least this would help later on to still use a
   NAND memory where all the OOB based bad block markers are lost. For example
   with my S3C6410 CPU the internal ROM routines force me to write the
   checksums into a position in the OOB where most of the manufacturers 
   stores the factory bad block info. So, there is no simple way later
   on to distinguish checksums from bad block markers.
 - a 'create' command for the in-flash BBT. This command can use the the
   result of the 'list' command or should accept a list of *known' bad blocks
   manually entered

With these tools we could instruct Barebox to use an in-flash BBT only if it 
already exists. If not, it should fall back to OOB scan, and should not write 
an in-flash BBT with the collected information.
A user then can run the various tools to get an idea if the NAND is intact (or 
not) and the 'create' command would then write a correct in-flash BBT (with 
the help of the other collecting commands) to be used by Barebox itself and 
Linux. 

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |



From u.kleine-koenig at pengutronix.de  Fri Jul 27 04:41:24 2012
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Fri, 27 Jul 2012 10:41:24 +0200
Subject: [PATCH] ARM/imx/pcm043: increase size of "self" partition
Message-ID: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>

A barebox image generated from pcm043_defconfig doesn't fit into the
0x40000 byte sized self partition as of

	v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for find_cmd)

.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 arch/arm/boards/pcm043/pcm043.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
index b1bf8ef..7ccd973 100644
--- a/arch/arm/boards/pcm043/pcm043.c
+++ b/arch/arm/boards/pcm043/pcm043.c
@@ -153,15 +153,15 @@ static int imx35_devices_init(void)
 	if ((reg & 0xc00) == 0x800) {   /* reset mode: external boot */
 		switch ( (reg >> 25) & 0x3) {
 		case 0x01:              /* NAND is the source */
-			devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
+			devfs_add_partition("nand0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self_raw");
 			dev_add_bb_dev("self_raw", "self0");
-			devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
+			devfs_add_partition("nand0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
 			dev_add_bb_dev("env_raw", "env0");
 			break;
 
 		case 0x00:              /* NOR is the source */
-			devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
-			devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
+			devfs_add_partition("nor0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
+			devfs_add_partition("nor0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
 			protect_file("/dev/env0", 1);
 			break;
 		}
-- 
1.7.10.4



From s.hauer at pengutronix.de  Fri Jul 27 05:26:21 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 11:26:21 +0200
Subject: [PATCH] ARM/imx/pcm043: increase size of "self" partition
In-Reply-To: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>
References: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>
Message-ID: <20120727092621.GC30009@pengutronix.de>

On Fri, Jul 27, 2012 at 10:41:24AM +0200, Uwe Kleine-K?nig wrote:
> A barebox image generated from pcm043_defconfig doesn't fit into the
> 0x40000 byte sized self partition as of
> 
> 	v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for find_cmd)

You also must adjust the size in the defconfig.

Sascha

> 
> .
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
>  arch/arm/boards/pcm043/pcm043.c |    8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
> index b1bf8ef..7ccd973 100644
> --- a/arch/arm/boards/pcm043/pcm043.c
> +++ b/arch/arm/boards/pcm043/pcm043.c
> @@ -153,15 +153,15 @@ static int imx35_devices_init(void)
>  	if ((reg & 0xc00) == 0x800) {   /* reset mode: external boot */
>  		switch ( (reg >> 25) & 0x3) {
>  		case 0x01:              /* NAND is the source */
> -			devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
> +			devfs_add_partition("nand0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self_raw");
>  			dev_add_bb_dev("self_raw", "self0");
> -			devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
> +			devfs_add_partition("nand0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
>  			dev_add_bb_dev("env_raw", "env0");
>  			break;
>  
>  		case 0x00:              /* NOR is the source */
> -			devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> -			devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
> +			devfs_add_partition("nor0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> +			devfs_add_partition("nor0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
>  			protect_file("/dev/env0", 1);
>  			break;
>  		}
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From J.Weitzel at phytec.de  Fri Jul 27 07:03:30 2012
From: J.Weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 13:03:30 +0200
Subject: [PATCH] ARM/imx/pcm043: increase size of "self" partition
In-Reply-To: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>
References: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>
Message-ID: <1343387010.3793.8.camel@lws-weitzel>

Am Freitag, den 27.07.2012, 10:41 +0200 schrieb Uwe Kleine-K?nig:
> A barebox image generated from pcm043_defconfig doesn't fit into the
> 0x40000 byte sized self partition as of
> 
> 	v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for find_cmd)
> 
> .
> 
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> ---
>  arch/arm/boards/pcm043/pcm043.c |    8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
> index b1bf8ef..7ccd973 100644
> --- a/arch/arm/boards/pcm043/pcm043.c
> +++ b/arch/arm/boards/pcm043/pcm043.c
> @@ -153,15 +153,15 @@ static int imx35_devices_init(void)
>  	if ((reg & 0xc00) == 0x800) {   /* reset mode: external boot */
>  		switch ( (reg >> 25) & 0x3) {
>  		case 0x01:              /* NAND is the source */
> -			devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
> +			devfs_add_partition("nand0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self_raw");
What do you think about SZ_128K + SZ_256K ? Maybe SZ_512K is even
better.
Jan
>  			dev_add_bb_dev("self_raw", "self0");
> -			devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
> +			devfs_add_partition("nand0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
>  			dev_add_bb_dev("env_raw", "env0");
>  			break;
>  
>  		case 0x00:              /* NOR is the source */
> -			devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> -			devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
> +			devfs_add_partition("nor0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> +			devfs_add_partition("nor0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
>  			protect_file("/dev/env0", 1);
>  			break;
>  		}




From j.weitzel at phytec.de  Fri Jul 27 07:09:07 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 13:09:07 +0200
Subject: [PATCH] omap: use 512k barebox partition
Message-ID: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>

Use 512k NAND Partion for barebox. Problem is we don't know the size of the
barebox inside xload. Set it also to 512k
Fix enviroment for boards with size in config

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/boards/pcm049/board.c            |    7 +++++--
 arch/arm/boards/pcm049/env/config         |    2 +-
 arch/arm/boards/phycard-a-l1/env/config   |    2 +-
 arch/arm/boards/phycard-a-l1/pca-a-l1.c   |    9 ++++++---
 arch/arm/boards/phycard-a-xl2/env/config  |    2 +-
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |    4 ++--
 arch/arm/mach-omap/xload.c                |    2 +-
 7 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 5b7854a..d7b79c1 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -113,9 +113,12 @@ static int pcm049_devices_init(void)
 #ifdef CONFIG_PARTITION
 	devfs_add_partition("nand0", 0x00000, SZ_128K, DEVFS_PARTITION_FIXED, "xload_raw");
 	dev_add_bb_dev("xload_raw", "xload");
-	devfs_add_partition("nand0", SZ_128K, SZ_256K, DEVFS_PARTITION_FIXED, "self_raw");
+	devfs_add_partition("nand0", SZ_128K, SZ_512K,
+			DEVFS_PARTITION_FIXED, "self_raw");
 	dev_add_bb_dev("self_raw", "self0");
-	devfs_add_partition("nand0", SZ_128K + SZ_256K, SZ_128K, DEVFS_PARTITION_FIXED, "env_raw");
+	devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
+			DEVFS_PARTITION_FIXED, "env_raw");
+
 	dev_add_bb_dev("env_raw", "env0");
 #endif
 
diff --git a/arch/arm/boards/pcm049/env/config b/arch/arm/boards/pcm049/env/config
index efbe9ea..70e374f 100644
--- a/arch/arm/boards/pcm049/env/config
+++ b/arch/arm/boards/pcm049/env/config
@@ -40,7 +40,7 @@ autoboot_timeout=3
 
 bootargs="console=ttyO2,115200"
 
-nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),2M(kernel),-(root)"
+nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
 rootfs_mtdblock_nand=4
 
 # set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-l1/env/config b/arch/arm/boards/phycard-a-l1/env/config
index e0f4dcc..5bc48d7 100644
--- a/arch/arm/boards/phycard-a-l1/env/config
+++ b/arch/arm/boards/phycard-a-l1/env/config
@@ -70,7 +70,7 @@ bootargs="$bootargs omapdss.def_disp=pd050vl1"
 #bootargs="$bootargs omapdss.def_disp=pd104slf"
 #bootargs="$bootargs omapdss.def_disp=pm070wl4"
 
-nand_parts="512k(x-loader)ro,1920k(barebox),128k(bareboxenv),4M(kernel),-(root)"
+nand_parts="128k(x-loader)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
 nand_device=omap2-nand.0
 rootfs_mtdblock_nand=4
 
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 1cc2815..3d3596a 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -336,13 +336,16 @@ static int pcaal1_late_init(void)
 
 	nand = get_device_by_name("nand0");
 
-	devfs_add_partition("nand0", 0x00000, 0x80000, DEVFS_PARTITION_FIXED, "x-loader");
+	devfs_add_partition("nand0", 0x00000, SZ_128K,
+			DEVFS_PARTITION_FIXED, "x-loader");
 	dev_add_bb_dev("self_raw", "x_loader0");
 
-	devfs_add_partition("nand0", 0x80000, 0x1e0000, DEVFS_PARTITION_FIXED, "self_raw");
+	devfs_add_partition("nand0", SZ_128K, SZ_512K,
+			DEVFS_PARTITION_FIXED, "self_raw");
 	dev_add_bb_dev("self_raw", "self0");
 
-	devfs_add_partition("nand0", 0x260000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
+	devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
+			DEVFS_PARTITION_FIXED, "env_raw");
 	dev_add_bb_dev("env_raw", "env0");
 
 	return 0;
diff --git a/arch/arm/boards/phycard-a-xl2/env/config b/arch/arm/boards/phycard-a-xl2/env/config
index 59e8eb3..44a4181 100644
--- a/arch/arm/boards/phycard-a-xl2/env/config
+++ b/arch/arm/boards/phycard-a-xl2/env/config
@@ -39,7 +39,7 @@ autoboot_timeout=3
 
 bootargs="console=ttyO2,115200"
 
-nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),4M(kernel),-(root)"
+nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
 rootfs_mtdblock_nand=4
 
 # set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
index 128cb8f..54b4ada 100644
--- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
+++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
@@ -131,10 +131,10 @@ static int pcaaxl2_devices_init(void)
 	devfs_add_partition("nand0", 0x00000, SZ_128K,
 			DEVFS_PARTITION_FIXED, "xload_raw");
 	dev_add_bb_dev("xload_raw", "xload");
-	devfs_add_partition("nand0", SZ_128K, SZ_256K,
+	devfs_add_partition("nand0", SZ_128K, SZ_512K,
 			DEVFS_PARTITION_FIXED, "self_raw");
 	dev_add_bb_dev("self_raw", "self0");
-	devfs_add_partition("nand0", SZ_128K + SZ_256K, SZ_128K,
+	devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
 			DEVFS_PARTITION_FIXED, "env_raw");
 	dev_add_bb_dev("env_raw", "env0");
 #endif
diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
index 13024ab..a58d0a3 100644
--- a/arch/arm/mach-omap/xload.c
+++ b/arch/arm/mach-omap/xload.c
@@ -80,7 +80,7 @@ int run_shell(void)
 		printf("unknown boot source. Fall back to nand\n");
 	case OMAP_BOOTSRC_NAND:
 		printf("booting from NAND\n");
-		func = omap_xload_boot_nand(SZ_128K, SZ_256K);
+		func = omap_xload_boot_nand(SZ_128K, SZ_512K);
 		break;
 	}
 
-- 
1.7.0.4



From franck.jullien at gmail.com  Fri Jul 27 07:33:31 2012
From: franck.jullien at gmail.com (Franck Jullien)
Date: Fri, 27 Jul 2012 13:33:31 +0200
Subject: nor flash board init code
In-Reply-To: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
Message-ID: <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>

2012/7/25 <christian.buettner at rafi.de>
>
> hi all,
> is there any example board init code to load the mx25l8005 spi nor-flash through the imx53 (TX53 from KARO)?
> I want to use the m25p80 driver to read and write.
>
> christian
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>

Hi Christian,

This is what I use with the Altera SPI controller + an SPI flash device:

http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153

static struct spi_altera_master altera_spi_0_data = {
      .num_chipselect = 1,
      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
      .databits = 8,      /* Data length of the EPCS flash controller */
      .speed = 20000000,  /* EPCS flash controller speed */
};


static struct flash_platform_data epcs_flash = {
      .name = "epcs",    /* Cdev name, optional */
      .type = "m25p40",  /* Device type, required for non JEDEC chips */
};

static struct spi_board_info generic_spi_board_info[] = {
      {
            .name = "m25p",
            .max_speed_hz = 20000000,
            .bus_num = 0,
            .chip_select = 0,
            .bits_per_word = 8,
            .mode = SPI_MODE_0,
            .platform_data = &epcs_flash,
      }
};

static int myboard_devices_init(void) {

...

spi_register_board_info(myboard_spi_board_info,
ARRAY_SIZE(myboard_spi_board_info));

add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
                    IORESOURCE_MEM, &altera_spi_0_data);

...

Franck.


From j.weitzel at phytec.de  Fri Jul 27 09:40:01 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 15:40:01 +0200
Subject: [PATCH 0/3] omap: 4460 support
Message-ID: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>

Add support for OMAP4460 cpu
on top off 7b0de0e6 (next)

Jan Weitzel (3):
  Add support for OMAP4460 TPS62361
  OMAP4460: ram init changes
  OMAP4460: clock init

 arch/arm/boards/panda/lowlevel.c                |    4 +-
 arch/arm/boards/panda/mux.c                     |    8 +++
 arch/arm/boards/pcm049/lowlevel.c               |   15 ++++--
 arch/arm/boards/pcm049/mux.c                    |    8 +++
 arch/arm/boards/phycard-a-xl2/lowlevel.c        |    9 +++-
 arch/arm/boards/phycard-a-xl2/mux.c             |    8 +++
 arch/arm/mach-omap/include/mach/omap4-clock.h   |   19 +++++++
 arch/arm/mach-omap/include/mach/omap4-silicon.h |   13 +++++-
 arch/arm/mach-omap/omap4_clock.c                |   58 +++++++++++++++++-----
 arch/arm/mach-omap/omap4_generic.c              |   60 +++++++++++++++++++++--
 10 files changed, 178 insertions(+), 24 deletions(-)



From j.weitzel at phytec.de  Fri Jul 27 09:40:03 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 15:40:03 +0200
Subject: [PATCH 2/3] OMAP4460: ram init changes
In-Reply-To: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
References: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1343396404-10288-3-git-send-email-j.weitzel@phytec.de>

configure  Memory Adapter for 4460

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/mach-omap/include/mach/omap4-silicon.h |    4 ++++
 arch/arm/mach-omap/omap4_generic.c              |   21 +++++++++++++++++++--
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index d5517c5..4082bac 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -101,6 +101,10 @@
 #define DMM_LISA_MAP_SYS_SIZE_MASK	(7 << 20)
 #define DMM_LISA_MAP_SYS_SIZE_SHIFT	20
 #define DMM_LISA_MAP_SYS_ADDR_MASK	(0xFF << 24)
+
+/* Memory Adapter (4460 onwards) */
+#define OMAP44XX_MA_BASE		0x482AF000
+
 /*
  * Hardware Register Details
  */
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index 07aa2b4..a368759 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -29,6 +29,10 @@
 #define OMAP4460_CONTROL_ID_CODE_ES1_0  0x0B94E02F
 #define OMAP4460_CONTROL_ID_CODE_ES1_1  0x2B94E02F
 
+/* EMIF_L3_CONFIG register value */
+#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0		0x0A0000FF
+#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0	0x0A300000
+
 void __noreturn reset_cpu(unsigned long addr)
 {
 	writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
@@ -270,8 +274,7 @@ static void reset_phy(unsigned int base)
 void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 		const struct dpll_param *core)
 {
-	unsigned int rev;
-	rev = omap4_revision();
+	unsigned int rev = omap4_revision();
 
 	if (rev == OMAP4430_ES2_0) {
 		writel(0x9e9e9e9e, 0x4A100638);
@@ -294,6 +297,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x00000000;
 	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
 
+	if (rev >= OMAP4460_ES1_0) {
+		writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
+
+		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 0x00000000;
+		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) = 0xFF020100;
+	}
+
 	/* DDR needs to be initialised @ 19.2 MHz
 	 * So put core DPLL in bypass mode
 	 * Configure the Core DPLL but don't lock it
@@ -336,6 +346,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 	*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x80000000;
 	*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x80000000;
 
+	if (rev >= OMAP4460_ES1_0) {
+		writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
+				OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
+		writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
+				OMAP44XX_EMIF2_BASE + EMIF_L3_CONFIG);
+	}
+
 	/*
 	 * DMM : DMM_LISA_MAP_0(Section_0)
 	 * [31:24] SYS_ADDR 		0x80
-- 
1.7.0.4



From j.weitzel at phytec.de  Fri Jul 27 09:40:04 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 15:40:04 +0200
Subject: [PATCH 3/3] OMAP4460: clock init
In-Reply-To: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
References: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1343396404-10288-4-git-send-email-j.weitzel@phytec.de>

Change clock init to allow early gpio access. Add support for 4460 clocks.

Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/boards/panda/lowlevel.c              |    4 ++-
 arch/arm/boards/panda/mux.c                   |    8 +++++
 arch/arm/boards/pcm049/lowlevel.c             |   15 +++++++--
 arch/arm/boards/pcm049/mux.c                  |    8 +++++
 arch/arm/boards/phycard-a-xl2/lowlevel.c      |    9 ++++-
 arch/arm/boards/phycard-a-xl2/mux.c           |    8 +++++
 arch/arm/mach-omap/include/mach/omap4-clock.h |    4 ++
 arch/arm/mach-omap/omap4_clock.c              |   39 +++++++++++++++++-------
 8 files changed, 76 insertions(+), 19 deletions(-)

diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
index 8591fff..0b4b199 100644
--- a/arch/arm/boards/panda/lowlevel.c
+++ b/arch/arm/boards/panda/lowlevel.c
@@ -28,6 +28,8 @@
 #include <mach/syslib.h>
 #include <asm/barebox-arm.h>
 
+#define TPS62361_VSEL0_GPIO    7
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_400_mhz_2cs = {
@@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
 	omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
 
 	/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-	omap4_scale_vcores();
+	omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
 	board_init_lowlevel_return();
 }
diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
index 310e433..3783006 100644
--- a/arch/arm/boards/panda/mux.c
+++ b/arch/arm/boards/panda/mux.c
@@ -3,6 +3,7 @@
 #include <io.h>
 #include <mach/omap4-silicon.h>
 #include <mach/omap4-mux.h>
+#include <mach/omap4-clock.h>
 
 static const struct pad_conf_entry core_padconf_array[] = {
 	{ GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1  /* sdmmc2_dat0 */ },
@@ -245,4 +246,11 @@ void set_muxconf_regs(void)
 
 	omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
 			ARRAY_SIZE(wkup_padconf_array));
+
+	/* gpio_wk7 is used for controlling TPS on 4460 */
+	if (omap4_revision() >= OMAP4460_ES1_0) {
+		writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+		/* Enable GPIO-1 clocks before TPS initialization */
+		omap4_enable_gpio1_wup_clocks();
+	}
 }
diff --git a/arch/arm/boards/pcm049/lowlevel.c b/arch/arm/boards/pcm049/lowlevel.c
index 5b91098..65a29ec 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -28,6 +28,8 @@
 #include <mach/syslib.h>
 #include <asm/barebox-arm.h>
 
+#define TPS62361_VSEL0_GPIO    182
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -46,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
 static void noinline pcm049_init_lowlevel(void)
 {
 	struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-	struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
 	struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
 	struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
 	struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -57,12 +60,16 @@ static void noinline pcm049_init_lowlevel(void)
 	omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core);
 
 	/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-	omap4_scale_vcores();
+	omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
 	writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
 	/* Configure all DPLL's at 100% OPP */
-	omap4_configure_mpu_dpll(&mpu);
+	if (omap4_revision() < OMAP4460_ES1_0)
+		omap4_configure_mpu_dpll(&mpu44xx);
+	else
+		omap4_configure_mpu_dpll(&mpu4460);
+
 	omap4_configure_iva_dpll(&iva);
 	omap4_configure_per_dpll(&per);
 	omap4_configure_abe_dpll(&abe);
@@ -88,7 +95,7 @@ void board_init_lowlevel(void)
 		return;
 
 	r = 0x4030d000;
-        __asm__ __volatile__("mov sp, %0" : : "r"(r));
+	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
 	pcm049_init_lowlevel();
 }
diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c
index a7a77b5..04e1d67 100644
--- a/arch/arm/boards/pcm049/mux.c
+++ b/arch/arm/boards/pcm049/mux.c
@@ -3,6 +3,7 @@
 #include <io.h>
 #include <mach/omap4-silicon.h>
 #include <mach/omap4-mux.h>
+#include <mach/omap4-clock.h>
 
 static const struct pad_conf_entry core_padconf_array[] = {
 	{GPMC_AD0, (IEN | PTD | DIS | M0)},				/* gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
 
 	omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
 			ARRAY_SIZE(wkup_padconf_array));
+
+	/* gpio_182 is used for controlling TPS on 4460 */
+	if (omap4_revision() >= OMAP4460_ES1_0) {
+		writew(M3, OMAP44XX_CONTROL_PADCONF_CORE + FREF_CLK2_OUT);
+		/* Enable GPIO-1 clocks before TPS initialization */
+		omap4_enable_gpio_clocks();
+	}
 }
diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c b/arch/arm/boards/phycard-a-xl2/lowlevel.c
index b8de2aa..fc599d8 100644
--- a/arch/arm/boards/phycard-a-xl2/lowlevel.c
+++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c
@@ -46,7 +46,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
 static noinline void pcaaxl2_init_lowlevel(void)
 {
 	struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-	struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
 	struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
 	struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
 	struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -62,7 +63,11 @@ static noinline void pcaaxl2_init_lowlevel(void)
 	writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
 	/* Configure all DPLL's at 100% OPP */
-	omap4_configure_mpu_dpll(&mpu);
+	if (omap4_revision() < OMAP4460_ES1_0)
+		omap4_configure_mpu_dpll(&mpu44xx);
+	else
+		omap4_configure_mpu_dpll(&mpu4460);
+
 	omap4_configure_iva_dpll(&iva);
 	omap4_configure_per_dpll(&per);
 	omap4_configure_abe_dpll(&abe);
diff --git a/arch/arm/boards/phycard-a-xl2/mux.c b/arch/arm/boards/phycard-a-xl2/mux.c
index 179e6b6..dc605e3 100644
--- a/arch/arm/boards/phycard-a-xl2/mux.c
+++ b/arch/arm/boards/phycard-a-xl2/mux.c
@@ -3,6 +3,7 @@
 #include <io.h>
 #include <mach/omap4-silicon.h>
 #include <mach/omap4-mux.h>
+#include <mach/omap4-clock.h>
 
 static const struct pad_conf_entry core_padconf_array[] = {
 	{GPMC_AD0, (IEN | PTD | DIS | M0)},				/* gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
 
 	omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
 			ARRAY_SIZE(wkup_padconf_array));
+
+	/* gpio_wk7 is used for controlling TPS on 4460 */
+	if (omap4_revision() >= OMAP4460_ES1_0) {
+		writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+		/* Enable GPIO-1 clocks before TPS initialization */
+		omap4_enable_gpio1_wup_clocks();
+	}
 }
diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h b/arch/arm/mach-omap/include/mach/omap4-clock.h
index 391ee63..e5302d6 100644
--- a/arch/arm/mach-omap/include/mach/omap4-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
@@ -303,6 +303,8 @@ struct dpll_param {
 #define OMAP4_MPU_DPLL_PARAM_38M4		{0x1a, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00}
 #define OMAP4_MPU_DPLL_PARAM_38M4_MPU600	{0x7d, 0x07, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00}
 #define OMAP4_MPU_DPLL_PARAM_38M4_MPU1000	{0x69, 0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00}
+/* dpll locked at 1840 MHz MPU clk at 920 MHz(OPP Turbo 4460) - DCC OFF */
+#define OMAP4_MPU_DPLL_PARAM_19M2_MPU920	{0x23F, 0x11, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00}
 
 #define OMAP4_IVA_DPLL_PARAM_19M2		{0x61, 0x01, 0x00, 0x00, 0x04, 0x07, 0x00, 0x00}
 #define OMAP4_IVA_DPLL_PARAM_38M4		{0x61, 0x03, 0x00, 0x00, 0x04, 0x07, 0x00, 0x00}
@@ -330,6 +332,8 @@ void omap4_configure_usb_dpll(const struct dpll_param *dpll_param);
 void omap4_configure_core_dpll_no_lock(const struct dpll_param *param);
 void omap4_lock_core_dpll(void);
 void omap4_lock_core_dpll_shadow(const struct dpll_param *param);
+void omap4_enable_gpio1_wup_clocks(void);
+void omap4_enable_gpio_clocks(void);
 void omap4_enable_all_clocks(void);
 void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
 
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 564a748..1481f16 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -14,6 +14,10 @@ void omap4_configure_mpu_dpll(const struct dpll_param *dpll_param)
 
 	sr32(CM_AUTOIDLE_DPLL_MPU, 0, 3, 0x0); /* Disable DPLL autoidle */
 
+	/* Errata ID: i700, clear CM_CLKSEL_DPLL_MPU[22] : DCC_EN */
+	if (omap4_revision() >= OMAP4460_ES1_0)
+		sr32(CM_CLKSEL_DPLL_MPU, 0, 22, 0);
+
 	/* Set M,N,M2 values */
 	sr32(CM_CLKSEL_DPLL_MPU, 8, 11, dpll_param->m);
 	sr32(CM_CLKSEL_DPLL_MPU, 0, 6, dpll_param->n);
@@ -198,6 +202,27 @@ void omap4_lock_core_dpll_shadow(const struct dpll_param *param)
 	wait_on_value((1 << 0), 1, CM_IDLEST_DPLL_CORE, LDELAY);
 }
 
+void omap4_enable_gpio_clocks(void)
+{
+	sr32(CM_L4PER_GPIO2_CLKCTRL, 0, 32, 0x1);
+	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO2_CLKCTRL, LDELAY);
+	sr32(CM_L4PER_GPIO3_CLKCTRL, 0, 32, 0x1);
+	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO3_CLKCTRL, LDELAY);
+	sr32(CM_L4PER_GPIO4_CLKCTRL, 0, 32, 0x1);
+	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO4_CLKCTRL, LDELAY);
+	sr32(CM_L4PER_GPIO5_CLKCTRL, 0, 32, 0x1);
+	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO5_CLKCTRL, LDELAY);
+	sr32(CM_L4PER_GPIO6_CLKCTRL, 0, 32, 0x1);
+	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO6_CLKCTRL, LDELAY);
+}
+
+void omap4_enable_gpio1_wup_clocks(void)
+{
+	/* WKUP clocks */
+	sr32(CM_WKUP_GPIO1_CLKCTRL, 0, 32, 0x1);
+	wait_on_value((1 << 17)|(1 << 16), 0, CM_WKUP_GPIO1_CLKCTRL, LDELAY);
+}
+
 void omap4_enable_all_clocks(void)
 {
 	/* Enable Ducati clocks */
@@ -255,16 +280,7 @@ void omap4_enable_all_clocks(void)
 	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_DMTIMER9_CLKCTRL, LDELAY);
 
 	/* GPIO clocks */
-	sr32(CM_L4PER_GPIO2_CLKCTRL, 0, 32, 0x1);
-	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO2_CLKCTRL, LDELAY);
-	sr32(CM_L4PER_GPIO3_CLKCTRL, 0, 32, 0x1);
-	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO3_CLKCTRL, LDELAY);
-	sr32(CM_L4PER_GPIO4_CLKCTRL, 0, 32, 0x1);
-	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO4_CLKCTRL, LDELAY);
-	sr32(CM_L4PER_GPIO5_CLKCTRL, 0, 32, 0x1);
-	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO5_CLKCTRL, LDELAY);
-	sr32(CM_L4PER_GPIO6_CLKCTRL, 0, 32, 0x1);
-	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO6_CLKCTRL, LDELAY);
+	omap4_enable_gpio_clocks();
 
 	sr32(CM_L4PER_HDQ1W_CLKCTRL, 0, 32, 0x2);
 
@@ -314,8 +330,7 @@ void omap4_enable_all_clocks(void)
 	wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_UART4_CLKCTRL, LDELAY);
 
 	/* WKUP clocks */
-	sr32(CM_WKUP_GPIO1_CLKCTRL, 0, 32, 0x1);
-	wait_on_value((1 << 17)|(1 << 16), 0, CM_WKUP_GPIO1_CLKCTRL, LDELAY);
+	omap4_enable_gpio1_wup_clocks();
 	sr32(CM_WKUP_TIMER1_CLKCTRL, 0, 32, 0x01000002);
 	wait_on_value((1 << 17)|(1 << 16), 0, CM_WKUP_TIMER1_CLKCTRL, LDELAY);
 
-- 
1.7.0.4



From j.weitzel at phytec.de  Fri Jul 27 09:40:02 2012
From: j.weitzel at phytec.de (Jan Weitzel)
Date: Fri, 27 Jul 2012 15:40:02 +0200
Subject: [PATCH 1/3] Add support for OMAP4460 TPS62361
In-Reply-To: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
References: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <1343396404-10288-2-git-send-email-j.weitzel@phytec.de>

based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: F. Gasnier fabrice.gasnier at cenosys.com
Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
---
 arch/arm/mach-omap/include/mach/omap4-clock.h   |   15 +++++++++
 arch/arm/mach-omap/include/mach/omap4-silicon.h |    9 +++++-
 arch/arm/mach-omap/omap4_clock.c                |   19 +++++++++++
 arch/arm/mach-omap/omap4_generic.c              |   39 +++++++++++++++++++++-
 4 files changed, 79 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h b/arch/arm/mach-omap/include/mach/omap4-clock.h
index 0a31d09..391ee63 100644
--- a/arch/arm/mach-omap/include/mach/omap4-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
@@ -271,6 +271,20 @@
 #define PLL_FAST_RELOCK_BYPASS	6 /* CORE */
 #define PLL_LOCK		7 /* MPU, IVA, CORE & PER */
 
+/* TPS */
+#define TPS62361_I2C_SLAVE_ADDR		0x60
+#define TPS62361_REG_ADDR_SET0		0x0
+#define TPS62361_REG_ADDR_SET1		0x1
+#define TPS62361_REG_ADDR_SET2		0x2
+#define TPS62361_REG_ADDR_SET3		0x3
+#define TPS62361_REG_ADDR_CTRL		0x4
+#define TPS62361_REG_ADDR_TEMP		0x5
+#define TPS62361_REG_ADDR_RMP_CTRL	0x6
+#define TPS62361_REG_ADDR_CHIP_ID	0x8
+#define TPS62361_REG_ADDR_CHIP_ID_2	0x9
+
+#define TPS62361_BASE_VOLT_MV	500
+
 /* Used to index into DPLL parameter tables */
 struct dpll_param {
 	unsigned int m;
@@ -317,4 +331,5 @@ void omap4_configure_core_dpll_no_lock(const struct dpll_param *param);
 void omap4_lock_core_dpll(void);
 void omap4_lock_core_dpll_shadow(const struct dpll_param *param);
 void omap4_enable_all_clocks(void);
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
 
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index c785475..d5517c5 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -60,6 +60,13 @@
 #define OMAP44XX_PRM_VC_VAL_BYPASS	(OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba0)
 #define OMAP44XX_PRM_VC_CFG_I2C_MODE	(OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba8)
 #define OMAP44XX_PRM_VC_CFG_I2C_CLK	(OMAP44XX_WAKEUP_L4_IO_BASE + 0x7bac)
+#define OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT		0x1000000
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT	0
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_MASK	0x7F
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT	8
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_MASK		0xFF
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT		16
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_MASK		0xFF
 
 /* IRQ */
 #define OMAP44XX_PRM_IRQSTATUS_MPU_A9	(OMAP44XX_WAKEUP_L4_IO_BASE + 0x6010)
@@ -178,6 +185,6 @@ struct dpll_param;
 void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *);
 void omap4_power_i2c_send(u32);
 unsigned int omap4_revision(void);
-noinline int omap4_scale_vcores(void);
+noinline int omap4_scale_vcores(unsigned vsel0_pin);
 
 #endif
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 3ab01f0..564a748 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -1,6 +1,7 @@
 #include <common.h>
 #include <io.h>
 #include <mach/syslib.h>
+#include <mach/silicon.h>
 #include <mach/clocks.h>
 
 #define LDELAY	12000000
@@ -378,3 +379,21 @@ void omap4_enable_all_clocks(void)
 	sr32(CM_L3INIT_USBPHY_CLKCTRL, 0, 32, 0x301);
 }
 
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv)
+{
+	u32 temp, step;
+
+	step = volt_mv - TPS62361_BASE_VOLT_MV;
+	step /= 10;
+
+	temp = TPS62361_I2C_SLAVE_ADDR |
+	    (reg << OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT) |
+	    (step << OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT) |
+	    OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT;
+	debug("do_scale_tps62361: volt - %d step - 0x%x\n", volt_mv, step);
+
+	writel(temp, OMAP44XX_PRM_VC_VAL_BYPASS);
+	if (!wait_on_value(OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT, 0,
+				OMAP44XX_PRM_VC_VAL_BYPASS, LDELAY))
+		puts("Scaling voltage failed for vdd_mpu from TPS\n");
+}
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index de69934..07aa2b4 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -7,6 +7,7 @@
 #include <mach/syslib.h>
 #include <mach/xload.h>
 #include <mach/gpmc.h>
+#include <mach/gpio.h>
 
 /*
  *  The following several lines are taken from U-Boot to support
@@ -466,7 +467,7 @@ enum omap_boot_src omap4_bootsrc(void)
 
 #define I2C_SLAVE 0x12
 
-noinline int omap4_scale_vcores(void)
+noinline int omap4_scale_vcores(unsigned vsel0_pin)
 {
 	unsigned int rev = omap4_revision();
 
@@ -476,8 +477,41 @@ noinline int omap4_scale_vcores(void)
 	writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE);
 	writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK);
 
+	/* TPS - supplies vdd_mpu on 4460 */
+	if (rev >= OMAP4460_ES1_0) {
+		/*
+		 * Setup SET1 and SET0 with right values so that kernel
+		 * can use either of them based on its needs.
+		 */
+		omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET0, 1430);
+		omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET1, 1430);
+
+		/*
+		 * Select SET1 in TPS62361:
+		 * VSEL1 is grounded on board. So the following selects
+		 * VSEL1 = 0 and VSEL0 = 1
+		 */
+		gpio_direction_output(vsel0_pin, 0);
+		gpio_set_value(vsel0_pin, 1);
+	}
+
 	/* set VCORE1 force VSEL */
-	omap4_power_i2c_send((0x3A55 << 8) | I2C_SLAVE);
+	/*
+	 * 4430 : supplies vdd_mpu
+	 * Setting a high voltage for Nitro mode as smart reflex is not enabled.
+	 * We use the maximum possible value in the AVS range because the next
+	 * higher voltage in the discrete range (code >= 0b111010) is way too
+	 * high
+	 *
+	 * 4460 : supplies vdd_core
+	 *
+	 */
+	if (rev < OMAP4460_ES1_0)
+		/* 0x55: i2c addr, 3A: ~ 1430 mvolts*/
+		omap4_power_i2c_send((0x3A55 << 8) | I2C_SLAVE);
+	else
+		/* 0x55: i2c addr, 28: ~ 1200 mvolts*/
+		omap4_power_i2c_send((0x2855 << 8) | I2C_SLAVE);
 
 	/* FIXME: set VCORE2 force VSEL, Check the reset value */
 	omap4_power_i2c_send((0x295B << 8) | I2C_SLAVE);
@@ -490,6 +524,7 @@ noinline int omap4_scale_vcores(void)
 	case OMAP4430_ES2_1:
 		omap4_power_i2c_send((0x2A61 << 8) | I2C_SLAVE);
 		break;
+	/* > OMAP4460_ES1_0 : VCORE3 not connected */
 	}
 
 	return 0;
-- 
1.7.0.4



From plagnioj at jcrosoft.com  Fri Jul 27 10:13:46 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 16:13:46 +0200
Subject: [PATCH 2/3] OMAP4460: ram init changes
In-Reply-To: <1343396404-10288-3-git-send-email-j.weitzel@phytec.de>
References: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
 <1343396404-10288-3-git-send-email-j.weitzel@phytec.de>
Message-ID: <20120727141346.GV22657@game.jcrosoft.org>

On 15:40 Fri 27 Jul     , Jan Weitzel wrote:
> configure  Memory Adapter for 4460
> 
> Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> ---
>  arch/arm/mach-omap/include/mach/omap4-silicon.h |    4 ++++
>  arch/arm/mach-omap/omap4_generic.c              |   21 +++++++++++++++++++--
>  2 files changed, 23 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> index d5517c5..4082bac 100644
> --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
> +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> @@ -101,6 +101,10 @@
>  #define DMM_LISA_MAP_SYS_SIZE_MASK	(7 << 20)
>  #define DMM_LISA_MAP_SYS_SIZE_SHIFT	20
>  #define DMM_LISA_MAP_SYS_ADDR_MASK	(0xFF << 24)
> +
> +/* Memory Adapter (4460 onwards) */
> +#define OMAP44XX_MA_BASE		0x482AF000
> +
>  /*
>   * Hardware Register Details
>   */
> diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
> index 07aa2b4..a368759 100644
> --- a/arch/arm/mach-omap/omap4_generic.c
> +++ b/arch/arm/mach-omap/omap4_generic.c
> @@ -29,6 +29,10 @@
>  #define OMAP4460_CONTROL_ID_CODE_ES1_0  0x0B94E02F
>  #define OMAP4460_CONTROL_ID_CODE_ES1_1  0x2B94E02F
>  
> +/* EMIF_L3_CONFIG register value */
> +#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0		0x0A0000FF
> +#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0	0x0A300000
> +
>  void __noreturn reset_cpu(unsigned long addr)
>  {
>  	writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
> @@ -270,8 +274,7 @@ static void reset_phy(unsigned int base)
>  void omap4_ddr_init(const struct ddr_regs *ddr_regs,
>  		const struct dpll_param *core)
>  {
> -	unsigned int rev;
> -	rev = omap4_revision();
> +	unsigned int rev = omap4_revision();
>  
>  	if (rev == OMAP4430_ES2_0) {
>  		writel(0x9e9e9e9e, 0x4A100638);
> @@ -294,6 +297,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
>  	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x00000000;
>  	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
>  
> +	if (rev >= OMAP4460_ES1_0) {
> +		writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
> +
> +		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 0x00000000;
> +		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) = 0xFF020100;
??

Best Regards,
J.


From plagnioj at jcrosoft.com  Fri Jul 27 10:18:30 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 16:18:30 +0200
Subject: [PATCH 3/3] OMAP4460: clock init
In-Reply-To: <1343396404-10288-4-git-send-email-j.weitzel@phytec.de>
References: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
 <1343396404-10288-4-git-send-email-j.weitzel@phytec.de>
Message-ID: <20120727141830.GW22657@game.jcrosoft.org>

On 15:40 Fri 27 Jul     , Jan Weitzel wrote:
> Change clock init to allow early gpio access. Add support for 4460 clocks.
> 
> Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> ---
>  arch/arm/boards/panda/lowlevel.c              |    4 ++-
>  arch/arm/boards/panda/mux.c                   |    8 +++++
>  arch/arm/boards/pcm049/lowlevel.c             |   15 +++++++--
>  arch/arm/boards/pcm049/mux.c                  |    8 +++++
>  arch/arm/boards/phycard-a-xl2/lowlevel.c      |    9 ++++-
>  arch/arm/boards/phycard-a-xl2/mux.c           |    8 +++++
>  arch/arm/mach-omap/include/mach/omap4-clock.h |    4 ++
>  arch/arm/mach-omap/omap4_clock.c              |   39 +++++++++++++++++-------
>  8 files changed, 76 insertions(+), 19 deletions(-)
> 
> diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
> index 8591fff..0b4b199 100644
> --- a/arch/arm/boards/panda/lowlevel.c
> +++ b/arch/arm/boards/panda/lowlevel.c
> @@ -28,6 +28,8 @@
>  #include <mach/syslib.h>
>  #include <asm/barebox-arm.h>
>  
> +#define TPS62361_VSEL0_GPIO    7
> +
>  void set_muxconf_regs(void);
>  
>  static const struct ddr_regs ddr_regs_400_mhz_2cs = {
> @@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
>  	omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
>  
>  	/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
> -	omap4_scale_vcores();
> +	omap4_scale_vcores(TPS62361_VSEL0_GPIO);
>  
>  	board_init_lowlevel_return();
>  }
> diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
> index 310e433..3783006 100644
> --- a/arch/arm/boards/panda/mux.c
> +++ b/arch/arm/boards/panda/mux.c
> @@ -3,6 +3,7 @@
>  #include <io.h>
>  #include <mach/omap4-silicon.h>
>  #include <mach/omap4-mux.h>
> +#include <mach/omap4-clock.h>
>  
>  static const struct pad_conf_entry core_padconf_array[] = {
>  	{ GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1  /* sdmmc2_dat0 */ },
> @@ -245,4 +246,11 @@ void set_muxconf_regs(void)
>  
>  	omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
>  			ARRAY_SIZE(wkup_padconf_array));
> +
> +	/* gpio_wk7 is used for controlling TPS on 4460 */
> +	if (omap4_revision() >= OMAP4460_ES1_0) {
> +		writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
> +		/* Enable GPIO-1 clocks before TPS initialization */
> +		omap4_enable_gpio1_wup_clocks();
> +	}
can we factorize this?

Best Regards,
J.


From s.hauer at pengutronix.de  Fri Jul 27 11:12:29 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 17:12:29 +0200
Subject: [PATCH 2/3] OMAP4460: ram init changes
In-Reply-To: <20120727141346.GV22657@game.jcrosoft.org>
References: <1343396404-10288-1-git-send-email-j.weitzel@phytec.de>
 <1343396404-10288-3-git-send-email-j.weitzel@phytec.de>
 <20120727141346.GV22657@game.jcrosoft.org>
Message-ID: <20120727151229.GE30009@pengutronix.de>

On Fri, Jul 27, 2012 at 04:13:46PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:40 Fri 27 Jul     , Jan Weitzel wrote:
> > configure  Memory Adapter for 4460
> > 
> > Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> > ---
> >  arch/arm/mach-omap/include/mach/omap4-silicon.h |    4 ++++
> >  arch/arm/mach-omap/omap4_generic.c              |   21 +++++++++++++++++++--
> >  2 files changed, 23 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> > index d5517c5..4082bac 100644
> > --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
> > +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> > @@ -101,6 +101,10 @@
> >  #define DMM_LISA_MAP_SYS_SIZE_MASK	(7 << 20)
> >  #define DMM_LISA_MAP_SYS_SIZE_SHIFT	20
> >  #define DMM_LISA_MAP_SYS_ADDR_MASK	(0xFF << 24)
> > +
> > +/* Memory Adapter (4460 onwards) */
> > +#define OMAP44XX_MA_BASE		0x482AF000
> > +
> >  /*
> >   * Hardware Register Details
> >   */
> > diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
> > index 07aa2b4..a368759 100644
> > --- a/arch/arm/mach-omap/omap4_generic.c
> > +++ b/arch/arm/mach-omap/omap4_generic.c
> > @@ -29,6 +29,10 @@
> >  #define OMAP4460_CONTROL_ID_CODE_ES1_0  0x0B94E02F
> >  #define OMAP4460_CONTROL_ID_CODE_ES1_1  0x2B94E02F
> >  
> > +/* EMIF_L3_CONFIG register value */
> > +#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0		0x0A0000FF
> > +#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0	0x0A300000
> > +
> >  void __noreturn reset_cpu(unsigned long addr)
> >  {
> >  	writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
> > @@ -270,8 +274,7 @@ static void reset_phy(unsigned int base)
> >  void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> >  		const struct dpll_param *core)
> >  {
> > -	unsigned int rev;
> > -	rev = omap4_revision();
> > +	unsigned int rev = omap4_revision();
> >  
> >  	if (rev == OMAP4430_ES2_0) {
> >  		writel(0x9e9e9e9e, 0x4A100638);
> > @@ -294,6 +297,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> >  	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x00000000;
> >  	*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
> >  
> > +	if (rev >= OMAP4460_ES1_0) {
> > +		writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
> > +
> > +		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 0x00000000;
> > +		*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) = 0xFF020100;
> ??

There are bad examples in this file already, see the context of this
patch. Should be fixed before we add more stuff.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Fri Jul 27 11:19:36 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 27 Jul 2012 17:19:36 +0200
Subject: [PATCH] omap: use 512k barebox partition
In-Reply-To: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
References: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
Message-ID: <20120727151936.GF30009@pengutronix.de>

On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> Use 512k NAND Partion for barebox. Problem is we don't know the size of the
> barebox inside xload. Set it also to 512k
> Fix enviroment for boards with size in config

The barebox binary has the size encoded into it at offset 0x2c. We could
use this to transfer the correct size.

Sascha

> 
> Signed-off-by: Jan Weitzel <j.weitzel at phytec.de>
> ---
>  arch/arm/boards/pcm049/board.c            |    7 +++++--
>  arch/arm/boards/pcm049/env/config         |    2 +-
>  arch/arm/boards/phycard-a-l1/env/config   |    2 +-
>  arch/arm/boards/phycard-a-l1/pca-a-l1.c   |    9 ++++++---
>  arch/arm/boards/phycard-a-xl2/env/config  |    2 +-
>  arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |    4 ++--
>  arch/arm/mach-omap/xload.c                |    2 +-
>  7 files changed, 17 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
> index 5b7854a..d7b79c1 100644
> --- a/arch/arm/boards/pcm049/board.c
> +++ b/arch/arm/boards/pcm049/board.c
> @@ -113,9 +113,12 @@ static int pcm049_devices_init(void)
>  #ifdef CONFIG_PARTITION
>  	devfs_add_partition("nand0", 0x00000, SZ_128K, DEVFS_PARTITION_FIXED, "xload_raw");
>  	dev_add_bb_dev("xload_raw", "xload");
> -	devfs_add_partition("nand0", SZ_128K, SZ_256K, DEVFS_PARTITION_FIXED, "self_raw");
> +	devfs_add_partition("nand0", SZ_128K, SZ_512K,
> +			DEVFS_PARTITION_FIXED, "self_raw");
>  	dev_add_bb_dev("self_raw", "self0");
> -	devfs_add_partition("nand0", SZ_128K + SZ_256K, SZ_128K, DEVFS_PARTITION_FIXED, "env_raw");
> +	devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
> +			DEVFS_PARTITION_FIXED, "env_raw");
> +
>  	dev_add_bb_dev("env_raw", "env0");
>  #endif
>  
> diff --git a/arch/arm/boards/pcm049/env/config b/arch/arm/boards/pcm049/env/config
> index efbe9ea..70e374f 100644
> --- a/arch/arm/boards/pcm049/env/config
> +++ b/arch/arm/boards/pcm049/env/config
> @@ -40,7 +40,7 @@ autoboot_timeout=3
>  
>  bootargs="console=ttyO2,115200"
>  
> -nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),2M(kernel),-(root)"
> +nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
>  rootfs_mtdblock_nand=4
>  
>  # set a fancy prompt (if support is compiled in)
> diff --git a/arch/arm/boards/phycard-a-l1/env/config b/arch/arm/boards/phycard-a-l1/env/config
> index e0f4dcc..5bc48d7 100644
> --- a/arch/arm/boards/phycard-a-l1/env/config
> +++ b/arch/arm/boards/phycard-a-l1/env/config
> @@ -70,7 +70,7 @@ bootargs="$bootargs omapdss.def_disp=pd050vl1"
>  #bootargs="$bootargs omapdss.def_disp=pd104slf"
>  #bootargs="$bootargs omapdss.def_disp=pm070wl4"
>  
> -nand_parts="512k(x-loader)ro,1920k(barebox),128k(bareboxenv),4M(kernel),-(root)"
> +nand_parts="128k(x-loader)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
>  nand_device=omap2-nand.0
>  rootfs_mtdblock_nand=4
>  
> diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> index 1cc2815..3d3596a 100644
> --- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> +++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> @@ -336,13 +336,16 @@ static int pcaal1_late_init(void)
>  
>  	nand = get_device_by_name("nand0");
>  
> -	devfs_add_partition("nand0", 0x00000, 0x80000, DEVFS_PARTITION_FIXED, "x-loader");
> +	devfs_add_partition("nand0", 0x00000, SZ_128K,
> +			DEVFS_PARTITION_FIXED, "x-loader");
>  	dev_add_bb_dev("self_raw", "x_loader0");
>  
> -	devfs_add_partition("nand0", 0x80000, 0x1e0000, DEVFS_PARTITION_FIXED, "self_raw");
> +	devfs_add_partition("nand0", SZ_128K, SZ_512K,
> +			DEVFS_PARTITION_FIXED, "self_raw");
>  	dev_add_bb_dev("self_raw", "self0");
>  
> -	devfs_add_partition("nand0", 0x260000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
> +	devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
> +			DEVFS_PARTITION_FIXED, "env_raw");
>  	dev_add_bb_dev("env_raw", "env0");
>  
>  	return 0;
> diff --git a/arch/arm/boards/phycard-a-xl2/env/config b/arch/arm/boards/phycard-a-xl2/env/config
> index 59e8eb3..44a4181 100644
> --- a/arch/arm/boards/phycard-a-xl2/env/config
> +++ b/arch/arm/boards/phycard-a-xl2/env/config
> @@ -39,7 +39,7 @@ autoboot_timeout=3
>  
>  bootargs="console=ttyO2,115200"
>  
> -nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),4M(kernel),-(root)"
> +nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
>  rootfs_mtdblock_nand=4
>  
>  # set a fancy prompt (if support is compiled in)
> diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
> index 128cb8f..54b4ada 100644
> --- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
> +++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
> @@ -131,10 +131,10 @@ static int pcaaxl2_devices_init(void)
>  	devfs_add_partition("nand0", 0x00000, SZ_128K,
>  			DEVFS_PARTITION_FIXED, "xload_raw");
>  	dev_add_bb_dev("xload_raw", "xload");
> -	devfs_add_partition("nand0", SZ_128K, SZ_256K,
> +	devfs_add_partition("nand0", SZ_128K, SZ_512K,
>  			DEVFS_PARTITION_FIXED, "self_raw");
>  	dev_add_bb_dev("self_raw", "self0");
> -	devfs_add_partition("nand0", SZ_128K + SZ_256K, SZ_128K,
> +	devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
>  			DEVFS_PARTITION_FIXED, "env_raw");
>  	dev_add_bb_dev("env_raw", "env0");
>  #endif
> diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
> index 13024ab..a58d0a3 100644
> --- a/arch/arm/mach-omap/xload.c
> +++ b/arch/arm/mach-omap/xload.c
> @@ -80,7 +80,7 @@ int run_shell(void)
>  		printf("unknown boot source. Fall back to nand\n");
>  	case OMAP_BOOTSRC_NAND:
>  		printf("booting from NAND\n");
> -		func = omap_xload_boot_nand(SZ_128K, SZ_256K);
> +		func = omap_xload_boot_nand(SZ_128K, SZ_512K);
>  		break;
>  	}
>  
> -- 
> 1.7.0.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Fri Jul 27 12:54:16 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 27 Jul 2012 18:54:16 +0200
Subject: [PATCH] omap: use 512k barebox partition
In-Reply-To: <20120727151936.GF30009@pengutronix.de>
References: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
 <20120727151936.GF30009@pengutronix.de>
Message-ID: <201207271854.16758.jbe@pengutronix.de>

Hi Sascha,

Sascha Hauer wrote:
> On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> > Use 512k NAND Partion for barebox. Problem is we don't know the size of
> > the barebox inside xload. Set it also to 512k
> > Fix enviroment for boards with size in config
>
> The barebox binary has the size encoded into it at offset 0x2c. We could
> use this to transfer the correct size.

Will this be a reliable "API" to the outerworld? Also in future versions of 
Barebox?

I would need this information in my S3C6410 implementation (for NAND and SD 
cards to boot from) so it would be a really helpful feature. But only if it 
is still present in future versions.

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From plagnioj at jcrosoft.com  Fri Jul 27 14:31:03 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:31:03 +0200
Subject: [PATCH 00/12] Add Pre-Bootloader support
Message-ID: <20120727183103.GX22657@game.jcrosoft.org>

Hi,

please pull
The following changes since commit 9ab50e0b9cb6400a4442acd36c3d4b315685fa6a:

  Merge branch 'for-next/tqma53' into next (2012-07-27 10:05:03 +0200)

are available in the git repository at:


  git://git.jcrosoft.org/barebox.git tags/pbl

for you to fetch changes up to e373b3c53902c1d6da4289db9467ad50e209d0c7:

  at91: add lowlevel init to the pbl (2012-07-28 02:19:09 +0800)

----------------------------------------------------------------
Add pre-bootloader (pbl) image support

This allows for creating a pre-bootloader binary for
 - nand boot
 - mmc boot
 - compressed image

Currently on the compressed image is implemented the boot really on current lowlevel
init support. In a second step this could be move to the pbl c code with generic framework.

The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.

The decompressor support lzo and gzip and allow to add easly more.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (9):
      kbuild: Init all relevant variables used in kbuild files so
      kbuild: add pre-bootloader (pbl) target
      Add pre-bootloader (pbl) image support
      pbl: discard unwind symbol if enable in barebox
      decompress_unlzo: define decompress_unlzo as decompress
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed image: add gzip support
      at91: add lowlevel init to the pbl

Sascha Hauer (3):
      Add compressed image support
      only compress default env in uncompressed images
      ARM: Separate assembler functions into their own section

 Makefile                            |   11 ++++--
 arch/arm/Kconfig                    |    2 ++
 arch/arm/Makefile                   |    8 +++++
 arch/arm/cpu/Makefile               |    1 +
 arch/arm/cpu/start.c                |  113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---
 arch/arm/lib/Makefile               |    4 +++
 arch/arm/lib/barebox.lds.S          |    3 +-
 arch/arm/lib/findbit.S              |    9 +++++
 arch/arm/mach-at91/Makefile         |    2 ++
 arch/arm/pbl/Makefile               |   38 +++++++++++++++++++++
 arch/arm/pbl/piggy.gzip.S           |    6 ++++
 arch/arm/pbl/piggy.lzo.S            |    6 ++++
 arch/arm/pbl/zbarebox.lds.S         |   74 ++++++++++++++++++++++++++++++++++++++++
 common/Kconfig                      |   34 +++++++++++++++++++
 include/asm-generic/memory_layout.h |    1 +
 include/linux/decompress/mm.h       |   68 +++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c            |    1 +
 lib/decompress_unlzo.c              |    1 +
 pbl/Makefile                        |    5 +++
 pbl/misc.c                          |   14 ++++++++
 pbl/string.c                        |  127 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 scripts/Makefile.build              |   73 +++++++++++++++++++++++++++++++++++++---
 scripts/Makefile.lib                |   14 ++++++++
 23 files changed, 604 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/pbl/Makefile
 create mode 100644 arch/arm/pbl/piggy.gzip.S
 create mode 100644 arch/arm/pbl/piggy.lzo.S
 create mode 100644 arch/arm/pbl/zbarebox.lds.S
 create mode 100644 include/linux/decompress/mm.h
 create mode 100644 pbl/Makefile
 create mode 100644 pbl/misc.c
 create mode 100644 pbl/string.c

Best Regards,
J.


From plagnioj at jcrosoft.com  Fri Jul 27 14:32:59 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:32:59 +0200
Subject: [PATCH 01/12] kbuild: Init all relevant variables used in kbuild
 files so
In-Reply-To: <20120727183103.GX22657@game.jcrosoft.org>
References: <20120727183103.GX22657@game.jcrosoft.org>
Message-ID: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>

import from linux 3.5-rc5

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 scripts/Makefile.build |   25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index f70e2b9..1a82c44 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -7,7 +7,30 @@ src := $(obj)
 PHONY := __build
 __build:
 
-# Read .config if it exist, otherwise ignore
+# Init all relevant variables used in kbuild files so
+# 1) they have correct type
+# 2) they do not inherit any value from the environment
+obj-y :=
+obj-m :=
+lib-y :=
+lib-m :=
+always :=
+targets :=
+subdir-y :=
+subdir-m :=
+EXTRA_AFLAGS   :=
+EXTRA_CFLAGS   :=
+EXTRA_CPPFLAGS :=
+EXTRA_LDFLAGS  :=
+asflags-y  :=
+ccflags-y  :=
+cppflags-y :=
+ldflags-y  :=
+
+subdir-asflags-y :=
+subdir-ccflags-y :=
+
+# Read auto.conf if it exists, otherwise ignore
 -include include/config/auto.conf
 
 include scripts/Kbuild.include
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:08 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:08 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the decompressor
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>

This is not needed by lzo but by gunzip, xz and others.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/cpu/start.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index a54f5fd..f500ca8 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,6 +28,9 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+unsigned long free_mem_ptr;
+unsigned long free_mem_end_ptr;
+
 #ifdef CONFIG_PBL_IMAGE
 void __naked __section(.text_head_entry) pbl_start(void)
 {
@@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
 
+	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
+	free_mem_ptr = STACK_BASE - 0x20000 - 16;
+	free_mem_end_ptr = STACK_BASE - 16;
+
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:00 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:00 +0200
Subject: [PATCH 02/12] kbuild: add pre-bootloader (pbl) target
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-2-git-send-email-plagnioj@jcrosoft.com>

This will allow to link compiled object to the built-in-pbl.o across the source
tree that will be finally link to the pbl.

Now we compile the source %.c in pbl-%.o and provide -D__PBL__
so we can known in the source when it's compile for barebox or the pbl.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile               |    5 ++++-
 scripts/Makefile.build |   48 +++++++++++++++++++++++++++++++++++++++++++++---
 scripts/Makefile.lib   |   14 ++++++++++++++
 3 files changed, 63 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index ac5eaaf..168381d 100644
--- a/Makefile
+++ b/Makefile
@@ -481,6 +481,7 @@ barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
 		     $(core-n) $(core-) $(drivers-n) $(drivers-) \
 		     $(net-n)  $(net-)  $(libs-n)    $(libs-))))
 
+pbl-common-y	:= $(patsubst %/, %/built-in-pbl.o, $(common-y))
 common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 
 # Build barebox
@@ -510,6 +511,8 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 # System.map is generated to document addresses of all kernel symbols
 
 barebox-common := $(common-y)
+barebox-pbl-common := $(pbl-common-y)
+export barebox-pbl-common
 barebox-all    := $(barebox-common)
 barebox-lds    := $(lds-y)
 
@@ -714,7 +717,7 @@ barebox.srec: barebox
 
 # The actual objects are generated when descending,
 # make sure no implicit rule kicks in
-$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds): $(barebox-dirs) ;
+$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds) $(barebox-pbl-common): $(barebox-dirs) ;
 
 # Handle descending into subdirectories listed in $(barebox-dirs)
 # Preset locale variables to speed up the build process. Limit locale
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 1a82c44..e5b7779 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -14,6 +14,7 @@ obj-y :=
 obj-m :=
 lib-y :=
 lib-m :=
+pbl-y :=
 always :=
 targets :=
 subdir-y :=
@@ -97,13 +98,19 @@ ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
 lib-target := $(obj)/lib.a
 endif
 
-ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
+ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target) $(pbl-y)),)
 builtin-target := $(obj)/built-in.o
 endif
 
+ifeq ($(CONFIG_PBL_IMAGE), y)
+ifneq ($(strip $(pbl-y) $(builtin-target)),)
+pbl-target := $(obj)/built-in-pbl.o
+endif
+endif
+
 # We keep a list of all modules in $(MODVERDIR)
 
-__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
+__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(pbl-target) $(extra-y)) \
 	 $(if $(KBUILD_MODULES),$(obj-m)) \
 	 $(subdir-ym) $(always)
 	@:
@@ -177,9 +184,11 @@ cmd_cc_symtypes_c	   = \
 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
 
 quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
+quiet_cmd_pbl_cc_o_c = PBLCC   $@
 
 ifndef CONFIG_MODVERSIONS
 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
+cmd_pbl_cc_o_c = $(CC) -D__PBL__ $(c_flags) -c -o $@ $<
 
 else
 # When module versioning is enabled the following steps are executed:
@@ -220,8 +229,22 @@ define rule_cc_o_c
 	mv -f $(dot-target).tmp $(dot-target).cmd
 endef
 
+define rule_pbl_cc_o_c
+	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
+	$(call echo-cmd,pbl_cc_o_c) $(cmd_pbl_cc_o_c);			  \
+	$(cmd_modversions)						  \
+	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,pbl_cc__o_c)' >    \
+	                                              $(dot-target).tmp;  \
+	rm -f $(depfile);						  \
+	mv -f $(dot-target).tmp $(dot-target).cmd
+endef
+
 # Built-in and composite module parts
 
+pbl-%.o: %.c
+	$(call cmd,force_checksrc)
+	$(call if_changed_rule,pbl_cc_o_c)
+
 %.o: %.c FORCE
 	$(call cmd,force_checksrc)
 	$(call if_changed_rule,cc_o_c)
@@ -258,10 +281,16 @@ cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 
+quiet_cmd_pbl_as_o_S = PBLAS   $@
+cmd_pbl_as_o_S       = $(CC) -D__PBL__ $(a_flags) -c -o $@ $<
+
+pbl-%.o: %.S
+	$(call if_changed_dep,pbl_as_o_S)
+
 %.o: %.S FORCE
 	$(call if_changed_dep,as_o_S)
 
-targets += $(real-objs-y) $(real-objs-m) $(lib-y)
+targets += $(real-objs-y) $(real-objs-m) $(lib-y) $(pbl-y)
 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 
 # Linker scripts preprocessor (.lds.S -> .lds)
@@ -294,6 +323,19 @@ $(builtin-target): $(obj-y) FORCE
 targets += $(builtin-target)
 endif # builtin-target
 
+ifdef pbl-target
+quiet_cmd_pbl_link_o_target = PBLLD   $@
+# If the list of objects to link is empty, just create an empty built-in-pbl.o
+cmd_pbl_link_o_target = $(if $(strip $(pbl-y)),\
+		      $(LD) $(ld_flags) -r -o $@ $(filter $(pbl-y), $^),\
+		      rm -f $@; $(AR) rcs $@)
+
+$(pbl-target): $(pbl-y) FORCE
+	$(call if_changed,pbl_link_o_target)
+
+targets += $(pbl-target)
+endif # pbl-target
+
 #
 # Rule to compile a set of .o files into one .a file
 #
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index b842c48..1a5b2b5 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -21,6 +21,17 @@ lib-y := $(filter-out $(obj-y), $(sort $(lib-y) $(lib-m)))
 # o if we encounter foo/ in $(obj-m), remove it from $(obj-m)
 #   and add the directory to the list of dirs to descend into: $(subdir-m)
 
+# for non dirs add pbl- prefix to the target
+# so we recompile the source with custom flags and custom quiet
+__pbl-y		:= $(notdir $(pbl-y))
+pbl-y		:= $(patsubst %.o,pbl-%.o,$(__pbl-y))
+# add subdir from $(obj-y) too so we do not need to have the dir define in
+# both $(obj-y) and $(pbl-y)
+__pbl-y		:= $(filter-out $(pbl-y), $(filter %/, $(obj-y)))
+pbl-y		+= $(__pbl-y)
+
+pbl-y		:= $(sort $(patsubst %/, %/built-in-pbl.o, $(pbl-y)))
+
 __subdir-y	:= $(patsubst %/,%,$(filter %/, $(obj-y)))
 subdir-y	+= $(__subdir-y)
 __subdir-m	:= $(patsubst %/,%,$(filter %/, $(obj-m)))
@@ -46,7 +57,9 @@ multi-objs   := $(multi-objs-y) $(multi-objs-m)
 
 # $(subdir-obj-y) is the list of objects in $(obj-y) which do not live
 # in the local directory
+__subdir-obj-y := $(foreach o,$(pbl-y),$(if $(filter-out $(o),$(notdir $(o))),$(o)))
 subdir-obj-y := $(foreach o,$(obj-y),$(if $(filter-out $(o),$(notdir $(o))),$(o)))
+subdir-obj-y += $(__subdir-obj-y)
 
 # $(obj-dirs) is a list of directories that contain object files
 obj-dirs := $(dir $(multi-objs) $(subdir-obj-y))
@@ -63,6 +76,7 @@ targets		:= $(addprefix $(obj)/,$(targets))
 obj-y		:= $(addprefix $(obj)/,$(obj-y))
 obj-m		:= $(addprefix $(obj)/,$(obj-m))
 lib-y		:= $(addprefix $(obj)/,$(lib-y))
+pbl-y		:= $(addprefix $(obj)/,$(pbl-y))
 subdir-obj-y	:= $(addprefix $(obj)/,$(subdir-obj-y))
 real-objs-y	:= $(addprefix $(obj)/,$(real-objs-y))
 real-objs-m	:= $(addprefix $(obj)/,$(real-objs-m))
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:01 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:01 +0200
Subject: [PATCH 03/12] Add pre-bootloader (pbl) image support
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-3-git-send-email-plagnioj@jcrosoft.com>

This allows for creating a pre-bootloader binary for
 - nand boot
 - mmc boot
 - compressed image

The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.

Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.

For now on introduce dummy zbarebox* targets and c code that will contain later
the decompressor. This only implemeted on ARM.

This patch is based on Sascha Hauer <s.hauer at pengutronix.de>
Add compressed image support patch

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                                           |    6 +-
 arch/arm/Kconfig                                   |    1 +
 arch/arm/Makefile                                  |    4 +
 arch/arm/cpu/Makefile                              |    1 +
 arch/arm/cpu/start.c                               |   43 ++++++-
 arch/arm/lib/Makefile                              |    4 +
 arch/arm/lib/barebox.lds.S                         |    3 +-
 arch/arm/pbl/Makefile                              |   25 ++++
 arch/arm/{lib/barebox.lds.S => pbl/zbarebox.lds.S} |   53 ++------
 common/Kconfig                                     |   30 +++++
 include/asm-generic/memory_layout.h                |    1 +
 pbl/Makefile                                       |    5 +
 pbl/misc.c                                         |   14 +++
 pbl/string.c                                       |  127 ++++++++++++++++++++
 14 files changed, 269 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/pbl/Makefile
 copy arch/arm/{lib/barebox.lds.S => pbl/zbarebox.lds.S} (60%)
 create mode 100644 pbl/Makefile
 create mode 100644 pbl/misc.c
 create mode 100644 pbl/string.c

diff --git a/Makefile b/Makefile
index 168381d..a102015 100644
--- a/Makefile
+++ b/Makefile
@@ -474,6 +474,8 @@ CFLAGS += $(call cc-option,-Wno-pointer-sign,)
 # this default value
 export KBUILD_IMAGE ?= barebox
 
+common-$(CONFIG_PBL_IMAGE)	+= pbl/
+
 barebox-dirs	:= $(patsubst %/,%,$(filter %/, $(common-y)))
 
 barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
@@ -520,7 +522,7 @@ barebox-lds    := $(lds-y)
 # May be overridden by arch/$(ARCH)/Makefile
 quiet_cmd_barebox__ ?= LD      $@
       cmd_barebox__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
-      -T $(barebox-lds) $(barebox-head)                         \
+      -T $(barebox-lds)                         \
       --start-group $(barebox-common) --end-group                  \
       $(filter-out $(barebox-lds) $(barebox-common) FORCE ,$^)
 
@@ -674,7 +676,9 @@ OBJCOPYFLAGS_barebox.bin = -O binary
 
 barebox.bin: barebox FORCE
 	$(call if_changed,objcopy)
+ifndef CONFIG_PBL_IMAGE
 	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+endif
 
 ifdef CONFIG_X86
 barebox.S: barebox
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5acc36f..3d11497 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -4,6 +4,7 @@ config ARM
 	select HAS_MODULES
 	select HAVE_CONFIGURABLE_MEMORY_LAYOUT
 	select HAVE_CONFIGURABLE_TEXT_BASE
+	select HAVE_PBL_IMAGE
 	default y
 
 config ARM_AMBA
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bf17203..80ef986 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,10 @@ ifeq ($(CONFIG_ARCH_DAVINCI),y)
 KBUILD_IMAGE := barebox.ubl
 endif
 
+pbl := arch/arm/pbl
+zbarebox.S zbarebox.bin zbarebox: barebox.bin
+	$(Q)$(MAKE) $(build)=$(pbl) $(pbl)/$@
+
 all: $(KBUILD_IMAGE)
 
 archprepare: maketools
diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 93a34a9..939e6a7 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_CPU_32v6) += cache-armv6.o
 obj-$(CONFIG_CPU_32v7) += cache-armv7.o
 obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
 
+pbl-y += start.o
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 112403e..49b1d5b 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,10 +28,34 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+#ifdef CONFIG_PBL_IMAGE
+void __naked __section(.text_head_entry) pbl_start(void)
+{
+	barebox_arm_head();
+}
+
+/*
+ * First function in the pbl image. We get here from
+ * the decompressor
+ */
+void __naked __section(.text_entry) start(void)
+{
+	u32 r;
+
+	/* Setup the stack */
+	r = STACK_BASE + STACK_SIZE - 16;
+	__asm__ __volatile__("mov sp, %0" : : "r"(r));
+	/* clear bss */
+	memset(__bss_start, 0, __bss_stop - __bss_start);
+
+	start_barebox();
+}
+#else
 void __naked __section(.text_entry) start(void)
 {
 	barebox_arm_head();
 }
+#endif
 
 /*
  * The actual reset vector. This code is position independent and usually
@@ -73,6 +97,14 @@ void __naked __bare_init reset(void)
 	board_init_lowlevel_return();
 }
 
+#ifdef __PBL__
+void barebox_pbl(uint32_t offset)
+{
+}
+#else
+void barebox_pbl(uint32_t offset) {}
+#endif
+
 /*
  * Board code can jump here by either returning from board_init_lowlevel
  * or by calling this function directly.
@@ -105,8 +137,11 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-	/* call start_barebox with its absolute address */
-	r = (unsigned int)&start_barebox;
-	__asm__ __volatile__("mov pc, %0" : : "r"(r));
+	if (IS_ENABLED(CONFIG_PBL_IMAGE)) {
+		barebox_pbl(offset);
+	} else {
+		/* call start_barebox with its absolute address */
+		r = (unsigned int)&start_barebox;
+		__asm__ __volatile__("mov pc, %0" : : "r"(r));
+	}
 }
-
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 1eaf474..9d0ff7a 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -21,3 +21,7 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
 obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
 extra-y += barebox.lds
+
+pbl-y	+= lib1funcs.o
+pbl-y	+= ashldi3.o
+pbl-y	+= div0.o
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index e0bae70..a69013f 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -31,8 +31,9 @@ SECTIONS
 {
 	. = TEXT_BASE;
 
+#ifndef CONFIG_PBL_IMAGE
 	PRE_IMAGE
-
+#endif
 	. = ALIGN(4);
 	.text      :
 	{
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
new file mode 100644
index 0000000..9b364bb
--- /dev/null
+++ b/arch/arm/pbl/Makefile
@@ -0,0 +1,25 @@
+
+OBJCOPYFLAGS_zbarebox.bin = -O binary
+
+targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S
+
+$(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
+	$(call if_changed,objcopy)
+	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+	@echo '  Barebox: $@ is ready'
+
+$(obj)/zbarebox.S: $(obj)/zbarebox FORCE
+	$(call if_changed,disasm)
+
+LDFLAGS_zbarebox	:= -Map zbarebox.map
+zbarebox-common := $(barebox-pbl-common)
+zbarebox-lds := $(obj)/zbarebox.lds
+
+quiet_cmd_zbarebox__ ?= LD      $@
+      cmd_zbarebox__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
+      -T $(zbarebox-lds)                                           \
+      --start-group $(zbarebox-common) --end-group                 \
+      $(filter-out $(zbarebox-lds) $(zbarebox-common) FORCE ,$^)
+
+$(obj)/zbarebox: $(zbarebox-lds) $(zbarebox-common) FORCE
+	$(call if_changed,zbarebox__)
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/pbl/zbarebox.lds.S
similarity index 60%
copy from arch/arm/lib/barebox.lds.S
copy to arch/arm/pbl/zbarebox.lds.S
index e0bae70..1cbcef4 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/pbl/zbarebox.lds.S
@@ -1,6 +1,5 @@
 /*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ * (C) Copyright 2012 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -23,13 +22,14 @@
  */
 
 #include <asm-generic/barebox.lds.h>
+#include <asm-generic/memory_layout.h>
 
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
-ENTRY(start)
+ENTRY(pbl_start)
 SECTIONS
 {
-	. = TEXT_BASE;
+	. = HEAD_TEXT_BASE;
 
 	PRE_IMAGE
 
@@ -38,15 +38,12 @@ SECTIONS
 	{
 		_stext = .;
 		_text = .;
-		*(.text_entry*)
+		*(.text_head_entry*)
 		__ll_return = .;
 		*(.text_ll_return*)
 		__bare_init_start = .;
 		*(.text_bare_init*)
 		__bare_init_end = .;
-		__exceptions_start = .;
-		KEEP(*(.text_exceptions*))
-		__exceptions_stop = .;
 		*(.text*)
 	}
 	BAREBOX_BARE_INIT_SIZE
@@ -54,48 +51,20 @@ SECTIONS
 	. = ALIGN(4);
 	.rodata : { *(.rodata*) }
 
-#ifdef CONFIG_ARM_UNWIND
-	/*
-	 * Stack unwinding tables
-	 */
-	. = ALIGN(8);
-	.ARM.unwind_idx : {
-		__start_unwind_idx = .;
-		*(.ARM.exidx*)
-		__stop_unwind_idx = .;
-	}
-	.ARM.unwind_tab : {
-		__start_unwind_tab = .;
-		*(.ARM.extab*)
-		__stop_unwind_tab = .;
-	}
-#endif
 	_etext = .;			/* End of text and rodata section */
 
 	. = ALIGN(4);
-	.data : { *(.data*) }
-
-	. = .;
-	__barebox_cmd_start = .;
-	.barebox_cmd : { BAREBOX_CMDS }
-	__barebox_cmd_end = .;
-
-	__barebox_magicvar_start = .;
-	.barebox_magicvar : { BAREBOX_MAGICVARS }
-	__barebox_magicvar_end = .;
-
-	__barebox_initcalls_start = .;
-	.barebox_initcalls : { INITCALLS }
-	__barebox_initcalls_end = .;
+	.piggydata : {
+		*(.piggydata)
+	}
 
-	__usymtab_start = .;
-	__usymtab : { BAREBOX_SYMS }
-	__usymtab_end = .;
+	. = ALIGN(4);
+	.data : { *(.data*) }
 
 	. = ALIGN(4);
 	__bss_start = .;
 	.bss : { *(.bss*) }
 	__bss_stop = .;
 	_end = .;
-	_barebox_image_size = __bss_start - TEXT_BASE;
+	_barebox_image_size = __bss_start - HEAD_TEXT_BASE;
 }
diff --git a/common/Kconfig b/common/Kconfig
index 7eb5b49..7b5a307 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -101,6 +101,36 @@ config ENVIRONMENT_VARIABLES
 
 menu "memory layout                 "
 
+config HAVE_PBL_IMAGE
+	bool
+
+config HAVE_IMAGE_COMPRESSION
+	bool
+
+config PBL_IMAGE
+	bool "Pre-Bootloader image"
+	depends on HAVE_PBL_IMAGE
+
+if PBL_IMAGE
+
+config IMAGE_COMPRESSION
+	bool "Compressed image"
+	depends on HAVE_IMAGE_COMPRESSION
+
+if IMAGE_COMPRESSION
+
+choice
+	prompt "Compression"
+
+config IMAGE_COMPRESSION_LZO
+	bool "lzo"
+
+endchoice
+
+endif
+
+endif
+
 config MMU
 	bool "Enable MMU"
 	help
diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h
index 941cd42..eb1607f 100644
--- a/include/asm-generic/memory_layout.h
+++ b/include/asm-generic/memory_layout.h
@@ -13,6 +13,7 @@
 
 #endif
 
+#define HEAD_TEXT_BASE MALLOC_BASE
 #define MALLOC_SIZE CONFIG_MALLOC_SIZE
 #define STACK_SIZE  CONFIG_STACK_SIZE
 
diff --git a/pbl/Makefile b/pbl/Makefile
new file mode 100644
index 0000000..7169c6c
--- /dev/null
+++ b/pbl/Makefile
@@ -0,0 +1,5 @@
+#
+# only unsed by the pbl
+#
+pbl-y += misc.o
+pbl-y += string.o
diff --git a/pbl/misc.c b/pbl/misc.c
new file mode 100644
index 0000000..47e9cea
--- /dev/null
+++ b/pbl/misc.c
@@ -0,0 +1,14 @@
+#include <common.h>
+#include <init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+void __noreturn panic(const char *fmt, ...)
+{
+	while(1);
+}
+
+void start_barebox(void)
+{
+}
diff --git a/pbl/string.c b/pbl/string.c
new file mode 100644
index 0000000..6787e82
--- /dev/null
+++ b/pbl/string.c
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/compressed/string.c
+ *
+ * Small subset of simple string routines
+ */
+
+#include <linux/types.h>
+
+void *memcpy(void *__dest, __const void *__src, size_t __n)
+{
+	int i = 0;
+	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
+
+	for (i = __n >> 3; i > 0; i--) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 2) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 1) {
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1)
+		*d++ = *s++;
+
+	return __dest;
+}
+
+void *memmove(void *__dest, __const void *__src, size_t count)
+{
+	unsigned char *d = __dest;
+	const unsigned char *s = __src;
+
+	if (__dest == __src)
+		return __dest;
+
+	if (__dest < __src)
+		return memcpy(__dest, __src, count);
+
+	while (count--)
+		d[count] = s[count];
+	return __dest;
+}
+
+size_t strlen(const char *s)
+{
+	const char *sc = s;
+
+	while (*sc != '\0')
+		sc++;
+	return sc - s;
+}
+
+int memcmp(const void *cs, const void *ct, size_t count)
+{
+	const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;
+	int res = 0;
+
+	while (su1 < end) {
+		res = *su1++ - *su2++;
+		if (res)
+			break;
+	}
+	return res;
+}
+
+int strcmp(const char *cs, const char *ct)
+{
+	unsigned char c1, c2;
+	int res = 0;
+
+	do {
+		c1 = *cs++;
+		c2 = *ct++;
+		res = c1 - c2;
+		if (res)
+			break;
+	} while (c1);
+	return res;
+}
+
+void *memchr(const void *s, int c, size_t count)
+{
+	const unsigned char *p = s;
+
+	while (count--)
+		if ((unsigned char)c == *p++)
+			return (void *)(p - 1);
+	return NULL;
+}
+
+char *strchr(const char *s, int c)
+{
+	while (*s != (char)c)
+		if (*s++ == '\0')
+			return NULL;
+	return (char *)s;
+}
+
+#undef memset
+
+void *memset(void *s, int c, size_t count)
+{
+	char *xs = s;
+	while (count--)
+		*xs++ = c;
+	return s;
+}
+
+void __memzero(void *s, size_t count)
+{
+	memset(s, 0, count);
+}
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:06 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:06 +0200
Subject: [PATCH 08/12] decompress_unlzo: define decompress_unlzo as decompress
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-8-git-send-email-plagnioj@jcrosoft.com>

so we can use decompress in the decompressor
this will simplify multi decompress support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 lib/decompress_unlzo.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
index 0e6a7ad..56abfc6 100644
--- a/lib/decompress_unlzo.c
+++ b/lib/decompress_unlzo.c
@@ -289,3 +289,4 @@ exit_1:
 exit:
 	return ret;
 }
+#define decompress decompress_unlzo
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:02 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:02 +0200
Subject: [PATCH 04/12] pbl: discard unwind symbol if enable in barebox
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-4-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/pbl/zbarebox.lds.S |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/pbl/zbarebox.lds.S b/arch/arm/pbl/zbarebox.lds.S
index 1cbcef4..0902067 100644
--- a/arch/arm/pbl/zbarebox.lds.S
+++ b/arch/arm/pbl/zbarebox.lds.S
@@ -46,6 +46,10 @@ SECTIONS
 		__bare_init_end = .;
 		*(.text*)
 	}
+
+	/* Discard unwind if enable in barebox */
+	/DISCARD/ : { *(.ARM.ex*) }
+
 	BAREBOX_BARE_INIT_SIZE
 
 	. = ALIGN(4);
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:03 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:03 +0200
Subject: [PATCH 05/12] Add compressed image support
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-5-git-send-email-plagnioj@jcrosoft.com>

From: Sascha Hauer <s.hauer at pengutronix.de>

This allows for creating a lzo compressed binary unsing the pbl.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
[From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>]
re-integrate it in the new pbl target.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/Kconfig         |    1 +
 arch/arm/Makefile        |    4 ++++
 arch/arm/cpu/start.c     |   59 ++++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/pbl/Makefile    |   16 +++++++++++--
 arch/arm/pbl/piggy.lzo.S |    6 +++++
 5 files changed, 84 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/pbl/piggy.lzo.S

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3d11497..245bec8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -5,6 +5,7 @@ config ARM
 	select HAVE_CONFIGURABLE_MEMORY_LAYOUT
 	select HAVE_CONFIGURABLE_TEXT_BASE
 	select HAVE_PBL_IMAGE
+	select HAVE_IMAGE_COMPRESSION
 	default y
 
 config ARM_AMBA
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 80ef986..8e4bb48 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,10 @@ ifeq ($(CONFIG_ARCH_DAVINCI),y)
 KBUILD_IMAGE := barebox.ubl
 endif
 
+ifdef CONFIG_IMAGE_COMPRESSION
+KBUILD_IMAGE := zbarebox.bin
+endif
+
 pbl := arch/arm/pbl
 zbarebox.S zbarebox.bin zbarebox: barebox.bin
 	$(Q)$(MAKE) $(build)=$(pbl) $(pbl)/$@
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 49b1d5b..a54f5fd 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -98,8 +98,67 @@ void __naked __bare_init reset(void)
 }
 
 #ifdef __PBL__
+extern void *input_data;
+extern void *input_data_end;
+
+#define STATIC static
+
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+#include "../../../lib/decompress_unlzo.c"
+#endif
+
+void barebox_uncompress(void *compressed_start, unsigned int len)
+{
+	void (*barebox)(void);
+
+	if (IS_ENABLED(CONFIG_THUMB2_BAREBOX))
+		barebox = (void *)(TEXT_BASE + 1);
+	else
+		barebox = (void *)TEXT_BASE;
+
+	decompress((void *)compressed_start,
+			len,
+			NULL, NULL,
+			(void *)TEXT_BASE, NULL, NULL);
+
+	/* flush I-cache before jumping to the uncompressed binary */
+	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+
+	barebox();
+}
+
 void barebox_pbl(uint32_t offset)
 {
+	uint32_t compressed_start, compressed_end, len;
+	void (*uncompress)(void *compressed_start, unsigned int len);
+
+	compressed_start = (uint32_t)&input_data - offset;
+	compressed_end = (uint32_t)&input_data_end - offset;
+	len = compressed_end - compressed_start;
+
+	/*
+	 * Check if the compressed binary will be overwritten
+	 * by the uncompressed binary
+	 */
+	if (compressed_start >= TEXT_BASE &&
+			compressed_start < TEXT_BASE + len * 4 ) {
+		/*
+		 * copy compressed binary to its link address
+		 */
+		memcpy(&input_data, (void *)compressed_start, len);
+		compressed_start = (uint32_t)&input_data;
+	}
+
+	uncompress = barebox_uncompress;
+
+	/* call barebox_uncompress with its absolute address */
+	__asm__ __volatile__(
+		"mov r0, %1\n"
+		"mov r1, %2\n"
+		"mov pc, %0\n"
+		:
+		: "r"(uncompress), "r"(compressed_start), "r"(len)
+		: "r0", "r1");
 }
 #else
 void barebox_pbl(uint32_t offset) {}
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 9b364bb..4135911 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -1,7 +1,14 @@
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
+
 OBJCOPYFLAGS_zbarebox.bin = -O binary
+piggy_o := piggy.$(suffix_y).o
+
+targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S \
+	   $(piggy_o) piggy.$(suffix_y)
 
-targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S
+# Make sure files are removed during clean
+extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern
 
 $(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
 	$(call if_changed,objcopy)
@@ -12,7 +19,7 @@ $(obj)/zbarebox.S: $(obj)/zbarebox FORCE
 	$(call if_changed,disasm)
 
 LDFLAGS_zbarebox	:= -Map zbarebox.map
-zbarebox-common := $(barebox-pbl-common)
+zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o)
 zbarebox-lds := $(obj)/zbarebox.lds
 
 quiet_cmd_zbarebox__ ?= LD      $@
@@ -23,3 +30,8 @@ quiet_cmd_zbarebox__ ?= LD      $@
 
 $(obj)/zbarebox: $(zbarebox-lds) $(zbarebox-common) FORCE
 	$(call if_changed,zbarebox__)
+
+$(obj)/piggy.$(suffix_y): $(obj)/../../../barebox.bin FORCE
+	$(call if_changed,$(suffix_y))
+
+$(obj)/$(piggy_o): $(obj)/piggy.$(suffix_y) FORCE
diff --git a/arch/arm/pbl/piggy.lzo.S b/arch/arm/pbl/piggy.lzo.S
new file mode 100644
index 0000000..0c0d216
--- /dev/null
+++ b/arch/arm/pbl/piggy.lzo.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl	input_data
+input_data:
+	.incbin	"arch/arm/compressed/piggy.lzo"
+	.globl	input_data_end
+input_data_end:
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:07 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:07 +0200
Subject: [PATCH 09/12] decompressor: import malloc/free implementation for
 linux 3.4
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-9-git-send-email-plagnioj@jcrosoft.com>

This is need for gunzip support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 include/linux/decompress/mm.h |   68 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 include/linux/decompress/mm.h

diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
new file mode 100644
index 0000000..0c35411
--- /dev/null
+++ b/include/linux/decompress/mm.h
@@ -0,0 +1,68 @@
+/*
+ * linux/compr_mm.h
+ *
+ * Memory management for pre-boot and ramdisk uncompressors
+ *
+ * Authors: Alain Knaff <alain at knaff.lu>
+ *
+ */
+
+#ifndef DECOMPR_MM_H
+#define DECOMPR_MM_H
+
+#ifdef STATIC
+
+/* Code active when included from pre-boot environment: */
+
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitrarily relocated (via
+ * GOT references).  This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
+/* A trivial malloc implementation, adapted from
+ *  malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ */
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
+
+static void *malloc(int size)
+{
+	void *p;
+
+	if (size < 0)
+		return NULL;
+	if (!malloc_ptr)
+		malloc_ptr = free_mem_ptr;
+
+	malloc_ptr = (malloc_ptr + 3) & ~3;     /* Align */
+
+	p = (void *)malloc_ptr;
+	malloc_ptr += size;
+
+	if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr)
+		return NULL;
+
+	malloc_count++;
+	return p;
+}
+
+static void free(void *where)
+{
+	malloc_count--;
+	if (!malloc_count)
+		malloc_ptr = free_mem_ptr;
+}
+
+#define large_malloc(a) malloc(a)
+#define large_free(a) free(a)
+
+#define INIT
+
+#endif /* STATIC */
+
+#endif /* DECOMPR_MM_H */
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:05 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:05 +0200
Subject: [PATCH 07/12] ARM: Separate assembler functions into their own section
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-7-git-send-email-plagnioj@jcrosoft.com>

From: Sascha Hauer <s.hauer at pengutronix.de>

To let the linker remove unused functions.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/lib/findbit.S |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index ef4caff..422455d 100644
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -22,6 +22,7 @@
  * Purpose  : Find a 'zero' bit
  * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit);
  */
+.section .text._find_first_zero_bit_le
 ENTRY(_find_first_zero_bit_le)
 		teq	r1, #0
 		beq	3f
@@ -43,6 +44,7 @@ ENDPROC(_find_first_zero_bit_le)
  * Purpose  : Find next 'zero' bit
  * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
  */
+.section .text._find_next_zero_bit_le
 ENTRY(_find_next_zero_bit_le)
 		teq	r1, #0
 		beq	3b
@@ -63,6 +65,7 @@ ENDPROC(_find_next_zero_bit_le)
  * Purpose  : Find a 'one' bit
  * Prototype: int find_first_bit(const unsigned long *addr, unsigned int maxbit);
  */
+.section .text._find_first_bit_le
 ENTRY(_find_first_bit_le)
 		teq	r1, #0
 		beq	3f
@@ -84,6 +87,7 @@ ENDPROC(_find_first_bit_le)
  * Purpose  : Find next 'one' bit
  * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
  */
+.section .text._find_next_bit_le
 ENTRY(_find_next_bit_le)
 		teq	r1, #0
 		beq	3b
@@ -101,6 +105,7 @@ ENDPROC(_find_next_bit_le)
 
 #ifdef __ARMEB__
 
+.section .text._find_first_zero_bit_be
 ENTRY(_find_first_zero_bit_be)
 		teq	r1, #0
 		beq	3f
@@ -118,6 +123,7 @@ ENTRY(_find_first_zero_bit_be)
 		mov	pc, lr
 ENDPROC(_find_first_zero_bit_be)
 
+.section .text._find_next_zero_bit_be
 ENTRY(_find_next_zero_bit_be)
 		teq	r1, #0
 		beq	3b
@@ -135,6 +141,7 @@ ENTRY(_find_next_zero_bit_be)
 		b	2b			@ loop for next bit
 ENDPROC(_find_next_zero_bit_be)
 
+.section .text._find_first_bit_be
 ENTRY(_find_first_bit_be)
 		teq	r1, #0
 		beq	3f
@@ -152,6 +159,7 @@ ENTRY(_find_first_bit_be)
 		mov	pc, lr
 ENDPROC(_find_first_bit_be)
 
+.section .text._find_next_bit_be
 ENTRY(_find_next_bit_be)
 		teq	r1, #0
 		beq	3b
@@ -173,6 +181,7 @@ ENDPROC(_find_next_bit_be)
 /*
  * One or more bits in the LSB of r3 are assumed to be set.
  */
+.section .text.L_found
 .L_found:
 #if __LINUX_ARM_ARCH__ >= 5
 		rsb	r0, r3, #0
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:04 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:04 +0200
Subject: [PATCH 06/12] only compress default env in uncompressed images
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-6-git-send-email-plagnioj@jcrosoft.com>

From: Sascha Hauer <s.hauer at pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/Kconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/common/Kconfig b/common/Kconfig
index 7b5a307..40f0c71 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -511,6 +511,7 @@ config DEFAULT_ENVIRONMENT
 config DEFAULT_ENVIRONMENT_COMPRESSED
 	bool
 	depends on DEFAULT_ENVIRONMENT
+	depends on !IMAGE_COMPRESSION_LZO
 	default y if ZLIB
 	default y if BZLIB
 	default y if LZO_DECOMPRESS
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:09 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:09 +0200
Subject: [PATCH 11/12] compressed image: add gzip support
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-11-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/cpu/start.c      |    4 ++++
 arch/arm/pbl/Makefile     |    1 +
 arch/arm/pbl/piggy.gzip.S |    6 ++++++
 common/Kconfig            |    3 +++
 lib/decompress_inflate.c  |    1 +
 5 files changed, 15 insertions(+)
 create mode 100644 arch/arm/pbl/piggy.gzip.S

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index f500ca8..59b33d0 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -110,6 +110,10 @@ extern void *input_data_end;
 #include "../../../lib/decompress_unlzo.c"
 #endif
 
+#ifdef CONFIG_IMAGE_COMPRESSION_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
 	void (*barebox)(void);
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 4135911..04fdffb 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -1,4 +1,5 @@
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
 suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
 
 OBJCOPYFLAGS_zbarebox.bin = -O binary
diff --git a/arch/arm/pbl/piggy.gzip.S b/arch/arm/pbl/piggy.gzip.S
new file mode 100644
index 0000000..ef3dd77
--- /dev/null
+++ b/arch/arm/pbl/piggy.gzip.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl  input_data
+input_data:
+	.incbin "arch/arm/compressed/piggy.gzip"
+	.globl  input_data_end
+input_data_end:
diff --git a/common/Kconfig b/common/Kconfig
index 40f0c71..6fee9ae 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -125,6 +125,9 @@ choice
 config IMAGE_COMPRESSION_LZO
 	bool "lzo"
 
+config IMAGE_COMPRESSION_GZIP
+	bool "gzip"
+
 endchoice
 
 endif
diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c
index 526d6a1..5c1ebb6 100644
--- a/lib/decompress_inflate.c
+++ b/lib/decompress_inflate.c
@@ -4,6 +4,7 @@
 /* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
  * errors about console_printk etc... on ARM */
 #define _LINUX_KERNEL_H
+#include <linux/decompress/mm.h>
 
 #include "zlib_inflate/inftrees.c"
 #include "zlib_inflate/inffast.c"
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 14:33:10 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 20:33:10 +0200
Subject: [PATCH 12/12] at91: add lowlevel init to the pbl
In-Reply-To: <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343413990-31891-12-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/mach-at91/Makefile |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 491c454..3ade725 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -4,6 +4,8 @@ lowlevel_init-y = at91sam926x_lowlevel_init.o
 lowlevel_init-$(CONFIG_ARCH_AT91RM9200) = at91rm9200_lowlevel_init.o
 obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y)
 
+pbl-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y)
+
 obj-$(CONFIG_AT91SAM9_RESET) += at91sam9_reset.o
 obj-$(CONFIG_AT91SAM9G45_RESET) += at91sam9g45_reset.o
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 15:15:08 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 21:15:08 +0200
Subject: [PATCH 2/2] panda: add pbl support
In-Reply-To: <1343416508-5247-1-git-send-email-plagnioj@jcrosoft.com>
References: <1343416508-5247-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343416508-5247-2-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
Hi,

	patch just compiled not test on the platfrom
	if someone can test it

	apply over the pbl patch serie

Best Regards,
J.
 arch/arm/boards/panda/Makefile |    2 ++
 arch/arm/mach-omap/Makefile    |    2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/boards/panda/Makefile b/arch/arm/boards/panda/Makefile
index c55e26e..12b4d69 100644
--- a/arch/arm/boards/panda/Makefile
+++ b/arch/arm/boards/panda/Makefile
@@ -1 +1,3 @@
 obj-y += board.o lowlevel.o mux.o
+
+pbl-y += lowlevel.o mux.o
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index dd9dd5e..e892c1c 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -30,3 +30,5 @@ obj-$(CONFIG_I2C_TWL6030) += omap4_twl6030_mmc.o
 obj-y += gpio.o
 
 pbl-$(CONFIG_ARCH_OMAP3) += omap3_core.o
+pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
+pbl-$(CONFIG_ARCH_OMAP4) += syslib.o
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Fri Jul 27 15:15:07 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 27 Jul 2012 21:15:07 +0200
Subject: [RFC PATCH 1/2] omap3: add pbl support
Message-ID: <1343416508-5247-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
Hi,

	patch just compiled not test on the platfrom
	if someone can test it

	apply over the pbl patch serie

Best Regards,
J.
 arch/arm/mach-omap/Makefile |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index 87078ae..dd9dd5e 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -28,3 +28,5 @@ obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
 obj-$(CONFIG_SHELL_NONE) += xload.o
 obj-$(CONFIG_I2C_TWL6030) += omap4_twl6030_mmc.o
 obj-y += gpio.o
+
+pbl-$(CONFIG_ARCH_OMAP3) += omap3_core.o
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Sat Jul 28 00:36:57 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sat, 28 Jul 2012 06:36:57 +0200
Subject: [PATCH 1/1] arm: add debug_ll support
Message-ID: <1343450217-17073-1-git-send-email-plagnioj@jcrosoft.com>

Today we only use the DBGU port

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/Kconfig                           |    1 +
 arch/arm/mach-at91/include/mach/debug_ll.h |   37 ++++++++++++++++++++++++++++
 2 files changed, 38 insertions(+)
 create mode 100644 arch/arm/mach-at91/include/mach/debug_ll.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 245bec8..a7f1bfb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -25,6 +25,7 @@ config ARCH_AT91
 	bool "Atmel AT91"
 	select GENERIC_GPIO
 	select CLKDEV_LOOKUP
+	select HAS_DEBUG_LL
 
 config ARCH_EP93XX
 	bool "Cirrus Logic EP93xx"
diff --git a/arch/arm/mach-at91/include/mach/debug_ll.h b/arch/arm/mach-at91/include/mach/debug_ll.h
new file mode 100644
index 0000000..ee824cb
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/debug_ll.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012
+ * Jean-Christophe PLAGNIOL-VILLARD <planioj at jcrosoft.com>
+ *
+ * Under GPLv2
+ */
+
+#ifndef __MACH_DEBUG_LL_H__
+#define __MACH_DEBUG_LL_H__
+
+#include <asm/io.h>
+#include <mach/hardware.h>
+
+#define UART_BASE	(AT91_BASE_SYS + AT91_DBGU)
+
+#define ATMEL_US_CSR		0x0014
+#define ATMEL_US_THR		0x001c
+#define ATMEL_US_TXRDY		(1 << 1)
+#define ATMEL_US_TXEMPTY	(1 << 9)
+
+/*
+ * The following code assumes the serial port has already been
+ * initialized by the bootloader.  If you didn't setup a port in
+ * your bootloader then nothing will appear (which might be desired).
+ *
+ * This does not append a newline
+ */
+static void putc(int c)
+{
+	while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXRDY))
+		barrier();
+	__raw_writel(c, UART_BASE + ATMEL_US_THR);
+
+	while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
+		barrier();
+}
+#endif
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Sat Jul 28 08:24:16 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sat, 28 Jul 2012 14:24:16 +0200
Subject: [PATCH 00/12] Add Pre-Bootloader support
Message-ID: <20120728122416.GA26655@game.jcrosoft.org>

Hi,


v2:

	add custom cppflags to pbl 
	on arm always the garbage collector

please pull
The following changes since commit 9ab50e0b9cb6400a4442acd36c3d4b315685fa6a:

  Merge branch 'for-next/tqma53' into next (2012-07-27 10:05:03 +0200)

are available in the git repository at:


  git://git.jcrosoft.org/barebox.git tags/pbl

for you to fetch changes up to 218db83678fa1602ac7ad7fe6946692d67976895:

  arm: allays enable the garbage collector for pbl (2012-07-28 20:14:45 +0800)

----------------------------------------------------------------
Add pre-bootloader (pbl) image support

This allows for creating a pre-bootloader binary for
 - nand boot
 - mmc boot
 - compressed image

Currently on the compressed image is implemented the boot really on current lowlevel
init support. In a second step this could be move to the pbl c code with generic framework.

The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.

The decompressor support lzo and gzip and allow to add easly more.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (11):
      kbuild: Init all relevant variables used in kbuild files so
      kbuild: add pre-bootloader (pbl) target
      Add pre-bootloader (pbl) image support
      pbl: discard unwind symbol if enable in barebox
      decompress_unlzo: define decompress_unlzo as decompress
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed image: add gzip support
      at91: add lowlevel init to the pbl
      kbuild: allow to have custom cppflags for pbl
      arm: allays enable the garbage collector for pbl

Sascha Hauer (3):
      Add compressed image support
      only compress default env in uncompressed images
      ARM: Separate assembler functions into their own section

 Makefile                            |   11 ++++--
 arch/arm/Kconfig                    |    2 ++
 arch/arm/Makefile                   |    8 +++++
 arch/arm/cpu/Makefile               |    1 +
 arch/arm/cpu/start.c                |  113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---
 arch/arm/lib/Makefile               |    4 +++
 arch/arm/lib/barebox.lds.S          |    3 +-
 arch/arm/lib/findbit.S              |    9 +++++
 arch/arm/mach-at91/Makefile         |    2 ++
 arch/arm/pbl/Makefile               |   40 ++++++++++++++++++++++
 arch/arm/pbl/piggy.gzip.S           |    6 ++++
 arch/arm/pbl/piggy.lzo.S            |    6 ++++
 arch/arm/pbl/zbarebox.lds.S         |   74 ++++++++++++++++++++++++++++++++++++++++
 common/Kconfig                      |   34 +++++++++++++++++++
 include/asm-generic/memory_layout.h |    1 +
 include/linux/decompress/mm.h       |   68 +++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c            |    1 +
 lib/decompress_unlzo.c              |    1 +
 pbl/Makefile                        |    5 +++
 pbl/misc.c                          |   14 ++++++++
 pbl/string.c                        |  127 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 scripts/Makefile.build              |   75 ++++++++++++++++++++++++++++++++++++++---
 scripts/Makefile.lib                |   14 ++++++++
 23 files changed, 607 insertions(+), 12 deletions(-)
 create mode 100644 arch/arm/pbl/Makefile
 create mode 100644 arch/arm/pbl/piggy.gzip.S
 create mode 100644 arch/arm/pbl/piggy.lzo.S
 create mode 100644 arch/arm/pbl/zbarebox.lds.S
 create mode 100644 include/linux/decompress/mm.h
 create mode 100644 pbl/Makefile
 create mode 100644 pbl/misc.c
 create mode 100644 pbl/string.c
Best Regards,
J.


From plagnioj at jcrosoft.com  Sat Jul 28 08:27:51 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sat, 28 Jul 2012 14:27:51 +0200
Subject: [PATCH 14/15] kbuild: allow to have custom cppflags for pbl
In-Reply-To: <20120728122416.GA26655@game.jcrosoft.org>
References: <20120728122416.GA26655@game.jcrosoft.org>
Message-ID: <1343478472-19041-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 scripts/Makefile.build |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index e5b7779..0471a46 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -188,7 +188,7 @@ quiet_cmd_pbl_cc_o_c = PBLCC   $@
 
 ifndef CONFIG_MODVERSIONS
 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
-cmd_pbl_cc_o_c = $(CC) -D__PBL__ $(c_flags) -c -o $@ $<
+cmd_pbl_cc_o_c = $(CC) -D__PBL__ $(c_flags) $(PBL_CPPFLAGS) -c -o $@ $<
 
 else
 # When module versioning is enabled the following steps are executed:
@@ -279,7 +279,7 @@ cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 	$(call if_changed_dep,as_s_S)
 
 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
-cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
+cmd_as_o_S       = $(CC) $(a_flags) $(PBL_CPPFLAGS) -c -o $@ $<
 
 quiet_cmd_pbl_as_o_S = PBLAS   $@
 cmd_pbl_as_o_S       = $(CC) -D__PBL__ $(a_flags) -c -o $@ $<
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Sat Jul 28 08:27:52 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sat, 28 Jul 2012 14:27:52 +0200
Subject: [PATCH 15/15] arm: allays enable the garbage collector for pbl
In-Reply-To: <1343478472-19041-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120728122416.GA26655@game.jcrosoft.org>
 <1343478472-19041-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343478472-19041-2-git-send-email-plagnioj@jcrosoft.com>

This allow to save arround 1KiB on at91

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/pbl/Makefile |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 04fdffb..143da8b 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -19,7 +19,9 @@ $(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
 $(obj)/zbarebox.S: $(obj)/zbarebox FORCE
 	$(call if_changed,disasm)
 
+PBL_CPPFLAGS		+= -fdata-sections -ffunction-sections
 LDFLAGS_zbarebox	:= -Map zbarebox.map
+LDFLAGS_zbarebox	+= -static --gc-sections
 zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o)
 zbarebox-lds := $(obj)/zbarebox.lds
 
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:42 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:42 +0200
Subject: [PATCHv2] Add the Samsung S3C6410 SoC to Barebox
Message-ID: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>

This patch series adds support for the Samsung's S3C6410 ARMv11 SoC
and with this main support also two popular platforms which are using this
SoC: FriendlyARM's Mini6410 and Tiny6410.

These patches are based on the 'master' branch and thus suffer on a missing
adpation in the Samsung serial driver, which is part of the 'next' branch.

I would wait until the 'next' branch gets merged into 'master' while the next
release and then re-send the required changes for the serial driver to make
the serial console work with this new SoC.

Comments are still welcome.

Regards,
Juergen

The following changes since commit e8bbacab05d8a8e7e86e31e9208457409bcbb1b0:

  i2c: fix printf format specifier (2012-07-26 12:41:55 +0200)

are available in the git repository at:

  git://git.pengutronix.de/git/jbe/barebox.git s3c6410_2nd_try_for_inclusion

for you to fetch changes up to 4043fe98bb117399ca9e64c64e38e3bfe64212e2:

  ARM/Samsung: add the Tiny6410 platform as a user of the S3C6410 SoC (2012-07-28 16:31:26 +0200)

----------------------------------------------------------------
Juergen Beisert (8):
      ARM/Samsung: add S3C6410 SoC iomap
      ARM/Samsung: adapt the generic timer driver to support the S3C6410 SoC
      ARM/Samsung: add the clock tree support for the S3C6410 SoC
      ARM/Samsung: add GPIO handling support for the S3C6410 SoC
      ARM/Samsung: add generic S3C6410 SoC specific functions
      ARM/Samsung: add the S3C6410 SoC
      ARM/Samsung: add the Mini6410 platform as a user of the S3C6410 SoC
      ARM/Samsung: add the Tiny6410 platform as a user of the S3C6410 SoC

 arch/arm/Kconfig                                   |    6 +
 arch/arm/Makefile                                  |    2 +
 arch/arm/boards/friendlyarm-mini6410/Makefile      |    1 +
 arch/arm/boards/friendlyarm-mini6410/config.h      |    8 +
 arch/arm/boards/friendlyarm-mini6410/env/config    |   56 ++
 arch/arm/boards/friendlyarm-mini6410/mini6410.c    |  305 +++++++++++
 arch/arm/boards/friendlyarm-tiny6410/Kconfig       |   19 +
 arch/arm/boards/friendlyarm-tiny6410/Makefile      |    3 +
 arch/arm/boards/friendlyarm-tiny6410/config.h      |    8 +
 .../friendlyarm-tiny6410/development-board.c       |  100 ++++
 arch/arm/boards/friendlyarm-tiny6410/env/config    |   56 ++
 arch/arm/boards/friendlyarm-tiny6410/tiny6410.c    |   80 +++
 arch/arm/boards/friendlyarm-tiny6410/tiny6410.h    |   14 +
 arch/arm/configs/friendlyarm_mini6410_defconfig    |   40 ++
 arch/arm/configs/friendlyarm_tiny6410_defconfig    |   41 ++
 arch/arm/mach-samsung/Kconfig                      |   40 ++
 arch/arm/mach-samsung/Makefile                     |    1 +
 arch/arm/mach-samsung/clocks-s3c64xx.c             |  338 ++++++++++++
 arch/arm/mach-samsung/gpio-s3c64xx.c               |  301 +++++++++++
 .../mach-samsung/include/mach/devices-s3c64xx.h    |   40 ++
 arch/arm/mach-samsung/include/mach/gpio.h          |    3 +
 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h |  542 ++++++++++++++++++++
 arch/arm/mach-samsung/include/mach/s3c-clocks.h    |    3 +
 arch/arm/mach-samsung/include/mach/s3c-generic.h   |   17 +
 arch/arm/mach-samsung/include/mach/s3c-iomap.h     |    3 +
 .../arm/mach-samsung/include/mach/s3c64xx-clocks.h |   67 +++
 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h |   51 ++
 arch/arm/mach-samsung/mem-s3c64xx.c                |   66 +++
 arch/arm/mach-samsung/s3c-timer.c                  |   17 +-
 29 files changed, 2224 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/Makefile
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/config.h
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/env/config
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/mini6410.c
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/Kconfig
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/Makefile
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/config.h
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/development-board.c
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/env/config
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/tiny6410.c
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/tiny6410.h
 create mode 100644 arch/arm/configs/friendlyarm_mini6410_defconfig
 create mode 100644 arch/arm/configs/friendlyarm_tiny6410_defconfig
 create mode 100644 arch/arm/mach-samsung/clocks-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/gpio-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c64xx.h
 create mode 100644 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h
 create mode 100644 arch/arm/mach-samsung/mem-s3c64xx.c



From jbe at pengutronix.de  Sat Jul 28 11:10:48 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:48 +0200
Subject: [PATCH 6/8] ARM/Samsung: add the S3C6410 SoC
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-7-git-send-email-jbe@pengutronix.de>

After adding the base support, the SoC can now be enabled in the build system.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Kconfig              |    6 ++++++
 arch/arm/mach-samsung/Kconfig |    9 +++++++++
 2 files changed, 15 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index af4cb59..af937d1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -79,6 +79,12 @@ config ARCH_S5PCxx
 	select CPU_V7
 	select GENERIC_GPIO
 
+config ARCH_S3C64xx
+	bool "Samsung S3C64xx"
+	select ARCH_SAMSUNG
+	select CPU_V6
+	select GENERIC_GPIO
+
 config ARCH_VERSATILE
 	bool "ARM Versatile boards (ARM926EJ-S)"
 	select CPU_ARM926T
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index c60f5ed..7e41880 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -17,6 +17,8 @@ config BOARDINFO
 config ARCH_BAREBOX_MAX_BARE_INIT_SIZE
 	hex
 	default 0x1ff0 if ARCH_S5PCxx
+# TODO
+	default 0x2000 if ARCH_S3C64xx
 
 if ARCH_S3C24xx
 
@@ -84,6 +86,13 @@ endmenu
 
 endif
 
+if ARCH_S3C64xx
+
+config CPU_S3C6410
+	bool
+
+endif
+
 if ARCH_S5PCxx
 
 config CPU_S5PC110
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:43 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:43 +0200
Subject: [PATCH 1/8] ARM/Samsung: add S3C6410 SoC iomap
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-2-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/include/mach/s3c-iomap.h     |    3 ++
 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h |   51 ++++++++++++++++++++
 2 files changed, 54 insertions(+)
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h

diff --git a/arch/arm/mach-samsung/include/mach/s3c-iomap.h b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
index d34ace4..09a6891 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-iomap.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-iomap.h
@@ -22,6 +22,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/s3c24xx-iomap.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/s3c64xx-iomap.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/s5pcxx-iomap.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h b/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h
new file mode 100644
index 0000000..9cc3a1b
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/s3c64xx-iomap.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* S3C64xx device base addresses */
+#define S3C_SROM_SFR		0x70000000
+#define S3C_NAND_BASE		0x70200000
+#define S3C_SDI0_BASE		0x7c200000
+#define S3C_SDI0_SIZE		0x100
+#define S3C_SDI1_BASE		0x7c300000
+#define S3C_SDI1_SIZE		0x100
+#define S3C_SDI2_BASE		0x7c400000
+#define S3C_SDI2_SIZE		0x100
+#define S3C_DRAMC		0x7e001000
+#define S3C_WATCHDOG_BASE	0x7e004000
+#define S3C_CLOCK_POWER_BASE	0x7e00f000
+#define S3C_UART_BASE		0x7f005000
+#define S3C_TIMER_BASE		0x7f006000
+#define S3C_GPIO_BASE		0x7f008000
+
+#define S3C_UART1_BASE (S3C_UART_BASE)
+#define S3C_UART1_SIZE 0x400
+#define S3C_UART2_BASE (S3C_UART_BASE + 0x400)
+#define S3C_UART2_SIZE 0x400
+#define S3C_UART3_BASE (S3C_UART_BASE + 0x800)
+#define S3C_UART3_SIZE 0x400
+#define S3C_UART4_BASE (S3C_UART_BASE + 0xc00)
+#define S3C_UART4_SIZE 0x400
+
+#define S3C_SDRAM_BASE 0x50000000
+#define S3C_SDRAM_END (S3C_SDRAM_BASE + 0x10000000)
+
+#define S3C_SROM_BW (S3C_SROM_SFR)
+#define S3C_SROM_BC0 (S3C_SROM_SFR + 4)
+
+#define S3C_CS0_BASE 0x10000000
+#define S3C_CS1_BASE 0x18000000
+#define S3C_CS2_BASE 0x20000000
+#define S3C_CS3_BASE 0x28000000
+#define S3C_CS4_BASE 0x30000000
+#define S3C_CS5_BASE 0x38000000
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:44 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:44 +0200
Subject: [PATCH 2/8] ARM/Samsung: adapt the generic timer driver to support
 the S3C6410 SoC
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-3-git-send-email-jbe@pengutronix.de>

The S3C64XX SoC has a real 32 bit counter, but almost the same style of
registers. It's enough to change the parameters, to get the routines work on
this SoC.

TODO: what about the S5P SoCs?

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/s3c-timer.c |   17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-samsung/s3c-timer.c b/arch/arm/mach-samsung/s3c-timer.c
index 6665c8c..271f97d 100644
--- a/arch/arm/mach-samsung/s3c-timer.c
+++ b/arch/arm/mach-samsung/s3c-timer.c
@@ -37,11 +37,20 @@
 #define S3C_TCNTB4 (S3C_TIMER_BASE + 0x3c)
 #define S3C_TCNTO4 (S3C_TIMER_BASE + 0x40)
 
-#define TIMER_WIDTH 16
-#define TIMER_SHIFT 10
-#define PRE_MUX 3
-#define PRE_MUX_ADD 1
+#ifdef CONFIG_ARCH_S3C24xx
+# define TIMER_WIDTH 16
+# define TIMER_SHIFT 10
+# define PRE_MUX 3
+# define PRE_MUX_ADD 1
 static const uint32_t max = 0x0000ffff;
+#endif
+#ifdef CONFIG_ARCH_S3C64xx
+# define TIMER_WIDTH 32
+# define TIMER_SHIFT 10
+# define PRE_MUX 4
+# define PRE_MUX_ADD 0
+static const uint32_t max = ~0;
+#endif
 
 static void s3c_init_t4_clk_source(void)
 {
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:47 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:47 +0200
Subject: [PATCH 5/8] ARM/Samsung: add generic S3C6410 SoC specific functions
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-6-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    2 +-
 .../mach-samsung/include/mach/devices-s3c64xx.h    |   40 ++++++++++++
 arch/arm/mach-samsung/include/mach/s3c-generic.h   |   17 +++++
 arch/arm/mach-samsung/mem-s3c64xx.c                |   66 ++++++++++++++++++++
 4 files changed, 124 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-samsung/include/mach/devices-s3c64xx.h
 create mode 100644 arch/arm/mach-samsung/mem-s3c64xx.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 70489da..4df1887 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -2,6 +2,6 @@ obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o
+obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o mem-s3c64xx.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/include/mach/devices-s3c64xx.h b/arch/arm/mach-samsung/include/mach/devices-s3c64xx.h
new file mode 100644
index 0000000..bcbee97
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/devices-s3c64xx.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef INCLUDE_MACH_DEVICES_S3C64XX_H
+# define INCLUDE_MACH_DEVICES_S3C64XX_H
+
+#include <driver.h>
+#include <mach/s3c64xx-iomap.h>
+
+static inline void s3c64xx_add_uart1(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
+			S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
+}
+
+static inline void s3c64xx_add_uart2(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART2_BASE,
+			S3C_UART2_SIZE, IORESOURCE_MEM, NULL);
+}
+
+static inline void s3c64xx_add_uart3(void)
+{
+	add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART3_BASE,
+			S3C_UART3_SIZE, IORESOURCE_MEM, NULL);
+}
+
+#endif /* INCLUDE_MACH_DEVICES_S3C64XX_H */
diff --git a/arch/arm/mach-samsung/include/mach/s3c-generic.h b/arch/arm/mach-samsung/include/mach/s3c-generic.h
index 11b083d..b11e8e3 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-generic.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-generic.h
@@ -41,3 +41,20 @@ void s3c24xx_disable_second_sdram_bank(void);
 #ifdef CONFIG_ARCH_S5PCxx
 void s5p_init_pll(void);
 #endif
+
+#ifdef CONFIG_ARCH_S3C64xx
+unsigned s3c_set_epllclk(unsigned, unsigned, unsigned, unsigned);
+uint32_t s3c_get_epllclk(void);
+unsigned s3c_get_hsmmc_clk(int);
+void s3c_set_hsmmc_clk(int, int, unsigned);
+unsigned s3c6410_get_memory_size(void);
+struct s3c6410_chipselect {
+	unsigned adr_setup_t; /* in [ns] */
+	unsigned access_setup_t; /* in [ns] */
+	unsigned access_t; /* in [ns] */
+	unsigned cs_hold_t; /* in [ns] */
+	unsigned adr_hold_t; /* in [ns] */
+	unsigned char width; /* 8 or 16 */
+};
+int s3c6410_setup_chipselect(int, const struct s3c6410_chipselect*);
+#endif
diff --git a/arch/arm/mach-samsung/mem-s3c64xx.c b/arch/arm/mach-samsung/mem-s3c64xx.c
new file mode 100644
index 0000000..aca2cf5
--- /dev/null
+++ b/arch/arm/mach-samsung/mem-s3c64xx.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <io.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+
+#define S3C_DRAMC_CHIP_0_CFG (S3C_DRAMC + 0x200)
+
+/* note: this routine honors the first memory bank only */
+unsigned s3c6410_get_memory_size(void)
+{
+	unsigned reg = readl(S3C_DRAMC_CHIP_0_CFG) & 0xff;
+
+	return ~(reg << 24) + 1;
+}
+
+/* configure the timing of one of the available external chip select lines */
+int s3c6410_setup_chipselect(int no, const struct s3c6410_chipselect *c)
+{
+	unsigned per_t = 1000000000 / s3c_get_hclk();
+	unsigned tacs, tcos, tacc, tcoh, tcah, shift;
+	uint32_t reg;
+
+	/* start of cycle to chip select assertion (= address/data setup) */
+	tacs = DIV_ROUND_UP(c->adr_setup_t, per_t);
+	/* start of CS to read/write assertion (= access setup) */
+	tcos = DIV_ROUND_UP(c->access_setup_t, per_t);
+	/* length of read/write assertion (= access lenght) */
+	tacc = DIV_ROUND_UP(c->access_t, per_t) - 1;
+	/* CS hold after access is finished */
+	tcoh = DIV_ROUND_UP(c->cs_hold_t, per_t);
+	/* adress/data hold after CS is deasserted */
+	tcah = DIV_ROUND_UP(c->adr_hold_t, per_t);
+
+	shift = no * 4;
+	reg = readl(S3C_SROM_BW) & ~(0xf << shift);
+	if (c->width == 16)
+		reg |= 0x1 << shift;
+	writel(reg, S3C_SROM_BW);
+#ifdef DEBUG
+	if (tacs > 15 || tcos > 15 || tacc > 31 || tcoh > 15 || tcah > 15) {
+		pr_err("At least one of the timings are invalid\n");
+		return -EINVAL;
+	}
+	pr_info("Will write 0x%08X\n", tacs << 28 | tcos << 24 | tacc << 16 |
+					tcoh << 12 | tcah << 8);
+#endif
+	writel(tacs << 28 | tcos << 24 | tacc << 16 | tcoh << 12 | tcah << 8,
+						S3C_SROM_BC0 + shift);
+
+	return 0;
+}
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:50 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:50 +0200
Subject: [PATCH 8/8] ARM/Samsung: add the Tiny6410 platform as a user of the
 S3C6410 SoC
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-9-git-send-email-jbe@pengutronix.de>

The Tiny6410 and its base board is a pure development platform.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/friendlyarm-tiny6410/Kconfig       |   19 ++++
 arch/arm/boards/friendlyarm-tiny6410/Makefile      |    3 +
 arch/arm/boards/friendlyarm-tiny6410/config.h      |    8 ++
 .../friendlyarm-tiny6410/development-board.c       |  100 ++++++++++++++++++++
 arch/arm/boards/friendlyarm-tiny6410/env/config    |   56 +++++++++++
 arch/arm/boards/friendlyarm-tiny6410/tiny6410.c    |   80 ++++++++++++++++
 arch/arm/boards/friendlyarm-tiny6410/tiny6410.h    |   14 +++
 arch/arm/configs/friendlyarm_tiny6410_defconfig    |   41 ++++++++
 arch/arm/mach-samsung/Kconfig                      |   15 +++
 10 files changed, 337 insertions(+)
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/Kconfig
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/Makefile
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/config.h
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/development-board.c
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/env/config
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/tiny6410.c
 create mode 100644 arch/arm/boards/friendlyarm-tiny6410/tiny6410.h
 create mode 100644 arch/arm/configs/friendlyarm_tiny6410_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bd03fe6..ab3f730 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -124,6 +124,7 @@ board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
 board-$(CONFIG_MACH_GUF_CUPID)			:= guf-cupid
 board-$(CONFIG_MACH_MINI2440)			:= mini2440
 board-$(CONFIG_MACH_MINI6410)			:= friendlyarm-mini6410
+board-$(CONFIG_MACH_TINY6410)			:= friendlyarm-tiny6410
 board-$(CONFIG_MACH_QIL_A9260)			:= qil-a9260
 board-$(CONFIG_MACH_TNY_A9260)			:= tny-a926x
 board-$(CONFIG_MACH_TNY_A9263)			:= tny-a926x
diff --git a/arch/arm/boards/friendlyarm-tiny6410/Kconfig b/arch/arm/boards/friendlyarm-tiny6410/Kconfig
new file mode 100644
index 0000000..374820f
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/Kconfig
@@ -0,0 +1,19 @@
+if MACH_TINY6410
+
+choice
+	prompt "FriendlyARM Tiny6410 baseboard"
+	help
+	  Since the Tiny6410 is a CPU card only, it requires a basebord to make
+	  it work. Select here the baseboard Barebox should expect and
+	  configure.
+
+config MACH_TINY6410_FA
+	bool
+	select HAS_DM9000
+	prompt "FA development platform"
+	help
+	  FriendlyARM's Tiny6410 evaluation board.
+
+endchoice
+
+endif
diff --git a/arch/arm/boards/friendlyarm-tiny6410/Makefile b/arch/arm/boards/friendlyarm-tiny6410/Makefile
new file mode 100644
index 0000000..b3ab12e
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/Makefile
@@ -0,0 +1,3 @@
+obj-y += tiny6410.o
+
+obj-$(CONFIG_MACH_TINY6410_FA) += development-board.o
diff --git a/arch/arm/boards/friendlyarm-tiny6410/config.h b/arch/arm/boards/friendlyarm-tiny6410/config.h
new file mode 100644
index 0000000..04f6857
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/config.h
@@ -0,0 +1,8 @@
+/* FriendlyARM Tiny6410 specific global settings */
+
+#ifndef _TINY6410_CONFIG_H_
+# define _TINY6410_CONFIG_H_
+
+#define S3C64XX_CLOCK_REFERENCE 12000000
+
+#endif /* _TINY6410_CONFIG_H_ */
diff --git a/arch/arm/boards/friendlyarm-tiny6410/development-board.c b/arch/arm/boards/friendlyarm-tiny6410/development-board.c
new file mode 100644
index 0000000..5595900
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/development-board.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * The FriendlyARM's Tiny6410 evaluation board comes with all connectors and
+ * devices to make the Tiny6410 CPU card work. This includes:
+ *
+ * - the DM9000 network controller
+ * - USB/MCI connectors
+ * - display connector
+ *
+ */
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <gpio.h>
+#include <dm9000.h>
+#include <mach/devices-s3c64xx.h>
+#include <mach/s3c-generic.h>
+
+#include "tiny6410.h"
+
+/*
+ * dm9000 network controller onboard
+ * Connected to CS line 1 and interrupt line EINT7,
+ * data width is 16 bit
+ * Area 1: Offset 0x300...0x301
+ * Area 2: Offset 0x304...0x305
+ */
+static struct dm9000_platform_data dm9000_data = {
+	.srom = 0,	/* no serial ROM for the ethernet address */
+};
+
+static const struct s3c6410_chipselect dm900_cs = {
+	.adr_setup_t = 0,
+	.access_setup_t = 0,
+	.access_t = 20,
+	.cs_hold_t = 3,
+	.adr_hold_t = 20, /* CS must be de-asserted for at least 20 ns */
+	.width = 16,
+};
+
+static void tiny6410evk_setup_dm9000_cs(void)
+{
+	s3c6410_setup_chipselect(1, &dm900_cs);
+}
+
+static const unsigned tiny6410evk_pin_usage[] = {
+	/* UART1 (V24) */
+	GPA4_RXD1 | ENABLE_PU,
+	GPA5_TXD1,
+	GPA6_NCTS1 | ENABLE_PU,
+	GPA7_NRTS1,
+	/* UART2 (V24) */
+	GPB0_RXD2 | ENABLE_PU,
+	GPB1_TXD2,
+	/* UART3 (spare, 3,3 V TTL level only) */
+	GPB2_RXD3 | ENABLE_PU,
+	GPB3_TXD3,
+};
+
+static int tiny6410evk_devices_init(void)
+{
+	int i;
+
+	/* init CPU card specific devices first */
+	tiny6410_init("FA EVK");
+
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(tiny6410evk_pin_usage); i++)
+		s3c_gpio_mode(tiny6410evk_pin_usage[i]);
+
+	tiny6410evk_setup_dm9000_cs();
+	add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
+				IORESOURCE_MEM_16BIT, &dm9000_data);
+	return 0;
+}
+device_initcall(tiny6410evk_devices_init);
+
+static int tiny6410evk_console_init(void)
+{
+	/* note: UART0 has no RTS/CTS connected */
+	s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU);
+	s3c_gpio_mode(GPA1_TXD0);
+
+	s3c64xx_add_uart1();
+
+	return 0;
+}
+console_initcall(tiny6410evk_console_init);
+
diff --git a/arch/arm/boards/friendlyarm-tiny6410/env/config b/arch/arm/boards/friendlyarm-tiny6410/env/config
new file mode 100644
index 0000000..35d0fac
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/env/config
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+machine=tiny6410
+eth0.serverip=a.b.c.d.e
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d.e
+#eth0.netmask=a.b.c.d.e
+#eth0.gateway=a.b.c.d.e
+eth0.ethaddr=08:90:90:90:90:90
+
+# can be either 'nfs', 'tftp' or 'nand'
+kernel_loc=tftp
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-${machine}.${rootfs_type}
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-${machine}
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+	kernelimage="${user}"-"${kernelimage}"
+	nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
+	rootfsimage="${user}"-"${rootfsimage}"
+else
+	nfsroot="${eth0.serverip}:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+#
+# "tiny6410" kernel parameter
+# 0 .. 9 = screen type
+# i = touchscreen with propritary FriendlyARM protocol
+# Note: can be "tiny6410= " if nothing of these components are connected
+#
+bootargs="console=ttySAC0,115200 tiny6410=0"
+
+nand_device="nand"
+nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nand=3
diff --git a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c
new file mode 100644
index 0000000..db13c06
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <gpio.h>
+#include <generated/mach-types.h>
+#include <asm/armlinux.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+
+static const unsigned tiny6410_pin_usage[] = {
+	/* UART0 */
+	GPA2_GPIO | GPIO_IN | ENABLE_PU, /* CTS not connected */
+	GPA3_GPIO | GPIO_IN | ENABLE_PU, /* RTS not connected */
+
+	/* local bus' D0 ... D15 are always active */
+	/* local bus' A0...A5 are always active */
+
+	/* internal NAND memory */
+	GPO0_NCS2,	/* NAND's first chip select line */
+	/* NAND's second chip select line, not used */
+	GPO1_GPIO | GPIO_OUT | GPIO_VAL(1),
+	GPP3_FALE,
+	GPP4_FCLE,
+	GPP5_FWE,
+	GPP6_FRE,
+	GPP7_RNB, /* external pull-up */
+
+	GPF13_GPIO  | GPIO_OUT | GPIO_VAL(0), /* OTG power supply, 0 = off */
+
+	/* nowhere connected */
+	GPO2_GPIO | GPIO_IN | ENABLE_PU,
+	GPO3_GPIO | GPIO_IN | ENABLE_PU,
+	GPO4_GPIO | GPIO_IN | ENABLE_PU,
+	GPO5_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* local bus address lines 6...15 are nowhere connected */
+	GPO6_GPIO | GPIO_IN | ENABLE_PU,
+	GPO7_GPIO | GPIO_IN | ENABLE_PU,
+	GPO8_GPIO | GPIO_IN | ENABLE_PU,
+	GPO9_GPIO | GPIO_IN | ENABLE_PU,
+	GPO10_GPIO | GPIO_IN | ENABLE_PU,
+	GPO11_GPIO | GPIO_IN | ENABLE_PU,
+	GPO12_GPIO | GPIO_IN | ENABLE_PU,
+	GPO13_GPIO | GPIO_IN | ENABLE_PU,
+	GPO14_GPIO | GPIO_IN | ENABLE_PU,
+	GPO15_GPIO | GPIO_IN | ENABLE_PU,
+};
+
+static int tiny6410_mem_init(void)
+{
+	arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c6410_get_memory_size());
+
+	return 0;
+}
+mem_initcall(tiny6410_mem_init);
+
+void tiny6410_init(const char *bb_name)
+{
+	int i;
+
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(tiny6410_pin_usage); i++)
+		s3c_gpio_mode(tiny6410_pin_usage[i]);
+
+	armlinux_set_bootparams((void *)S3C_SDRAM_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_TINY6410);
+}
diff --git a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h
new file mode 100644
index 0000000..98db422
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h
@@ -0,0 +1,14 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* to be called by the base board */
+void tiny6410_init(const char*);
diff --git a/arch/arm/configs/friendlyarm_tiny6410_defconfig b/arch/arm/configs/friendlyarm_tiny6410_defconfig
new file mode 100644
index 0000000..5246196
--- /dev/null
+++ b/arch/arm/configs/friendlyarm_tiny6410_defconfig
@@ -0,0 +1,41 @@
+CONFIG_ARCH_S3C64xx=y
+CONFIG_MACH_TINY6410=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_BROKEN=y
+CONFIG_PROMPT="tiny6410:"
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_PARTITION_DISK=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/friendlyarm-tiny6410/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_DRIVER_NET_DM9K=y
+# CONFIG_SPI is not set
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 3ee8c38..8965110 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -7,12 +7,14 @@ config ARCH_TEXT_BASE
 	hex
 	default 0x31fc0000 if MACH_MINI2440
 	default 0x57fc0000 if MACH_MINI6410
+	default 0x57fc0000 if MACH_TINY6410
 	default 0x31fc0000 if MACH_A9M2440
 	default 0x31fc0000 if MACH_A9M2410
 
 config BOARDINFO
 	default "Mini 2440"    if MACH_MINI2440
 	default "Mini 6410"    if MACH_MINI6410
+	default "Tiny 6410"    if MACH_TINY6410
 	default "Digi A9M2440" if MACH_A9M2440
 	default "Digi A9M2410" if MACH_A9M2410
 
@@ -105,8 +107,21 @@ config MACH_MINI6410
 	  Say Y here if you are using FriendlyARM Mini6410 board equipped
 	  with a Samsung S3C6410 Processor
 
+config MACH_TINY6410
+	bool "Tiny 6410"
+	select CPU_S3C6410
+	help
+	  Say Y here if you are using FriendlyARM Tiny6410 CPU card equipped
+	  with a Samsung S3C6410 Processor
+
 endchoice
 
+menu "Board specific settings       "
+
+source arch/arm/boards/friendlyarm-tiny6410/Kconfig
+
+endmenu
+
 endif
 
 if ARCH_S5PCxx
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:46 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:46 +0200
Subject: [PATCH 4/8] ARM/Samsung: add GPIO handling support for the S3C6410 SoC
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-5-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    2 +-
 arch/arm/mach-samsung/gpio-s3c64xx.c               |  301 +++++++++++
 arch/arm/mach-samsung/include/mach/gpio.h          |    3 +
 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h |  542 ++++++++++++++++++++
 4 files changed, 847 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-samsung/gpio-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 71dc0de..70489da 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -2,6 +2,6 @@ obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
-obj-$(CONFIG_ARCH_S3C64xx) += clocks-s3c64xx.o
+obj-$(CONFIG_ARCH_S3C64xx) += gpio-s3c64xx.o clocks-s3c64xx.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/gpio-s3c64xx.c b/arch/arm/mach-samsung/gpio-s3c64xx.c
new file mode 100644
index 0000000..ee68261
--- /dev/null
+++ b/arch/arm/mach-samsung/gpio-s3c64xx.c
@@ -0,0 +1,301 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This code bases partially on code from the Linux kernel:
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *	http://armlinux.simtec.co.uk/
+ *	Ben Dooks <ben at simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <io.h>
+#include <gpio.h>
+#include <mach/s3c-iomap.h>
+
+#define S3C_GPACON (S3C_GPIO_BASE)
+#define S3C_GPADAT (S3C_GPIO_BASE + 0x04)
+#define S3C_GPAPUD (S3C_GPIO_BASE + 0x08)
+
+static const unsigned short group_offset[] = {
+	0x000,	/* GPA */ /* 8 pins, 4 bit each */
+	0x020,	/* GPB */ /* 7 pins, 4 bit each */
+	0x040,	/* GPC */ /* 8 pins, 4 bit each */
+	0x060,	/* GPD */ /* 5 pins, 4 bit each */
+	0x080,	/* GPE */ /* 5 pins, 4 bit each */
+	0x0a0,	/* GPF */ /* 16 pins, 2 bit each */
+	0x0c0,	/* GPG */ /* 7 pins, 4 bit each */
+	0x0e0,	/* GPH */ /* two registers, 8 + 2 pins, 4 bit each */
+	0x100,	/* GPI */ /* 16 pins, 2 bit each */
+	0x120,	/* GPJ */ /* 12 pins, 2 bit each */
+	0x800,	/* GPK */ /* two registers, 8 + 8 pins, 4 bit each */
+	0x810,	/* GPL */ /* two registers, 8 + 8 pins, 4 bit each */
+	0x820,	/* GPM */ /* 6 pins, 4 bit each */
+	0x830,	/* GPN */ /* 16 pins, 2 bit each */
+	0x140,	/* GPO */ /* 16 pins, 2 bit each */
+	0x160,	/* GPP */ /* 15 pins, 2 bit each */
+	0x180,	/* GPQ */ /* 9 pins, 2 bit each */
+};
+
+void gpio_set_value(unsigned gpio, int value)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+	uint32_t reg;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		offset += 4;
+		break;
+	}
+
+	reg = readl(S3C_GPADAT + offset);
+	reg &= ~(1 << bit);
+	reg |= (!!value) << bit;
+	writel(reg, S3C_GPADAT + offset);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+	uint32_t reg;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		offset += 4;
+		break;
+	}
+
+	/* value */
+	reg = readl(S3C_GPADAT + offset);
+
+	return !!(reg & (1 << bit));
+}
+
+static void gpio_direction_input_4b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	if (bit > 31) {
+		offset += 4;
+		bit -= 32;
+	}
+
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	writel(reg, S3C_GPACON + offset); /* b0000 means 'GPIO input' */
+}
+
+static void gpio_direction_input_2b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	writel(reg, S3C_GPACON + offset); /* b00 means 'GPIO input' */
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+
+	offset = group_offset[group];
+
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		gpio_direction_input_2b(offset, bit << 1);
+		break;
+	default:
+		gpio_direction_input_4b(offset, bit << 2);
+	}
+
+	return 0;
+}
+
+static void gpio_direction_output_4b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	if (bit > 31) {
+		offset += 4;
+		bit -= 32;
+	}
+
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	reg |= 0x1 << bit;
+	writel(reg, S3C_GPACON + offset); /* b0001 means 'GPIO output' */
+}
+
+static void gpio_direction_output_2b(unsigned offset, unsigned bit)
+{
+	uint32_t reg;
+
+	/* direction */
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	reg |= 0x1 << bit;
+	writel(reg, S3C_GPACON + offset);
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+	unsigned group = GET_GROUP(gpio);
+	unsigned bit = GET_BIT(gpio);
+	unsigned offset;
+
+	gpio_set_value(gpio, value);
+
+	offset = group_offset[group];
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		gpio_direction_output_2b(offset, bit << 1);
+		break;
+	default:
+		gpio_direction_output_4b(offset, bit << 2);
+	}
+
+	return 0;
+}
+
+/* one register, 2 bits per function -> GPF, GPI, GPJ, GPN, GPO, GPP, GPQ */
+static void s3c_d2pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	unsigned reg;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + offset);
+		reg &= ~(PUD_MASK << bit);
+		reg |= GET_PUD(pin_mode) << bit;
+		writel(reg, S3C_GPAPUD + offset);
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset) & ~(0x3 << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + offset) & ~(1 << (bit >> 1));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPADAT + offset);
+	}
+}
+
+/* one register, 4 bits per function -> GPA, GPB, GPC, GPD, GPE, GPG, GPM */
+static void s3c_d4pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	unsigned reg;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + offset);
+		reg &= ~(PUD_MASK << (bit >> 1));
+		reg |= GET_PUD(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPAPUD + offset);
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset) & ~(0xf << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + offset) & ~(1 << (bit >> 2));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 2);
+		writel(reg, S3C_GPADAT + offset);
+	}
+}
+
+/* two registers, 4 bits per pin -> GPH, GPK, GPL */
+static void s3c_d42pins(unsigned offset, unsigned pin_mode)
+{
+	unsigned bit = GET_BIT(pin_mode);
+	unsigned func = GET_FUNC(pin_mode);
+	uint32_t reg;
+	unsigned reg_offs = 0;
+
+	if (PUD_PRESENT(pin_mode)) {
+		reg = readl(S3C_GPAPUD + 4 + offset);
+		reg &= ~(PUD_MASK << (bit >> 1));
+		reg |= GET_PUD(pin_mode) << (bit >> 1);
+		writel(reg, S3C_GPACON + 4 + offset);
+	}
+
+	if (bit > 31) {
+		reg_offs = 4;
+		bit -= 32;
+	}
+
+	/* in the case of pin's function is GPIO it also sets up the direction */
+	reg = readl(S3C_GPACON + offset + reg_offs) & ~(0xf << bit);
+	writel(reg | (func << bit), S3C_GPACON + offset + reg_offs);
+
+	if (func == 1) { /* output? if yes, also set the initial value */
+		reg = readl(S3C_GPADAT + 4 + offset) & ~(1 << (bit >> 2));
+		reg |= GET_GPIOVAL(pin_mode) << (bit >> 2);
+		writel(reg, S3C_GPADAT + 4 + offset);
+	}
+}
+
+/* 'gpio_mode' must be one of the 'GP?_*' macros */
+void s3c_gpio_mode(unsigned gpio_mode)
+{
+	unsigned group, offset;
+
+	group = GET_GROUP(gpio_mode);
+	offset = group_offset[group];
+
+	switch (group) {
+	case 5:		/* GPF */
+	case 8:		/* GPI */
+	case 9:		/* GPJ */
+	case 13:	/* GPN */
+	case 14:	/* GPO */
+	case 15:	/* GPP */
+	case 16:	/* GPQ */
+		s3c_d2pins(offset, gpio_mode);
+		break;
+	case 7:		/* GPH */
+	case 10:	/* GPK */
+	case 11:	/* GPL */
+		s3c_d42pins(offset, gpio_mode);
+		break;
+	default:
+		s3c_d4pins(offset, gpio_mode);
+	}
+}
diff --git a/arch/arm/mach-samsung/include/mach/gpio.h b/arch/arm/mach-samsung/include/mach/gpio.h
index 4d7d217..2b45695 100644
--- a/arch/arm/mach-samsung/include/mach/gpio.h
+++ b/arch/arm/mach-samsung/include/mach/gpio.h
@@ -16,6 +16,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/iomux-s3c24x0.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/iomux-s3c64xx.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/iomux-s5pcxx.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h b/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h
new file mode 100644
index 0000000..5d68b71
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/iomux-s3c64xx.h
@@ -0,0 +1,542 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_IOMUX_S3C64XX_H
+# define __MACH_IOMUX_S3C64XX_H
+
+/* 3322222222221111111111
+ * 10987654321098765432109876543210
+ *                           ^^^^^^_ Bit offset
+ *                      ^^^^^_______ Group Number
+ *                  ^^^^____________ Function
+ *                 ^________________ initial GPIO out value
+ *                ^_________________ Pull up/down feature present
+ *              ^^__________________ initial pull up/down setting
+ */
+
+#define PIN(group,bit) ((group << 6) + bit)
+#define FUNC(x) (((x) & 0xf) << 11)
+#define GET_FUNC(x) (((x) >> 11) & 0xf)
+#define GET_GROUP(x) (((x) >> 6) & 0x1f)
+#define GET_BIT(x) ((x) & 0x3f)
+#define GET_GPIOVAL(x) (!!((x) & (1 << 15)))
+#define GPIO_OUT (1 << 11)
+#define GPIO_IN (0 << 11)
+#define GPIO_VAL(x) ((!!(x)) << 15)
+#define PUD_MASK 0x3
+#define PUD (1 << 16)
+#define PUD_PRESENT(x) (!!((x) & (1 << 16)))
+#define DISABLE_PUD (0 << 17)
+#define ENABLE_PU (2 << 17)
+#define ENABLE_PD (1 << 17)
+#define GET_PUD(x) (((x) >> 17) & PUD_MASK)
+
+/*
+ * To have a chance for simple GPIO manipulation routines
+ * define the GPIO numbers with a real simple scheme.
+ *
+ * Keep in mind: The 'GPIO_2_NO' creates a value to be used with the real gpio
+ * routines and *not* for the multiplexer routines!
+ */
+#define GPIO_2_NO(x,y) (PIN(x,y))
+
+/*
+ * Group A: GPIO 0...7
+ * Used GPIO: 0...7
+ * These pins can also act as GPIO outputs
+ */
+#define GPA0		(PIN(0,0) | PUD)
+#define GPA0_GPIO	(GPA0 | FUNC(0))
+#define GPA0_RXD0	(GPA0 | FUNC(2))
+#define GPA1		(PIN(0,4) | PUD)
+#define GPA1_GPIO	(GPA1 | FUNC(0))
+#define GPA1_TXD0	(GPA1 | FUNC(2))
+#define GPA2		(PIN(0,8) | PUD)
+#define GPA2_GPIO	(GPA2 | FUNC(0))
+#define GPA2_NCTS0	(GPA2 | FUNC(2))
+#define GPA3		(PIN(0,12) | PUD)
+#define GPA3_GPIO	(GPA3 | FUNC(0))
+#define GPA3_NRTS0	(GPA3 | FUNC(2))
+#define GPA4		(PIN(0,16) | PUD)
+#define GPA4_GPIO	(GPA4 | FUNC(0))
+#define GPA4_RXD1	(GPA4 | FUNC(2))
+#define GPA5		(PIN(0,20) | PUD)
+#define GPA5_GPIO	(GPA5 | FUNC(0))
+#define GPA5_TXD1	(GPA5 | FUNC(2))
+#define GPA6		(PIN(0,24) | PUD)
+#define GPA6_GPIO	(GPA6 | FUNC(0))
+#define GPA6_NCTS1	(GPA6 | FUNC(2))
+#define GPA7		(PIN(0,28) | PUD)
+#define GPA7_GPIO	(GPA7 | FUNC(0))
+#define GPA7_NRTS1	(GPA7 | FUNC(2))
+
+/*
+ * Group B: GPIO 0...7
+ * Used GPIO: 8...15
+ * These pins can also act as GPIO outputs
+ */
+#define GPB0		(PIN(1,0) | PUD)
+#define GPB0_GPIO	(GPB0 | FUNC(0))
+#define GPB0_RXD2	(GPB0 | FUNC(2))
+#define GPB0_DMAREQ	(GPB0 | FUNC(3))
+#define GPB0_IRDA_RXD	(GPB0 | FUNC(4))
+#define GPB0_ADDR_CF0	(GPB0 | FUNC(5))
+#define GPB1		(PIN(1,4) | PUD)
+#define GPB1_GPIO	(GPB1 | FUNC(0))
+#define GPB1_TXD2	(GPB1 | FUNC(2))
+#define GPB1_DMAREQ	(GPB1 | FUNC(3))
+#define GPB1_IRDA_TXD	(GPB1 | FUNC(4))
+#define GPB1_ADDR_CF1	(GPB1 | FUNC(5))
+#define GPB2		(PIN(1,8) | PUD)
+#define GPB2_GPIO	(GPB2 | FUNC(0))
+#define GPB2_RXD3	(GPB2 | FUNC(2))
+#define GPB2_IRDA_RXD	(GPB2 | FUNC(3))
+#define GPB2_DMAREQ	(GPB2 | FUNC(4))
+#define GPB2_ADDR_CF2	(GPB2 | FUNC(5))
+#define GPB2_IIC1_SCL	(GPB2 | FUNC(6))
+#define GPB3		(PIN(1,12) | PUD)
+#define GPB3_GPIO	(GPB3 | FUNC(0))
+#define GPB3_TXD3	(GPB3 | FUNC(2))
+#define GPB3_IRDA_TXD	(GPB3 | FUNC(3))
+#define GPB3_DMAREQ	(GPB3 | FUNC(4))
+#define GPB3_IIC1_SDA	(GPB3 | FUNC(6))
+#define GPB4		(PIN(1,16) | PUD)
+#define GPB4_GPIO	(GPB4 | FUNC(0))
+#define GPB4_SDBW	(GPB4 | FUNC(2))
+#define GPB4_CAM_FLD	(GPB4 | FUNC(3))
+#define GPB4_CF_DIR	(GPB4 | FUNC(4))
+#define GPB5		(PIN(1,20) | PUD)
+#define GPB5_GPIO	(GPB5 | FUNC(0))
+#define GPB5_IIC0_SCL	(GPB5 | FUNC(2))
+#define GPB6		(PIN(1,24) | PUD)
+#define GPB6_GPIO	(GPB6 | FUNC(0))
+#define GPB6_IIC0_SDA	(GPB6 | FUNC(2))
+
+#define GPC0		(PIN(2,0) | PUD)
+#define GPC0_GPIO	(GPC0 | FUNC(0))
+#define GPC0_SPI0_MISO	(GPC0 | FUNC(2))
+#define GPC1		(PIN(2,4) | PUD)
+#define GPC1_GPIO	(GPC1 | FUNC(0))
+#define GPC1_SPI0_CLK	(GPC1 | FUNC(2))
+#define GPC2		(PIN(2,8) | PUD)
+#define GPC2_GPIO	(GPC2 | FUNC(0))
+#define GPC2_SPI0_MOSI	(GPC2 | FUNC(2))
+#define GPC3		(PIN(2,12) | PUD)
+#define GPC3_GPIO	(GPC3 | FUNC(0))
+#define GPC3_SPI0_NCS	(GPC3 | FUNC(2))
+#define GPC4		(PIN(2,16) | PUD)
+#define GPC4_GPIO	(GPC4 | FUNC(0))
+#define GPC4_SPI1_MISO	(GPC4 | FUNC(2))
+#define GPC5		(PIN(2,20) | PUD)
+#define GPC5_GPIO	(GPC5 | FUNC(0))
+#define GPC5_SPI1_CLK	(GPC5 | FUNC(2))
+#define GPC6		(PIN(2,24) | PUD)
+#define GPC6_GPIO	(GPC6 | FUNC(0))
+#define GPC6_SPI1_MOSI	(GPC6 | FUNC(2))
+#define GPC7		(PIN(2,28) | PUD)
+#define GPC7_GPIO	(GPC7 | FUNC(0))
+#define GPC7_SPI1_NCS	(GPC7 | FUNC(2))
+
+#define GPD0		(PIN(3,0) | PUD)
+#define GPD0_AC97_BITCLK (GPD0 | FUNC(4))
+#define GPD1		(PIN(3,4) | PUD)
+#define GPD1_AC97_NRST	(GPD1 | FUNC(4))
+#define GPD2		(PIN(3,8) | PUD)
+#define GPD2_AC97_SYNC	(GPD2 | FUNC(4))
+#define GPD3		(PIN(3,12) | PUD)
+#define GPD3_AC97_SDI	(GPD3 | FUNC(4))
+#define GPD4		(PIN(3,16) | PUD)
+#define GPD4_AC97_SDO	(GPD4 | FUNC(4))
+
+#define GPE0		(PIN(4,0) | PUD)
+#define GPE0_GPIO	(GPE0 | FUNC(0))
+#define GPE1		(PIN(4,4) | PUD)
+#define GPE1_GPIO	(GPE1 | FUNC(0))
+#define GPE2		(PIN(4,8) | PUD)
+#define GPE2_GPIO	(GPE2 | FUNC(0))
+#define GPE3		(PIN(4,12) | PUD)
+#define GPE3_GPIO	(GPE3 | FUNC(0))
+#define GPE4		(PIN(4,16) | PUD)
+#define GPE4_GPIO	(GPE4 | FUNC(0))
+
+#define GPF0		(PIN(5,0) | PUD)
+#define GPF0_GPIO	(GPF0 | FUNC(0))
+#define GPF1		(PIN(5,2) | PUD)
+#define GPF1_GPIO	(GPF1 | FUNC(0))
+#define GPF2		(PIN(5,4) | PUD)
+#define GPF2_GPIO	(GPF2 | FUNC(0))
+#define GPF3		(PIN(5,6) | PUD)
+#define GPF3_GPIO	(GPF3 | FUNC(0))
+#define GPF4		(PIN(5,8) | PUD)
+#define GPF4_GPIO	(GPF4 | FUNC(0))
+#define GPF5		(PIN(5,10) | PUD)
+#define GPF5_GPIO	(GPF5 | FUNC(0))
+#define GPF6		(PIN(5,12) | PUD)
+#define GPF6_GPIO	(GPF6 | FUNC(0))
+#define GPF7		(PIN(5,14) | PUD)
+#define GPF7_GPIO	(GPF7 | FUNC(0))
+#define GPF8		(PIN(5,16) | PUD)
+#define GPF8_GPIO	(GPF8 | FUNC(0))
+#define GPF9		(PIN(5,18) | PUD)
+#define GPF9_GPIO	(GPF9 | FUNC(0))
+#define GPF10		(PIN(5,20) | PUD)
+#define GPF10_GPIO	(GPF10 | FUNC(0))
+#define GPF11		(PIN(5,22) | PUD)
+#define GPF11_GPIO	(GPF11 | FUNC(0))
+#define GPF12		(PIN(5,24) | PUD)
+#define GPF12_GPIO	(GPF12 | FUNC(0))
+#define GPF13		(PIN(5,26) | PUD)
+#define GPF13_GPIO	(GPF13 | FUNC(0))
+#define GPF14		(PIN(5,28) | PUD)
+#define GPF14_GPIO	(GPF14 | FUNC(0))
+#define GPF14_PWM0	(GPF14 | FUNC(2))
+#define GPF14_CLKOUT	(GPF14 | FUNC(3))
+#define GPF15		(PIN(5,30) | PUD)
+#define GPF15_GPIO	(GPF15 | FUNC(0))
+#define GPF15_PWM1	(GPF15 | FUNC(2))
+
+#define GPG0		(PIN(6,0) | PUD)
+#define GPG0_MMC0_CLK	(GPG0 | FUNC(2))
+#define GPG1		(PIN(6,4) | PUD)
+#define GPG1_MMC0_CMD	(GPG1 | FUNC(2))
+#define GPG2		(PIN(6,8) | PUD)
+#define GPG2_MMC0_DAT0	(GPG2 | FUNC(2))
+#define GPG3		(PIN(6,12) | PUD)
+#define GPG3_MMC0_DAT1	(GPG3 | FUNC(2))
+#define GPG4		(PIN(6,16) | PUD)
+#define GPG4_MMC0_DAT2	(GPG4 | FUNC(2))
+#define GPG5		(PIN(6,20) | PUD)
+#define GPG5_MMC0_DAT3	(GPG5 | FUNC(2))
+#define GPG6		(PIN(6,24) | PUD)
+#define GPG6_MMC0_NCD	(GPG6 | FUNC(2))
+
+#define GPH0		(PIN(7,0) | PUD)
+#define GPH0_GPIO	(GPH0 | FUNC(0))
+#define GPH1		(PIN(7,4) | PUD)
+#define GPH1_GPIO	(GPH1 | FUNC(0))
+#define GPH2		(PIN(7,8) | PUD)
+#define GPH2_GPIO	(GPH2 | FUNC(0))
+#define GPH3		(PIN(7,12) | PUD)
+#define GPH3_GPIO	(GPH3 | FUNC(0))
+#define GPH4		(PIN(7,16) | PUD)
+#define GPH4_GPIO	(GPH4 | FUNC(0))
+#define GPH5		(PIN(7,20) | PUD)
+#define GPH5_GPIO	(GPH5 | FUNC(0))
+#define GPH6		(PIN(7,24) | PUD)
+#define GPH6_GPIO	(GPH6 | FUNC(0))
+#define GPH7		(PIN(7,28) | PUD)
+#define GPH7_GPIO	(GPH7 | FUNC(0))
+#define GPH8		(PIN(7,32) | PUD)
+#define GPH8_GPIO	(GPH8 | FUNC(0))
+#define GPH9		(PIN(7,36) | PUD)
+#define GPH9_GPIO	(GPH9 | FUNC(0))
+
+#define GPI0		(PIN(8,0) | PUD)
+#define GPI0_GPIO	(GPI0 | FUNC(0))
+#define GPI1		(PIN(8,2) | PUD)
+#define GPI1_GPIO	(GPI1 | FUNC(0))
+#define GPI2		(PIN(8,4) | PUD)
+#define GPI2_GPIO	(GPI2 | FUNC(0))
+#define GPI3		(PIN(8,6) | PUD)
+#define GPI3_GPIO	(GPI3 | FUNC(0))
+#define GPI4		(PIN(8,8) | PUD)
+#define GPI4_GPIO	(GPI4 | FUNC(0))
+#define GPI5		(PIN(8,10) | PUD)
+#define GPI5_GPIO	(GPI5 | FUNC(0))
+#define GPI6		(PIN(8,12) | PUD)
+#define GPI6_GPIO	(GPI6 | FUNC(0))
+#define GPI7		(PIN(8,14) | PUD)
+#define GPI7_GPIO	(GPI7 | FUNC(0))
+#define GPI8		(PIN(8,16) | PUD)
+#define GPI8_GPIO	(GPI8 | FUNC(0))
+#define GPI9		(PIN(8,18) | PUD)
+#define GPI9_GPIO	(GPI9 | FUNC(0))
+#define GPI10		(PIN(8,20) | PUD)
+#define GPI10_GPIO	(GPI10 | FUNC(0))
+#define GPI11		(PIN(8,22) | PUD)
+#define GPI11_GPIO	(GPI11 | FUNC(0))
+#define GPI12		(PIN(8,24) | PUD)
+#define GPI12_GPIO	(GPI12 | FUNC(0))
+#define GPI13		(PIN(8,26) | PUD)
+#define GPI13_GPIO	(GPI13 | FUNC(0))
+#define GPI14		(PIN(8,28) | PUD)
+#define GPI14_GPIO	(GPI14 | FUNC(0))
+#define GPI15		(PIN(8,30) | PUD)
+#define GPI15_GPIO	(GPI15 | FUNC(0))
+
+#define GPJ0		(PIN(9,0) | PUD)
+#define GPJ0_GPIO	(GPJ0 | FUNC(0))
+#define GPJ1		(PIN(9,2) | PUD)
+#define GPJ1_GPIO	(GPJ1 | FUNC(0))
+#define GPJ2		(PIN(9,4) | PUD)
+#define GPJ2_GPIO	(GPJ2 | FUNC(0))
+#define GPJ3		(PIN(9,6) | PUD)
+#define GPJ3_GPIO	(GPJ3 | FUNC(0))
+#define GPJ4		(PIN(9,8) | PUD)
+#define GPJ4_GPIO	(GPJ4 | FUNC(0))
+#define GPJ5		(PIN(9,10) | PUD)
+#define GPJ5_GPIO	(GPJ5 | FUNC(0))
+#define GPJ6		(PIN(9,12) | PUD)
+#define GPJ6_GPIO	(GPJ6 | FUNC(0))
+#define GPJ7		(PIN(9,14) | PUD)
+#define GPJ7_GPIO	(GPJ7 | FUNC(0))
+#define GPJ8		(PIN(9,16) | PUD)
+#define GPJ8_GPIO	(GPJ8 | FUNC(0))
+#define GPJ9		(PIN(9,18) | PUD)
+#define GPJ9_GPIO	(GPJ9 | FUNC(0))
+#define GPJ10		(PIN(9,20) | PUD)
+#define GPJ10_GPIO	(GPJ10 | FUNC(0))
+#define GPJ11		(PIN(9,22) | PUD)
+#define GPJ11_GPIO	(GPJ11 | FUNC(0))
+
+#define GPK0		(PIN(10,0) | PUD)
+#define GPK0_DATA0	(GPK0 | FUNC(2))
+#define GPK0_GPIO	(GPK0 | FUNC(0))
+#define GPK1		(PIN(10,4) | PUD)
+#define GPK1_DATA1	(GPK1 | FUNC(2))
+#define GPK1_GPIO	(GPK1 | FUNC(0))
+#define GPK2		(PIN(10,8) | PUD)
+#define GPK2_DATA2	(GPK2 | FUNC(2))
+#define GPK2_GPIO	(GPK2 | FUNC(0))
+#define GPK3		(PIN(10,12) | PUD)
+#define GPK3_DATA3	(GPK3 | FUNC(2))
+#define GPK3_GPIO	(GPK3 | FUNC(0))
+#define GPK4		(PIN(10,16) | PUD)
+#define GPK4_DATA4	(GPK4 | FUNC(2))
+#define GPK4_GPIO	(GPK4 | FUNC(0))
+#define GPK5		(PIN(10,20) | PUD)
+#define GPK5_DATA5	(GPK5 | FUNC(2))
+#define GPK5_GPIO	(GPK5 | FUNC(0))
+#define GPK6		(PIN(10,24) | PUD)
+#define GPK6_DATA6	(GPK6 | FUNC(2))
+#define GPK6_GPIO	(GPK6 | FUNC(0))
+#define GPK7		(PIN(10,28) | PUD)
+#define GPK7_DATA7	(GPK7 | FUNC(2))
+#define GPK7_GPIO	(GPK7 | FUNC(0))
+#define GPK8		(PIN(10,32) | PUD)
+#define GPK8_DATA8	(GPK8 | FUNC(2))
+#define GPK8_GPIO	(GPK8 | FUNC(0))
+#define GPK9		(PIN(10,36) | PUD)
+#define GPK9_DATA9	(GPK9 | FUNC(2))
+#define GPK9_GPIO	(GPK9 | FUNC(0))
+#define GPK10		(PIN(10,40) | PUD)
+#define GPK10_DATA10	(GPK10 | FUNC(2))
+#define GPK10_GPIO	(GPK10 | FUNC(0))
+#define GPK11		(PIN(10,44) | PUD)
+#define GPK11_DATA11	(GPK11 | FUNC(2))
+#define GPK11_GPIO	(GPK11 | FUNC(0))
+#define GPK12		(PIN(10,48) | PUD)
+#define GPK12_DATA12	(GPK12 | FUNC(2))
+#define GPK12_GPIO	(GPK12 | FUNC(0))
+#define GPK13		(PIN(10,52) | PUD)
+#define GPK13_DATA13	(GPK13 | FUNC(2))
+#define GPK13_GPIO	(GPK13 | FUNC(0))
+#define GPK14		(PIN(10,56) | PUD)
+#define GPK14_DATA14	(GPK14 | FUNC(2))
+#define GPK14_GPIO	(GPK14 | FUNC(0))
+#define GPK15		(PIN(10,60) | PUD)
+#define GPK15_DATA15	(GPK15 | FUNC(2))
+#define GPK15_GPIO	(GPK15 | FUNC(0))
+
+#define GPL0		(PIN(11,0) | PUD)
+#define GPL0_ADDR0	(GPL0 | FUNC(2))
+#define GPL0_GPIO	(GPL0 | FUNC(0))
+#define GPL1		(PIN(11,4) | PUD)
+#define GPL1_ADDR1	(GPL1 | FUNC(2))
+#define GPL1_GPIO	(GPL1 | FUNC(0))
+#define GPL2		(PIN(11,8) | PUD)
+#define GPL2_ADDR2	(GPL2 | FUNC(2))
+#define GPL2_GPIO	(GPL2 | FUNC(0))
+#define GPL3		(PIN(11,12) | PUD)
+#define GPL3_ADDR3	(GPL3 | FUNC(2))
+#define GPL3_GPIO	(GPL3 | FUNC(0))
+#define GPL4		(PIN(11,16) | PUD)
+#define GPL4_ADDR3	(GPL4 | FUNC(2))
+#define GPL4_GPIO	(GPL4 | FUNC(0))
+#define GPL5		(PIN(11,20) | PUD)
+#define GPL5_ADDR3	(GPL5 | FUNC(2))
+#define GPL5_GPIO	(GPL5 | FUNC(0))
+#define GPL6		(PIN(11,24) | PUD)
+#define GPL6_ADDR3	(GPL6 | FUNC(2))
+#define GPL6_GPIO	(GPL6 | FUNC(0))
+#define GPL7		(PIN(11,28) | PUD)
+#define GPL7_ADDR3	(GPL7 | FUNC(2))
+#define GPL7_GPIO	(GPL7 | FUNC(0))
+#define GPL8		(PIN(11,32) | PUD)
+#define GPL8_ADDR3	(GPL8 | FUNC(2))
+#define GPL8_GPIO	(GPL8 | FUNC(0))
+#define GPL9		(PIN(11,36) | PUD)
+#define GPL9_ADDR3	(GPL9 | FUNC(2))
+#define GPL9_GPIO	(GPL9 | FUNC(0))
+#define GPL10		(PIN(11,40) | PUD)
+#define GPL10_ADDR3	(GPL10 | FUNC(2))
+#define GPL10_GPIO	(GPL10 | FUNC(0))
+#define GPL11		(PIN(11,44) | PUD)
+#define GPL11_ADDR3	(GPL11 | FUNC(2))
+#define GPL11_GPIO	(GPL11 | FUNC(0))
+#define GPL12		(PIN(11,48) | PUD)
+#define GPL12_ADDR3	(GPL12 | FUNC(2))
+#define GPL12_GPIO	(GPL12 | FUNC(0))
+#define GPL13		(PIN(11,52) | PUD)
+#define GPL13_ADDR16	(GPL13 | FUNC(2))
+#define GPL13_GPIO	(GPL13 | FUNC(0))
+#define GPL14		(PIN(11,65) | PUD)
+#define GPL14_ADDR17	(GPL14 | FUNC(2))
+#define GPL14_GPIO	(GPL14 | FUNC(0))
+
+#define GPM0		(PIN(12,0) | PUD)
+#define GPM0_GPIO	(GPM0 | FUNC(0))
+#define GPM1		(PIN(12,4) | PUD)
+#define GPM1_GPIO	(GPM1 | FUNC(0))
+#define GPM2		(PIN(12,8) | PUD)
+#define GPM2_GPIO	(GPM2 | FUNC(0))
+#define GPM3		(PIN(12,12) | PUD)
+#define GPM3_GPIO	(GPM3 | FUNC(0))
+#define GPM4		(PIN(12,16) | PUD)
+#define GPM4_GPIO	(GPM4 | FUNC(0))
+#define GPM5		(PIN(12,20) | PUD)
+#define GPM5_GPIO	(GPM5 | FUNC(0))
+
+#define GPN0		(PIN(13,0) | PUD)
+#define GPN0_GPIO	(GPN0 | FUNC(0))
+#define GPN1		(PIN(13,0) | PUD)
+#define GPN1_GPIO	(GPN1 | FUNC(0))
+#define GPN2		(PIN(13,0) | PUD)
+#define GPN2_GPIO	(GPN2 | FUNC(0))
+#define GPN3		(PIN(13,0) | PUD)
+#define GPN3_GPIO	(GPN3 | FUNC(0))
+#define GPN4		(PIN(13,0) | PUD)
+#define GPN4_GPIO	(GPN4 | FUNC(0))
+#define GPN5		(PIN(13,0) | PUD)
+#define GPN5_GPIO	(GPN5 | FUNC(0))
+#define GPN6		(PIN(13,0) | PUD)
+#define GPN6_GPIO	(GPN6 | FUNC(0))
+#define GPN7		(PIN(13,0) | PUD)
+#define GPN7_GPIO	(GPN7 | FUNC(0))
+#define GPN8		(PIN(13,0) | PUD)
+#define GPN8_GPIO	(GPN8 | FUNC(0))
+#define GPN9		(PIN(13,0) | PUD)
+#define GPN9_GPIO	(GPN9 | FUNC(0))
+#define GPN10		(PIN(13,20) | PUD)
+#define GPN10_GPIO	(GPN10 | FUNC(0))
+#define GPN11		(PIN(13,20) | PUD)
+#define GPN11_GPIO	(GPN11 | FUNC(0))
+#define GPN12		(PIN(13,20) | PUD)
+#define GPN12_GPIO	(GPN12 | FUNC(0))
+#define GPN13		(PIN(13,20) | PUD)
+#define GPN13_GPIO	(GPN13 | FUNC(0))
+#define GPN14		(PIN(13,20) | PUD)
+#define GPN14_GPIO	(GPN14 | FUNC(0))
+#define GPN15		(PIN(13,20) | PUD)
+#define GPN15_GPIO	(GPN15 | FUNC(0))
+
+#define GPO0		(PIN(14,0) | PUD)
+#define GPO0_GPIO	(GPO0 | FUNC(0))
+#define GPO0_NCS2	(GPO0 | FUNC(2))
+#define GPO1		(PIN(14,2) | PUD)
+#define GPO1_GPIO	(GPO1 | FUNC(0))
+#define GPO1_NCS3	(GPO1 | FUNC(2))
+#define GPO2		(PIN(14,4) | PUD)
+#define GPO2_GPIO	(GPO2 | FUNC(0))
+#define GPO2_NCS4	(GPO2 | FUNC(2))
+#define GPO3		(PIN(14,6) | PUD)
+#define GPO3_GPIO	(GPO3 | FUNC(0))
+#define GPO3_NCS5	(GPO3 | FUNC(2))
+#define GPO4		(PIN(14,8) | PUD)
+#define GPO4_GPIO	(GPO4 | FUNC(0))
+#define GPO5		(PIN(14,10) | PUD)
+#define GPO5_GPIO	(GPO5 | FUNC(0))
+#define GPO6		(PIN(14,12) | PUD)
+#define GPO6_GPIO	(GPO6 | FUNC(0))
+#define GPO6_ADDR6	(GPO6 | FUNC(2))
+#define GPO7		(PIN(14,14) | PUD)
+#define GPO7_GPIO	(GPO7 | FUNC(0))
+#define GPO7_ADDR7	(GPO7 | FUNC(2))
+#define GPO8		(PIN(14,16) | PUD)
+#define GPO8_GPIO	(GPO8 | FUNC(0))
+#define GPO8_ADDR8	(GPO8 | FUNC(2))
+#define GPO9		(PIN(14,18) | PUD)
+#define GPO9_GPIO	(GPO9 | FUNC(0))
+#define GPO9_ADDR9	(GPO9 | FUNC(2))
+#define GPO10		(PIN(14,20) | PUD)
+#define GPO10_GPIO	(GPO10 | FUNC(2))
+#define GPO10_ADDR10	(GPO10 | FUNC(2))
+#define GPO11		(PIN(14,22) | PUD)
+#define GPO11_GPIO	(GPO11 | FUNC(0))
+#define GPO11_ADDR11	(GPO11 | FUNC(2))
+#define GPO12		(PIN(14,24) | PUD)
+#define GPO12_GPIO	(GPO12 | FUNC(0))
+#define GPO12_ADDR12	(GPO12 | FUNC(2))
+#define GPO13		(PIN(14,26) | PUD)
+#define GPO13_GPIO	(GPO13 | FUNC(0))
+#define GPO13_ADDR13	(GPO13 | FUNC(2))
+#define GPO14		(PIN(14,28) | PUD)
+#define GPO14_GPIO	(GPO14 | FUNC(0))
+#define GPO14_ADDR14	(GPO14 | FUNC(2))
+#define GPO15		(PIN(14,30) | PUD)
+#define GPO15_GPIO	(GPO15 | FUNC(0))
+#define GPO15_ADDR15	(GPO15 | FUNC(2))
+
+#define GPP0		(PIN(15,0) | PUD)
+#define GPP0_GPIO	(GPP0 | FUNC(0))
+#define GPP1		(PIN(15,2) | PUD)
+#define GPP1_GPIO	(GPP1 | FUNC(0))
+#define GPP2		(PIN(15,4) | PUD)
+#define GPP2_NWAIT	(GPP2 | FUNC(2))
+#define GPP3		(PIN(15,6) | PUD)
+#define GPP3_FALE	(GPP3 | FUNC(2))
+#define GPP4		(PIN(15,8) | PUD)
+#define GPP4_FCLE	(GPP4 | FUNC(2))
+#define GPP5		(PIN(15,10) | PUD)
+#define GPP5_FWE	(GPP5 | FUNC(2))
+#define GPP6		(PIN(15,12) | PUD)
+#define GPP6_FRE	(GPP6 | FUNC(2))
+#define GPP7		(PIN(15,14) | PUD)
+#define GPP7_RNB	(GPP7 | FUNC(2))
+#define GPP8		(PIN(15,16) | PUD)
+#define GPP8_GPIO	(GPP8 | FUNC(0))
+#define GPP9		(PIN(15,18) | PUD)
+#define GPP9_GPIO	(GPP9 | FUNC(0))
+#define GPP10		(PIN(15,20) | PUD)
+#define GPP10_GPIO	(GPP10 | FUNC(0))
+#define GPP11		(PIN(15,22) | PUD)
+#define GPP11_GPIO	(GPP11 | FUNC(0))
+#define GPP12		(PIN(15,24) | PUD)
+#define GPP12_GPIO	(GPP12 | FUNC(0))
+#define GPP13		(PIN(15,26) | PUD)
+#define GPP13_GPIO	(GPP13 | FUNC(0))
+#define GPP14		(PIN(15,28) | PUD)
+#define GPP14_GPIO	(GPP14 | FUNC(0))
+
+#define GPQ0		(PIN(16,0) | PUD)
+#define GPQ0_GPIO	(GPQ0 | FUNC(0))
+#define GPQ1		(PIN(16,2) | PUD)
+#define GPQ1_GPIO	(GPQ1 | FUNC(0))
+#define GPQ2		(PIN(16,4) | PUD)
+#define GPQ2_GPIO	(GPQ2 | FUNC(0))
+#define GPQ3		(PIN(16,8) | PUD)
+#define GPQ3_GPIO	(GPQ3 | FUNC(0))
+#define GPQ4		(PIN(16,8) | PUD)
+#define GPQ4_GPIO	(GPQ4 | FUNC(0))
+#define GPQ5		(PIN(16,10) | PUD)
+#define GPQ5_GPIO	(GPQ5 | FUNC(0))
+#define GPQ6		(PIN(16,12) | PUD)
+#define GPQ6_GPIO	(GPQ6 | FUNC(0))
+#define GPQ7		(PIN(16,14) | PUD)
+#define GPQ7_GPIO	(GPQ7 | FUNC(0))
+#define GPQ8		(PIN(16,16) | PUD)
+#define GPQ8_GPIO	(GPQ7 | FUNC(0))
+
+
+#endif /* __MACH_IOMUX_S3C64XX_H */
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:49 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:49 +0200
Subject: [PATCH 7/8] ARM/Samsung: add the Mini6410 platform as a user of the
 S3C6410 SoC
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-8-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/Makefile                               |    1 +
 arch/arm/boards/friendlyarm-mini6410/Makefile   |    1 +
 arch/arm/boards/friendlyarm-mini6410/config.h   |    8 +
 arch/arm/boards/friendlyarm-mini6410/env/config |   56 +++++
 arch/arm/boards/friendlyarm-mini6410/mini6410.c |  305 +++++++++++++++++++++++
 arch/arm/configs/friendlyarm_mini6410_defconfig |   40 +++
 arch/arm/mach-samsung/Kconfig                   |   16 ++
 7 files changed, 427 insertions(+)
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/Makefile
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/config.h
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/env/config
 create mode 100644 arch/arm/boards/friendlyarm-mini6410/mini6410.c
 create mode 100644 arch/arm/configs/friendlyarm_mini6410_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..bd03fe6 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -123,6 +123,7 @@ board-$(CONFIG_MACH_FREESCALE_MX53_LOCO)	:= freescale-mx53-loco
 board-$(CONFIG_MACH_FREESCALE_MX53_SMD)		:= freescale-mx53-smd
 board-$(CONFIG_MACH_GUF_CUPID)			:= guf-cupid
 board-$(CONFIG_MACH_MINI2440)			:= mini2440
+board-$(CONFIG_MACH_MINI6410)			:= friendlyarm-mini6410
 board-$(CONFIG_MACH_QIL_A9260)			:= qil-a9260
 board-$(CONFIG_MACH_TNY_A9260)			:= tny-a926x
 board-$(CONFIG_MACH_TNY_A9263)			:= tny-a926x
diff --git a/arch/arm/boards/friendlyarm-mini6410/Makefile b/arch/arm/boards/friendlyarm-mini6410/Makefile
new file mode 100644
index 0000000..cd7a427
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/Makefile
@@ -0,0 +1 @@
+obj-y += mini6410.o
diff --git a/arch/arm/boards/friendlyarm-mini6410/config.h b/arch/arm/boards/friendlyarm-mini6410/config.h
new file mode 100644
index 0000000..ee38192
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/config.h
@@ -0,0 +1,8 @@
+/* FriendlyARM Mini6410 specific global settings */
+
+#ifndef _MINI6410_CONFIG_H_
+# define _MINI6410_CONFIG_H_
+
+#define S3C64XX_CLOCK_REFERENCE 12000000
+
+#endif /* _MINI6410_CONFIG_H_ */
diff --git a/arch/arm/boards/friendlyarm-mini6410/env/config b/arch/arm/boards/friendlyarm-mini6410/env/config
new file mode 100644
index 0000000..a1c86e1
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/env/config
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+machine=mini6410
+eth0.serverip=a.b.c.d.e
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d.e
+#eth0.netmask=a.b.c.d.e
+#eth0.gateway=a.b.c.d.e
+eth0.ethaddr=08:90:90:90:90:90
+
+# can be either 'nfs', 'tftp' or 'nand'
+kernel_loc=tftp
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-${machine}.${rootfs_type}
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-${machine}
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+	kernelimage="${user}"-"${kernelimage}"
+	nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
+	rootfsimage="${user}"-"${rootfsimage}"
+else
+	nfsroot="${eth0.serverip}:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+#
+# "mini6410" kernel parameter
+# 0 .. 9 = screen type
+# i = touchscreen with propritary FriendlyARM protocol
+# Note: can be "minit6410= " if nothing of these components are connected
+#
+bootargs="console=ttySAC0,115200 mini6410=0"
+
+nand_device="nand"
+nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nand=3
diff --git a/arch/arm/boards/friendlyarm-mini6410/mini6410.c b/arch/arm/boards/friendlyarm-mini6410/mini6410.c
new file mode 100644
index 0000000..01437ac
--- /dev/null
+++ b/arch/arm/boards/friendlyarm-mini6410/mini6410.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <common.h>
+#include <driver.h>
+#include <init.h>
+#include <dm9000.h>
+#include <gpio.h>
+#include <generated/mach-types.h>
+#include <asm/armlinux.h>
+#include <mach/s3c-iomap.h>
+#include <mach/devices-s3c64xx.h>
+#include <mach/s3c-generic.h>
+
+/*
+ * dm9000 network controller onboard
+ * Connected to CS line 1 and interrupt line EINT7,
+ * data width is 16 bit
+ * Area 1: Offset 0x300...0x301
+ * Area 2: Offset 0x304...0x305
+ */
+static struct dm9000_platform_data dm9000_data = {
+	.srom = 0,	/* no serial ROM for the ethernet address */
+};
+
+static const unsigned pin_usage[] = {
+	/* UART2 (spare, 3,3 V TTL level only) */
+	GPA4_RXD1 | ENABLE_PU,
+	GPA5_TXD1,
+	GPA6_NCTS1 | ENABLE_PU,
+	GPA7_NRTS1,
+	/* UART3 (spare, 3,3 V TTL level only) */
+	GPB0_RXD2 | ENABLE_PU,
+	GPB1_TXD2,
+	/* UART4 (spare, 3,3 V TTL level only) */
+	GPB2_RXD3 | ENABLE_PU,
+	GPB3_TXD3,
+
+	GPB4_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* I2C bus */
+	GPB5_IIC0_SCL,	/* external PU */
+	GPB6_IIC0_SDA,	/* external PU */
+
+	GPC0_SPI0_MISO | ENABLE_PU,
+	GPC1_SPI0_CLK,
+	GPC2_SPI0_MOSI,
+	GPC3_SPI0_NCS,
+
+	GPC4_SPI1_MISO | ENABLE_PU,
+	GPC5_SPI1_CLK,
+	GPC6_SPI1_MOSI,
+	GPC7_SPI1_NCS,
+
+	GPD0_AC97_BITCLK,
+	GPD1_AC97_NRST,
+	GPD2_AC97_SYNC,
+	GPD3_AC97_SDI | ENABLE_PU,
+	GPD4_AC97_SDO,
+
+	GPE0_GPIO | GPIO_OUT | GPIO_VAL(0), /* LCD backlight off */
+	GPE1_GPIO | GPIO_IN | ENABLE_PU,
+	GPE2_GPIO | GPIO_IN | ENABLE_PU,
+	GPE3_GPIO | GPIO_IN | ENABLE_PU,
+	GPE4_GPIO | GPIO_IN | ENABLE_PU,
+
+	/* keep all camera signals at reasonable values */
+	GPF0_GPIO | GPIO_IN | ENABLE_PU,
+	GPF1_GPIO | GPIO_IN | ENABLE_PU,
+	GPF2_GPIO | GPIO_IN | ENABLE_PU,
+	GPF3_GPIO | GPIO_IN | ENABLE_PU,
+	GPF4_GPIO | GPIO_IN | ENABLE_PU,
+	GPF5_GPIO | GPIO_IN | ENABLE_PU,
+	GPF6_GPIO | GPIO_IN | ENABLE_PU,
+	GPF7_GPIO | GPIO_IN | ENABLE_PU,
+	GPF8_GPIO | GPIO_IN | ENABLE_PU,
+	GPF9_GPIO | GPIO_IN | ENABLE_PU,
+	GPF10_GPIO | GPIO_IN | ENABLE_PU,
+	GPF11_GPIO | GPIO_IN | ENABLE_PU,
+	GPF12_GPIO | GPIO_IN | ENABLE_PU,
+	GPF13_GPIO | GPIO_OUT | GPIO_VAL(0), /* USB power off */
+#if 0
+	GPF14_CLKOUT, /* for testing purposes, but very noisy */
+#else
+	GPF14_GPIO | GPIO_OUT | GPIO_VAL(0), /* Buzzer off */
+#endif
+	GPF15_GPIO | GPIO_OUT | GPIO_VAL(0), /* Backlight PWM inactive */
+
+	/* SD card slot (all signals have external 10k PU) */
+	GPG0_MMC0_CLK,
+	GPG1_MMC0_CMD,
+	GPG2_MMC0_DAT0,
+	GPG3_MMC0_DAT1,
+	GPG4_MMC0_DAT2,
+	GPG5_MMC0_DAT3,
+	GPG6_MMC0_NCD,
+
+	/* SDIO slot (all used signals have external PU) */
+	GPH0_GPIO | GPIO_IN,	/* CLK */
+	GPH1_GPIO | GPIO_IN,	/* CMD */
+	GPH2_GPIO | GPIO_IN,	/* DAT0 */
+	GPH3_GPIO | GPIO_IN,	/* DAT1 */
+	GPH4_GPIO | GPIO_IN,	/* DAT2 */
+	GPH5_GPIO | GPIO_IN,	/* DAT3 */
+	GPH6_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH7_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH8_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+	GPH9_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */
+
+	/* as long as we are not using the LCD controller, disable the pins */
+	GPI0_GPIO | GPIO_IN | ENABLE_PD,
+	GPI1_GPIO | GPIO_IN | ENABLE_PD,
+	GPI2_GPIO | GPIO_IN | ENABLE_PD,
+	GPI3_GPIO | GPIO_IN | ENABLE_PD,
+	GPI4_GPIO | GPIO_IN | ENABLE_PD,
+	GPI5_GPIO | GPIO_IN | ENABLE_PD,
+	GPI6_GPIO | GPIO_IN | ENABLE_PD,
+	GPI7_GPIO | GPIO_IN | ENABLE_PD,
+	GPI8_GPIO | GPIO_IN | ENABLE_PD,
+	GPI9_GPIO | GPIO_IN | ENABLE_PD,
+	GPI10_GPIO | GPIO_IN | ENABLE_PD,
+	GPI11_GPIO | GPIO_IN | ENABLE_PD,
+	GPI12_GPIO | GPIO_IN | ENABLE_PD,
+	GPI13_GPIO | GPIO_IN | ENABLE_PD,
+	GPI14_GPIO | GPIO_IN | ENABLE_PD,
+	GPI15_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ0_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ1_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ2_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ3_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ4_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ5_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ6_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ7_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ8_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ9_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ10_GPIO | GPIO_IN | ENABLE_PD,
+	GPJ11_GPIO | GPIO_IN | ENABLE_PD,
+
+	GPK0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK2_GPIO | GPIO_IN,
+	GPK3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK4_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #1 (high = LED off) */
+	GPK5_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #2 (high = LED off) */
+	GPK6_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #3 (high = LED off) */
+	GPK7_GPIO | GPIO_OUT | GPIO_VAL(1),	/* LED #4 (high = LED off) */
+	GPK8_GPIO | GPIO_IN, 			/* (external PU) */
+	GPK9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK10_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK11_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK12_GPIO | GPIO_IN,			/* OCT_DET */
+	GPK13_GPIO | GPIO_IN,			/* WIFI power (external PU) */
+	GPK14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPK15_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPL0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL2_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL4_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL5_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL6_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL7_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPL8_GPIO | GPIO_IN,			/* EINT16 (external PU) */
+	GPL9_GPIO | GPIO_IN | ENABLE_PU,	/* EINT17 */
+	GPL10_GPIO | GPIO_IN | ENABLE_PU,	/* EINT18 */
+	GPL11_GPIO | GPIO_IN,			/* EINT19 + K7 (external PU) */
+	GPL12_GPIO | GPIO_IN,			/* EINT20 + K6 (external PU) */
+	GPL13_GPIO | GPIO_IN,			/* SD0 WP (external PU) */
+	GPL14_GPIO | GPIO_IN,			/* SD1 WP (external PU) */
+
+	GPM0_GPIO | GPIO_IN,			/* (external PU) */
+	GPM1_GPIO | GPIO_IN,			/* (external PU) */
+	GPM2_GPIO | GPIO_IN,			/* (external PU) */
+	GPM3_GPIO | GPIO_IN,			/* (external PU) */
+	GPM4_GPIO | GPIO_IN,			/* (external PU) */
+	GPM5_GPIO | GPIO_IN,			/* (external PU) */
+
+	GPN0_GPIO | GPIO_IN,			/* EINT0 (external PU) */
+	GPN1_GPIO | GPIO_IN,			/* EINT1 (external PU) */
+	GPN2_GPIO | GPIO_IN,			/* EINT2 (external PU) */
+	GPN3_GPIO | GPIO_IN,			/* EINT3 (external PU) */
+	GPN4_GPIO | GPIO_IN,			/* EINT4 (external PU) */
+	GPN5_GPIO | GPIO_IN,			/* EINT5 (external PU) */
+	GPN6_GPIO | GPIO_IN,			/* EINT6 (external PU) */
+	GPN7_GPIO | GPIO_IN | ENABLE_PU,	/* EINT7 DM9000 interrupt */
+	GPN8_GPIO | GPIO_IN,			/* EINT8 USB detect (external PU) */
+	GPN9_GPIO | GPIO_IN,			/* EINT9 (external PU) */
+	GPN10_GPIO | GPIO_IN,			/* SD1 CD (external PU) */
+	GPN11_GPIO | GPIO_IN,			/* EINT11 (external PU) */
+	GPN12_GPIO | GPIO_IN,			/* EINT12 IR in (external PU) */
+	GPN13_GPIO | GPIO_IN,			/* BOOT0/EINT13 (externally fixed) */
+	GPN14_GPIO | GPIO_IN,			/* BOOT1/EINT14 (externally fixed) */
+	GPN15_GPIO | GPIO_IN,			/* BOOT2/EINT15 (externally fixed) */
+
+	GPO0_NCS2,				/* NAND */
+	GPO1_NCS3,				/* NAND */
+	GPO2_NCS4,				/* CON5 */
+	GPO3_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO4_GPIO | GPIO_IN | ENABLE_PU,	/* CON5 pin 8 */
+	GPO5_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO6_ADDR6,				/* CON5 */
+	GPO7_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO8_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO10_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO11_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO12_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO13_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPO15_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPP0_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP1_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP2_NWAIT | ENABLE_PU,			/* CON5 */
+	GPP3_FALE,				/* NAND */
+	GPP4_FCLE,				/* NAND */
+	GPP5_FWE,				/* NAND */
+	GPP6_FRE,				/* NAND */
+	GPP7_RNB,				/* NAND (external PU) */
+	GPP8_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP9_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP10_GPIO | GPIO_IN,			/* (external PU) */
+	GPP11_GPIO | GPIO_IN,			/* (external PU) */
+	GPP12_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP13_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+	GPP14_GPIO | GPIO_IN | ENABLE_PU,	/* not used */
+
+	GPQ0_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR18 */
+	GPQ1_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ2_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ3_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ4_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ5_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ6_GPIO | GPIO_IN,			/* (external PU) */
+	GPQ7_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR17 */
+	GPQ8_GPIO | GPIO_IN | ENABLE_PU,	/* not used as LADDR16 */
+};
+
+static int mini6410_mem_init(void)
+{
+	arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c6410_get_memory_size());
+
+	return 0;
+}
+mem_initcall(mini6410_mem_init);
+
+static const struct s3c6410_chipselect dm900_cs = {
+	.adr_setup_t = 0,
+	.access_setup_t = 0,
+	.access_t = 20,
+	.cs_hold_t = 3,
+	.adr_hold_t = 20, /* CS must be de-asserted for at least 20 ns */
+	.width = 16,
+};
+
+static void mini6410_setup_dm9000_cs(void)
+{
+	s3c6410_setup_chipselect(1, &dm900_cs);
+}
+
+static int mini6410_devices_init(void)
+{
+	int i;
+
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
+		s3c_gpio_mode(pin_usage[i]);
+
+	mini6410_setup_dm9000_cs();
+	add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
+				IORESOURCE_MEM_16BIT, &dm9000_data);
+
+	armlinux_set_bootparams((void *)S3C_SDRAM_BASE + 0x100);
+	armlinux_set_architecture(MACH_TYPE_MINI6410);
+
+	return 0;
+}
+
+device_initcall(mini6410_devices_init);
+
+static int mini6410_console_init(void)
+{
+	s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU);
+	s3c_gpio_mode(GPA1_TXD0);
+	s3c_gpio_mode(GPA2_NCTS0 | ENABLE_PU);
+	s3c_gpio_mode(GPA3_NRTS0);
+
+	s3c64xx_add_uart1();
+
+	return 0;
+}
+
+console_initcall(mini6410_console_init);
diff --git a/arch/arm/configs/friendlyarm_mini6410_defconfig b/arch/arm/configs/friendlyarm_mini6410_defconfig
new file mode 100644
index 0000000..b80f8fb
--- /dev/null
+++ b/arch/arm/configs/friendlyarm_mini6410_defconfig
@@ -0,0 +1,40 @@
+CONFIG_ARCH_S3C64xx=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_BROKEN=y
+CONFIG_PROMPT="mini6410:"
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_PARTITION_DISK=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/friendlyarm-mini6410/env"
+CONFIG_DEBUG_INFO=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_DRIVER_NET_DM9K=y
+# CONFIG_SPI is not set
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/mach-samsung/Kconfig b/arch/arm/mach-samsung/Kconfig
index 7e41880..3ee8c38 100644
--- a/arch/arm/mach-samsung/Kconfig
+++ b/arch/arm/mach-samsung/Kconfig
@@ -6,11 +6,13 @@ if ARCH_SAMSUNG
 config ARCH_TEXT_BASE
 	hex
 	default 0x31fc0000 if MACH_MINI2440
+	default 0x57fc0000 if MACH_MINI6410
 	default 0x31fc0000 if MACH_A9M2440
 	default 0x31fc0000 if MACH_A9M2410
 
 config BOARDINFO
 	default "Mini 2440"    if MACH_MINI2440
+	default "Mini 6410"    if MACH_MINI6410
 	default "Digi A9M2440" if MACH_A9M2440
 	default "Digi A9M2410" if MACH_A9M2410
 
@@ -91,6 +93,20 @@ if ARCH_S3C64xx
 config CPU_S3C6410
 	bool
 
+choice
+
+	prompt "S3C64xx Board Type"
+
+config MACH_MINI6410
+	bool "Mini 6410"
+	select CPU_S3C6410
+	select HAS_DM9000
+	help
+	  Say Y here if you are using FriendlyARM Mini6410 board equipped
+	  with a Samsung S3C6410 Processor
+
+endchoice
+
 endif
 
 if ARCH_S5PCxx
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:10:45 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:10:45 +0200
Subject: [PATCH 3/8] ARM/Samsung: add the clock tree support for the S3C6410
 SoC
In-Reply-To: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1343488250-12570-4-git-send-email-jbe@pengutronix.de>

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile                     |    1 +
 arch/arm/mach-samsung/clocks-s3c64xx.c             |  338 ++++++++++++++++++++
 arch/arm/mach-samsung/include/mach/s3c-clocks.h    |    3 +
 .../arm/mach-samsung/include/mach/s3c64xx-clocks.h |   67 ++++
 4 files changed, 409 insertions(+)
 create mode 100644 arch/arm/mach-samsung/clocks-s3c64xx.c
 create mode 100644 arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index d7344c8..71dc0de 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -2,5 +2,6 @@ obj-y += s3c-timer.o generic.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
+obj-$(CONFIG_ARCH_S3C64xx) += clocks-s3c64xx.o
 obj-$(CONFIG_ARCH_S5PCxx) += gpio-s5pcxx.o clocks-s5pcxx.o
 obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y)
diff --git a/arch/arm/mach-samsung/clocks-s3c64xx.c b/arch/arm/mach-samsung/clocks-s3c64xx.c
new file mode 100644
index 0000000..cf7d071
--- /dev/null
+++ b/arch/arm/mach-samsung/clocks-s3c64xx.c
@@ -0,0 +1,338 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <init.h>
+#include <clock.h>
+#include <io.h>
+#include <asm-generic/div64.h>
+#include <mach/s3c-iomap.h>
+#include <mach/s3c-generic.h>
+#include <mach/s3c-clocks.h>
+
+/*
+ * The main clock tree:
+ *
+ * ref_in
+ *    |
+ *    v
+ *    o-----------\
+ *    |            MUX -o------------\
+ *    |           / ^   |             MUX --- DIV_APLL ------- ARMCLK -> CPU core
+ *    o--- APLL --  |   |            / |
+ *    |             |   o--/2 -------  |
+ *    |       APLL_SEL  |              |<-MISC_CON_SYN667
+ *    |                 \              |
+ *    o-----------\      MUX-o-------\ |
+ *    |            MUX--/ ^  |        MUX --- DIV -o--------- HCLKx2 -> SDRAM (max. 266 MHz)
+ *    |           / ^     |  |       /             |
+ *    o---- MPLL--  |     |  o--/5 --              o-- DIV -- HCLK -> AXI / AHB (max. 133 MHz)
+ *    |             |     |                        |
+ *    |       MPLL_SEL  OTHERS_CLK_SELECT          o-- DIV -- PCLK -> APB (max. 66 MHz)
+ *    |
+ *    o-----------\
+ *    |            MUX---- to various hardware
+ *    |           / ^
+ *    o---- EPLL--  EPLL_SEL
+ *
+ */
+
+static unsigned s3c_get_apllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	if (!(readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTAPLL))
+		return S3C64XX_CLOCK_REFERENCE;
+
+	reg_val = readl(S3C_APLLCON);
+	if (!(reg_val & S3C_APLLCON_ENABLE))
+		return 0;
+	m = S3C_APLLCON_GET_MDIV(reg_val);
+	p = S3C_APLLCON_GET_PDIV(reg_val);
+	s = S3C_APLLCON_GET_SDIV(reg_val);
+
+	return (S3C64XX_CLOCK_REFERENCE * m) / (p << s);
+}
+
+uint32_t s3c_get_mpllclk(void)
+{
+	uint32_t m, p, s, reg_val;
+
+	if (!(readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTMPLL))
+		return S3C64XX_CLOCK_REFERENCE;
+
+	reg_val = readl(S3C_MPLLCON);
+	if (!(reg_val & S3C_MPLLCON_ENABLE))
+		return 0;
+
+	m = S3C_MPLLCON_GET_MDIV(reg_val);
+	p = S3C_MPLLCON_GET_PDIV(reg_val);
+	s = S3C_MPLLCON_GET_SDIV(reg_val);
+
+	return (S3C64XX_CLOCK_REFERENCE * m) / (p << s);
+}
+
+unsigned s3c_get_epllclk(void)
+{
+	u32 m, p, s, k, reg0_val, reg1_val;
+	u64 tmp;
+
+	if (!(readl(S3C_CLK_SRC) & S3C_CLK_SRC_FOUTEPLL))
+		return S3C64XX_CLOCK_REFERENCE;
+
+	reg0_val = readl(S3C_EPLLCON0);
+	if (!(reg0_val & S3C_EPLLCON0_ENABLE))
+		return 0;	/* PLL is disabled */
+
+	reg1_val = readl(S3C_EPLLCON1);
+	m = S3C_EPLLCON0_GET_MDIV(reg0_val);
+	p = S3C_EPLLCON0_GET_PDIV(reg0_val);
+	s = S3C_EPLLCON0_GET_SDIV(reg0_val);
+	k = S3C_EPLLCON1_GET_KDIV(reg1_val);
+
+	tmp = S3C64XX_CLOCK_REFERENCE;
+	tmp *= (m << 16) + k;
+	do_div(tmp, (p << s));
+
+	return (unsigned)(tmp >> 16);
+}
+
+unsigned s3c_set_epllclk(unsigned m, unsigned p, unsigned s, unsigned k)
+{
+	u32 con0, con1, src = readl(S3C_CLK_SRC) & ~S3C_CLK_SRC_FOUTEPLL;
+
+	/* do not use the EPLL clock when it is in transit to the new frequency */
+	writel(src, S3C_CLK_SRC);
+
+	con0 = S3C_EPLLCON0_SET_MDIV(m) | S3C_EPLLCON0_SET_PDIV(p) |
+				S3C_EPLLCON0_SET_SDIV(s) | S3C_EPLLCON0_ENABLE;
+	con1 = S3C_EPLLCON1_SET_KDIV(k);
+
+	/*
+	 * After changing the multiplication value 'm' the PLL output will
+	 * be masked for the time set in the EPLL_LOCK register until it
+	 * settles to the new frequency. EPLL_LOCK contains a value for a
+	 * simple counter which counts the external reference clock.
+	 */
+	writel(con0, S3C_EPLLCON0);
+	writel(con1, S3C_EPLLCON1);
+
+	udelay((1000000000 / S3C64XX_CLOCK_REFERENCE)
+		* (S3C_EPLL_LOCK_PLL_LOCKTIME(readl(S3C_EPLL_LOCK)) + 1) / 1000);
+
+	/* enable the EPLL's clock output to the system */
+	writel(src | S3C_CLK_SRC_FOUTEPLL, S3C_CLK_SRC);
+
+	return s3c_get_epllclk();
+}
+
+uint32_t s3c_get_fclk(void)
+{
+	unsigned clk;
+
+	clk = s3c_get_apllclk();
+	if (readl(S3C_MISC_CON) & S3C_MISC_CON_SYN667)
+		clk /= 2;
+
+	return clk / (S3C_CLK_DIV0_GET_ADIV(readl(S3C_CLK_DIV0)) + 1);
+}
+
+static unsigned s3c_get_hclk_in(void)
+{
+	unsigned clk;
+
+	if (readl(S3C_OTHERS) & S3C_OTHERS_CLK_SELECT)
+		clk = s3c_get_apllclk();
+	else
+		clk = s3c_get_mpllclk();
+
+	if (readl(S3C_MISC_CON) & S3C_MISC_CON_SYN667)
+		clk /= 5;
+
+	return clk;
+}
+
+static unsigned s3c_get_hclkx2(void)
+{
+	return s3c_get_hclk_in() /
+			(S3C_CLK_DIV0_GET_HCLK2(readl(S3C_CLK_DIV0)) + 1);
+}
+
+uint32_t s3c_get_hclk(void)
+{
+	return s3c_get_hclkx2() /
+			(S3C_CLK_DIV0_GET_HCLK(readl(S3C_CLK_DIV0)) + 1);
+}
+
+uint32_t s3c_get_pclk(void)
+{
+	return s3c_get_hclkx2() /
+			(S3C_CLK_DIV0_GET_PCLK(readl(S3C_CLK_DIV0)) + 1);
+}
+
+static void s3c_init_mpll_dout(void)
+{
+	unsigned reg;
+
+	/* keep it at the same frequency as HCLKx2 */
+	reg = readl(S3C_CLK_DIV0) | S3C_CLK_DIV0_SET_MPLL_DIV(1); /* e.g. / 2 */
+	writel(reg, S3C_CLK_DIV0);
+}
+
+/* configure and enable UCLK1 */
+static int s3c_init_uart_clock(void)
+{
+	unsigned reg;
+
+	s3c_init_mpll_dout();	/* to have a reliable clock source */
+
+	/* source the UART clock from the MPLL, currently *not* from EPLL */
+	reg = readl(S3C_CLK_SRC) | S3C_CLK_SRC_UARTMPLL;
+	writel(reg, S3C_CLK_SRC);
+
+	/* keep UART clock at the same frequency than the PCLK */
+	reg = readl(S3C_CLK_DIV2) & ~S3C_CLK_DIV2_UART_MASK;
+	reg |= S3C_CLK_DIV2_SET_UART(0x3);	/* / 4 */
+	writel(reg, S3C_CLK_DIV2);
+
+	/* ensure this very special clock is running */
+	reg = readl(S3C_SCLK_GATE) | S3C_SCLK_GATE_UART;
+	writel(reg, S3C_SCLK_GATE);
+
+	return 0;
+}
+core_initcall(s3c_init_uart_clock);
+
+/*                                         UART source selection
+ * The UART related clock path:                     |
+ *                                                  v
+ * PCLK --------------------------------------o-----0-\
+ * ???? -------------------------------UCLK0--|-----1--\MUX----- UART
+ * MPLL -----DIV0------\                      +-----2--/
+ *                     MUX---DIV2------UCLK1--------3-/
+ * EPLL ---------------/
+ *                      ^SRC_UARTMPLL
+ */
+unsigned s3c_get_uart_clk(unsigned source)
+{
+	u32 reg;
+	unsigned clk, pdiv, uartpdiv;
+
+	switch (source) {
+	default: /* PCLK */
+		clk = s3c_get_pclk();
+		pdiv = uartpdiv = 1;
+		break;
+	case 1: /* UCLK0 */
+		clk = 0;
+		pdiv = uartpdiv = 1;	/* TODO */
+		break;
+	case 3: /* UCLK1 */
+		reg = readl(S3C_CLK_SRC);
+		if (reg & S3C_CLK_SRC_UARTMPLL) {
+			clk = s3c_get_mpllclk();
+			pdiv = S3C_CLK_DIV0_GET_MPLL_DIV(readl(S3C_CLK_DIV0)) + 1;
+		} else {
+			clk = s3c_get_epllclk();
+			pdiv = 1;
+		}
+		uartpdiv = S3C_CLK_DIV2_GET_UART(readl(S3C_CLK_DIV2)) + 1;
+		break;
+	}
+
+	return clk / pdiv / uartpdiv;
+}
+
+/*
+ * The MMC related clock path:
+ *
+ *              MMCx_SEL
+ *                 |
+ *                 v
+ * EPLLout --------0-\
+ * MPLLout --DIV0--1--\-------SCLK_MMCx----DIV_MMCx------>HSMMCx
+ * EPLLin  --------2--/        on/off      / 1..16
+ * 27 MHz  --------3-/
+ *
+ * The datasheet is not very precise here, so the schematic shown above was
+ * made by checking various bits in the SYSCON.
+ */
+unsigned s3c_get_hsmmc_clk(int id)
+{
+	u32 sel, div, sclk = readl(S3C_SCLK_GATE);
+	unsigned bclk;
+
+	if (!(sclk & S3C_SCLK_GATE_MMC(id)))
+		return 0; /* disabled */
+
+	sel = S3C_CLK_SRC_GET_MMC_SEL(id, readl(S3C_CLK_SRC));
+	switch (sel) {
+	case 0:
+		bclk = s3c_get_epllclk();
+		break;
+	case 1:
+		bclk = s3c_get_mpllclk();
+		bclk >>= S3C_CLK_DIV0_GET_MPLL_DIV(readl(S3C_CLK_DIV0));
+		break;
+	case 2:
+		bclk = S3C64XX_CLOCK_REFERENCE;
+		break;
+	case 3:
+		bclk = 27000000;
+		break;
+	}
+
+	div = S3C_CLK_DIV0_GET_MMC(id, readl(S3C_CLK_DIV0)) + 1;
+
+	return bclk / div;
+}
+
+void s3c_set_hsmmc_clk(int id, int src, unsigned div)
+{
+	u32 reg;
+
+	if (!div)
+		div = 1;
+
+	writel(readl(S3C_SCLK_GATE) & ~S3C_SCLK_GATE_MMC(id), S3C_SCLK_GATE);
+
+	/* select the new clock source */
+	reg = readl(S3C_CLK_SRC) & ~S3C_CLK_SRC_SET_MMC_SEL(id, ~0);
+	reg |= S3C_CLK_SRC_SET_MMC_SEL(id, src);
+	writel(reg, S3C_CLK_SRC);
+
+	/* select the new pre-divider */
+	reg = readl(S3C_CLK_DIV0) & ~ S3C_CLK_DIV0_SET_MMC(id, ~0);
+	reg |= S3C_CLK_DIV0_SET_MMC(id, div - 1);
+	writel(reg, S3C_CLK_DIV0);
+
+	/* calling this function implies enabling of the clock */
+	writel(readl(S3C_SCLK_GATE) | S3C_SCLK_GATE_MMC(id), S3C_SCLK_GATE);
+}
+
+int s3c64xx_dump_clocks(void)
+{
+	printf("refclk:  %7d kHz\n", S3C64XX_CLOCK_REFERENCE / 1000);
+	printf("apll:    %7d kHz\n", s3c_get_apllclk() / 1000);
+	printf("mpll:    %7d kHz\n", s3c_get_mpllclk() / 1000);
+	printf("epll:    %7d kHz\n", s3c_get_epllclk() / 1000);
+	printf("CPU:     %7d kHz\n", s3c_get_fclk() / 1000);
+	printf("hclkx2:  %7d kHz\n", s3c_get_hclkx2() / 1000);
+	printf("hclk:    %7d kHz\n", s3c_get_hclk() / 1000);
+	printf("pclk:    %7d kHz\n", s3c_get_pclk() / 1000);
+	return 0;
+}
+
+late_initcall(s3c64xx_dump_clocks);
diff --git a/arch/arm/mach-samsung/include/mach/s3c-clocks.h b/arch/arm/mach-samsung/include/mach/s3c-clocks.h
index f577306..6920ca9 100644
--- a/arch/arm/mach-samsung/include/mach/s3c-clocks.h
+++ b/arch/arm/mach-samsung/include/mach/s3c-clocks.h
@@ -25,6 +25,9 @@
 #ifdef CONFIG_ARCH_S3C24xx
 # include <mach/s3c24xx-clocks.h>
 #endif
+#ifdef CONFIG_ARCH_S3C64xx
+# include <mach/s3c64xx-clocks.h>
+#endif
 #ifdef CONFIG_ARCH_S5PCxx
 # include <mach/s5pcxx-clocks.h>
 #endif
diff --git a/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h b/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h
new file mode 100644
index 0000000..8aa60bc
--- /dev/null
+++ b/arch/arm/mach-samsung/include/mach/s3c64xx-clocks.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2012 Juergen Beisert
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define S3C_EPLL_LOCK  (S3C_CLOCK_POWER_BASE + 0x08)
+# define S3C_EPLL_LOCK_PLL_LOCKTIME(x) ((x) & 0xffff)
+#define S3C_APLLCON (S3C_CLOCK_POWER_BASE + 0x0c)
+# define S3C_APLLCON_ENABLE (1 << 31)
+# define S3C_APLLCON_GET_MDIV(x) (((x) >> 16) & 0x3ff)
+# define S3C_APLLCON_GET_PDIV(x) (((x) >> 8) & 0x3f)
+# define S3C_APLLCON_GET_SDIV(x) ((x) & 0x7)
+#define S3C_MPLLCON (S3C_CLOCK_POWER_BASE + 0x10)
+# define S3C_MPLLCON_ENABLE (1 << 31)
+# define S3C_MPLLCON_GET_MDIV(x) (((x) >> 16) & 0x3ff)
+# define S3C_MPLLCON_GET_PDIV(x) (((x) >> 8) & 0x3f)
+# define S3C_MPLLCON_GET_SDIV(x) ((x) & 0x7)
+#define S3C_EPLLCON0 (S3C_CLOCK_POWER_BASE + 0x14)
+# define S3C_EPLLCON0_ENABLE (1 << 31)
+# define S3C_EPLLCON0_GET_MDIV(x) (((x) >> 16) & 0xff)
+# define S3C_EPLLCON0_SET_MDIV(x) (((x) & 0xff) << 16)
+# define S3C_EPLLCON0_GET_PDIV(x) (((x) >> 8) & 0x3f)
+# define S3C_EPLLCON0_SET_PDIV(x) (((x) & 0x3f) << 8)
+# define S3C_EPLLCON0_GET_SDIV(x) ((x) & 0x7)
+# define S3C_EPLLCON0_SET_SDIV(x) ((x) & 0x7)
+#define S3C_EPLLCON1 (S3C_CLOCK_POWER_BASE + 0x18)
+# define S3C_EPLLCON1_GET_KDIV(x) ((x) & 0xffff)
+# define S3C_EPLLCON1_SET_KDIV(x) ((x) & 0xffff)
+#define S3C_CLKCON (S3C_CLOCK_POWER_BASE + 0xc)
+#define S3C_CLKSLOW (S3C_CLOCK_POWER_BASE + 0x10)
+#define S3C_CLKDIVN (S3C_CLOCK_POWER_BASE + 0x14)
+#define S3C_CLK_SRC (S3C_CLOCK_POWER_BASE + 0x01c)
+# define S3C_CLK_SRC_GET_MMC_SEL(x, v) (((v) >> (18 + (x * 2))) & 0x3)
+# define S3C_CLK_SRC_SET_MMC_SEL(x, v) (((v) & 0x3) << (18 + (x * 2)))
+# define S3C_CLK_SRC_UARTMPLL (1 << 13)
+# define S3C_CLK_SRC_FOUTEPLL (1 << 2)
+# define S3C_CLK_SRC_FOUTMPLL (1 << 1)
+# define S3C_CLK_SRC_FOUTAPLL (1 << 0)
+#define S3C_CLK_DIV0 (S3C_CLOCK_POWER_BASE + 0x020)
+# define S3C_CLK_DIV0_GET_ADIV(x) ((x) & 0xf)
+# define S3C_CLK_DIV0_GET_HCLK2(x) (((x) >> 9) & 0x7)
+# define S3C_CLK_DIV0_GET_HCLK(x) (((x) >> 8) & 0x1)
+# define S3C_CLK_DIV0_GET_PCLK(x) (((x) >> 12) & 0xf)
+# define S3C_CLK_DIV0_SET_MPLL_DIV(x) (((x) & 0x1) << 4)
+# define S3C_CLK_DIV0_GET_MPLL_DIV(x) (((x) >> 4) & 0x1)
+# define S3C_CLK_DIV0_GET_MMC(x, v) (((v) >> (4 * x)) & 0xf)
+# define S3C_CLK_DIV0_SET_MMC(x, v) (((v) & 0xf) << (4 * x))
+#define S3C_CLK_DIV2 (S3C_CLOCK_POWER_BASE + 0x028)
+# define S3C_CLK_DIV2_UART_MASK (0xf << 16)
+# define S3C_CLK_DIV2_SET_UART(x) ((x) << 16)
+# define S3C_CLK_DIV2_GET_UART(x) (((x) >> 16) & 0xf)
+#define S3C_SCLK_GATE (S3C_CLOCK_POWER_BASE + 0x038)
+# define S3C_SCLK_GATE_UART (1 << 5)
+# define S3C_SCLK_GATE_MMC(x) (1 << (24 + x))
+#define S3C_MISC_CON (S3C_CLOCK_POWER_BASE + 0x838)
+# define S3C_MISC_CON_SYN667 (1 << 19)
+#define S3C_OTHERS (S3C_CLOCK_POWER_BASE + 0x900)
+# define S3C_OTHERS_CLK_SELECT (1 << 6)
-- 
1.7.10.4



From jbe at pengutronix.de  Sat Jul 28 11:29:47 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sat, 28 Jul 2012 17:29:47 +0200
Subject: [PATCH 2/8] ARM/Samsung: adapt the generic timer driver to
 support the S3C6410 SoC
In-Reply-To: <1343488250-12570-3-git-send-email-jbe@pengutronix.de>
References: <1343488250-12570-1-git-send-email-jbe@pengutronix.de>
 <1343488250-12570-3-git-send-email-jbe@pengutronix.de>
Message-ID: <201207281729.48097.jbe@pengutronix.de>

Hi Alexey,

Juergen Beisert wrote:
> The S3C64XX SoC has a real 32 bit counter, but almost the same style of
> registers. It's enough to change the parameters, to get the routines work
> on this SoC.
>
> TODO: what about the S5P SoCs?
>
> Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
> ---
>  arch/arm/mach-samsung/s3c-timer.c |   17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-samsung/s3c-timer.c b/arch/arm/mach-samsung/s3c-timer.c
> index 6665c8c..271f97d 100644 
> --- a/arch/arm/mach-samsung/s3c-timer.c
> +++ b/arch/arm/mach-samsung/s3c-timer.c
> @@ -37,11 +37,20 @@
>  #define S3C_TCNTB4 (S3C_TIMER_BASE + 0x3c)
>  #define S3C_TCNTO4 (S3C_TIMER_BASE + 0x40)
>
> -#define TIMER_WIDTH 16
> -#define TIMER_SHIFT 10
> -#define PRE_MUX 3
> -#define PRE_MUX_ADD 1
> +#ifdef CONFIG_ARCH_S3C24xx
> +# define TIMER_WIDTH 16
> +# define TIMER_SHIFT 10
> +# define PRE_MUX 3
> +# define PRE_MUX_ADD 1
>  static const uint32_t max = 0x0000ffff;
> +#endif
> +#ifdef CONFIG_ARCH_S3C64xx
> +# define TIMER_WIDTH 32
> +# define TIMER_SHIFT 10
> +# define PRE_MUX 4
> +# define PRE_MUX_ADD 0
> +static const uint32_t max = ~0;
> +#endif
>
>  static void s3c_init_t4_clk_source(void)
>  {

Can you please check this patch on your S5P-SoC? I guess your SoC should work
like the S3C64xx variant, but I'm not sure.

Regards,
Juergen

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From marc at cpdesign.com.au  Sun Jul 29 03:41:47 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:47 +1000
Subject: at24 eeprom driver (V2) and misc patches
Message-ID: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>

Hi,

These patches add an (improved) at24 eeprom driver and some other fixes. The
eeprom driver has improved write handling that polls the device for write 
completion (rather than fixed 10ms delay).

The eeprom driver requires patch 3 and 4. 

The nand patches fix a build error when BBT is not enabled.

Cheers,
Marc



From marc at cpdesign.com.au  Sun Jul 29 03:41:48 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:48 +1000
Subject: [PATCH 1/7] imx35: 6-bit divider helper
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1343547714-32740-2-git-send-email-marc@cpdesign.com.au>

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 arch/arm/mach-imx/speed-imx35.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/speed-imx35.c b/arch/arm/mach-imx/speed-imx35.c
index 684dc14..905ab47 100644
--- a/arch/arm/mach-imx/speed-imx35.c
+++ b/arch/arm/mach-imx/speed-imx35.c
@@ -97,6 +97,11 @@ static unsigned long get_3_3_div(unsigned long in)
 	return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1);
 }
 
+static unsigned long get_6_div(unsigned long in)
+{
+	return ((in & 0x3f) + 1);
+}
+
 static unsigned long imx_get_ipg_perclk(void)
 {
 	ulong pdr0 = readl(IMX_CCM_BASE + CCM_PDR0);
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 29 03:41:49 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:49 +1000
Subject: [PATCH 2/7] imx35: mmc clock has 6 bit divider, not 3_3
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1343547714-32740-3-git-send-email-marc@cpdesign.com.au>

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 arch/arm/mach-imx/speed-imx35.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-imx/speed-imx35.c b/arch/arm/mach-imx/speed-imx35.c
index 905ab47..6d4236a 100644
--- a/arch/arm/mach-imx/speed-imx35.c
+++ b/arch/arm/mach-imx/speed-imx35.c
@@ -170,10 +170,11 @@ unsigned long imx_get_uartclk(void)
 		return imx_get_ppllclk() / div;
 }
 
+/* mmc0 clk only */
 unsigned long imx_get_mmcclk(void)
 {
 	unsigned long pdr3 = readl(IMX_CCM_BASE + CCM_PDR3);
-	unsigned long div = get_3_3_div(pdr3);
+	unsigned long div = get_6_div(pdr3);
 
 	if (pdr3 & (1 << 6))
 		return imx_get_armclk() / div;
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 29 03:41:50 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:50 +1000
Subject: [PATCH 3/7] i2c: add platform_data for i2c_board_info
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1343547714-32740-4-git-send-email-marc@cpdesign.com.au>

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/i2c/i2c.c |    1 +
 include/i2c/i2c.h |    1 +
 2 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
index 5df0d30..15f5507 100644
--- a/drivers/i2c/i2c.c
+++ b/drivers/i2c/i2c.c
@@ -250,6 +250,7 @@ struct i2c_client *i2c_new_device(struct i2c_adapter *adapter,
 	client = xzalloc(sizeof *client);
 	strcpy(client->dev.name, chip->type);
 	client->dev.type_data = client;
+	client->dev.platform_data = chip->platform_data;
 	client->adapter = adapter;
 	client->addr = chip->addr;
 
diff --git a/include/i2c/i2c.h b/include/i2c/i2c.h
index ccbf518..c3e1763 100644
--- a/include/i2c/i2c.h
+++ b/include/i2c/i2c.h
@@ -99,6 +99,7 @@ struct i2c_client {
 struct i2c_board_info {
 	char		type[I2C_NAME_SIZE];	/**< name of device */
 	unsigned short	addr;			/**< stored in i2c_client.addr */
+	void		*platform_data;		/**< platform data for device */
 };
 
 /**
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 29 03:41:51 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:51 +1000
Subject: [PATCH 4/7] i2c: device id default to -1 for auto assignment
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1343547714-32740-5-git-send-email-marc@cpdesign.com.au>

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/i2c/i2c.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
index 15f5507..c0d8fa2 100644
--- a/drivers/i2c/i2c.c
+++ b/drivers/i2c/i2c.c
@@ -251,6 +251,7 @@ struct i2c_client *i2c_new_device(struct i2c_adapter *adapter,
 	strcpy(client->dev.name, chip->type);
 	client->dev.type_data = client;
 	client->dev.platform_data = chip->platform_data;
+	client->dev.id = -1;
 	client->adapter = adapter;
 	client->addr = chip->addr;
 
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 29 03:41:53 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:53 +1000
Subject: [PATCH 6/7] nand: Prevent drivers setting NAND_USE_FLASH_BBT if BBT
 config not enabled.
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1343547714-32740-7-git-send-email-marc@cpdesign.com.au>

This prevents drivers from setting the options flags to use the flash
bab block table when the BBT is not enabled in config.

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/mtd/nand/atmel_nand.c   |    2 +-
 drivers/mtd/nand/nand_imx.c     |    2 +-
 drivers/mtd/nand/nand_s3c24xx.c |    2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 96624a1..cc62df9 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -407,7 +407,7 @@ static int __init atmel_nand_probe(struct device_d *dev)
 		}
 	}
 
-	if (host->board->on_flash_bbt) {
+	if (IS_ENABLED(CONFIG_NAND_BBT) && host->board->on_flash_bbt) {
 		printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
 		nand_chip->options |= NAND_USE_FLASH_BBT;
 	}
diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c
index e75ffbc..67b056b 100644
--- a/drivers/mtd/nand/nand_imx.c
+++ b/drivers/mtd/nand/nand_imx.c
@@ -1142,7 +1142,7 @@ static int __init imxnd_probe(struct device_d *dev)
 		imx_nand_set_layout(0, 16);
 	}
 
-	if (pdata->flash_bbt) {
+	if (IS_ENABLED(CONFIG_NAND_BBT) && pdata->flash_bbt) {
 		this->bbt_td = &bbt_main_descr;
 		this->bbt_md = &bbt_mirror_descr;
 		/* update flash based bbt */
diff --git a/drivers/mtd/nand/nand_s3c24xx.c b/drivers/mtd/nand/nand_s3c24xx.c
index c629701..63a3aac 100644
--- a/drivers/mtd/nand/nand_s3c24xx.c
+++ b/drivers/mtd/nand/nand_s3c24xx.c
@@ -469,7 +469,7 @@ static int s3c24x0_nand_probe(struct device_d *dev)
 		chip->ecc.layout = &nand_hw_eccoob;
 	}
 
-	if (pdata->flash_bbt) {
+	if (IS_ENABLED(CONFIG_NAND_BBT) && pdata->flash_bbt) {
 		/* use a flash based bbt */
 		chip->options |= NAND_USE_FLASH_BBT;
 	}
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 29 03:41:52 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:52 +1000
Subject: [PATCH 5/7] nand: fix build error when BBT not enabled.
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1343547714-32740-6-git-send-email-marc@cpdesign.com.au>

This fixes following error when bad blocks config option is not enabled:

drivers/built-in.o: In function `nand_erase_nand':
drivers/mtd/nand/nand_write.c:721: undefined reference to `nand_update_bbt'
drivers/built-in.o: In function `nand_default_block_markbad':
drivers/mtd/nand/nand_write.c:76: undefined reference to `nand_update_bbt'
make: *** [barebox] Error 1

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/mtd/nand/nand_write.c |   12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/nand_write.c b/drivers/mtd/nand/nand_write.c
index 13b6c89..0fd49d6 100644
--- a/drivers/mtd/nand/nand_write.c
+++ b/drivers/mtd/nand/nand_write.c
@@ -72,9 +72,15 @@ int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
 		chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
 
 	/* Do we have a flash based bad block table ? */
-	if (chip->options & NAND_USE_FLASH_BBT)
+	if (chip->options & NAND_USE_FLASH_BBT) {
+#if defined(CONFIG_NAND_BBT)
 		ret = nand_update_bbt(mtd, ofs);
-	else {
+#else
+		printk(KERN_WARNING "NAND trying to use BBT,"
+				"but not supported\n");
+		ret = 0;
+#endif
+	} else {
 		/* We write two bytes, so we dont have to mess with 16 bit
 		 * access
 		 */
@@ -714,11 +720,13 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
 	for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
 		if (!rewrite_bbt[chipnr])
 			continue;
+#if defined(CONFIG_NAND_BBT)
 		/* update the BBT for chip */
 		MTD_DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt "
 		      "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr],
 		      chip->bbt_td->pages[chipnr]);
 		nand_update_bbt(mtd, rewrite_bbt[chipnr]);
+#endif
 	}
 
 	/* Return more or less happy */
-- 
1.7.7



From marc at cpdesign.com.au  Sun Jul 29 03:41:54 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 17:41:54 +1000
Subject: [PATCH 7/7] drivers/eeprom: at24: add I2C eeprom driver for 24c01/02
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <1343547714-32740-8-git-send-email-marc@cpdesign.com.au>

This series adds a driver for at24 eeproms. Much of the guts of the code
was taken from the at24 driver in the linux kernel.

The device is polled for write completion. All the datasheets I looked
at had a max of 10ms for eeprom write time.
The driver automatically wraps the writes to page boundaries, so we don't
write more than is remaining in the page.

The driver can not yet handle addressing offsets > 256 in devices with
larger capacities.

The platform data fields are all optional, if they are zero they are
assigned default values. As the device capabilities can not be probed,
the default assumption is that the device is 256 bytes.

Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
 drivers/eeprom/Kconfig  |    7 ++
 drivers/eeprom/Makefile |    1 +
 drivers/eeprom/at24.c   |  233 +++++++++++++++++++++++++++++++++++++++++++++++
 include/i2c/at24.h      |   13 +++
 4 files changed, 254 insertions(+), 0 deletions(-)
 create mode 100644 drivers/eeprom/at24.c
 create mode 100644 include/i2c/at24.h

diff --git a/drivers/eeprom/Kconfig b/drivers/eeprom/Kconfig
index a0b5489..a2bcaaa 100644
--- a/drivers/eeprom/Kconfig
+++ b/drivers/eeprom/Kconfig
@@ -8,4 +8,11 @@ config EEPROM_AT25
 	  after you configure the board init code to know about each eeprom
 	  on your target board.
 
+config EEPROM_AT24
+	bool "at24 based eeprom"
+	depends on I2C
+	help
+	  Provides read/write for the at24 family of I2C EEPROMS.
+	  Currently only the 2K bit versions are supported.
+
 endmenu
diff --git a/drivers/eeprom/Makefile b/drivers/eeprom/Makefile
index e323bd0..e287eb0 100644
--- a/drivers/eeprom/Makefile
+++ b/drivers/eeprom/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_EEPROM_AT25)	+= at25.o
+obj-$(CONFIG_EEPROM_AT24)	+= at24.o
diff --git a/drivers/eeprom/at24.c b/drivers/eeprom/at24.c
new file mode 100644
index 0000000..fa16d88
--- /dev/null
+++ b/drivers/eeprom/at24.c
@@ -0,0 +1,233 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *               2009 Marc Kleine-Budde <mkl at pengutronix.de>
+ *               2010 Marc Reilly, Creative Product Design
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <clock.h>
+#include <driver.h>
+#include <xfuncs.h>
+#include <errno.h>
+
+#include <i2c/i2c.h>
+#include <i2c/at24.h>
+
+#define DRIVERNAME		"at24"
+#define DEVICENAME		"eeprom"
+
+struct at24 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+	/* size in bytes */
+	unsigned int		size;
+	unsigned int		page_size;
+};
+
+#define to_at24(a)		container_of(a, struct at24, cdev)
+
+static ssize_t at24_read(struct cdev *cdev, void *_buf, size_t count,
+		ulong offset, ulong flags)
+{
+	struct at24 *priv = to_at24(cdev);
+	u8 *buf = _buf;
+	size_t i = count;
+	ssize_t numwritten = 0;
+	int retries = 5;
+	int ret;
+
+	while (i && retries) {
+		ret = i2c_read_reg(priv->client, offset, buf, i);
+		if (ret < 0)
+			return (ssize_t)ret;
+		else if (ret == 0)
+			--retries;
+
+		numwritten += ret;
+		i -= ret;
+		offset += ret;
+		buf += ret;
+	}
+
+	return numwritten;
+}
+
+static int at24_poll_device(struct i2c_client *client)
+{
+	uint64_t start;
+	u8 dummy;
+	int ret;
+
+	/*
+	 * eeprom can take 5-10ms to write, during which time it
+	 * will not respond. Poll it by attempting reads.
+	 */
+	start = get_time_ns();
+	while (1) {
+		ret = i2c_master_recv(client, &dummy, 1);
+		if (ret > 0)
+			return ret;
+
+		if (is_timeout(start, 20 * MSECOND))
+			return -EIO;
+	}
+
+	return 0;
+}
+
+static ssize_t at24_write(struct cdev *cdev, const void *_buf, size_t count,
+		ulong offset, ulong flags)
+{
+	struct at24 *priv = to_at24(cdev);
+	const u8 *buf = _buf;
+	const int pagesize = priv->page_size;
+	ssize_t numwritten = 0;
+
+	while (count) {
+		int ret, numtowrite;
+		int page_remain = pagesize - (offset % pagesize);
+
+		numtowrite = count;
+		if (numtowrite > pagesize)
+			numtowrite = pagesize;
+		/* don't write past page */
+		if (numtowrite > page_remain)
+			numtowrite = page_remain;
+
+		ret = i2c_write_reg(priv->client, offset, buf, numtowrite);
+		if (ret < 0)
+			return (ssize_t)ret;
+
+		numwritten += ret;
+		buf += ret;
+		count -= ret;
+		offset += ret;
+
+		ret = at24_poll_device(priv->client);
+		if (ret < 0)
+			return (ssize_t)ret;
+	}
+
+	return numwritten;
+}
+
+/* max page size of any of the at24 family devices is 16 bytes */
+#define AT24_MAX_PAGE_SIZE	16
+
+static ssize_t at24_erase(struct cdev *cdev, size_t count, unsigned long offset)
+{
+	struct at24 *priv = to_at24(cdev);
+	char erase[AT24_MAX_PAGE_SIZE];
+	const int pagesize = priv->page_size;
+	ssize_t numwritten = 0;
+
+	memset(erase, 0xff, sizeof(erase));
+
+	while (count) {
+		int ret, numtowrite;
+		int page_remain = pagesize - (offset % pagesize);
+
+		numtowrite = count;
+		if (numtowrite > pagesize)
+			numtowrite = pagesize;
+		/* don't write past page */
+		if (numtowrite > page_remain)
+			numtowrite = page_remain;
+
+		ret = i2c_write_reg(priv->client, offset, erase, numtowrite);
+		if (ret < 0)
+			return (ssize_t)ret;
+
+		numwritten += ret;
+		count -= ret;
+		offset += ret;
+
+		ret = at24_poll_device(priv->client);
+		if (ret < 0)
+			return (ssize_t)ret;
+	}
+
+	return 0;
+}
+
+static struct file_operations at24_fops = {
+	.lseek	= dev_lseek_default,
+	.read	= at24_read,
+	.write	= at24_write,
+	.erase	= at24_erase,
+};
+
+static int at24_probe(struct device_d *dev)
+{
+	const struct at24_platform_data *pdata;
+	struct at24 *at24;
+	at24 = xzalloc(sizeof(*at24));
+
+	dev->priv = at24;
+	at24->client = to_i2c_client(dev);
+	at24->cdev.dev = dev;
+	at24->cdev.ops = &at24_fops;
+
+	pdata = dev->platform_data;
+	if (pdata) {
+		at24->cdev.size = pdata->size_bytes;
+		at24->cdev.name = strdup(pdata->name);
+		at24->page_size = pdata->page_size;
+	}
+
+	if (at24->cdev.size == 0)
+		at24->cdev.size = 256;
+	if (!at24->cdev.name || at24->cdev.name[0] == '\0') {
+		char buf[20];
+		sprintf(buf, DEVICENAME"%d", dev->id);
+		at24->cdev.name = strdup(buf);
+	}
+	if (at24->page_size == 0) {
+		switch (at24->cdev.size) {
+		case 512:
+		case 1024:
+		case 2048:
+			at24->page_size = 16;
+			break;
+		case 128:
+		case 256:
+		default:
+			at24->page_size = 8;
+			break;
+		}
+	}
+
+	devfs_create(&at24->cdev);
+
+	return 0;
+}
+
+static struct driver_d at24_driver = {
+	.name  = DRIVERNAME,
+	.probe = at24_probe,
+};
+
+static int at24_init(void)
+{
+	register_driver(&at24_driver);
+	return 0;
+}
+
+device_initcall(at24_init);
diff --git a/include/i2c/at24.h b/include/i2c/at24.h
new file mode 100644
index 0000000..00e4624
--- /dev/null
+++ b/include/i2c/at24.h
@@ -0,0 +1,13 @@
+#ifndef _EEPROM_AT24_H
+#define _EEPROM_AT24_H
+
+struct at24_platform_data {
+	/* preferred device name */
+	const char name[10];
+	/* page write size in bytes */
+	u8 page_size;
+	/* device size in bytes */
+	u16 size_bytes;
+};
+
+#endif /* _EEPROM_AT24_H */
-- 
1.7.7



From plagnioj at jcrosoft.com  Sun Jul 29 05:58:16 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 29 Jul 2012 11:58:16 +0200
Subject: [PATCH 5/7] nand: fix build error when BBT not enabled.
In-Reply-To: <1343547714-32740-6-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-6-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120729095816.GB26655@game.jcrosoft.org>

On 17:41 Sun 29 Jul     , Marc Reilly wrote:
> This fixes following error when bad blocks config option is not enabled:
> 
> drivers/built-in.o: In function `nand_erase_nand':
> drivers/mtd/nand/nand_write.c:721: undefined reference to `nand_update_bbt'
> drivers/built-in.o: In function `nand_default_block_markbad':
> drivers/mtd/nand/nand_write.c:76: undefined reference to `nand_update_bbt'
> make: *** [barebox] Error 1
> 
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> ---
>  drivers/mtd/nand/nand_write.c |   12 ++++++++++--
>  1 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_write.c b/drivers/mtd/nand/nand_write.c
> index 13b6c89..0fd49d6 100644
> --- a/drivers/mtd/nand/nand_write.c
> +++ b/drivers/mtd/nand/nand_write.c
> @@ -72,9 +72,15 @@ int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
>  		chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
>  
>  	/* Do we have a flash based bad block table ? */
> -	if (chip->options & NAND_USE_FLASH_BBT)
> +	if (chip->options & NAND_USE_FLASH_BBT) {
> +#if defined(CONFIG_NAND_BBT)
use if (IS_ENABLED())

Best Regards,
J.


From plagnioj at jcrosoft.com  Sun Jul 29 05:59:03 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 29 Jul 2012 11:59:03 +0200
Subject: [PATCH 4/7] i2c: device id default to -1 for auto assignment
In-Reply-To: <1343547714-32740-5-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-5-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120729095903.GC26655@game.jcrosoft.org>

On 17:41 Sun 29 Jul     , Marc Reilly wrote:
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> ---
>  drivers/i2c/i2c.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
> index 15f5507..c0d8fa2 100644
> --- a/drivers/i2c/i2c.c
> +++ b/drivers/i2c/i2c.c
> @@ -251,6 +251,7 @@ struct i2c_client *i2c_new_device(struct i2c_adapter *adapter,
>  	strcpy(client->dev.name, chip->type);
>  	client->dev.type_data = client;
>  	client->dev.platform_data = chip->platform_data;
> +	client->dev.id = -1;
use the macro DEVICE_ID_DYNAMIC

Best Regards,
J.


From plagnioj at jcrosoft.com  Sun Jul 29 06:00:36 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 29 Jul 2012 12:00:36 +0200
Subject: [PATCH 6/7] nand: Prevent drivers setting NAND_USE_FLASH_BBT
 if BBT config not enabled.
In-Reply-To: <1343547714-32740-7-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-7-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120729100036.GD26655@game.jcrosoft.org>

On 17:41 Sun 29 Jul     , Marc Reilly wrote:
> This prevents drivers from setting the options flags to use the flash
> bab block table when the BBT is not enabled in config.
> 
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> ---
>  drivers/mtd/nand/atmel_nand.c   |    2 +-
>  drivers/mtd/nand/nand_imx.c     |    2 +-
>  drivers/mtd/nand/nand_s3c24xx.c |    2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 96624a1..cc62df9 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -407,7 +407,7 @@ static int __init atmel_nand_probe(struct device_d *dev)
>  		}
>  	}
>  
> -	if (host->board->on_flash_bbt) {
> +	if (IS_ENABLED(CONFIG_NAND_BBT) && host->board->on_flash_bbt) {
>  		printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
>  		nand_chip->options |= NAND_USE_FLASH_BBT;
driver pass this info to the nand framework which is supposed to handle this
by itself

Best Regards,
J.


From marc at cpdesign.com.au  Sun Jul 29 07:28:32 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 21:28:32 +1000
Subject: [PATCH 5/7] nand: fix build error when BBT not enabled.
In-Reply-To: <20120729095816.GB26655@game.jcrosoft.org>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-6-git-send-email-marc@cpdesign.com.au>
 <20120729095816.GB26655@game.jcrosoft.org>
Message-ID: <000001cd6d7d$51cb7400$f5625c00$@cpdesign.com.au>

Hi,

> On 17:41 Sun 29 Jul     , Marc Reilly wrote:
> > This fixes following error when bad blocks config option is not enabled:
> >
> > drivers/built-in.o: In function `nand_erase_nand':
> > drivers/mtd/nand/nand_write.c:721: undefined reference to
> `nand_update_bbt'
> > drivers/built-in.o: In function `nand_default_block_markbad':
> > drivers/mtd/nand/nand_write.c:76: undefined reference to
> `nand_update_bbt'
> > make: *** [barebox] Error 1


 >  	/* Do we have a flash based bad block table ? */
> > -	if (chip->options & NAND_USE_FLASH_BBT)
> > +	if (chip->options & NAND_USE_FLASH_BBT) { #if
> > +defined(CONFIG_NAND_BBT)
> use if (IS_ENABLED())

The intention of this is to avoid referencing nand_update_bbt, I think using
IS_ENABLED() would not avoid that.

Cheers,
Marc



From marc at cpdesign.com.au  Sun Jul 29 07:30:45 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Sun, 29 Jul 2012 21:30:45 +1000
Subject: [PATCH 6/7] nand: Prevent drivers setting NAND_USE_FLASH_BBT if
 BBT config not enabled.
In-Reply-To: <20120729100036.GD26655@game.jcrosoft.org>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-7-git-send-email-marc@cpdesign.com.au>
 <20120729100036.GD26655@game.jcrosoft.org>
Message-ID: <000601cd6d7d$9aaab230$d0001690$@cpdesign.com.au>



> -----Original Message-----
> From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj at jcrosoft.com]
> Sent: Sunday, 29 July 2012 8:01 PM
> To: Marc Reilly
> Cc: barebox at lists.infradead.org
> Subject: Re: [PATCH 6/7] nand: Prevent drivers setting
> NAND_USE_FLASH_BBT if BBT config not enabled.
> 
> On 17:41 Sun 29 Jul     , Marc Reilly wrote:
> > This prevents drivers from setting the options flags to use the flash
> > bab block table when the BBT is not enabled in config.
> >
> > Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> > ---
> >  drivers/mtd/nand/atmel_nand.c   |    2 +-
> >  drivers/mtd/nand/nand_imx.c     |    2 +-
> >  drivers/mtd/nand/nand_s3c24xx.c |    2 +-
> >  3 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/atmel_nand.c
> > b/drivers/mtd/nand/atmel_nand.c index 96624a1..cc62df9 100644
> > --- a/drivers/mtd/nand/atmel_nand.c
> > +++ b/drivers/mtd/nand/atmel_nand.c
> > @@ -407,7 +407,7 @@ static int __init atmel_nand_probe(struct device_d
> *dev)
> >  		}
> >  	}
> >
> > -	if (host->board->on_flash_bbt) {
> > +	if (IS_ENABLED(CONFIG_NAND_BBT) && host->board-
> >on_flash_bbt) {
> >  		printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
> >  		nand_chip->options |= NAND_USE_FLASH_BBT;
> driver pass this info to the nand framework which is supposed to handle
this
> by itself

Ok, cool. Assuming the nand framework handles this then please drop this
patch.

Cheers,
Narc




From agalakhov at gmail.com  Sun Jul 29 13:03:25 2012
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Sun, 29 Jul 2012 23:03:25 +0600
Subject: Barebox hangs after boot
Message-ID: <CA+LT+-T+8VD5ONbWyX+OQxk2MX221Z-vstimqpYKh3onY+5K3Q@mail.gmail.com>

Hello,

While debugging S5PV210 code I ran into the following problem. Barebox
starts, the barebox command line appears on the console but does not
react to keypresses. I found no obvious dependence on the config
settings.

What may be the cause of this problem and how do I debug it?

Regards,
Alex


From jbe at pengutronix.de  Sun Jul 29 13:22:43 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 29 Jul 2012 19:22:43 +0200
Subject: Barebox hangs after boot
In-Reply-To: <CA+LT+-T+8VD5ONbWyX+OQxk2MX221Z-vstimqpYKh3onY+5K3Q@mail.gmail.com>
References: <CA+LT+-T+8VD5ONbWyX+OQxk2MX221Z-vstimqpYKh3onY+5K3Q@mail.gmail.com>
Message-ID: <201207291922.43872.jbe@pengutronix.de>

Hi Alexey,

Alexey Galakhov wrote:
> While debugging S5PV210 code I ran into the following problem. Barebox
> starts, the barebox command line appears on the console but does not
> react to keypresses. I found no obvious dependence on the config
> settings.
>
> What may be the cause of this problem and how do I debug it?

Broken timer?

Regards,
Juergen

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From agalakhov at gmail.com  Sun Jul 29 13:26:07 2012
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Sun, 29 Jul 2012 23:26:07 +0600
Subject: Barebox hangs after boot
In-Reply-To: <201207291922.43872.jbe@pengutronix.de>
References: <CA+LT+-T+8VD5ONbWyX+OQxk2MX221Z-vstimqpYKh3onY+5K3Q@mail.gmail.com>
 <201207291922.43872.jbe@pengutronix.de>
Message-ID: <CA+LT+-R3J4Kq0znJXyM74gaSx-yMZ2=QZ-1OPRhVtD3M1WEM2w@mail.gmail.com>

2012/7/29 Juergen Beisert <jbe at pengutronix.de>:
> Hi Alexey,
>
> Alexey Galakhov wrote:
>> While debugging S5PV210 code I ran into the following problem. Barebox
>> starts, the barebox command line appears on the console but does not
>> react to keypresses. I found no obvious dependence on the config
>> settings.
>>
>> What may be the cause of this problem and how do I debug it?
>
> Broken timer?
>
> Regards,
> Juergen
>
> --
> Pengutronix e.K.                              | Juergen Beisert             |
> Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |

Probably not:

running /env/bin/init...

Hit any key to stop autoboot:  3... 2... 1... 0 (keypresses have no effect)

Now I'm checking wires, it may be just broken RX-TX connection. But unlikely.

Regards,
Alex


From agalakhov at gmail.com  Sun Jul 29 13:46:10 2012
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Sun, 29 Jul 2012 23:46:10 +0600
Subject: Barebox hangs after boot
In-Reply-To: <CA+LT+-R3J4Kq0znJXyM74gaSx-yMZ2=QZ-1OPRhVtD3M1WEM2w@mail.gmail.com>
References: <CA+LT+-T+8VD5ONbWyX+OQxk2MX221Z-vstimqpYKh3onY+5K3Q@mail.gmail.com>
 <201207291922.43872.jbe@pengutronix.de>
 <CA+LT+-R3J4Kq0znJXyM74gaSx-yMZ2=QZ-1OPRhVtD3M1WEM2w@mail.gmail.com>
Message-ID: <CA+LT+-RJqo6ctmvzkQ--23hHjREaOiq2xL3++Qfa1nrmBm6EPg@mail.gmail.com>

It was poor contact in a RS232 cable connector. Fixed with a soldering
iron. Sorry.

Regards,
Alex


From s.hauer at pengutronix.de  Mon Jul 30 03:40:40 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 09:40:40 +0200
Subject: [PATCH] omap: use 512k barebox partition
In-Reply-To: <201207271854.16758.jbe@pengutronix.de>
References: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
 <20120727151936.GF30009@pengutronix.de>
 <201207271854.16758.jbe@pengutronix.de>
Message-ID: <20120730074040.GG30009@pengutronix.de>

On Fri, Jul 27, 2012 at 06:54:16PM +0200, Juergen Beisert wrote:
> Hi Sascha,
> 
> Sascha Hauer wrote:
> > On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> > > Use 512k NAND Partion for barebox. Problem is we don't know the size of
> > > the barebox inside xload. Set it also to 512k
> > > Fix enviroment for boards with size in config
> >
> > The barebox binary has the size encoded into it at offset 0x2c. We could
> > use this to transfer the correct size.
> 
> Will this be a reliable "API" to the outerworld? Also in future versions of 
> Barebox?

Yes, definitely.

That said, it is not a feature you can generally rely upon, because some
SoCs may require some special image layout conflicting with this. If
your SoC can support this header, barebox will support it in the future
aswell.

The header is in arch/arm/include/asm/barebox-arm-head.h. As you can see
it also contains the ascii string 'barebox' which means that you can
test for it, and if you find it, the next word will contain the address
this binary should be copied to (only used to skip copying the binary to
the correct place, it's not mandatory to start the image there). The
word after it will contain the image size.

This means, what you can do is:

- Test if the image contains 'barebox'
- if yes, use the encoded image size
- if no, fall back to whatever suitable size (It could be a U-Boot image
  for example)

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 30 03:47:47 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 09:47:47 +0200
Subject: [PATCH 1/1] arm: add debug_ll support
In-Reply-To: <1343450217-17073-1-git-send-email-plagnioj@jcrosoft.com>
References: <1343450217-17073-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120730074747.GH30009@pengutronix.de>


The subject is wrong, it's not 'arm:', but 'ARM at91:'

Sascha

On Sat, Jul 28, 2012 at 06:36:57AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Today we only use the DBGU port
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
>  arch/arm/Kconfig                           |    1 +
>  arch/arm/mach-at91/include/mach/debug_ll.h |   37 ++++++++++++++++++++++++++++
>  2 files changed, 38 insertions(+)
>  create mode 100644 arch/arm/mach-at91/include/mach/debug_ll.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 245bec8..a7f1bfb 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -25,6 +25,7 @@ config ARCH_AT91
>  	bool "Atmel AT91"
>  	select GENERIC_GPIO
>  	select CLKDEV_LOOKUP
> +	select HAS_DEBUG_LL
>  
>  config ARCH_EP93XX
>  	bool "Cirrus Logic EP93xx"
> diff --git a/arch/arm/mach-at91/include/mach/debug_ll.h b/arch/arm/mach-at91/include/mach/debug_ll.h
> new file mode 100644
> index 0000000..ee824cb
> --- /dev/null
> +++ b/arch/arm/mach-at91/include/mach/debug_ll.h
> @@ -0,0 +1,37 @@
> +/*
> + * Copyright (C) 2012
> + * Jean-Christophe PLAGNIOL-VILLARD <planioj at jcrosoft.com>
> + *
> + * Under GPLv2
> + */
> +
> +#ifndef __MACH_DEBUG_LL_H__
> +#define __MACH_DEBUG_LL_H__
> +
> +#include <asm/io.h>
> +#include <mach/hardware.h>
> +
> +#define UART_BASE	(AT91_BASE_SYS + AT91_DBGU)
> +
> +#define ATMEL_US_CSR		0x0014
> +#define ATMEL_US_THR		0x001c
> +#define ATMEL_US_TXRDY		(1 << 1)
> +#define ATMEL_US_TXEMPTY	(1 << 9)
> +
> +/*
> + * The following code assumes the serial port has already been
> + * initialized by the bootloader.  If you didn't setup a port in
> + * your bootloader then nothing will appear (which might be desired).
> + *
> + * This does not append a newline
> + */
> +static void putc(int c)
> +{
> +	while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXRDY))
> +		barrier();
> +	__raw_writel(c, UART_BASE + ATMEL_US_THR);
> +
> +	while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
> +		barrier();
> +}
> +#endif
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 30 03:50:56 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 09:50:56 +0200
Subject: [PATCH 07/12] ARM: Separate assembler functions into their own
 section
In-Reply-To: <1343413990-31891-7-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-7-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120730075056.GI30009@pengutronix.de>

On Fri, Jul 27, 2012 at 08:33:05PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> From: Sascha Hauer <s.hauer at pengutronix.de>
> 
> To let the linker remove unused functions.

This patch contains the hunks I intentionally removed from the second
version of this patch because they are wrong. Please drop this patch.

Sascha

> 
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>  arch/arm/lib/findbit.S |    9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
> index ef4caff..422455d 100644
> --- a/arch/arm/lib/findbit.S
> +++ b/arch/arm/lib/findbit.S
> @@ -22,6 +22,7 @@
>   * Purpose  : Find a 'zero' bit
>   * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit);
>   */
> +.section .text._find_first_zero_bit_le
>  ENTRY(_find_first_zero_bit_le)
>  		teq	r1, #0
>  		beq	3f
> @@ -43,6 +44,7 @@ ENDPROC(_find_first_zero_bit_le)
>   * Purpose  : Find next 'zero' bit
>   * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
>   */
> +.section .text._find_next_zero_bit_le
>  ENTRY(_find_next_zero_bit_le)
>  		teq	r1, #0
>  		beq	3b
> @@ -63,6 +65,7 @@ ENDPROC(_find_next_zero_bit_le)
>   * Purpose  : Find a 'one' bit
>   * Prototype: int find_first_bit(const unsigned long *addr, unsigned int maxbit);
>   */
> +.section .text._find_first_bit_le
>  ENTRY(_find_first_bit_le)
>  		teq	r1, #0
>  		beq	3f
> @@ -84,6 +87,7 @@ ENDPROC(_find_first_bit_le)
>   * Purpose  : Find next 'one' bit
>   * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
>   */
> +.section .text._find_next_bit_le
>  ENTRY(_find_next_bit_le)
>  		teq	r1, #0
>  		beq	3b
> @@ -101,6 +105,7 @@ ENDPROC(_find_next_bit_le)
>  
>  #ifdef __ARMEB__
>  
> +.section .text._find_first_zero_bit_be
>  ENTRY(_find_first_zero_bit_be)
>  		teq	r1, #0
>  		beq	3f
> @@ -118,6 +123,7 @@ ENTRY(_find_first_zero_bit_be)
>  		mov	pc, lr
>  ENDPROC(_find_first_zero_bit_be)
>  
> +.section .text._find_next_zero_bit_be
>  ENTRY(_find_next_zero_bit_be)
>  		teq	r1, #0
>  		beq	3b
> @@ -135,6 +141,7 @@ ENTRY(_find_next_zero_bit_be)
>  		b	2b			@ loop for next bit
>  ENDPROC(_find_next_zero_bit_be)
>  
> +.section .text._find_first_bit_be
>  ENTRY(_find_first_bit_be)
>  		teq	r1, #0
>  		beq	3f
> @@ -152,6 +159,7 @@ ENTRY(_find_first_bit_be)
>  		mov	pc, lr
>  ENDPROC(_find_first_bit_be)
>  
> +.section .text._find_next_bit_be
>  ENTRY(_find_next_bit_be)
>  		teq	r1, #0
>  		beq	3b
> @@ -173,6 +181,7 @@ ENDPROC(_find_next_bit_be)
>  /*
>   * One or more bits in the LSB of r3 are assumed to be set.
>   */
> +.section .text.L_found
>  .L_found:
>  #if __LINUX_ARM_ARCH__ >= 5
>  		rsb	r0, r3, #0
> -- 
> 1.7.10.4
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 30 03:56:15 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 09:56:15 +0200
Subject: [PATCH 08/12] decompress_unlzo: define decompress_unlzo as
 decompress
In-Reply-To: <1343413990-31891-8-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-8-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120730075615.GJ30009@pengutronix.de>

On Fri, Jul 27, 2012 at 08:33:06PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> so we can use decompress in the decompressor
> this will simplify multi decompress support
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
>  lib/decompress_unlzo.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
> index 0e6a7ad..56abfc6 100644
> --- a/lib/decompress_unlzo.c
> +++ b/lib/decompress_unlzo.c
> @@ -289,3 +289,4 @@ exit_1:
>  exit:
>  	return ret;
>  }
> +#define decompress decompress_unlzo

Shouldn't this be before 5/12?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From christian.buettner at rafi.de  Mon Jul 30 04:00:56 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 30 Jul 2012 10:00:56 +0200
Subject: Antwort: Re: nor flash board init code
In-Reply-To: <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>
Message-ID: <OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>

Thanks for the code!

Here is my approach:

const struct flash_platform_data tx53_flash = {
    .type       = "mx25l8005",
    .name       = "spi_flash",
};


//MX25L8005MC-15G
static const struct spi_board_info mx53_spi_board_info[] = {
        {
                .name = "mx25l8005",
                .max_speed_hz = 70000000,
                .bus_num = 0,
                .chip_select = 0,
                .bits_per_word = 8,
                .mode = SPI_MODE_0,
                .platform_data = &tx53_flash,
        },
};

static struct spi_imx_master tx53_spi = {
                .num_chipselect = 1,
};


init_devices {

...
    spi_register_board_info(mx53_spi_board_info,
                    ARRAY_SIZE(mx53_spi_board_info));

    add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 * 
1024,IORESOURCE_MEM,&mx53_spi_board_info);

...
}


When the m25p80.c driver probes i get no spi instance:

static int m25p_probe(struct device_d *dev) {
        struct spi_device *spi = (struct spi_device *)dev->type_data;
        const struct spi_device_id      *id = NULL;
...
}

struct spi_device *spi is always null

Whats wrong here?

christian



Von:    Franck Jullien <franck.jullien at gmail.com>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  27.07.2012 13:33
Betreff:        Re: nor flash board init code



2012/7/25 <christian.buettner at rafi.de>
>
> hi all,
> is there any example board init code to load the mx25l8005 spi nor-flash 
through the imx53 (TX53 from KARO)?
> I want to use the m25p80 driver to read and write.
>
> christian
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>

Hi Christian,

This is what I use with the Altera SPI controller + an SPI flash device:

http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153


static struct spi_altera_master altera_spi_0_data = {
      .num_chipselect = 1,
      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
      .databits = 8,      /* Data length of the EPCS flash controller */
      .speed = 20000000,  /* EPCS flash controller speed */
};


static struct flash_platform_data epcs_flash = {
      .name = "epcs",    /* Cdev name, optional */
      .type = "m25p40",  /* Device type, required for non JEDEC chips */
};

static struct spi_board_info generic_spi_board_info[] = {
      {
            .name = "m25p",
            .max_speed_hz = 20000000,
            .bus_num = 0,
            .chip_select = 0,
            .bits_per_word = 8,
            .mode = SPI_MODE_0,
            .platform_data = &epcs_flash,
      }
};

static int myboard_devices_init(void) {

...

spi_register_board_info(myboard_spi_board_info,
ARRAY_SIZE(myboard_spi_board_info));

add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
                    IORESOURCE_MEM, &altera_spi_0_data);

...

Franck.

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From s.hauer at pengutronix.de  Mon Jul 30 04:02:27 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 10:02:27 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20120730080227.GK30009@pengutronix.de>

On Fri, Jul 27, 2012 at 08:33:08PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> This is not needed by lzo but by gunzip, xz and others.
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
>  arch/arm/cpu/start.c |    7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> index a54f5fd..f500ca8 100644
> --- a/arch/arm/cpu/start.c
> +++ b/arch/arm/cpu/start.c
> @@ -28,6 +28,9 @@
>  #include <asm-generic/memory_layout.h>
>  #include <asm/sections.h>
>  
> +unsigned long free_mem_ptr;
> +unsigned long free_mem_end_ptr;
> +
>  #ifdef CONFIG_PBL_IMAGE
>  void __naked __section(.text_head_entry) pbl_start(void)
>  {
> @@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
>  	/* clear bss */
>  	memset(__bss_start, 0, __bss_stop - __bss_start);
>  
> +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> +	free_mem_end_ptr = STACK_BASE - 16;
> +

This assumes that the malloc area is directly before the stack. How
about using __bss_stop or _end instead?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 30 04:06:50 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 10:06:50 +0200
Subject: [PATCH 08/12] decompress_unlzo: define decompress_unlzo as
 decompress
In-Reply-To: <20120730075615.GJ30009@pengutronix.de>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-8-git-send-email-plagnioj@jcrosoft.com>
 <20120730075615.GJ30009@pengutronix.de>
Message-ID: <20120730080650.GL30009@pengutronix.de>

On Mon, Jul 30, 2012 at 09:56:15AM +0200, Sascha Hauer wrote:
> On Fri, Jul 27, 2012 at 08:33:06PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > so we can use decompress in the decompressor
> > this will simplify multi decompress support
> > 
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > ---
> >  lib/decompress_unlzo.c |    1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
> > index 0e6a7ad..56abfc6 100644
> > --- a/lib/decompress_unlzo.c
> > +++ b/lib/decompress_unlzo.c
> > @@ -289,3 +289,4 @@ exit_1:
> >  exit:
> >  	return ret;
> >  }
> > +#define decompress decompress_unlzo
> 
> Shouldn't this be before 5/12?

Ok, applied this one into my for-next/compressed-prepare branch, so it
will be in master when we apply this series later.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From franck.jullien at gmail.com  Mon Jul 30 04:07:05 2012
From: franck.jullien at gmail.com (Franck Jullien)
Date: Mon, 30 Jul 2012 10:07:05 +0200
Subject: nor flash board init code
In-Reply-To: <OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>
 <OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
Message-ID: <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>

Hi,

2012/7/30 <christian.buettner at rafi.de>
>
> Thanks for the code!
>
> Here is my approach:
>
> const struct flash_platform_data tx53_flash = {
>     .type       = "mx25l8005",
>     .name       = "spi_flash",
> };
>
>
> //MX25L8005MC-15G
> static const struct spi_board_info mx53_spi_board_info[] = {
>         {
>                 .name = "mx25l8005",


Here sould be the driver name: .name = "m25p",

>
>                 .max_speed_hz = 70000000,
>                 .bus_num = 0,
>                 .chip_select = 0,
>                 .bits_per_word = 8,
>                 .mode = SPI_MODE_0,
>                 .platform_data = &tx53_flash,
>         },
> };
>
> static struct spi_imx_master tx53_spi = {
>                 .num_chipselect = 1,
> };
>
>
> init_devices {
>
> ...
>     spi_register_board_info(mx53_spi_board_info,
>                     ARRAY_SIZE(mx53_spi_board_info));
>
>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 * 1024,IORESOURCE_MEM,&mx53_spi_board_info);

You have to add the SPI master device here. The m25p device will be
probed automagically (AFAIR).


>
> ...
> }
>
>
> When the m25p80.c driver probes i get no spi instance:
>
> static int m25p_probe(struct device_d *dev) {
>         struct spi_device *spi = (struct spi_device *)dev->type_data;
>         const struct spi_device_id        *id = NULL;
> ...
> }
>
> struct spi_device *spi is always null
>
> Whats wrong here?
>
> christian
>
>
>
> Von:        Franck Jullien <franck.jullien at gmail.com>
> An:        christian.buettner at rafi.de,
> Kopie:        barebox at lists.infradead.org
> Datum:        27.07.2012 13:33
> Betreff:        Re: nor flash board init code
> ________________________________
>
>
>
> 2012/7/25 <christian.buettner at rafi.de>
> >
> > hi all,
> > is there any example board init code to load the mx25l8005 spi nor-flash through the imx53 (TX53 from KARO)?
> > I want to use the m25p80 driver to read and write.
> >
> > christian
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> >
>
> Hi Christian,
>
> This is what I use with the Altera SPI controller + an SPI flash device:
>
> http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153
>
> static struct spi_altera_master altera_spi_0_data = {
>      .num_chipselect = 1,
>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
>      .databits = 8,      /* Data length of the EPCS flash controller */
>      .speed = 20000000,  /* EPCS flash controller speed */
> };
>
>
> static struct flash_platform_data epcs_flash = {
>      .name = "epcs",    /* Cdev name, optional */
>      .type = "m25p40",  /* Device type, required for non JEDEC chips */
> };
>
> static struct spi_board_info generic_spi_board_info[] = {
>      {
>            .name = "m25p",
>            .max_speed_hz = 20000000,
>            .bus_num = 0,
>            .chip_select = 0,
>            .bits_per_word = 8,
>            .mode = SPI_MODE_0,
>            .platform_data = &epcs_flash,
>      }
> };
>
> static int myboard_devices_init(void) {
>
> ...
>
> spi_register_board_info(myboard_spi_board_info,
> ARRAY_SIZE(myboard_spi_board_info));
>
> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
>                    IORESOURCE_MEM, &altera_spi_0_data);
>
> ...
>
> Franck.
>

Franck.


From jbe at pengutronix.de  Mon Jul 30 04:11:32 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Mon, 30 Jul 2012 10:11:32 +0200
Subject: [PATCH] omap: use 512k barebox partition
In-Reply-To: <20120730074040.GG30009@pengutronix.de>
References: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
 <201207271854.16758.jbe@pengutronix.de>
 <20120730074040.GG30009@pengutronix.de>
Message-ID: <201207301011.32695.jbe@pengutronix.de>

Hi Sascha,

Sascha Hauer wrote:
> On Fri, Jul 27, 2012 at 06:54:16PM +0200, Juergen Beisert wrote:
> > Sascha Hauer wrote:
> > > On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> > > > Use 512k NAND Partion for barebox. Problem is we don't know the size
> > > > of the barebox inside xload. Set it also to 512k
> > > > Fix enviroment for boards with size in config
> > >
> > > The barebox binary has the size encoded into it at offset 0x2c. We
> > > could use this to transfer the correct size.
> >
> > Will this be a reliable "API" to the outerworld? Also in future versions
> > of Barebox?
>
> Yes, definitely.
>
> That said, it is not a feature you can generally rely upon, because some
> SoCs may require some special image layout conflicting with this.

This would require a "movable marker" inside the binary image.

> If your SoC can support this header, barebox will support it in the future
> aswell.

Okay.

> The header is in arch/arm/include/asm/barebox-arm-head.h. As you can see
> it also contains the ascii string 'barebox' which means that you can
> test for it, and if you find it, the next word will contain the address
> this binary should be copied to (only used to skip copying the binary to
> the correct place, it's not mandatory to start the image there). The
> word after it will contain the image size.
>
> This means, what you can do is:
>
> - Test if the image contains 'barebox'

This might be very dangerous, as this kind of string can be part of the binary 
more than one times, if it is used as part of an output string for example 
("Hi, barebox here").

> - if yes, use the encoded image size
> - if no, fall back to whatever suitable size (It could be a U-Boot image
>   for example)

What we need for this "movable marker" is:
 - a string like "barebox" as its start indication
 - in-between some payload data we want to know
   - size of the "payload"
   - version marker
   - real data
 - something that indicates the end of the whole marker to verify, this entry
   is not a phantom (for example the string "xoberab" ;) )

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Mon Jul 30 04:13:17 2012
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 30 Jul 2012 10:13:17 +0200
Subject: [PATCH 3/7] i2c: add platform_data for i2c_board_info
In-Reply-To: <1343547714-32740-4-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-4-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120730081317.GM1528@pengutronix.de>

On Sun, Jul 29, 2012 at 05:41:50PM +1000, Marc Reilly wrote:
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
We have nearly exactly this patch in one of our customer patch stacks to
get at24 up and running. (I only set client->dev.platform_data two lines
later than you :-)

So:
Acked-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From christian.buettner at rafi.de  Mon Jul 30 04:15:45 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 30 Jul 2012 10:15:45 +0200
Subject: Antwort: Re: Re: nor flash board init code
In-Reply-To: <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>	<OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
 <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>
Message-ID: <OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>

Whooosch and it worked!

devinfo 
devices:
...
`---- mem1
     `---- 0x00000000-0xfffffffe: /dev/mem
`---- i2c-imx2
`---- imx_spi0
     `---- m25p0
`---- fec_imx0
     `---- miidev0
...

barebox:/ devinfo m25p0
resources:
driver: none

no parameters available
barebox:/ 

But why is driver in devinfo = none?

christian


Von:    Franck Jullien <franck.jullien at gmail.com>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  30.07.2012 10:07
Betreff:        Re: Re: nor flash board init code



Hi,

2012/7/30 <christian.buettner at rafi.de>
>
> Thanks for the code!
>
> Here is my approach:
>
> const struct flash_platform_data tx53_flash = {
>     .type       = "mx25l8005",
>     .name       = "spi_flash",
> };
>
>
> //MX25L8005MC-15G
> static const struct spi_board_info mx53_spi_board_info[] = {
>         {
>                 .name = "mx25l8005",


Here sould be the driver name: .name = "m25p",

>
>                 .max_speed_hz = 70000000,
>                 .bus_num = 0,
>                 .chip_select = 0,
>                 .bits_per_word = 8,
>                 .mode = SPI_MODE_0,
>                 .platform_data = &tx53_flash,
>         },
> };
>
> static struct spi_imx_master tx53_spi = {
>                 .num_chipselect = 1,
> };
>
>
> init_devices {
>
> ...
>     spi_register_board_info(mx53_spi_board_info,
>                     ARRAY_SIZE(mx53_spi_board_info));
>
>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 * 
1024,IORESOURCE_MEM,&mx53_spi_board_info);

You have to add the SPI master device here. The m25p device will be
probed automagically (AFAIR).


>
> ...
> }
>
>
> When the m25p80.c driver probes i get no spi instance:
>
> static int m25p_probe(struct device_d *dev) {
>         struct spi_device *spi = (struct spi_device *)dev->type_data;
>         const struct spi_device_id        *id = NULL;
> ...
> }
>
> struct spi_device *spi is always null
>
> Whats wrong here?
>
> christian
>
>
>
> Von:        Franck Jullien <franck.jullien at gmail.com>
> An:        christian.buettner at rafi.de,
> Kopie:        barebox at lists.infradead.org
> Datum:        27.07.2012 13:33
> Betreff:        Re: nor flash board init code
> ________________________________
>
>
>
> 2012/7/25 <christian.buettner at rafi.de>
> >
> > hi all,
> > is there any example board init code to load the mx25l8005 spi 
nor-flash through the imx53 (TX53 from KARO)?
> > I want to use the m25p80 driver to read and write.
> >
> > christian
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> >
>
> Hi Christian,
>
> This is what I use with the Altera SPI controller + an SPI flash device:
>
> 
http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153

>
> static struct spi_altera_master altera_spi_0_data = {
>      .num_chipselect = 1,
>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
>      .databits = 8,      /* Data length of the EPCS flash controller */
>      .speed = 20000000,  /* EPCS flash controller speed */
> };
>
>
> static struct flash_platform_data epcs_flash = {
>      .name = "epcs",    /* Cdev name, optional */
>      .type = "m25p40",  /* Device type, required for non JEDEC chips */
> };
>
> static struct spi_board_info generic_spi_board_info[] = {
>      {
>            .name = "m25p",
>            .max_speed_hz = 20000000,
>            .bus_num = 0,
>            .chip_select = 0,
>            .bits_per_word = 8,
>            .mode = SPI_MODE_0,
>            .platform_data = &epcs_flash,
>      }
> };
>
> static int myboard_devices_init(void) {
>
> ...
>
> spi_register_board_info(myboard_spi_board_info,
> ARRAY_SIZE(myboard_spi_board_info));
>
> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
>                    IORESOURCE_MEM, &altera_spi_0_data);
>
> ...
>
> Franck.
>

Franck.

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From u.kleine-koenig at pengutronix.de  Mon Jul 30 04:25:05 2012
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 30 Jul 2012 10:25:05 +0200
Subject: [PATCH 7/7] drivers/eeprom: at24: add I2C eeprom driver for
 24c01/02
In-Reply-To: <1343547714-32740-8-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-8-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120730082505.GN1528@pengutronix.de>

Hello Marc,

On Sun, Jul 29, 2012 at 05:41:54PM +1000, Marc Reilly wrote:
> This series adds a driver for at24 eeproms. Much of the guts of the code
> was taken from the at24 driver in the linux kernel.
> 
> The device is polled for write completion. All the datasheets I looked
> at had a max of 10ms for eeprom write time.
> The driver automatically wraps the writes to page boundaries, so we don't
> write more than is remaining in the page.
> 
> The driver can not yet handle addressing offsets > 256 in devices with
> larger capacities.
> 
> The platform data fields are all optional, if they are zero they are
> assigned default values. As the device capabilities can not be probed,
> the default assumption is that the device is 256 bytes.
> 
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> ---
>  drivers/eeprom/Kconfig  |    7 ++
>  drivers/eeprom/Makefile |    1 +
>  drivers/eeprom/at24.c   |  233 +++++++++++++++++++++++++++++++++++++++++++++++
>  include/i2c/at24.h      |   13 +++
>  4 files changed, 254 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/eeprom/at24.c
>  create mode 100644 include/i2c/at24.h
> 
> diff --git a/drivers/eeprom/Kconfig b/drivers/eeprom/Kconfig
> index a0b5489..a2bcaaa 100644
> --- a/drivers/eeprom/Kconfig
> +++ b/drivers/eeprom/Kconfig
> @@ -8,4 +8,11 @@ config EEPROM_AT25
>  	  after you configure the board init code to know about each eeprom
>  	  on your target board.
>  
> +config EEPROM_AT24
> +	bool "at24 based eeprom"
> +	depends on I2C
> +	help
> +	  Provides read/write for the at24 family of I2C EEPROMS.
> +	  Currently only the 2K bit versions are supported.
> +
>  endmenu
> diff --git a/drivers/eeprom/Makefile b/drivers/eeprom/Makefile
> index e323bd0..e287eb0 100644
> --- a/drivers/eeprom/Makefile
> +++ b/drivers/eeprom/Makefile
> @@ -1 +1,2 @@
>  obj-$(CONFIG_EEPROM_AT25)	+= at25.o
> +obj-$(CONFIG_EEPROM_AT24)	+= at24.o
nitpick: sort at24 before at25?

> diff --git a/drivers/eeprom/at24.c b/drivers/eeprom/at24.c
> new file mode 100644
> index 0000000..fa16d88
> --- /dev/null
> +++ b/drivers/eeprom/at24.c
> @@ -0,0 +1,233 @@
> +/*
> + * Copyright (C) 2007 Sascha Hauer, Pengutronix
> + *               2009 Marc Kleine-Budde <mkl at pengutronix.de>
> + *               2010 Marc Reilly, Creative Product Design
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +#include <clock.h>
> +#include <driver.h>
> +#include <xfuncs.h>
> +#include <errno.h>
> +
> +#include <i2c/i2c.h>
> +#include <i2c/at24.h>
> +
> +#define DRIVERNAME		"at24"
> +#define DEVICENAME		"eeprom"
why not DEVICENAME == DRIVERNAME?

> +
> +struct at24 {
> +	struct cdev		cdev;
> +	struct i2c_client	*client;
> +	/* size in bytes */
> +	unsigned int		size;
> +	unsigned int		page_size;
> +};
> +
> +#define to_at24(a)		container_of(a, struct at24, cdev)
> +
> +static ssize_t at24_read(struct cdev *cdev, void *_buf, size_t count,
> +		ulong offset, ulong flags)
> +{
> +	struct at24 *priv = to_at24(cdev);
> +	u8 *buf = _buf;
> +	size_t i = count;
> +	ssize_t numwritten = 0;
s/written/read/

> +	int retries = 5;
> +	int ret;
> +
> +	while (i && retries) {
> +		ret = i2c_read_reg(priv->client, offset, buf, i);
> +		if (ret < 0)
> +			return (ssize_t)ret;
This cast is also done implicitly.

> +		else if (ret == 0)
> +			--retries;
> +
> +		numwritten += ret;
> +		i -= ret;
> +		offset += ret;
> +		buf += ret;
> +	}
IMHO this loop should be in a more generic place once instead of
repeating it for each driver. Also I wonder if you saw the eeprom
yielding some but not all requested bytes on a read request.

> +
> +	return numwritten;
> +}
> +
> +static int at24_poll_device(struct i2c_client *client)
> +{
> +	uint64_t start;
> +	u8 dummy;
> +	int ret;
> +
> +	/*
> +	 * eeprom can take 5-10ms to write, during which time it
> +	 * will not respond. Poll it by attempting reads.
> +	 */
> +	start = get_time_ns();
> +	while (1) {
> +		ret = i2c_master_recv(client, &dummy, 1);
I implemented a write of length 0 here. IMHO this is better.

> +		if (ret > 0)
> +			return ret;
> +
> +		if (is_timeout(start, 20 * MSECOND))
> +			return -EIO;
> +	}
> +
> +	return 0;
> +}
> +
> +static ssize_t at24_write(struct cdev *cdev, const void *_buf, size_t count,
> +		ulong offset, ulong flags)
> +{
> +	struct at24 *priv = to_at24(cdev);
> +	const u8 *buf = _buf;
> +	const int pagesize = priv->page_size;
> +	ssize_t numwritten = 0;
> +
> +	while (count) {
> +		int ret, numtowrite;
> +		int page_remain = pagesize - (offset % pagesize);
> +
> +		numtowrite = count;
> +		if (numtowrite > pagesize)
> +			numtowrite = pagesize;
I think you can skip this if in the presence of the the if below.

> +		/* don't write past page */
> +		if (numtowrite > page_remain)
> +			numtowrite = page_remain;
> +
> +		ret = i2c_write_reg(priv->client, offset, buf, numtowrite);
> +		if (ret < 0)
> +			return (ssize_t)ret;
> +
> +		numwritten += ret;
> +		buf += ret;
> +		count -= ret;
> +		offset += ret;
> +
> +		ret = at24_poll_device(priv->client);
> +		if (ret < 0)
> +			return (ssize_t)ret;
Don't you need to poll before writing instead of after a write?

> +	}
> +
> +	return numwritten;
> +}
> +
> +/* max page size of any of the at24 family devices is 16 bytes */
> +#define AT24_MAX_PAGE_SIZE	16
That is wrong. My eeprom has a page size of 64 bytes.

> +
> +static ssize_t at24_erase(struct cdev *cdev, size_t count, unsigned long offset)
> +{
> +	struct at24 *priv = to_at24(cdev);
> +	char erase[AT24_MAX_PAGE_SIZE];
> +	const int pagesize = priv->page_size;
> +	ssize_t numwritten = 0;
> +
> +	memset(erase, 0xff, sizeof(erase));
> +
> +	while (count) {
> +		int ret, numtowrite;
> +		int page_remain = pagesize - (offset % pagesize);
> +
> +		numtowrite = count;
> +		if (numtowrite > pagesize)
> +			numtowrite = pagesize;
> +		/* don't write past page */
> +		if (numtowrite > page_remain)
> +			numtowrite = page_remain;
> +
> +		ret = i2c_write_reg(priv->client, offset, erase, numtowrite);
> +		if (ret < 0)
> +			return (ssize_t)ret;
> +
> +		numwritten += ret;
> +		count -= ret;
> +		offset += ret;
> +
> +		ret = at24_poll_device(priv->client);
> +		if (ret < 0)
> +			return (ssize_t)ret;
> +	}
> +
> +	return 0;
> +}
I think conceptually you don't need the erase callback for this eeprom.

> +
> +static struct file_operations at24_fops = {
> +	.lseek	= dev_lseek_default,
> +	.read	= at24_read,
> +	.write	= at24_write,
> +	.erase	= at24_erase,
> +};
> +
> +static int at24_probe(struct device_d *dev)
> +{
> +	const struct at24_platform_data *pdata;
> +	struct at24 *at24;
> +	at24 = xzalloc(sizeof(*at24));
> +
> +	dev->priv = at24;
> +	at24->client = to_i2c_client(dev);
> +	at24->cdev.dev = dev;
> +	at24->cdev.ops = &at24_fops;
> +
> +	pdata = dev->platform_data;
> +	if (pdata) {
> +		at24->cdev.size = pdata->size_bytes;
> +		at24->cdev.name = strdup(pdata->name);
> +		at24->page_size = pdata->page_size;
> +	}
> +
> +	if (at24->cdev.size == 0)
> +		at24->cdev.size = 256;
> +	if (!at24->cdev.name || at24->cdev.name[0] == '\0') {
> +		char buf[20];
> +		sprintf(buf, DEVICENAME"%d", dev->id);
> +		at24->cdev.name = strdup(buf);
> +	}
> +	if (at24->page_size == 0) {
> +		switch (at24->cdev.size) {
> +		case 512:
> +		case 1024:
> +		case 2048:
> +			at24->page_size = 16;
> +			break;
> +		case 128:
> +		case 256:
> +		default:
> +			at24->page_size = 8;
> +			break;
> +		}
> +	}
> +
> +	devfs_create(&at24->cdev);
> +
> +	return 0;
> +}
> +
> +static struct driver_d at24_driver = {
> +	.name  = DRIVERNAME,
> +	.probe = at24_probe,
> +};
> +
> +static int at24_init(void)
> +{
> +	register_driver(&at24_driver);
> +	return 0;
return register_driver(&at24_driver) ?

> +}
> +
> +device_initcall(at24_init);
> diff --git a/include/i2c/at24.h b/include/i2c/at24.h
> new file mode 100644
> index 0000000..00e4624
> --- /dev/null
> +++ b/include/i2c/at24.h
> @@ -0,0 +1,13 @@
> +#ifndef _EEPROM_AT24_H
> +#define _EEPROM_AT24_H
> +
> +struct at24_platform_data {
> +	/* preferred device name */
> +	const char name[10];
> +	/* page write size in bytes */
> +	u8 page_size;
> +	/* device size in bytes */
> +	u16 size_bytes;
> +};
> +
> +#endif /* _EEPROM_AT24_H */
> -- 
> 1.7.7
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From plagnioj at jcrosoft.com  Mon Jul 30 04:27:20 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 10:27:20 +0200
Subject: [PATCH 07/12] ARM: Separate assembler functions into their own
 section
In-Reply-To: <20120730075056.GI30009@pengutronix.de>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-7-git-send-email-plagnioj@jcrosoft.com>
 <20120730075056.GI30009@pengutronix.de>
Message-ID: <20120730082720.GF26655@game.jcrosoft.org>

On 09:50 Mon 30 Jul     , Sascha Hauer wrote:
> On Fri, Jul 27, 2012 at 08:33:05PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > From: Sascha Hauer <s.hauer at pengutronix.de>
> > 
> > To let the linker remove unused functions.
> 
> This patch contains the hunks I intentionally removed from the second
> version of this patch because they are wrong. Please drop this patch.
ok I drop it
I put decompress_unlzo: define decompress_unlzo as decompress
first

and update the tag

The following changes since commit d8ddfd069f99428244aff34e2ccebe9ed6a6a7a3:

  decompress_unlzo: define decompress_unlzo as decompress (2012-07-30 16:23:54 +0800)

are available in the git repository at:

  git://git.jcrosoft.org/barebox.git tags/pbl

for you to fetch changes up to 096ff89b5bcc3466f12b7b40b9b0938bb850ca9c:

  arm: always enable the garbage collector for pbl (2012-07-30 16:24:26 +0800)

----------------------------------------------------------------
Add pre-bootloader (pbl) image support

This allows for creating a pre-bootloader binary for
 - nand boot
 - mmc boot
 - compressed image

Currently on the compressed image is implemented the boot really on current lowlevel
init support. In a second step this could be move to the pbl c code with generic framework.

The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.

The decompressor support lzo and gzip and allow to add easly more.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (10):
      kbuild: Init all relevant variables used in kbuild files so
      kbuild: add pre-bootloader (pbl) target
      Add pre-bootloader (pbl) image support
      pbl: discard unwind symbol if enable in barebox
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed image: add gzip support
      at91: add lowlevel init to the pbl
      kbuild: allow to have custom cppflags for pbl
      arm: always enable the garbage collector for pbl

Sascha Hauer (2):
      Add compressed image support
      only compress default env in uncompressed images

 Makefile                            |   11 +++++++++--
 arch/arm/Kconfig                    |    2 ++
 arch/arm/Makefile                   |    8 ++++++++
 arch/arm/cpu/Makefile               |    1 +
 arch/arm/cpu/start.c                |  113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----
 arch/arm/lib/Makefile               |    4 ++++
 arch/arm/lib/barebox.lds.S          |    3 ++-
 arch/arm/mach-at91/Makefile         |    2 ++
 arch/arm/pbl/Makefile               |   40 +++++++++++++++++++++++++++++++++++++++
 arch/arm/pbl/piggy.gzip.S           |    6 ++++++
 arch/arm/pbl/piggy.lzo.S            |    6 ++++++
 arch/arm/pbl/zbarebox.lds.S         |   74 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 common/Kconfig                      |   34 +++++++++++++++++++++++++++++++++
 include/asm-generic/memory_layout.h |    1 +
 include/linux/decompress/mm.h       |   68 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c            |    1 +
 pbl/Makefile                        |    5 +++++
 pbl/misc.c                          |   14 ++++++++++++++
 pbl/string.c                        |  127 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 scripts/Makefile.build              |   75 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----
 scripts/Makefile.lib                |   14 ++++++++++++++
 21 files changed, 597 insertions(+), 12 deletions(-)
 create mode 100644 arch/arm/pbl/Makefile
 create mode 100644 arch/arm/pbl/piggy.gzip.S
 create mode 100644 arch/arm/pbl/piggy.lzo.S
 create mode 100644 arch/arm/pbl/zbarebox.lds.S
 create mode 100644 include/linux/decompress/mm.h
 create mode 100644 pbl/Makefile
 create mode 100644 pbl/misc.c
 create mode 100644 pbl/string.c

Best Regards,
J.


From plagnioj at jcrosoft.com  Mon Jul 30 04:19:42 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 10:19:42 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <20120730080227.GK30009@pengutronix.de>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
 <20120730080227.GK30009@pengutronix.de>
Message-ID: <20120730081942.GE26655@game.jcrosoft.org>

On 10:02 Mon 30 Jul     , Sascha Hauer wrote:
> On Fri, Jul 27, 2012 at 08:33:08PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > This is not needed by lzo but by gunzip, xz and others.
> > 
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > ---
> >  arch/arm/cpu/start.c |    7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> > index a54f5fd..f500ca8 100644
> > --- a/arch/arm/cpu/start.c
> > +++ b/arch/arm/cpu/start.c
> > @@ -28,6 +28,9 @@
> >  #include <asm-generic/memory_layout.h>
> >  #include <asm/sections.h>
> >  
> > +unsigned long free_mem_ptr;
> > +unsigned long free_mem_end_ptr;
> > +
> >  #ifdef CONFIG_PBL_IMAGE
> >  void __naked __section(.text_head_entry) pbl_start(void)
> >  {
> > @@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
> >  	/* clear bss */
> >  	memset(__bss_start, 0, __bss_stop - __bss_start);
> >  
> > +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> > +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> > +	free_mem_end_ptr = STACK_BASE - 16;
> > +
> 
> This assumes that the malloc area is directly before the stack. How
> about using __bss_stop or _end instead?

it's just for early alloc and __bss_stop no so maybe we can use the same as
Malloc but we already use this for HEAD_TEXT_BASE

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 30 04:30:48 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 10:30:48 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <20120730081942.GE26655@game.jcrosoft.org>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
 <20120730080227.GK30009@pengutronix.de>
 <20120730081942.GE26655@game.jcrosoft.org>
Message-ID: <20120730083048.GM30009@pengutronix.de>

On Mon, Jul 30, 2012 at 10:19:42AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 10:02 Mon 30 Jul     , Sascha Hauer wrote:
> > On Fri, Jul 27, 2012 at 08:33:08PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > This is not needed by lzo but by gunzip, xz and others.
> > > 
> > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > > ---
> > >  arch/arm/cpu/start.c |    7 +++++++
> > >  1 file changed, 7 insertions(+)
> > > 
> > > diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> > > index a54f5fd..f500ca8 100644
> > > --- a/arch/arm/cpu/start.c
> > > +++ b/arch/arm/cpu/start.c
> > > @@ -28,6 +28,9 @@
> > >  #include <asm-generic/memory_layout.h>
> > >  #include <asm/sections.h>
> > >  
> > > +unsigned long free_mem_ptr;
> > > +unsigned long free_mem_end_ptr;
> > > +
> > >  #ifdef CONFIG_PBL_IMAGE
> > >  void __naked __section(.text_head_entry) pbl_start(void)
> > >  {
> > > @@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
> > >  	/* clear bss */
> > >  	memset(__bss_start, 0, __bss_stop - __bss_start);
> > >  
> > > +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> > > +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> > > +	free_mem_end_ptr = STACK_BASE - 16;
> > > +
> > 
> > This assumes that the malloc area is directly before the stack. How
> > about using __bss_stop or _end instead?
> 
> it's just for early alloc and __bss_stop no so maybe we can use the same as
> Malloc but we already use this for HEAD_TEXT_BASE

_end is HEAD_TEXT_BASE + the space needed for the compressed
image, so what's wrong with it?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From franck.jullien at gmail.com  Mon Jul 30 04:33:53 2012
From: franck.jullien at gmail.com (Franck Jullien)
Date: Mon, 30 Jul 2012 10:33:53 +0200
Subject: nor flash board init code
In-Reply-To: <OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>
 <OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
 <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>
 <OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>
Message-ID: <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>

2012/7/30  <christian.buettner at rafi.de>:
> Whooosch and it worked!
>
> devinfo
> devices:
> ...
> `---- mem1
>      `---- 0x00000000-0xfffffffe: /dev/mem
> `---- i2c-imx2
> `---- imx_spi0
>      `---- m25p0
> `---- fec_imx0
>      `---- miidev0
> ...
>
> barebox:/ devinfo m25p0
> resources:
> driver: none
>
> no parameters available
> barebox:/
>
> But why is driver in devinfo = none?
>

It used to work. You need to find why it doesn't work anymore ;)

> christian
>
>
> Von:        Franck Jullien <franck.jullien at gmail.com>
> An:        christian.buettner at rafi.de,
> Kopie:        barebox at lists.infradead.org
> Datum:        30.07.2012 10:07
> Betreff:        Re: Re: nor flash board init code
> ________________________________
>
>
>
> Hi,
>
> 2012/7/30 <christian.buettner at rafi.de>
>>
>> Thanks for the code!
>>
>> Here is my approach:
>>
>> const struct flash_platform_data tx53_flash = {
>>     .type       = "mx25l8005",
>>     .name       = "spi_flash",
>> };
>>
>>
>> //MX25L8005MC-15G
>> static const struct spi_board_info mx53_spi_board_info[] = {
>>         {
>>                 .name = "mx25l8005",
>
>
> Here sould be the driver name: .name = "m25p",
>
>>
>>                 .max_speed_hz = 70000000,
>>                 .bus_num = 0,
>>                 .chip_select = 0,
>>                 .bits_per_word = 8,
>>                 .mode = SPI_MODE_0,
>>                 .platform_data = &tx53_flash,
>>         },
>> };
>>
>> static struct spi_imx_master tx53_spi = {
>>                 .num_chipselect = 1,
>> };
>>
>>
>> init_devices {
>>
>> ...
>>     spi_register_board_info(mx53_spi_board_info,
>>                     ARRAY_SIZE(mx53_spi_board_info));
>>
>>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 *
>> 1024,IORESOURCE_MEM,&mx53_spi_board_info);
>
> You have to add the SPI master device here. The m25p device will be
> probed automagically (AFAIR).
>
>
>>
>> ...
>> }
>>
>>
>> When the m25p80.c driver probes i get no spi instance:
>>
>> static int m25p_probe(struct device_d *dev) {
>>         struct spi_device *spi = (struct spi_device *)dev->type_data;
>>         const struct spi_device_id        *id = NULL;
>> ...
>> }
>>
>> struct spi_device *spi is always null
>>
>> Whats wrong here?
>>
>> christian
>>
>>
>>
>> Von:        Franck Jullien <franck.jullien at gmail.com>
>> An:        christian.buettner at rafi.de,
>> Kopie:        barebox at lists.infradead.org
>> Datum:        27.07.2012 13:33
>> Betreff:        Re: nor flash board init code
>> ________________________________
>>
>>
>>
>> 2012/7/25 <christian.buettner at rafi.de>
>> >
>> > hi all,
>> > is there any example board init code to load the mx25l8005 spi nor-flash
>> > through the imx53 (TX53 from KARO)?
>> > I want to use the m25p80 driver to read and write.
>> >
>> > christian
>> > _______________________________________________
>> > barebox mailing list
>> > barebox at lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/barebox
>> >
>>
>> Hi Christian,
>>
>> This is what I use with the Altera SPI controller + an SPI flash device:
>>
>>
>> http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153
>>
>> static struct spi_altera_master altera_spi_0_data = {
>>      .num_chipselect = 1,
>>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
>>      .databits = 8,      /* Data length of the EPCS flash controller */
>>      .speed = 20000000,  /* EPCS flash controller speed */
>> };
>>
>>
>> static struct flash_platform_data epcs_flash = {
>>      .name = "epcs",    /* Cdev name, optional */
>>      .type = "m25p40",  /* Device type, required for non JEDEC chips */
>> };
>>
>> static struct spi_board_info generic_spi_board_info[] = {
>>      {
>>            .name = "m25p",
>>            .max_speed_hz = 20000000,
>>            .bus_num = 0,
>>            .chip_select = 0,
>>            .bits_per_word = 8,
>>            .mode = SPI_MODE_0,
>>            .platform_data = &epcs_flash,
>>      }
>> };
>>
>> static int myboard_devices_init(void) {
>>
>> ...
>>
>> spi_register_board_info(myboard_spi_board_info,
>> ARRAY_SIZE(myboard_spi_board_info));
>>
>> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
>>                    IORESOURCE_MEM, &altera_spi_0_data);
>>
>> ...
>>
>> Franck.
>>
>
> Franck.
>


From christian.buettner at rafi.de  Mon Jul 30 04:44:40 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 30 Jul 2012 10:44:40 +0200
Subject: Antwort: Re: Re: Re: nor flash board init code
In-Reply-To: <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>	<OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
 <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>	<OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>
 <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>
Message-ID: <OF991E402B.64DF73CD-ONC1257A4B.002FFA57-C1257A4B.003008B3@o0802.rafi.inhouse>

Ok i see.. :)
thanks a lot.



Von:    Franck Jullien <franck.jullien at gmail.com>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  30.07.2012 10:33
Betreff:        Re: Re: Re: nor flash board init code



2012/7/30  <christian.buettner at rafi.de>:
> Whooosch and it worked!
>
> devinfo
> devices:
> ...
> `---- mem1
>      `---- 0x00000000-0xfffffffe: /dev/mem
> `---- i2c-imx2
> `---- imx_spi0
>      `---- m25p0
> `---- fec_imx0
>      `---- miidev0
> ...
>
> barebox:/ devinfo m25p0
> resources:
> driver: none
>
> no parameters available
> barebox:/
>
> But why is driver in devinfo = none?
>

It used to work. You need to find why it doesn't work anymore ;)

> christian
>
>
> Von:        Franck Jullien <franck.jullien at gmail.com>
> An:        christian.buettner at rafi.de,
> Kopie:        barebox at lists.infradead.org
> Datum:        30.07.2012 10:07
> Betreff:        Re: Re: nor flash board init code
> ________________________________
>
>
>
> Hi,
>
> 2012/7/30 <christian.buettner at rafi.de>
>>
>> Thanks for the code!
>>
>> Here is my approach:
>>
>> const struct flash_platform_data tx53_flash = {
>>     .type       = "mx25l8005",
>>     .name       = "spi_flash",
>> };
>>
>>
>> //MX25L8005MC-15G
>> static const struct spi_board_info mx53_spi_board_info[] = {
>>         {
>>                 .name = "mx25l8005",
>
>
> Here sould be the driver name: .name = "m25p",
>
>>
>>                 .max_speed_hz = 70000000,
>>                 .bus_num = 0,
>>                 .chip_select = 0,
>>                 .bits_per_word = 8,
>>                 .mode = SPI_MODE_0,
>>                 .platform_data = &tx53_flash,
>>         },
>> };
>>
>> static struct spi_imx_master tx53_spi = {
>>                 .num_chipselect = 1,
>> };
>>
>>
>> init_devices {
>>
>> ...
>>     spi_register_board_info(mx53_spi_board_info,
>>                     ARRAY_SIZE(mx53_spi_board_info));
>>
>>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 *
>> 1024,IORESOURCE_MEM,&mx53_spi_board_info);
>
> You have to add the SPI master device here. The m25p device will be
> probed automagically (AFAIR).
>
>
>>
>> ...
>> }
>>
>>
>> When the m25p80.c driver probes i get no spi instance:
>>
>> static int m25p_probe(struct device_d *dev) {
>>         struct spi_device *spi = (struct spi_device *)dev->type_data;
>>         const struct spi_device_id        *id = NULL;
>> ...
>> }
>>
>> struct spi_device *spi is always null
>>
>> Whats wrong here?
>>
>> christian
>>
>>
>>
>> Von:        Franck Jullien <franck.jullien at gmail.com>
>> An:        christian.buettner at rafi.de,
>> Kopie:        barebox at lists.infradead.org
>> Datum:        27.07.2012 13:33
>> Betreff:        Re: nor flash board init code
>> ________________________________
>>
>>
>>
>> 2012/7/25 <christian.buettner at rafi.de>
>> >
>> > hi all,
>> > is there any example board init code to load the mx25l8005 spi 
nor-flash
>> > through the imx53 (TX53 from KARO)?
>> > I want to use the m25p80 driver to read and write.
>> >
>> > christian
>> > _______________________________________________
>> > barebox mailing list
>> > barebox at lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/barebox
>> >
>>
>> Hi Christian,
>>
>> This is what I use with the Altera SPI controller + an SPI flash 
device:
>>
>>
>> 
http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153

>>
>> static struct spi_altera_master altera_spi_0_data = {
>>      .num_chipselect = 1,
>>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
>>      .databits = 8,      /* Data length of the EPCS flash controller */
>>      .speed = 20000000,  /* EPCS flash controller speed */
>> };
>>
>>
>> static struct flash_platform_data epcs_flash = {
>>      .name = "epcs",    /* Cdev name, optional */
>>      .type = "m25p40",  /* Device type, required for non JEDEC chips */
>> };
>>
>> static struct spi_board_info generic_spi_board_info[] = {
>>      {
>>            .name = "m25p",
>>            .max_speed_hz = 20000000,
>>            .bus_num = 0,
>>            .chip_select = 0,
>>            .bits_per_word = 8,
>>            .mode = SPI_MODE_0,
>>            .platform_data = &epcs_flash,
>>      }
>> };
>>
>> static int myboard_devices_init(void) {
>>
>> ...
>>
>> spi_register_board_info(myboard_spi_board_info,
>> ARRAY_SIZE(myboard_spi_board_info));
>>
>> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
>>                    IORESOURCE_MEM, &altera_spi_0_data);
>>
>> ...
>>
>> Franck.
>>
>
> Franck.
>

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From plagnioj at jcrosoft.com  Mon Jul 30 04:49:43 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 10:49:43 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <20120730083048.GM30009@pengutronix.de>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
 <20120730080227.GK30009@pengutronix.de>
 <20120730081942.GE26655@game.jcrosoft.org>
 <20120730083048.GM30009@pengutronix.de>
Message-ID: <20120730084943.GA19759@game.jcrosoft.org>

On 10:30 Mon 30 Jul     , Sascha Hauer wrote:
> On Mon, Jul 30, 2012 at 10:19:42AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 10:02 Mon 30 Jul     , Sascha Hauer wrote:
> > > On Fri, Jul 27, 2012 at 08:33:08PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > This is not needed by lzo but by gunzip, xz and others.
> > > > 
> > > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > > > ---
> > > >  arch/arm/cpu/start.c |    7 +++++++
> > > >  1 file changed, 7 insertions(+)
> > > > 
> > > > diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> > > > index a54f5fd..f500ca8 100644
> > > > --- a/arch/arm/cpu/start.c
> > > > +++ b/arch/arm/cpu/start.c
> > > > @@ -28,6 +28,9 @@
> > > >  #include <asm-generic/memory_layout.h>
> > > >  #include <asm/sections.h>
> > > >  
> > > > +unsigned long free_mem_ptr;
> > > > +unsigned long free_mem_end_ptr;
> > > > +
> > > >  #ifdef CONFIG_PBL_IMAGE
> > > >  void __naked __section(.text_head_entry) pbl_start(void)
> > > >  {
> > > > @@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
> > > >  	/* clear bss */
> > > >  	memset(__bss_start, 0, __bss_stop - __bss_start);
> > > >  
> > > > +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> > > > +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> > > > +	free_mem_end_ptr = STACK_BASE - 16;
> > > > +
> > > 
> > > This assumes that the malloc area is directly before the stack. How
> > > about using __bss_stop or _end instead?
> > 
> > it's just for early alloc and __bss_stop no so maybe we can use the same as
> > Malloc but we already use this for HEAD_TEXT_BASE
> 
> _end is HEAD_TEXT_BASE + the space needed for the compressed
> image, so what's wrong with it?
the pbl image can be stored in a sram and link to fit there so _end could be
at the end of the sram

so we can not use it.

We need to put the early malloc in the sdram

as example on at91 I plan to load the pbl only without the compressed data

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 30 04:52:24 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 10:52:24 +0200
Subject: [PATCH] omap: use 512k barebox partition
In-Reply-To: <201207301011.32695.jbe@pengutronix.de>
References: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
 <201207271854.16758.jbe@pengutronix.de>
 <20120730074040.GG30009@pengutronix.de>
 <201207301011.32695.jbe@pengutronix.de>
Message-ID: <20120730085224.GN30009@pengutronix.de>

On Mon, Jul 30, 2012 at 10:11:32AM +0200, Juergen Beisert wrote:
> Hi Sascha,
> 
> Sascha Hauer wrote:
> > On Fri, Jul 27, 2012 at 06:54:16PM +0200, Juergen Beisert wrote:
> > > Sascha Hauer wrote:
> > > > On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> > > > > Use 512k NAND Partion for barebox. Problem is we don't know the size
> > > > > of the barebox inside xload. Set it also to 512k
> > > > > Fix enviroment for boards with size in config
> > > >
> > > > The barebox binary has the size encoded into it at offset 0x2c. We
> > > > could use this to transfer the correct size.
> > >
> > > Will this be a reliable "API" to the outerworld? Also in future versions
> > > of Barebox?
> >
> > Yes, definitely.
> >
> > That said, it is not a feature you can generally rely upon, because some
> > SoCs may require some special image layout conflicting with this.
> 
> This would require a "movable marker" inside the binary image.
> 
> > If your SoC can support this header, barebox will support it in the future
> > aswell.
> 
> Okay.
> 
> > The header is in arch/arm/include/asm/barebox-arm-head.h. As you can see
> > it also contains the ascii string 'barebox' which means that you can
> > test for it, and if you find it, the next word will contain the address
> > this binary should be copied to (only used to skip copying the binary to
> > the correct place, it's not mandatory to start the image there). The
> > word after it will contain the image size.
> >
> > This means, what you can do is:
> >
> > - Test if the image contains 'barebox'
> 
> This might be very dangerous, as this kind of string can be part of the binary 
> more than one times, if it is used as part of an output string for example 
> ("Hi, barebox here").

Should have said: 'contains the string 'barebox' at offset 0x20'

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 30 04:59:35 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 10:59:35 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <20120730084943.GA19759@game.jcrosoft.org>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
 <20120730080227.GK30009@pengutronix.de>
 <20120730081942.GE26655@game.jcrosoft.org>
 <20120730083048.GM30009@pengutronix.de>
 <20120730084943.GA19759@game.jcrosoft.org>
Message-ID: <20120730085935.GO30009@pengutronix.de>

On Mon, Jul 30, 2012 at 10:49:43AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 10:30 Mon 30 Jul     , Sascha Hauer wrote:
> > On Mon, Jul 30, 2012 at 10:19:42AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > On 10:02 Mon 30 Jul     , Sascha Hauer wrote:
> > > > On Fri, Jul 27, 2012 at 08:33:08PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > > This is not needed by lzo but by gunzip, xz and others.
> > > > > 
> > > > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > > > > ---
> > > > >  arch/arm/cpu/start.c |    7 +++++++
> > > > >  1 file changed, 7 insertions(+)
> > > > > 
> > > > > diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> > > > > index a54f5fd..f500ca8 100644
> > > > > --- a/arch/arm/cpu/start.c
> > > > > +++ b/arch/arm/cpu/start.c
> > > > > @@ -28,6 +28,9 @@
> > > > >  #include <asm-generic/memory_layout.h>
> > > > >  #include <asm/sections.h>
> > > > >  
> > > > > +unsigned long free_mem_ptr;
> > > > > +unsigned long free_mem_end_ptr;
> > > > > +
> > > > >  #ifdef CONFIG_PBL_IMAGE
> > > > >  void __naked __section(.text_head_entry) pbl_start(void)
> > > > >  {
> > > > > @@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
> > > > >  	/* clear bss */
> > > > >  	memset(__bss_start, 0, __bss_stop - __bss_start);
> > > > >  
> > > > > +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> > > > > +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> > > > > +	free_mem_end_ptr = STACK_BASE - 16;
> > > > > +
> > > > 
> > > > This assumes that the malloc area is directly before the stack. How
> > > > about using __bss_stop or _end instead?
> > > 
> > > it's just for early alloc and __bss_stop no so maybe we can use the same as
> > > Malloc but we already use this for HEAD_TEXT_BASE
> > 
> > _end is HEAD_TEXT_BASE + the space needed for the compressed
> > image, so what's wrong with it?
> the pbl image can be stored in a sram and link to fit there so _end could be
> at the end of the sram
> 
> so we can not use it.
> 
> We need to put the early malloc in the sdram

HEAD_TEXT_BASE is in sdram, because it's the same as MALLOC_BASE, so
_end by definition also is in sdram.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 30 05:04:43 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 11:04:43 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <20120730085935.GO30009@pengutronix.de>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
 <20120730080227.GK30009@pengutronix.de>
 <20120730081942.GE26655@game.jcrosoft.org>
 <20120730083048.GM30009@pengutronix.de>
 <20120730084943.GA19759@game.jcrosoft.org>
 <20120730085935.GO30009@pengutronix.de>
Message-ID: <20120730090443.GB19759@game.jcrosoft.org>

On 10:59 Mon 30 Jul     , Sascha Hauer wrote:
> On Mon, Jul 30, 2012 at 10:49:43AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 10:30 Mon 30 Jul     , Sascha Hauer wrote:
> > > On Mon, Jul 30, 2012 at 10:19:42AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > On 10:02 Mon 30 Jul     , Sascha Hauer wrote:
> > > > > On Fri, Jul 27, 2012 at 08:33:08PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > > > This is not needed by lzo but by gunzip, xz and others.
> > > > > > 
> > > > > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > > > > > ---
> > > > > >  arch/arm/cpu/start.c |    7 +++++++
> > > > > >  1 file changed, 7 insertions(+)
> > > > > > 
> > > > > > diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
> > > > > > index a54f5fd..f500ca8 100644
> > > > > > --- a/arch/arm/cpu/start.c
> > > > > > +++ b/arch/arm/cpu/start.c
> > > > > > @@ -28,6 +28,9 @@
> > > > > >  #include <asm-generic/memory_layout.h>
> > > > > >  #include <asm/sections.h>
> > > > > >  
> > > > > > +unsigned long free_mem_ptr;
> > > > > > +unsigned long free_mem_end_ptr;
> > > > > > +
> > > > > >  #ifdef CONFIG_PBL_IMAGE
> > > > > >  void __naked __section(.text_head_entry) pbl_start(void)
> > > > > >  {
> > > > > > @@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
> > > > > >  	/* clear bss */
> > > > > >  	memset(__bss_start, 0, __bss_stop - __bss_start);
> > > > > >  
> > > > > > +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> > > > > > +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> > > > > > +	free_mem_end_ptr = STACK_BASE - 16;
> > > > > > +
> > > > > 
> > > > > This assumes that the malloc area is directly before the stack. How
> > > > > about using __bss_stop or _end instead?
> > > > 
> > > > it's just for early alloc and __bss_stop no so maybe we can use the same as
> > > > Malloc but we already use this for HEAD_TEXT_BASE
> > > 
> > > _end is HEAD_TEXT_BASE + the space needed for the compressed
> > > image, so what's wrong with it?
> > the pbl image can be stored in a sram and link to fit there so _end could be
> > at the end of the sram
> > 
> > so we can not use it.
> > 
> > We need to put the early malloc in the sdram
> 
> HEAD_TEXT_BASE is in sdram, because it's the same as MALLOC_BASE, so
> _end by definition also is in sdram.
yes but pbl fill the sram fully so in my case I put HEAD_TEXT_BASE is sram not
sdram so no space for the MALLOC and MALLOC_BASE is in sdram

Best Regards,
J.


From jbe at pengutronix.de  Mon Jul 30 05:16:48 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Mon, 30 Jul 2012 11:16:48 +0200
Subject: [PATCH] omap: use 512k barebox partition
In-Reply-To: <20120730085224.GN30009@pengutronix.de>
References: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
 <201207301011.32695.jbe@pengutronix.de>
 <20120730085224.GN30009@pengutronix.de>
Message-ID: <201207301116.48766.jbe@pengutronix.de>

Sascha Hauer wrote:
> On Mon, Jul 30, 2012 at 10:11:32AM +0200, Juergen Beisert wrote:
> > Hi Sascha,
> >
> > Sascha Hauer wrote:
> > > On Fri, Jul 27, 2012 at 06:54:16PM +0200, Juergen Beisert wrote:
> > > > Sascha Hauer wrote:
> > > > > On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> > > > > > Use 512k NAND Partion for barebox. Problem is we don't know the
> > > > > > size of the barebox inside xload. Set it also to 512k
> > > > > > Fix enviroment for boards with size in config
> > > > >
> > > > > The barebox binary has the size encoded into it at offset 0x2c. We
> > > > > could use this to transfer the correct size.
> > > >
> > > > Will this be a reliable "API" to the outerworld? Also in future
> > > > versions of Barebox?
> > >
> > > Yes, definitely.
> > >
> > > That said, it is not a feature you can generally rely upon, because
> > > some SoCs may require some special image layout conflicting with this.
> >
> > This would require a "movable marker" inside the binary image.
> >
> > > If your SoC can support this header, barebox will support it in the
> > > future aswell.
> >
> > Okay.
> >
> > > The header is in arch/arm/include/asm/barebox-arm-head.h. As you can
> > > see it also contains the ascii string 'barebox' which means that you
> > > can test for it, and if you find it, the next word will contain the
> > > address this binary should be copied to (only used to skip copying the
> > > binary to the correct place, it's not mandatory to start the image
> > > there). The word after it will contain the image size.
> > >
> > > This means, what you can do is:
> > >
> > > - Test if the image contains 'barebox'
> >
> > This might be very dangerous, as this kind of string can be part of the
> > binary more than one times, if it is used as part of an output string for
> > example ("Hi, barebox here").
>
> Should have said: 'contains the string 'barebox' at offset 0x20'

Okay. This would mean: There might be a marker at 0x20, else nowhere in the 
image.

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Mon Jul 30 05:20:44 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 11:20:44 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <20120730090443.GB19759@game.jcrosoft.org>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
 <20120730080227.GK30009@pengutronix.de>
 <20120730081942.GE26655@game.jcrosoft.org>
 <20120730083048.GM30009@pengutronix.de>
 <20120730084943.GA19759@game.jcrosoft.org>
 <20120730085935.GO30009@pengutronix.de>
 <20120730090443.GB19759@game.jcrosoft.org>
Message-ID: <20120730092044.GP30009@pengutronix.de>

On Mon, Jul 30, 2012 at 11:04:43AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > > > >  	/* clear bss */
> > > > > > >  	memset(__bss_start, 0, __bss_stop - __bss_start);
> > > > > > >  
> > > > > > > +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> > > > > > > +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> > > > > > > +	free_mem_end_ptr = STACK_BASE - 16;
> > > > > > > +
> > > > > > 
> > > > > > This assumes that the malloc area is directly before the stack. How
> > > > > > about using __bss_stop or _end instead?
> > > > > 
> > > > > it's just for early alloc and __bss_stop no so maybe we can use the same as
> > > > > Malloc but we already use this for HEAD_TEXT_BASE
> > > > 
> > > > _end is HEAD_TEXT_BASE + the space needed for the compressed
> > > > image, so what's wrong with it?
> > > the pbl image can be stored in a sram and link to fit there so _end could be
> > > at the end of the sram
> > > 
> > > so we can not use it.
> > > 
> > > We need to put the early malloc in the sdram
> > 
> > HEAD_TEXT_BASE is in sdram, because it's the same as MALLOC_BASE, so
> > _end by definition also is in sdram.
> yes but pbl fill the sram fully so in my case I put HEAD_TEXT_BASE is sram not
> sdram so no space for the MALLOC and MALLOC_BASE is in sdram

Ok, then the assumption that HEAD_TEXT_BASE is always in sdram is wrong.
We can live with this until you add your at91 support. Nevertheless
MALLOC_BASE always is in sdram, so I suggest to use the last 128k of the
malloc space for early malloc:

free_mem_ptr = MALLOC_BASE + MALLOC_SIZE - SZ_128K

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 30 05:30:09 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 11:30:09 +0200
Subject: [PATCH 10/12] ARM: add early malloc support needed by the
 decompressor
In-Reply-To: <20120730092044.GP30009@pengutronix.de>
References: <20120727183103.GX22657@game.jcrosoft.org>
 <1343413990-31891-1-git-send-email-plagnioj@jcrosoft.com>
 <1343413990-31891-10-git-send-email-plagnioj@jcrosoft.com>
 <20120730080227.GK30009@pengutronix.de>
 <20120730081942.GE26655@game.jcrosoft.org>
 <20120730083048.GM30009@pengutronix.de>
 <20120730084943.GA19759@game.jcrosoft.org>
 <20120730085935.GO30009@pengutronix.de>
 <20120730090443.GB19759@game.jcrosoft.org>
 <20120730092044.GP30009@pengutronix.de>
Message-ID: <20120730093009.GC19759@game.jcrosoft.org>

On 11:20 Mon 30 Jul     , Sascha Hauer wrote:
> On Mon, Jul 30, 2012 at 11:04:43AM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > > > > >  	/* clear bss */
> > > > > > > >  	memset(__bss_start, 0, __bss_stop - __bss_start);
> > > > > > > >  
> > > > > > > > +	/* set 128 KiB before the STACK_BASE - 16 address for early malloc */
> > > > > > > > +	free_mem_ptr = STACK_BASE - 0x20000 - 16;
> > > > > > > > +	free_mem_end_ptr = STACK_BASE - 16;
> > > > > > > > +
> > > > > > > 
> > > > > > > This assumes that the malloc area is directly before the stack. How
> > > > > > > about using __bss_stop or _end instead?
> > > > > > 
> > > > > > it's just for early alloc and __bss_stop no so maybe we can use the same as
> > > > > > Malloc but we already use this for HEAD_TEXT_BASE
> > > > > 
> > > > > _end is HEAD_TEXT_BASE + the space needed for the compressed
> > > > > image, so what's wrong with it?
> > > > the pbl image can be stored in a sram and link to fit there so _end could be
> > > > at the end of the sram
> > > > 
> > > > so we can not use it.
> > > > 
> > > > We need to put the early malloc in the sdram
> > > 
> > > HEAD_TEXT_BASE is in sdram, because it's the same as MALLOC_BASE, so
> > > _end by definition also is in sdram.
> > yes but pbl fill the sram fully so in my case I put HEAD_TEXT_BASE is sram not
> > sdram so no space for the MALLOC and MALLOC_BASE is in sdram
> 
> Ok, then the assumption that HEAD_TEXT_BASE is always in sdram is wrong.
> We can live with this until you add your at91 support. Nevertheless
> MALLOC_BASE always is in sdram, so I suggest to use the last 128k of the
> malloc space for early malloc:
> 
> free_mem_ptr = MALLOC_BASE + MALLOC_SIZE - SZ_128K
ok fine by me

I resend the full patch series

Best Regards,
J.


From s.hauer at pengutronix.de  Mon Jul 30 05:33:45 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 11:33:45 +0200
Subject: [PATCH] omap: use 512k barebox partition
In-Reply-To: <201207301116.48766.jbe@pengutronix.de>
References: <1343387347-24504-1-git-send-email-j.weitzel@phytec.de>
 <201207301011.32695.jbe@pengutronix.de>
 <20120730085224.GN30009@pengutronix.de>
 <201207301116.48766.jbe@pengutronix.de>
Message-ID: <20120730093345.GR30009@pengutronix.de>

On Mon, Jul 30, 2012 at 11:16:48AM +0200, Juergen Beisert wrote:
> Sascha Hauer wrote:
> > On Mon, Jul 30, 2012 at 10:11:32AM +0200, Juergen Beisert wrote:
> > > Hi Sascha,
> > >
> > > Sascha Hauer wrote:
> > > > On Fri, Jul 27, 2012 at 06:54:16PM +0200, Juergen Beisert wrote:
> > > > > Sascha Hauer wrote:
> > > > > > On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> > > > > > > Use 512k NAND Partion for barebox. Problem is we don't know the
> > > > > > > size of the barebox inside xload. Set it also to 512k
> > > > > > > Fix enviroment for boards with size in config
> > > > > >
> > > > > > The barebox binary has the size encoded into it at offset 0x2c. We
> > > > > > could use this to transfer the correct size.
> > > > >
> > > > > Will this be a reliable "API" to the outerworld? Also in future
> > > > > versions of Barebox?
> > > >
> > > > Yes, definitely.
> > > >
> > > > That said, it is not a feature you can generally rely upon, because
> > > > some SoCs may require some special image layout conflicting with this.
> > >
> > > This would require a "movable marker" inside the binary image.
> > >
> > > > If your SoC can support this header, barebox will support it in the
> > > > future aswell.
> > >
> > > Okay.
> > >
> > > > The header is in arch/arm/include/asm/barebox-arm-head.h. As you can
> > > > see it also contains the ascii string 'barebox' which means that you
> > > > can test for it, and if you find it, the next word will contain the
> > > > address this binary should be copied to (only used to skip copying the
> > > > binary to the correct place, it's not mandatory to start the image
> > > > there). The word after it will contain the image size.
> > > >
> > > > This means, what you can do is:
> > > >
> > > > - Test if the image contains 'barebox'
> > >
> > > This might be very dangerous, as this kind of string can be part of the
> > > binary more than one times, if it is used as part of an output string for
> > > example ("Hi, barebox here").
> >
> > Should have said: 'contains the string 'barebox' at offset 0x20'
> 
> Okay. This would mean: There might be a marker at 0x20, else nowhere in the 
> image.

Yes.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 30 05:38:36 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 11:38:36 +0200
Subject: at24 eeprom driver (V2) and misc patches
In-Reply-To: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120730093836.GS30009@pengutronix.de>

Hi Marc,

On Sun, Jul 29, 2012 at 05:41:47PM +1000, Marc Reilly wrote:
> Hi,
> 
> These patches add an (improved) at24 eeprom driver and some other fixes. The
> eeprom driver has improved write handling that polls the device for write 
> completion (rather than fixed 10ms delay).
> 
> The eeprom driver requires patch 3 and 4. 
> 
> The nand patches fix a build error when BBT is not enabled.

For now I applied patch 1 & 2, but I squashed them into a single commit,
because otherwise we would introduce a build warning (unused function)
between those two patches.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon Jul 30 05:41:12 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 11:41:12 +0200
Subject: [PATCH 3/7] i2c: add platform_data for i2c_board_info
In-Reply-To: <1343547714-32740-4-git-send-email-marc@cpdesign.com.au>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-4-git-send-email-marc@cpdesign.com.au>
Message-ID: <20120730094112.GT30009@pengutronix.de>

On Sun, Jul 29, 2012 at 05:41:50PM +1000, Marc Reilly wrote:
> Signed-off-by: Marc Reilly <marc at cpdesign.com.au>

Applied this one aswell.

Sascha

> ---
>  drivers/i2c/i2c.c |    1 +
>  include/i2c/i2c.h |    1 +
>  2 files changed, 2 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
> index 5df0d30..15f5507 100644
> --- a/drivers/i2c/i2c.c
> +++ b/drivers/i2c/i2c.c
> @@ -250,6 +250,7 @@ struct i2c_client *i2c_new_device(struct i2c_adapter *adapter,
>  	client = xzalloc(sizeof *client);
>  	strcpy(client->dev.name, chip->type);
>  	client->dev.type_data = client;
> +	client->dev.platform_data = chip->platform_data;
>  	client->adapter = adapter;
>  	client->addr = chip->addr;
>  
> diff --git a/include/i2c/i2c.h b/include/i2c/i2c.h
> index ccbf518..c3e1763 100644
> --- a/include/i2c/i2c.h
> +++ b/include/i2c/i2c.h
> @@ -99,6 +99,7 @@ struct i2c_client {
>  struct i2c_board_info {
>  	char		type[I2C_NAME_SIZE];	/**< name of device */
>  	unsigned short	addr;			/**< stored in i2c_client.addr */
> +	void		*platform_data;		/**< platform data for device */
>  };
>  
>  /**
> -- 
> 1.7.7
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon Jul 30 06:00:22 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:00:22 +0200
Subject: [PATCH 00/12 v3] Add Pre-Bootloader support
Message-ID: <20120730100022.GD19759@game.jcrosoft.org>

Hi,
v3:
	drop
	ARM: Separate assembler functions into their own section

	drop already applied
	decompress_unlzo: define decompress_unlzo as decompress

	update early malloc to the end of the malloc space

v2:

	add custom cppflags to pbl 
	on arm always the garbage collector

please pull
The following changes since commit d8ddfd069f99428244aff34e2ccebe9ed6a6a7a3:

  decompress_unlzo: define decompress_unlzo as decompress (2012-07-30 16:23:54 +0800)

are available in the git repository at:

  git://git.jcrosoft.org/barebox.git tags/pbl

for you to fetch changes up to 0d4fc07c84581f088b658ff9fbc1e275a3ada518:

  arm: always enable the garbage collector for pbl (2012-07-30 17:32:51 +0800)

----------------------------------------------------------------
Add pre-bootloader (pbl) image support

This allows for creating a pre-bootloader binary for
 - nand boot
 - mmc boot
 - compressed image

Currently on the compressed image is implemented the boot really on current lowlevel
init support. In a second step this could be move to the pbl c code with generic framework.

The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.

The decompressor support lzo and gzip and allow to add easly more.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (10):
      kbuild: Init all relevant variables used in kbuild files so
      kbuild: add pre-bootloader (pbl) target
      Add pre-bootloader (pbl) image support
      pbl: discard unwind symbol if enable in barebox
      decompressor: import malloc/free implementation for linux 3.4
      ARM: add early malloc support needed by the decompressor
      compressed image: add gzip support
      at91: add lowlevel init to the pbl
      kbuild: allow to have custom cppflags for pbl
      arm: always enable the garbage collector for pbl

Sascha Hauer (2):
      Add compressed image support
      only compress default env in uncompressed images

 Makefile                            |   11 +++++++++--
 arch/arm/Kconfig                    |    2 ++
 arch/arm/Makefile                   |    8 ++++++++
 arch/arm/cpu/Makefile               |    1 +
 arch/arm/cpu/start.c                |  113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----
 arch/arm/lib/Makefile               |    4 ++++
 arch/arm/lib/barebox.lds.S          |    3 ++-
 arch/arm/mach-at91/Makefile         |    2 ++
 arch/arm/pbl/Makefile               |   40 +++++++++++++++++++++++++++++++++++++++
 arch/arm/pbl/piggy.gzip.S           |    6 ++++++
 arch/arm/pbl/piggy.lzo.S            |    6 ++++++
 arch/arm/pbl/zbarebox.lds.S         |   74 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 common/Kconfig                      |   34 +++++++++++++++++++++++++++++++++
 include/asm-generic/memory_layout.h |    1 +
 include/linux/decompress/mm.h       |   68 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/decompress_inflate.c            |    1 +
 pbl/Makefile                        |    5 +++++
 pbl/misc.c                          |   14 ++++++++++++++
 pbl/string.c                        |  127 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 scripts/Makefile.build              |   73 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----
 scripts/Makefile.lib                |   14 ++++++++++++++
 21 files changed, 596 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/pbl/Makefile
 create mode 100644 arch/arm/pbl/piggy.gzip.S
 create mode 100644 arch/arm/pbl/piggy.lzo.S
 create mode 100644 arch/arm/pbl/zbarebox.lds.S
 create mode 100644 include/linux/decompress/mm.h
 create mode 100644 pbl/Makefile
 create mode 100644 pbl/misc.c
 create mode 100644 pbl/string.c

Beset Regards,
J.


From plagnioj at jcrosoft.com  Mon Jul 30 06:02:36 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:36 +0200
Subject: [PATCH 03/12] Add pre-bootloader (pbl) image support
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-3-git-send-email-plagnioj@jcrosoft.com>

This allows for creating a pre-bootloader binary for
 - nand boot
 - mmc boot
 - compressed image

The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.

Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.

For now on introduce dummy zbarebox* targets and c code that will contain later
the decompressor. This only implemeted on ARM.

This patch is based on Sascha Hauer <s.hauer at pengutronix.de>
Add compressed image support patch

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile                                           |    6 +-
 arch/arm/Kconfig                                   |    1 +
 arch/arm/Makefile                                  |    4 +
 arch/arm/cpu/Makefile                              |    1 +
 arch/arm/cpu/start.c                               |   43 ++++++-
 arch/arm/lib/Makefile                              |    4 +
 arch/arm/lib/barebox.lds.S                         |    3 +-
 arch/arm/pbl/Makefile                              |   25 ++++
 arch/arm/{lib/barebox.lds.S => pbl/zbarebox.lds.S} |   53 ++------
 common/Kconfig                                     |   30 +++++
 include/asm-generic/memory_layout.h                |    1 +
 pbl/Makefile                                       |    5 +
 pbl/misc.c                                         |   14 +++
 pbl/string.c                                       |  127 ++++++++++++++++++++
 14 files changed, 269 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/pbl/Makefile
 copy arch/arm/{lib/barebox.lds.S => pbl/zbarebox.lds.S} (60%)
 create mode 100644 pbl/Makefile
 create mode 100644 pbl/misc.c
 create mode 100644 pbl/string.c

diff --git a/Makefile b/Makefile
index 168381d..a102015 100644
--- a/Makefile
+++ b/Makefile
@@ -474,6 +474,8 @@ CFLAGS += $(call cc-option,-Wno-pointer-sign,)
 # this default value
 export KBUILD_IMAGE ?= barebox
 
+common-$(CONFIG_PBL_IMAGE)	+= pbl/
+
 barebox-dirs	:= $(patsubst %/,%,$(filter %/, $(common-y)))
 
 barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
@@ -520,7 +522,7 @@ barebox-lds    := $(lds-y)
 # May be overridden by arch/$(ARCH)/Makefile
 quiet_cmd_barebox__ ?= LD      $@
       cmd_barebox__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
-      -T $(barebox-lds) $(barebox-head)                         \
+      -T $(barebox-lds)                         \
       --start-group $(barebox-common) --end-group                  \
       $(filter-out $(barebox-lds) $(barebox-common) FORCE ,$^)
 
@@ -674,7 +676,9 @@ OBJCOPYFLAGS_barebox.bin = -O binary
 
 barebox.bin: barebox FORCE
 	$(call if_changed,objcopy)
+ifndef CONFIG_PBL_IMAGE
 	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+endif
 
 ifdef CONFIG_X86
 barebox.S: barebox
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5acc36f..3d11497 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -4,6 +4,7 @@ config ARM
 	select HAS_MODULES
 	select HAVE_CONFIGURABLE_MEMORY_LAYOUT
 	select HAVE_CONFIGURABLE_TEXT_BASE
+	select HAVE_PBL_IMAGE
 	default y
 
 config ARM_AMBA
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bf17203..80ef986 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,10 @@ ifeq ($(CONFIG_ARCH_DAVINCI),y)
 KBUILD_IMAGE := barebox.ubl
 endif
 
+pbl := arch/arm/pbl
+zbarebox.S zbarebox.bin zbarebox: barebox.bin
+	$(Q)$(MAKE) $(build)=$(pbl) $(pbl)/$@
+
 all: $(KBUILD_IMAGE)
 
 archprepare: maketools
diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 93a34a9..939e6a7 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_CPU_32v6) += cache-armv6.o
 obj-$(CONFIG_CPU_32v7) += cache-armv7.o
 obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
 
+pbl-y += start.o
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 112403e..49b1d5b 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,10 +28,34 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+#ifdef CONFIG_PBL_IMAGE
+void __naked __section(.text_head_entry) pbl_start(void)
+{
+	barebox_arm_head();
+}
+
+/*
+ * First function in the pbl image. We get here from
+ * the decompressor
+ */
+void __naked __section(.text_entry) start(void)
+{
+	u32 r;
+
+	/* Setup the stack */
+	r = STACK_BASE + STACK_SIZE - 16;
+	__asm__ __volatile__("mov sp, %0" : : "r"(r));
+	/* clear bss */
+	memset(__bss_start, 0, __bss_stop - __bss_start);
+
+	start_barebox();
+}
+#else
 void __naked __section(.text_entry) start(void)
 {
 	barebox_arm_head();
 }
+#endif
 
 /*
  * The actual reset vector. This code is position independent and usually
@@ -73,6 +97,14 @@ void __naked __bare_init reset(void)
 	board_init_lowlevel_return();
 }
 
+#ifdef __PBL__
+void barebox_pbl(uint32_t offset)
+{
+}
+#else
+void barebox_pbl(uint32_t offset) {}
+#endif
+
 /*
  * Board code can jump here by either returning from board_init_lowlevel
  * or by calling this function directly.
@@ -105,8 +137,11 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-	/* call start_barebox with its absolute address */
-	r = (unsigned int)&start_barebox;
-	__asm__ __volatile__("mov pc, %0" : : "r"(r));
+	if (IS_ENABLED(CONFIG_PBL_IMAGE)) {
+		barebox_pbl(offset);
+	} else {
+		/* call start_barebox with its absolute address */
+		r = (unsigned int)&start_barebox;
+		__asm__ __volatile__("mov pc, %0" : : "r"(r));
+	}
 }
-
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 1eaf474..9d0ff7a 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -21,3 +21,7 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS)	+= memset.o
 obj-$(CONFIG_ARM_UNWIND) += unwind.o
 obj-$(CONFIG_MODULES) += module.o
 extra-y += barebox.lds
+
+pbl-y	+= lib1funcs.o
+pbl-y	+= ashldi3.o
+pbl-y	+= div0.o
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index e0bae70..a69013f 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -31,8 +31,9 @@ SECTIONS
 {
 	. = TEXT_BASE;
 
+#ifndef CONFIG_PBL_IMAGE
 	PRE_IMAGE
-
+#endif
 	. = ALIGN(4);
 	.text      :
 	{
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
new file mode 100644
index 0000000..9b364bb
--- /dev/null
+++ b/arch/arm/pbl/Makefile
@@ -0,0 +1,25 @@
+
+OBJCOPYFLAGS_zbarebox.bin = -O binary
+
+targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S
+
+$(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
+	$(call if_changed,objcopy)
+	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+	@echo '  Barebox: $@ is ready'
+
+$(obj)/zbarebox.S: $(obj)/zbarebox FORCE
+	$(call if_changed,disasm)
+
+LDFLAGS_zbarebox	:= -Map zbarebox.map
+zbarebox-common := $(barebox-pbl-common)
+zbarebox-lds := $(obj)/zbarebox.lds
+
+quiet_cmd_zbarebox__ ?= LD      $@
+      cmd_zbarebox__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \
+      -T $(zbarebox-lds)                                           \
+      --start-group $(zbarebox-common) --end-group                 \
+      $(filter-out $(zbarebox-lds) $(zbarebox-common) FORCE ,$^)
+
+$(obj)/zbarebox: $(zbarebox-lds) $(zbarebox-common) FORCE
+	$(call if_changed,zbarebox__)
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/pbl/zbarebox.lds.S
similarity index 60%
copy from arch/arm/lib/barebox.lds.S
copy to arch/arm/pbl/zbarebox.lds.S
index e0bae70..1cbcef4 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/pbl/zbarebox.lds.S
@@ -1,6 +1,5 @@
 /*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ * (C) Copyright 2012 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -23,13 +22,14 @@
  */
 
 #include <asm-generic/barebox.lds.h>
+#include <asm-generic/memory_layout.h>
 
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
-ENTRY(start)
+ENTRY(pbl_start)
 SECTIONS
 {
-	. = TEXT_BASE;
+	. = HEAD_TEXT_BASE;
 
 	PRE_IMAGE
 
@@ -38,15 +38,12 @@ SECTIONS
 	{
 		_stext = .;
 		_text = .;
-		*(.text_entry*)
+		*(.text_head_entry*)
 		__ll_return = .;
 		*(.text_ll_return*)
 		__bare_init_start = .;
 		*(.text_bare_init*)
 		__bare_init_end = .;
-		__exceptions_start = .;
-		KEEP(*(.text_exceptions*))
-		__exceptions_stop = .;
 		*(.text*)
 	}
 	BAREBOX_BARE_INIT_SIZE
@@ -54,48 +51,20 @@ SECTIONS
 	. = ALIGN(4);
 	.rodata : { *(.rodata*) }
 
-#ifdef CONFIG_ARM_UNWIND
-	/*
-	 * Stack unwinding tables
-	 */
-	. = ALIGN(8);
-	.ARM.unwind_idx : {
-		__start_unwind_idx = .;
-		*(.ARM.exidx*)
-		__stop_unwind_idx = .;
-	}
-	.ARM.unwind_tab : {
-		__start_unwind_tab = .;
-		*(.ARM.extab*)
-		__stop_unwind_tab = .;
-	}
-#endif
 	_etext = .;			/* End of text and rodata section */
 
 	. = ALIGN(4);
-	.data : { *(.data*) }
-
-	. = .;
-	__barebox_cmd_start = .;
-	.barebox_cmd : { BAREBOX_CMDS }
-	__barebox_cmd_end = .;
-
-	__barebox_magicvar_start = .;
-	.barebox_magicvar : { BAREBOX_MAGICVARS }
-	__barebox_magicvar_end = .;
-
-	__barebox_initcalls_start = .;
-	.barebox_initcalls : { INITCALLS }
-	__barebox_initcalls_end = .;
+	.piggydata : {
+		*(.piggydata)
+	}
 
-	__usymtab_start = .;
-	__usymtab : { BAREBOX_SYMS }
-	__usymtab_end = .;
+	. = ALIGN(4);
+	.data : { *(.data*) }
 
 	. = ALIGN(4);
 	__bss_start = .;
 	.bss : { *(.bss*) }
 	__bss_stop = .;
 	_end = .;
-	_barebox_image_size = __bss_start - TEXT_BASE;
+	_barebox_image_size = __bss_start - HEAD_TEXT_BASE;
 }
diff --git a/common/Kconfig b/common/Kconfig
index 7eb5b49..7b5a307 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -101,6 +101,36 @@ config ENVIRONMENT_VARIABLES
 
 menu "memory layout                 "
 
+config HAVE_PBL_IMAGE
+	bool
+
+config HAVE_IMAGE_COMPRESSION
+	bool
+
+config PBL_IMAGE
+	bool "Pre-Bootloader image"
+	depends on HAVE_PBL_IMAGE
+
+if PBL_IMAGE
+
+config IMAGE_COMPRESSION
+	bool "Compressed image"
+	depends on HAVE_IMAGE_COMPRESSION
+
+if IMAGE_COMPRESSION
+
+choice
+	prompt "Compression"
+
+config IMAGE_COMPRESSION_LZO
+	bool "lzo"
+
+endchoice
+
+endif
+
+endif
+
 config MMU
 	bool "Enable MMU"
 	help
diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h
index 941cd42..eb1607f 100644
--- a/include/asm-generic/memory_layout.h
+++ b/include/asm-generic/memory_layout.h
@@ -13,6 +13,7 @@
 
 #endif
 
+#define HEAD_TEXT_BASE MALLOC_BASE
 #define MALLOC_SIZE CONFIG_MALLOC_SIZE
 #define STACK_SIZE  CONFIG_STACK_SIZE
 
diff --git a/pbl/Makefile b/pbl/Makefile
new file mode 100644
index 0000000..7169c6c
--- /dev/null
+++ b/pbl/Makefile
@@ -0,0 +1,5 @@
+#
+# only unsed by the pbl
+#
+pbl-y += misc.o
+pbl-y += string.o
diff --git a/pbl/misc.c b/pbl/misc.c
new file mode 100644
index 0000000..47e9cea
--- /dev/null
+++ b/pbl/misc.c
@@ -0,0 +1,14 @@
+#include <common.h>
+#include <init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+
+void __noreturn panic(const char *fmt, ...)
+{
+	while(1);
+}
+
+void start_barebox(void)
+{
+}
diff --git a/pbl/string.c b/pbl/string.c
new file mode 100644
index 0000000..6787e82
--- /dev/null
+++ b/pbl/string.c
@@ -0,0 +1,127 @@
+/*
+ * arch/arm/boot/compressed/string.c
+ *
+ * Small subset of simple string routines
+ */
+
+#include <linux/types.h>
+
+void *memcpy(void *__dest, __const void *__src, size_t __n)
+{
+	int i = 0;
+	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
+
+	for (i = __n >> 3; i > 0; i--) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 2) {
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1 << 1) {
+		*d++ = *s++;
+		*d++ = *s++;
+	}
+
+	if (__n & 1)
+		*d++ = *s++;
+
+	return __dest;
+}
+
+void *memmove(void *__dest, __const void *__src, size_t count)
+{
+	unsigned char *d = __dest;
+	const unsigned char *s = __src;
+
+	if (__dest == __src)
+		return __dest;
+
+	if (__dest < __src)
+		return memcpy(__dest, __src, count);
+
+	while (count--)
+		d[count] = s[count];
+	return __dest;
+}
+
+size_t strlen(const char *s)
+{
+	const char *sc = s;
+
+	while (*sc != '\0')
+		sc++;
+	return sc - s;
+}
+
+int memcmp(const void *cs, const void *ct, size_t count)
+{
+	const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;
+	int res = 0;
+
+	while (su1 < end) {
+		res = *su1++ - *su2++;
+		if (res)
+			break;
+	}
+	return res;
+}
+
+int strcmp(const char *cs, const char *ct)
+{
+	unsigned char c1, c2;
+	int res = 0;
+
+	do {
+		c1 = *cs++;
+		c2 = *ct++;
+		res = c1 - c2;
+		if (res)
+			break;
+	} while (c1);
+	return res;
+}
+
+void *memchr(const void *s, int c, size_t count)
+{
+	const unsigned char *p = s;
+
+	while (count--)
+		if ((unsigned char)c == *p++)
+			return (void *)(p - 1);
+	return NULL;
+}
+
+char *strchr(const char *s, int c)
+{
+	while (*s != (char)c)
+		if (*s++ == '\0')
+			return NULL;
+	return (char *)s;
+}
+
+#undef memset
+
+void *memset(void *s, int c, size_t count)
+{
+	char *xs = s;
+	while (count--)
+		*xs++ = c;
+	return s;
+}
+
+void __memzero(void *s, size_t count)
+{
+	memset(s, 0, count);
+}
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:38 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:38 +0200
Subject: [PATCH 05/12] Add compressed image support
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-5-git-send-email-plagnioj@jcrosoft.com>

From: Sascha Hauer <s.hauer at pengutronix.de>

This allows for creating a lzo compressed binary unsing the pbl.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
[From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>]
re-integrate it in the new pbl target.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/Kconfig         |    1 +
 arch/arm/Makefile        |    4 ++++
 arch/arm/cpu/start.c     |   59 ++++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/pbl/Makefile    |   16 +++++++++++--
 arch/arm/pbl/piggy.lzo.S |    6 +++++
 5 files changed, 84 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/pbl/piggy.lzo.S

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3d11497..245bec8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -5,6 +5,7 @@ config ARM
 	select HAVE_CONFIGURABLE_MEMORY_LAYOUT
 	select HAVE_CONFIGURABLE_TEXT_BASE
 	select HAVE_PBL_IMAGE
+	select HAVE_IMAGE_COMPRESSION
 	default y
 
 config ARM_AMBA
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 80ef986..8e4bb48 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,10 @@ ifeq ($(CONFIG_ARCH_DAVINCI),y)
 KBUILD_IMAGE := barebox.ubl
 endif
 
+ifdef CONFIG_IMAGE_COMPRESSION
+KBUILD_IMAGE := zbarebox.bin
+endif
+
 pbl := arch/arm/pbl
 zbarebox.S zbarebox.bin zbarebox: barebox.bin
 	$(Q)$(MAKE) $(build)=$(pbl) $(pbl)/$@
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 49b1d5b..a54f5fd 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -98,8 +98,67 @@ void __naked __bare_init reset(void)
 }
 
 #ifdef __PBL__
+extern void *input_data;
+extern void *input_data_end;
+
+#define STATIC static
+
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+#include "../../../lib/decompress_unlzo.c"
+#endif
+
+void barebox_uncompress(void *compressed_start, unsigned int len)
+{
+	void (*barebox)(void);
+
+	if (IS_ENABLED(CONFIG_THUMB2_BAREBOX))
+		barebox = (void *)(TEXT_BASE + 1);
+	else
+		barebox = (void *)TEXT_BASE;
+
+	decompress((void *)compressed_start,
+			len,
+			NULL, NULL,
+			(void *)TEXT_BASE, NULL, NULL);
+
+	/* flush I-cache before jumping to the uncompressed binary */
+	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+
+	barebox();
+}
+
 void barebox_pbl(uint32_t offset)
 {
+	uint32_t compressed_start, compressed_end, len;
+	void (*uncompress)(void *compressed_start, unsigned int len);
+
+	compressed_start = (uint32_t)&input_data - offset;
+	compressed_end = (uint32_t)&input_data_end - offset;
+	len = compressed_end - compressed_start;
+
+	/*
+	 * Check if the compressed binary will be overwritten
+	 * by the uncompressed binary
+	 */
+	if (compressed_start >= TEXT_BASE &&
+			compressed_start < TEXT_BASE + len * 4 ) {
+		/*
+		 * copy compressed binary to its link address
+		 */
+		memcpy(&input_data, (void *)compressed_start, len);
+		compressed_start = (uint32_t)&input_data;
+	}
+
+	uncompress = barebox_uncompress;
+
+	/* call barebox_uncompress with its absolute address */
+	__asm__ __volatile__(
+		"mov r0, %1\n"
+		"mov r1, %2\n"
+		"mov pc, %0\n"
+		:
+		: "r"(uncompress), "r"(compressed_start), "r"(len)
+		: "r0", "r1");
 }
 #else
 void barebox_pbl(uint32_t offset) {}
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 9b364bb..4135911 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -1,7 +1,14 @@
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
+
 OBJCOPYFLAGS_zbarebox.bin = -O binary
+piggy_o := piggy.$(suffix_y).o
+
+targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S \
+	   $(piggy_o) piggy.$(suffix_y)
 
-targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S
+# Make sure files are removed during clean
+extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern
 
 $(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
 	$(call if_changed,objcopy)
@@ -12,7 +19,7 @@ $(obj)/zbarebox.S: $(obj)/zbarebox FORCE
 	$(call if_changed,disasm)
 
 LDFLAGS_zbarebox	:= -Map zbarebox.map
-zbarebox-common := $(barebox-pbl-common)
+zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o)
 zbarebox-lds := $(obj)/zbarebox.lds
 
 quiet_cmd_zbarebox__ ?= LD      $@
@@ -23,3 +30,8 @@ quiet_cmd_zbarebox__ ?= LD      $@
 
 $(obj)/zbarebox: $(zbarebox-lds) $(zbarebox-common) FORCE
 	$(call if_changed,zbarebox__)
+
+$(obj)/piggy.$(suffix_y): $(obj)/../../../barebox.bin FORCE
+	$(call if_changed,$(suffix_y))
+
+$(obj)/$(piggy_o): $(obj)/piggy.$(suffix_y) FORCE
diff --git a/arch/arm/pbl/piggy.lzo.S b/arch/arm/pbl/piggy.lzo.S
new file mode 100644
index 0000000..e0484c7
--- /dev/null
+++ b/arch/arm/pbl/piggy.lzo.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl	input_data
+input_data:
+	.incbin	"arch/arm/pbl/piggy.lzo"
+	.globl	input_data_end
+input_data_end:
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:37 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:37 +0200
Subject: [PATCH 04/12] pbl: discard unwind symbol if enable in barebox
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-4-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/pbl/zbarebox.lds.S |    4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/pbl/zbarebox.lds.S b/arch/arm/pbl/zbarebox.lds.S
index 1cbcef4..0902067 100644
--- a/arch/arm/pbl/zbarebox.lds.S
+++ b/arch/arm/pbl/zbarebox.lds.S
@@ -46,6 +46,10 @@ SECTIONS
 		__bare_init_end = .;
 		*(.text*)
 	}
+
+	/* Discard unwind if enable in barebox */
+	/DISCARD/ : { *(.ARM.ex*) }
+
 	BAREBOX_BARE_INIT_SIZE
 
 	. = ALIGN(4);
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:39 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:39 +0200
Subject: [PATCH 06/12] only compress default env in uncompressed images
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-6-git-send-email-plagnioj@jcrosoft.com>

From: Sascha Hauer <s.hauer at pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 common/Kconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/common/Kconfig b/common/Kconfig
index 7b5a307..40f0c71 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -511,6 +511,7 @@ config DEFAULT_ENVIRONMENT
 config DEFAULT_ENVIRONMENT_COMPRESSED
 	bool
 	depends on DEFAULT_ENVIRONMENT
+	depends on !IMAGE_COMPRESSION_LZO
 	default y if ZLIB
 	default y if BZLIB
 	default y if LZO_DECOMPRESS
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:43 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:43 +0200
Subject: [PATCH 10/12] at91: add lowlevel init to the pbl
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-10-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/mach-at91/Makefile |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 491c454..3ade725 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -4,6 +4,8 @@ lowlevel_init-y = at91sam926x_lowlevel_init.o
 lowlevel_init-$(CONFIG_ARCH_AT91RM9200) = at91rm9200_lowlevel_init.o
 obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y)
 
+pbl-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y)
+
 obj-$(CONFIG_AT91SAM9_RESET) += at91sam9_reset.o
 obj-$(CONFIG_AT91SAM9G45_RESET) += at91sam9g45_reset.o
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:44 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:44 +0200
Subject: [PATCH 11/12] kbuild: allow to have custom cppflags for pbl
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-11-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 scripts/Makefile.build |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index e5b7779..383d73f 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -188,7 +188,7 @@ quiet_cmd_pbl_cc_o_c = PBLCC   $@
 
 ifndef CONFIG_MODVERSIONS
 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
-cmd_pbl_cc_o_c = $(CC) -D__PBL__ $(c_flags) -c -o $@ $<
+cmd_pbl_cc_o_c = $(CC) -D__PBL__ $(c_flags) $(PBL_CPPFLAGS) -c -o $@ $<
 
 else
 # When module versioning is enabled the following steps are executed:
@@ -282,7 +282,7 @@ quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 
 quiet_cmd_pbl_as_o_S = PBLAS   $@
-cmd_pbl_as_o_S       = $(CC) -D__PBL__ $(a_flags) -c -o $@ $<
+cmd_pbl_as_o_S       = $(CC) -D__PBL__ $(a_flags) $(PBL_CPPFLAGS) -c -o $@ $<
 
 pbl-%.o: %.S
 	$(call if_changed_dep,pbl_as_o_S)
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:45 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:45 +0200
Subject: [PATCH 12/12] arm: always enable the garbage collector for pbl
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-12-git-send-email-plagnioj@jcrosoft.com>

This allow to save arround 1KiB on at91

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/pbl/Makefile |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 04fdffb..143da8b 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -19,7 +19,9 @@ $(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
 $(obj)/zbarebox.S: $(obj)/zbarebox FORCE
 	$(call if_changed,disasm)
 
+PBL_CPPFLAGS		+= -fdata-sections -ffunction-sections
 LDFLAGS_zbarebox	:= -Map zbarebox.map
+LDFLAGS_zbarebox	+= -static --gc-sections
 zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o)
 zbarebox-lds := $(obj)/zbarebox.lds
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:34 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:34 +0200
Subject: [PATCH 01/12] kbuild: Init all relevant variables used in kbuild
 files so
In-Reply-To: <20120730100022.GD19759@game.jcrosoft.org>
References: <20120730100022.GD19759@game.jcrosoft.org>
Message-ID: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>

import from linux 3.5-rc5

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 scripts/Makefile.build |   25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index f70e2b9..1a82c44 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -7,7 +7,30 @@ src := $(obj)
 PHONY := __build
 __build:
 
-# Read .config if it exist, otherwise ignore
+# Init all relevant variables used in kbuild files so
+# 1) they have correct type
+# 2) they do not inherit any value from the environment
+obj-y :=
+obj-m :=
+lib-y :=
+lib-m :=
+always :=
+targets :=
+subdir-y :=
+subdir-m :=
+EXTRA_AFLAGS   :=
+EXTRA_CFLAGS   :=
+EXTRA_CPPFLAGS :=
+EXTRA_LDFLAGS  :=
+asflags-y  :=
+ccflags-y  :=
+cppflags-y :=
+ldflags-y  :=
+
+subdir-asflags-y :=
+subdir-ccflags-y :=
+
+# Read auto.conf if it exists, otherwise ignore
 -include include/config/auto.conf
 
 include scripts/Kbuild.include
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:40 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:40 +0200
Subject: [PATCH 07/12] decompressor: import malloc/free implementation for
 linux 3.4
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-7-git-send-email-plagnioj@jcrosoft.com>

This is need for gunzip support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 include/linux/decompress/mm.h |   68 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 include/linux/decompress/mm.h

diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
new file mode 100644
index 0000000..0c35411
--- /dev/null
+++ b/include/linux/decompress/mm.h
@@ -0,0 +1,68 @@
+/*
+ * linux/compr_mm.h
+ *
+ * Memory management for pre-boot and ramdisk uncompressors
+ *
+ * Authors: Alain Knaff <alain at knaff.lu>
+ *
+ */
+
+#ifndef DECOMPR_MM_H
+#define DECOMPR_MM_H
+
+#ifdef STATIC
+
+/* Code active when included from pre-boot environment: */
+
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitrarily relocated (via
+ * GOT references).  This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
+/* A trivial malloc implementation, adapted from
+ *  malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ */
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
+
+static void *malloc(int size)
+{
+	void *p;
+
+	if (size < 0)
+		return NULL;
+	if (!malloc_ptr)
+		malloc_ptr = free_mem_ptr;
+
+	malloc_ptr = (malloc_ptr + 3) & ~3;     /* Align */
+
+	p = (void *)malloc_ptr;
+	malloc_ptr += size;
+
+	if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr)
+		return NULL;
+
+	malloc_count++;
+	return p;
+}
+
+static void free(void *where)
+{
+	malloc_count--;
+	if (!malloc_count)
+		malloc_ptr = free_mem_ptr;
+}
+
+#define large_malloc(a) malloc(a)
+#define large_free(a) free(a)
+
+#define INIT
+
+#endif /* STATIC */
+
+#endif /* DECOMPR_MM_H */
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:35 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:35 +0200
Subject: [PATCH 02/12] kbuild: add pre-bootloader (pbl) target
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-2-git-send-email-plagnioj@jcrosoft.com>

This will allow to link compiled object to the built-in-pbl.o across the source
tree that will be finally link to the pbl.

Now we compile the source %.c in pbl-%.o and provide -D__PBL__
so we can known in the source when it's compile for barebox or the pbl.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 Makefile               |    5 ++++-
 scripts/Makefile.build |   48 +++++++++++++++++++++++++++++++++++++++++++++---
 scripts/Makefile.lib   |   14 ++++++++++++++
 3 files changed, 63 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index ac5eaaf..168381d 100644
--- a/Makefile
+++ b/Makefile
@@ -481,6 +481,7 @@ barebox-alldirs	:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
 		     $(core-n) $(core-) $(drivers-n) $(drivers-) \
 		     $(net-n)  $(net-)  $(libs-n)    $(libs-))))
 
+pbl-common-y	:= $(patsubst %/, %/built-in-pbl.o, $(common-y))
 common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 
 # Build barebox
@@ -510,6 +511,8 @@ common-y	:= $(patsubst %/, %/built-in.o, $(common-y))
 # System.map is generated to document addresses of all kernel symbols
 
 barebox-common := $(common-y)
+barebox-pbl-common := $(pbl-common-y)
+export barebox-pbl-common
 barebox-all    := $(barebox-common)
 barebox-lds    := $(lds-y)
 
@@ -714,7 +717,7 @@ barebox.srec: barebox
 
 # The actual objects are generated when descending,
 # make sure no implicit rule kicks in
-$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds): $(barebox-dirs) ;
+$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds) $(barebox-pbl-common): $(barebox-dirs) ;
 
 # Handle descending into subdirectories listed in $(barebox-dirs)
 # Preset locale variables to speed up the build process. Limit locale
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 1a82c44..e5b7779 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -14,6 +14,7 @@ obj-y :=
 obj-m :=
 lib-y :=
 lib-m :=
+pbl-y :=
 always :=
 targets :=
 subdir-y :=
@@ -97,13 +98,19 @@ ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
 lib-target := $(obj)/lib.a
 endif
 
-ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
+ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target) $(pbl-y)),)
 builtin-target := $(obj)/built-in.o
 endif
 
+ifeq ($(CONFIG_PBL_IMAGE), y)
+ifneq ($(strip $(pbl-y) $(builtin-target)),)
+pbl-target := $(obj)/built-in-pbl.o
+endif
+endif
+
 # We keep a list of all modules in $(MODVERDIR)
 
-__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
+__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(pbl-target) $(extra-y)) \
 	 $(if $(KBUILD_MODULES),$(obj-m)) \
 	 $(subdir-ym) $(always)
 	@:
@@ -177,9 +184,11 @@ cmd_cc_symtypes_c	   = \
 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
 
 quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
+quiet_cmd_pbl_cc_o_c = PBLCC   $@
 
 ifndef CONFIG_MODVERSIONS
 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
+cmd_pbl_cc_o_c = $(CC) -D__PBL__ $(c_flags) -c -o $@ $<
 
 else
 # When module versioning is enabled the following steps are executed:
@@ -220,8 +229,22 @@ define rule_cc_o_c
 	mv -f $(dot-target).tmp $(dot-target).cmd
 endef
 
+define rule_pbl_cc_o_c
+	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
+	$(call echo-cmd,pbl_cc_o_c) $(cmd_pbl_cc_o_c);			  \
+	$(cmd_modversions)						  \
+	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,pbl_cc__o_c)' >    \
+	                                              $(dot-target).tmp;  \
+	rm -f $(depfile);						  \
+	mv -f $(dot-target).tmp $(dot-target).cmd
+endef
+
 # Built-in and composite module parts
 
+pbl-%.o: %.c
+	$(call cmd,force_checksrc)
+	$(call if_changed_rule,pbl_cc_o_c)
+
 %.o: %.c FORCE
 	$(call cmd,force_checksrc)
 	$(call if_changed_rule,cc_o_c)
@@ -258,10 +281,16 @@ cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 
+quiet_cmd_pbl_as_o_S = PBLAS   $@
+cmd_pbl_as_o_S       = $(CC) -D__PBL__ $(a_flags) -c -o $@ $<
+
+pbl-%.o: %.S
+	$(call if_changed_dep,pbl_as_o_S)
+
 %.o: %.S FORCE
 	$(call if_changed_dep,as_o_S)
 
-targets += $(real-objs-y) $(real-objs-m) $(lib-y)
+targets += $(real-objs-y) $(real-objs-m) $(lib-y) $(pbl-y)
 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 
 # Linker scripts preprocessor (.lds.S -> .lds)
@@ -294,6 +323,19 @@ $(builtin-target): $(obj-y) FORCE
 targets += $(builtin-target)
 endif # builtin-target
 
+ifdef pbl-target
+quiet_cmd_pbl_link_o_target = PBLLD   $@
+# If the list of objects to link is empty, just create an empty built-in-pbl.o
+cmd_pbl_link_o_target = $(if $(strip $(pbl-y)),\
+		      $(LD) $(ld_flags) -r -o $@ $(filter $(pbl-y), $^),\
+		      rm -f $@; $(AR) rcs $@)
+
+$(pbl-target): $(pbl-y) FORCE
+	$(call if_changed,pbl_link_o_target)
+
+targets += $(pbl-target)
+endif # pbl-target
+
 #
 # Rule to compile a set of .o files into one .a file
 #
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index b842c48..1a5b2b5 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -21,6 +21,17 @@ lib-y := $(filter-out $(obj-y), $(sort $(lib-y) $(lib-m)))
 # o if we encounter foo/ in $(obj-m), remove it from $(obj-m)
 #   and add the directory to the list of dirs to descend into: $(subdir-m)
 
+# for non dirs add pbl- prefix to the target
+# so we recompile the source with custom flags and custom quiet
+__pbl-y		:= $(notdir $(pbl-y))
+pbl-y		:= $(patsubst %.o,pbl-%.o,$(__pbl-y))
+# add subdir from $(obj-y) too so we do not need to have the dir define in
+# both $(obj-y) and $(pbl-y)
+__pbl-y		:= $(filter-out $(pbl-y), $(filter %/, $(obj-y)))
+pbl-y		+= $(__pbl-y)
+
+pbl-y		:= $(sort $(patsubst %/, %/built-in-pbl.o, $(pbl-y)))
+
 __subdir-y	:= $(patsubst %/,%,$(filter %/, $(obj-y)))
 subdir-y	+= $(__subdir-y)
 __subdir-m	:= $(patsubst %/,%,$(filter %/, $(obj-m)))
@@ -46,7 +57,9 @@ multi-objs   := $(multi-objs-y) $(multi-objs-m)
 
 # $(subdir-obj-y) is the list of objects in $(obj-y) which do not live
 # in the local directory
+__subdir-obj-y := $(foreach o,$(pbl-y),$(if $(filter-out $(o),$(notdir $(o))),$(o)))
 subdir-obj-y := $(foreach o,$(obj-y),$(if $(filter-out $(o),$(notdir $(o))),$(o)))
+subdir-obj-y += $(__subdir-obj-y)
 
 # $(obj-dirs) is a list of directories that contain object files
 obj-dirs := $(dir $(multi-objs) $(subdir-obj-y))
@@ -63,6 +76,7 @@ targets		:= $(addprefix $(obj)/,$(targets))
 obj-y		:= $(addprefix $(obj)/,$(obj-y))
 obj-m		:= $(addprefix $(obj)/,$(obj-m))
 lib-y		:= $(addprefix $(obj)/,$(lib-y))
+pbl-y		:= $(addprefix $(obj)/,$(pbl-y))
 subdir-obj-y	:= $(addprefix $(obj)/,$(subdir-obj-y))
 real-objs-y	:= $(addprefix $(obj)/,$(real-objs-y))
 real-objs-m	:= $(addprefix $(obj)/,$(real-objs-m))
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:41 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:41 +0200
Subject: [PATCH 08/12] ARM: add early malloc support needed by the decompressor
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-8-git-send-email-plagnioj@jcrosoft.com>

This is not needed by lzo but by gunzip, xz and others.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/cpu/start.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index a54f5fd..f61c326 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,6 +28,9 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 
+unsigned long free_mem_ptr;
+unsigned long free_mem_end_ptr;
+
 #ifdef CONFIG_PBL_IMAGE
 void __naked __section(.text_head_entry) pbl_start(void)
 {
@@ -193,6 +196,10 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
 
+	/* set 128 KiB at the end of the MALLOC_BASE for early malloc */
+	free_mem_ptr = MALLOC_BASE + MALLOC_SIZE - SZ_128K;
+	free_mem_end_ptr = free_mem_ptr + SZ_128K;
+
 	/* flush I-cache before jumping to the copied binary */
 	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 06:02:42 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 12:02:42 +0200
Subject: [PATCH 09/12] compressed image: add gzip support
In-Reply-To: <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <1343642565-32257-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1343642565-32257-9-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/cpu/start.c      |    4 ++++
 arch/arm/pbl/Makefile     |    1 +
 arch/arm/pbl/piggy.gzip.S |    6 ++++++
 common/Kconfig            |    3 +++
 lib/decompress_inflate.c  |    1 +
 5 files changed, 15 insertions(+)
 create mode 100644 arch/arm/pbl/piggy.gzip.S

diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index f61c326..f570f32 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -110,6 +110,10 @@ extern void *input_data_end;
 #include "../../../lib/decompress_unlzo.c"
 #endif
 
+#ifdef CONFIG_IMAGE_COMPRESSION_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
 void barebox_uncompress(void *compressed_start, unsigned int len)
 {
 	void (*barebox)(void);
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 4135911..04fdffb 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -1,4 +1,5 @@
 
+suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
 suffix_$(CONFIG_IMAGE_COMPRESSION_LZO)	= lzo
 
 OBJCOPYFLAGS_zbarebox.bin = -O binary
diff --git a/arch/arm/pbl/piggy.gzip.S b/arch/arm/pbl/piggy.gzip.S
new file mode 100644
index 0000000..4a623c0
--- /dev/null
+++ b/arch/arm/pbl/piggy.gzip.S
@@ -0,0 +1,6 @@
+	.section .piggydata,#alloc
+	.globl  input_data
+input_data:
+	.incbin "arch/arm/pbl/piggy.gzip"
+	.globl  input_data_end
+input_data_end:
diff --git a/common/Kconfig b/common/Kconfig
index 40f0c71..6fee9ae 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -125,6 +125,9 @@ choice
 config IMAGE_COMPRESSION_LZO
 	bool "lzo"
 
+config IMAGE_COMPRESSION_GZIP
+	bool "gzip"
+
 endchoice
 
 endif
diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c
index 526d6a1..5c1ebb6 100644
--- a/lib/decompress_inflate.c
+++ b/lib/decompress_inflate.c
@@ -4,6 +4,7 @@
 /* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
  * errors about console_printk etc... on ARM */
 #define _LINUX_KERNEL_H
+#include <linux/decompress/mm.h>
 
 #include "zlib_inflate/inftrees.c"
 #include "zlib_inflate/inffast.c"
-- 
1.7.10.4



From jbe at pengutronix.de  Mon Jul 30 06:38:43 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Mon, 30 Jul 2012 12:38:43 +0200
Subject: [PATCH 00/12 v3] Add Pre-Bootloader support
In-Reply-To: <20120730100022.GD19759@game.jcrosoft.org>
References: <20120730100022.GD19759@game.jcrosoft.org>
Message-ID: <201207301238.43600.jbe@pengutronix.de>

Jean-Christophe PLAGNIOL-VILLARD wrote:
> [...]
> Currently on the compressed image is implemented the boot really on current
> lowlevel init support.

^ Does this sentence makes any sense?

This patch set seems an important addition, so I think it needs a little bit 
more of documentation. But wait...I know...nobody reads documentation...

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Mon Jul 30 07:10:32 2012
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 30 Jul 2012 13:10:32 +0200
Subject: [PATCH] ARM/imx/pcm043: increase size of "self" partition
In-Reply-To: <1343387010.3793.8.camel@lws-weitzel>
References: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>
 <1343387010.3793.8.camel@lws-weitzel>
Message-ID: <20120730111032.GO1528@pengutronix.de>

On Fri, Jul 27, 2012 at 01:03:30PM +0200, Jan Weitzel wrote:
> Am Freitag, den 27.07.2012, 10:41 +0200 schrieb Uwe Kleine-K?nig:
> > A barebox image generated from pcm043_defconfig doesn't fit into the
> > 0x40000 byte sized self partition as of
> > 
> > 	v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for find_cmd)
> > 
> > .
> > 
> > Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
> > ---
> >  arch/arm/boards/pcm043/pcm043.c |    8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
> > index b1bf8ef..7ccd973 100644
> > --- a/arch/arm/boards/pcm043/pcm043.c
> > +++ b/arch/arm/boards/pcm043/pcm043.c
> > @@ -153,15 +153,15 @@ static int imx35_devices_init(void)
> >  	if ((reg & 0xc00) == 0x800) {   /* reset mode: external boot */
> >  		switch ( (reg >> 25) & 0x3) {
> >  		case 0x01:              /* NAND is the source */
> > -			devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
> > +			devfs_add_partition("nand0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self_raw");
> What do you think about SZ_128K + SZ_256K ? Maybe SZ_512K is even
> better.
I don't like SZ_128K + SZ_256K, which in my eyes is more ugly than a hex
constant. And using 512 kiB seems unnecessary to me. I'd like to stay
with 0x60000.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Mon Jul 30 07:11:53 2012
From: u.kleine-koenig at pengutronix.de (=?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=)
Date: Mon, 30 Jul 2012 13:11:53 +0200
Subject: [PATCH v2] ARM/imx/pcm043: increase size of "self" partition
In-Reply-To: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>
References: <1343378484-19963-1-git-send-email-u.kleine-koenig@pengutronix.de>
Message-ID: <1343646714-18888-1-git-send-email-u.kleine-koenig@pengutronix.de>

A barebox image generated from pcm043_defconfig doesn't fit into the
0x40000 byte sized self partition as of

	v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for find_cmd)

.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---
 arch/arm/boards/pcm043/env/config |    4 ++--
 arch/arm/boards/pcm043/pcm043.c   |    8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boards/pcm043/env/config b/arch/arm/boards/pcm043/env/config
index 644c7fb..c48f87c 100644
--- a/arch/arm/boards/pcm043/env/config
+++ b/arch/arm/boards/pcm043/env/config
@@ -42,10 +42,10 @@ bootargs="console=ttymxc0,115200"
 
 bootargs="$bootargs video=mx3fb:CTP-CLAA070LC0ACW"
 
-nor_parts="256k(barebox)ro,128k(bareboxenv),2M(kernel),-(root)"
+nor_parts="384k(barebox)ro,128k(bareboxenv),2M(kernel),-(root)"
 rootfs_mtdblock_nor=3
 
-nand_parts="256k(barebox)ro,128k(bareboxenv),2M(kernel),-(root)"
+nand_parts="384k(barebox)ro,128k(bareboxenv),2M(kernel),-(root)"
 rootfs_mtdblock_nand=7
 
 # set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
index b1bf8ef..7ccd973 100644
--- a/arch/arm/boards/pcm043/pcm043.c
+++ b/arch/arm/boards/pcm043/pcm043.c
@@ -153,15 +153,15 @@ static int imx35_devices_init(void)
 	if ((reg & 0xc00) == 0x800) {   /* reset mode: external boot */
 		switch ( (reg >> 25) & 0x3) {
 		case 0x01:              /* NAND is the source */
-			devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
+			devfs_add_partition("nand0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self_raw");
 			dev_add_bb_dev("self_raw", "self0");
-			devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
+			devfs_add_partition("nand0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
 			dev_add_bb_dev("env_raw", "env0");
 			break;
 
 		case 0x00:              /* NOR is the source */
-			devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
-			devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
+			devfs_add_partition("nor0", 0x00000, 0x60000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */
+			devfs_add_partition("nor0", 0x60000, 0x20000, DEVFS_PARTITION_FIXED, "env0");  /* environment */
 			protect_file("/dev/env0", 1);
 			break;
 		}
-- 
1.7.10.4



From plagnioj at jcrosoft.com  Mon Jul 30 08:09:48 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 14:09:48 +0200
Subject: [PATCH 1/1] gadget: fix Kconfig: move config under if
Message-ID: <1343650188-17578-1-git-send-email-plagnioj@jcrosoft.com>

so the submenu display correctly

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 drivers/usb/gadget/Kconfig |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 465121c..6935408 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -2,12 +2,12 @@ menuconfig USB_GADGET
 	depends on USB_HAVE_GADGET_DRIVER
 	bool "USB gadget support            "
 
+if USB_GADGET
+
 config USB_HAVE_GADGET_DRIVER
 	bool
 	default y if ARCH_IMX || ARCH_MXS || ARCH_AT91 || ARCH_PXA
 
-if USB_GADGET
-
 config USB_GADGET_DUALSPEED
 	bool
 
-- 
1.7.10.4



From christian.buettner at rafi.de  Mon Jul 30 09:58:52 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 30 Jul 2012 15:58:52 +0200
Subject: Antwort: Re: Re: Re: nor flash board init code
In-Reply-To: <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>	<OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
 <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>	<OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>
 <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>
Message-ID: <OFAAB844D8.44E75B11-ONC1257A4B.004C6D46-C1257A4B.004CCCC5@o0802.rafi.inhouse>

i always get the response:

m25p at m25p0: unrecognized JEDEC id ffffff

SPI Flah:MX25L8005MC-15G 
CPU: imx53

Here is my board init code:

//SPI + FLASH structs
const struct flash_platform_data tx53_flash = {
    .type       = "mx25l8005",
    .name       = "spi_flash",
};


//MX25L8005MC-15G
static const struct spi_board_info mx53_spi_board_info[] = {
        {
                .name = "m25p",
                .max_speed_hz = 30000000,
                .bus_num = 0,
                .chip_select = 0,
                .bits_per_word = 8,
                .mode = SPI_MODE_0,
                .platform_data = &tx53_flash,
        },
};

static struct spi_imx_master tx53_spi = {
                .num_chipselect = 1,
};



//PIN MUX:
MX53_PAD_EIM_D17__ECSPI1_MISO, //SPI MISO - EEPROM SO
MX53_PAD_EIM_D18__ECSPI1_MOSI, //SPI MOSI - EEPROM SI
MX53_PAD_EIM_D16__ECSPI1_SCLK, //SPI SCLK - EEPROM SCK
MX53_PAD_EIM_EB2__ECSPI1_SS0,  //SPI SS1 - EEPROM CS


//device init code:
 spi_register_board_info(mx53_spi_board_info,
                    ARRAY_SIZE(mx53_spi_board_info));

imx53_add_spi0(&tx53_spi);


Any ideas, whats wrong?

christian


Von:    Franck Jullien <franck.jullien at gmail.com>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  30.07.2012 10:33
Betreff:        Re: Re: Re: nor flash board init code



2012/7/30  <christian.buettner at rafi.de>:
> Whooosch and it worked!
>
> devinfo
> devices:
> ...
> `---- mem1
>      `---- 0x00000000-0xfffffffe: /dev/mem
> `---- i2c-imx2
> `---- imx_spi0
>      `---- m25p0
> `---- fec_imx0
>      `---- miidev0
> ...
>
> barebox:/ devinfo m25p0
> resources:
> driver: none
>
> no parameters available
> barebox:/
>
> But why is driver in devinfo = none?
>

It used to work. You need to find why it doesn't work anymore ;)

> christian
>
>
> Von:        Franck Jullien <franck.jullien at gmail.com>
> An:        christian.buettner at rafi.de,
> Kopie:        barebox at lists.infradead.org
> Datum:        30.07.2012 10:07
> Betreff:        Re: Re: nor flash board init code
> ________________________________
>
>
>
> Hi,
>
> 2012/7/30 <christian.buettner at rafi.de>
>>
>> Thanks for the code!
>>
>> Here is my approach:
>>
>> const struct flash_platform_data tx53_flash = {
>>     .type       = "mx25l8005",
>>     .name       = "spi_flash",
>> };
>>
>>
>> //MX25L8005MC-15G
>> static const struct spi_board_info mx53_spi_board_info[] = {
>>         {
>>                 .name = "mx25l8005",
>
>
> Here sould be the driver name: .name = "m25p",
>
>>
>>                 .max_speed_hz = 70000000,
>>                 .bus_num = 0,
>>                 .chip_select = 0,
>>                 .bits_per_word = 8,
>>                 .mode = SPI_MODE_0,
>>                 .platform_data = &tx53_flash,
>>         },
>> };
>>
>> static struct spi_imx_master tx53_spi = {
>>                 .num_chipselect = 1,
>> };
>>
>>
>> init_devices {
>>
>> ...
>>     spi_register_board_info(mx53_spi_board_info,
>>                     ARRAY_SIZE(mx53_spi_board_info));
>>
>>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 *
>> 1024,IORESOURCE_MEM,&mx53_spi_board_info);
>
> You have to add the SPI master device here. The m25p device will be
> probed automagically (AFAIR).
>
>
>>
>> ...
>> }
>>
>>
>> When the m25p80.c driver probes i get no spi instance:
>>
>> static int m25p_probe(struct device_d *dev) {
>>         struct spi_device *spi = (struct spi_device *)dev->type_data;
>>         const struct spi_device_id        *id = NULL;
>> ...
>> }
>>
>> struct spi_device *spi is always null
>>
>> Whats wrong here?
>>
>> christian
>>
>>
>>
>> Von:        Franck Jullien <franck.jullien at gmail.com>
>> An:        christian.buettner at rafi.de,
>> Kopie:        barebox at lists.infradead.org
>> Datum:        27.07.2012 13:33
>> Betreff:        Re: nor flash board init code
>> ________________________________
>>
>>
>>
>> 2012/7/25 <christian.buettner at rafi.de>
>> >
>> > hi all,
>> > is there any example board init code to load the mx25l8005 spi 
nor-flash
>> > through the imx53 (TX53 from KARO)?
>> > I want to use the m25p80 driver to read and write.
>> >
>> > christian
>> > _______________________________________________
>> > barebox mailing list
>> > barebox at lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/barebox
>> >
>>
>> Hi Christian,
>>
>> This is what I use with the Altera SPI controller + an SPI flash 
device:
>>
>>
>> 
http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153

>>
>> static struct spi_altera_master altera_spi_0_data = {
>>      .num_chipselect = 1,
>>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
>>      .databits = 8,      /* Data length of the EPCS flash controller */
>>      .speed = 20000000,  /* EPCS flash controller speed */
>> };
>>
>>
>> static struct flash_platform_data epcs_flash = {
>>      .name = "epcs",    /* Cdev name, optional */
>>      .type = "m25p40",  /* Device type, required for non JEDEC chips */
>> };
>>
>> static struct spi_board_info generic_spi_board_info[] = {
>>      {
>>            .name = "m25p",
>>            .max_speed_hz = 20000000,
>>            .bus_num = 0,
>>            .chip_select = 0,
>>            .bits_per_word = 8,
>>            .mode = SPI_MODE_0,
>>            .platform_data = &epcs_flash,
>>      }
>> };
>>
>> static int myboard_devices_init(void) {
>>
>> ...
>>
>> spi_register_board_info(myboard_spi_board_info,
>> ARRAY_SIZE(myboard_spi_board_info));
>>
>> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
>>                    IORESOURCE_MEM, &altera_spi_0_data);
>>
>> ...
>>
>> Franck.
>>
>
> Franck.
>

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From franck.jullien at gmail.com  Mon Jul 30 10:28:05 2012
From: franck.jullien at gmail.com (Franck Jullien)
Date: Mon, 30 Jul 2012 16:28:05 +0200
Subject: nor flash board init code
In-Reply-To: <OFAAB844D8.44E75B11-ONC1257A4B.004C6D46-C1257A4B.004CCCC5@o0802.rafi.inhouse>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>
 <OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
 <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>
 <OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>
 <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>
 <OFAAB844D8.44E75B11-ONC1257A4B.004C6D46-C1257A4B.004CCCC5@o0802.rafi.inhouse>
Message-ID: <CAJfOKBxJYVp2YBVQhvECFVag60fm4wXDO87Bk3jb=VYdqMuW3A@mail.gmail.com>

2012/7/30  <christian.buettner at rafi.de>:
> i always get the response:
>
> m25p at m25p0: unrecognized JEDEC id ffffff
>
> SPI Flah:MX25L8005MC-15G
> CPU: imx53
>
> Here is my board init code:
>
> //SPI + FLASH structs
> const struct flash_platform_data tx53_flash = {
>     .type       = "mx25l8005",
>     .name       = "spi_flash",
> };
>
>
> //MX25L8005MC-15G
> static const struct spi_board_info mx53_spi_board_info[] = {
>         {
>                 .name = "m25p",
>                 .max_speed_hz = 30000000,
>                 .bus_num = 0,
>                 .chip_select = 0,
>                 .bits_per_word = 8,
>                 .mode = SPI_MODE_0,
>                 .platform_data = &tx53_flash,
>         },
> };
>
> static struct spi_imx_master tx53_spi = {
>                 .num_chipselect = 1,
> };
>

I'm not familiar with the IMX spi but in the tx51 or ccxmx51 board
file one can read:

static struct spi_imx_master tx51_spi_0_data = {
	.chipselect = spi_0_cs,
	.num_chipselect = ARRAY_SIZE(spi_0_cs),
};

#define CCXMX51_ECSPI1_CS0	IMX_GPIO_NR(4, 24)
#define CCXMX51_ECSPI1_CS1	IMX_GPIO_NR(4, 25)

static int ecspi_0_cs[] = { CCXMX51_ECSPI1_CS0, CCXMX51_ECSPI1_CS1, };

static struct spi_imx_master ecspi_0_data = {
	.chipselect	= ecspi_0_cs,
	.num_chipselect	= ARRAY_SIZE(ecspi_0_cs),
};

Don't you need to set .chipselect ?


>
>
> //PIN MUX:
> MX53_PAD_EIM_D17__ECSPI1_MISO, //SPI MISO - EEPROM SO
> MX53_PAD_EIM_D18__ECSPI1_MOSI, //SPI MOSI - EEPROM SI
> MX53_PAD_EIM_D16__ECSPI1_SCLK, //SPI SCLK - EEPROM SCK
> MX53_PAD_EIM_EB2__ECSPI1_SS0,  //SPI SS1 - EEPROM CS
>
>
> //device init code:
>  spi_register_board_info(mx53_spi_board_info,
>                     ARRAY_SIZE(mx53_spi_board_info));
>
> imx53_add_spi0(&tx53_spi);
>
>
> Any ideas, whats wrong?
>
> christian
>
>
> Von:        Franck Jullien <franck.jullien at gmail.com>
> An:        christian.buettner at rafi.de,
> Kopie:        barebox at lists.infradead.org
> Datum:        30.07.2012 10:33
> Betreff:        Re: Re: Re: nor flash board init code
> ________________________________
>
>
>
> 2012/7/30  <christian.buettner at rafi.de>:
>> Whooosch and it worked!
>>
>> devinfo
>> devices:
>> ...
>> `---- mem1
>>      `---- 0x00000000-0xfffffffe: /dev/mem
>> `---- i2c-imx2
>> `---- imx_spi0
>>      `---- m25p0
>> `---- fec_imx0
>>      `---- miidev0
>> ...
>>
>> barebox:/ devinfo m25p0
>> resources:
>> driver: none
>>
>> no parameters available
>> barebox:/
>>
>> But why is driver in devinfo = none?
>>
>
> It used to work. You need to find why it doesn't work anymore ;)
>
>> christian
>>
>>
>> Von:        Franck Jullien <franck.jullien at gmail.com>
>> An:        christian.buettner at rafi.de,
>> Kopie:        barebox at lists.infradead.org
>> Datum:        30.07.2012 10:07
>> Betreff:        Re: Re: nor flash board init code
>> ________________________________
>>
>>
>>
>> Hi,
>>
>> 2012/7/30 <christian.buettner at rafi.de>
>>>
>>> Thanks for the code!
>>>
>>> Here is my approach:
>>>
>>> const struct flash_platform_data tx53_flash = {
>>>     .type       = "mx25l8005",
>>>     .name       = "spi_flash",
>>> };
>>>
>>>
>>> //MX25L8005MC-15G
>>> static const struct spi_board_info mx53_spi_board_info[] = {
>>>         {
>>>                 .name = "mx25l8005",
>>
>>
>> Here sould be the driver name: .name = "m25p",
>>
>>>
>>>                 .max_speed_hz = 70000000,
>>>                 .bus_num = 0,
>>>                 .chip_select = 0,
>>>                 .bits_per_word = 8,
>>>                 .mode = SPI_MODE_0,
>>>                 .platform_data = &tx53_flash,
>>>         },
>>> };
>>>
>>> static struct spi_imx_master tx53_spi = {
>>>                 .num_chipselect = 1,
>>> };
>>>
>>>
>>> init_devices {
>>>
>>> ...
>>>     spi_register_board_info(mx53_spi_board_info,
>>>                     ARRAY_SIZE(mx53_spi_board_info));
>>>
>>>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 *
>>> 1024,IORESOURCE_MEM,&mx53_spi_board_info);
>>
>> You have to add the SPI master device here. The m25p device will be
>> probed automagically (AFAIR).
>>
>>
>>>
>>> ...
>>> }
>>>
>>>
>>> When the m25p80.c driver probes i get no spi instance:
>>>
>>> static int m25p_probe(struct device_d *dev) {
>>>         struct spi_device *spi = (struct spi_device *)dev->type_data;
>>>         const struct spi_device_id        *id = NULL;
>>> ...
>>> }
>>>
>>> struct spi_device *spi is always null
>>>
>>> Whats wrong here?
>>>
>>> christian
>>>
>>>
>>>
>>> Von:        Franck Jullien <franck.jullien at gmail.com>
>>> An:        christian.buettner at rafi.de,
>>> Kopie:        barebox at lists.infradead.org
>>> Datum:        27.07.2012 13:33
>>> Betreff:        Re: nor flash board init code
>>> ________________________________
>>>
>>>
>>>
>>> 2012/7/25 <christian.buettner at rafi.de>
>>> >
>>> > hi all,
>>> > is there any example board init code to load the mx25l8005 spi
>>> > nor-flash
>>> > through the imx53 (TX53 from KARO)?
>>> > I want to use the m25p80 driver to read and write.
>>> >
>>> > christian
>>> > _______________________________________________
>>> > barebox mailing list
>>> > barebox at lists.infradead.org
>>> > http://lists.infradead.org/mailman/listinfo/barebox
>>> >
>>>
>>> Hi Christian,
>>>
>>> This is what I use with the Altera SPI controller + an SPI flash device:
>>>
>>>
>>>
>>> http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153
>>>
>>> static struct spi_altera_master altera_spi_0_data = {
>>>      .num_chipselect = 1,
>>>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
>>>      .databits = 8,      /* Data length of the EPCS flash controller */
>>>      .speed = 20000000,  /* EPCS flash controller speed */
>>> };
>>>
>>>
>>> static struct flash_platform_data epcs_flash = {
>>>      .name = "epcs",    /* Cdev name, optional */
>>>      .type = "m25p40",  /* Device type, required for non JEDEC chips */
>>> };
>>>
>>> static struct spi_board_info generic_spi_board_info[] = {
>>>      {
>>>            .name = "m25p",
>>>            .max_speed_hz = 20000000,
>>>            .bus_num = 0,
>>>            .chip_select = 0,
>>>            .bits_per_word = 8,
>>>            .mode = SPI_MODE_0,
>>>            .platform_data = &epcs_flash,
>>>      }
>>> };
>>>
>>> static int myboard_devices_init(void) {
>>>
>>> ...
>>>
>>> spi_register_board_info(myboard_spi_board_info,
>>> ARRAY_SIZE(myboard_spi_board_info));
>>>
>>> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
>>>                    IORESOURCE_MEM, &altera_spi_0_data);
>>>
>>> ...
>>>
>>> Franck.
>>>
>>
>> Franck.
>>
>

Do you have a scope ? This is the easiest way to debug SPI ;)


From thomas.petazzoni at free-electrons.com  Mon Jul 30 10:44:57 2012
From: thomas.petazzoni at free-electrons.com (Thomas Petazzoni)
Date: Mon, 30 Jul 2012 16:44:57 +0200
Subject: [PATCH 00/12 v3] Add Pre-Bootloader support
In-Reply-To: <201207301238.43600.jbe@pengutronix.de>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <201207301238.43600.jbe@pengutronix.de>
Message-ID: <20120730164457.6c7e5ea7@skate>

Le Mon, 30 Jul 2012 12:38:43 +0200,
Juergen Beisert <jbe at pengutronix.de> a ?crit :

> Jean-Christophe PLAGNIOL-VILLARD wrote:
> > [...]
> > Currently on the compressed image is implemented the boot really on current
> > lowlevel init support.
> 
> ^ Does this sentence makes any sense?
> 
> This patch set seems an important addition, so I think it needs a little bit 
> more of documentation. But wait...I know...nobody reads documentation...

I agree. I also very interested by this feature and it sounds a great
feature, but the patch set lacks a little of explanations on what it
does and how it works.

Best regards,

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com


From christian.buettner at rafi.de  Mon Jul 30 10:49:17 2012
From: christian.buettner at rafi.de (christian.buettner at rafi.de)
Date: Mon, 30 Jul 2012 16:49:17 +0200
Subject: Antwort: Re: Re: Re: Re: nor flash board init code
In-Reply-To: <CAJfOKBxJYVp2YBVQhvECFVag60fm4wXDO87Bk3jb=VYdqMuW3A@mail.gmail.com>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>	<OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
 <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>	<OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>
 <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>	<OFAAB844D8.44E75B11-ONC1257A4B.004C6D46-C1257A4B.004CCCC5@o0802.rafi.inhouse>
 <CAJfOKBxJYVp2YBVQhvECFVag60fm4wXDO87Bk3jb=VYdqMuW3A@mail.gmail.com>
Message-ID: <OF6951600D.0E6BBF19-ONC1257A4B.0051402B-C1257A4B.00516AB3@o0802.rafi.inhouse>

ok tried it like this:

#define ECUv6_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
#define ECUv6_ECSPI1_CS1 IMX_GPIO_NR(3, 19)

//SPI + NOR FLASH
const struct flash_platform_data tx53_flash = {
    .type       = "mx25l8005",
    .name       = "spi_flash",
};


//MX25L8005MC-15G
static const struct spi_board_info mx53_spi_board_info[] = {
        {
                .name = "m25p",
                .max_speed_hz = 30000000,
                .bus_num = 0,
                .chip_select = 0,
                .bits_per_word = 8,
                .mode = SPI_MODE_0,
                .platform_data = &tx53_flash,
        },
};

static int ecspi_0_cs[] = { ECUv6_ECSPI1_CS0,ECUv6_ECSPI1_CS1 };


static struct spi_imx_master tx53_spi = {
                .chipselect = ecspi_0_cs,
                .num_chipselect = ARRAY_SIZE(ecspi_0_cs),
};


answer from spi eeprom is unknown: 
m25p at m25p0: unrecognized JEDEC id ffffff

Hasn't anyone used an SPI Flash with the imx53 yet?

christian



Von:    Franck Jullien <franck.jullien at gmail.com>
An:     christian.buettner at rafi.de, 
Kopie:  barebox at lists.infradead.org
Datum:  30.07.2012 16:28
Betreff:        Re: Re: Re: Re: nor flash board init code



2012/7/30  <christian.buettner at rafi.de>:
> i always get the response:
>
> m25p at m25p0: unrecognized JEDEC id ffffff
>
> SPI Flah:MX25L8005MC-15G
> CPU: imx53
>
> Here is my board init code:
>
> //SPI + FLASH structs
> const struct flash_platform_data tx53_flash = {
>     .type       = "mx25l8005",
>     .name       = "spi_flash",
> };
>
>
> //MX25L8005MC-15G
> static const struct spi_board_info mx53_spi_board_info[] = {
>         {
>                 .name = "m25p",
>                 .max_speed_hz = 30000000,
>                 .bus_num = 0,
>                 .chip_select = 0,
>                 .bits_per_word = 8,
>                 .mode = SPI_MODE_0,
>                 .platform_data = &tx53_flash,
>         },
> };
>
> static struct spi_imx_master tx53_spi = {
>                 .num_chipselect = 1,
> };
>

I'm not familiar with the IMX spi but in the tx51 or ccxmx51 board
file one can read:

static struct spi_imx_master tx51_spi_0_data = {
                 .chipselect = spi_0_cs,
                 .num_chipselect = ARRAY_SIZE(spi_0_cs),
};

#define CCXMX51_ECSPI1_CS0               IMX_GPIO_NR(4, 24)
#define CCXMX51_ECSPI1_CS1               IMX_GPIO_NR(4, 25)

static int ecspi_0_cs[] = { CCXMX51_ECSPI1_CS0, CCXMX51_ECSPI1_CS1, };

static struct spi_imx_master ecspi_0_data = {
                 .chipselect             = ecspi_0_cs,
                 .num_chipselect                 = ARRAY_SIZE(ecspi_0_cs),
};

Don't you need to set .chipselect ?


>
>
> //PIN MUX:
> MX53_PAD_EIM_D17__ECSPI1_MISO, //SPI MISO - EEPROM SO
> MX53_PAD_EIM_D18__ECSPI1_MOSI, //SPI MOSI - EEPROM SI
> MX53_PAD_EIM_D16__ECSPI1_SCLK, //SPI SCLK - EEPROM SCK
> MX53_PAD_EIM_EB2__ECSPI1_SS0,  //SPI SS1 - EEPROM CS
>
>
> //device init code:
>  spi_register_board_info(mx53_spi_board_info,
>                     ARRAY_SIZE(mx53_spi_board_info));
>
> imx53_add_spi0(&tx53_spi);
>
>
> Any ideas, whats wrong?
>
> christian
>
>
> Von:        Franck Jullien <franck.jullien at gmail.com>
> An:        christian.buettner at rafi.de,
> Kopie:        barebox at lists.infradead.org
> Datum:        30.07.2012 10:33
> Betreff:        Re: Re: Re: nor flash board init code
> ________________________________
>
>
>
> 2012/7/30  <christian.buettner at rafi.de>:
>> Whooosch and it worked!
>>
>> devinfo
>> devices:
>> ...
>> `---- mem1
>>      `---- 0x00000000-0xfffffffe: /dev/mem
>> `---- i2c-imx2
>> `---- imx_spi0
>>      `---- m25p0
>> `---- fec_imx0
>>      `---- miidev0
>> ...
>>
>> barebox:/ devinfo m25p0
>> resources:
>> driver: none
>>
>> no parameters available
>> barebox:/
>>
>> But why is driver in devinfo = none?
>>
>
> It used to work. You need to find why it doesn't work anymore ;)
>
>> christian
>>
>>
>> Von:        Franck Jullien <franck.jullien at gmail.com>
>> An:        christian.buettner at rafi.de,
>> Kopie:        barebox at lists.infradead.org
>> Datum:        30.07.2012 10:07
>> Betreff:        Re: Re: nor flash board init code
>> ________________________________
>>
>>
>>
>> Hi,
>>
>> 2012/7/30 <christian.buettner at rafi.de>
>>>
>>> Thanks for the code!
>>>
>>> Here is my approach:
>>>
>>> const struct flash_platform_data tx53_flash = {
>>>     .type       = "mx25l8005",
>>>     .name       = "spi_flash",
>>> };
>>>
>>>
>>> //MX25L8005MC-15G
>>> static const struct spi_board_info mx53_spi_board_info[] = {
>>>         {
>>>                 .name = "mx25l8005",
>>
>>
>> Here sould be the driver name: .name = "m25p",
>>
>>>
>>>                 .max_speed_hz = 70000000,
>>>                 .bus_num = 0,
>>>                 .chip_select = 0,
>>>                 .bits_per_word = 8,
>>>                 .mode = SPI_MODE_0,
>>>                 .platform_data = &tx53_flash,
>>>         },
>>> };
>>>
>>> static struct spi_imx_master tx53_spi = {
>>>                 .num_chipselect = 1,
>>> };
>>>
>>>
>>> init_devices {
>>>
>>> ...
>>>     spi_register_board_info(mx53_spi_board_info,
>>>                     ARRAY_SIZE(mx53_spi_board_info));
>>>
>>>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 *
>>> 1024,IORESOURCE_MEM,&mx53_spi_board_info);
>>
>> You have to add the SPI master device here. The m25p device will be
>> probed automagically (AFAIR).
>>
>>
>>>
>>> ...
>>> }
>>>
>>>
>>> When the m25p80.c driver probes i get no spi instance:
>>>
>>> static int m25p_probe(struct device_d *dev) {
>>>         struct spi_device *spi = (struct spi_device *)dev->type_data;
>>>         const struct spi_device_id        *id = NULL;
>>> ...
>>> }
>>>
>>> struct spi_device *spi is always null
>>>
>>> Whats wrong here?
>>>
>>> christian
>>>
>>>
>>>
>>> Von:        Franck Jullien <franck.jullien at gmail.com>
>>> An:        christian.buettner at rafi.de,
>>> Kopie:        barebox at lists.infradead.org
>>> Datum:        27.07.2012 13:33
>>> Betreff:        Re: nor flash board init code
>>> ________________________________
>>>
>>>
>>>
>>> 2012/7/25 <christian.buettner at rafi.de>
>>> >
>>> > hi all,
>>> > is there any example board init code to load the mx25l8005 spi
>>> > nor-flash
>>> > through the imx53 (TX53 from KARO)?
>>> > I want to use the m25p80 driver to read and write.
>>> >
>>> > christian
>>> > _______________________________________________
>>> > barebox mailing list
>>> > barebox at lists.infradead.org
>>> > http://lists.infradead.org/mailman/listinfo/barebox
>>> >
>>>
>>> Hi Christian,
>>>
>>> This is what I use with the Altera SPI controller + an SPI flash 
device:
>>>
>>>
>>>
>>> 
http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153

>>>
>>> static struct spi_altera_master altera_spi_0_data = {
>>>      .num_chipselect = 1,
>>>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
>>>      .databits = 8,      /* Data length of the EPCS flash controller 
*/
>>>      .speed = 20000000,  /* EPCS flash controller speed */
>>> };
>>>
>>>
>>> static struct flash_platform_data epcs_flash = {
>>>      .name = "epcs",    /* Cdev name, optional */
>>>      .type = "m25p40",  /* Device type, required for non JEDEC chips 
*/
>>> };
>>>
>>> static struct spi_board_info generic_spi_board_info[] = {
>>>      {
>>>            .name = "m25p",
>>>            .max_speed_hz = 20000000,
>>>            .bus_num = 0,
>>>            .chip_select = 0,
>>>            .bits_per_word = 8,
>>>            .mode = SPI_MODE_0,
>>>            .platform_data = &epcs_flash,
>>>      }
>>> };
>>>
>>> static int myboard_devices_init(void) {
>>>
>>> ...
>>>
>>> spi_register_board_info(myboard_spi_board_info,
>>> ARRAY_SIZE(myboard_spi_board_info));
>>>
>>> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
>>>                    IORESOURCE_MEM, &altera_spi_0_data);
>>>
>>> ...
>>>
>>> Franck.
>>>
>>
>> Franck.
>>
>

Do you have a scope ? This is the easiest way to debug SPI ;)

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From plagnioj at jcrosoft.com  Mon Jul 30 10:59:16 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 16:59:16 +0200
Subject: [ANNOUNCE] Barebox Logo
Message-ID: <20120730145916.GE19759@game.jcrosoft.org>

Hi everyone,

	Today is a special day, Sascha and I are plese to
	we welcome our new moscot via it's logo

	This logo is designed by our designer Valery VILLARD

Best Regards,
J.
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From plagnioj at jcrosoft.com  Mon Jul 30 11:02:31 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 17:02:31 +0200
Subject: [PATCH 00/12 v3] Add Pre-Bootloader support
In-Reply-To: <20120730164457.6c7e5ea7@skate>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <201207301238.43600.jbe@pengutronix.de>
 <20120730164457.6c7e5ea7@skate>
Message-ID: <20120730150231.GF19759@game.jcrosoft.org>

On 16:44 Mon 30 Jul     , Thomas Petazzoni wrote:
> Le Mon, 30 Jul 2012 12:38:43 +0200,
> Juergen Beisert <jbe at pengutronix.de> a ?crit :
> 
> > Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > [...]
> > > Currently on the compressed image is implemented the boot really on current
> > > lowlevel init support.
> > 
> > ^ Does this sentence makes any sense?
> > 
> > This patch set seems an important addition, so I think it needs a little bit 
> > more of documentation. But wait...I know...nobody reads documentation...
> 
> I agree. I also very interested by this feature and it sounds a great
> feature, but the patch set lacks a little of explanations on what it
> does and how it works.
simple does like the ARM linux kernel

I've not time to do the DoC those days

If someone have time please do so

Best Regards,
J.


From eric at eukrea.com  Mon Jul 30 11:05:48 2012
From: eric at eukrea.com (Eric =?ISO-8859-1?B?QuluYXJk?=)
Date: Mon, 30 Jul 2012 17:05:48 +0200
Subject: [ANNOUNCE] Barebox Logo
In-Reply-To: <20120730145916.GE19759@game.jcrosoft.org>
References: <20120730145916.GE19759@game.jcrosoft.org>
Message-ID: <20120730170548.00b874d4@eb-e6520>

Hi,

Le Mon, 30 Jul 2012 16:59:16 +0200,
Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com> a ?crit :
> 	Today is a special day, Sascha and I are plese to
> 	we welcome our new moscot via it's logo
> 
> 	This logo is designed by our designer Valery VILLARD
> 
where can we see it ?

Eric


From plagnioj at jcrosoft.com  Mon Jul 30 11:38:27 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 17:38:27 +0200
Subject: [ANNOUNCE] Barebox Logo
In-Reply-To: <20120730170548.00b874d4@eb-e6520>
References: <20120730145916.GE19759@game.jcrosoft.org>
 <20120730170548.00b874d4@eb-e6520>
Message-ID: <20120730153827.GG19759@game.jcrosoft.org>

On 17:05 Mon 30 Jul     , Eric B?nard wrote:
> Hi,
> 
> Le Mon, 30 Jul 2012 16:59:16 +0200,
> Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com> a ?crit :
> > 	Today is a special day, Sascha and I are plese to
> > 	we welcome our new moscot via it's logo
> > 
> > 	This logo is designed by our designer Valery VILLARD
> > 
> where can we see it ?
Attached to the e-mail and Sascha will upload on the webserver

Best Regards,
J.
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From plagnioj at jcrosoft.com  Mon Jul 30 11:44:45 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 Jul 2012 17:44:45 +0200
Subject: [ANNOUNCE] Barebox Logo
In-Reply-To: <20120730145916.GE19759@game.jcrosoft.org>
References: <20120730145916.GE19759@game.jcrosoft.org>
Message-ID: <20120730154445.GH19759@game.jcrosoft.org>

Hi,

	The missing logo

Best Regards,
J.
On 16:59 Mon 30 Jul     , Jean-Christophe PLAGNIOL-VILLARD wrote:
> Hi everyone,
> 
> 	Today is a special day, Sascha and I are plese to
> 	we welcome our new moscot via it's logo
> 
> 	This logo is designed by our designer Valery VILLARD
> 
> Best Regards,
> J.



> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

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From u.kleine-koenig at pengutronix.de  Mon Jul 30 11:45:25 2012
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 30 Jul 2012 17:45:25 +0200
Subject: [ANNOUNCE] Barebox Logo
In-Reply-To: <20120730153827.GG19759@game.jcrosoft.org>
References: <20120730145916.GE19759@game.jcrosoft.org>
 <20120730170548.00b874d4@eb-e6520>
 <20120730153827.GG19759@game.jcrosoft.org>
Message-ID: <20120730154525.GP1528@pengutronix.de>

On Mon, Jul 30, 2012 at 05:38:27PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 17:05 Mon 30 Jul     , Eric B?nard wrote:
> > Hi,
> > 
> > Le Mon, 30 Jul 2012 16:59:16 +0200,
> > Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com> a ?crit :
> > > 	Today is a special day, Sascha and I are plese to
> > > 	we welcome our new moscot via it's logo
> > > 
> > > 	This logo is designed by our designer Valery VILLARD
> > > 
> > where can we see it ?
> Attached to the e-mail and Sascha will upload on the webserver
I don't see an attachment to neither this mail nor the annoucement. And
I guess it's not just me but at least also Eric who has this problem.

Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From jbe at pengutronix.de  Mon Jul 30 11:51:48 2012
From: jbe at pengutronix.de (Juergen Beisert)
Date: Mon, 30 Jul 2012 17:51:48 +0200
Subject: [PATCH 00/12 v3] Add Pre-Bootloader support
In-Reply-To: <20120730150231.GF19759@game.jcrosoft.org>
References: <20120730100022.GD19759@game.jcrosoft.org>
 <20120730164457.6c7e5ea7@skate> <20120730150231.GF19759@game.jcrosoft.org>
Message-ID: <201207301751.48196.jbe@pengutronix.de>

Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 16:44 Mon 30 Jul     , Thomas Petazzoni wrote:
> > Le Mon, 30 Jul 2012 12:38:43 +0200,
> >
> > Juergen Beisert <jbe at pengutronix.de> a ?crit :
> > > Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > [...]
> > > > Currently on the compressed image is implemented the boot really on
> > > > current lowlevel init support.
> > >
> > > ^ Does this sentence makes any sense?
> > >
> > > This patch set seems an important addition, so I think it needs a
> > > little bit more of documentation. But wait...I know...nobody reads
> > > documentation...
> >
> > I agree. I also very interested by this feature and it sounds a great
> > feature, but the patch set lacks a little of explanations on what it
> > does and how it works.
>
> simple does like the ARM linux kernel
>
> I've not time to do the DoC those days

e: lame excuse
d: faule Ausrede
f: mauvaise excuse

;)

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |


From igt1972 at gmail.com  Mon Jul 30 11:56:27 2012
From: igt1972 at gmail.com (Igor Trevisan)
Date: Mon, 30 Jul 2012 17:56:27 +0200
Subject: [ANNOUNCE] Barebox Logo
In-Reply-To: <20120730154525.GP1528@pengutronix.de>
References: <20120730145916.GE19759@game.jcrosoft.org>
 <20120730170548.00b874d4@eb-e6520>
 <20120730153827.GG19759@game.jcrosoft.org>
 <20120730154525.GP1528@pengutronix.de>
Message-ID: <CALQ+5admPYu-AZ8NN9dHm=pNEx=eYxKgB3Dy6BdjE9TGn+Xv-w@mail.gmail.com>

> I don't see an attachment to neither this mail nor the annoucement. And
> I guess it's not just me but at least also Eric who has this problem.
>

I think Jean-Christophe solved the problem...
I could see the logo attached to his last email.
Anyway...
Nice bootloader... nice Logo! :-)
I.

-- 
"Don't find fault, find a remedy."
(Henry Ford)


From s.hauer at pengutronix.de  Mon Jul 30 13:05:37 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 30 Jul 2012 19:05:37 +0200
Subject: Antwort: Re: Re: Re: Re: nor flash board init code
In-Reply-To: <OF6951600D.0E6BBF19-ONC1257A4B.0051402B-C1257A4B.00516AB3@o0802.rafi.inhouse>
References: <OFEAC6280E.37553221-ONC1257A46.004F6310-C1257A46.004FD422@o0802.rafi.inhouse>
 <CAJfOKBzrkLQBtFWFJ7AbVgiud_EwMA+XEY8BWRgV73iAkOZH-Q@mail.gmail.com>
 <OF4FD5BF60.200AA89F-ONC1257A4B.002BAA8E-C1257A4B.002C07FC@o0802.rafi.inhouse>
 <CAJfOKBxTC9xYq4q1dnoXaZG-46ZmT=BaJtvEQTtWFtYhQ9qZMw@mail.gmail.com>
 <OF74138D54.DAC25BC1-ONC1257A4B.002D3B44-C1257A4B.002D6334@o0802.rafi.inhouse>
 <CAJfOKBzv+2ky0xcD_La=g4F8Zq9nFsSZQ6JEZ5506Zw5Sp0w3w@mail.gmail.com>
 <OFAAB844D8.44E75B11-ONC1257A4B.004C6D46-C1257A4B.004CCCC5@o0802.rafi.inhouse>
 <CAJfOKBxJYVp2YBVQhvECFVag60fm4wXDO87Bk3jb=VYdqMuW3A@mail.gmail.com>
 <OF6951600D.0E6BBF19-ONC1257A4B.0051402B-C1257A4B.00516AB3@o0802.rafi.inhouse>
Message-ID: <20120730170537.GV30009@pengutronix.de>

Hi Christian,

Please stop top-posting on Mailing lists.

Sascha

On Mon, Jul 30, 2012 at 04:49:17PM +0200, christian.buettner at rafi.de wrote:
> ok tried it like this:
> 
> #define ECUv6_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
> #define ECUv6_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
> 
> //SPI + NOR FLASH
> const struct flash_platform_data tx53_flash = {
>     .type       = "mx25l8005",
>     .name       = "spi_flash",
> };
> 
> 
> //MX25L8005MC-15G
> static const struct spi_board_info mx53_spi_board_info[] = {
>         {
>                 .name = "m25p",
>                 .max_speed_hz = 30000000,
>                 .bus_num = 0,
>                 .chip_select = 0,
>                 .bits_per_word = 8,
>                 .mode = SPI_MODE_0,
>                 .platform_data = &tx53_flash,
>         },
> };
> 
> static int ecspi_0_cs[] = { ECUv6_ECSPI1_CS0,ECUv6_ECSPI1_CS1 };
> 
> 
> static struct spi_imx_master tx53_spi = {
>                 .chipselect = ecspi_0_cs,
>                 .num_chipselect = ARRAY_SIZE(ecspi_0_cs),
> };
> 
> 
> answer from spi eeprom is unknown: 
> m25p at m25p0: unrecognized JEDEC id ffffff
> 
> Hasn't anyone used an SPI Flash with the imx53 yet?
> 
> christian
> 
> 
> 
> Von:    Franck Jullien <franck.jullien at gmail.com>
> An:     christian.buettner at rafi.de, 
> Kopie:  barebox at lists.infradead.org
> Datum:  30.07.2012 16:28
> Betreff:        Re: Re: Re: Re: nor flash board init code
> 
> 
> 
> 2012/7/30  <christian.buettner at rafi.de>:
> > i always get the response:
> >
> > m25p at m25p0: unrecognized JEDEC id ffffff
> >
> > SPI Flah:MX25L8005MC-15G
> > CPU: imx53
> >
> > Here is my board init code:
> >
> > //SPI + FLASH structs
> > const struct flash_platform_data tx53_flash = {
> >     .type       = "mx25l8005",
> >     .name       = "spi_flash",
> > };
> >
> >
> > //MX25L8005MC-15G
> > static const struct spi_board_info mx53_spi_board_info[] = {
> >         {
> >                 .name = "m25p",
> >                 .max_speed_hz = 30000000,
> >                 .bus_num = 0,
> >                 .chip_select = 0,
> >                 .bits_per_word = 8,
> >                 .mode = SPI_MODE_0,
> >                 .platform_data = &tx53_flash,
> >         },
> > };
> >
> > static struct spi_imx_master tx53_spi = {
> >                 .num_chipselect = 1,
> > };
> >
> 
> I'm not familiar with the IMX spi but in the tx51 or ccxmx51 board
> file one can read:
> 
> static struct spi_imx_master tx51_spi_0_data = {
>                  .chipselect = spi_0_cs,
>                  .num_chipselect = ARRAY_SIZE(spi_0_cs),
> };
> 
> #define CCXMX51_ECSPI1_CS0               IMX_GPIO_NR(4, 24)
> #define CCXMX51_ECSPI1_CS1               IMX_GPIO_NR(4, 25)
> 
> static int ecspi_0_cs[] = { CCXMX51_ECSPI1_CS0, CCXMX51_ECSPI1_CS1, };
> 
> static struct spi_imx_master ecspi_0_data = {
>                  .chipselect             = ecspi_0_cs,
>                  .num_chipselect                 = ARRAY_SIZE(ecspi_0_cs),
> };
> 
> Don't you need to set .chipselect ?
> 
> 
> >
> >
> > //PIN MUX:
> > MX53_PAD_EIM_D17__ECSPI1_MISO, //SPI MISO - EEPROM SO
> > MX53_PAD_EIM_D18__ECSPI1_MOSI, //SPI MOSI - EEPROM SI
> > MX53_PAD_EIM_D16__ECSPI1_SCLK, //SPI SCLK - EEPROM SCK
> > MX53_PAD_EIM_EB2__ECSPI1_SS0,  //SPI SS1 - EEPROM CS
> >
> >
> > //device init code:
> >  spi_register_board_info(mx53_spi_board_info,
> >                     ARRAY_SIZE(mx53_spi_board_info));
> >
> > imx53_add_spi0(&tx53_spi);
> >
> >
> > Any ideas, whats wrong?
> >
> > christian
> >
> >
> > Von:        Franck Jullien <franck.jullien at gmail.com>
> > An:        christian.buettner at rafi.de,
> > Kopie:        barebox at lists.infradead.org
> > Datum:        30.07.2012 10:33
> > Betreff:        Re: Re: Re: nor flash board init code
> > ________________________________
> >
> >
> >
> > 2012/7/30  <christian.buettner at rafi.de>:
> >> Whooosch and it worked!
> >>
> >> devinfo
> >> devices:
> >> ...
> >> `---- mem1
> >>      `---- 0x00000000-0xfffffffe: /dev/mem
> >> `---- i2c-imx2
> >> `---- imx_spi0
> >>      `---- m25p0
> >> `---- fec_imx0
> >>      `---- miidev0
> >> ...
> >>
> >> barebox:/ devinfo m25p0
> >> resources:
> >> driver: none
> >>
> >> no parameters available
> >> barebox:/
> >>
> >> But why is driver in devinfo = none?
> >>
> >
> > It used to work. You need to find why it doesn't work anymore ;)
> >
> >> christian
> >>
> >>
> >> Von:        Franck Jullien <franck.jullien at gmail.com>
> >> An:        christian.buettner at rafi.de,
> >> Kopie:        barebox at lists.infradead.org
> >> Datum:        30.07.2012 10:07
> >> Betreff:        Re: Re: nor flash board init code
> >> ________________________________
> >>
> >>
> >>
> >> Hi,
> >>
> >> 2012/7/30 <christian.buettner at rafi.de>
> >>>
> >>> Thanks for the code!
> >>>
> >>> Here is my approach:
> >>>
> >>> const struct flash_platform_data tx53_flash = {
> >>>     .type       = "mx25l8005",
> >>>     .name       = "spi_flash",
> >>> };
> >>>
> >>>
> >>> //MX25L8005MC-15G
> >>> static const struct spi_board_info mx53_spi_board_info[] = {
> >>>         {
> >>>                 .name = "mx25l8005",
> >>
> >>
> >> Here sould be the driver name: .name = "m25p",
> >>
> >>>
> >>>                 .max_speed_hz = 70000000,
> >>>                 .bus_num = 0,
> >>>                 .chip_select = 0,
> >>>                 .bits_per_word = 8,
> >>>                 .mode = SPI_MODE_0,
> >>>                 .platform_data = &tx53_flash,
> >>>         },
> >>> };
> >>>
> >>> static struct spi_imx_master tx53_spi = {
> >>>                 .num_chipselect = 1,
> >>> };
> >>>
> >>>
> >>> init_devices {
> >>>
> >>> ...
> >>>     spi_register_board_info(mx53_spi_board_info,
> >>>                     ARRAY_SIZE(mx53_spi_board_info));
> >>>
> >>>     add_generic_device("m25p",-1,"m25p",MX53_ECSPI1_BASE_ADDR,64 *
> >>> 1024,IORESOURCE_MEM,&mx53_spi_board_info);
> >>
> >> You have to add the SPI master device here. The m25p device will be
> >> probed automagically (AFAIR).
> >>
> >>
> >>>
> >>> ...
> >>> }
> >>>
> >>>
> >>> When the m25p80.c driver probes i get no spi instance:
> >>>
> >>> static int m25p_probe(struct device_d *dev) {
> >>>         struct spi_device *spi = (struct spi_device *)dev->type_data;
> >>>         const struct spi_device_id        *id = NULL;
> >>> ...
> >>> }
> >>>
> >>> struct spi_device *spi is always null
> >>>
> >>> Whats wrong here?
> >>>
> >>> christian
> >>>
> >>>
> >>>
> >>> Von:        Franck Jullien <franck.jullien at gmail.com>
> >>> An:        christian.buettner at rafi.de,
> >>> Kopie:        barebox at lists.infradead.org
> >>> Datum:        27.07.2012 13:33
> >>> Betreff:        Re: nor flash board init code
> >>> ________________________________
> >>>
> >>>
> >>>
> >>> 2012/7/25 <christian.buettner at rafi.de>
> >>> >
> >>> > hi all,
> >>> > is there any example board init code to load the mx25l8005 spi
> >>> > nor-flash
> >>> > through the imx53 (TX53 from KARO)?
> >>> > I want to use the m25p80 driver to read and write.
> >>> >
> >>> > christian
> >>> > _______________________________________________
> >>> > barebox mailing list
> >>> > barebox at lists.infradead.org
> >>> > http://lists.infradead.org/mailman/listinfo/barebox
> >>> >
> >>>
> >>> Hi Christian,
> >>>
> >>> This is what I use with the Altera SPI controller + an SPI flash 
> device:
> >>>
> >>>
> >>>
> >>> 
> http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153
> 
> >>>
> >>> static struct spi_altera_master altera_spi_0_data = {
> >>>      .num_chipselect = 1,
> >>>      .spi_mode = 0,      /* SPI mode of the EPCS flash controller */
> >>>      .databits = 8,      /* Data length of the EPCS flash controller 
> */
> >>>      .speed = 20000000,  /* EPCS flash controller speed */
> >>> };
> >>>
> >>>
> >>> static struct flash_platform_data epcs_flash = {
> >>>      .name = "epcs",    /* Cdev name, optional */
> >>>      .type = "m25p40",  /* Device type, required for non JEDEC chips 
> */
> >>> };
> >>>
> >>> static struct spi_board_info generic_spi_board_info[] = {
> >>>      {
> >>>            .name = "m25p",
> >>>            .max_speed_hz = 20000000,
> >>>            .bus_num = 0,
> >>>            .chip_select = 0,
> >>>            .bits_per_word = 8,
> >>>            .mode = SPI_MODE_0,
> >>>            .platform_data = &epcs_flash,
> >>>      }
> >>> };
> >>>
> >>> static int myboard_devices_init(void) {
> >>>
> >>> ...
> >>>
> >>> spi_register_board_info(myboard_spi_board_info,
> >>> ARRAY_SIZE(myboard_spi_board_info));
> >>>
> >>> add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
> >>>                    IORESOURCE_MEM, &altera_spi_0_data);
> >>>
> >>> ...
> >>>
> >>> Franck.
> >>>
> >>
> >> Franck.
> >>
> >
> 
> Do you have a scope ? This is the easiest way to debug SPI ;)
> 

> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From marek.belisko at gmail.com  Mon Jul 30 15:38:58 2012
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 30 Jul 2012 21:38:58 +0200
Subject: [ANNOUNCE] Barebox Logo
In-Reply-To: <20120730154445.GH19759@game.jcrosoft.org>
References: <20120730145916.GE19759@game.jcrosoft.org>
 <20120730154445.GH19759@game.jcrosoft.org>
Message-ID: <CAAfyv34R2BZgVUhKPe9xmP-=7u9gcnMX9DF5i6FMygqfGHD6Qg@mail.gmail.com>

On Mon, Jul 30, 2012 at 5:44 PM, Jean-Christophe PLAGNIOL-VILLARD
<plagnioj at jcrosoft.com> wrote:
> Hi,
>
>         The missing logo
It remains me something... Wait isn't it? :)
http://images.apple.com/osx/images/overview_hero1_title.png
>
> Best Regards,
> J.
> On 16:59 Mon 30 Jul     , Jean-Christophe PLAGNIOL-VILLARD wrote:
>> Hi everyone,
>>
>>       Today is a special day, Sascha and I are plese to
>>       we welcome our new moscot via it's logo
>>
>>       This logo is designed by our designer Valery VILLARD
>>
>> Best Regards,
>> J.
>
>
>
>> _______________________________________________
>> barebox mailing list
>> barebox at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox
>
>
> -----BEGIN PGP SIGNATURE-----
> Version: GnuPG v1.4.9 (GNU/Linux)
>
> iQIcBAEBAgAGBQJQFqvtAAoJEOrjwV5ZMRf2IA4P/RjWKTNndRDJoBFmku/bPQ82
> j6WvRwVY0DDDbquuV81JNqHjWpRnQYVlvUv5DHWdjEAxlc65yODgfuYPFV0UE+2l
> 86BUDq2MfPK2McAJZWejtMrI2vIDS3tyUEQshXfqi7o7Tf8mHS1VWnVoi0FxJSij
> pGeU6TUIi80rrNjC7FyNPbXWVXpxErRUit8VAEtNnPqbBakpFs7vlmobArO0GyqW
> xOiWfkHdWPnTt0uwpreSVXgfAsLw0d9AI5soyuTayq4dtIU/p0tLn7Peq6IpsfeW
> sQJvxJspjepqINoSxHP0bY83geeRaY5Ei/6xdgTNjW5nnQNK7Cc1vLW+slY3Anha
> pP9Ln7LeIxeXTgPPQSg5UlVNh5+WIRRuvrUznz0876S4+7yxk8CwVVSVziR4RMZ/
> aMFpxJ0S8EM3I32VIBEFvPJF5IppHw8gpLXgEaApWU1ldAB+qzwxLGgtxphKfGkt
> iQlEV3bTIXL5+dC36dTj3XPscPC6gNXIvYukLRj0wDRuflUmjUMevJm19LsmtdIM
> F4olbCOZiQWoyjNnk8V2oj3RQm8ZWVWNP0q2WDVVN0lSO/0BJRP6Nxc8kOJavQBI
> 7vJLMX2UJ3z1MGkSZ1zRZBWTuoc3Lv+8GeLMt8/e0PpYk+I7R8nXSW93tsZfIy+I
> 4lMrb7vXZTrkJNnuavW2
> =G7/R
> -----END PGP SIGNATURE-----
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>

mbe

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com


From mailinglists at erwinrol.com  Mon Jul 30 18:36:26 2012
From: mailinglists at erwinrol.com (Erwin Rol)
Date: Tue, 31 Jul 2012 00:36:26 +0200
Subject: x86 weirdness
Message-ID: <50170C6A.2000101@erwinrol.com>

Hallo,

after I had successfully "ported" barebox to about 5 different embedded 
x86 (mostly N270 and Z510 Atom boards) I ran into problems with a 
Celeron SU2300 CPU based board. After a lot of trail and error, which 
included the implementation of a BIOS based console cause the board does 
not have a RS232 port, it looked like the global variables were not what 
I expected them to be, namely zero.

So in arch/x86/boot/main_entry.c i changed to following;

/**
  * Called plainly from assembler that switches from real to flat mode
  *
  * @note The C environment isn't initialized yet
  */
void uboot_entry(void)
{
#if 0
         /* clear the BSS first */
         memset(__bss_start, 0x00, __bss_stop - __bss_start);
#else
         unsigned char* ptr;
         for (ptr = __bss_start; ptr < __bss_stop; ptr++)
                 *ptr = 0x00;
#endif


         start_barebox();
}


After doing that it works. I have not yet looked into the resulting asm 
to find the differences, but could someone have an explanation for why 
the memset doesn't work and the simple loop does work?

- Erwin








From mailinglists at erwinrol.com  Tue Jul 31 06:49:29 2012
From: mailinglists at erwinrol.com (Erwin Rol)
Date: Tue, 31 Jul 2012 12:49:29 +0200
Subject: x86 weirdness
In-Reply-To: <50170C6A.2000101@erwinrol.com>
References: <50170C6A.2000101@erwinrol.com>
Message-ID: <5017B839.7070806@erwinrol.com>

Hey x86-asm-experts,

On 31-7-2012 0:36, Erwin Rol wrote:
> Hallo,
>
> after I had successfully "ported" barebox to about 5 different embedded
> x86 (mostly N270 and Z510 Atom boards) I ran into problems with a
> Celeron SU2300 CPU based board. After a lot of trail and error, which
> included the implementation of a BIOS based console cause the board does
> not have a RS232 port, it looked like the global variables were not what
> I expected them to be, namely zero.
>
> So in arch/x86/boot/main_entry.c i changed to following;
>
> /**
>    * Called plainly from assembler that switches from real to flat mode
>    *
>    * @note The C environment isn't initialized yet
>    */
> void uboot_entry(void)
> {
> #if 0
>           /* clear the BSS first */
>           memset(__bss_start, 0x00, __bss_stop - __bss_start);
> #else
>           unsigned char* ptr;
>           for (ptr = __bss_start; ptr < __bss_stop; ptr++)
>                   *ptr = 0x00;
> #endif
>
>
>           start_barebox();
> }
>
>
> After doing that it works. I have not yet looked into the resulting asm
> to find the differences, but could someone have an explanation for why
> the memset doesn't work and the simple loop does work?

So when I use the memset code the asm looks like this below. As you can 
see the memset gets its 3 parameters from the stack (see comments below 
in the asm src). But when you look at the location when memset is called 
it looks like the caller tries to pass the parameters in registers. 
After looking into the Makefile I noticed the arch/x86/boot/* sources 
get compiled with -mregparm=3, but the other sources use normal calling 
convention. This means code from arch/x86/boot/* can not call any other 
barebox functions when they are not of type void f(void). The file 
arch/x86/boot/regs.c also calls memset but it seems the compiler notices 
that regs.c is 16bit code and so it inlines a 16bit memset version (I at 
least don't see a call function).

Is there any GCC or LD magic we can use to prevent error like this? 
Wouldn't it be better to _not_ change the calling convention in the 
Makefile, but mark the functions that need it with __attribute__ ?

00023e98 <in_pm32>:
    23e98:       8e d9                   mov    %ecx,%ds
    23e9a:       8e c1                   mov    %ecx,%es
    23e9c:       8e e1                   mov    %ecx,%fs
    23e9e:       8e e9                   mov    %ecx,%gs
    23ea0:       8e d1                   mov    %ecx,%ss
    23ea2:       bc c8 f8 03 00          mov    $0x3f8c8,%esp
    23ea7:       0f 00 df                ltr    %di
    23eaa:       31 c9                   xor    %ecx,%ecx
    23eac:       31 d2                   xor    %edx,%edx
    23eae:       31 db                   xor    %ebx,%ebx
    23eb0:       31 ed                   xor    %ebp,%ebp
    23eb2:       31 ff                   xor    %edi,%edi
    23eb4:       0f 00 d1                lldt   %cx
    23eb7:       e9 00 00 00 00          jmp    23ebc <uboot_entry>
00023ebc <uboot_entry>:
// calculate (3rd parameter) size and put it in %ecx
    23ebc:       b9 c8 78 03 00          mov    $0x378c8,%ecx
    23ec1:       81 e9 70 a2 02 00       sub    $0x2a270,%ecx
// clear %edx (2nd paremeter)
    23ec7:       31 d2                   xor    %edx,%edx
// start address in %eax (1st parameter)
    23ec9:       b8 70 a2 02 00          mov    $0x2a270,%eax
    23ece:       e8 e6 0b ff ff          call   14ab9 <memset>
    23ed3:       e9 4c a4 fe ff          jmp    e324 <start_barebox>

00014ab9 <memset>:
    14ab9:       55                      push   %ebp
    14aba:       89 e5                   mov    %esp,%ebp
    14abc:       53                      push   %ebx
// get parameter 1 (dst address)
    14abd:       8b 45 08                mov    0x8(%ebp),%eax	
// get parameter 2 (src byte to fill)
    14ac0:       8b 5d 0c                mov    0xc(%ebp),%ebx
// get parameter 3 (size)
    14ac3:       8b 4d 10                mov    0x10(%ebp),%ecx
    14ac6:       31 d2                   xor    %edx,%edx
    14ac8:       eb 04                   jmp    14ace <memset+0x15>
    14aca:       88 1c 10                mov    %bl,(%eax,%edx,1)
    14acd:       42                      inc    %edx
    14ace:       39 ca                   cmp    %ecx,%edx
    14ad0:       75 f8                   jne    14aca <memset+0x11>
    14ad2:       5b                      pop    %ebx
    14ad3:       5d                      pop    %ebp
    14ad4:       c3                      ret

















From noreply+6hobwy at twoomail.com  Tue Jul 31 08:22:15 2012
From: noreply+6hobwy at twoomail.com (=?UTF-8?B?TmF0YXJhaiB2aWEgVHdvbw==?=)
Date: Tue, 31 Jul 2012 12:22:15 +0000
Subject: =?UTF-8?B?TmF0YXJhaiBhZGRlZCB5b3UgYXMgYSBjb250YWN0IG9uIFR3b28gYW5kIHdhbnRzIHRvIGNvbm5lY3Q=?=
Message-ID: <FD.32.05513.7FDC7105@mail03>

I've just found a fun way to meet people online: twoo.com.
----------------------------------------------------------------

Hi, Barebox
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----------------------------------------------------------------
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-------------- next part --------------
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From s.hauer at pengutronix.de  Tue Jul 31 09:13:19 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 15:13:19 +0200
Subject: x86 weirdness
In-Reply-To: <5017B839.7070806@erwinrol.com>
References: <50170C6A.2000101@erwinrol.com>
 <5017B839.7070806@erwinrol.com>
Message-ID: <20120731131319.GY30009@pengutronix.de>

Hi Erwin,

On Tue, Jul 31, 2012 at 12:49:29PM +0200, Erwin Rol wrote:
> Hey x86-asm-experts,

Surely you do not mean me ;)

> 
> On 31-7-2012 0:36, Erwin Rol wrote:
> 
> So when I use the memset code the asm looks like this below. As you
> can see the memset gets its 3 parameters from the stack (see
> comments below in the asm src). But when you look at the location
> when memset is called it looks like the caller tries to pass the
> parameters in registers. After looking into the Makefile I noticed
> the arch/x86/boot/* sources get compiled with -mregparm=3, but the
> other sources use normal calling convention. This means code from
> arch/x86/boot/* can not call any other barebox functions when they
> are not of type void f(void). The file arch/x86/boot/regs.c also
> calls memset but it seems the compiler notices that regs.c is 16bit
> code and so it inlines a 16bit memset version (I at least don't see
> a call function).
> 
> Is there any GCC or LD magic we can use to prevent error like this?
> Wouldn't it be better to _not_ change the calling convention in the
> Makefile, but mark the functions that need it with __attribute__ ?

Maybe it's easier and more straight forward to just use a for-loop here
instead of playing magic games with attributes and or flags? Are there
more functions affected or is it just memset?

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mailinglists at erwinrol.com  Tue Jul 31 11:16:26 2012
From: mailinglists at erwinrol.com (Erwin Rol)
Date: Tue, 31 Jul 2012 17:16:26 +0200
Subject: x86 weirdness
In-Reply-To: <20120731131319.GY30009@pengutronix.de>
References: <50170C6A.2000101@erwinrol.com> <5017B839.7070806@erwinrol.com>
 <20120731131319.GY30009@pengutronix.de>
Message-ID: <5017F6CA.1040308@erwinrol.com>

Hey Sascha,

On 31-7-2012 15:13, Sascha Hauer wrote:
> Hi Erwin,
>
> On Tue, Jul 31, 2012 at 12:49:29PM +0200, Erwin Rol wrote:
>> Hey x86-asm-experts,
>
> Surely you do not mean me ;)
>
>>
>> On 31-7-2012 0:36, Erwin Rol wrote:
>>
>> So when I use the memset code the asm looks like this below. As you
>> can see the memset gets its 3 parameters from the stack (see
>> comments below in the asm src). But when you look at the location
>> when memset is called it looks like the caller tries to pass the
>> parameters in registers. After looking into the Makefile I noticed
>> the arch/x86/boot/* sources get compiled with -mregparm=3, but the
>> other sources use normal calling convention. This means code from
>> arch/x86/boot/* can not call any other barebox functions when they
>> are not of type void f(void). The file arch/x86/boot/regs.c also
>> calls memset but it seems the compiler notices that regs.c is 16bit
>> code and so it inlines a 16bit memset version (I at least don't see
>> a call function).
>>
>> Is there any GCC or LD magic we can use to prevent error like this?
>> Wouldn't it be better to _not_ change the calling convention in the
>> Makefile, but mark the functions that need it with __attribute__ ?
>
> Maybe it's easier and more straight forward to just use a for-loop here
> instead of playing magic games with attributes and or flags? Are there
> more functions affected or is it just memset?

There seem to be two memset calls, that could be problematic. Both 
should be easily replaceable with for-loops (like I already did by the 
first).

We just have to be very careful to not call any functions from outside 
the boot dir (expect for the main barebox entry point).

Don't you love the weird x86 world :-)

- Erwin

PS: I will prepare some x86 updates like bios-vga-output and GTP 
partition support that might be useful for others too.




From s.hauer at pengutronix.de  Tue Jul 31 13:07:42 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:07:42 +0200
Subject: x86 weirdness
In-Reply-To: <5017F6CA.1040308@erwinrol.com>
References: <50170C6A.2000101@erwinrol.com> <5017B839.7070806@erwinrol.com>
 <20120731131319.GY30009@pengutronix.de>
 <5017F6CA.1040308@erwinrol.com>
Message-ID: <20120731170742.GA30009@pengutronix.de>

On Tue, Jul 31, 2012 at 05:16:26PM +0200, Erwin Rol wrote:
> Hey Sascha,
> 
> 
> There seem to be two memset calls, that could be problematic. Both
> should be easily replaceable with for-loops (like I already did by
> the first).
> 
> We just have to be very careful to not call any functions from
> outside the boot dir (expect for the main barebox entry point).

This is probably a good idea anyway since the bss is not cleared at this
stage.

> 
> Don't you love the weird x86 world :-)

I'm glad that most of the time I don't have to care about x86 ;)

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mailinglists at erwinrol.com  Tue Jul 31 12:16:29 2012
From: mailinglists at erwinrol.com (Erwin Rol)
Date: Tue, 31 Jul 2012 18:16:29 +0200
Subject: x86 weirdness
In-Reply-To: <20120731155125.GJ19759@game.jcrosoft.org>
References: <50170C6A.2000101@erwinrol.com> <5017B839.7070806@erwinrol.com>
 <20120731131319.GY30009@pengutronix.de> <5017F6CA.1040308@erwinrol.com>
 <20120731155125.GJ19759@game.jcrosoft.org>
Message-ID: <501804DD.3040606@erwinrol.com>

On 31-7-2012 17:51, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 17:16 Tue 31 Jul     , Erwin Rol wrote:
>> Hey Sascha,
>>
>> On 31-7-2012 15:13, Sascha Hauer wrote:
>>> Hi Erwin,
>>>
>>> On Tue, Jul 31, 2012 at 12:49:29PM +0200, Erwin Rol wrote:
>>>> Hey x86-asm-experts,
>>>
>>> Surely you do not mean me ;)
>>>
>>>>
>>>> On 31-7-2012 0:36, Erwin Rol wrote:
>>>>
>>>> So when I use the memset code the asm looks like this below. As you
>>>> can see the memset gets its 3 parameters from the stack (see
>>>> comments below in the asm src). But when you look at the location
>>>> when memset is called it looks like the caller tries to pass the
>>>> parameters in registers. After looking into the Makefile I noticed
>>>> the arch/x86/boot/* sources get compiled with -mregparm=3, but the
>>>> other sources use normal calling convention. This means code from
>>>> arch/x86/boot/* can not call any other barebox functions when they
>>>> are not of type void f(void). The file arch/x86/boot/regs.c also
>>>> calls memset but it seems the compiler notices that regs.c is 16bit
>>>> code and so it inlines a 16bit memset version (I at least don't see
>>>> a call function).
>>>>
>>>> Is there any GCC or LD magic we can use to prevent error like this?
>>>> Wouldn't it be better to _not_ change the calling convention in the
>>>> Makefile, but mark the functions that need it with __attribute__ ?
>>>
>>> Maybe it's easier and more straight forward to just use a for-loop here
>>> instead of playing magic games with attributes and or flags? Are there
>>> more functions affected or is it just memset?
>>
>> There seem to be two memset calls, that could be problematic. Both
>> should be easily replaceable with for-loops (like I already did by
>> the first).
>>
>> We just have to be very careful to not call any functions from
>> outside the boot dir (expect for the main barebox entry point).
>>
>> Don't you love the weird x86 world :-)
> so I guess we should update the x86 to use the pbl so we can have two explicit
> part of binary and we can avoid those issue

One thing to know about the x86 support is that it uses (16bit) bios 
calls to load data from disk and print info on the (vga) screen. These 
calls are wrapped with special code to change from 32bit to 16bit and 
back. So I have no idea of "pbl" works with this very special x86 code.

- Erwin


> Best Regards,
> J.
>



From plagnioj at jcrosoft.com  Tue Jul 31 11:51:25 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Tue, 31 Jul 2012 17:51:25 +0200
Subject: x86 weirdness
In-Reply-To: <5017F6CA.1040308@erwinrol.com>
References: <50170C6A.2000101@erwinrol.com> <5017B839.7070806@erwinrol.com>
 <20120731131319.GY30009@pengutronix.de>
 <5017F6CA.1040308@erwinrol.com>
Message-ID: <20120731155125.GJ19759@game.jcrosoft.org>

On 17:16 Tue 31 Jul     , Erwin Rol wrote:
> Hey Sascha,
> 
> On 31-7-2012 15:13, Sascha Hauer wrote:
> >Hi Erwin,
> >
> >On Tue, Jul 31, 2012 at 12:49:29PM +0200, Erwin Rol wrote:
> >>Hey x86-asm-experts,
> >
> >Surely you do not mean me ;)
> >
> >>
> >>On 31-7-2012 0:36, Erwin Rol wrote:
> >>
> >>So when I use the memset code the asm looks like this below. As you
> >>can see the memset gets its 3 parameters from the stack (see
> >>comments below in the asm src). But when you look at the location
> >>when memset is called it looks like the caller tries to pass the
> >>parameters in registers. After looking into the Makefile I noticed
> >>the arch/x86/boot/* sources get compiled with -mregparm=3, but the
> >>other sources use normal calling convention. This means code from
> >>arch/x86/boot/* can not call any other barebox functions when they
> >>are not of type void f(void). The file arch/x86/boot/regs.c also
> >>calls memset but it seems the compiler notices that regs.c is 16bit
> >>code and so it inlines a 16bit memset version (I at least don't see
> >>a call function).
> >>
> >>Is there any GCC or LD magic we can use to prevent error like this?
> >>Wouldn't it be better to _not_ change the calling convention in the
> >>Makefile, but mark the functions that need it with __attribute__ ?
> >
> >Maybe it's easier and more straight forward to just use a for-loop here
> >instead of playing magic games with attributes and or flags? Are there
> >more functions affected or is it just memset?
> 
> There seem to be two memset calls, that could be problematic. Both
> should be easily replaceable with for-loops (like I already did by
> the first).
> 
> We just have to be very careful to not call any functions from
> outside the boot dir (expect for the main barebox entry point).
> 
> Don't you love the weird x86 world :-)
so I guess we should update the x86 to use the pbl so we can have two explicit
part of binary and we can avoid those issue

Best Regards,
J.


From s.hauer at pengutronix.de  Tue Jul 31 13:59:11 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:59:11 +0200
Subject: [PATCH 1/6] nor m25p80: remove progression bar
In-Reply-To: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757556-11897-2-git-send-email-s.hauer@pengutronix.de>

Drivers should not print a progression bar.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/nor/m25p80.c |    8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/nor/m25p80.c b/drivers/nor/m25p80.c
index 1440227..594e9d2 100644
--- a/drivers/nor/m25p80.c
+++ b/drivers/nor/m25p80.c
@@ -28,7 +28,6 @@
 #include <linux/err.h>
 #include <clock.h>
 #include <linux/mtd/mtd.h>
-#include <progress.h>
 #include "m25p80.h"
 
 /****************************************************************************/
@@ -200,7 +199,6 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 	u32 addr, len;
 	u32 start_sector;
 	u32 end_sector;
-	u32 progress = 0;
 	int eraseshift = ffs(flash->erasesize) - 1;
 
 	dev_dbg(&flash->spi->dev, "%s %s 0x%llx, len %lld\n",
@@ -215,15 +213,12 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 
 	start_sector = offset >> eraseshift;
 	end_sector = (offset + count - 1) >> eraseshift;
-	init_progression_bar(end_sector - start_sector + 1);
 
 	/* whole-chip erase? */
 	if (len == flash->size) {
 
-		show_progress(start_sector);
 		if (erase_chip(flash))
 			return -EIO;
-		show_progress(end_sector);
 
 	/* REVISIT in some cases we could speed up erasing large regions
 	 * by using OPCODE_SE instead of OPCODE_BE_4K.  We may have set up
@@ -238,7 +233,6 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 			if (erase_sector(flash, addr))
 				return -EIO;
 
-			show_progress(++progress);
 			if (len <= flash->erasesize)
 				break;
 			addr += flash->erasesize;
@@ -246,8 +240,6 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 		}
 	}
 
-	printf("\n");
-
 	return 0;
 }
 
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 13:59:16 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:59:16 +0200
Subject: [PATCH 6/6] nor m25p80: implement fast read
In-Reply-To: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757556-11897-7-git-send-email-s.hauer@pengutronix.de>

The fast read command is needed for spi speeds > 25MHz, so use it for
higher speeds.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/nor/m25p80.c |   12 ++++++++----
 drivers/nor/m25p80.h |   10 +---------
 2 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/drivers/nor/m25p80.c b/drivers/nor/m25p80.c
index 4b62e93..daaf60c 100644
--- a/drivers/nor/m25p80.c
+++ b/drivers/nor/m25p80.c
@@ -267,6 +267,7 @@ ssize_t m25p80_read(struct cdev *cdev, void *buf, size_t count, loff_t offset,
 	struct spi_transfer t[2];
 	struct spi_message m;
 	ssize_t retlen;
+	int fast_read = 0;
 
 	/* sanity checks */
 	if (!count)
@@ -275,6 +276,9 @@ ssize_t m25p80_read(struct cdev *cdev, void *buf, size_t count, loff_t offset,
 	if (offset + count > flash->size)
 		return -EINVAL;
 
+	if (flash->spi->max_speed_hz >= 25000000)
+		fast_read = 1;
+
 	spi_message_init(&m);
 	memset(t, 0, (sizeof t));
 
@@ -283,7 +287,7 @@ ssize_t m25p80_read(struct cdev *cdev, void *buf, size_t count, loff_t offset,
 	 * Should add 1 byte DUMMY_BYTE.
 	 */
 	t[0].tx_buf = flash->command;
-	t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
+	t[0].len = m25p_cmdsz(flash) + fast_read;
 	spi_message_add_tail(&t[0], &m);
 
 	t[1].rx_buf = buf;
@@ -303,12 +307,12 @@ ssize_t m25p80_read(struct cdev *cdev, void *buf, size_t count, loff_t offset,
 	 */
 
 	/* Set up the write data buffer. */
-	flash->command[0] = OPCODE_READ;
+	flash->command[0] = fast_read ? OPCODE_FAST_READ : OPCODE_NORM_READ;
 	m25p_addr2cmd(flash, offset, flash->command);
 
 	spi_sync(flash->spi, &m);
 
-	retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
+	retlen = m.actual_length - m25p_cmdsz(flash) - fast_read;
 
 	return retlen;
 }
@@ -756,7 +760,7 @@ static int m25p_probe(struct device_d *dev)
 	}
 
 	flash = xzalloc(sizeof *flash);
-	flash->command = xmalloc(MAX_CMD_SIZE + FAST_READ_DUMMY_BYTE);
+	flash->command = xmalloc(MAX_CMD_SIZE);
 
 	flash->spi = spi;
 	dev->priv = (void *)flash;
diff --git a/drivers/nor/m25p80.h b/drivers/nor/m25p80.h
index ce48ba7..34bf2e2 100644
--- a/drivers/nor/m25p80.h
+++ b/drivers/nor/m25p80.h
@@ -34,15 +34,7 @@
 
 /* Define max times to check status register before we give up. */
 #define	MAX_READY_WAIT		40	/* M25P16 specs 40s max chip erase */
-#define MAX_CMD_SIZE		5
-
-#ifdef CONFIG_M25PXX_USE_FAST_READ
-#define OPCODE_READ		OPCODE_FAST_READ
-#define FAST_READ_DUMMY_BYTE	1
-#else
-#define OPCODE_READ		OPCODE_NORM_READ
-#define FAST_READ_DUMMY_BYTE	0
-#endif
+#define MAX_CMD_SIZE		6
 
 #define SPI_NAME_SIZE   32
 
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 13:59:14 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:59:14 +0200
Subject: [PATCH 4/6] nor m25p80: align start and end to erase blocks
In-Reply-To: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757556-11897-5-git-send-email-s.hauer@pengutronix.de>

The erase command normally makes sure that the selected area is erased,
therefore align the parameters to eraseblock boundaries.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/nor/m25p80.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/nor/m25p80.c b/drivers/nor/m25p80.c
index 0f3bcd1..7ff4546 100644
--- a/drivers/nor/m25p80.c
+++ b/drivers/nor/m25p80.c
@@ -205,8 +205,9 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 	if (offset + count > flash->size)
 		return -EINVAL;
 
-	addr = offset;
-	len = count;
+	/* Align start and len to erase blocks */
+	addr = offset & ~(flash->erasesize - 1);
+	len = ALIGN(offset + count, flash->erasesize) - addr;
 
 	/* whole-chip erase? */
 	if (len == flash->size) {
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 13:59:12 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:59:12 +0200
Subject: [PATCH 2/6] nor m25p80: remove unused variables
In-Reply-To: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757556-11897-3-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/nor/m25p80.c |    6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/nor/m25p80.c b/drivers/nor/m25p80.c
index 594e9d2..13ce130 100644
--- a/drivers/nor/m25p80.c
+++ b/drivers/nor/m25p80.c
@@ -197,9 +197,6 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 {
 	struct m25p *flash = cdev->priv;
 	u32 addr, len;
-	u32 start_sector;
-	u32 end_sector;
-	int eraseshift = ffs(flash->erasesize) - 1;
 
 	dev_dbg(&flash->spi->dev, "%s %s 0x%llx, len %lld\n",
 		__func__, "at", (long long)offset, (long long)count);
@@ -211,9 +208,6 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 	addr = offset;
 	len = count;
 
-	start_sector = offset >> eraseshift;
-	end_sector = (offset + count - 1) >> eraseshift;
-
 	/* whole-chip erase? */
 	if (len == flash->size) {
 
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 13:59:10 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:59:10 +0200
Subject: [PATCH] m25p80 spi flash updates
Message-ID: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>

Mostly speed updates for the m25p80 SPI nor flash driver.

Sascha

----------------------------------------------------------------
Sascha Hauer (6):
      nor m25p80: remove progression bar
      nor m25p80: remove unused variables
      nor m25p80: refactor chip erase
      nor m25p80: align start and end to erase blocks
      nor m25p80: optimize erase
      nor m25p80: implement fast read

 drivers/nor/m25p80.c |   75 ++++++++++++++++++++++++++++++--------------------
 drivers/nor/m25p80.h |   12 ++------
 2 files changed, 48 insertions(+), 39 deletions(-)


From s.hauer at pengutronix.de  Tue Jul 31 13:59:13 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:59:13 +0200
Subject: [PATCH 3/6] nor m25p80: refactor chip erase
In-Reply-To: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757556-11897-4-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/nor/m25p80.c |   25 ++++++++++++-------------
 1 file changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/nor/m25p80.c b/drivers/nor/m25p80.c
index 13ce130..0f3bcd1 100644
--- a/drivers/nor/m25p80.c
+++ b/drivers/nor/m25p80.c
@@ -210,9 +210,10 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 
 	/* whole-chip erase? */
 	if (len == flash->size) {
-
 		if (erase_chip(flash))
 			return -EIO;
+		return 0;
+	}
 
 	/* REVISIT in some cases we could speed up erasing large regions
 	 * by using OPCODE_SE instead of OPCODE_BE_4K.  We may have set up
@@ -220,18 +221,16 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 	 */
 
 	/* "sector"-at-a-time erase */
-	} else {
-		while (len) {
-			if (ctrlc())
-				return -EINTR;
-			if (erase_sector(flash, addr))
-				return -EIO;
-
-			if (len <= flash->erasesize)
-				break;
-			addr += flash->erasesize;
-			len -= flash->erasesize;
-		}
+	while (len) {
+		if (ctrlc())
+			return -EINTR;
+		if (erase_sector(flash, addr))
+			return -EIO;
+
+		if (len <= flash->erasesize)
+			break;
+		addr += flash->erasesize;
+		len -= flash->erasesize;
 	}
 
 	return 0;
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 13:59:15 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 19:59:15 +0200
Subject: [PATCH 5/6] nor m25p80: optimize erase
In-Reply-To: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757556-11897-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757556-11897-6-git-send-email-s.hauer@pengutronix.de>

The driver currently erases blocks in 4kb chunks if 4kb support is
available. This patch uses bigger blocks for suitable areas to speed
up erasing areas.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/nor/m25p80.c |   59 +++++++++++++++++++++++++++++++++++---------------
 drivers/nor/m25p80.h |    2 ++
 2 files changed, 44 insertions(+), 17 deletions(-)

diff --git a/drivers/nor/m25p80.c b/drivers/nor/m25p80.c
index 7ff4546..4b62e93 100644
--- a/drivers/nor/m25p80.c
+++ b/drivers/nor/m25p80.c
@@ -168,7 +168,7 @@ static int m25p_cmdsz(struct m25p *flash)
  *
  * Returns 0 if successful, non-zero otherwise.
  */
-static int erase_sector(struct m25p *flash, u32 offset)
+static int erase_sector(struct m25p *flash, u32 offset, u32 command)
 {
 	dev_dbg(&flash->spi->dev, "%s %dKiB at 0x%08x\n",
 		__func__, flash->erasesize / 1024, offset);
@@ -181,7 +181,7 @@ static int erase_sector(struct m25p *flash, u32 offset)
 	write_enable(flash);
 
 	/* Set up command buffer. */
-	flash->command[0] = flash->erase_opcode;
+	flash->command[0] = command;
 	m25p_addr2cmd(flash, offset, flash->command);
 
 	spi_write(flash->spi, flash->command, m25p_cmdsz(flash));
@@ -216,22 +216,45 @@ static ssize_t m25p80_erase(struct cdev *cdev, size_t count, loff_t offset)
 		return 0;
 	}
 
-	/* REVISIT in some cases we could speed up erasing large regions
-	 * by using OPCODE_SE instead of OPCODE_BE_4K.  We may have set up
-	 * to use "small sector erase", but that's not always optimal.
-	 */
+	if (flash->erase_opcode_4k) {
+		while (len && (addr & (flash->sector_size - 1))) {
+			if (ctrlc())
+				return -EINTR;
+			if (erase_sector(flash, addr, flash->erase_opcode_4k))
+				return -EIO;
+			addr += flash->erasesize;
+			len -= flash->erasesize;
+		}
 
-	/* "sector"-at-a-time erase */
-	while (len) {
-		if (ctrlc())
-			return -EINTR;
-		if (erase_sector(flash, addr))
-			return -EIO;
+		while (len >= flash->sector_size) {
+			if (ctrlc())
+				return -EINTR;
+			if (erase_sector(flash, addr, flash->erase_opcode))
+				return -EIO;
+			addr += flash->sector_size;
+			len -= flash->sector_size;
+		}
 
-		if (len <= flash->erasesize)
-			break;
-		addr += flash->erasesize;
-		len -= flash->erasesize;
+		while (len) {
+			if (ctrlc())
+				return -EINTR;
+			if (erase_sector(flash, addr, flash->erase_opcode_4k))
+				return -EIO;
+			addr += flash->erasesize;
+			len -= flash->erasesize;
+		}
+	} else {
+		while (len) {
+			if (ctrlc())
+				return -EINTR;
+			if (erase_sector(flash, addr, flash->erase_opcode))
+				return -EIO;
+
+			if (len <= flash->erasesize)
+				break;
+			addr += flash->erasesize;
+			len -= flash->erasesize;
+		}
 	}
 
 	return 0;
@@ -753,6 +776,7 @@ static int m25p_probe(struct device_d *dev)
 	flash->info = info;
 	flash->size = info->sector_size * info->n_sectors;
 	flash->erasesize = info->sector_size;
+	flash->sector_size = info->sector_size;
 	flash->cdev.size = info->sector_size * info->n_sectors;
 	flash->cdev.dev = dev;
 	flash->cdev.ops = &m25p80_ops;
@@ -773,7 +797,8 @@ static int m25p_probe(struct device_d *dev)
 
 	/* prefer "small sector" erase if possible */
 	if (info->flags & SECT_4K) {
-		flash->erase_opcode = OPCODE_BE_4K;
+		flash->erase_opcode_4k = OPCODE_BE_4K;
+		flash->erase_opcode = OPCODE_SE;
 		flash->erasesize = 4096;
 	} else {
 		flash->erase_opcode = OPCODE_SE;
diff --git a/drivers/nor/m25p80.h b/drivers/nor/m25p80.h
index 3f9dd9c..ce48ba7 100644
--- a/drivers/nor/m25p80.h
+++ b/drivers/nor/m25p80.h
@@ -58,9 +58,11 @@ struct m25p {
 	struct cdev		cdev;
 	char			*name;
 	u32			erasesize;
+	u32			sector_size;
 	u16			page_size;
 	u16			addr_width;
 	u8			erase_opcode;
+	u8			erase_opcode_4k;
 	u8			*command;
 	u32			size;
 };
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 14:01:46 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 20:01:46 +0200
Subject: [PATCH] Freescale sabrelite support
Message-ID: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>

The following series adds support for the Freescale i.MX6 sabrelite board.
As preparation SPI support for i.MX6 and support for the serial internal
boot mode is added.

Sascha

----------------------------------------------------------------
Sascha Hauer (4):
      SPI i.MX: Add support for i.MX6
      ARM i.MX: Add support for internal serial boot mode
      ARM i.MX: Add support for the Freescale i.MX6 sabrelite board
      ARM i.MX: Add defconfig for Freescale i.MX6 Sabre Lite board

 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/freescale-mx6-sabrelite/Makefile   |    1 +
 arch/arm/boards/freescale-mx6-sabrelite/board.c    |  265 ++++++++++++++++++++
 arch/arm/boards/freescale-mx6-sabrelite/config.h   |    4 +
 .../freescale-mx6-sabrelite/env/init/bootargs-base |    8 +
 .../freescale-mx6-sabrelite/env/init/hostname      |    8 +
 .../boards/freescale-mx6-sabrelite/flash_header.c  |  178 +++++++++++++
 arch/arm/configs/freescale-mx6-sabrelite_defconfig |   71 ++++++
 arch/arm/mach-imx/Kconfig                          |   15 ++
 arch/arm/mach-imx/include/mach/barebox.lds.h       |   12 +-
 arch/arm/mach-imx/include/mach/devices-imx6.h      |    5 +
 arch/arm/mach-imx/include/mach/imx-flash-header.h  |    9 +
 arch/arm/mach-imx/speed-imx51.c                    |    5 +
 arch/arm/mach-imx/speed-imx53.c                    |    5 +
 arch/arm/mach-imx/speed-imx6.c                     |    5 +
 drivers/spi/Kconfig                                |    2 +-
 drivers/spi/imx_spi.c                              |    6 +-
 17 files changed, 595 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/Makefile
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/board.c
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/config.h
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/env/init/bootargs-base
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/env/init/hostname
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/flash_header.c
 create mode 100644 arch/arm/configs/freescale-mx6-sabrelite_defconfig


From s.hauer at pengutronix.de  Tue Jul 31 14:01:48 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 20:01:48 +0200
Subject: [PATCH 2/4] ARM i.MX: Add support for internal serial boot mode
In-Reply-To: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757710-12659-3-git-send-email-s.hauer@pengutronix.de>

This mode is needed for bootstrapping a board via USB serial.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/Kconfig                         |   10 ++++++++++
 arch/arm/mach-imx/include/mach/barebox.lds.h      |   12 +++++++++++-
 arch/arm/mach-imx/include/mach/imx-flash-header.h |    9 +++++++++
 3 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b77245..e54d498 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -101,6 +101,16 @@ config ARCH_IMX_INTERNAL_BOOT_NOR
 config ARCH_IMX_INTERNAL_BOOT_ONENAND
 	bool "OneNAND"
 
+config ARCH_IMX_INTERNAL_BOOT_SERIAL
+	bool "Serial (read help)"
+	help
+	  Normally the first instruction of the barebox image contains a jump
+	  to the real start of the image which means that you can start it by
+	  jumping to the load address. With serial boot images this is not
+	  possible because the first instruction is occupied by a magic for the
+	  ROM boot code. You can still start this image as a second stage loader,
+	  but you have to add 0x400 to the entry point.
+
 endchoice
 
 config NAND_IMX_BOOT
diff --git a/arch/arm/mach-imx/include/mach/barebox.lds.h b/arch/arm/mach-imx/include/mach/barebox.lds.h
index a2932bd..2e60282 100644
--- a/arch/arm/mach-imx/include/mach/barebox.lds.h
+++ b/arch/arm/mach-imx/include/mach/barebox.lds.h
@@ -1,6 +1,16 @@
 
 #ifdef CONFIG_ARCH_IMX_INTERNAL_BOOT
 
+#ifdef CONFIG_ARCH_IMX_INTERNAL_BOOT_SERIAL
+#define PRE_IMAGE \
+	.pre_image : {					\
+		KEEP(*(.flash_header_0x0*))		\
+		KEEP(*(.dcd_entry_0x0*))		\
+		KEEP(*(.image_len_0x0*))		\
+		. = 0x400;				\
+	}
+#else
+
 #define PRE_IMAGE \
 	.pre_image : {					\
 		KEEP(*(.flash_header_start*))		\
@@ -19,4 +29,4 @@
 		. = 0x2000;				\
 	}
 #endif
-
+#endif
diff --git a/arch/arm/mach-imx/include/mach/imx-flash-header.h b/arch/arm/mach-imx/include/mach/imx-flash-header.h
index ca2fe9f..a51d473 100644
--- a/arch/arm/mach-imx/include/mach/imx-flash-header.h
+++ b/arch/arm/mach-imx/include/mach/imx-flash-header.h
@@ -15,6 +15,11 @@
 	#define __dcd_entry_section		__section(.dcd_entry_0x0100)
 	#define __image_len_section		__section(.image_len_0x0100)
 	#define FLASH_HEADER_OFFSET 0x0100
+#elif defined(CONFIG_ARCH_IMX_INTERNAL_BOOT_SERIAL)
+	#define __flash_header_section		__section(.flash_header_0x0)
+	#define __dcd_entry_section		__section(.dcd_entry_0x0)
+	#define __image_len_section		__section(.image_len_0x0)
+	#define FLASH_HEADER_OFFSET 0x0
 #else
 	#define __flash_header_section		__section(.flash_header_0x0400)
 	#define __dcd_entry_section		__section(.dcd_entry_0x0400)
@@ -34,6 +39,10 @@
 #define __dcd_entry_0x0400	__section(.dcd_entry_0x0400)
 #define __image_len_0x0400	__section(.image_len_0x0400)
 
+#define __flash_header_0x0	__section(.flash_header_0x0)
+#define __dcd_entry_0x0		__section(.dcd_entry_0x0)
+#define __image_len_0x0		__section(.image_len_0x0)
+
 /*
  * NOR is not automatically copied anywhere by the boot ROM
  */
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 14:01:49 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 20:01:49 +0200
Subject: [PATCH 3/4] ARM i.MX: Add support for the Freescale i.MX6 sabrelite
 board
In-Reply-To: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757710-12659-4-git-send-email-s.hauer@pengutronix.de>

This adds support for the Freescale i.MX6 sabrelite board with:

- FEC
- SD2/3
- SPI flash

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/freescale-mx6-sabrelite/Makefile   |    1 +
 arch/arm/boards/freescale-mx6-sabrelite/board.c    |  265 ++++++++++++++++++++
 arch/arm/boards/freescale-mx6-sabrelite/config.h   |    4 +
 .../freescale-mx6-sabrelite/env/init/bootargs-base |    8 +
 .../freescale-mx6-sabrelite/env/init/hostname      |    8 +
 .../boards/freescale-mx6-sabrelite/flash_header.c  |  178 +++++++++++++
 arch/arm/mach-imx/Kconfig                          |    5 +
 8 files changed, 470 insertions(+)
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/Makefile
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/board.c
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/config.h
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/env/init/bootargs-base
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/env/init/hostname
 create mode 100644 arch/arm/boards/freescale-mx6-sabrelite/flash_header.c

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..a02bc51 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -137,6 +137,7 @@ board-$(CONFIG_MACH_TX51)			:= karo-tx51
 board-$(CONFIG_MACH_MX6Q_ARM2)			:= freescale-mx6-arm2
 board-$(CONFIG_MACH_TOSHIBA_AC100)		:= toshiba-ac100
 board-$(CONFIG_MACH_CCMX51)			:= ccxmx51
+board-$(CONFIG_MACH_SABRELITE)			:= freescale-mx6-sabrelite
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/Makefile b/arch/arm/boards/freescale-mx6-sabrelite/Makefile
new file mode 100644
index 0000000..ad2e1be
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabrelite/Makefile
@@ -0,0 +1 @@
+obj-y += board.o flash_header.o
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c
new file mode 100644
index 0000000..13279bc
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c
@@ -0,0 +1,265 @@
+/*
+ * Copyright (C) 2012 Steffen Trumtrar, Pengutronix
+ *
+ * based on arch/arm/boards/freescale-mx6-arm2/board.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <environment.h>
+#include <mach/imx-regs.h>
+#include <fec.h>
+#include <mach/gpio.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <miidev.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <mach/generic.h>
+#include <sizes.h>
+#include <net.h>
+#include <mach/imx6.h>
+#include <mach/devices-imx6.h>
+#include <mach/iomux-mx6.h>
+#include <mach/gpio.h>
+#include <spi/spi.h>
+#include <mach/spi.h>
+
+#define SABRELITE_SD3_WP	IMX_GPIO_NR(7, 1)
+#define SABRELITE_SD3_CD	IMX_GPIO_NR(7, 0)
+
+#define SABRELITE_SD4_CD	IMX_GPIO_NR(2, 6)
+
+static iomux_v3_cfg_t sabrelite_pads[] = {
+	/* UART1 */
+	MX6Q_PAD_SD3_DAT6__UART1_RXD,
+	MX6Q_PAD_SD3_DAT7__UART1_TXD,
+	MX6Q_PAD_EIM_D26__UART2_TXD,
+	MX6Q_PAD_EIM_D27__UART2_RXD,
+
+	/* SD3 (bottom) */
+	MX6Q_PAD_SD3_CMD__USDHC3_CMD,
+	MX6Q_PAD_SD3_CLK__USDHC3_CLK,
+	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0,
+	MX6Q_PAD_SD3_DAT1__USDHC3_DAT1,
+	MX6Q_PAD_SD3_DAT2__USDHC3_DAT2,
+	MX6Q_PAD_SD3_DAT3__USDHC3_DAT3,
+	MX6Q_PAD_SD3_DAT4__GPIO_7_1, /* WP */
+	MX6Q_PAD_SD3_DAT5__GPIO_7_0, /* CD */
+
+	/* SD4 (top) */
+	MX6Q_PAD_SD4_CLK__USDHC4_CLK,
+	MX6Q_PAD_SD4_CMD__USDHC4_CMD,
+	MX6Q_PAD_SD4_DAT0__USDHC4_DAT0,
+	MX6Q_PAD_SD4_DAT1__USDHC4_DAT1,
+	MX6Q_PAD_SD4_DAT2__USDHC4_DAT2,
+	MX6Q_PAD_SD4_DAT3__USDHC4_DAT3,
+	MX6Q_PAD_NANDF_D6__GPIO_2_6, /* CD */
+
+	/* ECSPI */
+	MX6Q_PAD_EIM_D16__ECSPI1_SCLK,
+	MX6Q_PAD_EIM_D17__ECSPI1_MISO,
+	MX6Q_PAD_EIM_D18__ECSPI1_MOSI,
+	MX6Q_PAD_EIM_D19__GPIO_3_19,	/* CS1 */
+};
+
+static iomux_v3_cfg_t sabrelite_enet_pads[] = {
+	/* Ethernet */
+	MX6Q_PAD_ENET_MDC__ENET_MDC,
+	MX6Q_PAD_ENET_MDIO__ENET_MDIO,
+	MX6Q_PAD_ENET_REF_CLK__GPIO_1_23,	// LED mode
+	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
+	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
+	MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
+	MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
+	MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
+	MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
+	MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
+	MX6Q_PAD_EIM_D23__GPIO_3_23,		/* RGMII_nRST */
+	MX6Q_PAD_RGMII_RXC__GPIO_6_30,		/* PHYAD */
+	MX6Q_PAD_RGMII_RD0__GPIO_6_25,		/* MODE0 */
+	MX6Q_PAD_RGMII_RD1__GPIO_6_27,		/* MODE1 */
+	MX6Q_PAD_RGMII_RD2__GPIO_6_28,		/* MODE2 */
+	MX6Q_PAD_RGMII_RD3__GPIO_6_29,		/* MODE3 */
+	MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
+};
+
+static iomux_v3_cfg_t sabrelite_enet2_pads[] = {
+	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
+	MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
+	MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
+	MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
+	MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
+	MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
+	MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
+};
+
+static int sabrelite_mem_init(void)
+{
+	arm_add_mem_device("ram0", 0x10000000, SZ_1G);
+
+	return 0;
+}
+mem_initcall(sabrelite_mem_init);
+
+static struct fec_platform_data fec_info = {
+	.xcv_type = RGMII,
+	.phy_addr = 6,
+};
+
+int mx6_rgmii_rework(void)
+{
+	struct mii_device *mdev;
+
+	mdev = mii_open("phy0");
+	if (!mdev) {
+		printf("unable to open phy0\n");
+		return -ENODEV;
+	}
+
+	mii_write(mdev, mdev->address, 0x09, 0x0f00);
+
+	/* do same as linux kernel */
+	/* min rx data delay */
+	mii_write(mdev, mdev->address, 0x0b, 0x8105);
+	mii_write(mdev, mdev->address, 0x0c, 0x0000);
+
+	/* max rx/tx clock delay, min rx/tx control delay */
+	mii_write(mdev, mdev->address, 0x0b, 0x8104);
+	mii_write(mdev, mdev->address, 0x0c, 0xf0f0);
+	mii_write(mdev, mdev->address, 0x0b, 0x104);
+
+	mii_close(mdev);
+
+	return 0;
+}
+
+static int sabrelite_ksz9021rn_setup(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(sabrelite_enet_pads, ARRAY_SIZE(sabrelite_enet_pads));
+
+	gpio_direction_output(87, 0);  /* GPIO 3-23 */
+
+	gpio_direction_output(190, 1); /* GPIO 6-30: PHYAD2 */
+
+	/* LED-Mode: Tri-Color Dual LED Mode */
+	gpio_direction_output(23 , 0); /* GPIO 1-23 */
+
+	/* MODE strap-in pins: advertise all capabilities */
+	gpio_direction_output(185, 1); /* GPIO 6-25 */
+	gpio_direction_output(187, 1); /* GPIO 6-27 */
+	gpio_direction_output(188, 1); /* GPIO 6-28*/
+	gpio_direction_output(189, 1); /* GPIO 6-29 */
+
+	/* Enable 125 MHz clock output */
+        gpio_direction_output(184, 1); /* GPIO 6-24 */
+
+	mdelay(10);
+	gpio_set_value(87, 1);
+
+	mxc_iomux_v3_setup_multiple_pads(sabrelite_enet2_pads, ARRAY_SIZE(sabrelite_enet2_pads));
+
+	return 0;
+}
+
+static inline int imx6_iim_register_fec_ethaddr(void)
+{
+	u32 value;
+	u8 buf[6];
+
+	value = readl(MX6_OCOTP_BASE_ADDR + 0x630);
+	buf[0] = (value >> 8);
+	buf[1] = value;
+
+	value = readl(MX6_OCOTP_BASE_ADDR + 0x620);
+	buf[2] = value >> 24;
+	buf[3] = value >> 16;
+	buf[4] = value >> 8;
+	buf[5] = value;
+
+	eth_register_ethaddr(0, buf);
+
+	return 0;
+}
+
+static int sabrelite_spi_cs[] = {GPIO_PORTC + 19};
+
+static struct spi_imx_master sabrelite_spi_0_data = {
+	.chipselect = sabrelite_spi_cs,
+	.num_chipselect = ARRAY_SIZE(sabrelite_spi_cs),
+};
+
+static const struct spi_board_info sabrelite_spi_board_info[] = {
+	{
+		.name = "m25p",
+		.max_speed_hz = 40000000,
+		.bus_num = 0,
+		.chip_select = 0,
+	}
+};
+
+static struct esdhc_platform_data sabrelite_sd3_data = {
+	.cd_gpio = SABRELITE_SD3_CD,
+	.cd_type = ESDHC_CD_GPIO,
+	.wp_gpio = SABRELITE_SD3_WP,
+	.wp_type = ESDHC_WP_GPIO,
+};
+
+static struct esdhc_platform_data sabrelite_sd4_data = {
+	.cd_gpio = SABRELITE_SD4_CD,
+	.cd_type = ESDHC_CD_GPIO,
+	.wp_type = ESDHC_WP_NONE,
+};
+
+static int sabrelite_devices_init(void)
+{
+	imx6_add_mmc2(&sabrelite_sd3_data);
+	imx6_add_mmc3(&sabrelite_sd4_data);
+
+	sabrelite_ksz9021rn_setup();
+	imx6_iim_register_fec_ethaddr();
+	imx6_add_fec(&fec_info);
+	mx6_rgmii_rework();
+
+	spi_register_board_info(sabrelite_spi_board_info,
+			ARRAY_SIZE(sabrelite_spi_board_info));
+	imx6_add_spi0(&sabrelite_spi_0_data);
+
+	armlinux_set_bootparams((void *)0x10000100);
+	armlinux_set_architecture(3769);
+
+	devfs_add_partition("m25p0", 0, SZ_512K, DEVFS_PARTITION_FIXED, "self0");
+	devfs_add_partition("m25p0", SZ_512K, SZ_512K, DEVFS_PARTITION_FIXED, "env0");
+
+	return 0;
+}
+
+device_initcall(sabrelite_devices_init);
+
+static int sabrelite_console_init(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(sabrelite_pads, ARRAY_SIZE(sabrelite_pads));
+
+	imx6_init_lowlevel();
+
+	imx6_add_uart1();
+
+	return 0;
+}
+console_initcall(sabrelite_console_init);
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/config.h b/arch/arm/boards/freescale-mx6-sabrelite/config.h
new file mode 100644
index 0000000..ca15136
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabrelite/config.h
@@ -0,0 +1,4 @@
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif	/* __CONFIG_H */
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/env/init/bootargs-base b/arch/arm/boards/freescale-mx6-sabrelite/env/init/bootargs-base
new file mode 100644
index 0000000..2c51feb
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabrelite/env/init/bootargs-base
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "Base bootargs"
+	exit
+fi
+
+global.linux.bootargs.base="console=ttymxc1,115200"
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/env/init/hostname b/arch/arm/boards/freescale-mx6-sabrelite/env/init/hostname
new file mode 100644
index 0000000..db5b2b2
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabrelite/env/init/hostname
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+	init-menu-add-entry "$0" "hostname"
+	exit
+fi
+
+global.hostname=SabreLite
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/flash_header.c b/arch/arm/boards/freescale-mx6-sabrelite/flash_header.c
new file mode 100644
index 0000000..61d482b
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabrelite/flash_header.c
@@ -0,0 +1,178 @@
+/*
+ * Copyright (C) 2011 Marc Kleine-Budde <mkl at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <asm/byteorder.h>
+#include <mach/imx-flash-header.h>
+#include <mach/imx6-regs.h>
+#include <asm/barebox-arm-head.h>
+
+void __naked __flash_header_start go(void)
+{
+	barebox_arm_head();
+}
+
+#define DCD(a, v) { .addr = cpu_to_be32(a), .val = cpu_to_be32(v), }
+
+struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5a8, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5b0, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x524, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x51c, 0x00000030),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x518, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x50c, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5b8, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5c0, 0x00000030),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5ac, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5b4, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x528, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x520, 0x00020030),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x514, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x510, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5bc, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5c4, 0x00020030),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x56c, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x578, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x588, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x594, 0x00020030),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x57c, 0x00020030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x590, 0x00003000),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x598, 0x00003000),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x58c, 0x00000000),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x59c, 0x00003030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x5a0, 0x00003030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x784, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x788, 0x00000030),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x794, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x79c, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x7a0, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x7a4, 0x00000030),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x7a8, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x748, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x74c, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x750, 0x00020000),
+
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x758, 0x00000000),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x774, 0x00020000),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x78c, 0x00000030),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x798, 0x000C0000),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x81c, 0x33333333),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x820, 0x33333333),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x824, 0x33333333),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x828, 0x33333333),
+
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x81c, 0x33333333),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x820, 0x33333333),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x824, 0x33333333),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x828, 0x33333333),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x018, 0x00081740),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00008000),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x00c, 0x555A7975),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x010, 0xFF538E64),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x014, 0x01FF00DB),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x02c, 0x000026D2),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x030, 0x005B0E21),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x008, 0x09444040),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x004, 0x00025576),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x040, 0x00000027),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x000, 0x831A0000),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04088032),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x0408803A),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00008033),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x0000803B),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00428031),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00428039),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x09408030),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x09408038),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04008040),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04008048),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x800, 0xA1380003),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x800, 0xA1380003),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x020, 0x00005800),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x818, 0x00022227),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x818, 0x00022227),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x83c, 0x434B0350),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x840, 0x034C0359),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x83c, 0x434B0350),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x840, 0x03650348),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x848, 0x4436383B),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x848, 0x39393341),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x850, 0x35373933),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x850, 0x48254A36),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x80c, 0x001F001F),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x810, 0x001F001F),
+
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x80c, 0x00440044),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x810, 0x00440044),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x8b8, 0x00000800),
+	DCD(MX6_MMDC_P1_BASE_ADDR + 0x8b8, 0x00000800),
+
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00000000),
+	DCD(MX6_MMDC_P0_BASE_ADDR + 0x404, 0x00011006),
+
+	DCD(MX6_CCM_BASE_ADDR + 0x068, 0x00c03f3f),
+	DCD(MX6_CCM_BASE_ADDR + 0x06c, 0x0030fc03),
+	DCD(MX6_CCM_BASE_ADDR + 0x070, 0x0fffc000),
+	DCD(MX6_CCM_BASE_ADDR + 0x074, 0x3ff00000),
+	DCD(MX6_CCM_BASE_ADDR + 0x078, 0x00fff300),
+	DCD(MX6_CCM_BASE_ADDR + 0x07c, 0x0f0000c3),
+	DCD(MX6_CCM_BASE_ADDR + 0x080, 0x000003ff),
+
+	/* enable AXI cache for VDOA/VPU/IPU */
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x010, 0xf00000cf),
+	/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x018, 0x007f007f),
+	DCD(MX6_IOMUXC_BASE_ADDR + 0x01c, 0x007f007f),
+};
+
+#define APP_DEST	CONFIG_TEXT_BASE
+
+struct imx_flash_header_v2 __flash_header_section flash_header = {
+	.header.tag		= IVT_HEADER_TAG,
+	.header.length		= cpu_to_be16(32),
+	.header.version		= IVT_VERSION,
+	.entry			= (u32)_stext,
+	.dcd_ptr		= APP_DEST + FLASH_HEADER_OFFSET + offsetof(struct imx_flash_header_v2, dcd),
+	.boot_data_ptr		= APP_DEST + FLASH_HEADER_OFFSET + offsetof(struct imx_flash_header_v2, boot_data),
+	.self			= APP_DEST + FLASH_HEADER_OFFSET,
+
+	.boot_data.start	= APP_DEST,
+	.boot_data.size		= barebox_image_size,
+
+	.dcd.header.tag		= DCD_HEADER_TAG,
+	.dcd.header.length	= cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)),
+	.dcd.header.version	= DCD_VERSION,
+
+	.dcd.command.tag	= DCD_COMMAND_WRITE_TAG,
+	.dcd.command.length	= cpu_to_be16(sizeof(struct imx_dcd_command) + sizeof(dcd_entry)),
+	.dcd.command.param	= DCD_COMMAND_WRITE_PARAM,
+};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index e54d498..490609f 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -27,6 +27,7 @@ config ARCH_TEXT_BASE
 	default 0x97f00000 if MACH_TX51
 	default 0x4fc00000 if MACH_MX6Q_ARM2
 	default 0x97f00000 if MACH_CCMX51
+	default 0x4fc00000 if MACH_SABRELITE
 
 config BOARDINFO
 	default "Eukrea CPUIMX25" if MACH_EUKREA_CPUIMX25
@@ -52,6 +53,7 @@ config BOARDINFO
 	default "Ka-Ro tx51" if MACH_TX51
 	default "Freescale i.MX6q armadillo2" if MACH_MX6Q_ARM2
 	default "ConnectCore i.MX51" if MACH_CCMX51
+	default "Sabre Lite" if MACH_SABRELITE
 
 choice
 	prompt "Select boot mode"
@@ -475,6 +477,9 @@ choice
 config MACH_MX6Q_ARM2
 	bool "Freescale i.MX6q Armadillo2"
 
+config MACH_SABRELITE
+	bool "Freescale i.MX6 Sabre Lite"
+
 endchoice
 
 endif
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 14:01:50 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 20:01:50 +0200
Subject: [PATCH 4/4] ARM i.MX: Add defconfig for Freescale i.MX6 Sabre Lite
 board
In-Reply-To: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757710-12659-5-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/configs/freescale-mx6-sabrelite_defconfig |   71 ++++++++++++++++++++
 1 file changed, 71 insertions(+)
 create mode 100644 arch/arm/configs/freescale-mx6-sabrelite_defconfig

diff --git a/arch/arm/configs/freescale-mx6-sabrelite_defconfig b/arch/arm/configs/freescale-mx6-sabrelite_defconfig
new file mode 100644
index 0000000..7e6cfa1
--- /dev/null
+++ b/arch/arm/configs/freescale-mx6-sabrelite_defconfig
@@ -0,0 +1,71 @@
+CONFIG_ARCH_IMX=y
+CONFIG_ARCH_IMX6=y
+CONFIG_MACH_SABRELITE=y
+CONFIG_IMX_IIM=y
+CONFIG_IMX_IIM_FUSE_BLOW=y
+CONFIG_AEABI=y
+CONFIG_THUMB2_BAREBOX=y
+CONFIG_CMD_ARM_MMUINFO=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_ARM_UNWIND=y
+CONFIG_MMU=y
+CONFIG_MALLOC_SIZE=0x4000000
+CONFIG_MALLOC_TLSF=y
+CONFIG_KALLSYMS=y
+CONFIG_LONGHELP=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx6-sabrelite/env"
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_BASENAME=y
+CONFIG_CMD_DIRNAME=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_VERBOSE=y
+CONFIG_CMD_BOOTM_INITRD=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
+CONFIG_CMD_BOOTM_AIMAGE=y
+# CONFIG_CMD_BOOTZ is not set
+# CONFIG_CMD_BOOTU is not set
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNCOMPRESS=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_RESOLV=y
+CONFIG_DRIVER_NET_FEC_IMX=y
+CONFIG_DRIVER_SPI_IMX=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_SST25L=y
+CONFIG_MTD=y
+CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
+CONFIG_MCI_IMX_ESDHC=y
+CONFIG_FS_TFTP=y
+CONFIG_FS_NFS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_LFN=y
+CONFIG_LZO_DECOMPRESS=y
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 14:01:47 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 20:01:47 +0200
Subject: [PATCH 1/4] SPI i.MX: Add support for i.MX6
In-Reply-To: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
References: <1343757710-12659-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343757710-12659-2-git-send-email-s.hauer@pengutronix.de>

The i.MX5 does not have a valid function to get the spi clock. This
patch introduces a function for i.MX6, and moves the bogus spi clock
speed to the speed-imx5*.c. Not nice, but preserves the current status
quo for i.MX5

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/include/mach/devices-imx6.h |    5 +++++
 arch/arm/mach-imx/speed-imx51.c               |    5 +++++
 arch/arm/mach-imx/speed-imx53.c               |    5 +++++
 arch/arm/mach-imx/speed-imx6.c                |    5 +++++
 drivers/spi/Kconfig                           |    2 +-
 drivers/spi/imx_spi.c                         |    6 +++---
 6 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/devices-imx6.h b/arch/arm/mach-imx/include/mach/devices-imx6.h
index e4a72ac..ca063c5 100644
--- a/arch/arm/mach-imx/include/mach/devices-imx6.h
+++ b/arch/arm/mach-imx/include/mach/devices-imx6.h
@@ -44,3 +44,8 @@ static inline struct device_d *imx6_add_fec(struct fec_platform_data *pdata)
 {
 	return imx_add_fec((void *)MX6_ENET_BASE_ADDR, pdata);
 }
+
+static inline struct device_d *imx6_add_spi0(struct spi_imx_master *pdata)
+{
+	return imx_add_spi((void *)MX6_ECSPI1_BASE_ADDR, 0, pdata);
+}
diff --git a/arch/arm/mach-imx/speed-imx51.c b/arch/arm/mach-imx/speed-imx51.c
index 87fbc75..288fe1a 100644
--- a/arch/arm/mach-imx/speed-imx51.c
+++ b/arch/arm/mach-imx/speed-imx51.c
@@ -228,6 +228,11 @@ unsigned long imx_get_usbclk(void)
 	return rate / (prediv * podf);
 }
 
+unsigned long imx_get_cspiclk(void)
+{
+	return 166000000; /* FIXME: bogus value */
+}
+
 /*
  * Set the divider of the CLKO pin. Returns
  * the new divider (which may be smaller
diff --git a/arch/arm/mach-imx/speed-imx53.c b/arch/arm/mach-imx/speed-imx53.c
index 653dae3..ede5ffd 100644
--- a/arch/arm/mach-imx/speed-imx53.c
+++ b/arch/arm/mach-imx/speed-imx53.c
@@ -217,6 +217,11 @@ unsigned long imx_get_mmcclk(void)
 	return rate / (prediv * podf);
 }
 
+unsigned long imx_get_cspiclk(void)
+{
+	return 166000000; /* FIXME: bogus value */
+}
+
 void imx_dump_clocks(void)
 {
 	printf("pll1: %ld\n", pll1_main_get_rate());
diff --git a/arch/arm/mach-imx/speed-imx6.c b/arch/arm/mach-imx/speed-imx6.c
index 4cc9fdb..df24545 100644
--- a/arch/arm/mach-imx/speed-imx6.c
+++ b/arch/arm/mach-imx/speed-imx6.c
@@ -332,6 +332,11 @@ u32 imx_get_fecclk(void)
 	return __get_ipg_clk();
 }
 
+u32 imx_get_cspiclk(void)
+{
+	return __get_cspi_clk();
+}
+
 void imx_dump_clocks(void)
 {
 	u32 freq;
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 609bafd..a249b81 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -21,7 +21,7 @@ config DRIVER_SPI_IMX_0_7
 
 config DRIVER_SPI_IMX_2_3
 	bool
-	depends on ARCH_IMX51 || ARCH_IMX53
+	depends on ARCH_IMX51 || ARCH_IMX53 || ARCH_IMX6
 	default y
 
 config DRIVER_SPI_ALTERA
diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c
index 42358f2..2e59b3c 100644
--- a/drivers/spi/imx_spi.c
+++ b/drivers/spi/imx_spi.c
@@ -374,7 +374,7 @@ static void cspi_2_3_chipselect(struct spi_device *spi, int is_active)
 
 	if (!is_active) {
 		if (gpio >= 0)
-			gpio_set_value(gpio, !gpio_cs);
+			gpio_direction_output(gpio, !gpio_cs);
 		return;
 	}
 
@@ -384,7 +384,7 @@ static void cspi_2_3_chipselect(struct spi_device *spi, int is_active)
 	ctrl |= CSPI_2_3_CTRL_MODE(cs);
 
 	/* set clock speed */
-	ctrl |= cspi_2_3_clkdiv(166000000, spi->max_speed_hz);
+	ctrl |= cspi_2_3_clkdiv(imx_get_cspiclk(), spi->max_speed_hz);
 
 	/* set chip select to use */
 	ctrl |= CSPI_2_3_CTRL_CS(cs);
@@ -521,7 +521,7 @@ static int imx_spi_probe(struct device_d *dev)
 		version = SPI_IMX_VER_0_7;
 #endif
 #ifdef CONFIG_DRIVER_SPI_IMX_2_3
-	if (cpu_is_mx51() || cpu_is_mx53())
+	if (cpu_is_mx51() || cpu_is_mx53() || cpu_is_mx6())
 		version = SPI_IMX_VER_2_3;
 #endif
 	imx->chipselect = spi_imx_devtype_data[version].chipselect;
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 15:45:11 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 21:45:11 +0200
Subject: [PATCH 2/2] ubi: align ubi writes to LEB size
In-Reply-To: <1343763911-4410-1-git-send-email-s.hauer@pengutronix.de>
References: <1343763911-4410-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343763911-4410-3-git-send-email-s.hauer@pengutronix.de>

Otherwise incomplete LEBs are not written.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/ubi/cdev.c |   33 ++++++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c
index 6b1e432..93c3491 100644
--- a/drivers/mtd/ubi/cdev.c
+++ b/drivers/mtd/ubi/cdev.c
@@ -8,7 +8,7 @@
 struct ubi_volume_cdev_priv {
 	struct ubi_device *ubi;
 	struct ubi_volume *vol;
-	int updating;
+	int written;
 };
 
 static ssize_t ubi_volume_cdev_read(struct cdev *cdev, void *buf, size_t size,
@@ -63,13 +63,12 @@ static ssize_t ubi_volume_cdev_write(struct cdev* cdev, const void *buf,
 	struct ubi_device *ubi = priv->ubi;
 	int err;
 
-	if (!priv->updating) {
-		err = ubi_start_update(ubi, vol, 16*1024*1024);
+	if (!priv->written) {
+		err = ubi_start_update(ubi, vol, vol->used_bytes);
 		if (err < 0) {
 			printf("Cannot start volume update\n");
 			return err;
 		}
-		priv->updating = 1;
 	}
 
 	err = ubi_more_update_data(ubi, vol, buf, size);
@@ -78,6 +77,8 @@ static ssize_t ubi_volume_cdev_write(struct cdev* cdev, const void *buf,
 		return err;
 	}
 
+	priv->written += size;
+
 	return size;
 }
 
@@ -85,7 +86,7 @@ static int ubi_volume_cdev_open(struct cdev *cdev, unsigned long flags)
 {
 	struct ubi_volume_cdev_priv *priv = cdev->priv;
 
-	priv->updating = 0;
+	priv->written = 0;
 
 	return 0;
 }
@@ -97,7 +98,25 @@ static int ubi_volume_cdev_close(struct cdev *cdev)
 	struct ubi_device *ubi = priv->ubi;
 	int err;
 
-	if (priv->updating) {
+	if (priv->written) {
+		int remaining = vol->usable_leb_size -
+				(priv->written % vol->usable_leb_size);
+
+		if (remaining) {
+			void *buf = xzalloc(remaining);
+
+			memset(buf, 0xff, remaining);
+
+			err = ubi_more_update_data(ubi, vol, buf, remaining);
+
+			free(buf);
+
+			if (err < 0) {
+				printf("Couldnt or partially wrote data \n");
+				return err;
+			}
+		}
+
 		err = ubi_finish_update(ubi, vol);
 		if (err)
 			return err;
@@ -126,7 +145,7 @@ static loff_t ubi_volume_cdev_lseek(struct cdev *cdev, loff_t ofs)
 	struct ubi_volume_cdev_priv *priv = cdev->priv;
 
 	/* We can only update ubi volumes sequentially */
-	if (priv->updating)
+	if (priv->written)
 		return -EINVAL;
 
 	return ofs;
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 15:45:09 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 21:45:09 +0200
Subject: [PATCH] UBI work
Message-ID: <1343763911-4410-1-git-send-email-s.hauer@pengutronix.de>

Some UBI fixes, one to make writing to UBI devices actually work.

Sascha

----------------------------------------------------------------
Sascha Hauer (2):
      ubi: cdev->write has to return the bytes read, not 0
      ubi: align ubi writes to LEB size

 drivers/mtd/ubi/cdev.c |   35 +++++++++++++++++++++++++++--------
 1 file changed, 27 insertions(+), 8 deletions(-)


From s.hauer at pengutronix.de  Tue Jul 31 15:45:10 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 21:45:10 +0200
Subject: [PATCH 1/2] ubi: cdev->write has to return the bytes read, not 0
In-Reply-To: <1343763911-4410-1-git-send-email-s.hauer@pengutronix.de>
References: <1343763911-4410-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1343763911-4410-2-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/ubi/cdev.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c
index c99b64d..6b1e432 100644
--- a/drivers/mtd/ubi/cdev.c
+++ b/drivers/mtd/ubi/cdev.c
@@ -78,7 +78,7 @@ static ssize_t ubi_volume_cdev_write(struct cdev* cdev, const void *buf,
 		return err;
 	}
 
-	return err;
+	return size;
 }
 
 static int ubi_volume_cdev_open(struct cdev *cdev, unsigned long flags)
-- 
1.7.10.4



From s.hauer at pengutronix.de  Tue Jul 31 15:45:42 2012
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 31 Jul 2012 21:45:42 +0200
Subject: [PATCH] mem md: make md -s /dev/something work again
Message-ID: <1343763942-5011-1-git-send-email-s.hauer@pengutronix.de>

Since

|commit d22b85a203aea20a2b2618f5f457fe96c502868d
|Author: Sascha Hauer <s.hauer at pengutronix.de>
|Date:   Wed Jul 4 23:41:13 2012 +0200
|
|    mem md: bail out without arguments
|
|    Without arguments the 'md' command defaults to show address 0 which
|    likely results in a NULL pointer exception, so only three keystrokes
|    are necessary to crash barebox. Show usage instead if 'md' is invoked
|    without arguments, so that it at least requires an address to be given
|    to crash barebox. This increases the stability of barebox by 66%. Hurray!

barebox does not crash any longer when a plain 'md' without additional arguments
is exectuted. However, doing a 'md -s /dev/nor0' was a standard usecase which now
does not work anymore.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 commands/mem.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/commands/mem.c b/commands/mem.c
index 5322def..cc94062 100644
--- a/commands/mem.c
+++ b/commands/mem.c
@@ -170,6 +170,9 @@ static int do_mem_md(int argc, char *argv[])
 	char *filename = DEVMEM;
 	int mode = O_RWSIZE_4;
 
+	if (argc < 2)
+		return COMMAND_ERROR_USAGE;
+
 	if (mem_parse_options(argc, argv, "bwls:", &mode, &filename, NULL) < 0)
 		return 1;
 
@@ -180,8 +183,6 @@ static int do_mem_md(int argc, char *argv[])
 		}
 		if (size == ~0)
 			size = 0x100;
-	} else {
-		return COMMAND_ERROR_USAGE;
 	}
 
 	fd = open_and_lseek(filename, mode | O_RDONLY, start);
-- 
1.7.10.4



From marc at cpdesign.com.au  Mon Jul 30 06:36:46 2012
From: marc at cpdesign.com.au (Marc Reilly)
Date: Mon, 30 Jul 2012 20:36:46 +1000
Subject: [PATCH 7/7] drivers/eeprom: at24: add I2C eeprom driver for
 24c01/02
In-Reply-To: <20120730082505.GN1528@pengutronix.de>
References: <1343547714-32740-1-git-send-email-marc@cpdesign.com.au>
 <1343547714-32740-8-git-send-email-marc@cpdesign.com.au>
 <20120730082505.GN1528@pengutronix.de>
Message-ID: <3749450.lP8xDhAWsE@dev1>

Hi Uwe,

Thanks for comments. You are very thorough, and I mean that in a nice way.
I gather you also have an at24 driver, did you support addressing offsets > 
256?

On Monday, July 30, 2012 10:25:05 AM Uwe Kleine-K?nig wrote:
> Hello Marc,
> 
> On Sun, Jul 29, 2012 at 05:41:54PM +1000, Marc Reilly wrote:
> > This series adds a driver for at24 eeproms. Much of the guts of the code
> > was taken from the at24 driver in the linux kernel.
> > 
> > The device is polled for write completion. All the datasheets I looked
> > at had a max of 10ms for eeprom write time.
> > The driver automatically wraps the writes to page boundaries, so we don't
> > write more than is remaining in the page.
> > 
> > The driver can not yet handle addressing offsets > 256 in devices with
> > larger capacities.
> > 
> > The platform data fields are all optional, if they are zero they are
> > assigned default values. As the device capabilities can not be probed,
> > the default assumption is that the device is 256 bytes.
> > 
> > Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
> > ---
> > 
> >  drivers/eeprom/Kconfig  |    7 ++
> >  drivers/eeprom/Makefile |    1 +
> >  drivers/eeprom/at24.c   |  233
> >  +++++++++++++++++++++++++++++++++++++++++++++++ include/i2c/at24.h     
> >  |   13 +++
> >  4 files changed, 254 insertions(+), 0 deletions(-)
> >  create mode 100644 drivers/eeprom/at24.c
> >  create mode 100644 include/i2c/at24.h
> > 
> > diff --git a/drivers/eeprom/Kconfig b/drivers/eeprom/Kconfig
> > index a0b5489..a2bcaaa 100644
> > --- a/drivers/eeprom/Kconfig
> > +++ b/drivers/eeprom/Kconfig
> > @@ -8,4 +8,11 @@ config EEPROM_AT25
> > 
> >  	  after you configure the board init code to know about each eeprom
> >  	  on your target board.
> > 
> > +config EEPROM_AT24
> > +	bool "at24 based eeprom"
> > +	depends on I2C
> > +	help
> > +	  Provides read/write for the at24 family of I2C EEPROMS.
> > +	  Currently only the 2K bit versions are supported.
> > +
> > 
> >  endmenu
> > 
> > diff --git a/drivers/eeprom/Makefile b/drivers/eeprom/Makefile
> > index e323bd0..e287eb0 100644
> > --- a/drivers/eeprom/Makefile
> > +++ b/drivers/eeprom/Makefile
> > @@ -1 +1,2 @@
> > 
> >  obj-$(CONFIG_EEPROM_AT25)	+= at25.o
> > 
> > +obj-$(CONFIG_EEPROM_AT24)	+= at24.o
> 
> nitpick: sort at24 before at25?

Cool.

> 
> > diff --git a/drivers/eeprom/at24.c b/drivers/eeprom/at24.c
> > new file mode 100644
> > index 0000000..fa16d88
> > --- /dev/null
> > +++ b/drivers/eeprom/at24.c
> > @@ -0,0 +1,233 @@
> > +/*
> > + * Copyright (C) 2007 Sascha Hauer, Pengutronix
> > + *               2009 Marc Kleine-Budde <mkl at pengutronix.de>
> > + *               2010 Marc Reilly, Creative Product Design
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + *
> > + */
> > +
> > +#include <common.h>
> > +#include <init.h>
> > +#include <clock.h>
> > +#include <driver.h>
> > +#include <xfuncs.h>
> > +#include <errno.h>
> > +
> > +#include <i2c/i2c.h>
> > +#include <i2c/at24.h>
> > +
> > +#define DRIVERNAME		"at24"
> > +#define DEVICENAME		"eeprom"
> 
> why not DEVICENAME == DRIVERNAME?

Originally I'd started with DRIVENAME as eeprom, but changed it later as that 
seemed too generic. I wanted to keep the device name as eeprom so that the 
device would be "/dev/eepromX", both for compatibilty with existing board 
setup and as a conceptual abstraction to regard the device as a more generic 
"eeprom" device, rather than a more specific "at24".
(Hope that makes sense).

> 
> > +
> > +struct at24 {
> > +	struct cdev		cdev;
> > +	struct i2c_client	*client;
> > +	/* size in bytes */
> > +	unsigned int		size;
> > +	unsigned int		page_size;
> > +};
> > +
> > +#define to_at24(a)		container_of(a, struct at24, cdev)
> > +
> > +static ssize_t at24_read(struct cdev *cdev, void *_buf, size_t count,
> > +		ulong offset, ulong flags)
> > +{
> > +	struct at24 *priv = to_at24(cdev);
> > +	u8 *buf = _buf;
> > +	size_t i = count;
> > +	ssize_t numwritten = 0;
> 
> s/written/read/
> 
> > +	int retries = 5;
> > +	int ret;
> > +
> > +	while (i && retries) {
> > +		ret = i2c_read_reg(priv->client, offset, buf, i);
> > +		if (ret < 0)
> > +			return (ssize_t)ret;
> 
> This cast is also done implicitly.
> 
> > +		else if (ret == 0)
> > +			--retries;
> > +
> > +		numwritten += ret;
> > +		i -= ret;
> > +		offset += ret;
> > +		buf += ret;
> > +	}
> 
> IMHO this loop should be in a more generic place once instead of
> repeating it for each driver. Also I wonder if you saw the eeprom
> yielding some but not all requested bytes on a read request.

Not that I can remember, but this code is old, and I think was copied from a 
kernel driver and I just left as is.
I considered doing a generic loop, but in my head anything I thought of wasn't 
much better than having similar code 2 or 3 times.

> 
> > +
> > +	return numwritten;
> > +}
> > +
> > +static int at24_poll_device(struct i2c_client *client)
> > +{
> > +	uint64_t start;
> > +	u8 dummy;
> > +	int ret;
> > +
> > +	/*
> > +	 * eeprom can take 5-10ms to write, during which time it
> > +	 * will not respond. Poll it by attempting reads.
> > +	 */
> > +	start = get_time_ns();
> > +	while (1) {
> > +		ret = i2c_master_recv(client, &dummy, 1);
> 
> I implemented a write of length 0 here. IMHO this is better.

I'm not clear whether you are saying that your way is better :)
This way reads just one byte after device responds. I'm thinking that your way 
would write a byte for the address...

> 
> > +		if (ret > 0)
> > +			return ret;
> > +
> > +		if (is_timeout(start, 20 * MSECOND))
> > +			return -EIO;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > +static ssize_t at24_write(struct cdev *cdev, const void *_buf, size_t
> > count, +		ulong offset, ulong flags)
> > +{
> > +	struct at24 *priv = to_at24(cdev);
> > +	const u8 *buf = _buf;
> > +	const int pagesize = priv->page_size;
> > +	ssize_t numwritten = 0;
> > +
> > +	while (count) {
> > +		int ret, numtowrite;
> > +		int page_remain = pagesize - (offset % pagesize);
> > +
> > +		numtowrite = count;
> > +		if (numtowrite > pagesize)
> > +			numtowrite = pagesize;
> 
> I think you can skip this if in the presence of the the if below.
> 
> > +		/* don't write past page */
> > +		if (numtowrite > page_remain)
> > +			numtowrite = page_remain;
> > +
> > +		ret = i2c_write_reg(priv->client, offset, buf, numtowrite);
> > +		if (ret < 0)
> > +			return (ssize_t)ret;
> > +
> > +		numwritten += ret;
> > +		buf += ret;
> > +		count -= ret;
> > +		offset += ret;
> > +
> > +		ret = at24_poll_device(priv->client);
> > +		if (ret < 0)
> > +			return (ssize_t)ret;
> 
> Don't you need to poll before writing instead of after a write?

That would probably be better.

> 
> > +	}
> > +
> > +	return numwritten;
> > +}
> > +
> > +/* max page size of any of the at24 family devices is 16 bytes */
> > +#define AT24_MAX_PAGE_SIZE	16
> 
> That is wrong. My eeprom has a page size of 64 bytes.

That comment should have had a "that I looked at" after devices. I'll change 
it to 64.

> 
> > +
> > +static ssize_t at24_erase(struct cdev *cdev, size_t count, unsigned long
> > offset) +{
> > +	struct at24 *priv = to_at24(cdev);
> > +	char erase[AT24_MAX_PAGE_SIZE];
> > +	const int pagesize = priv->page_size;
> > +	ssize_t numwritten = 0;
> > +
> > +	memset(erase, 0xff, sizeof(erase));
> > +
> > +	while (count) {
> > +		int ret, numtowrite;
> > +		int page_remain = pagesize - (offset % pagesize);
> > +
> > +		numtowrite = count;
> > +		if (numtowrite > pagesize)
> > +			numtowrite = pagesize;
> > +		/* don't write past page */
> > +		if (numtowrite > page_remain)
> > +			numtowrite = page_remain;
> > +
> > +		ret = i2c_write_reg(priv->client, offset, erase, numtowrite);
> > +		if (ret < 0)
> > +			return (ssize_t)ret;
> > +
> > +		numwritten += ret;
> > +		count -= ret;
> > +		offset += ret;
> > +
> > +		ret = at24_poll_device(priv->client);
> > +		if (ret < 0)
> > +			return (ssize_t)ret;
> > +	}
> > +
> > +	return 0;
> > +}
> 
> I think conceptually you don't need the erase callback for this eeprom.

While it is possible to write 0xff through the device, this was more 
convenient. I'd prefer to keep it, unless theres a reason otherwise. 

> 
> > +
> > +static struct file_operations at24_fops = {
> > +	.lseek	= dev_lseek_default,
> > +	.read	= at24_read,
> > +	.write	= at24_write,
> > +	.erase	= at24_erase,
> > +};
> > +
> > +static int at24_probe(struct device_d *dev)
> > +{
> > +	const struct at24_platform_data *pdata;
> > +	struct at24 *at24;
> > +	at24 = xzalloc(sizeof(*at24));
> > +
> > +	dev->priv = at24;
> > +	at24->client = to_i2c_client(dev);
> > +	at24->cdev.dev = dev;
> > +	at24->cdev.ops = &at24_fops;
> > +
> > +	pdata = dev->platform_data;
> > +	if (pdata) {
> > +		at24->cdev.size = pdata->size_bytes;
> > +		at24->cdev.name = strdup(pdata->name);
> > +		at24->page_size = pdata->page_size;
> > +	}
> > +
> > +	if (at24->cdev.size == 0)
> > +		at24->cdev.size = 256;
> > +	if (!at24->cdev.name || at24->cdev.name[0] == '\0') {
> > +		char buf[20];
> > +		sprintf(buf, DEVICENAME"%d", dev->id);

I have an issue myself with this, as an spi eeprom could also be present or 
even two at24s on different i2c busses.

I remember, a while ago, working on a function that would make up a name for a 
device. I'll try dig that up.


> > +		at24->cdev.name = strdup(buf);
> > +	}
> > +	if (at24->page_size == 0) {
> > +		switch (at24->cdev.size) {
> > +		case 512:
> > +		case 1024:
> > +		case 2048:
> > +			at24->page_size = 16;
> > +			break;
> > +		case 128:
> > +		case 256:
> > +		default:
> > +			at24->page_size = 8;
> > +			break;
> > +		}
> > +	}
> > +
> > +	devfs_create(&at24->cdev);
> > +
> > +	return 0;
> > +}
> > +
> > +static struct driver_d at24_driver = {
> > +	.name  = DRIVERNAME,
> > +	.probe = at24_probe,
> > +};
> > +
> > +static int at24_init(void)
> > +{
> > +	register_driver(&at24_driver);
> > +	return 0;
> 
> return register_driver(&at24_driver) ?

Yup.

Thanks again! I'll rework this soon.

Cheers,
Marc

> 
> > +}
> > +
> > +device_initcall(at24_init);
> > diff --git a/include/i2c/at24.h b/include/i2c/at24.h
> > new file mode 100644
> > index 0000000..00e4624
> > --- /dev/null
> > +++ b/include/i2c/at24.h
> > @@ -0,0 +1,13 @@
> > +#ifndef _EEPROM_AT24_H
> > +#define _EEPROM_AT24_H
> > +
> > +struct at24_platform_data {
> > +	/* preferred device name */
> > +	const char name[10];
> > +	/* page write size in bytes */
> > +	u8 page_size;
> > +	/* device size in bytes */
> > +	u16 size_bytes;
> > +};
> > +
> > +#endif /* _EEPROM_AT24_H */


