Barebox newbie questions : arch/arm/{plat,mach} split and interrupts

[Robert Jarzmik]

Hi,

As I'm a bit new to barebone, and after reading a bit the code for the ARM
architectures, I have questions :

 (1) Why is there not anywhere a arch/arm/plat-xxx ?
     My understanding is that normally, platform generic code (like gpio
     handling for XScale processors) should go there.
     The machine specific code (ie. PXA27x, PXA25x, etc ...) would still go to
     arch/arm/mach-pxa.

 (2) In arch/arm, I understand that interruptions are never used (do_irq()
     implementation is quite clear about that). Is that a design decision and
     why ?
     If so, I suppose that active polling for each device is required. Am I
     right here ?

 (3) MMU: one can enable or not the MMU. AFAIR, the MMU is required to enable
     both I-Cache and D-Cache on ARM achitectures. Are there any other obvious
     advantages I'm missing in the case of a bootloader ?

 (4) Is it possible to have 2 outputs as result of compilation of barebox for a
     board ?
     Let me be clearer. My board, mioa701, has a disk-on-chip on which it can
     boot. Barebox will be the SPL (written from barebox.bin). The IPL, which is
     limited to 2048 bytes, will only initialize RAM, GPIOs, and load the
     SPL. Is there a way for me to add the generation of a 'mioa701_ipl.bin' out
     of a 'mioa701_ipl.S' ?

Cheers.

-- 
Robert