From u.kleine-koenig at pengutronix.de  Mon May  2 05:27:34 2011
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 2 May 2011 11:27:34 +0200
Subject: MAKEALL problem
In-Reply-To: <BANLkTin_1GZCPjmKMAOdMH-jH85PEa-7Rg@mail.gmail.com>
References: <BANLkTimBTzBWeLg5qGg+riW2VYruF5W8Mg@mail.gmail.com>
	<20110429082536.GD13104@game.jcrosoft.org>
	<BANLkTi=3jajUaQ=iBsS-iiWipaH5Wy-WJQ@mail.gmail.com>
	<20110429093019.GH13104@game.jcrosoft.org>
	<BANLkTin_1GZCPjmKMAOdMH-jH85PEa-7Rg@mail.gmail.com>
Message-ID: <20110502092734.GB31131@pengutronix.de>

Hello,

On Fri, Apr 29, 2011 at 08:38:33PM +0200, Belisko Marek wrote:
> On Fri, Apr 29, 2011 at 11:30 AM, Jean-Christophe PLAGNIOL-VILLARD
> <plagnioj at jcrosoft.com> wrote:
> > On 10:47 Fri 29 Apr ? ? , Belisko Marek wrote:
> >> HI,
> >>
> >> On Fri, Apr 29, 2011 at 10:25 AM, Jean-Christophe PLAGNIOL-VILLARD
> >> <plagnioj at jcrosoft.com> wrote:
> >> > On 09:06 Fri 29 Apr ? ? , Belisko Marek wrote:
> >> >> Hi,
> >> >>
> >> >> current HEAD: 165a1e91f9178f160bc34c00e1d5b356cf022a00 make this problem:
> >> >>
> >> >> CROSS_COMPILE=arm-none-linux-gnueabi- ARCH=arm ./MAKEALL
> >> >> Building arm a9m2410_defconfig
> >> >> Configure: ./MAKEALL: 266: Bad substitution
> >> >>
> >> >> --------------------- SUMMARY ----------------------------
> >> >> defconfigs compiled: 0
> >> >> compiled in ? 10s
> >> >> ----------------------------------------------------------
> >> >>
> >> >> Am I missing something or it's really broken?
> >> > no I use it evreyday on barebox or linux
> >> >
> >> > which shell are you using
> >> GNOME Terminal 2.32.1
> > it's your terminal
> >
> > which shell sh/bash/dash/others?
> After some googling and check MAKEALL with checkbashism script this
> patch fix my problem (work fine on Ubuntu):
> 
> 1. PIPESTATUS is bashism but hard to replace with something valuable in dash
> s ojust remove bash array handling
> 
> 2. source is also bashism. fix it with . replacement.
> 
> diff --git a/MAKEALL b/MAKEALL
> index e987de2..6c0d017 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -77,7 +77,7 @@ stats() {
>  }
> 
>  check_pipe_status() {
> -       for i in "${PIPESTATUS[@]}"
> +       for i in ${PIPESTATUS}
>         do
>                 [ $i -gt 0 ] && return 1
>         done
> @@ -234,7 +234,7 @@ then
>                 CONFIG="./${CONFIG}"
>         fi
> 
> -       source "${CONFIG}"
> +       . "${CONFIG}"
>  fi
> 
>  [ -d "${LOGDIR}" ] || mkdir ${LOGDIR} || exit 1

Maybe instead use

-#!/bin/sh
+#!/bin/bash

? (I'd fix s/source/./ anyhow.)

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From marek.belisko at gmail.com  Mon May  2 05:33:37 2011
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 2 May 2011 11:33:37 +0200
Subject: MAKEALL problem
In-Reply-To: <20110502092734.GB31131@pengutronix.de>
References: <BANLkTimBTzBWeLg5qGg+riW2VYruF5W8Mg@mail.gmail.com>
	<20110429082536.GD13104@game.jcrosoft.org>
	<BANLkTi=3jajUaQ=iBsS-iiWipaH5Wy-WJQ@mail.gmail.com>
	<20110429093019.GH13104@game.jcrosoft.org>
	<BANLkTin_1GZCPjmKMAOdMH-jH85PEa-7Rg@mail.gmail.com>
	<20110502092734.GB31131@pengutronix.de>
Message-ID: <BANLkTinr-veuyxksGrtbk3o49-Pcc1uY-g@mail.gmail.com>

Hi,

2011/5/2 Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>:
> Hello,
>
> On Fri, Apr 29, 2011 at 08:38:33PM +0200, Belisko Marek wrote:
>> On Fri, Apr 29, 2011 at 11:30 AM, Jean-Christophe PLAGNIOL-VILLARD
>> <plagnioj at jcrosoft.com> wrote:
>> > On 10:47 Fri 29 Apr ? ? , Belisko Marek wrote:
>> >> HI,
>> >>
>> >> On Fri, Apr 29, 2011 at 10:25 AM, Jean-Christophe PLAGNIOL-VILLARD
>> >> <plagnioj at jcrosoft.com> wrote:
>> >> > On 09:06 Fri 29 Apr ? ? , Belisko Marek wrote:
>> >> >> Hi,
>> >> >>
>> >> >> current HEAD: 165a1e91f9178f160bc34c00e1d5b356cf022a00 make this problem:
>> >> >>
>> >> >> CROSS_COMPILE=arm-none-linux-gnueabi- ARCH=arm ./MAKEALL
>> >> >> Building arm a9m2410_defconfig
>> >> >> Configure: ./MAKEALL: 266: Bad substitution
>> >> >>
>> >> >> --------------------- SUMMARY ----------------------------
>> >> >> defconfigs compiled: 0
>> >> >> compiled in ? 10s
>> >> >> ----------------------------------------------------------
>> >> >>
>> >> >> Am I missing something or it's really broken?
>> >> > no I use it evreyday on barebox or linux
>> >> >
>> >> > which shell are you using
>> >> GNOME Terminal 2.32.1
>> > it's your terminal
>> >
>> > which shell sh/bash/dash/others?
>> After some googling and check MAKEALL with checkbashism script this
>> patch fix my problem (work fine on Ubuntu):
>>
>> 1. PIPESTATUS is bashism but hard to replace with something valuable in dash
>> s ojust remove bash array handling
>>
>> 2. source is also bashism. fix it with . replacement.
>>
>> diff --git a/MAKEALL b/MAKEALL
>> index e987de2..6c0d017 100755
>> --- a/MAKEALL
>> +++ b/MAKEALL
>> @@ -77,7 +77,7 @@ stats() {
>> ?}
>>
>> ?check_pipe_status() {
>> - ? ? ? for i in "${PIPESTATUS[@]}"
>> + ? ? ? for i in ${PIPESTATUS}
>> ? ? ? ? do
>> ? ? ? ? ? ? ? ? [ $i -gt 0 ] && return 1
>> ? ? ? ? done
>> @@ -234,7 +234,7 @@ then
>> ? ? ? ? ? ? ? ? CONFIG="./${CONFIG}"
>> ? ? ? ? fi
>>
>> - ? ? ? source "${CONFIG}"
>> + ? ? ? . "${CONFIG}"
>> ?fi
>>
>> ?[ -d "${LOGDIR}" ] || mkdir ${LOGDIR} || exit 1
>
> Maybe instead use
>
> -#!/bin/sh
> +#!/bin/bash
IMO this is not generic solution.
Because debian based distros has dash by default
in /bin/sh this users must always change MAKEALL script?
>
> ? (I'd fix s/source/./ anyhow.)
OK.
Anyway this change also work fine here.
>
> Best regards
> Uwe
>
> --
> Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? | Uwe Kleine-K?nig ? ? ? ? ? ?|
> Industrial Linux Solutions ? ? ? ? ? ? ? ? | http://www.pengutronix.de/ ?|
>

regards,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
icq: 290551086
web: http://open-nandra.com


From u.kleine-koenig at pengutronix.de  Mon May  2 05:41:01 2011
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 2 May 2011 11:41:01 +0200
Subject: MAKEALL problem
In-Reply-To: <BANLkTinr-veuyxksGrtbk3o49-Pcc1uY-g@mail.gmail.com>
References: <BANLkTimBTzBWeLg5qGg+riW2VYruF5W8Mg@mail.gmail.com>
	<20110429082536.GD13104@game.jcrosoft.org>
	<BANLkTi=3jajUaQ=iBsS-iiWipaH5Wy-WJQ@mail.gmail.com>
	<20110429093019.GH13104@game.jcrosoft.org>
	<BANLkTin_1GZCPjmKMAOdMH-jH85PEa-7Rg@mail.gmail.com>
	<20110502092734.GB31131@pengutronix.de>
	<BANLkTinr-veuyxksGrtbk3o49-Pcc1uY-g@mail.gmail.com>
Message-ID: <20110502094101.GC31131@pengutronix.de>

Hello,

On Mon, May 02, 2011 at 11:33:37AM +0200, Belisko Marek wrote:
> 2011/5/2 Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>:
> >
> > Maybe instead use
> >
> > -#!/bin/sh
> > +#!/bin/bash
> IMO this is not generic solution.
> Because debian based distros has dash by default
> in /bin/sh this users must always change MAKEALL script?
Even Debian users should have a bash in /bin/bash though. At least I
have :-) Either you or me has a misunderstanding.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Mon May  2 05:50:58 2011
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Mon, 2 May 2011 11:50:58 +0200
Subject: [PATCH] Make MAKEALL a bash script
In-Reply-To: <20110502094101.GC31131@pengutronix.de>
References: <BANLkTimBTzBWeLg5qGg+riW2VYruF5W8Mg@mail.gmail.com>
	<20110429082536.GD13104@game.jcrosoft.org>
	<BANLkTi=3jajUaQ=iBsS-iiWipaH5Wy-WJQ@mail.gmail.com>
	<20110429093019.GH13104@game.jcrosoft.org>
	<BANLkTin_1GZCPjmKMAOdMH-jH85PEa-7Rg@mail.gmail.com>
	<20110502092734.GB31131@pengutronix.de>
	<BANLkTinr-veuyxksGrtbk3o49-Pcc1uY-g@mail.gmail.com>
	<20110502094101.GC31131@pengutronix.de>
Message-ID: <20110502095058.GD31131@pengutronix.de>

MAKEALL uses the array PIPESTATUS which is a bash extension. A
replacement isn't available in other common shells (e.g. dash which
provides /bin/sh in Debian since at least Squeeze (6.0))

While at it, use . instead of source which is another bashism. Not
necessary any more, but there is no need to use a bash extension if
there is a generic way, too.

Reported-by: Belisko Marek <marek.belisko at gmail.com>
Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
---

On Mon, May 02, 2011 at 11:41:01AM +0200, Uwe Kleine-K?nig wrote:
> Hello,
> 
> On Mon, May 02, 2011 at 11:33:37AM +0200, Belisko Marek wrote:
> > 2011/5/2 Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>:
> > >
> > > Maybe instead use
> > >
> > > -#!/bin/sh
> > > +#!/bin/bash
> > IMO this is not generic solution.
> > Because debian based distros has dash by default
> > in /bin/sh this users must always change MAKEALL script?
> Even Debian users should have a bash in /bin/bash though. At least I
> have :-) Either you or me has a misunderstanding.

BTW, just doing

	-       for i in "${PIPESTATUS[@]}"
	+       for i in ${PIPESTATUS}

doesn't work:

	$ false | cat
	$ echo ${PIPESTATUS}

So the problem is not that PIPESTATUS isn't an array in dash (which
doesn't support arrays at all), but PIPESTATUS just doesn't exist.

Best regards
Uwe

diff --git a/MAKEALL b/MAKEALL
index e987de2..2de5700 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -1,4 +1,4 @@
-#!/bin/sh
+#! /bin/bash
 
 # Print statistics when we exit
 trap exit 1 2 3 15
@@ -234,7 +234,7 @@ then
 		CONFIG="./${CONFIG}"
 	fi
 
-	source "${CONFIG}"
+	. "${CONFIG}"
 fi
 
 [ -d "${LOGDIR}" ] || mkdir ${LOGDIR} || exit 1

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From marek.belisko at gmail.com  Mon May  2 06:42:24 2011
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 2 May 2011 12:42:24 +0200
Subject: MAKEALL problem
In-Reply-To: <20110502094101.GC31131@pengutronix.de>
References: <BANLkTimBTzBWeLg5qGg+riW2VYruF5W8Mg@mail.gmail.com>
	<20110429082536.GD13104@game.jcrosoft.org>
	<BANLkTi=3jajUaQ=iBsS-iiWipaH5Wy-WJQ@mail.gmail.com>
	<20110429093019.GH13104@game.jcrosoft.org>
	<BANLkTin_1GZCPjmKMAOdMH-jH85PEa-7Rg@mail.gmail.com>
	<20110502092734.GB31131@pengutronix.de>
	<BANLkTinr-veuyxksGrtbk3o49-Pcc1uY-g@mail.gmail.com>
	<20110502094101.GC31131@pengutronix.de>
Message-ID: <BANLkTi=cmZboRNS7oPxrw8uqQr-kt3axuA@mail.gmail.com>

2011/5/2 Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>:
> Hello,
>
> On Mon, May 02, 2011 at 11:33:37AM +0200, Belisko Marek wrote:
>> 2011/5/2 Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>:
>> >
>> > Maybe instead use
>> >
>> > -#!/bin/sh
>> > +#!/bin/bash
>> IMO this is not generic solution.
>> Because debian based distros has dash by default
>> in /bin/sh this users must always change MAKEALL script?
> Even Debian users should have a bash in /bin/bash though. At least I
> have :-) Either you or me has a misunderstanding.
After sending patch I understand. Sorry my fault ;)
>
> Best regards
> Uwe
>
> --
> Pengutronix e.K. ? ? ? ? ? ? ? ? ? ? ? ? ? | Uwe Kleine-K?nig ? ? ? ? ? ?|
> Industrial Linux Solutions ? ? ? ? ? ? ? ? | http://www.pengutronix.de/ ?|
>

regards,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
icq: 290551086
web: http://open-nandra.com


From plagnioj at jcrosoft.com  Mon May  2 11:44:10 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 2 May 2011 17:44:10 +0200
Subject: [PATCH] Make MAKEALL a bash script
In-Reply-To: <20110502095058.GD31131@pengutronix.de>
References: <BANLkTimBTzBWeLg5qGg+riW2VYruF5W8Mg@mail.gmail.com>
	<20110429082536.GD13104@game.jcrosoft.org>
	<BANLkTi=3jajUaQ=iBsS-iiWipaH5Wy-WJQ@mail.gmail.com>
	<20110429093019.GH13104@game.jcrosoft.org>
	<BANLkTin_1GZCPjmKMAOdMH-jH85PEa-7Rg@mail.gmail.com>
	<20110502092734.GB31131@pengutronix.de>
	<BANLkTinr-veuyxksGrtbk3o49-Pcc1uY-g@mail.gmail.com>
	<20110502094101.GC31131@pengutronix.de>
	<20110502095058.GD31131@pengutronix.de>
Message-ID: <20110502154410.GJ1212@game.jcrosoft.org>

On 11:50 Mon 02 May     , Uwe Kleine-K?nig wrote:
> MAKEALL uses the array PIPESTATUS which is a bash extension. A
> replacement isn't available in other common shells (e.g. dash which
> provides /bin/sh in Debian since at least Squeeze (6.0))
> 
> While at it, use . instead of source which is another bashism. Not
> necessary any more, but there is no need to use a bash extension if
> there is a generic way, too.
> 
> Reported-by: Belisko Marek <marek.belisko at gmail.com>
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig at pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

Dash have no capability equivalient as PIPESTATUS

when I write the script I try to do not do bashism but here no choice

Best Regards,
J.


From franck.jullien at gmail.com  Mon May  2 15:41:52 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Mon,  2 May 2011 21:41:52 +0200
Subject: [PATCH] [Nios2] Add bootm support
Message-ID: <1304365312-14611-1-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

This patch adds the bootm support to the Nios2 arch.

Signed-off-by: Franck JULLIEN <franck.jullien at gmail.com>
---
 arch/nios2/lib/Makefile |    1 +
 arch/nios2/lib/bootm.c  |   83 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+), 0 deletions(-)
 create mode 100644 arch/nios2/lib/bootm.c

diff --git a/arch/nios2/lib/Makefile b/arch/nios2/lib/Makefile
index 8776c61..fc9d4d7 100644
--- a/arch/nios2/lib/Makefile
+++ b/arch/nios2/lib/Makefile
@@ -2,5 +2,6 @@ obj-y                      += board.o
 obj-y                      += libgcc.o
 obj-y                      += clock.o
 obj-y                      += cache.o
+obj-y                      += bootm.o
 obj-$(CONFIG_EARLY_PRINTF) += early_printf.o
 
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
new file mode 100644
index 0000000..34e2bd2
--- /dev/null
+++ b/arch/nios2/lib/bootm.c
@@ -0,0 +1,83 @@
+/*
+ * barebox - bootm.c
+ *
+ * (C) Copyright 2011 - Franck JULLIEN <elec4fun at gmail.com>
+ *
+ * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt at psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <image.h>
+#include <environment.h>
+#include <init.h>
+#include <boot.h>
+#include <asm/cache.h>
+
+#define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */
+
+static int do_bootm_linux(struct image_data *idata)
+{
+	image_header_t *os_header = &idata->os->header;
+	void (*kernel)(int, int, int, const char *);
+	const char *commandline = getenv ("bootargs");
+
+	kernel = (void (*)(int, int, int, const char *))ntohl(os_header->ih_ep);
+
+#ifdef CONFIG_USE_IRQ
+	disable_interrupts();
+#endif
+
+	if (relocate_image(idata->os, (void *)ntohl(os_header->ih_load)))
+		return -1;
+
+	/* kernel parameters passing
+	 * r4 : NIOS magic
+	 * r5 : initrd start
+	 * r6 : initrd end or fdt
+	 * r7 : kernel command line
+	 * fdt is passed to kernel via r6, the same as initrd_end. fdt will be
+	 * verified with fdt magic. when both initrd and fdt are used at the
+	 * same time, fdt must follow immediately after initrd.
+	 */
+
+	/* flushes data and instruction caches before calling the kernel */
+	flush_cache_all();
+
+	kernel(NIOS_MAGIC, 0, 0, commandline);
+	/* does not return */
+
+	return 1;
+}
+
+static struct image_handler handler = {
+	.bootm = do_bootm_linux,
+	.image_type = IH_OS_LINUX,
+};
+
+int nios2_register_image_handler(void)
+{
+	return register_image_handler(&handler);
+}
+
+late_initcall(nios2_register_image_handler);
+
-- 
1.7.0.4



From marek.belisko at open-nandra.com  Mon May  2 15:52:58 2011
From: marek.belisko at open-nandra.com (Marek Belisko)
Date: Mon,  2 May 2011 21:52:58 +0200
Subject: [PATCH 2/3] arm: karo-tx25: Fix compilation warning.
In-Reply-To: <1304365979-5546-1-git-send-email-marek.belisko@open-nandra.com>
References: <1304365979-5546-1-git-send-email-marek.belisko@open-nandra.com>
Message-ID: <1304365979-5546-2-git-send-email-marek.belisko@open-nandra.com>

Fix following warning:
arch/arm/boards/karo-tx25/lowlevel.c: In function 'board_init_lowlevel':
arch/arm/boards/karo-tx25/lowlevel.c:75:6: warning: unused variable 'i'

Signed-off-by: Marek Belisko <marek.belisko at open-nandra.com>
---
 arch/arm/boards/karo-tx25/lowlevel.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c
index 86319d7..868ba08 100644
--- a/arch/arm/boards/karo-tx25/lowlevel.c
+++ b/arch/arm/boards/karo-tx25/lowlevel.c
@@ -72,7 +72,6 @@ static inline void __bare_init  setup_sdram(uint32_t base, uint32_t esdctl,
 void __bare_init __naked board_init_lowlevel(void)
 {
 	uint32_t r;
-	int i;
 #ifdef CONFIG_NAND_IMX_BOOT
 	unsigned int *trg, *src;
 #endif
-- 
1.7.4.1



From marek.belisko at open-nandra.com  Mon May  2 15:52:57 2011
From: marek.belisko at open-nandra.com (Marek Belisko)
Date: Mon,  2 May 2011 21:52:57 +0200
Subject: [PATCH 1/3] arm: eukrea: Fix compilation warning.
Message-ID: <1304365979-5546-1-git-send-email-marek.belisko@open-nandra.com>

Fix following warning:
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c: In function 'eukrea_cpuimx35_devices_init':
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c:176:15: warning: unused variable 'tmp'

Signed-off-by: Marek Belisko <marek.belisko at open-nandra.com>
---
 arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
index 73bb2e1..f0eb088 100644
--- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
+++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
@@ -173,8 +173,6 @@ postcore_initcall(eukrea_cpuimx35_mmu_init);
 
 static int eukrea_cpuimx35_devices_init(void)
 {
-	unsigned int tmp;
-
 	imx35_add_nand(&nand_info);
 
 	devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
-- 
1.7.4.1



From marek.belisko at open-nandra.com  Mon May  2 15:52:59 2011
From: marek.belisko at open-nandra.com (Marek Belisko)
Date: Mon,  2 May 2011 21:52:59 +0200
Subject: [PATCH 3/3] scripts: Fix compilation warning.
In-Reply-To: <1304365979-5546-1-git-send-email-marek.belisko@open-nandra.com>
References: <1304365979-5546-1-git-send-email-marek.belisko@open-nandra.com>
Message-ID: <1304365979-5546-3-git-send-email-marek.belisko@open-nandra.com>

Fix following warning:
scripts/kallsyms.c: In function ?read_symbol?:
scripts/kallsyms.c:81:9: warning: ignoring return value of ?fgets?, declared with attribute warn_unused_result

Solution overtaken from kernel tree.

Signed-off-by: Marek Belisko <marek.belisko at open-nandra.com>
---
 scripts/kallsyms.c |    6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/scripts/kallsyms.c b/scripts/kallsyms.c
index 1f11d84..b3591a9 100644
--- a/scripts/kallsyms.c
+++ b/scripts/kallsyms.c
@@ -76,10 +76,8 @@ static int read_symbol(FILE *in, struct sym_entry *s)
 
 	rc = fscanf(in, "%llx %c %499s\n", &s->addr, &stype, str);
 	if (rc != 3) {
-		if (rc != EOF) {
-			/* skip line */
-			fgets(str, 500, in);
-		}
+		if (rc != EOF && fgets(str, 500, in) == NULL)
+			fprintf(stderr, "Read error or end of file.\n");
 		return -1;
 	}
 
-- 
1.7.4.1



From s.hauer at pengutronix.de  Fri May  6 05:42:32 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 6 May 2011 11:42:32 +0200
Subject: barebox v2011.05.0
Message-ID: <20110506094232.GB14770@pengutronix.de>


Hi all,

We have v2011.05.0 out now. Most notable is that we have a new
architecture in barebox: Nios2. Thanks Franck.

Sascha

Baruch Siach (2):
      mtd/nand: increase page and oob size limits
      mtd/nand_imx: add support for page size of 4k

Franck JULLIEN (2):
      Add Nios2 arch support to barebox
      Add a generic board template for the Nios2 arch

Jean-Christophe PLAGNIOL-VILLARD (1):
      defaultenv: add kernel_loc nfs and tftp support

Juergen Beisert (9):
      Change 'linux16' command to use getopt()
      LINUX16: Add selection of the VESA video mode
      LINUX16: Fix warning
      S3C24xx/NFC: Re-enable the controller after NAND boot test
      S3C24xx/NFC: Remove dead code
      S3C24xx/NFC: Remove double function setup
      S3C24xx/NFC: Consider correct NAND page size for boot.
      S3C24xx/NFC: Setup ECC handling in accordance to the kernel
      S3C24xx/NFC: Add OOB/ECC handling documentation for different NANDs

Marc Kleine-Budde (1):
      fix printf warnings

Sascha Hauer (27):
      mci stmp378x: remove ifdefed code
      ARM Chumby: use a fixed framebuffer address
      mci i.MX23/28: rename driver to mxs.c
      mci mxs: put only once used function inline
      mci mxs: give functions a uniq mxs_mci_ namespace
      mci mxs: rename mci_pdata to host
      mci mxs: make the mci_host a member of mxs_mci_host
      mci mxs: no need to call mxs_mci_setup_clock_speed in init
      ARM tx28stk5: limit mmc max frequency to 25MHz
      Merge branch 'master' into next
      ARM scb9328: Add gpio led support
      ramfs: increase chunk size to 4 kbyte
      ARM: create a second level page table entry for the exception vectors
      ARM: Add stack unwinding support
      kallsyms/printk: enable symbol printing support (%pS)
      Merge branch 'master' into next
      Merge branch 'next'
      arm: update mach-types
      driver: Do not forget to remove device from active list
      memcpy command: do not set read/write size
      mmc: check correctness of the voltage mask in ocr
      fs: errno should be set correctly before the end of functions
      usbnet: do not initialize ethernet device from usb device
      ARM: Add missing parameter name
      sandbox: Fix another uninitialized dev->id case
      sandbox: make asm/swab.h nonempty
      Release v2011.05.0

 Makefile                                          |    4 +-
 arch/arm/Kconfig                                  |   10 +
 arch/arm/Makefile                                 |    4 +
 arch/arm/boards/a9m2410/a9m2410.c                 |    2 +-
 arch/arm/boards/a9m2440/a9m2440.c                 |    2 +-
 arch/arm/boards/at91sam9261ek/env/config          |    4 +-
 arch/arm/boards/at91sam9263ek/env/config          |    4 +-
 arch/arm/boards/at91sam9m10g45ek/env/config       |    4 +-
 arch/arm/boards/chumby_falconwing/falconwing.c    |   14 +-
 arch/arm/boards/eukrea_cpuimx25/env/config        |    2 +-
 arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c |    5 -
 arch/arm/boards/eukrea_cpuimx35/env/config        |    2 +-
 arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c |    5 -
 arch/arm/boards/eukrea_cpuimx51/env/config        |    2 +-
 arch/arm/boards/freescale-mx35-3-stack/env/config |    4 +-
 arch/arm/boards/freescale-mx51-pdk/board.c        |    6 -
 arch/arm/boards/freescale-mx51-pdk/env/config     |    4 +-
 arch/arm/boards/guf-cupid/board.c                 |    6 -
 arch/arm/boards/guf-cupid/env/config              |    4 +-
 arch/arm/boards/guf-neso/board.c                  |    5 -
 arch/arm/boards/guf-neso/env/config               |    4 +-
 arch/arm/boards/karo-tx25/env/config              |    4 +-
 arch/arm/boards/karo-tx28/env/config              |    4 +-
 arch/arm/boards/karo-tx28/tx28-stk5.c             |    7 +-
 arch/arm/boards/karo-tx28/tx28.c                  |    5 -
 arch/arm/boards/mini2440/env/config               |    4 +-
 arch/arm/boards/mini2440/mini2440.c               |    2 +-
 arch/arm/boards/nhk8815/env/config                |    4 +-
 arch/arm/boards/pcm037/env/config                 |    4 +-
 arch/arm/boards/pcm037/pcm037.c                   |    5 -
 arch/arm/boards/pcm038/env/config                 |    4 +-
 arch/arm/boards/pcm038/pcm038.c                   |    5 -
 arch/arm/boards/pcm043/env/config                 |    4 +-
 arch/arm/boards/pcm043/pcm043.c                   |    6 -
 arch/arm/boards/phycard-i.MX27/env/config         |    4 +-
 arch/arm/boards/phycard-i.MX27/pca100.c           |    5 -
 arch/arm/boards/pm9261/env/config                 |    4 +-
 arch/arm/boards/pm9g45/env/config                 |    4 +-
 arch/arm/boards/scb9328/scb9328.c                 |   24 +-
 arch/arm/boards/versatile/env/config              |    4 +-
 arch/arm/cpu/interrupts.c                         |    4 +
 arch/arm/cpu/mmu.c                                |   48 ++
 arch/arm/include/asm/armlinux.h                   |    2 +-
 arch/arm/include/asm/stacktrace.h                 |   16 +
 arch/arm/include/asm/unwind.h                     |   54 +++
 arch/arm/lib/Makefile                             |    2 +-
 arch/arm/lib/barebox.lds.S                        |   16 +
 arch/arm/lib/unwind.c                             |  344 ++++++++++++++
 arch/arm/mach-mxs/include/mach/mci.h              |    2 +-
 arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h |    2 +-
 arch/arm/tools/mach-types                         |  248 +++++++++--
 arch/nios2/Kconfig                                |   39 ++
 arch/nios2/Makefile                               |   25 +
 arch/nios2/boards/generic/Makefile                |    1 +
 arch/nios2/boards/generic/config.h                |   63 +++
 arch/nios2/boards/generic/env/config              |   16 +
 arch/nios2/boards/generic/generic.c               |   74 +++
 arch/nios2/boards/generic/nios_sopc.h             |  406 ++++++++++++++++
 arch/nios2/configs/generic_defconfig              |   23 +
 arch/nios2/cpu/Makefile                           |    6 +
 arch/nios2/cpu/barebox.lds.S                      |  124 +++++
 arch/nios2/cpu/cpu.c                              |   38 ++
 arch/nios2/cpu/exceptions.S                       |  160 +++++++
 arch/nios2/cpu/interrupts.c                       |  140 ++++++
 arch/nios2/cpu/start.S                            |  165 +++++++
 arch/nios2/cpu/traps.c                            |   43 ++
 arch/nios2/include/asm/barebox.h                  |    4 +
 arch/nios2/include/asm/bitops.h                   |    4 +
 arch/nios2/include/asm/bitsperlong.h              |    1 +
 arch/nios2/include/asm/byteorder.h                |    1 +
 arch/nios2/include/asm/cache.h                    |   21 +
 arch/nios2/include/asm/common.h                   |    4 +
 arch/nios2/include/asm/dma-mapping.h              |   25 +
 arch/nios2/include/asm/early_printf.h             |   10 +
 arch/nios2/include/asm/elf.h                      |  165 +++++++
 arch/nios2/include/asm/int-ll64.h                 |   78 +++
 arch/nios2/include/asm/io.h                       |   52 ++
 arch/nios2/include/asm/nios2-io.h                 |  182 +++++++
 arch/nios2/include/asm/nios2.h                    |   63 +++
 arch/nios2/include/asm/opcodes.h                  |  131 +++++
 arch/nios2/include/asm/posix_types.h              |   77 +++
 arch/nios2/include/asm/ptrace.h                   |   33 ++
 arch/nios2/include/asm/sections.h                 |    1 +
 arch/nios2/include/asm/string.h                   |   47 ++
 arch/nios2/include/asm/swab.h                     |    4 +
 arch/nios2/include/asm/system.h                   |   64 +++
 arch/nios2/include/asm/types.h                    |    7 +
 arch/nios2/lib/Makefile                           |    6 +
 arch/nios2/lib/board.c                            |   47 ++
 arch/nios2/lib/cache.c                            |   77 +++
 arch/nios2/lib/clock.c                            |   62 +++
 arch/nios2/lib/early_printf.c                     |   56 +++
 arch/nios2/lib/libgcc.c                           |  527 +++++++++++++++++++++
 arch/nios2/lib/longlong.h                         |  258 ++++++++++
 arch/sandbox/board/hostfile.c                     |    1 +
 arch/sandbox/include/asm/swab.h                   |    6 +
 commands/linux16.c                                |   54 ++-
 commands/mem.c                                    |    2 +-
 common/Kconfig                                    |    3 -
 common/kallsyms.c                                 |  148 ++++++-
 defaultenv/bin/boot                               |   13 +-
 drivers/mci/Kconfig                               |    2 +-
 drivers/mci/Makefile                              |    2 +-
 drivers/mci/mci-core.c                            |   12 +-
 drivers/mci/{stm378x.c => mxs.c}                  |  285 +++++------
 drivers/mtd/nand/nand_imx.c                       |    2 +-
 drivers/mtd/nand/nand_s3c2410.c                   |  131 ++++--
 drivers/net/usb/usbnet.c                          |    1 -
 fs/fs.c                                           |    5 +-
 fs/ramfs.c                                        |    2 +-
 include/kallsyms.h                                |    5 +
 include/linux/mtd/nand.h                          |    4 +-
 include/stdio.h                                   |    5 +
 lib/driver.c                                      |    1 +
 lib/vsprintf.c                                    |    1 +
 115 files changed, 4588 insertions(+), 365 deletions(-)
 create mode 100644 arch/arm/include/asm/stacktrace.h
 create mode 100644 arch/arm/include/asm/unwind.h
 create mode 100644 arch/arm/lib/unwind.c
 create mode 100644 arch/nios2/Kconfig
 create mode 100644 arch/nios2/Makefile
 create mode 100644 arch/nios2/boards/generic/Makefile
 create mode 100644 arch/nios2/boards/generic/config.h
 create mode 100644 arch/nios2/boards/generic/env/config
 create mode 100644 arch/nios2/boards/generic/generic.c
 create mode 100644 arch/nios2/boards/generic/nios_sopc.h
 create mode 100644 arch/nios2/configs/generic_defconfig
 create mode 100644 arch/nios2/cpu/Makefile
 create mode 100644 arch/nios2/cpu/barebox.lds.S
 create mode 100644 arch/nios2/cpu/cpu.c
 create mode 100644 arch/nios2/cpu/exceptions.S
 create mode 100644 arch/nios2/cpu/interrupts.c
 create mode 100644 arch/nios2/cpu/start.S
 create mode 100644 arch/nios2/cpu/traps.c
 create mode 100644 arch/nios2/include/asm/barebox.h
 create mode 100644 arch/nios2/include/asm/bitops.h
 create mode 100644 arch/nios2/include/asm/bitsperlong.h
 create mode 100644 arch/nios2/include/asm/byteorder.h
 create mode 100644 arch/nios2/include/asm/cache.h
 create mode 100644 arch/nios2/include/asm/common.h
 create mode 100644 arch/nios2/include/asm/dma-mapping.h
 create mode 100644 arch/nios2/include/asm/early_printf.h
 create mode 100644 arch/nios2/include/asm/elf.h
 create mode 100644 arch/nios2/include/asm/int-ll64.h
 create mode 100644 arch/nios2/include/asm/io.h
 create mode 100644 arch/nios2/include/asm/nios2-io.h
 create mode 100644 arch/nios2/include/asm/nios2.h
 create mode 100644 arch/nios2/include/asm/opcodes.h
 create mode 100644 arch/nios2/include/asm/posix_types.h
 create mode 100644 arch/nios2/include/asm/ptrace.h
 create mode 100644 arch/nios2/include/asm/sections.h
 create mode 100644 arch/nios2/include/asm/string.h
 create mode 100644 arch/nios2/include/asm/swab.h
 create mode 100644 arch/nios2/include/asm/system.h
 create mode 100644 arch/nios2/include/asm/types.h
 create mode 100644 arch/nios2/lib/Makefile
 create mode 100644 arch/nios2/lib/board.c
 create mode 100644 arch/nios2/lib/cache.c
 create mode 100644 arch/nios2/lib/clock.c
 create mode 100644 arch/nios2/lib/early_printf.c
 create mode 100644 arch/nios2/lib/libgcc.c
 create mode 100644 arch/nios2/lib/longlong.h
 rename drivers/mci/{stm378x.c => mxs.c} (69%)
-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Sun May  8 07:09:36 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun,  8 May 2011 13:09:36 +0200
Subject: [PATCH] at91: Support for at91rm9200: core chip & board support
Message-ID: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre at atmel.com>
Cc: Patrice Vilchez <patrice.vilchez at atmel.com>
---
 arch/arm/Makefile                                 |    1 +
 arch/arm/boards/at91rm9200ek/Makefile             |    1 +
 arch/arm/boards/at91rm9200ek/config.h             |   68 +++++
 arch/arm/boards/at91rm9200ek/env/config           |   41 +++
 arch/arm/boards/at91rm9200ek/init.c               |   77 ++++++
 arch/arm/configs/at91rm9200ek_defconfig           |   47 ++++
 arch/arm/mach-at91/Kconfig                        |   27 ++
 arch/arm/mach-at91/Makefile                       |    5 +-
 arch/arm/mach-at91/at91rm9200.c                   |  245 ++++++++++++++++++
 arch/arm/mach-at91/at91rm9200_devices.c           |  276 ++++++++++++++++++++
 arch/arm/mach-at91/at91rm9200_lowlevel_init.c     |  146 +++++++++++
 arch/arm/mach-at91/at91rm9200_time.c              |   97 +++++++
 arch/arm/mach-at91/at91sam926x_lowlevel_init.S    |  278 +++++++++++++++++++++
 arch/arm/mach-at91/include/mach/at91_st.h         |   49 ++++
 arch/arm/mach-at91/include/mach/at91_tc.h         |  146 +++++++++++
 arch/arm/mach-at91/include/mach/at91rm9200.h      |  127 ++++++++++
 arch/arm/mach-at91/include/mach/at91rm9200_emac.h |  138 ++++++++++
 arch/arm/mach-at91/include/mach/at91rm9200_mc.h   |  160 ++++++++++++
 arch/arm/mach-at91/lowlevel_init.S                |  278 ---------------------
 19 files changed, 1928 insertions(+), 279 deletions(-)
 create mode 100644 arch/arm/boards/at91rm9200ek/Makefile
 create mode 100644 arch/arm/boards/at91rm9200ek/config.h
 create mode 100644 arch/arm/boards/at91rm9200ek/env/config
 create mode 100644 arch/arm/boards/at91rm9200ek/init.c
 create mode 100644 arch/arm/configs/at91rm9200ek_defconfig
 create mode 100644 arch/arm/mach-at91/at91rm9200.c
 create mode 100644 arch/arm/mach-at91/at91rm9200_devices.c
 create mode 100644 arch/arm/mach-at91/at91rm9200_lowlevel_init.c
 create mode 100644 arch/arm/mach-at91/at91rm9200_time.c
 create mode 100644 arch/arm/mach-at91/at91sam926x_lowlevel_init.S
 create mode 100644 arch/arm/mach-at91/include/mach/at91_st.h
 create mode 100644 arch/arm/mach-at91/include/mach/at91_tc.h
 create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200.h
 create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_emac.h
 create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h
 delete mode 100644 arch/arm/mach-at91/lowlevel_init.S

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 108bd5e..5981616 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -57,6 +57,7 @@ machine-$(CONFIG_ARCH_VERSATILE)	:= versatile
 # by CONFIG_* macro name.
 board-$(CONFIG_MACH_A9M2410)			:= a9m2410
 board-$(CONFIG_MACH_A9M2440)			:= a9m2440
+board-$(CONFIG_MACH_AT91RM9200EK)		:= at91rm9200ek
 board-$(CONFIG_MACH_AT91SAM9260EK)		:= at91sam9260ek
 board-$(CONFIG_MACH_AT91SAM9261EK)		:= at91sam9261ek
 board-$(CONFIG_MACH_AT91SAM9263EK)		:= at91sam9263ek
diff --git a/arch/arm/boards/at91rm9200ek/Makefile b/arch/arm/boards/at91rm9200ek/Makefile
new file mode 100644
index 0000000..eb072c0
--- /dev/null
+++ b/arch/arm/boards/at91rm9200ek/Makefile
@@ -0,0 +1 @@
+obj-y += init.o
diff --git a/arch/arm/boards/at91rm9200ek/config.h b/arch/arm/boards/at91rm9200ek/config.h
new file mode 100644
index 0000000..b630a67
--- /dev/null
+++ b/arch/arm/boards/at91rm9200ek/config.h
@@ -0,0 +1,68 @@
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
+
+#define MASTER_PLL_MUL		39
+#define MASTER_PLL_DIV		4
+
+/* clocks */
+#define CONFIG_SYS_MOR_VAL						\
+		(AT91_PMC_MOSCEN |					\
+		 (255 << 8))		/* Main Oscillator Start-up Time */
+#define CONFIG_SYS_PLLAR_VAL						\
+		(AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ \
+		 (0x3e << 8) |		/* PLL Counter */		\
+		 (0 << 14) |		/* Divider A */			\
+		 ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV))
+
+#define CONFIG_SYS_PLLBR_VAL	0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
+/* PCK/2 = MCK Master Clock from SLOW */
+#define	CONFIG_SYS_MCKR2_VAL1		\
+		(AT91_PMC_CSS_SLOW |	\
+		 AT91RM9200_PMC_MDIV_2) \
+
+/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
+#define	CONFIG_SYS_MCKR2_VAL2		\
+		(AT91_PMC_CSS_PLLA |	\
+		 AT91_PMC_PRES_1 |	\
+		 AT91RM9200_PMC_MDIV_3 |\
+		 AT91_PMC_PDIV_1)
+
+/* flash */
+#define CONFIG_SYS_EBI_CFGR_VAL	0x00000000
+#define CONFIG_SYS_SMC_CSR0_VAL							\
+		(AT91_SMC_NWS_(4) |	/* Number of Wait States */		\
+		 AT91_SMC_WSEN |	/* Wait State Enable */			\
+		 AT91_SMC_TDF_(2) |	/* Data Float Time */			\
+		 AT91_SMC_BAT |		/* Byte Access Type */			\
+		 AT91_SMC_DBW_16)	/* Data Bus Width */
+
+/* sdram */
+#define CONFIG_SYS_PIOC_ASR_VAL	0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
+#define CONFIG_SYS_PIOC_BSR_VAL	0x00000000
+#define CONFIG_SYS_PIOC_PDR_VAL	0xFFFF0000
+#define CONFIG_SYS_EBI_CSA_VAL							\
+		(AT91_EBI_CS0A_SMC |						\
+		 AT91_EBI_CS1A_SDRAMC |						\
+		 AT91_EBI_CS3A_SMC |						\
+		 AT91_EBI_CS4A_SMC)						\
+
+/* SDRAM */
+/* SDRAMC_MR Mode register */
+/* SDRAMC_CR - Configuration register*/
+#define CONFIG_SYS_SDRC_CR_VAL							\
+		(AT91_SDRAMC_NC_9 |						\
+		 AT91_SDRAMC_NR_12 |						\
+		 AT91_SDRAMC_NB_4 |						\
+		 AT91_SDRAMC_CAS_2 |						\
+		 (1 <<  8) |		/* Write Recovery Delay */		\
+		 (12 << 12) |		/* Row Cycle Delay */			\
+		 (8 << 16) |		/* Row Precharge Delay */		\
+		 (8 << 20) |		/* Row to Column Delay */		\
+		 (1 << 24) |		/* Active to Precharge Delay */		\
+		 (2 << 28))		/* Exit Self Refresh to Active Delay */
+
+#define CONFIG_SYS_SDRC_TR_VAL	0x000002E0 /* Write refresh rate */
+
+#endif	/* __CONFIG_H */
diff --git a/arch/arm/boards/at91rm9200ek/env/config b/arch/arm/boards/at91rm9200ek/env/config
new file mode 100644
index 0000000..1b56b25
--- /dev/null
+++ b/arch/arm/boards/at91rm9200ek/env/config
@@ -0,0 +1,41 @@
+#!/bin/sh
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'nfs', 'tftp' or 'nor'
+kernel_loc=tftp
+# can be either 'net', 'nor' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root.$rootfs_type
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+#kernelimage_type=zimage
+#kernelimage=zImage
+kernelimage_type=uimage
+kernelimage=uImage
+#kernelimage_type=raw
+#kernelimage=Image
+#kernelimage_type=raw_lzo
+#kernelimage=Image.lzo
+
+nor_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nor=3
+
+autoboot_timeout=3
+
+bootargs="console=ttyS0,115200"
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;31m[barebox@\h]:\w\e[0m\n# "
+
diff --git a/arch/arm/boards/at91rm9200ek/init.c b/arch/arm/boards/at91rm9200ek/init.c
new file mode 100644
index 0000000..a449326
--- /dev/null
+++ b/arch/arm/boards/at91rm9200ek/init.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2009-2011 Jean-Christophe PLAGNIOL-VILLARD <plagnio at jcrosoft.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <net.h>
+#include <init.h>
+#include <environment.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <mach/at91_pmc.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/io.h>
+
+static struct device_d cfi_dev = {
+	.id		= 0,
+	.name		= "cfi_flash",
+	.map_base	= AT91_CHIPSELECT_0,
+};
+
+static struct at91_ether_platform_data ether_pdata = {
+	.flags = AT91SAM_ETHER_RMII,
+	.phy_addr = 0,
+};
+
+static int at91rm9200ek_devices_init(void)
+{
+	/*
+	 * Correct IRDA resistor problem
+	 * Set PA23_TXD in Output
+	 */
+	at91_set_gpio_output(AT91_PIN_PA23, 1);
+
+	at91_add_device_sdram(64 * 1024 * 1024);
+	at91_add_device_eth(&ether_pdata);
+	register_device(&cfi_dev);
+
+#if defined(CONFIG_DRIVER_CFI) || defined(CONFIG_DRIVER_CFI_OLD)
+	devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self");
+	devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
+#endif
+
+	armlinux_set_bootparams((void *)(AT91_CHIPSELECT_1 + 0x100));
+	armlinux_set_architecture(MACH_TYPE_AT91RM9200EK);
+
+	return 0;
+}
+device_initcall(at91rm9200ek_devices_init);
+
+static int at91rm9200ek_console_init(void)
+{
+	at91_register_uart(0, 0);
+	return 0;
+}
+console_initcall(at91rm9200ek_console_init);
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig
new file mode 100644
index 0000000..0c10f88
--- /dev/null
+++ b/arch/arm/configs/at91rm9200ek_defconfig
@@ -0,0 +1,47 @@
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_PROMPT="9200-EK:"
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91rm9200ek/env"
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENU_MANAGEMENT=y
+CONFIG_CMD_PASSWD=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_BOOTM_ZLIB=y
+CONFIG_CMD_BOOTM_BZLIB=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNLZO=y
+# CONFIG_SPI is not set
+CONFIG_DRIVER_CFI=y
+# CONFIG_DRIVER_CFI_INTEL is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set
+# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
+CONFIG_CFI_BUFFER_WRITE=y
+CONFIG_MTD=y
+CONFIG_UBI=y
+CONFIG_FS_CRAMFS=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index bf6ad7e..82d593a 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -6,6 +6,7 @@ config ARCH_TEXT_BASE
 	default 0x23f00000
 
 config BOARDINFO
+	default "Atmel at91rm9200-ek" if MACH_AT91RM9200EK
 	default "Atmel 91SAM9260-EK" if MACH_AT91SAM9260EK
 	default "Atmel at91sam9261-ek" if MACH_AT91SAM9261EK
 	default "Atmel at91sam9263-ek" if MACH_AT91SAM9263EK
@@ -25,6 +26,14 @@ comment "Atmel AT91 System-on-Chip"
 choice
 	prompt "Atmel AT91 Processor"
 
+config ARCH_AT91RM9200
+	bool "AT91RM9200"
+	select CPU_ARM920T
+	select HAS_AT91_ETHER
+	select ARCH_HAS_LOWLEVEL_INIT
+	select MACH_HAS_LOWLEVEL_INIT
+	select MACH_DO_LOWLEVEL_INIT
+
 config ARCH_AT91SAM9260
 	bool "AT91SAM9260"
 	select CPU_ARM926T
@@ -57,6 +66,24 @@ endchoice
 
 # ----------------------------------------------------------
 
+if ARCH_AT91RM9200
+
+choice
+
+	prompt "AT91RM9200 Board Type"
+
+config MACH_AT91RM9200EK
+	bool "Atmel AT91RM9200-EK Evaluation Kit"
+	help
+	  Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
+	  <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
+
+endchoice
+
+endif
+
+# ----------------------------------------------------------
+
 if ARCH_AT91SAM9260
 
 choice
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index d57c8f5..e72f409 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -1,8 +1,11 @@
 obj-y += clock.o gpio.o
 
-obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += lowlevel_init.o
+lowlevel_init-y = at91sam926x_lowlevel_init.o
+lowlevel_init-$(CONFIG_ARCH_AT91RM9200) = at91rm9200_lowlevel_init.o
+obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y)
 
 # CPU-specific support
+obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
new file mode 100644
index 0000000..6baf1a7
--- /dev/null
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -0,0 +1,245 @@
+#include <common.h>
+#include <gpio.h>
+#include <init.h>
+#include <asm/hardware.h>
+#include <mach/at91_pmc.h>
+
+#include "clock.h"
+#include "generic.h"
+
+/* --------------------------------------------------------------------
+ *  Clocks
+ * -------------------------------------------------------------------- */
+
+/*
+ * The peripheral clocks.
+ */
+static struct clk udc_clk = {
+	.name		= "udc_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_UDP,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk ohci_clk = {
+	.name		= "ohci_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_UHP,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk ether_clk = {
+	.name		= "ether_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_EMAC,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc_clk = {
+	.name		= "mci_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_MCI,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi_clk = {
+	.name		= "twi_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_TWI,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart0_clk = {
+	.name		= "usart0_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_US0,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart1_clk = {
+	.name		= "usart1_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_US1,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart2_clk = {
+	.name		= "usart2_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_US2,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart3_clk = {
+	.name		= "usart3_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_US3,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi_clk = {
+	.name		= "spi_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_SPI,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioA_clk = {
+	.name		= "pioA_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_PIOA,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioB_clk = {
+	.name		= "pioB_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_PIOB,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioC_clk = {
+	.name		= "pioC_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_PIOC,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioD_clk = {
+	.name		= "pioD_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc0_clk = {
+	.name		= "ssc0_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_SSC0,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc1_clk = {
+	.name		= "ssc1_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_SSC1,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc2_clk = {
+	.name		= "ssc2_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_SSC2,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc0_clk = {
+	.name		= "tc0_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_TC0,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc1_clk = {
+	.name		= "tc1_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_TC1,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc2_clk = {
+	.name		= "tc2_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_TC2,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc3_clk = {
+	.name		= "tc3_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_TC3,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc4_clk = {
+	.name		= "tc4_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_TC4,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc5_clk = {
+	.name		= "tc5_clk",
+	.pmc_mask	= 1 << AT91RM9200_ID_TC5,
+	.type		= CLK_TYPE_PERIPHERAL,
+};
+
+static struct clk *periph_clocks[] __initdata = {
+	&pioA_clk,
+	&pioB_clk,
+	&pioC_clk,
+	&pioD_clk,
+	&usart0_clk,
+	&usart1_clk,
+	&usart2_clk,
+	&usart3_clk,
+	&mmc_clk,
+	&udc_clk,
+	&twi_clk,
+	&spi_clk,
+	&ssc0_clk,
+	&ssc1_clk,
+	&ssc2_clk,
+	&tc0_clk,
+	&tc1_clk,
+	&tc2_clk,
+	&tc3_clk,
+	&tc4_clk,
+	&tc5_clk,
+	&ohci_clk,
+	&ether_clk,
+	// irq0 .. irq6
+};
+
+/*
+ * The four programmable clocks.
+ * You must configure pin multiplexing to bring these signals out.
+ */
+static struct clk pck0 = {
+	.name		= "pck0",
+	.pmc_mask	= AT91_PMC_PCK0,
+	.type		= CLK_TYPE_PROGRAMMABLE,
+	.id		= 0,
+};
+static struct clk pck1 = {
+	.name		= "pck1",
+	.pmc_mask	= AT91_PMC_PCK1,
+	.type		= CLK_TYPE_PROGRAMMABLE,
+	.id		= 1,
+};
+static struct clk pck2 = {
+	.name		= "pck2",
+	.pmc_mask	= AT91_PMC_PCK2,
+	.type		= CLK_TYPE_PROGRAMMABLE,
+	.id		= 2,
+};
+static struct clk pck3 = {
+	.name		= "pck3",
+	.pmc_mask	= AT91_PMC_PCK3,
+	.type		= CLK_TYPE_PROGRAMMABLE,
+	.id		= 3,
+};
+
+static void __init at91rm9200_register_clocks(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
+		clk_register(periph_clocks[i]);
+
+	clk_register(&pck0);
+	clk_register(&pck1);
+	clk_register(&pck2);
+	clk_register(&pck3);
+}
+
+/* --------------------------------------------------------------------
+ *  GPIO
+ * -------------------------------------------------------------------- */
+
+static struct at91_gpio_bank at91rm9200_gpio[] = {
+	{
+		.id		= AT91RM9200_ID_PIOA,
+		.offset		= AT91_PIOA,
+		.clock		= &pioA_clk,
+	}, {
+		.id		= AT91RM9200_ID_PIOB,
+		.offset		= AT91_PIOB,
+		.clock		= &pioB_clk,
+	}, {
+		.id		= AT91RM9200_ID_PIOC,
+		.offset		= AT91_PIOC,
+		.clock		= &pioC_clk,
+	}, {
+		.id		= AT91RM9200_ID_PIOD,
+		.offset		= AT91_PIOD,
+		.clock		= &pioD_clk,
+	}
+};
+
+
+/* --------------------------------------------------------------------
+ *  AT91RM9200 processor initialization
+ * -------------------------------------------------------------------- */
+static int __init at91rm9200_initialize(void)
+{
+
+	/* Init clock subsystem */
+	at91_clock_init(AT91_MAIN_CLOCK);
+
+	/* Register the processor-specific clocks */
+	at91rm9200_register_clocks();
+
+	/* Initialize GPIO subsystem */
+	at91_gpio_init(at91rm9200_gpio, ARRAY_SIZE(at91rm9200_gpio));
+
+	return 0;
+}
+
+core_initcall(at91rm9200_initialize);
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
new file mode 100644
index 0000000..f45008a
--- /dev/null
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -0,0 +1,276 @@
+/*
+ * arch/arm/mach-at91/at91rm9200_devices.c
+ *
+ *  Copyright (C) 2005 Thibaut VARENE <varenet at parisc-linux.org>
+ *  Copyright (C) 2005 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <common.h>
+#include <asm/armlinux.h>
+#include <mach/hardware.h>
+#include <mach/at91rm9200.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/io.h>
+
+#include "generic.h"
+
+static struct memory_platform_data ram_pdata = {
+	.name = "ram0",
+	.flags = DEVFS_RDWR,
+};
+
+static struct device_d sdram_dev = {
+	.id = -1,
+	.name = "mem",
+	.map_base = AT91_CHIPSELECT_1,
+	.platform_data = &ram_pdata,
+};
+
+void at91_add_device_sdram(u32 size)
+{
+	sdram_dev.size = size;
+	register_device(&sdram_dev);
+	armlinux_add_dram(&sdram_dev);
+}
+
+/* --------------------------------------------------------------------
+ *  Ethernet
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_DRIVER_NET_AT91_ETHER)
+static struct device_d at91rm9200_eth_device = {
+	.id		= 0,
+	.name		= "at91_ether",
+	.map_base	= AT91_VA_BASE_EMAC,
+	.size		= 0x1000,
+};
+
+void __init at91_add_device_eth(struct at91_ether_platform_data *data)
+{
+	if (!data)
+		return;
+
+	/* Pins used for MII and RMII */
+	at91_set_A_periph(AT91_PIN_PA16, 0);	/* EMDIO */
+	at91_set_A_periph(AT91_PIN_PA15, 0);	/* EMDC */
+	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERXER */
+	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ERX1 */
+	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ERX0 */
+	at91_set_A_periph(AT91_PIN_PA11, 0);	/* ECRS_ECRSDV */
+	at91_set_A_periph(AT91_PIN_PA10, 0);	/* ETX1 */
+	at91_set_A_periph(AT91_PIN_PA9, 0);	/* ETX0 */
+	at91_set_A_periph(AT91_PIN_PA8, 0);	/* ETXEN */
+	at91_set_A_periph(AT91_PIN_PA7, 0);	/* ETXCK_EREFCK */
+
+	if (!(data->flags & AT91SAM_ETHER_RMII)) {
+		at91_set_B_periph(AT91_PIN_PB19, 0);	/* ERXCK */
+		at91_set_B_periph(AT91_PIN_PB18, 0);	/* ECOL */
+		at91_set_B_periph(AT91_PIN_PB17, 0);	/* ERXDV */
+		at91_set_B_periph(AT91_PIN_PB16, 0);	/* ERX3 */
+		at91_set_B_periph(AT91_PIN_PB15, 0);	/* ERX2 */
+		at91_set_B_periph(AT91_PIN_PB14, 0);	/* ETXER */
+		at91_set_B_periph(AT91_PIN_PB13, 0);	/* ETX3 */
+		at91_set_B_periph(AT91_PIN_PB12, 0);	/* ETX2 */
+	}
+
+	at91rm9200_eth_device.platform_data = data;
+	register_device(&at91rm9200_eth_device);
+}
+#else
+void __init at91_add_device_eth(struct at91_ether_platform_data *data) {}
+#endif
+
+/* --------------------------------------------------------------------
+ *  NAND / SmartMedia
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_NAND_ATMEL)
+static struct device_d at91rm9200_nand_device = {
+	.id		= -1,
+	.name		= "atmel_nand",
+	.map_base	= AT91_CHIPSELECT_3,
+	.size		= 0x10,
+};
+
+void __init at91_add_device_nand(struct atmel_nand_data *data)
+{
+	unsigned int csa;
+
+	if (!data)
+		return;
+
+	/* enable the address range of CS3 */
+	csa = at91_sys_read(AT91_EBI_CSA);
+	at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
+
+	/* set the bus interface characteristics */
+	at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
+		| AT91_SMC_NWS_(5)
+		| AT91_SMC_TDF_(1)
+		| AT91_SMC_RWSETUP_(0)	/* tDS Data Set up Time 30 - ns */
+		| AT91_SMC_RWHOLD_(1)	/* tDH Data Hold Time 20 - ns */
+	);
+
+	/* enable pin */
+	if (data->enable_pin)
+		at91_set_gpio_output(data->enable_pin, 1);
+
+	/* ready/busy pin */
+	if (data->rdy_pin)
+		at91_set_gpio_input(data->rdy_pin, 1);
+
+	/* card detect pin */
+	if (data->det_pin)
+		at91_set_gpio_input(data->det_pin, 1);
+
+	at91_set_A_periph(AT91_PIN_PC1, 0);		/* SMOE */
+	at91_set_A_periph(AT91_PIN_PC3, 0);		/* SMWE */
+
+	at91rm9200_nand_device.platform_data = data;
+	platform_device_register(&at91rm9200_nand_device);
+}
+#else
+void __init at91_add_device_nand(struct atmel_nand_data *data) {}
+#endif
+
+/* --------------------------------------------------------------------
+ *  UART
+ * -------------------------------------------------------------------- */
+
+static struct device_d dbgu_serial_device = {
+	.id		= 0,
+	.name		= "atmel_serial",
+	.map_base	= (AT91_BASE_SYS + AT91_DBGU),
+	.size		= 4096,
+};
+
+static inline void configure_dbgu_pins(void)
+{
+	at91_set_A_periph(AT91_PIN_PA30, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PA31, 1);		/* DTXD */
+}
+
+static struct device_d uart0_serial_device = {
+	.id		= 1,
+	.name		= "atmel_serial",
+	.map_base	= AT91RM9200_BASE_US0,
+	.size		= 4096,
+};
+
+static inline void configure_usart0_pins(unsigned pins)
+{
+	at91_set_A_periph(AT91_PIN_PA17, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PA18, 0);		/* RXD0 */
+
+	if (pins & ATMEL_UART_CTS)
+		at91_set_A_periph(AT91_PIN_PA20, 0);	/* CTS0 */
+
+	if (pins & ATMEL_UART_RTS) {
+		/*
+		 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
+		 *  We need to drive the pin manually.  Default is off (RTS is active low).
+		 */
+		at91_set_gpio_output(AT91_PIN_PA21, 1);
+	}
+}
+
+static struct device_d uart1_serial_device = {
+	.id		= 2,
+	.name		= "atmel_serial",
+	.map_base	= AT91RM9200_BASE_US1,
+	.size		= 4096,
+};
+
+static inline void configure_usart1_pins(unsigned pins)
+{
+	at91_set_A_periph(AT91_PIN_PB20, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PB21, 0);		/* RXD1 */
+
+	if (pins & ATMEL_UART_RI)
+		at91_set_A_periph(AT91_PIN_PB18, 0);	/* RI1 */
+	if (pins & ATMEL_UART_DTR)
+		at91_set_A_periph(AT91_PIN_PB19, 0);	/* DTR1 */
+	if (pins & ATMEL_UART_DCD)
+		at91_set_A_periph(AT91_PIN_PB23, 0);	/* DCD1 */
+	if (pins & ATMEL_UART_CTS)
+		at91_set_A_periph(AT91_PIN_PB24, 0);	/* CTS1 */
+	if (pins & ATMEL_UART_DSR)
+		at91_set_A_periph(AT91_PIN_PB25, 0);	/* DSR1 */
+	if (pins & ATMEL_UART_RTS)
+		at91_set_A_periph(AT91_PIN_PB26, 0);	/* RTS1 */
+}
+
+static struct device_d uart2_serial_device = {
+	.id		= 3,
+	.name		= "atmel_serial",
+	.map_base	= AT91RM9200_BASE_US2,
+	.size		= 4096,
+};
+
+static inline void configure_usart2_pins(unsigned pins)
+{
+	at91_set_A_periph(AT91_PIN_PA22, 0);		/* RXD2 */
+	at91_set_A_periph(AT91_PIN_PA23, 1);		/* TXD2 */
+
+	if (pins & ATMEL_UART_CTS)
+		at91_set_B_periph(AT91_PIN_PA30, 0);	/* CTS2 */
+	if (pins & ATMEL_UART_RTS)
+		at91_set_B_periph(AT91_PIN_PA31, 0);	/* RTS2 */
+}
+
+static struct device_d uart3_serial_device = {
+	.id		= 4,
+	.name		= "atmel_serial",
+	.map_base	= AT91RM9200_BASE_US3,
+	.size		= 4096,
+};
+
+static inline void configure_usart3_pins(unsigned pins)
+{
+	at91_set_B_periph(AT91_PIN_PA5, 1);		/* TXD3 */
+	at91_set_B_periph(AT91_PIN_PA6, 0);		/* RXD3 */
+
+	if (pins & ATMEL_UART_CTS)
+		at91_set_B_periph(AT91_PIN_PB1, 0);	/* CTS3 */
+	if (pins & ATMEL_UART_RTS)
+		at91_set_B_periph(AT91_PIN_PB0, 0);	/* RTS3 */
+}
+
+void __init at91_register_uart(unsigned id, unsigned pins)
+{
+	switch (id) {
+		case 0:		/* DBGU */
+			configure_dbgu_pins();
+			at91_clock_associate("mck", &dbgu_serial_device, "usart");
+			register_device(&dbgu_serial_device);
+			break;
+		case AT91RM9200_ID_US0:
+			configure_usart0_pins(pins);
+			at91_clock_associate("usart0_clk", &uart0_serial_device, "usart");
+			break;
+		case AT91RM9200_ID_US1:
+			configure_usart1_pins(pins);
+			at91_clock_associate("usart1_clk", &uart1_serial_device, "usart");
+			register_device(&uart1_serial_device);
+			break;
+		case AT91RM9200_ID_US2:
+			configure_usart2_pins(pins);
+			at91_clock_associate("usart2_clk", &uart2_serial_device, "usart");
+			register_device(&uart2_serial_device);
+			break;
+		case AT91RM9200_ID_US3:
+			configure_usart3_pins(pins);
+			at91_clock_associate("usart3_clk", &uart3_serial_device, "usart");
+			register_device(&uart3_serial_device);
+			break;
+		default:
+			return;
+	}
+
+}
diff --git a/arch/arm/mach-at91/at91rm9200_lowlevel_init.c b/arch/arm/mach-at91/at91rm9200_lowlevel_init.c
new file mode 100644
index 0000000..8d9ae08
--- /dev/null
+++ b/arch/arm/mach-at91/at91rm9200_lowlevel_init.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2009-2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
+ *
+ * Under GPLv2
+ */
+
+#include <common.h>
+#include <asm/system.h>
+#include <asm/barebox-arm.h>
+#include <mach/hardware.h>
+#include <mach/at91rm9200.h>
+#include <mach/at91rm9200_mc.h>
+#include <mach/at91_pio.h>
+#include <mach/at91_pmc.h>
+#include <mach/io.h>
+#include <init.h>
+
+void static inline access_sdram(void)
+{
+	writel(0x00000000, AT91_SDRAM_BASE);
+}
+
+void __naked __bare_init arch_init_lowlevel(void)
+{
+	/*
+	 * relocate exception table
+	 */
+	__asm__ __volatile__ (
+"	ldr	r0, =exception_vectors\n"
+"	ldr	r1, =0x0\n"
+"	mov	r2, #16\n"
+"loopev:\n"
+"	subs	r2, r2, #1\n"
+"	ldr	r3, [r0], #4\n"
+"	str	r3, [r1], #4\n"
+"	bne	loopev\n"
+"	mov	pc, lr\n"
+);
+}
+
+void __naked __bare_init board_init_lowlevel(void)
+{
+	u32 r;
+	int i;
+
+	/*
+	 * PMC Check if the PLL is already initialized
+	 */
+	r = at91_sys_read(AT91_PMC_MCKR);
+	if (r & AT91_PMC_CSS)
+		goto end;
+
+	/*
+	 * Enable the Main Oscillator
+	 */
+	at91_sys_write(AT91_CKGR_MOR, CONFIG_SYS_MOR_VAL);
+
+	do {
+		r = at91_sys_read(AT91_PMC_SR);
+	} while (!(r & AT91_PMC_MOSCS));
+
+	/*
+	 * EBI_CFGR
+	 */
+	at91_sys_write(AT91_EBI_CFGR, CONFIG_SYS_EBI_CFGR_VAL);
+
+	/*
+	 * SMC2_CSR[0]: 16bit, 2 TDF, 4 WS
+	 */
+	at91_sys_write(AT91_SMC_CSR(0), CONFIG_SYS_SMC_CSR0_VAL);
+
+	/*
+	 * Init Clocks
+	 */
+
+	/*
+	 * PLLAR: x MHz for PCK
+	 */
+	at91_sys_write(AT91_CKGR_PLLAR, CONFIG_SYS_PLLAR_VAL);
+
+	do {
+		r = at91_sys_read(AT91_PMC_SR);
+	} while (!(r & AT91_PMC_LOCKA));
+
+	/*
+	 * PCK/x = MCK Master Clock from SLOW
+	 */
+	at91_sys_write(AT91_PMC_MCKR, CONFIG_SYS_MCKR2_VAL1);
+
+	/*
+	 * PCK/x = MCK Master Clock from PLLA
+	 */
+	at91_sys_write(AT91_PMC_MCKR, CONFIG_SYS_MCKR2_VAL2);
+
+	do {
+		r = at91_sys_read(AT91_PMC_SR);
+	} while (!(r & AT91_PMC_MCKRDY));
+
+	/*
+	 * Init SDRAM
+	 */
+
+	/* PIOC_ASR: Configure PIOC as peripheral (D16/D31) */
+	at91_sys_write(AT91_PIOC + PIO_ASR, CONFIG_SYS_PIOC_ASR_VAL);
+	/* PIOC_BSR */
+	at91_sys_write(AT91_PIOC + PIO_BSR, CONFIG_SYS_PIOC_BSR_VAL);
+	/* PIOC_PDR */
+	at91_sys_write(AT91_PIOC + PIO_PDR, CONFIG_SYS_PIOC_PDR_VAL);
+
+	/* EBI_CSA : CS1=SDRAM */
+	at91_sys_write(AT91_EBI_CSA, CONFIG_SYS_EBI_CSA_VAL);
+
+	/* SDRC_CR */
+	at91_sys_write(AT91_SDRAMC_CR, CONFIG_SYS_SDRC_CR_VAL);
+	/* SDRC_MR : Precharge All */
+	at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_PRECHARGE);
+	/* access SDRAM */
+	access_sdram();
+	/* SDRC_MR : refresh */
+	at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_REFRESH);
+
+	/* access SDRAM 8 times */
+	for (i = 0; i < 8; i++)
+		access_sdram();
+
+	/* SDRC_MR : Load Mode Register */
+	at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_LMR);
+	/* access SDRAM */
+	access_sdram();
+	/* SDRC_TR : Write refresh rate */
+	at91_sys_write(AT91_SDRAMC_TR, CONFIG_SYS_SDRC_TR_VAL);
+	/* access SDRAM */
+	access_sdram();
+	/* SDRC_MR : Normal Mode */
+	at91_sys_write(AT91_SDRAMC_MR, AT91_SDRAMC_MODE_NORMAL);
+	/* access SDRAM */
+	access_sdram();
+
+	/* switch from FastBus to Asynchronous clock mode */
+	r = get_cr();
+	r |= 0xC0000000;	/* set bit 31 (iA) and 30 (nF) */
+	set_cr(r);
+
+end:
+	board_init_lowlevel_return();
+}
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
new file mode 100644
index 0000000..92b9e66
--- /dev/null
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -0,0 +1,97 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger at sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu at sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj at denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <init.h>
+#include <clock.h>
+#include <mach/hardware.h>
+#include <mach/at91_tc.h>
+#include <mach/at91_st.h>
+#include <mach/at91_pmc.h>
+#include <mach/io.h>
+#include <asm/io.h>
+
+/*
+ * The ST_CRTR is updated asynchronously to the master clock ... but
+ * the updates as seen by the CPU don't seem to be strictly monotonic.
+ * Waiting until we read the same value twice avoids glitching.
+ */
+uint64_t at91rm9200_clocksource_read(void)
+{
+	unsigned long x1, x2;
+
+	x1 = at91_sys_read(AT91_ST_CRTR);
+	do {
+		x2 = at91_sys_read(AT91_ST_CRTR);
+		if (x1 == x2)
+			break;
+		x1 = x2;
+	} while (1);
+	return x1;
+}
+
+static struct clocksource cs = {
+	.mask	= CLOCKSOURCE_MASK(20),
+	.read	= at91rm9200_clocksource_read,
+	.shift	= 10,
+};
+
+static int clocksource_init (void)
+{
+	/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
+	 * directly for the clocksource and all clockevents, after adjusting
+	 * its prescaler from the 1 Hz default.
+	 */
+	at91_sys_write(AT91_ST_RTMR, 1);
+
+	cs.mult = clocksource_hz2mult(AT91_SLOW_CLOCK, cs.shift);
+
+	init_clock(&cs);
+
+	return 0;
+}
+core_initcall(clocksource_init);
+
+/*
+ * Reset the cpu through the reset controller
+ */
+void __noreturn reset_cpu (unsigned long ignored)
+{
+	/*
+	 * Perform a hardware reset with the use of the Watchdog timer.
+	 */
+	at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
+	at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+
+	/* Not reached */
+	while (1);
+}
+EXPORT_SYMBOL(reset_cpu);
diff --git a/arch/arm/mach-at91/at91sam926x_lowlevel_init.S b/arch/arm/mach-at91/at91sam926x_lowlevel_init.S
new file mode 100644
index 0000000..805b201
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam926x_lowlevel_init.S
@@ -0,0 +1,278 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
+ *		       Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
+ *
+ * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <mach/hardware.h>
+#include <mach/at91_pmc.h>
+#include <mach/at91_pio.h>
+#include <mach/at91_rstc.h>
+#include <mach/at91_wdt.h>
+#include <mach/at91sam9_matrix.h>
+#include <mach/at91sam9_sdramc.h>
+#include <mach/at91sam9_smc.h>
+
+_TEXT_BASE:
+	.word	TEXT_BASE
+
+.globl board_init_lowlevel
+.type board_init_lowlevel,function
+board_init_lowlevel:
+
+	mov	r5, pc		/* r5 = POS1 + 4 current */
+POS1:
+	ldr	r0, =POS1	/* r0 = POS1 compile */
+	ldr	r2, _TEXT_BASE
+	sub	r0, r0, r2	/* r0 = POS1-_TEXT_BASE (POS1 relative) */
+	sub	r5, r5, r0	/* r0 = TEXT_BASE-1 */
+	sub	r5, r5, #4	/* r1 = text base - current */
+
+	/* memory control configuration 1 */
+	ldr	r0, =SMRDATA
+	ldr	r2, =SMRDATA1
+	ldr	r1, _TEXT_BASE
+	sub	r0, r0, r1
+	sub	r2, r2, r1
+	add	r0, r0, r5
+	add	r2, r2, r5
+0:
+	/* the address */
+	ldr	r1, [r0], #4
+	/* the value */
+	ldr	r3, [r0], #4
+	str	r3, [r1]
+	cmp	r2, r0
+	bne	0b
+
+/* ----------------------------------------------------------------------------
+ * PMC Init Step 1.
+ * ----------------------------------------------------------------------------
+ * - Check if the PLL is already initialized
+ * ----------------------------------------------------------------------------
+ */
+	ldr	r1, =(AT91_BASE_SYS + AT91_PMC_MCKR)
+	ldr	r0, [r1]
+	and	r0, r0, #3
+	cmp	r0, #0
+	bne	PLL_setup_end
+
+/* ---------------------------------------------------------------------------
+ * - Enable the Main Oscillator
+ * ---------------------------------------------------------------------------
+ */
+	ldr	r1, =(AT91_BASE_SYS + AT91_CKGR_MOR)
+	ldr	r2, =(AT91_BASE_SYS + AT91_PMC_SR)
+	/* Main oscillator Enable register PMC_MOR: */
+	ldr	r0, =CONFIG_SYS_MOR_VAL
+	str	r0, [r1]
+
+	/* Reading the PMC Status to detect when the Main Oscillator is enabled */
+	mov	r4, #AT91_PMC_MOSCS
+MOSCS_Loop:
+	ldr	r3, [r2]
+	and	r3, r4, r3
+	cmp	r3, #AT91_PMC_MOSCS
+	bne	MOSCS_Loop
+
+/* ----------------------------------------------------------------------------
+ * PMC Init Step 2.
+ * ----------------------------------------------------------------------------
+ * Setup PLLA
+ * ----------------------------------------------------------------------------
+ */
+	ldr	r1, =(AT91_BASE_SYS + AT91_CKGR_PLLAR)
+	ldr	r0, =CONFIG_SYS_PLLAR_VAL
+	str	r0, [r1]
+
+	/* Reading the PMC Status register to detect when the PLLA is locked */
+	mov	r4, #AT91_PMC_LOCKA
+MOSCS_Loop1:
+	ldr	r3, [r2]
+	and	r3, r4, r3
+	cmp	r3, #AT91_PMC_LOCKA
+	bne	MOSCS_Loop1
+
+/* ----------------------------------------------------------------------------
+ * PMC Init Step 3.
+ * ----------------------------------------------------------------------------
+ * - Switch on the Main Oscillator
+ * ----------------------------------------------------------------------------
+ */
+	ldr	r1, =(AT91_BASE_SYS + AT91_PMC_MCKR)
+
+	/* -Master Clock Controller register PMC_MCKR */
+	ldr	r0, =CONFIG_SYS_MCKR1_VAL
+	str	r0, [r1]
+
+	/* Reading the PMC Status to detect when the Master clock is ready */
+	mov	r4, #AT91_PMC_MCKRDY
+MCKRDY_Loop:
+	ldr	r3, [r2]
+	and	r3, r4, r3
+	cmp	r3, #AT91_PMC_MCKRDY
+	bne	MCKRDY_Loop
+
+	ldr	r0, =CONFIG_SYS_MCKR2_VAL
+	str	r0, [r1]
+
+	/* Reading the PMC Status to detect when the Master clock is ready */
+	mov	r4, #AT91_PMC_MCKRDY
+MCKRDY_Loop1:
+	ldr	r3, [r2]
+	and	r3, r4, r3
+	cmp	r3, #AT91_PMC_MCKRDY
+	bne	MCKRDY_Loop1
+
+PLL_setup_end:
+
+/* ----------------------------------------------------------------------------
+ * - memory control configuration 2
+ * ----------------------------------------------------------------------------
+ */
+	ldr	r0, =(AT91_BASE_SYS + AT91_SDRAMC_TR)
+	ldr	r1, [r0]
+	cmp	r1, #0
+	bne	SDRAM_setup_end
+
+	ldr	r0, =SMRDATA1
+	ldr	r2, =SMRDATA2
+	ldr	r1, _TEXT_BASE
+	sub	r0, r0, r1
+	sub	r2, r2, r1
+	add	r0, r0, r5
+	add	r2, r2, r5
+
+2:
+	/* the address */
+	ldr	r1, [r0], #4
+	/* the value */
+	ldr	r3, [r0], #4
+	str	r3, [r1]
+	cmp	r2, r0
+	bne	2b
+
+SDRAM_setup_end:
+	/* everything is fine now */
+	mov	pc, lr
+
+	.ltorg
+
+SMRDATA:
+	.word (AT91_BASE_SYS + AT91_WDT_MR)
+	.word CONFIG_SYS_WDTC_WDMR_VAL
+
+	/* configure PIOx as EBI0 D[16-31] */
+#if defined(CONFIG_ARCH_AT91SAM9263)
+	.word (AT91_BASE_SYS + AT91_PIOD + PIO_PDR)
+	.word CONFIG_SYS_PIOD_PDR_VAL1
+	.word (AT91_BASE_SYS + AT91_PIOD + PIO_PUDR)
+	.word CONFIG_SYS_PIOD_PPUDR_VAL
+	.word (AT91_BASE_SYS + AT91_PIOD + PIO_ASR)
+	.word CONFIG_SYS_PIOD_PPUDR_VAL
+#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261) \
+	|| defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91SAM9G10)
+	.word (AT91_BASE_SYS + AT91_PIOC + PIO_PDR)
+	.word CONFIG_SYS_PIOC_PDR_VAL1
+	.word (AT91_BASE_SYS + AT91_PIOC + PIO_PUDR)
+	.word CONFIG_SYS_PIOC_PPUDR_VAL
+#endif
+
+#if defined(AT91_MATRIX_EBI0CSA)
+	.word (AT91_BASE_SYS + AT91_MATRIX_EBI0CSA)
+	.word CONFIG_SYS_MATRIX_EBI0CSA_VAL
+#else /* AT91_MATRIX_EBICSA */
+	.word (AT91_BASE_SYS + AT91_MATRIX_EBICSA)
+	.word CONFIG_SYS_MATRIX_EBICSA_VAL
+#endif
+
+	/* flash */
+	.word (AT91_BASE_SYS + AT91_SMC_MODE(0))
+	.word CONFIG_SYS_SMC0_MODE0_VAL
+
+	.word (AT91_BASE_SYS + AT91_SMC_CYCLE(0))
+	.word CONFIG_SYS_SMC0_CYCLE0_VAL
+
+	.word (AT91_BASE_SYS + AT91_SMC_PULSE(0))
+	.word CONFIG_SYS_SMC0_PULSE0_VAL
+
+	.word (AT91_BASE_SYS + AT91_SMC_SETUP(0))
+	.word CONFIG_SYS_SMC0_SETUP0_VAL
+
+SMRDATA1:
+	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
+	.word CONFIG_SYS_SDRC_MR_VAL1
+	.word (AT91_BASE_SYS + AT91_SDRAMC_TR)
+	.word CONFIG_SYS_SDRC_TR_VAL1
+	.word (AT91_BASE_SYS + AT91_SDRAMC_CR)
+	.word CONFIG_SYS_SDRC_CR_VAL
+	.word (AT91_BASE_SYS + AT91_SDRAMC_MDR)
+	.word CONFIG_SYS_SDRC_MDR_VAL
+	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
+	.word CONFIG_SYS_SDRC_MR_VAL2
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL1
+	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
+	.word CONFIG_SYS_SDRC_MR_VAL3
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL2
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL3
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL4
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL5
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL6
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL7
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL8
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL9
+	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
+	.word CONFIG_SYS_SDRC_MR_VAL4
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL10
+	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
+	.word CONFIG_SYS_SDRC_MR_VAL5
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL11
+	.word (AT91_BASE_SYS + AT91_SDRAMC_TR)
+	.word CONFIG_SYS_SDRC_TR_VAL2
+	.word AT91_SDRAM_BASE
+	.word CONFIG_SYS_SDRAM_VAL12
+	/* User reset enable*/
+	.word (AT91_BASE_SYS + AT91_RSTC_MR)
+	.word CONFIG_SYS_RSTC_RMR_VAL
+#ifdef CONFIG_SYS_MATRIX_MCFG_REMAP
+	/* MATRIX_MCFG - REMAP all masters */
+	.word (AT91_BASE_SYS + AT91_MATRIX_MCFG0)
+	.word 0x1FF
+#endif
+
+SMRDATA2:
+	.word 0
diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h
new file mode 100644
index 0000000..8847173
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_st.h
@@ -0,0 +1,49 @@
+/*
+ * arch/arm/mach-at91/include/mach/at91_st.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * System Timer (ST) - System peripherals registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_ST_H
+#define AT91_ST_H
+
+#define	AT91_ST_CR		(AT91_ST + 0x00)	/* Control Register */
+#define 	AT91_ST_WDRST		(1 << 0)		/* Watchdog Timer Restart */
+
+#define	AT91_ST_PIMR		(AT91_ST + 0x04)	/* Period Interval Mode Register */
+#define		AT91_ST_PIV		(0xffff <<  0)		/* Period Interval Value */
+
+#define	AT91_ST_WDMR		(AT91_ST + 0x08)	/* Watchdog Mode Register */
+#define		AT91_ST_WDV		(0xffff <<  0)		/* Watchdog Counter Value */
+#define		AT91_ST_RSTEN		(1	<< 16)		/* Reset Enable */
+#define		AT91_ST_EXTEN		(1	<< 17)		/* External Signal Assertion Enable */
+
+#define	AT91_ST_RTMR		(AT91_ST + 0x0c)	/* Real-time Mode Register */
+#define		AT91_ST_RTPRES		(0xffff <<  0)		/* Real-time Prescalar Value */
+
+#define	AT91_ST_SR		(AT91_ST + 0x10)	/* Status Register */
+#define		AT91_ST_PITS		(1 << 0)		/* Period Interval Timer Status */
+#define		AT91_ST_WDOVF		(1 << 1) 		/* Watchdog Overflow */
+#define		AT91_ST_RTTINC		(1 << 2) 		/* Real-time Timer Increment */
+#define		AT91_ST_ALMS		(1 << 3) 		/* Alarm Status */
+
+#define	AT91_ST_IER		(AT91_ST + 0x14)	/* Interrupt Enable Register */
+#define	AT91_ST_IDR		(AT91_ST + 0x18)	/* Interrupt Disable Register */
+#define	AT91_ST_IMR		(AT91_ST + 0x1c)	/* Interrupt Mask Register */
+
+#define	AT91_ST_RTAR		(AT91_ST + 0x20)	/* Real-time Alarm Register */
+#define		AT91_ST_ALMV		(0xfffff << 0)		/* Alarm Value */
+
+#define	AT91_ST_CRTR		(AT91_ST + 0x24)	/* Current Real-time Register */
+#define		AT91_ST_CRTV		(0xfffff << 0)		/* Current Real-Time Value */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_tc.h b/arch/arm/mach-at91/include/mach/at91_tc.h
new file mode 100644
index 0000000..5a064b4
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_tc.h
@@ -0,0 +1,146 @@
+/*
+ * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_tc.h]
+ *
+ * Copyright (C) SAN People
+ *
+ * Timer/Counter Unit (TC) registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_TC_H
+#define AT91_TC_H
+
+#define AT91_TC_BCR		0xc0		/* TC Block Control Register */
+#define		AT91_TC_SYNC		(1 << 0)	/* Synchro Command */
+
+#define AT91_TC_BMR		0xc4		/* TC Block Mode Register */
+#define		AT91_TC_TC0XC0S		(3 << 0)	/* External Clock Signal 0 Selection */
+#define			AT91_TC_TC0XC0S_TCLK0		(0 << 0)
+#define			AT91_TC_TC0XC0S_NONE		(1 << 0)
+#define			AT91_TC_TC0XC0S_TIOA1		(2 << 0)
+#define			AT91_TC_TC0XC0S_TIOA2		(3 << 0)
+#define		AT91_TC_TC1XC1S		(3 << 2)	/* External Clock Signal 1 Selection */
+#define			AT91_TC_TC1XC1S_TCLK1		(0 << 2)
+#define			AT91_TC_TC1XC1S_NONE		(1 << 2)
+#define			AT91_TC_TC1XC1S_TIOA0		(2 << 2)
+#define			AT91_TC_TC1XC1S_TIOA2		(3 << 2)
+#define		AT91_TC_TC2XC2S		(3 << 4)	/* External Clock Signal 2 Selection */
+#define			AT91_TC_TC2XC2S_TCLK2		(0 << 4)
+#define			AT91_TC_TC2XC2S_NONE		(1 << 4)
+#define			AT91_TC_TC2XC2S_TIOA0		(2 << 4)
+#define			AT91_TC_TC2XC2S_TIOA1		(3 << 4)
+
+
+#define AT91_TC_CCR		0x00		/* Channel Control Register */
+#define		AT91_TC_CLKEN		(1 << 0)	/* Counter Clock Enable Command */
+#define		AT91_TC_CLKDIS		(1 << 1)	/* Counter CLock Disable Command */
+#define		AT91_TC_SWTRG		(1 << 2)	/* Software Trigger Command */
+
+#define AT91_TC_CMR		0x04		/* Channel Mode Register */
+#define		AT91_TC_TCCLKS		(7 << 0)	/* Capture/Waveform Mode: Clock Selection */
+#define			AT91_TC_TIMER_CLOCK1		(0 << 0)
+#define			AT91_TC_TIMER_CLOCK2		(1 << 0)
+#define			AT91_TC_TIMER_CLOCK3		(2 << 0)
+#define			AT91_TC_TIMER_CLOCK4		(3 << 0)
+#define			AT91_TC_TIMER_CLOCK5		(4 << 0)
+#define			AT91_TC_XC0			(5 << 0)
+#define			AT91_TC_XC1			(6 << 0)
+#define			AT91_TC_XC2			(7 << 0)
+#define		AT91_TC_CLKI		(1 << 3)	/* Capture/Waveform Mode: Clock Invert */
+#define		AT91_TC_BURST		(3 << 4)	/* Capture/Waveform Mode: Burst Signal Selection */
+#define		AT91_TC_LDBSTOP		(1 << 6)	/* Capture Mode: Counter Clock Stopped with TB Loading */
+#define		AT91_TC_LDBDIS		(1 << 7)	/* Capture Mode: Counter Clock Disable with RB Loading */
+#define		AT91_TC_ETRGEDG		(3 << 8)	/* Capture Mode: External Trigger Edge Selection */
+#define		AT91_TC_ABETRG		(1 << 10)	/* Capture Mode: TIOA or TIOB External Trigger Selection */
+#define		AT91_TC_CPCTRG		(1 << 14)	/* Capture Mode: RC Compare Trigger Enable */
+#define		AT91_TC_WAVE		(1 << 15)	/* Capture/Waveform mode */
+#define		AT91_TC_LDRA		(3 << 16)	/* Capture Mode: RA Loading Selection */
+#define		AT91_TC_LDRB		(3 << 18)	/* Capture Mode: RB Loading Selection */
+
+#define		AT91_TC_CPCSTOP		(1 <<  6)	/* Waveform Mode: Counter Clock Stopped with RC Compare */
+#define		AT91_TC_CPCDIS		(1 <<  7)	/* Waveform Mode: Counter Clock Disable with RC Compare */
+#define		AT91_TC_EEVTEDG		(3 <<  8)	/* Waveform Mode: External Event Edge Selection */
+#define			AT91_TC_EEVTEDG_NONE		(0 << 8)
+#define			AT91_TC_EEVTEDG_RISING		(1 << 8)
+#define			AT91_TC_EEVTEDG_FALLING		(2 << 8)
+#define			AT91_TC_EEVTEDG_BOTH		(3 << 8)
+#define		AT91_TC_EEVT		(3 << 10)	/* Waveform Mode: External Event Selection */
+#define			AT91_TC_EEVT_TIOB		(0 << 10)
+#define			AT91_TC_EEVT_XC0		(1 << 10)
+#define			AT91_TC_EEVT_XC1		(2 << 10)
+#define			AT91_TC_EEVT_XC2		(3 << 10)
+#define		AT91_TC_ENETRG		(1 << 12)	/* Waveform Mode: External Event Trigger Enable */
+#define		AT91_TC_WAVESEL		(3 << 13)	/* Waveform Mode: Waveform Selection */
+#define			AT91_TC_WAVESEL_UP		(0 << 13)
+#define			AT91_TC_WAVESEL_UP_AUTO		(2 << 13)
+#define			AT91_TC_WAVESEL_UPDOWN		(1 << 13)
+#define			AT91_TC_WAVESEL_UPDOWN_AUTO	(3 << 13)
+#define		AT91_TC_ACPA		(3 << 16)	/* Waveform Mode: RA Compare Effect on TIOA */
+#define			AT91_TC_ACPA_NONE		(0 << 16)
+#define			AT91_TC_ACPA_SET		(1 << 16)
+#define			AT91_TC_ACPA_CLEAR		(2 << 16)
+#define			AT91_TC_ACPA_TOGGLE		(3 << 16)
+#define		AT91_TC_ACPC		(3 << 18)	/* Waveform Mode: RC Compre Effect on TIOA */
+#define			AT91_TC_ACPC_NONE		(0 << 18)
+#define			AT91_TC_ACPC_SET		(1 << 18)
+#define			AT91_TC_ACPC_CLEAR		(2 << 18)
+#define			AT91_TC_ACPC_TOGGLE		(3 << 18)
+#define		AT91_TC_AEEVT		(3 << 20)	/* Waveform Mode: External Event Effect on TIOA */
+#define			AT91_TC_AEEVT_NONE		(0 << 20)
+#define			AT91_TC_AEEVT_SET		(1 << 20)
+#define			AT91_TC_AEEVT_CLEAR		(2 << 20)
+#define			AT91_TC_AEEVT_TOGGLE		(3 << 20)
+#define		AT91_TC_ASWTRG		(3 << 22)	/* Waveform Mode: Software Trigger Effect on TIOA */
+#define			AT91_TC_ASWTRG_NONE		(0 << 22)
+#define			AT91_TC_ASWTRG_SET		(1 << 22)
+#define			AT91_TC_ASWTRG_CLEAR		(2 << 22)
+#define			AT91_TC_ASWTRG_TOGGLE		(3 << 22)
+#define		AT91_TC_BCPB		(3 << 24)	/* Waveform Mode: RB Compare Effect on TIOB */
+#define			AT91_TC_BCPB_NONE		(0 << 24)
+#define			AT91_TC_BCPB_SET		(1 << 24)
+#define			AT91_TC_BCPB_CLEAR		(2 << 24)
+#define			AT91_TC_BCPB_TOGGLE		(3 << 24)
+#define		AT91_TC_BCPC		(3 << 26)	/* Waveform Mode: RC Compare Effect on TIOB */
+#define			AT91_TC_BCPC_NONE		(0 << 26)
+#define			AT91_TC_BCPC_SET		(1 << 26)
+#define			AT91_TC_BCPC_CLEAR		(2 << 26)
+#define			AT91_TC_BCPC_TOGGLE		(3 << 26)
+#define		AT91_TC_BEEVT		(3 << 28)	/* Waveform Mode: External Event Effect on TIOB */
+#define			AT91_TC_BEEVT_NONE		(0 << 28)
+#define			AT91_TC_BEEVT_SET		(1 << 28)
+#define			AT91_TC_BEEVT_CLEAR		(2 << 28)
+#define			AT91_TC_BEEVT_TOGGLE		(3 << 28)
+#define		AT91_TC_BSWTRG		(3 << 30)	/* Waveform Mode: Software Trigger Effect on TIOB */
+#define			AT91_TC_BSWTRG_NONE		(0 << 30)
+#define			AT91_TC_BSWTRG_SET		(1 << 30)
+#define			AT91_TC_BSWTRG_CLEAR		(2 << 30)
+#define			AT91_TC_BSWTRG_TOGGLE		(3 << 30)
+
+#define AT91_TC_CV		0x10		/* Counter Value */
+#define AT91_TC_RA		0x14		/* Register A */
+#define AT91_TC_RB		0x18		/* Register B */
+#define AT91_TC_RC		0x1c		/* Register C */
+
+#define AT91_TC_SR		0x20		/* Status Register */
+#define		AT91_TC_COVFS		(1 <<  0)	/* Counter Overflow Status */
+#define		AT91_TC_LOVRS		(1 <<  1)	/* Load Overrun Status */
+#define		AT91_TC_CPAS		(1 <<  2)	/* RA Compare Status */
+#define		AT91_TC_CPBS		(1 <<  3)	/* RB Compare Status */
+#define		AT91_TC_CPCS		(1 <<  4)	/* RC Compare Status */
+#define		AT91_TC_LDRAS		(1 <<  5)	/* RA Loading Status */
+#define		AT91_TC_LDRBS		(1 <<  6)	/* RB Loading Status */
+#define		AT91_TC_ETRGS		(1 <<  7)	/* External Trigger Status */
+#define		AT91_TC_CLKSTA		(1 << 16)	/* Clock Enabling Status */
+#define		AT91_TC_MTIOA		(1 << 17)	/* TIOA Mirror */
+#define		AT91_TC_MTIOB		(1 << 18)	/* TIOB Mirror */
+
+#define AT91_TC_IER		0x24		/* Interrupt Enable Register */
+#define AT91_TC_IDR		0x28		/* Interrupt Disable Register */
+#define AT91_TC_IMR		0x2c		/* Interrupt Mask Register */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
new file mode 100644
index 0000000..985977f
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -0,0 +1,127 @@
+/*
+ * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91rm9200.h]
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Common definitions.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91RM9200_H
+#define AT91RM9200_H
+
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */
+#define AT91_ID_SYS		1	/* System Peripheral */
+#define AT91RM9200_ID_PIOA	2	/* Parallel IO Controller A */
+#define AT91RM9200_ID_PIOB	3	/* Parallel IO Controller B */
+#define AT91RM9200_ID_PIOC	4	/* Parallel IO Controller C */
+#define AT91RM9200_ID_PIOD	5	/* Parallel IO Controller D */
+#define AT91RM9200_ID_US0	6	/* USART 0 */
+#define AT91RM9200_ID_US1	7	/* USART 1 */
+#define AT91RM9200_ID_US2	8	/* USART 2 */
+#define AT91RM9200_ID_US3	9	/* USART 3 */
+#define AT91RM9200_ID_MCI	10	/* Multimedia Card Interface */
+#define AT91RM9200_ID_UDP	11	/* USB Device Port */
+#define AT91RM9200_ID_TWI	12	/* Two-Wire Interface */
+#define AT91RM9200_ID_SPI	13	/* Serial Peripheral Interface */
+#define AT91RM9200_ID_SSC0	14	/* Serial Synchronous Controller 0 */
+#define AT91RM9200_ID_SSC1	15	/* Serial Synchronous Controller 1 */
+#define AT91RM9200_ID_SSC2	16	/* Serial Synchronous Controller 2 */
+#define AT91RM9200_ID_TC0	17	/* Timer Counter 0 */
+#define AT91RM9200_ID_TC1	18	/* Timer Counter 1 */
+#define AT91RM9200_ID_TC2	19	/* Timer Counter 2 */
+#define AT91RM9200_ID_TC3	20	/* Timer Counter 3 */
+#define AT91RM9200_ID_TC4	21	/* Timer Counter 4 */
+#define AT91RM9200_ID_TC5	22	/* Timer Counter 5 */
+#define AT91RM9200_ID_UHP	23	/* USB Host port */
+#define AT91RM9200_ID_EMAC	24	/* Ethernet MAC */
+#define AT91RM9200_ID_IRQ0	25	/* Advanced Interrupt Controller (IRQ0) */
+#define AT91RM9200_ID_IRQ1	26	/* Advanced Interrupt Controller (IRQ1) */
+#define AT91RM9200_ID_IRQ2	27	/* Advanced Interrupt Controller (IRQ2) */
+#define AT91RM9200_ID_IRQ3	28	/* Advanced Interrupt Controller (IRQ3) */
+#define AT91RM9200_ID_IRQ4	29	/* Advanced Interrupt Controller (IRQ4) */
+#define AT91RM9200_ID_IRQ5	30	/* Advanced Interrupt Controller (IRQ5) */
+#define AT91RM9200_ID_IRQ6	31	/* Advanced Interrupt Controller (IRQ6) */
+
+
+/*
+ * Peripheral physical base addresses.
+ */
+#define AT91RM9200_BASE_TCB0	0xfffa0000
+#define AT91RM9200_BASE_TC0	0xfffa0000
+#define AT91RM9200_BASE_TC1	0xfffa0040
+#define AT91RM9200_BASE_TC2	0xfffa0080
+#define AT91RM9200_BASE_TCB1	0xfffa4000
+#define AT91RM9200_BASE_TC3	0xfffa4000
+#define AT91RM9200_BASE_TC4	0xfffa4040
+#define AT91RM9200_BASE_TC5	0xfffa4080
+#define AT91RM9200_BASE_UDP	0xfffb0000
+#define AT91RM9200_BASE_MCI	0xfffb4000
+#define AT91RM9200_BASE_TWI	0xfffb8000
+#define AT91RM9200_BASE_EMAC	0xfffbc000
+#define AT91RM9200_BASE_US0	0xfffc0000
+#define AT91RM9200_BASE_US1	0xfffc4000
+#define AT91RM9200_BASE_US2	0xfffc8000
+#define AT91RM9200_BASE_US3	0xfffcc000
+#define AT91RM9200_BASE_SSC0	0xfffd0000
+#define AT91RM9200_BASE_SSC1	0xfffd4000
+#define AT91RM9200_BASE_SSC2	0xfffd8000
+#define AT91RM9200_BASE_SPI	0xfffe0000
+#define AT91_BASE_SYS		0xfffff000
+
+
+/*
+ * System Peripherals (offset from AT91_BASE_SYS)
+ */
+#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS)	/* Advanced Interrupt Controller */
+#define AT91_DBGU	(0xfffff200 - AT91_BASE_SYS)	/* Debug Unit */
+#define AT91_PIOA	(0xfffff400 - AT91_BASE_SYS)	/* PIO Controller A */
+#define AT91_PIOB	(0xfffff600 - AT91_BASE_SYS)	/* PIO Controller B */
+#define AT91_PIOC	(0xfffff800 - AT91_BASE_SYS)	/* PIO Controller C */
+#define AT91_PIOD	(0xfffffa00 - AT91_BASE_SYS)	/* PIO Controller D */
+#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS)	/* Power Management Controller */
+#define AT91_ST		(0xfffffd00 - AT91_BASE_SYS)	/* System Timer */
+#define AT91_RTC	(0xfffffe00 - AT91_BASE_SYS)	/* Real-Time Clock */
+#define AT91_MC		(0xffffff00 - AT91_BASE_SYS)	/* Memory Controllers */
+
+#define AT91_USART0	AT91RM9200_BASE_US0
+#define AT91_USART1	AT91RM9200_BASE_US1
+#define AT91_USART2	AT91RM9200_BASE_US2
+#define AT91_USART3	AT91RM9200_BASE_US3
+
+#define AT91_BASE_SPI	AT91RM9200_BASE_SPI
+#define AT91_BASE_TWI	AT91RM9200_BASE_TWI
+#define AT91_ID_UHP	AT91RM9200_ID_UHP
+#define AT91_PMC_UHP	AT91RM9200_PMC_UHP
+#define AT91_TC		(AT91RM9200_BASE_TC0 - AT91_BASE_SYS)
+
+#define AT91_MATRIX	0	/* not supported */
+
+/*
+ * Internal Memory.
+ */
+#define AT91RM9200_ROM_BASE	0x00100000	/* Internal ROM base address */
+#define AT91RM9200_ROM_SIZE	SZ_128K		/* Internal ROM size (128Kb) */
+
+#define AT91RM9200_SRAM_BASE	0x00200000	/* Internal SRAM base address */
+#define AT91RM9200_SRAM_SIZE	SZ_16K		/* Internal SRAM size (16Kb) */
+
+#define AT91RM9200_UHP_BASE	0x00300000	/* USB Host controller */
+
+#define AT91_VA_BASE_EMAC	AT91RM9200_BASE_EMAC
+
+/*
+ * Cpu Name
+ */
+#define AT91_CPU_NAME	"AT91RM9200"
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_emac.h b/arch/arm/mach-at91/include/mach/at91rm9200_emac.h
new file mode 100644
index 0000000..7424452
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_emac.h
@@ -0,0 +1,138 @@
+/*
+ * [origin: arch/arm/mach-at91/include/mach/at91rm9200_emac.h]
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Ethernet MAC registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91RM9200_EMAC_H
+#define AT91RM9200_EMAC_H
+
+#define	AT91_EMAC_CTL		0x00	/* Control Register */
+#define		AT91_EMAC_LB		(1 <<  0)	/* Loopback */
+#define		AT91_EMAC_LBL		(1 <<  1)	/* Loopback Local */
+#define		AT91_EMAC_RE		(1 <<  2)	/* Receive Enable */
+#define		AT91_EMAC_TE		(1 <<  3)	/* Transmit Enable */
+#define		AT91_EMAC_MPE		(1 <<  4)	/* Management Port Enable */
+#define		AT91_EMAC_CSR		(1 <<  5)	/* Clear Statistics Registers */
+#define		AT91_EMAC_INCSTAT	(1 <<  6)	/* Increment Statistics Registers */
+#define		AT91_EMAC_WES		(1 <<  7)	/* Write Enable for Statistics Registers */
+#define		AT91_EMAC_BP		(1 <<  8)	/* Back Pressure */
+
+#define	AT91_EMAC_CFG		0x04	/* Configuration Register */
+#define		AT91_EMAC_SPD		(1 <<  0)	/* Speed */
+#define		AT91_EMAC_FD		(1 <<  1)	/* Full Duplex */
+#define		AT91_EMAC_BR		(1 <<  2)	/* Bit Rate */
+#define		AT91_EMAC_CAF		(1 <<  4)	/* Copy All Frames */
+#define		AT91_EMAC_NBC		(1 <<  5)	/* No Broadcast */
+#define		AT91_EMAC_MTI		(1 <<  6)	/* Multicast Hash Enable */
+#define		AT91_EMAC_UNI		(1 <<  7)	/* Unicast Hash Enable */
+#define		AT91_EMAC_BIG		(1 <<  8)	/* Receive 1522 Bytes */
+#define		AT91_EMAC_EAE		(1 <<  9)	/* External Address Match Enable */
+#define		AT91_EMAC_CLK		(3 << 10)	/* MDC Clock Divisor */
+#define		AT91_EMAC_CLK_DIV8		(0 << 10)
+#define		AT91_EMAC_CLK_DIV16		(1 << 10)
+#define		AT91_EMAC_CLK_DIV32		(2 << 10)
+#define		AT91_EMAC_CLK_DIV64		(3 << 10)
+#define		AT91_EMAC_RTY		(1 << 12)	/* Retry Test */
+#define		AT91_EMAC_RMII		(1 << 13)	/* Reduce MII (RMII) */
+
+#define	AT91_EMAC_SR		0x08	/* Status Register */
+#define		AT91_EMAC_SR_LINK	(1 <<  0)	/* Link */
+#define		AT91_EMAC_SR_MDIO	(1 <<  1)	/* MDIO pin */
+#define		AT91_EMAC_SR_IDLE	(1 <<  2)	/* PHY idle */
+
+#define	AT91_EMAC_TAR		0x0c	/* Transmit Address Register */
+
+#define	AT91_EMAC_TCR		0x10	/* Transmit Control Register */
+#define		AT91_EMAC_LEN		(0x7ff << 0)	/* Transmit Frame Length */
+#define		AT91_EMAC_NCRC		(1     << 15)	/* No CRC */
+
+#define	AT91_EMAC_TSR		0x14	/* Transmit Status Register */
+#define		AT91_EMAC_TSR_OVR	(1 <<  0)	/* Transmit Buffer Overrun */
+#define		AT91_EMAC_TSR_COL	(1 <<  1)	/* Collision Occurred */
+#define		AT91_EMAC_TSR_RLE	(1 <<  2)	/* Retry Limit Exceeded */
+#define		AT91_EMAC_TSR_IDLE	(1 <<  3)	/* Transmitter Idle */
+#define		AT91_EMAC_TSR_BNQ	(1 <<  4)	/* Transmit Buffer not Queued */
+#define		AT91_EMAC_TSR_COMP	(1 <<  5)	/* Transmit Complete */
+#define		AT91_EMAC_TSR_UND	(1 <<  6)	/* Transmit Underrun */
+
+#define	AT91_EMAC_RBQP		0x18	/* Receive Buffer Queue Pointer */
+
+#define	AT91_EMAC_RSR		0x20	/* Receive Status Register */
+#define		AT91_EMAC_RSR_BNA	(1 <<  0)	/* Buffer Not Available */
+#define		AT91_EMAC_RSR_REC	(1 <<  1)	/* Frame Received */
+#define		AT91_EMAC_RSR_OVR	(1 <<  2)	/* RX Overrun */
+
+#define	AT91_EMAC_ISR		0x24	/* Interrupt Status Register */
+#define		AT91_EMAC_DONE		(1 <<  0)	/* Management Done */
+#define		AT91_EMAC_RCOM		(1 <<  1)	/* Receive Complete */
+#define		AT91_EMAC_RBNA		(1 <<  2)	/* Receive Buffer Not Available */
+#define		AT91_EMAC_TOVR		(1 <<  3)	/* Transmit Buffer Overrun */
+#define		AT91_EMAC_TUND		(1 <<  4)	/* Transmit Buffer Underrun */
+#define		AT91_EMAC_RTRY		(1 <<  5)	/* Retry Limit */
+#define		AT91_EMAC_TBRE		(1 <<  6)	/* Transmit Buffer Register Empty */
+#define		AT91_EMAC_TCOM		(1 <<  7)	/* Transmit Complete */
+#define		AT91_EMAC_TIDLE		(1 <<  8)	/* Transmit Idle */
+#define		AT91_EMAC_LINK		(1 <<  9)	/* Link */
+#define		AT91_EMAC_ROVR		(1 << 10)	/* RX Overrun */
+#define		AT91_EMAC_ABT		(1 << 11)	/* Abort */
+
+#define	AT91_EMAC_IER		0x28	/* Interrupt Enable Register */
+#define	AT91_EMAC_IDR		0x2c	/* Interrupt Disable Register */
+#define	AT91_EMAC_IMR		0x30	/* Interrupt Mask Register */
+
+#define	AT91_EMAC_MAN		0x34	/* PHY Maintenance Register */
+#define		AT91_EMAC_DATA		(0xffff << 0)	/* MDIO Data */
+#define		AT91_EMAC_REGA		(0x1f	<< 18)	/* MDIO Register */
+#define		AT91_EMAC_PHYA		(0x1f	<< 23)	/* MDIO PHY Address */
+#define		AT91_EMAC_RW		(3	<< 28)	/* Read/Write operation */
+#define			AT91_EMAC_RW_W		(1 << 28)
+#define			AT91_EMAC_RW_R		(2 << 28)
+#define		AT91_EMAC_MAN_802_3	0x40020000	/* IEEE 802.3 value */
+
+/*
+ * Statistics Registers.
+ */
+#define AT91_EMAC_FRA		0x40	/* Frames Transmitted OK */
+#define AT91_EMAC_SCOL		0x44	/* Single Collision Frame */
+#define AT91_EMAC_MCOL		0x48	/* Multiple Collision Frame */
+#define AT91_EMAC_OK		0x4c	/* Frames Received OK */
+#define AT91_EMAC_SEQE		0x50	/* Frame Check Sequence Error */
+#define AT91_EMAC_ALE		0x54	/* Alignmemt Error */
+#define AT91_EMAC_DTE		0x58	/* Deffered Transmission Frame */
+#define AT91_EMAC_LCOL		0x5c	/* Late Collision */
+#define AT91_EMAC_ECOL		0x60	/* Excessive Collision */
+#define AT91_EMAC_TUE		0x64	/* Transmit Underrun Error */
+#define AT91_EMAC_CSE		0x68	/* Carrier Sense Error */
+#define AT91_EMAC_DRFC		0x6c	/* Discard RX Frame */
+#define AT91_EMAC_ROV		0x70	/* Receive Overrun */
+#define AT91_EMAC_CDE		0x74	/* Code Error */
+#define AT91_EMAC_ELR		0x78	/* Excessive Length Error */
+#define AT91_EMAC_RJB		0x7c	/* Receive Jabber */
+#define AT91_EMAC_USF		0x80	/* Undersize Frame */
+#define AT91_EMAC_SQEE		0x84	/* SQE Test Error */
+
+/*
+ * Address Registers.
+ */
+#define AT91_EMAC_HSL		0x90	/* Hash Address Low [31:0] */
+#define AT91_EMAC_HSH		0x94	/* Hash Address High [63:32] */
+#define AT91_EMAC_SA1L		0x98	/* Specific Address 1 Low, bytes 0-3 */
+#define AT91_EMAC_SA1H		0x9c	/* Specific Address 1 High, bytes 4-5 */
+#define AT91_EMAC_SA2L		0xa0	/* Specific Address 2 Low, bytes 0-3 */
+#define AT91_EMAC_SA2H		0xa4	/* Specific Address 2 High, bytes 4-5 */
+#define AT91_EMAC_SA3L		0xa8	/* Specific Address 3 Low, bytes 0-3 */
+#define AT91_EMAC_SA3H		0xac	/* Specific Address 3 High, bytes 4-5 */
+#define AT91_EMAC_SA4L		0xb0	/* Specific Address 4 Low, bytes 0-3 */
+#define AT91_EMAC_SA4H		0xb4	/* Specific Address 4 High, bytes 4-5 */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
new file mode 100644
index 0000000..d34e4ed
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
@@ -0,0 +1,160 @@
+/*
+ * arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91RM9200_MC_H
+#define AT91RM9200_MC_H
+
+/* Memory Controller */
+#define AT91_MC_RCR		(AT91_MC + 0x00)	/* MC Remap Control Register */
+#define		AT91_MC_RCB		(1 <<  0)		/* Remap Command Bit */
+
+#define AT91_MC_ASR		(AT91_MC + 0x04)	/* MC Abort Status Register */
+#define		AT91_MC_UNADD		(1 <<  0)		/* Undefined Address Abort Status */
+#define		AT91_MC_MISADD		(1 <<  1)		/* Misaligned Address Abort Status */
+#define		AT91_MC_ABTSZ		(3 <<  8)		/* Abort Size Status */
+#define			AT91_MC_ABTSZ_BYTE		(0 << 8)
+#define			AT91_MC_ABTSZ_HALFWORD		(1 << 8)
+#define			AT91_MC_ABTSZ_WORD		(2 << 8)
+#define		AT91_MC_ABTTYP		(3 << 10)		/* Abort Type Status */
+#define			AT91_MC_ABTTYP_DATAREAD		(0 << 10)
+#define			AT91_MC_ABTTYP_DATAWRITE	(1 << 10)
+#define			AT91_MC_ABTTYP_FETCH		(2 << 10)
+#define		AT91_MC_MST0		(1 << 16)		/* ARM920T Abort Source */
+#define		AT91_MC_MST1		(1 << 17)		/* PDC Abort Source */
+#define		AT91_MC_MST2		(1 << 18)		/* UHP Abort Source */
+#define		AT91_MC_MST3		(1 << 19)		/* EMAC Abort Source */
+#define		AT91_MC_SVMST0		(1 << 24)		/* Saved ARM920T Abort Source */
+#define		AT91_MC_SVMST1		(1 << 25)		/* Saved PDC Abort Source */
+#define		AT91_MC_SVMST2		(1 << 26)		/* Saved UHP Abort Source */
+#define		AT91_MC_SVMST3		(1 << 27)		/* Saved EMAC Abort Source */
+
+#define AT91_MC_AASR		(AT91_MC + 0x08)	/* MC Abort Address Status Register */
+
+#define AT91_MC_MPR		(AT91_MC + 0x0c)	/* MC Master Priority Register */
+#define		AT91_MPR_MSTP0		(7 <<  0)		/* ARM920T Priority */
+#define		AT91_MPR_MSTP1		(7 <<  4)		/* PDC Priority */
+#define		AT91_MPR_MSTP2		(7 <<  8)		/* UHP Priority */
+#define		AT91_MPR_MSTP3		(7 << 12)		/* EMAC Priority */
+
+/* External Bus Interface (EBI) registers */
+#define AT91_EBI_CSA		(AT91_MC + 0x60)	/* Chip Select Assignment Register */
+#define		AT91_EBI_CS0A		(1 << 0)		/* Chip Select 0 Assignment */
+#define			AT91_EBI_CS0A_SMC		(0 << 0)
+#define			AT91_EBI_CS0A_BFC		(1 << 0)
+#define		AT91_EBI_CS1A		(1 << 1)		/* Chip Select 1 Assignment */
+#define			AT91_EBI_CS1A_SMC		(0 << 1)
+#define			AT91_EBI_CS1A_SDRAMC		(1 << 1)
+#define		AT91_EBI_CS3A		(1 << 3)		/* Chip Select 2 Assignment */
+#define			AT91_EBI_CS3A_SMC		(0 << 3)
+#define			AT91_EBI_CS3A_SMC_SMARTMEDIA	(1 << 3)
+#define		AT91_EBI_CS4A		(1 << 4)		/* Chip Select 3 Assignment */
+#define			AT91_EBI_CS4A_SMC		(0 << 4)
+#define			AT91_EBI_CS4A_SMC_COMPACTFLASH	(1 << 4)
+#define AT91_EBI_CFGR		(AT91_MC + 0x64)	/* Configuration Register */
+#define		AT91_EBI_DBPUC		(1 << 0)		/* Data Bus Pull-Up Configuration */
+
+/* Static Memory Controller (SMC) registers */
+#define	AT91_SMC_CSR(n)		(AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */
+#define		AT91_SMC_NWS		(0x7f <<  0)		/* Number of Wait States */
+#define			AT91_SMC_NWS_(x)	((x) << 0)
+#define		AT91_SMC_WSEN		(1    <<  7)		/* Wait State Enable */
+#define		AT91_SMC_TDF		(0xf  <<  8)		/* Data Float Time */
+#define			AT91_SMC_TDF_(x)	((x) << 8)
+#define		AT91_SMC_BAT		(1    << 12)		/* Byte Access Type */
+#define		AT91_SMC_DBW		(3    << 13)		/* Data Bus Width */
+#define			AT91_SMC_DBW_16		(1 << 13)
+#define			AT91_SMC_DBW_8		(2 << 13)
+#define		AT91_SMC_DPR		(1 << 15)		/* Data Read Protocol */
+#define		AT91_SMC_ACSS		(3 << 16)		/* Address to Chip Select Setup */
+#define			AT91_SMC_ACSS_STD	(0 << 16)
+#define			AT91_SMC_ACSS_1		(1 << 16)
+#define			AT91_SMC_ACSS_2		(2 << 16)
+#define			AT91_SMC_ACSS_3		(3 << 16)
+#define		AT91_SMC_RWSETUP	(7 << 24)		/* Read & Write Signal Time Setup */
+#define			AT91_SMC_RWSETUP_(x)	((x) << 24)
+#define		AT91_SMC_RWHOLD		(7 << 28)		/* Read & Write Signal Hold Time */
+#define			AT91_SMC_RWHOLD_(x)	((x) << 28)
+
+/* SDRAM Controller registers */
+#define AT91_SDRAMC_MR		(AT91_MC + 0x90)	/* Mode Register */
+#define		AT91_SDRAMC_MODE	(0xf << 0)		/* Command Mode */
+#define			AT91_SDRAMC_MODE_NORMAL		(0 << 0)
+#define			AT91_SDRAMC_MODE_NOP		(1 << 0)
+#define			AT91_SDRAMC_MODE_PRECHARGE	(2 << 0)
+#define			AT91_SDRAMC_MODE_LMR		(3 << 0)
+#define			AT91_SDRAMC_MODE_REFRESH	(4 << 0)
+#define		AT91_SDRAMC_DBW		(1   << 4)		/* Data Bus Width */
+#define			AT91_SDRAMC_DBW_32	(0 << 4)
+#define			AT91_SDRAMC_DBW_16	(1 << 4)
+
+#define AT91_SDRAMC_TR		(AT91_MC + 0x94)	/* Refresh Timer Register */
+#define		AT91_SDRAMC_COUNT	(0xfff << 0)		/* Refresh Timer Count */
+
+#define AT91_SDRAMC_CR		(AT91_MC + 0x98)	/* Configuration Register */
+#define		AT91_SDRAMC_NC		(3   <<  0)		/* Number of Column Bits */
+#define			AT91_SDRAMC_NC_8	(0 << 0)
+#define			AT91_SDRAMC_NC_9	(1 << 0)
+#define			AT91_SDRAMC_NC_10	(2 << 0)
+#define			AT91_SDRAMC_NC_11	(3 << 0)
+#define		AT91_SDRAMC_NR		(3   <<  2)		/* Number of Row Bits */
+#define			AT91_SDRAMC_NR_11	(0 << 2)
+#define			AT91_SDRAMC_NR_12	(1 << 2)
+#define			AT91_SDRAMC_NR_13	(2 << 2)
+#define		AT91_SDRAMC_NB		(1   <<  4)		/* Number of Banks */
+#define			AT91_SDRAMC_NB_2	(0 << 4)
+#define			AT91_SDRAMC_NB_4	(1 << 4)
+#define		AT91_SDRAMC_CAS		(3   <<  5)		/* CAS Latency */
+#define			AT91_SDRAMC_CAS_2	(2 << 5)
+#define		AT91_SDRAMC_TWR		(0xf <<  7)		/* Write Recovery Delay */
+#define		AT91_SDRAMC_TRC		(0xf << 11)		/* Row Cycle Delay */
+#define		AT91_SDRAMC_TRP		(0xf << 15)		/* Row Precharge Delay */
+#define		AT91_SDRAMC_TRCD	(0xf << 19)		/* Row to Column Delay */
+#define		AT91_SDRAMC_TRAS	(0xf << 23)		/* Active to Precharge Delay */
+#define		AT91_SDRAMC_TXSR	(0xf << 27)		/* Exit Self Refresh to Active Delay */
+
+#define AT91_SDRAMC_SRR		(AT91_MC + 0x9c)	/* Self Refresh Register */
+#define AT91_SDRAMC_LPR		(AT91_MC + 0xa0)	/* Low Power Register */
+#define AT91_SDRAMC_IER		(AT91_MC + 0xa4)	/* Interrupt Enable Register */
+#define AT91_SDRAMC_IDR		(AT91_MC + 0xa8)	/* Interrupt Disable Register */
+#define AT91_SDRAMC_IMR		(AT91_MC + 0xac)	/* Interrupt Mask Register */
+#define AT91_SDRAMC_ISR		(AT91_MC + 0xb0)	/* Interrupt Status Register */
+
+/* Burst Flash Controller register */
+#define AT91_BFC_MR		(AT91_MC + 0xc0)	/* Mode Register */
+#define		AT91_BFC_BFCOM		(3   <<  0)		/* Burst Flash Controller Operating Mode */
+#define			AT91_BFC_BFCOM_DISABLED	(0 << 0)
+#define			AT91_BFC_BFCOM_ASYNC	(1 << 0)
+#define			AT91_BFC_BFCOM_BURST	(2 << 0)
+#define		AT91_BFC_BFCC		(3   <<  2)		/* Burst Flash Controller Clock */
+#define			AT91_BFC_BFCC_MCK	(1 << 2)
+#define			AT91_BFC_BFCC_DIV2	(2 << 2)
+#define			AT91_BFC_BFCC_DIV4	(3 << 2)
+#define		AT91_BFC_AVL		(0xf <<  4)		/* Address Valid Latency */
+#define		AT91_BFC_PAGES		(7   <<  8)		/* Page Size */
+#define			AT91_BFC_PAGES_NO_PAGE	(0 << 8)
+#define			AT91_BFC_PAGES_16	(1 << 8)
+#define			AT91_BFC_PAGES_32	(2 << 8)
+#define			AT91_BFC_PAGES_64	(3 << 8)
+#define			AT91_BFC_PAGES_128	(4 << 8)
+#define			AT91_BFC_PAGES_256	(5 << 8)
+#define			AT91_BFC_PAGES_512	(6 << 8)
+#define			AT91_BFC_PAGES_1024	(7 << 8)
+#define		AT91_BFC_OEL		(3   << 12)		/* Output Enable Latency */
+#define		AT91_BFC_BAAEN		(1   << 16)		/* Burst Address Advance Enable */
+#define		AT91_BFC_BFOEH		(1   << 17)		/* Burst Flash Output Enable Handling */
+#define		AT91_BFC_MUXEN		(1   << 18)		/* Multiplexed Bus Enable */
+#define		AT91_BFC_RDYEN		(1   << 19)		/* Ready Enable Mode */
+
+#endif
diff --git a/arch/arm/mach-at91/lowlevel_init.S b/arch/arm/mach-at91/lowlevel_init.S
deleted file mode 100644
index 805b201..0000000
--- a/arch/arm/mach-at91/lowlevel_init.S
+++ /dev/null
@@ -1,278 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
- *		       Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
- *
- * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
- * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <mach/hardware.h>
-#include <mach/at91_pmc.h>
-#include <mach/at91_pio.h>
-#include <mach/at91_rstc.h>
-#include <mach/at91_wdt.h>
-#include <mach/at91sam9_matrix.h>
-#include <mach/at91sam9_sdramc.h>
-#include <mach/at91sam9_smc.h>
-
-_TEXT_BASE:
-	.word	TEXT_BASE
-
-.globl board_init_lowlevel
-.type board_init_lowlevel,function
-board_init_lowlevel:
-
-	mov	r5, pc		/* r5 = POS1 + 4 current */
-POS1:
-	ldr	r0, =POS1	/* r0 = POS1 compile */
-	ldr	r2, _TEXT_BASE
-	sub	r0, r0, r2	/* r0 = POS1-_TEXT_BASE (POS1 relative) */
-	sub	r5, r5, r0	/* r0 = TEXT_BASE-1 */
-	sub	r5, r5, #4	/* r1 = text base - current */
-
-	/* memory control configuration 1 */
-	ldr	r0, =SMRDATA
-	ldr	r2, =SMRDATA1
-	ldr	r1, _TEXT_BASE
-	sub	r0, r0, r1
-	sub	r2, r2, r1
-	add	r0, r0, r5
-	add	r2, r2, r5
-0:
-	/* the address */
-	ldr	r1, [r0], #4
-	/* the value */
-	ldr	r3, [r0], #4
-	str	r3, [r1]
-	cmp	r2, r0
-	bne	0b
-
-/* ----------------------------------------------------------------------------
- * PMC Init Step 1.
- * ----------------------------------------------------------------------------
- * - Check if the PLL is already initialized
- * ----------------------------------------------------------------------------
- */
-	ldr	r1, =(AT91_BASE_SYS + AT91_PMC_MCKR)
-	ldr	r0, [r1]
-	and	r0, r0, #3
-	cmp	r0, #0
-	bne	PLL_setup_end
-
-/* ---------------------------------------------------------------------------
- * - Enable the Main Oscillator
- * ---------------------------------------------------------------------------
- */
-	ldr	r1, =(AT91_BASE_SYS + AT91_CKGR_MOR)
-	ldr	r2, =(AT91_BASE_SYS + AT91_PMC_SR)
-	/* Main oscillator Enable register PMC_MOR: */
-	ldr	r0, =CONFIG_SYS_MOR_VAL
-	str	r0, [r1]
-
-	/* Reading the PMC Status to detect when the Main Oscillator is enabled */
-	mov	r4, #AT91_PMC_MOSCS
-MOSCS_Loop:
-	ldr	r3, [r2]
-	and	r3, r4, r3
-	cmp	r3, #AT91_PMC_MOSCS
-	bne	MOSCS_Loop
-
-/* ----------------------------------------------------------------------------
- * PMC Init Step 2.
- * ----------------------------------------------------------------------------
- * Setup PLLA
- * ----------------------------------------------------------------------------
- */
-	ldr	r1, =(AT91_BASE_SYS + AT91_CKGR_PLLAR)
-	ldr	r0, =CONFIG_SYS_PLLAR_VAL
-	str	r0, [r1]
-
-	/* Reading the PMC Status register to detect when the PLLA is locked */
-	mov	r4, #AT91_PMC_LOCKA
-MOSCS_Loop1:
-	ldr	r3, [r2]
-	and	r3, r4, r3
-	cmp	r3, #AT91_PMC_LOCKA
-	bne	MOSCS_Loop1
-
-/* ----------------------------------------------------------------------------
- * PMC Init Step 3.
- * ----------------------------------------------------------------------------
- * - Switch on the Main Oscillator
- * ----------------------------------------------------------------------------
- */
-	ldr	r1, =(AT91_BASE_SYS + AT91_PMC_MCKR)
-
-	/* -Master Clock Controller register PMC_MCKR */
-	ldr	r0, =CONFIG_SYS_MCKR1_VAL
-	str	r0, [r1]
-
-	/* Reading the PMC Status to detect when the Master clock is ready */
-	mov	r4, #AT91_PMC_MCKRDY
-MCKRDY_Loop:
-	ldr	r3, [r2]
-	and	r3, r4, r3
-	cmp	r3, #AT91_PMC_MCKRDY
-	bne	MCKRDY_Loop
-
-	ldr	r0, =CONFIG_SYS_MCKR2_VAL
-	str	r0, [r1]
-
-	/* Reading the PMC Status to detect when the Master clock is ready */
-	mov	r4, #AT91_PMC_MCKRDY
-MCKRDY_Loop1:
-	ldr	r3, [r2]
-	and	r3, r4, r3
-	cmp	r3, #AT91_PMC_MCKRDY
-	bne	MCKRDY_Loop1
-
-PLL_setup_end:
-
-/* ----------------------------------------------------------------------------
- * - memory control configuration 2
- * ----------------------------------------------------------------------------
- */
-	ldr	r0, =(AT91_BASE_SYS + AT91_SDRAMC_TR)
-	ldr	r1, [r0]
-	cmp	r1, #0
-	bne	SDRAM_setup_end
-
-	ldr	r0, =SMRDATA1
-	ldr	r2, =SMRDATA2
-	ldr	r1, _TEXT_BASE
-	sub	r0, r0, r1
-	sub	r2, r2, r1
-	add	r0, r0, r5
-	add	r2, r2, r5
-
-2:
-	/* the address */
-	ldr	r1, [r0], #4
-	/* the value */
-	ldr	r3, [r0], #4
-	str	r3, [r1]
-	cmp	r2, r0
-	bne	2b
-
-SDRAM_setup_end:
-	/* everything is fine now */
-	mov	pc, lr
-
-	.ltorg
-
-SMRDATA:
-	.word (AT91_BASE_SYS + AT91_WDT_MR)
-	.word CONFIG_SYS_WDTC_WDMR_VAL
-
-	/* configure PIOx as EBI0 D[16-31] */
-#if defined(CONFIG_ARCH_AT91SAM9263)
-	.word (AT91_BASE_SYS + AT91_PIOD + PIO_PDR)
-	.word CONFIG_SYS_PIOD_PDR_VAL1
-	.word (AT91_BASE_SYS + AT91_PIOD + PIO_PUDR)
-	.word CONFIG_SYS_PIOD_PPUDR_VAL
-	.word (AT91_BASE_SYS + AT91_PIOD + PIO_ASR)
-	.word CONFIG_SYS_PIOD_PPUDR_VAL
-#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261) \
-	|| defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91SAM9G10)
-	.word (AT91_BASE_SYS + AT91_PIOC + PIO_PDR)
-	.word CONFIG_SYS_PIOC_PDR_VAL1
-	.word (AT91_BASE_SYS + AT91_PIOC + PIO_PUDR)
-	.word CONFIG_SYS_PIOC_PPUDR_VAL
-#endif
-
-#if defined(AT91_MATRIX_EBI0CSA)
-	.word (AT91_BASE_SYS + AT91_MATRIX_EBI0CSA)
-	.word CONFIG_SYS_MATRIX_EBI0CSA_VAL
-#else /* AT91_MATRIX_EBICSA */
-	.word (AT91_BASE_SYS + AT91_MATRIX_EBICSA)
-	.word CONFIG_SYS_MATRIX_EBICSA_VAL
-#endif
-
-	/* flash */
-	.word (AT91_BASE_SYS + AT91_SMC_MODE(0))
-	.word CONFIG_SYS_SMC0_MODE0_VAL
-
-	.word (AT91_BASE_SYS + AT91_SMC_CYCLE(0))
-	.word CONFIG_SYS_SMC0_CYCLE0_VAL
-
-	.word (AT91_BASE_SYS + AT91_SMC_PULSE(0))
-	.word CONFIG_SYS_SMC0_PULSE0_VAL
-
-	.word (AT91_BASE_SYS + AT91_SMC_SETUP(0))
-	.word CONFIG_SYS_SMC0_SETUP0_VAL
-
-SMRDATA1:
-	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
-	.word CONFIG_SYS_SDRC_MR_VAL1
-	.word (AT91_BASE_SYS + AT91_SDRAMC_TR)
-	.word CONFIG_SYS_SDRC_TR_VAL1
-	.word (AT91_BASE_SYS + AT91_SDRAMC_CR)
-	.word CONFIG_SYS_SDRC_CR_VAL
-	.word (AT91_BASE_SYS + AT91_SDRAMC_MDR)
-	.word CONFIG_SYS_SDRC_MDR_VAL
-	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
-	.word CONFIG_SYS_SDRC_MR_VAL2
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL1
-	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
-	.word CONFIG_SYS_SDRC_MR_VAL3
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL2
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL3
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL4
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL5
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL6
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL7
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL8
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL9
-	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
-	.word CONFIG_SYS_SDRC_MR_VAL4
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL10
-	.word (AT91_BASE_SYS + AT91_SDRAMC_MR)
-	.word CONFIG_SYS_SDRC_MR_VAL5
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL11
-	.word (AT91_BASE_SYS + AT91_SDRAMC_TR)
-	.word CONFIG_SYS_SDRC_TR_VAL2
-	.word AT91_SDRAM_BASE
-	.word CONFIG_SYS_SDRAM_VAL12
-	/* User reset enable*/
-	.word (AT91_BASE_SYS + AT91_RSTC_MR)
-	.word CONFIG_SYS_RSTC_RMR_VAL
-#ifdef CONFIG_SYS_MATRIX_MCFG_REMAP
-	/* MATRIX_MCFG - REMAP all masters */
-	.word (AT91_BASE_SYS + AT91_MATRIX_MCFG0)
-	.word 0x1FF
-#endif
-
-SMRDATA2:
-	.word 0
-- 
1.7.4.1



From s.hauer at pengutronix.de  Mon May  9 10:25:07 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 9 May 2011 16:25:07 +0200
Subject: [PATCH] at91: Support for at91rm9200: core chip & board support
In-Reply-To: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>
References: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20110509142507.GB30963@pengutronix.de>

Hi J,

On Sun, May 08, 2011 at 01:09:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre at atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez at atmel.com>
> ---
>  arch/arm/Makefile                                 |    1 +
>  arch/arm/boards/at91rm9200ek/Makefile             |    1 +
>  arch/arm/boards/at91rm9200ek/config.h             |   68 +++++
>  arch/arm/boards/at91rm9200ek/env/config           |   41 +++
>  arch/arm/boards/at91rm9200ek/init.c               |   77 ++++++

Please do not mix board support with architecture support in a single
patch. It makes reviewing harder.

>  arch/arm/configs/at91rm9200ek_defconfig           |   47 ++++
>  arch/arm/mach-at91/Kconfig                        |   27 ++
>  arch/arm/mach-at91/Makefile                       |    5 +-
>  arch/arm/mach-at91/at91rm9200.c                   |  245 ++++++++++++++++++
>  arch/arm/mach-at91/at91rm9200_devices.c           |  276 ++++++++++++++++++++
>  arch/arm/mach-at91/at91rm9200_lowlevel_init.c     |  146 +++++++++++
>  arch/arm/mach-at91/at91rm9200_time.c              |   97 +++++++
>  arch/arm/mach-at91/at91sam926x_lowlevel_init.S    |  278 +++++++++++++++++++++
>  arch/arm/mach-at91/include/mach/at91_st.h         |   49 ++++
>  arch/arm/mach-at91/include/mach/at91_tc.h         |  146 +++++++++++
>  arch/arm/mach-at91/include/mach/at91rm9200.h      |  127 ++++++++++
>  arch/arm/mach-at91/include/mach/at91rm9200_emac.h |  138 ++++++++++
>  arch/arm/mach-at91/include/mach/at91rm9200_mc.h   |  160 ++++++++++++
>  arch/arm/mach-at91/lowlevel_init.S                |  278 ---------------------
>  19 files changed, 1928 insertions(+), 279 deletions(-)
>  create mode 100644 arch/arm/boards/at91rm9200ek/Makefile
>  create mode 100644 arch/arm/boards/at91rm9200ek/config.h
>  create mode 100644 arch/arm/boards/at91rm9200ek/env/config
>  create mode 100644 arch/arm/boards/at91rm9200ek/init.c
>  create mode 100644 arch/arm/configs/at91rm9200ek_defconfig
>  create mode 100644 arch/arm/mach-at91/at91rm9200.c
>  create mode 100644 arch/arm/mach-at91/at91rm9200_devices.c
>  create mode 100644 arch/arm/mach-at91/at91rm9200_lowlevel_init.c
>  create mode 100644 arch/arm/mach-at91/at91rm9200_time.c
>  create mode 100644 arch/arm/mach-at91/at91sam926x_lowlevel_init.S
>  create mode 100644 arch/arm/mach-at91/include/mach/at91_st.h
>  create mode 100644 arch/arm/mach-at91/include/mach/at91_tc.h
>  create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200.h
>  create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_emac.h
>  create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_mc.h
>  delete mode 100644 arch/arm/mach-at91/lowlevel_init.S
> 
> diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
> new file mode 100644
> index 0000000..f45008a
> --- /dev/null
> +++ b/arch/arm/mach-at91/at91rm9200_devices.c
> @@ -0,0 +1,276 @@
> +/*
> + * arch/arm/mach-at91/at91rm9200_devices.c
> + *
> + *  Copyright (C) 2005 Thibaut VARENE <varenet at parisc-linux.org>
> + *  Copyright (C) 2005 David Brownell
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + */
> +#include <common.h>
> +#include <asm/armlinux.h>
> +#include <mach/hardware.h>
> +#include <mach/at91rm9200.h>
> +#include <mach/board.h>
> +#include <mach/gpio.h>
> +#include <mach/io.h>
> +
> +#include "generic.h"
> +
> +static struct memory_platform_data ram_pdata = {
> +	.name = "ram0",
> +	.flags = DEVFS_RDWR,
> +};
> +
> +static struct device_d sdram_dev = {
> +	.id = -1,
> +	.name = "mem",
> +	.map_base = AT91_CHIPSELECT_1,
> +	.platform_data = &ram_pdata,
> +};
> +
> +void at91_add_device_sdram(u32 size)
> +{
> +	sdram_dev.size = size;
> +	register_device(&sdram_dev);
> +	armlinux_add_dram(&sdram_dev);
> +}

We already have this function in the tree four times and there is
nothing at91 specific in it. Please stop duplicating it.

> +
> +/* --------------------------------------------------------------------
> + *  Ethernet
> + * -------------------------------------------------------------------- */
> +
> +#if defined(CONFIG_DRIVER_NET_AT91_ETHER)
> +static struct device_d at91rm9200_eth_device = {
> +	.id		= 0,
> +	.name		= "at91_ether",
> +	.map_base	= AT91_VA_BASE_EMAC,
> +	.size		= 0x1000,
> +};
> +
> +void __init at91_add_device_eth(struct at91_ether_platform_data *data)
> +{
> +	if (!data)
> +		return;

Why this check here? I'd rather see a crash when someone calls this
function without data than just nothing happening.

> +
> +	/* Pins used for MII and RMII */
> +	at91_set_A_periph(AT91_PIN_PA16, 0);	/* EMDIO */
> +	at91_set_A_periph(AT91_PIN_PA15, 0);	/* EMDC */
> +	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERXER */
> +	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ERX1 */
> +	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ERX0 */
> +	at91_set_A_periph(AT91_PIN_PA11, 0);	/* ECRS_ECRSDV */
> +	at91_set_A_periph(AT91_PIN_PA10, 0);	/* ETX1 */
> +	at91_set_A_periph(AT91_PIN_PA9, 0);	/* ETX0 */
> +	at91_set_A_periph(AT91_PIN_PA8, 0);	/* ETXEN */
> +	at91_set_A_periph(AT91_PIN_PA7, 0);	/* ETXCK_EREFCK */
> +
> +	if (!(data->flags & AT91SAM_ETHER_RMII)) {
> +		at91_set_B_periph(AT91_PIN_PB19, 0);	/* ERXCK */
> +		at91_set_B_periph(AT91_PIN_PB18, 0);	/* ECOL */
> +		at91_set_B_periph(AT91_PIN_PB17, 0);	/* ERXDV */
> +		at91_set_B_periph(AT91_PIN_PB16, 0);	/* ERX3 */
> +		at91_set_B_periph(AT91_PIN_PB15, 0);	/* ERX2 */
> +		at91_set_B_periph(AT91_PIN_PB14, 0);	/* ETXER */
> +		at91_set_B_periph(AT91_PIN_PB13, 0);	/* ETX3 */
> +		at91_set_B_periph(AT91_PIN_PB12, 0);	/* ETX2 */
> +	}
> +
> +	at91rm9200_eth_device.platform_data = data;
> +	register_device(&at91rm9200_eth_device);
> +}
> +#else

[snip]

> +
> +void __init at91_register_uart(unsigned id, unsigned pins)
> +{
> +	switch (id) {

This id dispatching does not make much sense. You should export
the functions for the individual uarts instead. This makes this funcion
disappear completely and gives the linker a chance to throw away the
code for unused uarts.

> +		case 0:		/* DBGU */
> +			configure_dbgu_pins();
> +			at91_clock_associate("mck", &dbgu_serial_device, "usart");
> +			register_device(&dbgu_serial_device);
> +			break;
> +		case AT91RM9200_ID_US0:
> +			configure_usart0_pins(pins);
> +			at91_clock_associate("usart0_clk", &uart0_serial_device, "usart");
> +			break;
> +		case AT91RM9200_ID_US1:
> +			configure_usart1_pins(pins);
> +			at91_clock_associate("usart1_clk", &uart1_serial_device, "usart");
> +			register_device(&uart1_serial_device);
> +			break;
> +		case AT91RM9200_ID_US2:
> +			configure_usart2_pins(pins);
> +			at91_clock_associate("usart2_clk", &uart2_serial_device, "usart");
> +			register_device(&uart2_serial_device);
> +			break;
> +		case AT91RM9200_ID_US3:
> +			configure_usart3_pins(pins);
> +			at91_clock_associate("usart3_clk", &uart3_serial_device, "usart");
> +			register_device(&uart3_serial_device);
> +			break;
> +		default:
> +			return;
> +	}
> +
> +}

[snip]

> diff --git a/arch/arm/mach-at91/at91sam926x_lowlevel_init.S b/arch/arm/mach-at91/at91sam926x_lowlevel_init.S
> new file mode 100644
> index 0000000..805b201
> --- /dev/null
> +++ b/arch/arm/mach-at91/at91sam926x_lowlevel_init.S

This file doesn't seem to belong to this patch.

> @@ -0,0 +1,278 @@
> +/*
> + * Memory Setup stuff - taken from blob memsetup.S
> + *
> + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
> + *		       Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
> + *
> + * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
> + * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <config.h>
> +#include <mach/hardware.h>
> +#include <mach/at91_pmc.h>
> +#include <mach/at91_pio.h>
> +#include <mach/at91_rstc.h>
> +#include <mach/at91_wdt.h>
> +#include <mach/at91sam9_matrix.h>
> +#include <mach/at91sam9_sdramc.h>
> +#include <mach/at91sam9_smc.h>
> +
> +_TEXT_BASE:
> +	.word	TEXT_BASE
> +
> +.globl board_init_lowlevel
> +.type board_init_lowlevel,function
> +board_init_lowlevel:

Another board_init_lowlevel function? I already saw one implemented in C
Just noting that this is moved from somewhere else in this patch. Please
factor out such things as seperate patches.

> +
> +	mov	r5, pc		/* r5 = POS1 + 4 current */
> +POS1:
> +	ldr	r0, =POS1	/* r0 = POS1 compile */
> +	ldr	r2, _TEXT_BASE
> +	sub	r0, r0, r2	/* r0 = POS1-_TEXT_BASE (POS1 relative) */
> +	sub	r5, r5, r0	/* r0 = TEXT_BASE-1 */
> +	sub	r5, r5, #4	/* r1 = text base - current */
> +
> +	/* memory control configuration 1 */
> +	ldr	r0, =SMRDATA
> +	ldr	r2, =SMRDATA1
> +	ldr	r1, _TEXT_BASE
> +	sub	r0, r0, r1
> +	sub	r2, r2, r1
> +	add	r0, r0, r5
> +	add	r2, r2, r5
> +0:
> +	/* the address */
> +	ldr	r1, [r0], #4
> +	/* the value */
> +	ldr	r3, [r0], #4
> +	str	r3, [r1]
> +	cmp	r2, r0
> +	bne	0b
> +

[snip]

> diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_emac.h b/arch/arm/mach-at91/include/mach/at91rm9200_emac.h

Please do not put clearly driver related header files to include/mach.
Also, code for the emac driver should already be in the tree, right?

-- 
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Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon May  9 10:48:38 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 9 May 2011 16:48:38 +0200
Subject: [PATCH] at91: Support for at91rm9200: core chip & board support
In-Reply-To: <20110509142507.GB30963@pengutronix.de>
References: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>
	<20110509142507.GB30963@pengutronix.de>
Message-ID: <20110509144838.GF18791@game.jcrosoft.org>

On 16:25 Mon 09 May     , Sascha Hauer wrote:
> > +
> > +static struct device_d sdram_dev = {
> > +	.id = -1,
> > +	.name = "mem",
> > +	.map_base = AT91_CHIPSELECT_1,
> > +	.platform_data = &ram_pdata,
> > +};
> > +
> > +void at91_add_device_sdram(u32 size)
> > +{
> > +	sdram_dev.size = size;
> > +	register_device(&sdram_dev);
> > +	armlinux_add_dram(&sdram_dev);
> > +}
> 
> We already have this function in the tree four times and there is
> nothing at91 specific in it. Please stop duplicating it.
yes but the structure is local and can not be shared between SOC
> 
> > +
> > +/* --------------------------------------------------------------------
> > + *  Ethernet
> > + * -------------------------------------------------------------------- */
> > +
> > +#if defined(CONFIG_DRIVER_NET_AT91_ETHER)
> > +static struct device_d at91rm9200_eth_device = {
> > +	.id		= 0,
> > +	.name		= "at91_ether",
> > +	.map_base	= AT91_VA_BASE_EMAC,
> > +	.size		= 0x1000,
> > +};
> > +
> > +void __init at91_add_device_eth(struct at91_ether_platform_data *data)
> > +{
> > +	if (!data)
> > +		return;
> 
> Why this check here? I'd rather see a crash when someone calls this
> function without data than just nothing happening.
i prefer to keep the code running and do not register the ethernet device
> 
> > +
> > +	/* Pins used for MII and RMII */
> > +	at91_set_A_periph(AT91_PIN_PA16, 0);	/* EMDIO */
> > +	at91_set_A_periph(AT91_PIN_PA15, 0);	/* EMDC */
> > +	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERXER */
> > +	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ERX1 */
> > +	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ERX0 */
> > +	at91_set_A_periph(AT91_PIN_PA11, 0);	/* ECRS_ECRSDV */
> > +	at91_set_A_periph(AT91_PIN_PA10, 0);	/* ETX1 */
> > +	at91_set_A_periph(AT91_PIN_PA9, 0);	/* ETX0 */
> > +	at91_set_A_periph(AT91_PIN_PA8, 0);	/* ETXEN */
> > +	at91_set_A_periph(AT91_PIN_PA7, 0);	/* ETXCK_EREFCK */
> > +
> > +	if (!(data->flags & AT91SAM_ETHER_RMII)) {
> > +		at91_set_B_periph(AT91_PIN_PB19, 0);	/* ERXCK */
> > +		at91_set_B_periph(AT91_PIN_PB18, 0);	/* ECOL */
> > +		at91_set_B_periph(AT91_PIN_PB17, 0);	/* ERXDV */
> > +		at91_set_B_periph(AT91_PIN_PB16, 0);	/* ERX3 */
> > +		at91_set_B_periph(AT91_PIN_PB15, 0);	/* ERX2 */
> > +		at91_set_B_periph(AT91_PIN_PB14, 0);	/* ETXER */
> > +		at91_set_B_periph(AT91_PIN_PB13, 0);	/* ETX3 */
> > +		at91_set_B_periph(AT91_PIN_PB12, 0);	/* ETX2 */
> > +	}
> > +
> > +	at91rm9200_eth_device.platform_data = data;
> > +	register_device(&at91rm9200_eth_device);
> > +}
> > +#else
> 
> [snip]
> 
> > +
> > +void __init at91_register_uart(unsigned id, unsigned pins)
> > +{
> > +	switch (id) {
> 
> This id dispatching does not make much sense. You should export
> the functions for the individual uarts instead. This makes this funcion
> disappear completely and gives the linker a chance to throw away the
> code for unused uarts.
It's the same API as in the kernel I do want to keep then sync
I do not want to have to maintain 2 implemetations for few bytes
> 
> > +		case 0:		/* DBGU */
> > +			configure_dbgu_pins();
> > +			at91_clock_associate("mck", &dbgu_serial_device, "usart");
> > +			register_device(&dbgu_serial_device);
> > +			break;
> > +		case AT91RM9200_ID_US0:
> > +			configure_usart0_pins(pins);
> > +			at91_clock_associate("usart0_clk", &uart0_serial_device, "usart");
> > +			break;
> > +		case AT91RM9200_ID_US1:
> > +			configure_usart1_pins(pins);
> > +			at91_clock_associate("usart1_clk", &uart1_serial_device, "usart");
> > +			register_device(&uart1_serial_device);
> > +			break;
> > +		case AT91RM9200_ID_US2:
> > +			configure_usart2_pins(pins);
> > +			at91_clock_associate("usart2_clk", &uart2_serial_device, "usart");
> > +			register_device(&uart2_serial_device);
> > +			break;
> > +		case AT91RM9200_ID_US3:
> > +			configure_usart3_pins(pins);
> > +			at91_clock_associate("usart3_clk", &uart3_serial_device, "usart");
> > +			register_device(&uart3_serial_device);
> > +			break;
> > +		default:
> > +			return;
> > +	}
> > +
> > +}
> 
> [snip]
> 
> > diff --git a/arch/arm/mach-at91/at91sam926x_lowlevel_init.S b/arch/arm/mach-at91/at91sam926x_lowlevel_init.S
> > new file mode 100644
> > index 0000000..805b201
> > --- /dev/null
> > +++ b/arch/arm/mach-at91/at91sam926x_lowlevel_init.S
> 
> This file doesn't seem to belong to this patch.
it's a rename that's all I forget to pass the -C to git format-patch as today
the mach-at91 support only sam9
> 
> > @@ -0,0 +1,278 @@
> > +/*
> > + * Memory Setup stuff - taken from blob memsetup.S
> > + *
> > + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
> > + *		       Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
> > + *
> > + * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
> > + * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +
> > +#include <config.h>
> > +#include <mach/hardware.h>
> > +#include <mach/at91_pmc.h>
> > +#include <mach/at91_pio.h>
> > +#include <mach/at91_rstc.h>
> > +#include <mach/at91_wdt.h>
> > +#include <mach/at91sam9_matrix.h>
> > +#include <mach/at91sam9_sdramc.h>
> > +#include <mach/at91sam9_smc.h>
> > +
> > +_TEXT_BASE:
> > +	.word	TEXT_BASE
> > +
> > +.globl board_init_lowlevel
> > +.type board_init_lowlevel,function
> > +board_init_lowlevel:
> 
> Another board_init_lowlevel function? I already saw one implemented in C
> Just noting that this is moved from somewhere else in this patch. Please
> factor out such things as seperate patches.
no they are different this one is for sam9 and already exist in the tree
I just rename it

to add the rm9200 lowlevel init that I write in C that time
I plan to rewrite the sam9 init in C too and add the nand boot support

> > diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_emac.h b/arch/arm/mach-at91/include/mach/at91rm9200_emac.h
> 
> Please do not put clearly driver related header files to include/mach.
> Also, code for the emac driver should already be in the tree, right?
no it's not it's old crap implemetation this one is taken from the kernel
I keep the header at the same place between barebox on linux

I'm working on re-implementing it but I need to add the phy lib this time with
bus and phy driver as the dm961 need specific init depending on the connection
to the soc (MII/RMII)

Best Regards,
J.


From s.hauer at pengutronix.de  Mon May  9 11:36:23 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 9 May 2011 17:36:23 +0200
Subject: [PATCH] at91: Support for at91rm9200: core chip & board support
In-Reply-To: <20110509144838.GF18791@game.jcrosoft.org>
References: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>
	<20110509142507.GB30963@pengutronix.de>
	<20110509144838.GF18791@game.jcrosoft.org>
Message-ID: <20110509153623.GD30963@pengutronix.de>

On Mon, May 09, 2011 at 04:48:38PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 16:25 Mon 09 May     , Sascha Hauer wrote:
> > > +
> > > +static struct device_d sdram_dev = {
> > > +	.id = -1,
> > > +	.name = "mem",
> > > +	.map_base = AT91_CHIPSELECT_1,
> > > +	.platform_data = &ram_pdata,
> > > +};
> > > +
> > > +void at91_add_device_sdram(u32 size)
> > > +{
> > > +	sdram_dev.size = size;
> > > +	register_device(&sdram_dev);
> > > +	armlinux_add_dram(&sdram_dev);
> > > +}
> > 
> > We already have this function in the tree four times and there is
> > nothing at91 specific in it. Please stop duplicating it.
> yes but the structure is local and can not be shared between SOC

Just move both the function and the structure to a common place.
Arguably this is not even at91 specific. It should be usable by other
architectures aswell (this would need dynamic allocation of the data
structure and id counting).

> > > +
> > > +void __init at91_add_device_eth(struct at91_ether_platform_data *data)
> > > +{
> > > +	if (!data)
> > > +		return;
> > 
> > Why this check here? I'd rather see a crash when someone calls this
> > function without data than just nothing happening.
> i prefer to keep the code running and do not register the ethernet device

It does not make sense. No board calls this function without valid data,
because it's not working.

> > 
> > > +
> > > +void __init at91_register_uart(unsigned id, unsigned pins)
> > > +{
> > > +	switch (id) {
> > 
> > This id dispatching does not make much sense. You should export
> > the functions for the individual uarts instead. This makes this funcion
> > disappear completely and gives the linker a chance to throw away the
> > code for unused uarts.
> It's the same API as in the kernel I do want to keep then sync
> I do not want to have to maintain 2 implemetations for few bytes

Honestly this can't be the excuse for everything. Then go out and fix
the kernel aswell. Arm folks have great interest in shrinking the code
footprint lately.

> > 
> > Please do not put clearly driver related header files to include/mach.
> > Also, code for the emac driver should already be in the tree, right?
> no it's not it's old crap implemetation this one is taken from the kernel
> I keep the header at the same place between barebox on linux

Sorry, barebox is not the kernel. Sharing things is good but not at the
price of copying bad (and actually obsoleted) ideas from the
kernel.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Mon May  9 12:53:59 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 9 May 2011 18:53:59 +0200
Subject: [PATCH] at91: Support for at91rm9200: core chip & board support
In-Reply-To: <20110509153623.GD30963@pengutronix.de>
References: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>
	<20110509142507.GB30963@pengutronix.de>
	<20110509144838.GF18791@game.jcrosoft.org>
	<20110509153623.GD30963@pengutronix.de>
Message-ID: <20110509165359.GG18791@game.jcrosoft.org>

On 17:36 Mon 09 May     , Sascha Hauer wrote:
> On Mon, May 09, 2011 at 04:48:38PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 16:25 Mon 09 May     , Sascha Hauer wrote:
> > > > +
> > > > +static struct device_d sdram_dev = {
> > > > +	.id = -1,
> > > > +	.name = "mem",
> > > > +	.map_base = AT91_CHIPSELECT_1,
> > > > +	.platform_data = &ram_pdata,
> > > > +};
> > > > +
> > > > +void at91_add_device_sdram(u32 size)
> > > > +{
> > > > +	sdram_dev.size = size;
> > > > +	register_device(&sdram_dev);
> > > > +	armlinux_add_dram(&sdram_dev);
> > > > +}
> > > 
> > > We already have this function in the tree four times and there is
> > > nothing at91 specific in it. Please stop duplicating it.
> > yes but the structure is local and can not be shared between SOC
> 
> Just move both the function and the structure to a common place.
> Arguably this is not even at91 specific. It should be usable by other
> architectures aswell (this would need dynamic allocation of the data
> structure and id counting).
I'm not really a fan of dynamic resources allocation but this is not the scope
of this patch
This shoulb be done in a second time
> 
> > > > +
> > > > +void __init at91_add_device_eth(struct at91_ether_platform_data *data)
> > > > +{
> > > > +	if (!data)
> > > > +		return;
> > > 
> > > Why this check here? I'd rather see a crash when someone calls this
> > > function without data than just nothing happening.
> > i prefer to keep the code running and do not register the ethernet device
> 
> It does not make sense. No board calls this function without valid data,
> because it's not working.
bug hanging is a bad habit
print something ok but not hanging
> 
> > > 
> > > > +
> > > > +void __init at91_register_uart(unsigned id, unsigned pins)
> > > > +{
> > > > +	switch (id) {
> > > 
> > > This id dispatching does not make much sense. You should export
> > > the functions for the individual uarts instead. This makes this funcion
> > > disappear completely and gives the linker a chance to throw away the
> > > code for unused uarts.
> > It's the same API as in the kernel I do want to keep then sync
> > I do not want to have to maintain 2 implemetations for few bytes
> 
> Honestly this can't be the excuse for everything. Then go out and fix
> the kernel aswell. Arm folks have great interest in shrinking the code
> footprint lately.
sorry here I do not think of any improvment even in the kernel to have one
function per uart resources it will not reduce the footprint so much but just
increase the number of API.

At kernel level I will not accept again on at91 to have 1000 of functions to
register each resources. On contrary I'll try to recude it.

Best Regards,
J.


From s.hauer at pengutronix.de  Tue May 10 03:17:13 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 10 May 2011 09:17:13 +0200
Subject: [PATCH] at91: Support for at91rm9200: core chip & board support
In-Reply-To: <20110509165359.GG18791@game.jcrosoft.org>
References: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>
	<20110509142507.GB30963@pengutronix.de>
	<20110509144838.GF18791@game.jcrosoft.org>
	<20110509153623.GD30963@pengutronix.de>
	<20110509165359.GG18791@game.jcrosoft.org>
Message-ID: <20110510071713.GE30963@pengutronix.de>

On Mon, May 09, 2011 at 06:53:59PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 17:36 Mon 09 May     , Sascha Hauer wrote:
> > On Mon, May 09, 2011 at 04:48:38PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > On 16:25 Mon 09 May     , Sascha Hauer wrote:
> > > > > +
> > > > > +static struct device_d sdram_dev = {
> > > > > +	.id = -1,
> > > > > +	.name = "mem",
> > > > > +	.map_base = AT91_CHIPSELECT_1,
> > > > > +	.platform_data = &ram_pdata,
> > > > > +};
> > > > > +
> > > > > +void at91_add_device_sdram(u32 size)
> > > > > +{
> > > > > +	sdram_dev.size = size;
> > > > > +	register_device(&sdram_dev);
> > > > > +	armlinux_add_dram(&sdram_dev);
> > > > > +}
> > > > 
> > > > We already have this function in the tree four times and there is
> > > > nothing at91 specific in it. Please stop duplicating it.
> > > yes but the structure is local and can not be shared between SOC
> > 
> > Just move both the function and the structure to a common place.
> > Arguably this is not even at91 specific. It should be usable by other
> > architectures aswell (this would need dynamic allocation of the data
> > structure and id counting).
> I'm not really a fan of dynamic resources allocation but this is not the scope
> of this patch
> This shoulb be done in a second time
> > 
> > > > > +
> > > > > +void __init at91_add_device_eth(struct at91_ether_platform_data *data)
> > > > > +{
> > > > > +	if (!data)
> > > > > +		return;
> > > > 
> > > > Why this check here? I'd rather see a crash when someone calls this
> > > > function without data than just nothing happening.
> > > i prefer to keep the code running and do not register the ethernet device
> > 
> > It does not make sense. No board calls this function without valid data,
> > because it's not working.
> bug hanging is a bad habit
> print something ok but not hanging
> > 
> > > > 
> > > > > +
> > > > > +void __init at91_register_uart(unsigned id, unsigned pins)
> > > > > +{
> > > > > +	switch (id) {
> > > > 
> > > > This id dispatching does not make much sense. You should export
> > > > the functions for the individual uarts instead. This makes this funcion
> > > > disappear completely and gives the linker a chance to throw away the
> > > > code for unused uarts.
> > > It's the same API as in the kernel I do want to keep then sync
> > > I do not want to have to maintain 2 implemetations for few bytes
> > 
> > Honestly this can't be the excuse for everything. Then go out and fix
> > the kernel aswell. Arm folks have great interest in shrinking the code
> > footprint lately.
> sorry here I do not think of any improvment even in the kernel to have one
> function per uart resources it will not reduce the footprint so much but just
> increase the number of API.

I don't buy this. Where's the problem of having three functions instead
of one when the end result is shorter and easier to read?

> 
> At kernel level I will not accept again on at91 to have 1000 of functions to
> register each resources. On contrary I'll try to recude it.

Then do it in a way which does not add code just to dispatch the input
and is otherwise useless and shorter without.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Tue May 10 04:18:35 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Tue, 10 May 2011 10:18:35 +0200
Subject: [PATCH] at91: Support for at91rm9200: core chip & board support
In-Reply-To: <20110510071713.GE30963@pengutronix.de>
References: <1304852976-8236-1-git-send-email-plagnioj@jcrosoft.com>
	<20110509142507.GB30963@pengutronix.de>
	<20110509144838.GF18791@game.jcrosoft.org>
	<20110509153623.GD30963@pengutronix.de>
	<20110509165359.GG18791@game.jcrosoft.org>
	<20110510071713.GE30963@pengutronix.de>
Message-ID: <20110510081835.GI18791@game.jcrosoft.org>

On 09:17 Tue 10 May     , Sascha Hauer wrote:
> On Mon, May 09, 2011 at 06:53:59PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 17:36 Mon 09 May     , Sascha Hauer wrote:
> > > On Mon, May 09, 2011 at 04:48:38PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > > On 16:25 Mon 09 May     , Sascha Hauer wrote:
> > > > > > +
> > > > > > +static struct device_d sdram_dev = {
> > > > > > +	.id = -1,
> > > > > > +	.name = "mem",
> > > > > > +	.map_base = AT91_CHIPSELECT_1,
> > > > > > +	.platform_data = &ram_pdata,
> > > > > > +};
> > > > > > +
> > > > > > +void at91_add_device_sdram(u32 size)
> > > > > > +{
> > > > > > +	sdram_dev.size = size;
> > > > > > +	register_device(&sdram_dev);
> > > > > > +	armlinux_add_dram(&sdram_dev);
> > > > > > +}
> > > > > 
> > > > > We already have this function in the tree four times and there is
> > > > > nothing at91 specific in it. Please stop duplicating it.
> > > > yes but the structure is local and can not be shared between SOC
> > > 
> > > Just move both the function and the structure to a common place.
> > > Arguably this is not even at91 specific. It should be usable by other
> > > architectures aswell (this would need dynamic allocation of the data
> > > structure and id counting).
> > I'm not really a fan of dynamic resources allocation but this is not the scope
> > of this patch
> > This shoulb be done in a second time
> > > 
> > > > > > +
> > > > > > +void __init at91_add_device_eth(struct at91_ether_platform_data *data)
> > > > > > +{
> > > > > > +	if (!data)
> > > > > > +		return;
> > > > > 
> > > > > Why this check here? I'd rather see a crash when someone calls this
> > > > > function without data than just nothing happening.
> > > > i prefer to keep the code running and do not register the ethernet device
> > > 
> > > It does not make sense. No board calls this function without valid data,
> > > because it's not working.
> > bug hanging is a bad habit
> > print something ok but not hanging
> > > 
> > > > > 
> > > > > > +
> > > > > > +void __init at91_register_uart(unsigned id, unsigned pins)
> > > > > > +{
> > > > > > +	switch (id) {
> > > > > 
> > > > > This id dispatching does not make much sense. You should export
> > > > > the functions for the individual uarts instead. This makes this funcion
> > > > > disappear completely and gives the linker a chance to throw away the
> > > > > code for unused uarts.
> > > > It's the same API as in the kernel I do want to keep then sync
> > > > I do not want to have to maintain 2 implemetations for few bytes
> > > 
> > > Honestly this can't be the excuse for everything. Then go out and fix
> > > the kernel aswell. Arm folks have great interest in shrinking the code
> > > footprint lately.
> > sorry here I do not think of any improvment even in the kernel to have one
> > function per uart resources it will not reduce the footprint so much but just
> > increase the number of API.
> 
> I don't buy this. Where's the problem of having three functions instead
> of one when the end result is shorter and easier to read?
no asin the kernel we are going to have one fuction for ALL soc
with on implemetation so not 6 functions for 6 uart as differet soc have
different number of uart

Best Regards,
J.


From yegorslists at googlemail.com  Wed May 11 18:06:15 2011
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Thu, 12 May 2011 00:06:15 +0200
Subject: AM3517EVM port
Message-ID: <BANLkTimK4n3A4HN9yLWrmgXcwhFgJrCCbw@mail.gmail.com>

Hello,

has anyone ported AM3517EVM board or other omap3517 based board to
barebox? I couldn't find any patches.

The second question is about OMAP boot procedure. Can I just rename
barebox to u-boot.bin and let it be loaded by x-loader?

Regards,
Yegor


From s.hauer at pengutronix.de  Thu May 12 02:03:49 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 12 May 2011 08:03:49 +0200
Subject: AM3517EVM port
In-Reply-To: <BANLkTimK4n3A4HN9yLWrmgXcwhFgJrCCbw@mail.gmail.com>
References: <BANLkTimK4n3A4HN9yLWrmgXcwhFgJrCCbw@mail.gmail.com>
Message-ID: <20110512060349.GO30963@pengutronix.de>

Hi Yegor,

On Thu, May 12, 2011 at 12:06:15AM +0200, Yegor Yefremov wrote:
> Hello,
> 
> has anyone ported AM3517EVM board or other omap3517 based board to
> barebox? I couldn't find any patches.

No, I am not aware of any patches for this. How different is the
omap3517 from the one on the beagle board?

> 
> The second question is about OMAP boot procedure. Can I just rename
> barebox to u-boot.bin and let it be loaded by x-loader?

More specifically barebox.bin to u-boot.bin, yes. This at least works on
the beagle and panda boards. barebox can also act as an x-loader aswell
(in which case it loads barebox.bin as second stage). See the *xload*
defconfigs.

Regards
 Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From yegorslists at googlemail.com  Thu May 12 03:45:43 2011
From: yegorslists at googlemail.com (Yegor Yefremov)
Date: Thu, 12 May 2011 09:45:43 +0200
Subject: AM3517EVM port
In-Reply-To: <20110512060349.GO30963@pengutronix.de>
References: <BANLkTimK4n3A4HN9yLWrmgXcwhFgJrCCbw@mail.gmail.com>
	<20110512060349.GO30963@pengutronix.de>
Message-ID: <BANLkTik7uQDgPAvPG71dUmrH_0m-7hmL-w@mail.gmail.com>

Hi Sascha,

>> has anyone ported AM3517EVM board or other omap3517 based board to
>> barebox? I couldn't find any patches.
>
> No, I am not aware of any patches for this. How different is the
> omap3517 from the one on the beagle board?

I hope it is not so different. But in the first line OMAP3517 is
industrial grade SoC with built-in Ethernet and CAN support. I took
beagle port as a template and try to port the stuff from TI's u-boot.

>> The second question is about OMAP boot procedure. Can I just rename
>> barebox to u-boot.bin and let it be loaded by x-loader?
>
> More specifically barebox.bin to u-boot.bin, yes. This at least works on
> the beagle and panda boards. barebox can also act as an x-loader aswell
> (in which case it loads barebox.bin as second stage). See the *xload*
> defconfigs.

O.K. I see. Thank you for your help.

Regards,
Yegor


From agalakhov at yandex-team.ru  Fri May 13 09:31:32 2011
From: agalakhov at yandex-team.ru (Alexey Galakhov)
Date: Fri, 13 May 2011 19:31:32 +0600
Subject: loadb and loady do not work
Message-ID: <4DCD32B4.9090606@yandex-team.ru>

Hi,

I just switched from u-boot to barebox on a MINI2440 board and found
that I'm unable to use both loadb and loady. I used loady with u-boot
and it worked fine. Looks like barebox does not listen to the incoming data.

mini2440:/ loady -c
## Ready for binary (ymodem) download to 0x00000000 offset on image.bin
device at 115200 bps...
C
*** file: uImage
sb -vv uImage
Sending: uImage
Ymodem sectors/kbytes sent:   0/ 0kRetry 0: NAK on sector
Retry 0: NAK on sector
Retry 0: NAK on sector
Retry 0: NAK on sector
(etc up to timeout)

mini2440:/ loadb -c
## Ready for binary (kermit) download to 0x00000000 offset on image.bin
device at 115200 bps...

*** file: uImage
gkermit -iXvs uImage
G-Kermit CU-1.00, Columbia University, 1999-12-25
Escape back to your local Kermit and give a RECEIVE command.

KERMIT READY TO SEND...
-
*** exit status: 1

I tried to debug it by adding a simple echo test and I think I found the
problem. tstc() may return false even if there are bytes in input
buffer. Thus getc() may sleep even if the buffer is full!

--
Alex


From agalakhov at gmail.com  Fri May 13 09:53:29 2011
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Fri, 13 May 2011 19:53:29 +0600
Subject: [PATCH] fix console fifo (and loadb/loady commands)
In-Reply-To: <4DCD32B4.9090606@yandex-team.ru>
References: <4DCD32B4.9090606@yandex-team.ru>
Message-ID: <4DCD37D9.5020408@gmail.com>

This patch fixes loadb and loady commands. tstc() should return true if
console_input_buffer is not empty.

diff -udp ./common/console.c.orig ./common/console.c
--- ./common/console.c.orig    2011-05-06 13:30:20.000000000 +0600
+++ ./common/console.c    2011-05-13 19:42:12.000000000 +0600
@@ -195,6 +195,20 @@ static int getc_raw(void)
     }
 }
 
+static int tstc_raw(void)
+{
+    struct console_device *cdev;
+
+    for_each_console(cdev) {
+        if (!(cdev->f_active & CONSOLE_STDIN))
+            continue;
+        if (cdev->tstc(cdev))
+            return 1;
+    }
+
+    return 0;
+}
+
 int getc(void)
 {
     unsigned char ch;
@@ -209,7 +223,7 @@ int getc(void)
     while (1) {
         poller_call();
 
-        if (tstc()) {
+        if (tstc_raw()) {
             kfifo_putc(console_input_buffer, getc_raw());
 
             start = get_time_ns();
@@ -236,16 +250,7 @@ EXPORT_SYMBOL(fgetc);
 
 int tstc(void)
 {
-    struct console_device *cdev;
-
-    for_each_console(cdev) {
-        if (!(cdev->f_active & CONSOLE_STDIN))
-            continue;
-        if (cdev->tstc(cdev))
-            return 1;
-    }
-
-    return 0;
+    return kfifo_len(console_input_buffer) || tstc_raw();
 }
 EXPORT_SYMBOL(tstc);
 



From Benoit.Burnichon at airtag.com  Fri May 13 11:54:00 2011
From: Benoit.Burnichon at airtag.com (=?iso-8859-1?Q?Beno=EEt_Burnichon?=)
Date: Fri, 13 May 2011 17:54:00 +0200
Subject: crc32 command
Message-ID: <04EB6ACBB90C8844892BE0B9828F13C8018734BA036D@SRVSBS.airtag.local>

Hi all,

I want to verify the version downloaded by tftp before installing it.

I have the file on my workstation:

$ cksum /var/lib/tftpboot/uImage-pcm038 
2156276197 2317276 /var/lib/tftpboot/uImage-pcm038

Under my barebox, I then try to verify the file:

barebox:/ crc32
Usage: crc32 [OPTION] [AREA]
Calculate a crc32 checksum of a memory area
Options:
  -f <file>   Use file instead of memory
  -v <crc>    Verfify

barebox:/ crc32 -f uImage-pcm038 -v 2156276197 0+2317276
CRC32 for uImage-pcm038 0x00000000 ... 0x00235bdb ==> 0xd484eccb != 0x808629e5 ** ERROR **
barebox:/ crc32 -f uImage-pcm038                        
CRC32 for uImage-pcm038 0x00000000 ... 0x00235bdb ==> 0xd484eccb


I have barebox-2010.11.0


How can I use crc32 to verify the files I transfer?

Regards,

Ben


From s.hauer at pengutronix.de  Fri May 13 13:22:52 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 13 May 2011 19:22:52 +0200
Subject: crc32 command
In-Reply-To: <04EB6ACBB90C8844892BE0B9828F13C8018734BA036D@SRVSBS.airtag.local>
References: <04EB6ACBB90C8844892BE0B9828F13C8018734BA036D@SRVSBS.airtag.local>
Message-ID: <20110513172252.GZ30963@pengutronix.de>

Hi Benoit,

On Fri, May 13, 2011 at 05:54:00PM +0200, Beno?t Burnichon wrote:
> Hi all,
> 
> I want to verify the version downloaded by tftp before installing it.
> 
> I have the file on my workstation:
> 
> $ cksum /var/lib/tftpboot/uImage-pcm038 
> 2156276197 2317276 /var/lib/tftpboot/uImage-pcm038
> 
> Under my barebox, I then try to verify the file:
> 
> barebox:/ crc32
> Usage: crc32 [OPTION] [AREA]
> Calculate a crc32 checksum of a memory area
> Options:
>   -f <file>   Use file instead of memory
>   -v <crc>    Verfify
> 
> barebox:/ crc32 -f uImage-pcm038 -v 2156276197 0+2317276
> CRC32 for uImage-pcm038 0x00000000 ... 0x00235bdb ==> 0xd484eccb != 0x808629e5 ** ERROR **
> barebox:/ crc32 -f uImage-pcm038                        
> CRC32 for uImage-pcm038 0x00000000 ... 0x00235bdb ==> 0xd484eccb
> 
> 
> I have barebox-2010.11.0
> 
> 
> How can I use crc32 to verify the files I transfer?

The algorithms differ, so cksum is not usable here. Got curious myself
and looked around in the net. the zip tool is usable for this:

zip test.zip barebox.bin; unzip -lv test.zip

Ok, this sucks, but there is also a standalone program (haven't tested
this). See here:

http://docwiki.gumstix.org/index.php/Calculating_32_bit_CRCs

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jacmet at sunsite.dk  Sat May 14 03:09:55 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Sat, 14 May 2011 09:09:55 +0200
Subject: crc32 command
In-Reply-To: <20110513172252.GZ30963@pengutronix.de> (Sascha Hauer's message
	of "Fri, 13 May 2011 19:22:52 +0200")
References: <04EB6ACBB90C8844892BE0B9828F13C8018734BA036D@SRVSBS.airtag.local>
	<20110513172252.GZ30963@pengutronix.de>
Message-ID: <87d3jlkbb0.fsf@macbook.be.48ers.dk>

>>>>> "Sascha" == Sascha Hauer <s.hauer at pengutronix.de> writes:

 >> How can I use crc32 to verify the files I transfer?

 Sascha> The algorithms differ, so cksum is not usable here. Got curious
 Sascha> myself and looked around in the net. the zip tool is usable for
 Sascha> this:

 Sascha> zip test.zip barebox.bin; unzip -lv test.zip

 Sascha> Ok, this sucks, but there is also a standalone program (haven't tested
 Sascha> this). See here:

 Sascha> http://docwiki.gumstix.org/index.php/Calculating_32_bit_CRCs

The crc32 command is largely legacy from u-boot. Would there be interest
in a cksum command (it's afaik just like the normal crc32 except it also
uses the length) or md5/sha1/sha256sum? We have all the infrastructure,
so it should be easy to add.

-- 
Bye, Peter Korsgaard


From s.hauer at pengutronix.de  Sat May 14 13:16:07 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Sat, 14 May 2011 19:16:07 +0200
Subject: crc32 command
In-Reply-To: <87d3jlkbb0.fsf@macbook.be.48ers.dk>
References: <04EB6ACBB90C8844892BE0B9828F13C8018734BA036D@SRVSBS.airtag.local>
	<20110513172252.GZ30963@pengutronix.de>
	<87d3jlkbb0.fsf@macbook.be.48ers.dk>
Message-ID: <20110514171607.GA30963@pengutronix.de>

On Sat, May 14, 2011 at 09:09:55AM +0200, Peter Korsgaard wrote:
> >>>>> "Sascha" == Sascha Hauer <s.hauer at pengutronix.de> writes:
> 
>  >> How can I use crc32 to verify the files I transfer?
> 
>  Sascha> The algorithms differ, so cksum is not usable here. Got curious
>  Sascha> myself and looked around in the net. the zip tool is usable for
>  Sascha> this:
> 
>  Sascha> zip test.zip barebox.bin; unzip -lv test.zip
> 
>  Sascha> Ok, this sucks, but there is also a standalone program (haven't tested
>  Sascha> this). See here:
> 
>  Sascha> http://docwiki.gumstix.org/index.php/Calculating_32_bit_CRCs
> 
> The crc32 command is largely legacy from u-boot. Would there be interest
> in a cksum command (it's afaik just like the normal crc32 except it also
> uses the length) or md5/sha1/sha256sum? We have all the infrastructure,
> so it should be easy to add.

md5sum would be very useful. Would it add much to the binary space?
(If yes, that would be no reason to not have it, but probably more
boards will enable this when it's small)

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jacmet at sunsite.dk  Sat May 14 16:10:54 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Sat, 14 May 2011 22:10:54 +0200
Subject: [PATCH] commands/crc.c: fix typo in help text
Message-ID: <1305403854-19528-1-git-send-email-jacmet@sunsite.dk>

Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>
---
 commands/crc.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/commands/crc.c b/commands/crc.c
index 993074c..01fedd7 100644
--- a/commands/crc.c
+++ b/commands/crc.c
@@ -150,7 +150,7 @@ BAREBOX_CMD_HELP_OPT  ("-f <file>", "Use file instead of memory.\n")
 #ifdef CONFIG_CMD_CRC_CMP
 BAREBOX_CMD_HELP_OPT  ("-F <file>", "Use file to compare.\n")
 #endif
-BAREBOX_CMD_HELP_OPT  ("-v <crc>",  "Verfify\n")
+BAREBOX_CMD_HELP_OPT  ("-v <crc>",  "Verify\n")
 BAREBOX_CMD_HELP_END
 
 BAREBOX_CMD_START(crc32)
-- 
1.7.4.4



From jacmet at sunsite.dk  Sat May 14 16:33:51 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Sat, 14 May 2011 22:33:51 +0200
Subject: [PATCH] setenv: be robust against setenv(<var>, NULL)
Message-ID: <1305405231-22863-1-git-send-email-jacmet@sunsite.dk>

Handle value == NULL similiar to how value == '' is currently handled.
hush's builtin_getopt() seems to trigger this for OPTARG.

Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>
---
 common/env.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/common/env.c b/common/env.c
index b72b5d1..47cef05 100644
--- a/common/env.c
+++ b/common/env.c
@@ -205,7 +205,7 @@ int setenv(const char *_name, const char *value)
 	struct variable_d *var;
 	int ret = 0;
 
-	if (!*value)
+	if (value && !*value)
 		value = NULL;
 
 
-- 
1.7.4.4



From jacmet at sunsite.dk  Sat May 14 17:29:04 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Sat, 14 May 2011 23:29:04 +0200
Subject: [PATCH] Fix sandbox ./barebox --help by reverting 6b082cfe (fix
	printf warnings)
Message-ID: <1305408544-29710-1-git-send-email-jacmet@sunsite.dk>

While getting rid of all the format(barebox_printf) warnings was nice,
it caused the printf calls in arch/sandbox/os/common.c to get directed
to the barebox versions rather than the libc ones causing a crash:

E.G. before this revert:
nm -a barebox|grep -w printf
0000000000404fa3 T print

And after:
nm -a barebox|grep -w printf
U printf@@GLIBC_2.2.5

Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>
---
 include/stdio.h |    5 -----
 1 files changed, 0 insertions(+), 5 deletions(-)

diff --git a/include/stdio.h b/include/stdio.h
index 9b1f161..c824764 100644
--- a/include/stdio.h
+++ b/include/stdio.h
@@ -8,9 +8,6 @@
  * STDIO based functions (can always be used)
  */
 
-#define ORIG_printf	printf
-#undef printf
-
 /* serial stuff */
 void	serial_printf(const char *fmt, ...) __attribute__ ((format(printf, 1, 2)));
 
@@ -63,6 +60,4 @@ int	fputc(int file, const char c);
 int	ftstc(int file);
 int	fgetc(int file);
 
-#define printf			ORIG_printf
-
 #endif /* __STDIO_H */
-- 
1.7.4.4



From jacmet at sunsite.dk  Sat May 14 17:50:07 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Sat, 14 May 2011 23:50:07 +0200
Subject: crc32 command
In-Reply-To: <20110514171607.GA30963@pengutronix.de> (Sascha Hauer's message
	of "Sat, 14 May 2011 19:16:07 +0200")
References: <04EB6ACBB90C8844892BE0B9828F13C8018734BA036D@SRVSBS.airtag.local>
	<20110513172252.GZ30963@pengutronix.de>
	<87d3jlkbb0.fsf@macbook.be.48ers.dk>
	<20110514171607.GA30963@pengutronix.de>
Message-ID: <874o4xj6k0.fsf@macbook.be.48ers.dk>

>>>>> "Sascha" == Sascha Hauer <s.hauer at pengutronix.de> writes:

Hi,

 >> The crc32 command is largely legacy from u-boot. Would there be interest
 >> in a cksum command (it's afaik just like the normal crc32 except it also
 >> uses the length) or md5/sha1/sha256sum? We have all the infrastructure,
 >> so it should be easy to add.

 Sascha> md5sum would be very useful. Would it add much to the binary space?

I don't think so. I did a quick little proof of concept implementation
(which would work for any algorithm supported by the digest stuff) and
it ended up like:

 size lib/md5.o common/digest.o commands/md5.o
   text	   data	    bss	    dec	    hex	filename
   2841	    152	      0	   2993	    bb1	lib/md5.o
    339	     16	      0	    355	    163	common/digest.o
    969	      0	      0	    969	    3c9	commands/md5.o

So less than 1K if you already use md5/digest for something else,
otherwise ~4K.

I'll clean up the code a bit more and send a patch.

-- 
Bye, Peter Korsgaard


From agalakhov at gmail.com  Sun May 15 04:50:15 2011
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Sun, 15 May 2011 14:50:15 +0600
Subject: crc32 command
In-Reply-To: <874o4xj6k0.fsf@macbook.be.48ers.dk>
References: <04EB6ACBB90C8844892BE0B9828F13C8018734BA036D@SRVSBS.airtag.local>
	<20110513172252.GZ30963@pengutronix.de>
	<87d3jlkbb0.fsf@macbook.be.48ers.dk>
	<20110514171607.GA30963@pengutronix.de>
	<874o4xj6k0.fsf@macbook.be.48ers.dk>
Message-ID: <BANLkTimrubBcnEFd1Yv88_ShDc93bLMT=A@mail.gmail.com>

>  Sascha> md5sum would be very useful. Would it add much to the binary
> space?
>

Since there are already digest algorithms in lib/, the implementation will
be just couple of lines of the code. It will be as large as lib/ digests
are.

I'd like to write the code if nobody else do.

--
Alex
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From franck.jullien at gmail.com  Sun May 15 15:34:27 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Sun, 15 May 2011 21:34:27 +0200
Subject: [PATCH 0/5] [Nios2]: Differents fixes
Message-ID: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

There is some minor fixes.

Franck JULLIEN (5):
  [Nios2]: Update generic env/config
  [Nios2]: Fix typo in generic.c
  [Nios2]: Change system frequency in generic board
  [Nios2]: Fix compiler warning
  [Nios2]: Fix dma mapping end address

 arch/nios2/boards/generic/env/config  |    5 +++++
 arch/nios2/boards/generic/generic.c   |    4 ++--
 arch/nios2/boards/generic/nios_sopc.h |   12 ++++++------
 arch/nios2/include/asm/dma-mapping.h  |    2 +-
 drivers/net/altera_tse.c              |    2 +-
 5 files changed, 15 insertions(+), 10 deletions(-)



From franck.jullien at gmail.com  Sun May 15 15:34:28 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Sun, 15 May 2011 21:34:28 +0200
Subject: [PATCH 1/5] [Nios2]: Update generic env/config
In-Reply-To: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
References: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
Message-ID: <1305488072-1765-2-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

This adds kernel_loc, kernelimage_type and bootargs to the
generic board environment. This allows the generic board
to boot linux on the example I'll provide on my website.

Signed-off-by: Franck JULLIEN <franck.jullien at gmail.com>
---
 arch/nios2/boards/generic/env/config |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/nios2/boards/generic/env/config b/arch/nios2/boards/generic/env/config
index df7d09e..5d23098 100644
--- a/arch/nios2/boards/generic/env/config
+++ b/arch/nios2/boards/generic/env/config
@@ -4,6 +4,9 @@
 kernel=flash
 root=flash
 
+kernel_loc=nor
+kernelimage_type=uimage
+
 # use 'dhcp' todo dhcp in barebox and in kernel
 ip=none
 
@@ -11,6 +14,8 @@ autoboot_timeout=3
 
 nor_parts="256k(barebox),128k(env),4M(kernel),-(rootfs)"
 
+bootargs="console=ttyS0,9600"
+
 # set a fancy prompt (if support is compiled in)
 PS1="\e[1;33mbarebox@\e[1;32mgeneric:\w\e[0m "
 
-- 
1.7.0.4



From franck.jullien at gmail.com  Sun May 15 15:34:29 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Sun, 15 May 2011 21:34:29 +0200
Subject: [PATCH 2/5] [Nios2]: Fix typo in generic.c
In-Reply-To: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
References: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
Message-ID: <1305488072-1765-3-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

The device init function has the name of one of my board (comBoard).
This patch fix the name of the function to generic_device_init.

Signed-off-by: Franck JULLIEN <franck.jullien at gmail.com>
---
 arch/nios2/boards/generic/generic.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/nios2/boards/generic/generic.c b/arch/nios2/boards/generic/generic.c
index 7e939ce..4f7e747 100644
--- a/arch/nios2/boards/generic/generic.c
+++ b/arch/nios2/boards/generic/generic.c
@@ -48,7 +48,7 @@ static struct device_d epcs_flash_device = {
 };
 */
 
-static int comBoard_devices_init(void)
+static int generic_devices_init(void)
 {
 	register_device(&cfi_dev);
 	register_device(&ram_dev);
@@ -63,7 +63,7 @@ static int comBoard_devices_init(void)
 	return 0;
 }
 
-device_initcall(comBoard_devices_init);
+device_initcall(generic_devices_init);
 
 
 static int altera_console_init(void)
-- 
1.7.0.4



From franck.jullien at gmail.com  Sun May 15 15:34:31 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Sun, 15 May 2011 21:34:31 +0200
Subject: [PATCH 4/5] [Nios2]: Fix compiler warning
In-Reply-To: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
References: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
Message-ID: <1305488072-1765-5-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

Fix incompatible pointer type warning.

Signed-off-by: Franck JULLIEN <franck.jullien at gmail.com>
---
 drivers/net/altera_tse.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
index d922a9a..ac8cd2d 100644
--- a/drivers/net/altera_tse.c
+++ b/drivers/net/altera_tse.c
@@ -526,7 +526,7 @@ static int tse_probe(struct device_d *dev)
 	tx_desc = (struct alt_sgdma_descriptor *)NIOS_SOPC_TSE_DESC_MEM_BASE;
 	rx_desc = tx_desc + 2;
 #else
-	tx_desc = dma_alloc_coherent(sizeof(*tx_desc) * (3 + PKTBUFSRX), &dma_handle);
+	tx_desc = dma_alloc_coherent(sizeof(*tx_desc) * (3 + PKTBUFSRX), (unsigned long *)&dma_handle);
 	rx_desc = tx_desc + 2;
 
 	if (!tx_desc) {
-- 
1.7.0.4



From franck.jullien at gmail.com  Sun May 15 15:34:30 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Sun, 15 May 2011 21:34:30 +0200
Subject: [PATCH 3/5] [Nios2]: Change system frequency in generic board
In-Reply-To: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
References: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
Message-ID: <1305488072-1765-4-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

In order to match the example I'll provide on my website,
set the system frequency to 100MHz in the generic board
nios_sopc.h

Signed-off-by: Franck JULLIEN <franck.jullien at gmail.com>
---
 arch/nios2/boards/generic/nios_sopc.h |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/nios2/boards/generic/nios_sopc.h b/arch/nios2/boards/generic/nios_sopc.h
index 5ee3642..688bc44 100644
--- a/arch/nios2/boards/generic/nios_sopc.h
+++ b/arch/nios2/boards/generic/nios_sopc.h
@@ -28,7 +28,7 @@
  */
 #define CPU_IMPLEMENTATION "fast"
 #define BIG_ENDIAN 0
-#define CPU_FREQ 50000000
+#define CPU_FREQ 100000000
 #define ICACHE_LINE_SIZE 32
 #define ICACHE_LINE_SIZE_LOG2 5
 #define ICACHE_SIZE 8192
@@ -221,7 +221,7 @@
 #define SGDMA_TX_BASE 0x4204400
 #define SGDMA_TX_SPAN 64
 #define SGDMA_TX_END 0x420443f
-#define SGDMA_TX_IRQ 0
+#define SGDMA_TX_IRQ 5
 #define SGDMA_TX_READ_BLOCK_DATA_WIDTH 32
 #define SGDMA_TX_WRITE_BLOCK_DATA_WIDTH 32
 #define SGDMA_TX_STREAM_DATA_WIDTH 32
@@ -336,7 +336,7 @@
 #define UART_USE_EOP_REGISTER 0
 #define UART_SIM_TRUE_BAUD 0
 #define UART_SIM_CHAR_STREAM ""
-#define UART_FREQ 50000000
+#define UART_FREQ 100000000
 
 /*
  * Macros for device 'SYS_CLK_TIMER', class 'altera_avalon_timer'
@@ -356,8 +356,8 @@
 #define SYS_CLK_TIMER_PERIOD_UNITS "ms"
 #define SYS_CLK_TIMER_RESET_OUTPUT 0
 #define SYS_CLK_TIMER_TIMEOUT_PULSE_OUTPUT 0
-#define SYS_CLK_TIMER_FREQ 50000000
-#define SYS_CLK_TIMER_LOAD_VALUE 49999ULL
+#define SYS_CLK_TIMER_FREQ 100000000
+#define SYS_CLK_TIMER_LOAD_VALUE 99999ULL
 #define SYS_CLK_TIMER_COUNTER_SIZE 32
 #define SYS_CLK_TIMER_MULT 0.0010
 #define SYS_CLK_TIMER_TICKS_PER_SEC 1000
@@ -384,7 +384,7 @@
 #define LED_STATUS_RESET_VALUE 0x3
 #define LED_STATUS_EDGE_TYPE "NONE"
 #define LED_STATUS_IRQ_TYPE "NONE"
-#define LED_STATUS_FREQ 50000000
+#define LED_STATUS_FREQ 100000000
 
 /*
  * Macros for device 'JTAG_UART', class 'altera_avalon_jtag_uart'
-- 
1.7.0.4



From franck.jullien at gmail.com  Sun May 15 15:34:32 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Sun, 15 May 2011 21:34:32 +0200
Subject: [PATCH 5/5] [Nios2]: Fix dma mapping end address
In-Reply-To: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
References: <1305488072-1765-1-git-send-email-franck.jullien@gmail.com>
Message-ID: <1305488072-1765-6-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

The flush_dcache_range function takes an absolute end address
so we have to add start address to the second parameter.

Signed-off-by: Franck JULLIEN <franck.jullien at gmail.com>
---
 arch/nios2/include/asm/dma-mapping.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
index 49ebf79..5b70f4c 100644
--- a/arch/nios2/include/asm/dma-mapping.h
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -15,7 +15,7 @@ static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
 	void *addr = malloc(len + DCACHE_LINE_SIZE);
 	if (!addr)
 		return 0;
-	flush_dcache_range((unsigned long)addr, len + DCACHE_LINE_SIZE);
+	flush_dcache_range((unsigned long)addr,(unsigned long)addr + len + DCACHE_LINE_SIZE);
 	*handle = ((unsigned long)addr +
 		   (DCACHE_LINE_SIZE - 1)) &
 		~(DCACHE_LINE_SIZE - 1) & ~(IO_REGION_BASE);
-- 
1.7.0.4



From franck.jullien at gmail.com  Sun May 15 17:13:29 2011
From: franck.jullien at gmail.com (franck.jullien at gmail.com)
Date: Sun, 15 May 2011 23:13:29 +0200
Subject: [Nios2]: Change generic board flash partitions
Message-ID: <1305494009-3939-1-git-send-email-franck.jullien@gmail.com>

From: Franck JULLIEN <franck.jullien at gmail.com>

Signed-off-by: Franck JULLIEN <franck.jullien at gmail.com>
---
 arch/nios2/boards/generic/env/config |    2 +-
 arch/nios2/boards/generic/generic.c  |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/nios2/boards/generic/env/config b/arch/nios2/boards/generic/env/config
index df7d09e..18500ed 100644
--- a/arch/nios2/boards/generic/env/config
+++ b/arch/nios2/boards/generic/env/config
@@ -9,7 +9,7 @@ ip=none
 
 autoboot_timeout=3
 
-nor_parts="256k(barebox),128k(env),4M(kernel),-(rootfs)"
+nor_parts="128k(env),768k(fpga),256k(barebox),-(kernel)"
 
 # set a fancy prompt (if support is compiled in)
 PS1="\e[1;33mbarebox@\e[1;32mgeneric:\w\e[0m "
diff --git a/arch/nios2/boards/generic/generic.c b/arch/nios2/boards/generic/generic.c
index 7e939ce..8d2cc72 100644
--- a/arch/nios2/boards/generic/generic.c
+++ b/arch/nios2/boards/generic/generic.c
@@ -55,8 +55,8 @@ static int comBoard_devices_init(void)
 	register_device(&mac_dev);
 	/*register_device(&epcs_flash_device);*/
 
-	devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0");
-	devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
+	devfs_add_partition("nor0", 0xe0000, 0x40000, PARTITION_FIXED, "self0");
+	devfs_add_partition("nor0", 0x00000, 0x20000, PARTITION_FIXED, "env0");
 
 	protect_file("/dev/env0", 1);
 
-- 
1.7.0.4



From s.hauer at pengutronix.de  Mon May 16 02:30:18 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 16 May 2011 08:30:18 +0200
Subject: [PATCH] fix console fifo (and loadb/loady commands)
In-Reply-To: <4DCD37D9.5020408@gmail.com>
References: <4DCD32B4.9090606@yandex-team.ru>
 <4DCD37D9.5020408@gmail.com>
Message-ID: <20110516063018.GC30963@pengutronix.de>

Hi Alexey,

On Fri, May 13, 2011 at 07:53:29PM +0600, Alexey Galakhov wrote:
> This patch fixes loadb and loady commands. tstc() should return true if
> console_input_buffer is not empty.

The patch is fine, thanks.

Your mailer converts tabs into whitespaces. Also you forgot to add a
signed-off-by to your patch. I fixed this up manually this time.

Sascha

> 
> diff -udp ./common/console.c.orig ./common/console.c
> --- ./common/console.c.orig    2011-05-06 13:30:20.000000000 +0600
> +++ ./common/console.c    2011-05-13 19:42:12.000000000 +0600
> @@ -195,6 +195,20 @@ static int getc_raw(void)
>      }
>  }
>  
> +static int tstc_raw(void)
> +{
> +    struct console_device *cdev;
> +
> +    for_each_console(cdev) {
> +        if (!(cdev->f_active & CONSOLE_STDIN))
> +            continue;
> +        if (cdev->tstc(cdev))
> +            return 1;
> +    }
> +
> +    return 0;
> +}
> +
>  int getc(void)
>  {
>      unsigned char ch;
> @@ -209,7 +223,7 @@ int getc(void)
>      while (1) {
>          poller_call();
>  
> -        if (tstc()) {
> +        if (tstc_raw()) {
>              kfifo_putc(console_input_buffer, getc_raw());
>  
>              start = get_time_ns();
> @@ -236,16 +250,7 @@ EXPORT_SYMBOL(fgetc);
>  
>  int tstc(void)
>  {
> -    struct console_device *cdev;
> -
> -    for_each_console(cdev) {
> -        if (!(cdev->f_active & CONSOLE_STDIN))
> -            continue;
> -        if (cdev->tstc(cdev))
> -            return 1;
> -    }
> -
> -    return 0;
> +    return kfifo_len(console_input_buffer) || tstc_raw();
>  }
>  EXPORT_SYMBOL(tstc);
>  
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From agalakhov at gmail.com  Mon May 16 02:53:42 2011
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Mon, 16 May 2011 12:53:42 +0600
Subject: [PATCH] fix console fifo (and loadb/loady commands)
In-Reply-To: <20110516063018.GC30963@pengutronix.de>
References: <4DCD32B4.9090606@yandex-team.ru> <4DCD37D9.5020408@gmail.com>
	<20110516063018.GC30963@pengutronix.de>
Message-ID: <4DD0C9F6.6050407@gmail.com>

On 05/16/2011 12:30 PM, Sascha Hauer wrote:
> Hi Alexey,
>
> On Fri, May 13, 2011 at 07:53:29PM +0600, Alexey Galakhov wrote:
>> This patch fixes loadb and loady commands. tstc() should return true if
>> console_input_buffer is not empty.
> The patch is fine, thanks.
>
> Your mailer converts tabs into whitespaces. Also you forgot to add a
> signed-off-by to your patch. I fixed this up manually this time.
>
> Sascha
Thank you! I'll check my mailer.

I'm preparing some more patches: s3c framebuffer support (originally
written by Juergen Beisert but broken and outdated), mini2440
framebuffer support and JPEG image decoding (takes about 20kB of space
by itself but reduces overall size significantly due to smaller image
files).

--
Alex


From Ramana.Murthy at microsemi.com  Tue May 17 04:37:17 2011
From: Ramana.Murthy at microsemi.com (Murthy, Ramana)
Date: Tue, 17 May 2011 14:07:17 +0530
Subject: help  -- barebox on ARM Cortex M3
Message-ID: <6F2524F76379064FB8CB9CEE698D56DA8D40DE20D3@IN-MSG-01.amer.actel.com>

Hi All,

I am new to barebox. Now a days I am trying to port a good bootloader onto ARM Cortex M3 based board. The board has enough memory, Serial and Ethernet interfaces.
Only thing lacking in Cortex M3 is MMU. Instead there is MPU(Memory Protection Unit).

Does barebox support ARM devices without MMU? If Yes, please point me to the related links.

Thanks in advance.

Best Regards,
N.S.S.R.Murthy,
Ph # +91-40-67303600, Extn - 3731,
Mobile # +91-9959677780.


________________________________
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From plagnioj at jcrosoft.com  Tue May 17 06:42:54 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Tue, 17 May 2011 12:42:54 +0200
Subject: help  -- barebox on ARM Cortex M3
In-Reply-To: <6F2524F76379064FB8CB9CEE698D56DA8D40DE20D3@IN-MSG-01.amer.actel.com>
References: <6F2524F76379064FB8CB9CEE698D56DA8D40DE20D3@IN-MSG-01.amer.actel.com>
Message-ID: <20110517104254.GB2737@game.jcrosoft.org>

Hi,

	please do not write HTML e-mail use plain/text
On 14:07 Tue 17 May     , Murthy, Ramana wrote:
>    Hi All,
> 
>     
> 
>    I am new to barebox. Now a days I am trying to port a good bootloader onto
>    ARM Cortex M3 based board. The board has enough memory, Serial and
>    Ethernet interfaces.
> 
>    Only thing lacking in Cortex M3 is MMU. Instead there is MPU(Memory
>    Protection Unit).
> 
>     
> 
>    Does barebox support ARM devices without MMU? If Yes, please point me to
>    the related links.
Basicaly Barebox does not enable the MMU on ARM but actually the assembly is
not write to be 100% compliant with Thumb2. Otherwise you will not have big
issue to add the M3 support

To enable the MMU you need to enable CONFIG_MMU otherwise noMMU enabled by
default

Best Regards,
J.


From jacmet at sunsite.dk  Tue May 17 07:53:54 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Tue, 17 May 2011 13:53:54 +0200
Subject: [PATCH] sandbox: allow lseek on host files
Message-ID: <1305633234-27771-1-git-send-email-jacmet@sunsite.dk>

Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>
---
 arch/sandbox/board/hostfile.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/sandbox/board/hostfile.c b/arch/sandbox/board/hostfile.c
index e460d0a..b049baa 100644
--- a/arch/sandbox/board/hostfile.c
+++ b/arch/sandbox/board/hostfile.c
@@ -66,6 +66,7 @@ static void hf_info(struct device_d *dev)
 static struct file_operations hf_fops = {
 	.read  = hf_read,
 	.write = hf_write,
+	.lseek = dev_lseek_default,
 };
 
 static int hf_probe(struct device_d *dev)
-- 
1.7.4.4



From jacmet at sunsite.dk  Tue May 17 08:10:53 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Tue, 17 May 2011 14:10:53 +0200
Subject: [PATCH] commands: add md5/sha1/sha256sum commands using the digest api
Message-ID: <1305634253-29141-1-git-send-email-jacmet@sunsite.dk>

The interface emulates the Linux commands, except that you can
specify a sub area - E.G.:

barebox:/ md5sum /dev/fd0 2M+1M /env/config /env/bin/boot 10+2
61c4c0180b044191d28f27545f43562f  /dev/fd0	0x00200000 ... 0x00300000
908b84bcbadd2f263583a65ff31d1cad  /env/config	0x00000000 ... 0x000003a7
f23bd15825cc5006cf5f9fd486d82d2d  /env/bin/boot	0x0000000a ... 0x0000000c

Adds around 1400 bytes (+ size of digest code) with everything enabled.

Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>
---
 commands/Kconfig  |   22 +++++++
 commands/Makefile |    1 +
 commands/digest.c |  178 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 201 insertions(+), 0 deletions(-)
 create mode 100644 commands/digest.c

diff --git a/commands/Kconfig b/commands/Kconfig
index f192d30..30eeff9 100644
--- a/commands/Kconfig
+++ b/commands/Kconfig
@@ -222,6 +222,28 @@ config CMD_CRC_CMP
 	depends on CMD_CRC
 	prompt "compare 2 files crc"
 
+config CMD_DIGEST
+       tristate
+       select DIGEST
+
+config CMD_MD5SUM
+	tristate
+	select CMD_DIGEST
+	select MD5
+	prompt "md5sum"
+
+config CMD_SHA1SUM
+	tristate
+	select CMD_DIGEST
+	select SHA1
+	prompt "sha1sum"
+
+config CMD_SHA256SUM
+	tristate
+	select CMD_DIGEST
+	select SHA256
+	prompt "sha256sum"
+
 config CMD_MTEST
 	tristate
 	prompt "mtest"
diff --git a/commands/Makefile b/commands/Makefile
index f7ef9a8..8ee4aba 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_CMD_MOUNT)		+= mount.o
 obj-$(CONFIG_CMD_UMOUNT)	+= umount.o
 obj-$(CONFIG_CMD_REGINFO)	+= reginfo.o
 obj-$(CONFIG_CMD_CRC)		+= crc.o
+obj-$(CONFIG_CMD_DIGEST)	+= digest.o
 obj-$(CONFIG_CMD_CLEAR)		+= clear.o
 obj-$(CONFIG_CMD_TEST)		+= test.o
 obj-$(CONFIG_CMD_FLASH)		+= flash.o
diff --git a/commands/digest.c b/commands/digest.c
new file mode 100644
index 0000000..587a550
--- /dev/null
+++ b/commands/digest.c
@@ -0,0 +1,178 @@
+/*
+ * digest.c - Calculate a md5/sha1/sha256 checksum of a memory area
+ *
+ * Copyright (c) 2011 Peter Korsgaard <jacmet at sunsite.dk>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <xfuncs.h>
+#include <malloc.h>
+#include <digest.h>
+#include <linux/ctype.h>
+
+static void print_digest(struct digest *d)
+{
+	unsigned char *data;
+	int i;
+
+	data = xmalloc(d->length);
+	d->final(d, data);
+
+	for (i=0; i<d->length; i++)
+		printf("%02x", data[i]);
+
+	free(data);
+}
+
+static int file_digest(struct digest *d, char *filename,
+					   ulong start, ulong size)
+{
+	ulong len = 0;
+	int fd, now, ret = 0;
+	char *buf;
+
+	d->init(d);
+
+	fd = open(filename, O_RDONLY);
+	if (fd < 0) {
+		printf("open %s: %s\n", filename, errno_str());
+		return fd;
+	}
+
+	if (start > 0) {
+		ret = lseek(fd, start, SEEK_SET);
+		if (ret == -1) {
+			perror("lseek");
+			goto out;
+		}
+	}
+
+	buf = xmalloc(4096);
+
+	while (size) {
+		now = min((ulong)4096, size);
+		now = read(fd, buf, now);
+		if (now < 0) {
+			ret = now;
+			perror("read");
+			goto out_free;
+		}
+		if (!now)
+			break;
+
+		d->update(d, buf, now);
+		size -= now;
+		len += now;
+	}
+
+	print_digest(d);
+	printf("  %s\t0x%08lx ... 0x%08lx\n", filename, start, start + len);
+
+out_free:
+	free(buf);
+out:
+	close(fd);
+
+	return ret;
+}
+
+static int do_digest(struct command *cmdtp, int argc, char *argv[])
+{
+	char algorithm[7];
+	struct digest *d;
+
+	/* digest algoritm is command name without "sum" */
+	strlcpy(algorithm, cmdtp->name,
+			strstr(cmdtp->name, "sum") + 1 - cmdtp->name);
+	d = digest_get_by_name(algorithm);
+	BUG_ON(!d);
+
+	if (argc < 2)
+		return COMMAND_ERROR_USAGE;
+
+	argv++;
+	while (*argv) {
+		char *filename = "/dev/mem";
+		ulong start = 0, size = ~0;
+
+		/* arguments are either file, file+area or area */
+		if (parse_area_spec(*argv, &start, &size)) {
+			filename = *argv;
+			if (argv[1] && !parse_area_spec(argv[1], &start, &size)) {
+				argv++;
+			}
+		}
+
+		if (file_digest(d, filename, start, size) < 0)
+			return 1;
+
+		argv++;
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_CMD_MD5SUM
+
+BAREBOX_CMD_HELP_START(md5sum)
+BAREBOX_CMD_HELP_USAGE("md5sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a md5 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(md5sum)
+	.cmd		= do_digest,
+	.usage		= "md5 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_md5sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_MD5SUM */
+
+#ifdef CONFIG_CMD_SHA1SUM
+
+BAREBOX_CMD_HELP_START(sha1sum)
+BAREBOX_CMD_HELP_USAGE("sha1sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a sha1 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(sha1sum)
+	.cmd		= do_digest,
+	.usage		= "sha1 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_sha1sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_SHA1SUM */
+
+#ifdef CONFIG_CMD_SHA256SUM
+
+BAREBOX_CMD_HELP_START(sha256sum)
+BAREBOX_CMD_HELP_USAGE("sha256sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a sha256 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(sha256sum)
+	.cmd		= do_digest,
+	.usage		= "sha256 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_sha256sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_SHA256SUM */
-- 
1.7.4.4



From plagnioj at jcrosoft.com  Tue May 17 08:30:13 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Tue, 17 May 2011 14:30:13 +0200
Subject: [PATCH] commands: add md5/sha1/sha256sum commands using the
	digest api
In-Reply-To: <1305634253-29141-1-git-send-email-jacmet@sunsite.dk>
References: <1305634253-29141-1-git-send-email-jacmet@sunsite.dk>
Message-ID: <20110517123013.GF2737@game.jcrosoft.org>

> +static void print_digest(struct digest *d)
> +{
> +	unsigned char *data;
> +	int i;
> +
> +	data = xmalloc(d->length);
hang here no
please use malloc it's a command we must not hang if out of mem
just because we use a digest command
> +	d->final(d, data);
> +
> +	for (i=0; i<d->length; i++)
> +		printf("%02x", data[i]);
> +
> +	free(data);
> +}
> +
> +static int file_digest(struct digest *d, char *filename,
> +					   ulong start, ulong size)
> +{
> +	ulong len = 0;
> +	int fd, now, ret = 0;
> +	char *buf;
> +
> +	d->init(d);
> +
> +	fd = open(filename, O_RDONLY);
> +	if (fd < 0) {
> +		printf("open %s: %s\n", filename, errno_str());
> +		return fd;
> +	}
> +
> +	if (start > 0) {
> +		ret = lseek(fd, start, SEEK_SET);
> +		if (ret == -1) {
> +			perror("lseek");
> +			goto out;
> +		}
> +	}
> +
> +	buf = xmalloc(4096);
ditto here
> +
> +	while (size) {
> +		now = min((ulong)4096, size);
> +		now = read(fd, buf, now);
> +		if (now < 0) {
> +			ret = now;
> +			perror("read");
> +			goto out_free;
> +		}
> +		if (!now)
> +			break;
> +
> +		d->update(d, buf, now);
> +		size -= now;
> +		len += now;
> +	}
> +
> +	print_digest(d);
> +	printf("  %s\t0x%08lx ... 0x%08lx\n", filename, start, start + len);
> +
> +out_free:
> +	free(buf);
> +out:
> +	close(fd);
> +
> +	return ret;
> +}
> +
> +static int do_digest(struct command *cmdtp, int argc, char *argv[])
> +{
> +	char algorithm[7];
> +	struct digest *d;
> +
> +	/* digest algoritm is command name without "sum" */
> +	strlcpy(algorithm, cmdtp->name,
> +			strstr(cmdtp->name, "sum") + 1 - cmdtp->name);
can we do more simple?
> +	d = digest_get_by_name(algorithm);
> +	BUG_ON(!d);
> +
> +	if (argc < 2)
> +		return COMMAND_ERROR_USAGE;
> +
> +	argv++;
> +	while (*argv) {
> +		char *filename = "/dev/mem";
> +		ulong start = 0, size = ~0;
do we really need to declare this here?
and /dev/mem as default

if yes for /dev/mem as default this should be documented in the help at least
> +
> +		/* arguments are either file, file+area or area */
> +		if (parse_area_spec(*argv, &start, &size)) {
> +			filename = *argv;
> +			if (argv[1] && !parse_area_spec(argv[1], &start, &size)) {
> +				argv++;
> +			}
> +		}
> +
> +		if (file_digest(d, filename, start, size) < 0)
> +			return 1;
do we really need to stop if ine of them is not availlable
and we should check the getc to be able to interrupt it

Best Regards,
J.


From jacmet at sunsite.dk  Tue May 17 09:10:38 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Tue, 17 May 2011 15:10:38 +0200
Subject: [PATCH] commands: add md5/sha1/sha256sum commands using the
	digest api
In-Reply-To: <20110517123013.GF2737@game.jcrosoft.org> (Jean-Christophe
	PLAGNIOL-VILLARD's message of "Tue, 17 May 2011 14:30:13 +0200")
References: <1305634253-29141-1-git-send-email-jacmet@sunsite.dk>
	<20110517123013.GF2737@game.jcrosoft.org>
Message-ID: <87ei3xh3qp.fsf@macbook.be.48ers.dk>

>>>>> "Jean-Christophe" == Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com> writes:

Hi,

 >> +static void print_digest(struct digest *d)
 >> +{
 >> +	unsigned char *data;
 >> +	int i;
 >> +
 >> +	data = xmalloc(d->length);

 Jean-Christophe> hang here no
 Jean-Christophe> please use malloc it's a command we must not hang if out of mem
 Jean-Christophe> just because we use a digest command

Ok. This is cutnpaste from the crc command though. A quick look at
commands shows that others do the same:

git grep xmalloc commands/
commands/bootm.c:               handle->data = xmalloc(len);
commands/cat.c: buf = xmalloc(BUFSIZE);
commands/crc.c: buf = xmalloc(4096);
commands/digest.c:      data = xmalloc(d->length);
commands/digest.c:      buf = xmalloc(4096);
commands/i2c.c: buf = xmalloc(count);
commands/i2c.c: buf = xmalloc(count);
commands/mem.c: rw_buf1 = xmalloc(RW_BUF_SIZE);
commands/mem.c: buf = xmalloc(RW_BUF_SIZE);


 >> +static int do_digest(struct command *cmdtp, int argc, char *argv[])
 >> +{
 >> +	char algorithm[7];
 >> +	struct digest *d;
 >> +
 >> +	/* digest algoritm is command name without "sum" */
 >> +	strlcpy(algorithm, cmdtp->name,
 >> +			strstr(cmdtp->name, "sum") + 1 - cmdtp->name);

 Jean-Christophe> can we do more simple?

Maybe. I wanted something automatic rather than a series of strcmp
checks, but feel free to suggest something else.


 >> +	d = digest_get_by_name(algorithm);
 >> +	BUG_ON(!d);
 >> +
 >> +	if (argc < 2)
 >> +		return COMMAND_ERROR_USAGE;
 >> +
 >> +	argv++;
 >> +	while (*argv) {
 >> +		char *filename = "/dev/mem";
 >> +		ulong start = 0, size = ~0;

 Jean-Christophe> do we really need to declare this here?
 Jean-Christophe> and /dev/mem as default

Yes, or rather you need to initialize it for each iteration of the
loop. We could move the declaration up to the beginning of the function,
but as they are only used inside the loop it imho makes more sense to
put it here.

 Jean-Christophe> if yes for /dev/mem as default this should be documented in the help at least

Why? all the memory commands do that (md/mw/crc32).

 >> +
 >> +		/* arguments are either file, file+area or area */
 >> +		if (parse_area_spec(*argv, &start, &size)) {
 >> +			filename = *argv;
 >> +			if (argv[1] && !parse_area_spec(argv[1], &start, &size)) {
 >> +				argv++;
 >> +			}
 >> +		}
 >> +
 >> +		if (file_digest(d, filename, start, size) < 0)
 >> +			return 1;

 Jean-Christophe> do we really need to stop if ine of them is not availlable

I don't feel strongly about it, but it seems the simplest solution.

 Jean-Christophe> and we should check the getc to be able to interrupt it

crc doesn't do that either, but ok - I can add a ctrlc() check in the
main loop.

Thanks for the review.

-- 
Bye, Peter Korsgaard


From agalakhov at gmail.com  Tue May 17 12:44:00 2011
From: agalakhov at gmail.com (Alex Galakhov)
Date: Tue, 17 May 2011 22:44:00 +0600
Subject: [PATCH 1/2] Add support for Samsung S3C24x0 framebuffer.
Message-ID: <1305650641-15125-1-git-send-email-agalakhov@gmail.com>

Heavily based on original Juergen Beisert's code.

Signed-off-by: Alex Galakhov <agalakhov at gmail.com>
---
 arch/arm/mach-s3c24xx/include/mach/fb.h |   59 ++++
 drivers/video/Kconfig                   |   13 +
 drivers/video/Makefile                  |    1 +
 drivers/video/s3c.c                     |  451 +++++++++++++++++++++++++++++++
 4 files changed, 524 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s3c24xx/include/mach/fb.h
 create mode 100644 drivers/video/s3c.c

diff --git a/arch/arm/mach-s3c24xx/include/mach/fb.h b/arch/arm/mach-s3c24xx/include/mach/fb.h
new file mode 100644
index 0000000..05e013a
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/include/mach/fb.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2010 Juergen Beisert
+ * Copyright (C) 2011 Alexey Galakhov
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MACH_FB_H_
+# define __MACH_FB_H_
+
+#include <fb.h>
+
+/** Proprietary flags corresponding to  S3C24x0 LCDCON5 register */
+
+/** ! INVVDEN - DE active high */
+#define FB_SYNC_DE_HIGH_ACT	(1 << 23)
+/** INVVCLK - invert CLK signal */
+#define FB_SYNC_CLK_INVERT	(1 << 24)
+/** INVVD - invert data */
+#define FB_SYNC_DATA_INVERT	(1 << 25)
+/** INVPWREN - use PWREN signal */
+#define FB_SYNC_INVERT_PWREN	(1 << 26)
+/** INVLEND - use LEND signal */
+#define FB_SYNC_INVERT_LEND	(1 << 27)
+/** PWREN - use PWREN signal */
+#define FB_SYNC_USE_PWREN	(1 << 28)
+/** ENLEND - use LEND signal */
+#define FB_SYNC_USE_LEND	(1 << 29)
+/** BSWP - swap bytes */
+#define FB_SYNC_SWAP_BYTES	(1 << 30)
+/** HWSWP - swap half words */
+#define FB_SYNC_SWAP_HW		(1 << 31)
+
+struct s3c_fb_platform_data {
+	struct fb_videomode *mode_list;
+	unsigned mode_cnt;
+
+	unsigned bits_per_pixel;
+	int passive_display;	/**< enable support for STN or CSTN displays */
+
+	/** hook to enable backlight and stuff */
+	void (*enable)(int enable);
+};
+
+#endif /* __MACH_FB_H_ */
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index c652622..28bcfed 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -27,4 +27,17 @@ config DRIVER_VIDEO_STM
 	  Say 'Y' here to enable framebuffer and splash screen support for
 	  i.MX23 and i.MX28 based systems.
 
+config DRIVER_VIDEO_S3C
+	bool "S3C244x framebuffer driver"
+	depends on ARCH_S3C24xx
+	help
+	  Add support for the S3C244x LCD controller.
+
+if DRIVER_VIDEO_S3C
+
+config DRIVER_VIDEO_S3C_VERBOSE
+	bool "S3C244x verbose framebuffer info"
+
+endif
+
 endif
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index a217a0b..66b08d8 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_VIDEO) += fb.o
 obj-$(CONFIG_DRIVER_VIDEO_STM) += stm.o
 obj-$(CONFIG_DRIVER_VIDEO_IMX) += imx.o
 obj-$(CONFIG_DRIVER_VIDEO_IMX_IPU) += imx-ipu-fb.o
+obj-$(CONFIG_DRIVER_VIDEO_S3C) += s3c.o
diff --git a/drivers/video/s3c.c b/drivers/video/s3c.c
new file mode 100644
index 0000000..ba3c3fa
--- /dev/null
+++ b/drivers/video/s3c.c
@@ -0,0 +1,451 @@
+/*
+ * Copyright (C) 2010 Juergen Beisert
+ * Copyright (C) 2011 Alexey Galakhov
+ *
+ * This driver is based on a patch found in the web:
+ * (C) Copyright 2006 by OpenMoko, Inc.
+ * Author: Harald Welte <laforge at openmoko.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/* #define DEBUG */
+
+#include <common.h>
+#include <init.h>
+#include <fb.h>
+#include <driver.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <mach/gpio.h>
+#include <mach/s3c24xx-generic.h>
+#include <mach/fb.h>
+
+#define LCDCON1 0x00
+# define PNRMODE(x) (((x) & 3) << 5)
+# define BPPMODE(x) (((x) & 0xf) << 1)
+# define SET_CLKVAL(x) (((x) & 0x3ff) << 8)
+# define GET_CLKVAL(x) (((x) >> 8) & 0x3ff)
+# define ENVID (1 << 0)
+
+#define LCDCON2 0x04
+# define SET_VBPD(x) (((x) & 0xff) << 24)
+# define SET_LINEVAL(x) (((x) & 0x3ff) << 14)
+# define SET_VFPD(x) (((x) & 0xff) << 6)
+# define SET_VSPW(x) ((x) & 0x3f)
+
+#define LCDCON3 0x08
+# define SET_HBPD(x) (((x) & 0x7f) << 19)
+# define SET_HOZVAL(x) (((x) & 0x7ff) << 8)
+# define SET_HFPD(x) ((x) & 0xff)
+
+#define LCDCON4 0x0c
+# define SET_HSPW(x) ((x) & 0xff)
+
+#define LCDCON5 0x10
+# define BPP24BL (1 << 12)
+# define FRM565 (1 << 11)
+# define INV_CLK (1 << 10)
+# define INV_HS (1 << 9)
+# define INV_VS (1 << 8)
+# define INV_DTA (1 << 7)
+# define INV_DE (1 << 6)
+# define INV_PWREN (1 << 5)
+# define INV_LEND (1 << 4)
+# define ENA_PWREN (1 << 3)
+# define ENA_LEND (1 << 2)
+# define BSWP (1 << 1)
+# define HWSWP (1 << 0)
+
+#define LCDSADDR1 0x14
+# define SET_LCDBANK(x) (((x) & 0x1ff) << 21)
+# define GET_LCDBANK(x) (((x) >> 21) & 0x1ff)
+# define SET_LCDBASEU(x) ((x) & 0x1fffff)
+# define GET_LCDBASEU(x) ((x) & 0x1fffff)
+
+#define LCDSADDR2 0x18
+# define SET_LCDBASEL(x) ((x) & 0x1fffff)
+# define GET_LCDBASEL(x) ((x) & 0x1fffff)
+
+#define LCDSADDR3 0x1c
+# define SET_OFFSIZE(x) (((x) & 0x7ff) << 11)
+# define GET_OFFSIZE(x) (((x) >> 11) & 0x7ff)
+# define SET_PAGE_WIDTH(x) ((x) & 0x3ff)
+# define GET_PAGE_WIDTH(x) ((x) & 0x3ff)
+
+#define RED_LUT 0x20
+#define GREEN_LUT 0x24
+#define BLUE_LUT 0x28
+
+#define DITHMODE 0x4c
+
+#define TPAL 0x50
+
+#define LCDINTPND 0x54
+#define LCDSRCPND 0x58
+#define LCDINTMSK 0x5c
+# define FIWSEL (1 << 2)
+# define INT_FrSyn (1 << 1)
+# define INT_FiCnt (1 << 0)
+
+#define TCONSEL 0x60
+
+#define RED 0
+#define GREEN 1
+#define BLUE 2
+#define TRANSP 3
+
+struct s3cfb_info {
+	void __iomem *base;
+	unsigned memory_size;
+	struct fb_info info;
+	struct device_d *hw_dev;
+	int passive_display;
+	void (*enable)(int enable);
+};
+
+/* the RGB565 true colour mode */
+static const struct fb_bitfield def_rgb565[] = {
+	[RED] = {
+		.offset = 11,
+		.length = 5,
+	},
+	[GREEN] = {
+		.offset = 5,
+		.length = 6,
+	},
+	[BLUE] = {
+		.offset = 0,
+		.length = 5,
+	},
+	[TRANSP] = {	/* no support for transparency */
+		.length = 0,
+	}
+};
+
+/* the RGB888 true colour mode */
+static const struct fb_bitfield def_rgb888[] = {
+	[RED] = {
+		.offset = 16,
+		.length = 8,
+	},
+	[GREEN] = {
+		.offset = 8,
+		.length = 8,
+	},
+	[BLUE] = {
+		.offset = 0,
+		.length = 8,
+	},
+	[TRANSP] = {	/* no support for transparency */
+		.length = 0,
+	}
+};
+
+/**
+ * @param fb_info Framebuffer information
+ */
+static void s3cfb_enable_controller(struct fb_info *fb_info)
+{
+	struct s3cfb_info *fbi = fb_info->priv;
+	uint32_t con1;
+
+	con1 = readl(fbi->base + LCDCON1);
+
+	con1 |= ENVID;
+
+	writel(con1, fbi->base + LCDCON1);
+
+	if (fbi->enable)
+		(fbi->enable)(1);
+}
+
+/**
+ * @param fb_info Framebuffer information
+ */
+static void s3cfb_disable_controller(struct fb_info *fb_info)
+{
+	struct s3cfb_info *fbi = fb_info->priv;
+	uint32_t con1;
+
+	if (fbi->enable)
+		(fbi->enable)(0);
+
+	con1 = readl(fbi->base + LCDCON1);
+
+	con1 &= ~ENVID;
+
+	writel(con1, fbi->base + LCDCON1);
+}
+
+/**
+ * Prepare the video hardware for a specified video mode
+ * @param fb_info Framebuffer information
+ * @param mode The video mode description to initialize
+ * @return 0 on success
+ */
+static int s3cfb_activate_var(struct fb_info *fb_info)
+{
+	struct s3cfb_info *fbi = fb_info->priv;
+	struct fb_videomode *mode = fb_info->mode;
+	unsigned size, hclk, div;
+	uint32_t con1, con2, con3, con4, con5 = 0;
+
+	if (fbi->passive_display != 0) {
+		pr_err("Passive displays are currently not supported\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * we need at least this amount of memory for the framebuffer
+	 */
+	size = mode->xres * mode->yres * (fb_info->bits_per_pixel >> 3);
+	if (fbi->memory_size != size || fb_info->screen_base == NULL) {
+		if (fb_info->screen_base)
+			free(fb_info->screen_base);
+		fbi->memory_size = 0;
+		fb_info->screen_base = malloc(size);
+		if (! fb_info->screen_base)
+			return -ENOMEM;
+		memset(fb_info->screen_base, 0, size);
+		fbi->memory_size = size;
+	}
+
+	/* ensure video output is _off_ */
+	writel(0x00000000, fbi->base + LCDCON1);
+
+	hclk = s3c24xx_get_hclk() / 1000U;	/* hclk in kHz */
+	div = hclk / PICOS2KHZ(mode->pixclock);
+	if (div < 3)
+		div  = 3;
+	/* pixel clock is: (hclk) / ((div + 1) * 2) */
+	div += 1;
+	div >>= 1;
+	div -= 1;
+
+	con1 = PNRMODE(3) | SET_CLKVAL(div);	/* PNRMODE=3 is TFT */
+
+	switch (fb_info->bits_per_pixel) {
+#if 0
+	/* TODO add CLUT based modes */
+	case 1:
+		con1 |= BPPMODE(8);
+		break;
+	case 2:
+		con1 |= BPPMODE(9);
+		break;
+	case 4:
+		con1 |= BPPMODE(10);
+		break;
+	case 8:
+		con1 |= BPPMODE(11);
+		break;
+#endif
+	case 16:
+		con1 |= BPPMODE(12);
+		con5 |= FRM565;
+		con5 |= HWSWP;
+		fb_info->red = def_rgb565[RED];
+		fb_info->green = def_rgb565[GREEN];
+		fb_info->blue = def_rgb565[BLUE];
+		fb_info->transp =  def_rgb565[TRANSP];
+		break;
+	case 24:
+		con1 |= BPPMODE(13);
+		/* con5 |= BPP24BL;	*/ /* FIXME maybe needed, check alignment */
+		fb_info->red = def_rgb888[RED];
+		fb_info->green = def_rgb888[GREEN];
+		fb_info->blue = def_rgb888[BLUE];
+		fb_info->transp =  def_rgb888[TRANSP];
+		break;
+	default:
+		pr_err("Invalid bits per pixel value: %u\n", fb_info->bits_per_pixel);
+		return -EINVAL;
+	}
+
+	/* 'normal' in register description means positive logic */
+	if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
+		con5 |= INV_HS;
+	if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
+		con5 |= INV_VS;
+	if (!(mode->sync & FB_SYNC_DE_HIGH_ACT))
+		con5 |= INV_DE;
+	if (mode->sync & FB_SYNC_CLK_INVERT)
+		con5 |= INV_CLK;	/* display should latch at the rising edge */
+	if (mode->sync & FB_SYNC_DATA_INVERT)
+		con5 |= INV_DTA;
+	if (mode->sync & FB_SYNC_INVERT_PWREN)
+		con5 |= INV_PWREN;
+	if (mode->sync & FB_SYNC_INVERT_LEND)
+		con5 |= INV_LEND;
+	if (mode->sync & FB_SYNC_USE_PWREN)
+		con5 |= ENA_PWREN;	/* FIXME should this be done conditionally/later? */
+	if (mode->sync & FB_SYNC_USE_LEND)
+		con5 |= ENA_LEND;
+	if (mode->sync & FB_SYNC_SWAP_BYTES)
+		con5 ^= BSWP;
+	if (mode->sync & FB_SYNC_SWAP_HW)
+		con5 ^= HWSWP;
+
+	/* vertical timing */
+	con2 = SET_VBPD(mode->upper_margin - 1) |
+		SET_LINEVAL(mode->yres - 1) |
+		SET_VFPD(mode->lower_margin - 1) |
+		SET_VSPW(mode->vsync_len - 1);
+
+	/* horizontal timing */
+	con3 = SET_HBPD(mode->left_margin - 1) |
+		SET_HOZVAL(mode->xres - 1) |
+		SET_HFPD(mode->right_margin - 1);
+	con4 = SET_HSPW(mode->hsync_len - 1);
+
+	/* basic timing setup */
+	writel(con1, fbi->base + LCDCON1);
+	pr_debug(" Writing %08X into %08X (con1)\n", con1, fbi->base + LCDCON1);
+	writel(con2, fbi->base + LCDCON2);
+	pr_debug(" Writing %08X into %08X (con2)\n", con2, fbi->base + LCDCON2);
+	writel(con3, fbi->base + LCDCON3);
+	pr_debug(" Writing %08X into %08X (con3)\n", con3, fbi->base + LCDCON3);
+	writel(con4, fbi->base + LCDCON4);
+	pr_debug(" Writing %08X into %08X (con4)\n", con4, fbi->base + LCDCON4);
+	writel(con5, fbi->base + LCDCON5);
+	pr_debug(" Writing %08X into %08X (con5)\n", con5, fbi->base + LCDCON5);
+
+	pr_debug("Setting up the fb baseadress to %08X\n", fb_info->screen_base);
+
+	/* framebuffer memory setup */
+	writel((unsigned)fb_info->screen_base >> 1, fbi->base + LCDSADDR1);
+	size = mode->xres * (fb_info->bits_per_pixel >> 3) * (mode->yres);
+	writel(SET_LCDBASEL(((unsigned)fb_info->screen_base + size) >> 1), fbi->base + LCDSADDR2);
+	writel(SET_OFFSIZE(0) |
+		SET_PAGE_WIDTH((mode->xres * fb_info->bits_per_pixel) >> 4),
+		fbi->base + LCDSADDR3);
+	writel(FIWSEL | INT_FrSyn | INT_FiCnt, fbi->base + LCDINTMSK);
+
+	return 0;
+}
+
+/**
+ * Print some information about the current hardware state
+ * @param hw_dev S3C video device
+ */
+#ifdef CONFIG_DRIVER_VIDEO_S3C_VERBOSE
+static void s3cfb_info(struct device_d *hw_dev)
+{
+	uint32_t con1, addr1, addr2, addr3;
+
+	con1 = readl(hw_dev->map_base + LCDCON1);
+	addr1 = readl(hw_dev->map_base + LCDSADDR1);
+	addr2 = readl(hw_dev->map_base + LCDSADDR2);
+	addr3 = readl(hw_dev->map_base + LCDSADDR3);
+
+	printf(" Video hardware info:\n");
+	printf("  Video clock is running at %u Hz\n", s3c24xx_get_hclk() / ((GET_CLKVAL(con1) + 1) * 2));
+	printf("  Video memory bank starts at 0x%08X\n", GET_LCDBANK(addr1) << 22);
+	printf("  Video memory bank offset: 0x%08X\n", GET_LCDBASEU(addr1));
+	printf("  Video memory end: 0x%08X\n", GET_LCDBASEU(addr2));
+	printf("  Virtual screen offset size: %u half words\n", GET_OFFSIZE(addr3));
+	printf("  Virtual screen page width: %u half words\n", GET_PAGE_WIDTH(addr3));
+}
+#endif
+
+/*
+ * There is only one video hardware instance available.
+ * It makes no sense to dynamically allocate this data
+ */
+static struct fb_ops s3cfb_ops = {
+	.fb_activate_var = s3cfb_activate_var,
+	.fb_enable = s3cfb_enable_controller,
+	.fb_disable = s3cfb_disable_controller,
+};
+
+static struct s3cfb_info fbi = {
+	.info = {
+		.fbops = &s3cfb_ops,
+	},
+};
+
+static int s3cfb_probe(struct device_d *hw_dev)
+{
+	struct s3c_fb_platform_data *pdata = hw_dev->platform_data;
+	int ret;
+
+	if (! pdata)
+		return -ENODEV;
+
+	writel(0, hw_dev->map_base + LCDCON1);
+	writel(0, hw_dev->map_base + LCDCON5); /* FIXME not 0 for some displays */
+
+	/* just init */
+	fbi.info.priv = &fbi;
+
+	/* add runtime hardware info */
+	fbi.hw_dev = hw_dev;
+	fbi.base = (void*)hw_dev->map_base;
+
+	/* add runtime video info */
+	fbi.info.mode_list = pdata->mode_list;
+	fbi.info.num_modes = pdata->mode_cnt;
+	fbi.info.mode = &fbi.info.mode_list[1];
+	fbi.info.xres = fbi.info.mode->xres;
+	fbi.info.yres = fbi.info.mode->yres;
+	if (pdata->bits_per_pixel)
+		fbi.info.bits_per_pixel = pdata->bits_per_pixel;
+	else
+		fbi.info.bits_per_pixel = 16;
+	fbi.passive_display = pdata->passive_display;
+	fbi.enable = pdata->enable;
+
+	ret = register_framebuffer(&fbi.info);
+	if (ret != 0) {
+		dev_err(hw_dev, "Failed to register framebuffer\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct driver_d s3cfb_driver = {
+	.name	= "s3c_fb",
+	.probe	= s3cfb_probe,
+#ifdef CONFIG_DRIVER_VIDEO_S3C_VERBOSE
+	.info	= s3cfb_info,
+#endif
+};
+
+static int s3cfb_init(void)
+{
+	return register_driver(&s3cfb_driver);
+}
+
+device_initcall(s3cfb_init);
+
+/**
+ * The S3C244x LCD controller supports passive (CSTN/STN) and active (TFT) LC displays
+ *
+ * The driver itself currently supports only active TFT LC displays in the follwing manner:
+ *
+ *  * Palletized colours
+ *    - 1 bpp
+ *    - 2 bpp
+ *    - 4 bpp
+ *    - 8 bpp
+ *  * True colours
+ *    - 16 bpp
+ *    - 24 bpp
+ */
-- 
1.7.4.1



From agalakhov at gmail.com  Tue May 17 12:44:01 2011
From: agalakhov at gmail.com (Alex Galakhov)
Date: Tue, 17 May 2011 22:44:01 +0600
Subject: [PATCH 2/2] Enable display for MINI2440 board.
In-Reply-To: <1305650641-15125-1-git-send-email-agalakhov@gmail.com>
References: <1305650641-15125-1-git-send-email-agalakhov@gmail.com>
Message-ID: <1305650641-15125-2-git-send-email-agalakhov@gmail.com>

Also add display modes for usual MINI2440 displays.

Signed-off-by: Alex Galakhov <agalakhov at gmail.com>
---
 arch/arm/boards/mini2440/Kconfig    |   28 +++++++++++++
 arch/arm/boards/mini2440/mini2440.c |   74 +++++++++++++++++++++++++++++++++++
 arch/arm/mach-s3c24xx/Kconfig       |    2 +
 3 files changed, 104 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/mini2440/Kconfig

diff --git a/arch/arm/boards/mini2440/Kconfig b/arch/arm/boards/mini2440/Kconfig
new file mode 100644
index 0000000..f719181
--- /dev/null
+++ b/arch/arm/boards/mini2440/Kconfig
@@ -0,0 +1,28 @@
+
+if MACH_MINI2440
+
+config MINI2440_VIDEO
+	bool
+	select VIDEO
+	select DRIVER_VIDEO_S3C
+
+config MINI2440_VIDEO_N35
+	bool "Support N35 display (240x320)"
+	select MINI2440_VIDEO
+	help
+	  This adds support for NEC 3.5 inch TFT display,
+	  the most common one used with MINI2440 board.
+
+config MINI2440_VIDEO_A70
+	bool "Support A70 display (800x480)"
+	select MINI2440_VIDEO
+	help
+	  This adds support for Innolux 7.0 inch TFT display.
+
+config MINI2440_VIDEO_SVGA
+	bool "Support SVGA video adapter"
+	select MINI2440_VIDEO
+	help
+	  This adds support for MINI2440 SVGA (1280x1024) video output adapter.
+
+endif
diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 448aa40..c96d177 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -34,6 +34,7 @@
 #include <dm9000.h>
 #include <nand.h>
 #include <mci.h>
+#include <fb.h>
 #include <asm/armlinux.h>
 #include <asm/io.h>
 #include <mach/gpio.h>
@@ -41,6 +42,7 @@
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
 #include <mach/mci.h>
+#include <mach/fb.h>
 
 static struct memory_platform_data ram_pdata = {
 	.name		= "ram0",
@@ -99,6 +101,77 @@ static struct device_d mci_dev = {
 	.platform_data	= &mci_data,
 };
 
+static struct fb_videomode s3c24x0_fb_modes[] = {
+#ifdef CONFIG_MINI2440_VIDEO_N35
+	{
+		.name		= "N35",
+		.refresh	= 60,
+		.xres		= 240,
+		.left_margin	= 21,
+		.right_margin	= 38,
+		.hsync_len	= 6,
+		.yres		= 320,
+		.upper_margin	= 4,
+		.lower_margin	= 4,
+		.vsync_len	= 2,
+		.pixclock	= 115913,
+		.sync		= FB_SYNC_USE_PWREN,
+		.vmode		= FB_VMODE_NONINTERLACED,
+		.flag		= 0,
+	},
+#endif
+#ifdef CONFIG_MINI2440_VIDEO_A70
+	{
+		.name		= "A70",
+		.refresh	= 50,
+		.xres		= 800,
+		.left_margin	= 40,
+		.right_margin	= 40,
+		.hsync_len	= 48,
+		.yres		= 480,
+		.upper_margin	= 29,
+		.lower_margin	= 3,
+		.vsync_len	= 3,
+		.pixclock	= 41848,
+		.sync		= FB_SYNC_USE_PWREN | FB_SYNC_DE_HIGH_ACT,
+		.vmode		= FB_VMODE_NONINTERLACED,
+		.flag		= 0,
+	},
+#endif
+#ifdef CONFIG_MINI2440_VIDEO_SVGA
+	{
+		.name		= "SVGA",
+		.refresh	= 24,
+		.xres		= 1024,
+		.left_margin	= 1,
+		.right_margin	= 2,
+		.hsync_len	= 2,
+		.yres		= 768,
+		.upper_margin	= 200,
+		.lower_margin	= 16,
+		.vsync_len	= 16,
+		.pixclock	= 40492,
+		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_DE_HIGH_ACT 
+                                  /* | FB_SYNC_SWAP_HW */ /* FIXME maybe */ ,
+		.vmode		= FB_VMODE_NONINTERLACED,
+		.flag		= 0,
+	},
+#endif
+};
+
+static struct s3c_fb_platform_data s3c24x0_fb_data = {
+	.mode_list		= s3c24x0_fb_modes,
+	.mode_cnt		= sizeof(s3c24x0_fb_modes) / sizeof(struct fb_videomode),
+	.bits_per_pixel		= 16,
+	.passive_display	= 0,
+};
+
+static struct device_d s3cfb_dev = {
+	.name    = "s3c_fb",
+	.map_base = S3C2410_LCD_BASE,
+	.platform_data	= &s3c24x0_fb_data,
+};
+
 static const unsigned pin_usage[] = {
 	/* address bus, used by NOR, SDRAM */
 	GPA1_ADDR16,
@@ -269,6 +342,7 @@ static int mini2440_devices_init(void)
 	dev_add_bb_dev("env_raw", "env0");
 #endif
 	register_device(&mci_dev);
+	register_device(&s3cfb_dev);
 	armlinux_add_dram(&sdram_dev);
 	armlinux_set_bootparams((void *)sdram_dev.map_base + 0x100);
 	armlinux_set_architecture(MACH_TYPE_MINI2440);
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 33d230c..80b65fb 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -67,6 +67,8 @@ config MACH_A9M2410DEV
 
 endchoice
 
+source arch/arm/boards/mini2440/Kconfig 
+
 endmenu
 
 menu "S3C24X0 Features              "
-- 
1.7.4.1



From s.hauer at pengutronix.de  Tue May 17 13:09:23 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 17 May 2011 19:09:23 +0200
Subject: [PATCH] commands: add md5/sha1/sha256sum commands using the
	digest api
In-Reply-To: <87ei3xh3qp.fsf@macbook.be.48ers.dk>
References: <1305634253-29141-1-git-send-email-jacmet@sunsite.dk>
	<20110517123013.GF2737@game.jcrosoft.org>
	<87ei3xh3qp.fsf@macbook.be.48ers.dk>
Message-ID: <20110517170923.GG30963@pengutronix.de>

On Tue, May 17, 2011 at 03:10:38PM +0200, Peter Korsgaard wrote:
> >>>>> "Jean-Christophe" == Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com> writes:
> 
> Hi,
> 
>  >> +static void print_digest(struct digest *d)
>  >> +{
>  >> +	unsigned char *data;
>  >> +	int i;
>  >> +
>  >> +	data = xmalloc(d->length);
> 
>  Jean-Christophe> hang here no
>  Jean-Christophe> please use malloc it's a command we must not hang if out of mem
>  Jean-Christophe> just because we use a digest command
> 
> Ok. This is cutnpaste from the crc command though. A quick look at
> commands shows that others do the same:
> 
> git grep xmalloc commands/
> commands/bootm.c:               handle->data = xmalloc(len);
> commands/cat.c: buf = xmalloc(BUFSIZE);
> commands/crc.c: buf = xmalloc(4096);
> commands/digest.c:      data = xmalloc(d->length);
> commands/digest.c:      buf = xmalloc(4096);
> commands/i2c.c: buf = xmalloc(count);
> commands/i2c.c: buf = xmalloc(count);
> commands/mem.c: rw_buf1 = xmalloc(RW_BUF_SIZE);
> commands/mem.c: buf = xmalloc(RW_BUF_SIZE);

And I am perfectly fine with this at least for fixed small length
allocations. And I consider 4096 bytes small enough.

> 
> 
>  >> +static int do_digest(struct command *cmdtp, int argc, char *argv[])
>  >> +{
>  >> +	char algorithm[7];
>  >> +	struct digest *d;
>  >> +
>  >> +	/* digest algoritm is command name without "sum" */
>  >> +	strlcpy(algorithm, cmdtp->name,
>  >> +			strstr(cmdtp->name, "sum") + 1 - cmdtp->name);
> 
>  Jean-Christophe> can we do more simple?
> 
> Maybe. I wanted something automatic rather than a series of strcmp
> checks, but feel free to suggest something else.

You could use three different functions called by the command
descriptors and pass a string with the digest name to do_digest.

> 
> 
>  >> +	d = digest_get_by_name(algorithm);
>  >> +	BUG_ON(!d);
>  >> +
>  >> +	if (argc < 2)
>  >> +		return COMMAND_ERROR_USAGE;
>  >> +
>  >> +	argv++;
>  >> +	while (*argv) {
>  >> +		char *filename = "/dev/mem";
>  >> +		ulong start = 0, size = ~0;
> 
>  Jean-Christophe> do we really need to declare this here?
>  Jean-Christophe> and /dev/mem as default
> 
> Yes, or rather you need to initialize it for each iteration of the
> loop. We could move the declaration up to the beginning of the function,
> but as they are only used inside the loop it imho makes more sense to
> put it here.
> 
>  Jean-Christophe> if yes for /dev/mem as default this should be documented in the help at least
> 
> Why? all the memory commands do that (md/mw/crc32).
> 
>  >> +
>  >> +		/* arguments are either file, file+area or area */
>  >> +		if (parse_area_spec(*argv, &start, &size)) {
>  >> +			filename = *argv;
>  >> +			if (argv[1] && !parse_area_spec(argv[1], &start, &size)) {
>  >> +				argv++;
>  >> +			}
>  >> +		}
>  >> +
>  >> +		if (file_digest(d, filename, start, size) < 0)
>  >> +			return 1;
> 
>  Jean-Christophe> do we really need to stop if ine of them is not availlable
> 
> I don't feel strongly about it, but it seems the simplest solution.

How about printing an error and continue? That's what my host md5sum
does.

> 
>  Jean-Christophe> and we should check the getc to be able to interrupt it
> 
> crc doesn't do that either, but ok - I can add a ctrlc() check in the
> main loop.

It's good practice. It's nice being able to interrupt if this command is
accidently being called on a veray large file.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Tue May 17 14:03:16 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Tue, 17 May 2011 20:03:16 +0200
Subject: [PATCH 1/2] Add support for Samsung S3C24x0 framebuffer.
In-Reply-To: <1305650641-15125-1-git-send-email-agalakhov@gmail.com>
References: <1305650641-15125-1-git-send-email-agalakhov@gmail.com>
Message-ID: <20110517180316.GH30963@pengutronix.de>

Hi Alex,

On Tue, May 17, 2011 at 10:44:00PM +0600, Alex Galakhov wrote:
> Heavily based on original Juergen Beisert's code.
> 
> Signed-off-by: Alex Galakhov <agalakhov at gmail.com>
> ---
>  arch/arm/mach-s3c24xx/include/mach/fb.h |   59 ++++
>  drivers/video/Kconfig                   |   13 +
>  drivers/video/Makefile                  |    1 +
>  drivers/video/s3c.c                     |  451 +++++++++++++++++++++++++++++++
>  4 files changed, 524 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/mach-s3c24xx/include/mach/fb.h
>  create mode 100644 drivers/video/s3c.c

The patch looks mostly fine, only small nitpicks follow.


> 
> diff --git a/arch/arm/mach-s3c24xx/include/mach/fb.h b/arch/arm/mach-s3c24xx/include/mach/fb.h
> new file mode 100644
> index 0000000..05e013a
> --- /dev/null
> +++ b/arch/arm/mach-s3c24xx/include/mach/fb.h
> +
> +/**
> + * @param fb_info Framebuffer information
> + */
> +static void s3cfb_enable_controller(struct fb_info *fb_info)
> +{
> +	struct s3cfb_info *fbi = fb_info->priv;
> +	uint32_t con1;
> +
> +	con1 = readl(fbi->base + LCDCON1);
> +
> +	con1 |= ENVID;
> +
> +	writel(con1, fbi->base + LCDCON1);
> +
> +	if (fbi->enable)
> +		(fbi->enable)(1);

unneeded brackets.

> +}
> +
> +/**
> + * @param fb_info Framebuffer information
> + */
> +static void s3cfb_disable_controller(struct fb_info *fb_info)
> +{
> +	struct s3cfb_info *fbi = fb_info->priv;
> +	uint32_t con1;
> +
> +	if (fbi->enable)
> +		(fbi->enable)(0);

ditto

> +
> +	con1 = readl(fbi->base + LCDCON1);
> +
> +	con1 &= ~ENVID;
> +
> +	writel(con1, fbi->base + LCDCON1);
> +}
> +
> +/**
> + * Prepare the video hardware for a specified video mode
> + * @param fb_info Framebuffer information
> + * @param mode The video mode description to initialize
> + * @return 0 on success
> + */
> +static int s3cfb_activate_var(struct fb_info *fb_info)
> +{
> +	struct s3cfb_info *fbi = fb_info->priv;
> +	struct fb_videomode *mode = fb_info->mode;
> +	unsigned size, hclk, div;
> +	uint32_t con1, con2, con3, con4, con5 = 0;
> +
> +	if (fbi->passive_display != 0) {
> +		pr_err("Passive displays are currently not supported\n");

dev_err please (some more follow).

> +
> +	switch (fb_info->bits_per_pixel) {
> +#if 0
> +	/* TODO add CLUT based modes */
> +	case 1:
> +		con1 |= BPPMODE(8);
> +		break;
> +	case 2:
> +		con1 |= BPPMODE(9);
> +		break;
> +	case 4:
> +		con1 |= BPPMODE(10);
> +		break;
> +	case 8:
> +		con1 |= BPPMODE(11);
> +		break;
> +#endif

I think we can remove this dead code. I see no reason to add clut
support. If someone needs it, I think this missing snippet is the least
of his problems.

> +
> +/**
> + * The S3C244x LCD controller supports passive (CSTN/STN) and active (TFT) LC displays
> + *
> + * The driver itself currently supports only active TFT LC displays in the follwing manner:
> + *
> + *  * Palletized colours
> + *    - 1 bpp
> + *    - 2 bpp
> + *    - 4 bpp
> + *    - 8 bpp

This doesn't seem to be true, right?

> + *  * True colours
> + *    - 16 bpp
> + *    - 24 bpp
> + */
> -- 
> 1.7.4.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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From agalakhov at gmail.com  Tue May 17 14:37:56 2011
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Wed, 18 May 2011 00:37:56 +0600
Subject: [PATCH 2/2] Enable display for MINI2440 board.
In-Reply-To: <1305650641-15125-2-git-send-email-agalakhov@gmail.com>
References: <1305650641-15125-1-git-send-email-agalakhov@gmail.com>
	<1305650641-15125-2-git-send-email-agalakhov@gmail.com>
Message-ID: <BANLkTing7PHdv7U5J2ri=8drxDboY5LHnQ@mail.gmail.com>

2011/5/17 Alex Galakhov <agalakhov at gmail.com>

>
> +         This adds support for MINI2440 SVGA (1280x1024) video output
> adapter.
>

A typo, sorry: should be 1024x768 of course. Will fix it tomorrow.

--
Alex
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From jacmet at sunsite.dk  Tue May 17 16:05:34 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Tue, 17 May 2011 22:05:34 +0200
Subject: [PATCH] commands: add md5/sha1/sha256sum commands using the
	digest api
In-Reply-To: <20110517170923.GG30963@pengutronix.de> (Sascha Hauer's message
	of "Tue, 17 May 2011 19:09:23 +0200")
References: <1305634253-29141-1-git-send-email-jacmet@sunsite.dk>
	<20110517123013.GF2737@game.jcrosoft.org>
	<87ei3xh3qp.fsf@macbook.be.48ers.dk>
	<20110517170923.GG30963@pengutronix.de>
Message-ID: <87oc31f5yp.fsf@macbook.be.48ers.dk>

>>>>> "Sascha" == Sascha Hauer <s.hauer at pengutronix.de> writes:

Hi,

 >> commands/mem.c: buf = xmalloc(RW_BUF_SIZE);

 Sascha> And I am perfectly fine with this at least for fixed small length
 Sascha> allocations. And I consider 4096 bytes small enough.

Ok, good.

 >> Maybe. I wanted something automatic rather than a series of strcmp
 >> checks, but feel free to suggest something else.

 Sascha> You could use three different functions called by the command
 Sascha> descriptors and pass a string with the digest name to do_digest.

Ok, will change.

 Jean-Christophe> do we really need to stop if ine of them is not availlable

 >> I don't feel strongly about it, but it seems the simplest solution.

 Sascha> How about printing an error and continue? That's what my host md5sum
 Sascha> does.

Ok, will change.

 Jean-Christophe> and we should check the getc to be able to interrupt it
 >> 
 >> crc doesn't do that either, but ok - I can add a ctrlc() check in the
 >> main loop.

 Sascha> It's good practice. It's nice being able to interrupt if this
 Sascha> command is accidently being called on a veray large file.

Ok, will change.

I'll send a v2 shortly.

-- 
Bye, Peter Korsgaard


From jacmet at sunsite.dk  Tue May 17 16:05:41 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Tue, 17 May 2011 22:05:41 +0200
Subject: [PATCHv2] commands: add md5/sha1/sha256sum commands using the digest
	api
Message-ID: <1305662741-7509-1-git-send-email-jacmet@sunsite.dk>

The interface emulates the Linux commands, except that you can
specify a sub area - E.G.:

barebox:/ md5sum /dev/fd0 2M+1M /env/config /env/bin/boot 10+2
61c4c0180b044191d28f27545f43562f  /dev/fd0	0x00200000 ... 0x00300000
908b84bcbadd2f263583a65ff31d1cad  /env/config	0x00000000 ... 0x000003a7
f23bd15825cc5006cf5f9fd486d82d2d  /env/bin/boot	0x0000000a ... 0x0000000c

Adds around 1400 bytes (+ size of digest code) with everything enabled.

Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>
---
 Changes since v1:
 - handle ctrlc
 - continue on errors
 - use wrapper functions rather than strstr for algorithm name

 commands/Kconfig  |   22 ++++++
 commands/Makefile |    1 +
 commands/digest.c |  193 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 216 insertions(+), 0 deletions(-)
 create mode 100644 commands/digest.c

diff --git a/commands/Kconfig b/commands/Kconfig
index f192d30..30eeff9 100644
--- a/commands/Kconfig
+++ b/commands/Kconfig
@@ -222,6 +222,28 @@ config CMD_CRC_CMP
 	depends on CMD_CRC
 	prompt "compare 2 files crc"
 
+config CMD_DIGEST
+       tristate
+       select DIGEST
+
+config CMD_MD5SUM
+	tristate
+	select CMD_DIGEST
+	select MD5
+	prompt "md5sum"
+
+config CMD_SHA1SUM
+	tristate
+	select CMD_DIGEST
+	select SHA1
+	prompt "sha1sum"
+
+config CMD_SHA256SUM
+	tristate
+	select CMD_DIGEST
+	select SHA256
+	prompt "sha256sum"
+
 config CMD_MTEST
 	tristate
 	prompt "mtest"
diff --git a/commands/Makefile b/commands/Makefile
index f7ef9a8..8ee4aba 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_CMD_MOUNT)		+= mount.o
 obj-$(CONFIG_CMD_UMOUNT)	+= umount.o
 obj-$(CONFIG_CMD_REGINFO)	+= reginfo.o
 obj-$(CONFIG_CMD_CRC)		+= crc.o
+obj-$(CONFIG_CMD_DIGEST)	+= digest.o
 obj-$(CONFIG_CMD_CLEAR)		+= clear.o
 obj-$(CONFIG_CMD_TEST)		+= test.o
 obj-$(CONFIG_CMD_FLASH)		+= flash.o
diff --git a/commands/digest.c b/commands/digest.c
new file mode 100644
index 0000000..7bc02bc
--- /dev/null
+++ b/commands/digest.c
@@ -0,0 +1,193 @@
+/*
+ * digest.c - Calculate a md5/sha1/sha256 checksum of a memory area
+ *
+ * Copyright (c) 2011 Peter Korsgaard <jacmet at sunsite.dk>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <xfuncs.h>
+#include <malloc.h>
+#include <digest.h>
+
+static void print_digest(struct digest *d)
+{
+	unsigned char *data;
+	int i;
+
+	data = xmalloc(d->length);
+	d->final(d, data);
+
+	for (i=0; i<d->length; i++)
+		printf("%02x", data[i]);
+
+	free(data);
+}
+
+static int file_digest(struct digest *d, char *filename,
+		       ulong start, ulong size)
+{
+	ulong len = 0;
+	int fd, now, ret = 0;
+	char *buf;
+
+	d->init(d);
+
+	fd = open(filename, O_RDONLY);
+	if (fd < 0) {
+		perror(filename);
+		return fd;
+	}
+
+	if (start > 0) {
+		ret = lseek(fd, start, SEEK_SET);
+		if (ret == -1) {
+			perror("lseek");
+			goto out;
+		}
+	}
+
+	buf = xmalloc(4096);
+
+	while (size) {
+		now = min((ulong)4096, size);
+		now = read(fd, buf, now);
+		if (now < 0) {
+			ret = now;
+			perror("read");
+			goto out_free;
+		}
+		if (!now)
+			break;
+
+		if (ctrlc()) {
+			ret = -EINTR;
+			goto out_free;
+		}
+
+		d->update(d, buf, now);
+		size -= now;
+		len += now;
+	}
+
+	print_digest(d);
+	printf("  %s\t0x%08lx ... 0x%08lx\n", filename, start, start + len);
+
+out_free:
+	free(buf);
+out:
+	close(fd);
+
+	return ret;
+}
+
+static int do_digest(char *algorithm, int argc, char *argv[])
+{
+	struct digest *d;
+	int ret = 0;
+
+	d = digest_get_by_name(algorithm);
+	BUG_ON(!d);
+
+	if (argc < 2)
+		return COMMAND_ERROR_USAGE;
+
+	argv++;
+	while (*argv) {
+		char *filename = "/dev/mem";
+		ulong start = 0, size = ~0;
+
+		/* arguments are either file, file+area or area */
+		if (parse_area_spec(*argv, &start, &size)) {
+			filename = *argv;
+			if (argv[1] && !parse_area_spec(argv[1], &start, &size))
+				argv++;
+		}
+
+		if (file_digest(d, filename, start, size) < 0)
+			ret = 1;
+
+		argv++;
+	}
+
+	return ret;
+}
+
+#ifdef CONFIG_CMD_MD5SUM
+
+static int do_md5(struct command *cmdtp, int argc, char *argv[])
+{
+	return do_digest("md5", argc, argv);
+}
+
+BAREBOX_CMD_HELP_START(md5sum)
+BAREBOX_CMD_HELP_USAGE("md5sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a md5 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(md5sum)
+	.cmd		= do_md5,
+	.usage		= "md5 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_md5sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_MD5SUM */
+
+#ifdef CONFIG_CMD_SHA1SUM
+
+static int do_sha1(struct command *cmdtp, int argc, char *argv[])
+{
+	return do_digest("sha1", argc, argv);
+}
+
+BAREBOX_CMD_HELP_START(sha1sum)
+BAREBOX_CMD_HELP_USAGE("sha1sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a sha1 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(sha1sum)
+	.cmd		= do_sha1,
+	.usage		= "sha1 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_sha1sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_SHA1SUM */
+
+#ifdef CONFIG_CMD_SHA256SUM
+
+static int do_sha256(struct command *cmdtp, int argc, char *argv[])
+{
+	return do_digest("sha256", argc, argv);
+}
+
+BAREBOX_CMD_HELP_START(sha256sum)
+BAREBOX_CMD_HELP_USAGE("sha256sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a sha256 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(sha256sum)
+	.cmd		= do_sha256,
+	.usage		= "sha256 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_sha256sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_SHA256SUM */
-- 
1.7.4.4



From plagnioj at jcrosoft.com  Wed May 18 01:08:26 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 18 May 2011 07:08:26 +0200
Subject: [PATCHv2] commands: add md5/sha1/sha256sum commands using the
	digest api
In-Reply-To: <1305662741-7509-1-git-send-email-jacmet@sunsite.dk>
References: <1305662741-7509-1-git-send-email-jacmet@sunsite.dk>
Message-ID: <20110518050826.GG18699@game.jcrosoft.org>

> +
> +	data = xmalloc(d->length);
we realloc a buffer here where we alloc one in file_digest
and not free it before calling print_digest
> +	d->final(d, data);
> +
> +	for (i=0; i<d->length; i++)
> +		printf("%02x", data[i]);
> +
> +	free(data);
> +}
> +
> +static int file_digest(struct digest *d, char *filename,
> +		       ulong start, ulong size)
> +{
> +	ulong len = 0;
> +	int fd, now, ret = 0;
> +	char *buf;
> +
> +	d->init(d);
> +
> +	fd = open(filename, O_RDONLY);
> +	if (fd < 0) {
> +		perror(filename);
> +		return fd;
> +	}
> +
> +	if (start > 0) {
> +		ret = lseek(fd, start, SEEK_SET);
> +		if (ret == -1) {
> +			perror("lseek");
> +			goto out;
> +		}
> +	}
> +
> +	buf = xmalloc(4096);
do we really need to allocate the buffer everytime?
> +
> +	while (size) {
> +		now = min((ulong)4096, size);
> +		now = read(fd, buf, now);
> +		if (now < 0) {
> +			ret = now;
> +			perror("read");
> +			goto out_free;
> +		}
> +		if (!now)
> +			break;
> +
> +		if (ctrlc()) {
> +			ret = -EINTR;
> +			goto out_free;
> +		}
> +
> +		d->update(d, buf, now);
> +		size -= now;
> +		len += now;
> +	}
> +
> +	print_digest(d);
> +	printf("  %s\t0x%08lx ... 0x%08lx\n", filename, start, start + len);
> +
> +out_free:
> +	free(buf);
> +out:
> +	close(fd);
> +
> +	return ret;
> +}
> +
> +static int do_digest(char *algorithm, int argc, char *argv[])
> +{
> +	struct digest *d;
> +	int ret = 0;
> +
> +	d = digest_get_by_name(algorithm);
> +	BUG_ON(!d);
> +
> +	if (argc < 2)
> +		return COMMAND_ERROR_USAGE;
> +
> +	argv++;
> +	while (*argv) {
> +		char *filename = "/dev/mem";
> +		ulong start = 0, size = ~0;
		ulong so so if we want to support 64bit vfs we need to use an
		other type
> +
> +		/* arguments are either file, file+area or area */
> +		if (parse_area_spec(*argv, &start, &size)) {
> +			filename = *argv;
> +			if (argv[1] && !parse_area_spec(argv[1], &start, &size))
> +				argv++;
> +		}
> +
> +		if (file_digest(d, filename, start, size) < 0)
> +			ret = 1;
> +
> +		argv++;
> +	}
> +
> +	return ret;
> +}
> +
> +#ifdef CONFIG_CMD_MD5SUM
> +
> +static int do_md5(struct command *cmdtp, int argc, char *argv[])
> +{
> +	return do_digest("md5", argc, argv);
pass the cmdtp will be good
I agree it's not necessary now but I think it's a good practice

Best Regards,
J.


From jacmet at sunsite.dk  Wed May 18 03:12:52 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Wed, 18 May 2011 09:12:52 +0200
Subject: [PATCHv2] commands: add md5/sha1/sha256sum commands using the
	digest api
In-Reply-To: <20110518050826.GG18699@game.jcrosoft.org> (Jean-Christophe
	PLAGNIOL-VILLARD's message of "Wed, 18 May 2011 07:08:26 +0200")
References: <1305662741-7509-1-git-send-email-jacmet@sunsite.dk>
	<20110518050826.GG18699@game.jcrosoft.org>
Message-ID: <87boz0fpmz.fsf@macbook.be.48ers.dk>

>>>>> "Jean-Christophe" == Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com> writes:

Hi,

 >> +
 >> +	data = xmalloc(d->length);

 Jean-Christophe> we realloc a buffer here where we alloc one in file_digest
 Jean-Christophe> and not free it before calling print_digest

I'm not exactly sure what you mean, but yes - We could inline
print_digest in file_digest and reuse the 4K buf for the digest as
well. That would shrink the code slightly (lines / bytes) and get rid of
the 2nd xmalloc.

I'll fix that and send a v3 shortly.

 >> +	buf = xmalloc(4096);

 Jean-Christophe> do we really need to allocate the buffer everytime?

Not really, but it's simpler to do like this. It's only once per file so
hardly a performance issue.

 >> +	while (*argv) {
 >> +		char *filename = "/dev/mem";
 >> +		ulong start = 0, size = ~0;

 Jean-Christophe> ulong so so if we want to support 64bit vfs we need to
 Jean-Christophe> use an other type

ulong is what parse_area_spec and the other memory commands use.

 >> +#ifdef CONFIG_CMD_MD5SUM
 >> +
 >> +static int do_md5(struct command *cmdtp, int argc, char *argv[])
 >> +{
 >> +	return do_digest("md5", argc, argv);

 Jean-Christophe> pass the cmdtp will be good
 Jean-Christophe> I agree it's not necessary now but I think it's a good
 Jean-Christophe> practice

I think it makes more sense to add it when (if?) it is needed.

-- 
Bye, Peter Korsgaard


From jacmet at sunsite.dk  Wed May 18 03:18:20 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Wed, 18 May 2011 09:18:20 +0200
Subject: [PATCHv3] commands: add md5/sha1/sha256sum commands using the digest
	api
Message-ID: <1305703100-16921-1-git-send-email-jacmet@sunsite.dk>

The interface emulates the Linux commands, except that you can
specify a sub area - E.G.:

barebox:/ md5sum /dev/fd0 2M+1M /env/config /env/bin/boot 10+2
61c4c0180b044191d28f27545f43562f  /dev/fd0	0x00200000 ... 0x00300000
908b84bcbadd2f263583a65ff31d1cad  /env/config	0x00000000 ... 0x000003a7
f23bd15825cc5006cf5f9fd486d82d2d  /env/bin/boot	0x0000000a ... 0x0000000c

Adds around 1400 bytes (+ size of digest code) with everything enabled.

Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>
---
 Changes since v2:
 - Inline print_digest in file_digest and reuse 4K buffer for digest

 Changes since v1:
 - handle ctrlc
 - continue on errors
 - use wrapper functions rather than strstr for algorithm name

 commands/Kconfig  |   22 +++++++
 commands/Makefile |    1 +
 commands/digest.c |  183 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 206 insertions(+), 0 deletions(-)
 create mode 100644 commands/digest.c

diff --git a/commands/Kconfig b/commands/Kconfig
index f192d30..30eeff9 100644
--- a/commands/Kconfig
+++ b/commands/Kconfig
@@ -222,6 +222,28 @@ config CMD_CRC_CMP
 	depends on CMD_CRC
 	prompt "compare 2 files crc"
 
+config CMD_DIGEST
+       tristate
+       select DIGEST
+
+config CMD_MD5SUM
+	tristate
+	select CMD_DIGEST
+	select MD5
+	prompt "md5sum"
+
+config CMD_SHA1SUM
+	tristate
+	select CMD_DIGEST
+	select SHA1
+	prompt "sha1sum"
+
+config CMD_SHA256SUM
+	tristate
+	select CMD_DIGEST
+	select SHA256
+	prompt "sha256sum"
+
 config CMD_MTEST
 	tristate
 	prompt "mtest"
diff --git a/commands/Makefile b/commands/Makefile
index f7ef9a8..8ee4aba 100644
--- a/commands/Makefile
+++ b/commands/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_CMD_MOUNT)		+= mount.o
 obj-$(CONFIG_CMD_UMOUNT)	+= umount.o
 obj-$(CONFIG_CMD_REGINFO)	+= reginfo.o
 obj-$(CONFIG_CMD_CRC)		+= crc.o
+obj-$(CONFIG_CMD_DIGEST)	+= digest.o
 obj-$(CONFIG_CMD_CLEAR)		+= clear.o
 obj-$(CONFIG_CMD_TEST)		+= test.o
 obj-$(CONFIG_CMD_FLASH)		+= flash.o
diff --git a/commands/digest.c b/commands/digest.c
new file mode 100644
index 0000000..2a699e6
--- /dev/null
+++ b/commands/digest.c
@@ -0,0 +1,183 @@
+/*
+ * digest.c - Calculate a md5/sha1/sha256 checksum of a memory area
+ *
+ * Copyright (c) 2011 Peter Korsgaard <jacmet at sunsite.dk>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <xfuncs.h>
+#include <malloc.h>
+#include <digest.h>
+
+static int file_digest(struct digest *d, char *filename,
+		       ulong start, ulong size)
+{
+	ulong len = 0;
+	int fd, now, i, ret = 0;
+	unsigned char *buf;
+
+	d->init(d);
+
+	fd = open(filename, O_RDONLY);
+	if (fd < 0) {
+		perror(filename);
+		return fd;
+	}
+
+	if (start > 0) {
+		ret = lseek(fd, start, SEEK_SET);
+		if (ret == -1) {
+			perror("lseek");
+			goto out;
+		}
+	}
+
+	buf = xmalloc(4096);
+
+	while (size) {
+		now = min((ulong)4096, size);
+		now = read(fd, buf, now);
+		if (now < 0) {
+			ret = now;
+			perror("read");
+			goto out_free;
+		}
+		if (!now)
+			break;
+
+		if (ctrlc()) {
+			ret = -EINTR;
+			goto out_free;
+		}
+
+		d->update(d, buf, now);
+		size -= now;
+		len += now;
+	}
+
+	d->final(d, buf);
+
+	for (i = 0; i < d->length; i++)
+		printf("%02x", buf[i]);
+
+	printf("  %s\t0x%08lx ... 0x%08lx\n", filename, start, start + len);
+
+out_free:
+	free(buf);
+out:
+	close(fd);
+
+	return ret;
+}
+
+static int do_digest(char *algorithm, int argc, char *argv[])
+{
+	struct digest *d;
+	int ret = 0;
+
+	d = digest_get_by_name(algorithm);
+	BUG_ON(!d);
+
+	if (argc < 2)
+		return COMMAND_ERROR_USAGE;
+
+	argv++;
+	while (*argv) {
+		char *filename = "/dev/mem";
+		ulong start = 0, size = ~0;
+
+		/* arguments are either file, file+area or area */
+		if (parse_area_spec(*argv, &start, &size)) {
+			filename = *argv;
+			if (argv[1] && !parse_area_spec(argv[1], &start, &size))
+				argv++;
+		}
+
+		if (file_digest(d, filename, start, size) < 0)
+			ret = 1;
+
+		argv++;
+	}
+
+	return ret;
+}
+
+#ifdef CONFIG_CMD_MD5SUM
+
+static int do_md5(struct command *cmdtp, int argc, char *argv[])
+{
+	return do_digest("md5", argc, argv);
+}
+
+BAREBOX_CMD_HELP_START(md5sum)
+BAREBOX_CMD_HELP_USAGE("md5sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a md5 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(md5sum)
+	.cmd		= do_md5,
+	.usage		= "md5 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_md5sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_MD5SUM */
+
+#ifdef CONFIG_CMD_SHA1SUM
+
+static int do_sha1(struct command *cmdtp, int argc, char *argv[])
+{
+	return do_digest("sha1", argc, argv);
+}
+
+BAREBOX_CMD_HELP_START(sha1sum)
+BAREBOX_CMD_HELP_USAGE("sha1sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a sha1 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(sha1sum)
+	.cmd		= do_sha1,
+	.usage		= "sha1 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_sha1sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_SHA1SUM */
+
+#ifdef CONFIG_CMD_SHA256SUM
+
+static int do_sha256(struct command *cmdtp, int argc, char *argv[])
+{
+	return do_digest("sha256", argc, argv);
+}
+
+BAREBOX_CMD_HELP_START(sha256sum)
+BAREBOX_CMD_HELP_USAGE("sha256sum [[FILE] [AREA]]...\n")
+BAREBOX_CMD_HELP_SHORT("Calculate a sha256 checksum of a memory area.\n")
+BAREBOX_CMD_HELP_END
+
+BAREBOX_CMD_START(sha256sum)
+	.cmd		= do_sha256,
+	.usage		= "sha256 checksum calculation",
+	BAREBOX_CMD_HELP(cmd_sha256sum_help)
+BAREBOX_CMD_END
+
+#endif /* CMD_CMD_SHA256SUM */
-- 
1.7.4.4



From plagnioj at jcrosoft.com  Wed May 18 03:50:00 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 18 May 2011 09:50:00 +0200
Subject: [PATCHv2] commands: add md5/sha1/sha256sum commands using the
	digest api
In-Reply-To: <87boz0fpmz.fsf@macbook.be.48ers.dk>
References: <1305662741-7509-1-git-send-email-jacmet@sunsite.dk>
	<20110518050826.GG18699@game.jcrosoft.org>
	<87boz0fpmz.fsf@macbook.be.48ers.dk>
Message-ID: <20110518075000.GD15292@game.jcrosoft.org>

 
>  >> +	buf = xmalloc(4096);
> 
>  Jean-Christophe> do we really need to allocate the buffer everytime?
> 
> Not really, but it's simpler to do like this. It's only once per file so
> hardly a performance issue.
> 
>  >> +	while (*argv) {
>  >> +		char *filename = "/dev/mem";
>  >> +		ulong start = 0, size = ~0;
> 
>  Jean-Christophe> ulong so so if we want to support 64bit vfs we need to
>  Jean-Christophe> use an other type
> 
> ulong is what parse_area_spec and the other memory commands use.
Just note that the file size could be more than 32bit
and uze size_t or ssize_t make more sense in my mind
of we can use loff_t

Best Regards,
J.


From jbe at pengutronix.de  Wed May 18 04:12:36 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 18 May 2011 10:12:36 +0200
Subject: [PATCH 1/2] Add support for Samsung S3C24x0 framebuffer.
In-Reply-To: <20110517180316.GH30963@pengutronix.de>
References: <1305650641-15125-1-git-send-email-agalakhov@gmail.com>
	<20110517180316.GH30963@pengutronix.de>
Message-ID: <201105181012.36600.jbe@pengutronix.de>

Sascha Hauer wrote:
> Hi Alex,
>
> On Tue, May 17, 2011 at 10:44:00PM +0600, Alex Galakhov wrote:
> > Heavily based on original Juergen Beisert's code.
> >
> > Signed-off-by: Alex Galakhov <agalakhov at gmail.com>
> > ---
> >  arch/arm/mach-s3c24xx/include/mach/fb.h |   59 ++++
> >  drivers/video/Kconfig                   |   13 +
> >  drivers/video/Makefile                  |    1 +
> >  drivers/video/s3c.c                     |  451
> > +++++++++++++++++++++++++++++++ 4 files changed, 524 insertions(+), 0
> > deletions(-)
> >  create mode 100644 arch/arm/mach-s3c24xx/include/mach/fb.h
> >  create mode 100644 drivers/video/s3c.c
>
> The patch looks mostly fine, only small nitpicks follow.
>
> > diff --git a/arch/arm/mach-s3c24xx/include/mach/fb.h
> > b/arch/arm/mach-s3c24xx/include/mach/fb.h new file mode 100644
> > index 0000000..05e013a
> > --- /dev/null
> > +++ b/arch/arm/mach-s3c24xx/include/mach/fb.h
> > +
> > +/**
> > + * @param fb_info Framebuffer information
> > + */
> > +static void s3cfb_enable_controller(struct fb_info *fb_info)
> > +{
> > +	struct s3cfb_info *fbi = fb_info->priv;
> > +	uint32_t con1;
> > +
> > +	con1 = readl(fbi->base + LCDCON1);
> > +
> > +	con1 |= ENVID;
> > +
> > +	writel(con1, fbi->base + LCDCON1);
> > +
> > +	if (fbi->enable)
> > +		(fbi->enable)(1);
>
> unneeded brackets.

Seem my old code.

> > +}
> > +
> > +/**
> > + * @param fb_info Framebuffer information
> > + */
> > +static void s3cfb_disable_controller(struct fb_info *fb_info)
> > +{
> > +	struct s3cfb_info *fbi = fb_info->priv;
> > +	uint32_t con1;
> > +
> > +	if (fbi->enable)
> > +		(fbi->enable)(0);
>
> ditto
>
> > +
> > +	con1 = readl(fbi->base + LCDCON1);
> > +
> > +	con1 &= ~ENVID;
> > +
> > +	writel(con1, fbi->base + LCDCON1);
> > +}
> > +
> > +/**
> > + * Prepare the video hardware for a specified video mode
> > + * @param fb_info Framebuffer information
> > + * @param mode The video mode description to initialize
> > + * @return 0 on success
> > + */
> > +static int s3cfb_activate_var(struct fb_info *fb_info)
> > +{
> > +	struct s3cfb_info *fbi = fb_info->priv;
> > +	struct fb_videomode *mode = fb_info->mode;
> > +	unsigned size, hclk, div;
> > +	uint32_t con1, con2, con3, con4, con5 = 0;
> > +
> > +	if (fbi->passive_display != 0) {
> > +		pr_err("Passive displays are currently not supported\n");
>
> dev_err please (some more follow).
>
> > +
> > +	switch (fb_info->bits_per_pixel) {
> > +#if 0
> > +	/* TODO add CLUT based modes */
> > +	case 1:
> > +		con1 |= BPPMODE(8);
> > +		break;
> > +	case 2:
> > +		con1 |= BPPMODE(9);
> > +		break;
> > +	case 4:
> > +		con1 |= BPPMODE(10);
> > +		break;
> > +	case 8:
> > +		con1 |= BPPMODE(11);
> > +		break;
> > +#endif
>
> I think we can remove this dead code. I see no reason to add clut
> support. If someone needs it, I think this missing snippet is the least
> of his problems.
>
> > +
> > +/**
> > + * The S3C244x LCD controller supports passive (CSTN/STN) and active
> > (TFT) LC displays + *
> > + * The driver itself currently supports only active TFT LC displays in
> > the follwing manner: + *
> > + *  * Palletized colours
> > + *    - 1 bpp
> > + *    - 2 bpp
> > + *    - 4 bpp
> > + *    - 8 bpp
>
> This doesn't seem to be true, right?
>
> > + *  * True colours
> > + *    - 16 bpp
> > + *    - 24 bpp
> > + */

Its unfinished out of date. Alex should update or remove it.

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-5121-206917-5128 |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From agalakhov at gmail.com  Wed May 18 05:39:10 2011
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Wed, 18 May 2011 15:39:10 +0600
Subject: [PATCH v2 1/2] Add support for Samsung S3C24x0 framebuffer.
In-Reply-To: <201105181012.36600.jbe@pengutronix.de>
References: <201105181012.36600.jbe@pengutronix.de>
Message-ID: <1305711550-8124-1-git-send-email-agalakhov@gmail.com>

Heavily based on original Juergen Beisert's code.

Signed-off-by: Alexey Galakhov <agalakhov at gmail.com>
---
 arch/arm/mach-s3c24xx/include/mach/fb.h |   59 +++++
 drivers/video/Kconfig                   |   13 +
 drivers/video/Makefile                  |    1 +
 drivers/video/s3c.c                     |  429 +++++++++++++++++++++++++++++++
 4 files changed, 502 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s3c24xx/include/mach/fb.h
 create mode 100644 drivers/video/s3c.c

diff --git a/arch/arm/mach-s3c24xx/include/mach/fb.h b/arch/arm/mach-s3c24xx/include/mach/fb.h
new file mode 100644
index 0000000..05e013a
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/include/mach/fb.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2010 Juergen Beisert
+ * Copyright (C) 2011 Alexey Galakhov
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __MACH_FB_H_
+# define __MACH_FB_H_
+
+#include <fb.h>
+
+/** Proprietary flags corresponding to  S3C24x0 LCDCON5 register */
+
+/** ! INVVDEN - DE active high */
+#define FB_SYNC_DE_HIGH_ACT	(1 << 23)
+/** INVVCLK - invert CLK signal */
+#define FB_SYNC_CLK_INVERT	(1 << 24)
+/** INVVD - invert data */
+#define FB_SYNC_DATA_INVERT	(1 << 25)
+/** INVPWREN - use PWREN signal */
+#define FB_SYNC_INVERT_PWREN	(1 << 26)
+/** INVLEND - use LEND signal */
+#define FB_SYNC_INVERT_LEND	(1 << 27)
+/** PWREN - use PWREN signal */
+#define FB_SYNC_USE_PWREN	(1 << 28)
+/** ENLEND - use LEND signal */
+#define FB_SYNC_USE_LEND	(1 << 29)
+/** BSWP - swap bytes */
+#define FB_SYNC_SWAP_BYTES	(1 << 30)
+/** HWSWP - swap half words */
+#define FB_SYNC_SWAP_HW		(1 << 31)
+
+struct s3c_fb_platform_data {
+	struct fb_videomode *mode_list;
+	unsigned mode_cnt;
+
+	unsigned bits_per_pixel;
+	int passive_display;	/**< enable support for STN or CSTN displays */
+
+	/** hook to enable backlight and stuff */
+	void (*enable)(int enable);
+};
+
+#endif /* __MACH_FB_H_ */
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index c652622..28bcfed 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -27,4 +27,17 @@ config DRIVER_VIDEO_STM
 	  Say 'Y' here to enable framebuffer and splash screen support for
 	  i.MX23 and i.MX28 based systems.
 
+config DRIVER_VIDEO_S3C
+	bool "S3C244x framebuffer driver"
+	depends on ARCH_S3C24xx
+	help
+	  Add support for the S3C244x LCD controller.
+
+if DRIVER_VIDEO_S3C
+
+config DRIVER_VIDEO_S3C_VERBOSE
+	bool "S3C244x verbose framebuffer info"
+
+endif
+
 endif
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index a217a0b..66b08d8 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_VIDEO) += fb.o
 obj-$(CONFIG_DRIVER_VIDEO_STM) += stm.o
 obj-$(CONFIG_DRIVER_VIDEO_IMX) += imx.o
 obj-$(CONFIG_DRIVER_VIDEO_IMX_IPU) += imx-ipu-fb.o
+obj-$(CONFIG_DRIVER_VIDEO_S3C) += s3c.o
diff --git a/drivers/video/s3c.c b/drivers/video/s3c.c
new file mode 100644
index 0000000..3715499
--- /dev/null
+++ b/drivers/video/s3c.c
@@ -0,0 +1,429 @@
+/*
+ * Copyright (C) 2010 Juergen Beisert
+ * Copyright (C) 2011 Alexey Galakhov
+ *
+ * This driver is based on a patch found in the web:
+ * (C) Copyright 2006 by OpenMoko, Inc.
+ * Author: Harald Welte <laforge at openmoko.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <fb.h>
+#include <driver.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <mach/gpio.h>
+#include <mach/s3c24xx-generic.h>
+#include <mach/fb.h>
+
+#define LCDCON1 0x00
+# define PNRMODE(x) (((x) & 3) << 5)
+# define BPPMODE(x) (((x) & 0xf) << 1)
+# define SET_CLKVAL(x) (((x) & 0x3ff) << 8)
+# define GET_CLKVAL(x) (((x) >> 8) & 0x3ff)
+# define ENVID (1 << 0)
+
+#define LCDCON2 0x04
+# define SET_VBPD(x) (((x) & 0xff) << 24)
+# define SET_LINEVAL(x) (((x) & 0x3ff) << 14)
+# define SET_VFPD(x) (((x) & 0xff) << 6)
+# define SET_VSPW(x) ((x) & 0x3f)
+
+#define LCDCON3 0x08
+# define SET_HBPD(x) (((x) & 0x7f) << 19)
+# define SET_HOZVAL(x) (((x) & 0x7ff) << 8)
+# define SET_HFPD(x) ((x) & 0xff)
+
+#define LCDCON4 0x0c
+# define SET_HSPW(x) ((x) & 0xff)
+
+#define LCDCON5 0x10
+# define BPP24BL (1 << 12)
+# define FRM565 (1 << 11)
+# define INV_CLK (1 << 10)
+# define INV_HS (1 << 9)
+# define INV_VS (1 << 8)
+# define INV_DTA (1 << 7)
+# define INV_DE (1 << 6)
+# define INV_PWREN (1 << 5)
+# define INV_LEND (1 << 4)
+# define ENA_PWREN (1 << 3)
+# define ENA_LEND (1 << 2)
+# define BSWP (1 << 1)
+# define HWSWP (1 << 0)
+
+#define LCDSADDR1 0x14
+# define SET_LCDBANK(x) (((x) & 0x1ff) << 21)
+# define GET_LCDBANK(x) (((x) >> 21) & 0x1ff)
+# define SET_LCDBASEU(x) ((x) & 0x1fffff)
+# define GET_LCDBASEU(x) ((x) & 0x1fffff)
+
+#define LCDSADDR2 0x18
+# define SET_LCDBASEL(x) ((x) & 0x1fffff)
+# define GET_LCDBASEL(x) ((x) & 0x1fffff)
+
+#define LCDSADDR3 0x1c
+# define SET_OFFSIZE(x) (((x) & 0x7ff) << 11)
+# define GET_OFFSIZE(x) (((x) >> 11) & 0x7ff)
+# define SET_PAGE_WIDTH(x) ((x) & 0x3ff)
+# define GET_PAGE_WIDTH(x) ((x) & 0x3ff)
+
+#define RED_LUT 0x20
+#define GREEN_LUT 0x24
+#define BLUE_LUT 0x28
+
+#define DITHMODE 0x4c
+
+#define TPAL 0x50
+
+#define LCDINTPND 0x54
+#define LCDSRCPND 0x58
+#define LCDINTMSK 0x5c
+# define FIWSEL (1 << 2)
+# define INT_FrSyn (1 << 1)
+# define INT_FiCnt (1 << 0)
+
+#define TCONSEL 0x60
+
+#define RED 0
+#define GREEN 1
+#define BLUE 2
+#define TRANSP 3
+
+struct s3cfb_info {
+	void __iomem *base;
+	unsigned memory_size;
+	struct fb_info info;
+	struct device_d *hw_dev;
+	int passive_display;
+	void (*enable)(int enable);
+};
+
+/* the RGB565 true colour mode */
+static const struct fb_bitfield def_rgb565[] = {
+	[RED] = {
+		.offset = 11,
+		.length = 5,
+	},
+	[GREEN] = {
+		.offset = 5,
+		.length = 6,
+	},
+	[BLUE] = {
+		.offset = 0,
+		.length = 5,
+	},
+	[TRANSP] = {	/* no support for transparency */
+		.length = 0,
+	}
+};
+
+/* the RGB888 true colour mode */
+static const struct fb_bitfield def_rgb888[] = {
+	[RED] = {
+		.offset = 16,
+		.length = 8,
+	},
+	[GREEN] = {
+		.offset = 8,
+		.length = 8,
+	},
+	[BLUE] = {
+		.offset = 0,
+		.length = 8,
+	},
+	[TRANSP] = {	/* no support for transparency */
+		.length = 0,
+	}
+};
+
+/**
+ * @param fb_info Framebuffer information
+ */
+static void s3cfb_enable_controller(struct fb_info *fb_info)
+{
+	struct s3cfb_info *fbi = fb_info->priv;
+	uint32_t con1;
+
+	con1 = readl(fbi->base + LCDCON1);
+
+	con1 |= ENVID;
+
+	writel(con1, fbi->base + LCDCON1);
+
+	if (fbi->enable)
+		fbi->enable(1);
+}
+
+/**
+ * @param fb_info Framebuffer information
+ */
+static void s3cfb_disable_controller(struct fb_info *fb_info)
+{
+	struct s3cfb_info *fbi = fb_info->priv;
+	uint32_t con1;
+
+	if (fbi->enable)
+		fbi->enable(0);
+
+	con1 = readl(fbi->base + LCDCON1);
+
+	con1 &= ~ENVID;
+
+	writel(con1, fbi->base + LCDCON1);
+}
+
+/**
+ * Prepare the video hardware for a specified video mode
+ * @param fb_info Framebuffer information
+ * @param mode The video mode description to initialize
+ * @return 0 on success
+ */
+static int s3cfb_activate_var(struct fb_info *fb_info)
+{
+	struct s3cfb_info *fbi = fb_info->priv;
+	struct fb_videomode *mode = fb_info->mode;
+	unsigned size, hclk, div;
+	uint32_t con1, con2, con3, con4, con5 = 0;
+
+	if (fbi->passive_display != 0) {
+		dev_err(fbi->hw_dev, "Passive displays are currently not supported\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * we need at least this amount of memory for the framebuffer
+	 */
+	size = mode->xres * mode->yres * (fb_info->bits_per_pixel >> 3);
+	if (fbi->memory_size != size || fb_info->screen_base == NULL) {
+		if (fb_info->screen_base)
+			free(fb_info->screen_base);
+		fbi->memory_size = 0;
+		fb_info->screen_base = malloc(size);
+		if (! fb_info->screen_base)
+			return -ENOMEM;
+		memset(fb_info->screen_base, 0, size);
+		fbi->memory_size = size;
+	}
+
+	/* ensure video output is _off_ */
+	writel(0x00000000, fbi->base + LCDCON1);
+
+	hclk = s3c24xx_get_hclk() / 1000U;	/* hclk in kHz */
+	div = hclk / PICOS2KHZ(mode->pixclock);
+	if (div < 3)
+		div  = 3;
+	/* pixel clock is: (hclk) / ((div + 1) * 2) */
+	div += 1;
+	div >>= 1;
+	div -= 1;
+
+	con1 = PNRMODE(3) | SET_CLKVAL(div);	/* PNRMODE=3 is TFT */
+
+	switch (fb_info->bits_per_pixel) {
+	case 16:
+		con1 |= BPPMODE(12);
+		con5 |= FRM565;
+		con5 |= HWSWP;
+		fb_info->red = def_rgb565[RED];
+		fb_info->green = def_rgb565[GREEN];
+		fb_info->blue = def_rgb565[BLUE];
+		fb_info->transp =  def_rgb565[TRANSP];
+		break;
+	case 24:
+		con1 |= BPPMODE(13);
+		/* con5 |= BPP24BL;	*/ /* FIXME maybe needed, check alignment */
+		fb_info->red = def_rgb888[RED];
+		fb_info->green = def_rgb888[GREEN];
+		fb_info->blue = def_rgb888[BLUE];
+		fb_info->transp =  def_rgb888[TRANSP];
+		break;
+	default:
+		dev_err(fbi->hw_dev, "Invalid bits per pixel value: %u\n", fb_info->bits_per_pixel);
+		return -EINVAL;
+	}
+
+	/* 'normal' in register description means positive logic */
+	if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
+		con5 |= INV_HS;
+	if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
+		con5 |= INV_VS;
+	if (!(mode->sync & FB_SYNC_DE_HIGH_ACT))
+		con5 |= INV_DE;
+	if (mode->sync & FB_SYNC_CLK_INVERT)
+		con5 |= INV_CLK;	/* display should latch at the rising edge */
+	if (mode->sync & FB_SYNC_DATA_INVERT)
+		con5 |= INV_DTA;
+	if (mode->sync & FB_SYNC_INVERT_PWREN)
+		con5 |= INV_PWREN;
+	if (mode->sync & FB_SYNC_INVERT_LEND)
+		con5 |= INV_LEND;
+	if (mode->sync & FB_SYNC_USE_PWREN)
+		con5 |= ENA_PWREN;	/* FIXME should this be done conditionally/later? */
+	if (mode->sync & FB_SYNC_USE_LEND)
+		con5 |= ENA_LEND;
+	if (mode->sync & FB_SYNC_SWAP_BYTES)
+		con5 ^= BSWP;
+	if (mode->sync & FB_SYNC_SWAP_HW)
+		con5 ^= HWSWP;
+
+	/* vertical timing */
+	con2 = SET_VBPD(mode->upper_margin - 1) |
+		SET_LINEVAL(mode->yres - 1) |
+		SET_VFPD(mode->lower_margin - 1) |
+		SET_VSPW(mode->vsync_len - 1);
+
+	/* horizontal timing */
+	con3 = SET_HBPD(mode->left_margin - 1) |
+		SET_HOZVAL(mode->xres - 1) |
+		SET_HFPD(mode->right_margin - 1);
+	con4 = SET_HSPW(mode->hsync_len - 1);
+
+	/* basic timing setup */
+	writel(con1, fbi->base + LCDCON1);
+	dev_dbg(fbi->hw_dev, "writing %08X into %p (con1)\n", con1, fbi->base + LCDCON1);
+	writel(con2, fbi->base + LCDCON2);
+	dev_dbg(fbi->hw_dev, "writing %08X into %p (con2)\n", con2, fbi->base + LCDCON2);
+	writel(con3, fbi->base + LCDCON3);
+	dev_dbg(fbi->hw_dev, "writing %08X into %p (con3)\n", con3, fbi->base + LCDCON3);
+	writel(con4, fbi->base + LCDCON4);
+	dev_dbg(fbi->hw_dev, "writing %08X into %p (con4)\n", con4, fbi->base + LCDCON4);
+	writel(con5, fbi->base + LCDCON5);
+	dev_dbg(fbi->hw_dev, "writing %08X into %p (con5)\n", con5, fbi->base + LCDCON5);
+
+	dev_dbg(fbi->hw_dev, "setting up the fb baseadress to %p\n", fb_info->screen_base);
+
+	/* framebuffer memory setup */
+	writel((unsigned)fb_info->screen_base >> 1, fbi->base + LCDSADDR1);
+	size = mode->xres * (fb_info->bits_per_pixel >> 3) * (mode->yres);
+	writel(SET_LCDBASEL(((unsigned)fb_info->screen_base + size) >> 1), fbi->base + LCDSADDR2);
+	writel(SET_OFFSIZE(0) |
+		SET_PAGE_WIDTH((mode->xres * fb_info->bits_per_pixel) >> 4),
+		fbi->base + LCDSADDR3);
+	writel(FIWSEL | INT_FrSyn | INT_FiCnt, fbi->base + LCDINTMSK);
+
+	return 0;
+}
+
+/**
+ * Print some information about the current hardware state
+ * @param hw_dev S3C video device
+ */
+#ifdef CONFIG_DRIVER_VIDEO_S3C_VERBOSE
+static void s3cfb_info(struct device_d *hw_dev)
+{
+	uint32_t con1, addr1, addr2, addr3;
+
+	con1 = readl(hw_dev->map_base + LCDCON1);
+	addr1 = readl(hw_dev->map_base + LCDSADDR1);
+	addr2 = readl(hw_dev->map_base + LCDSADDR2);
+	addr3 = readl(hw_dev->map_base + LCDSADDR3);
+
+	printf(" Video hardware info:\n");
+	printf("  Video clock is running at %u Hz\n", s3c24xx_get_hclk() / ((GET_CLKVAL(con1) + 1) * 2));
+	printf("  Video memory bank starts at 0x%08X\n", GET_LCDBANK(addr1) << 22);
+	printf("  Video memory bank offset: 0x%08X\n", GET_LCDBASEU(addr1));
+	printf("  Video memory end: 0x%08X\n", GET_LCDBASEU(addr2));
+	printf("  Virtual screen offset size: %u half words\n", GET_OFFSIZE(addr3));
+	printf("  Virtual screen page width: %u half words\n", GET_PAGE_WIDTH(addr3));
+}
+#endif
+
+/*
+ * There is only one video hardware instance available.
+ * It makes no sense to dynamically allocate this data
+ */
+static struct fb_ops s3cfb_ops = {
+	.fb_activate_var = s3cfb_activate_var,
+	.fb_enable = s3cfb_enable_controller,
+	.fb_disable = s3cfb_disable_controller,
+};
+
+static struct s3cfb_info fbi = {
+	.info = {
+		.fbops = &s3cfb_ops,
+	},
+};
+
+static int s3cfb_probe(struct device_d *hw_dev)
+{
+	struct s3c_fb_platform_data *pdata = hw_dev->platform_data;
+	int ret;
+
+	if (! pdata)
+		return -ENODEV;
+
+	writel(0, hw_dev->map_base + LCDCON1);
+	writel(0, hw_dev->map_base + LCDCON5); /* FIXME not 0 for some displays */
+
+	/* just init */
+	fbi.info.priv = &fbi;
+
+	/* add runtime hardware info */
+	fbi.hw_dev = hw_dev;
+	fbi.base = (void*)hw_dev->map_base;
+
+	/* add runtime video info */
+	fbi.info.mode_list = pdata->mode_list;
+	fbi.info.num_modes = pdata->mode_cnt;
+	fbi.info.mode = &fbi.info.mode_list[1];
+	fbi.info.xres = fbi.info.mode->xres;
+	fbi.info.yres = fbi.info.mode->yres;
+	if (pdata->bits_per_pixel)
+		fbi.info.bits_per_pixel = pdata->bits_per_pixel;
+	else
+		fbi.info.bits_per_pixel = 16;
+	fbi.passive_display = pdata->passive_display;
+	fbi.enable = pdata->enable;
+
+	ret = register_framebuffer(&fbi.info);
+	if (ret != 0) {
+		dev_err(hw_dev, "Failed to register framebuffer\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct driver_d s3cfb_driver = {
+	.name	= "s3c_fb",
+	.probe	= s3cfb_probe,
+#ifdef CONFIG_DRIVER_VIDEO_S3C_VERBOSE
+	.info	= s3cfb_info,
+#endif
+};
+
+static int s3cfb_init(void)
+{
+	return register_driver(&s3cfb_driver);
+}
+
+device_initcall(s3cfb_init);
+
+/**
+ * The S3C244x LCD controller supports passive (CSTN/STN) and active (TFT) LC displays
+ *
+ * The driver itself currently supports only active TFT LC displays in the follwing manner:
+ *
+ *  * True colours
+ *    - 16 bpp
+ *    - 24 bpp (untested)
+ */
-- 
1.7.4.1



From agalakhov at gmail.com  Wed May 18 05:40:40 2011
From: agalakhov at gmail.com (Alexey Galakhov)
Date: Wed, 18 May 2011 15:40:40 +0600
Subject: [PATCH v2 2/2] Enable display for MINI2440 board.
In-Reply-To: <1305650641-15125-2-git-send-email-agalakhov@gmail.com>
References: <1305650641-15125-2-git-send-email-agalakhov@gmail.com>
Message-ID: <1305711640-8164-1-git-send-email-agalakhov@gmail.com>

Also add display modes for usual MINI2440 displays.

Signed-off-by: Alexey Galakhov <agalakhov at gmail.com>
---
 arch/arm/boards/mini2440/Kconfig    |   28 +++++++++++++
 arch/arm/boards/mini2440/mini2440.c |   74 +++++++++++++++++++++++++++++++++++
 arch/arm/mach-s3c24xx/Kconfig       |    2 +
 3 files changed, 104 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/mini2440/Kconfig

diff --git a/arch/arm/boards/mini2440/Kconfig b/arch/arm/boards/mini2440/Kconfig
new file mode 100644
index 0000000..929df60
--- /dev/null
+++ b/arch/arm/boards/mini2440/Kconfig
@@ -0,0 +1,28 @@
+
+if MACH_MINI2440
+
+config MINI2440_VIDEO
+	bool
+	select VIDEO
+	select DRIVER_VIDEO_S3C
+
+config MINI2440_VIDEO_N35
+	bool "Support N35 display (240x320)"
+	select MINI2440_VIDEO
+	help
+	  This adds support for NEC 3.5 inch TFT display,
+	  the most common one used with MINI2440 board.
+
+config MINI2440_VIDEO_A70
+	bool "Support A70 display (800x480)"
+	select MINI2440_VIDEO
+	help
+	  This adds support for Innolux 7.0 inch TFT display.
+
+config MINI2440_VIDEO_SVGA
+	bool "Support SVGA video adapter"
+	select MINI2440_VIDEO
+	help
+	  This adds support for MINI2440 SVGA (1024x768) video output adapter.
+
+endif
diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 448aa40..c96d177 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -34,6 +34,7 @@
 #include <dm9000.h>
 #include <nand.h>
 #include <mci.h>
+#include <fb.h>
 #include <asm/armlinux.h>
 #include <asm/io.h>
 #include <mach/gpio.h>
@@ -41,6 +42,7 @@
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
 #include <mach/mci.h>
+#include <mach/fb.h>
 
 static struct memory_platform_data ram_pdata = {
 	.name		= "ram0",
@@ -99,6 +101,77 @@ static struct device_d mci_dev = {
 	.platform_data	= &mci_data,
 };
 
+static struct fb_videomode s3c24x0_fb_modes[] = {
+#ifdef CONFIG_MINI2440_VIDEO_N35
+	{
+		.name		= "N35",
+		.refresh	= 60,
+		.xres		= 240,
+		.left_margin	= 21,
+		.right_margin	= 38,
+		.hsync_len	= 6,
+		.yres		= 320,
+		.upper_margin	= 4,
+		.lower_margin	= 4,
+		.vsync_len	= 2,
+		.pixclock	= 115913,
+		.sync		= FB_SYNC_USE_PWREN,
+		.vmode		= FB_VMODE_NONINTERLACED,
+		.flag		= 0,
+	},
+#endif
+#ifdef CONFIG_MINI2440_VIDEO_A70
+	{
+		.name		= "A70",
+		.refresh	= 50,
+		.xres		= 800,
+		.left_margin	= 40,
+		.right_margin	= 40,
+		.hsync_len	= 48,
+		.yres		= 480,
+		.upper_margin	= 29,
+		.lower_margin	= 3,
+		.vsync_len	= 3,
+		.pixclock	= 41848,
+		.sync		= FB_SYNC_USE_PWREN | FB_SYNC_DE_HIGH_ACT,
+		.vmode		= FB_VMODE_NONINTERLACED,
+		.flag		= 0,
+	},
+#endif
+#ifdef CONFIG_MINI2440_VIDEO_SVGA
+	{
+		.name		= "SVGA",
+		.refresh	= 24,
+		.xres		= 1024,
+		.left_margin	= 1,
+		.right_margin	= 2,
+		.hsync_len	= 2,
+		.yres		= 768,
+		.upper_margin	= 200,
+		.lower_margin	= 16,
+		.vsync_len	= 16,
+		.pixclock	= 40492,
+		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_DE_HIGH_ACT 
+                                  /* | FB_SYNC_SWAP_HW */ /* FIXME maybe */ ,
+		.vmode		= FB_VMODE_NONINTERLACED,
+		.flag		= 0,
+	},
+#endif
+};
+
+static struct s3c_fb_platform_data s3c24x0_fb_data = {
+	.mode_list		= s3c24x0_fb_modes,
+	.mode_cnt		= sizeof(s3c24x0_fb_modes) / sizeof(struct fb_videomode),
+	.bits_per_pixel		= 16,
+	.passive_display	= 0,
+};
+
+static struct device_d s3cfb_dev = {
+	.name    = "s3c_fb",
+	.map_base = S3C2410_LCD_BASE,
+	.platform_data	= &s3c24x0_fb_data,
+};
+
 static const unsigned pin_usage[] = {
 	/* address bus, used by NOR, SDRAM */
 	GPA1_ADDR16,
@@ -269,6 +342,7 @@ static int mini2440_devices_init(void)
 	dev_add_bb_dev("env_raw", "env0");
 #endif
 	register_device(&mci_dev);
+	register_device(&s3cfb_dev);
 	armlinux_add_dram(&sdram_dev);
 	armlinux_set_bootparams((void *)sdram_dev.map_base + 0x100);
 	armlinux_set_architecture(MACH_TYPE_MINI2440);
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 33d230c..80b65fb 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -67,6 +67,8 @@ config MACH_A9M2410DEV
 
 endchoice
 
+source arch/arm/boards/mini2440/Kconfig 
+
 endmenu
 
 menu "S3C24X0 Features              "
-- 
1.7.4.1



From tim.sander at hbm.com  Fri May 20 09:00:50 2011
From: tim.sander at hbm.com (Tim Sander)
Date: Fri, 20 May 2011 15:00:50 +0200
Subject: [PATCH] fix genenv when using svn based enviroment directory
Message-ID: <201105201500.50593.tim.sander@hbm.com>

Hi

When setting the default env of barebox to a svn directory the build stops
with questions on removal and the barebox env is polluted with svn files.

The patch below fixes that.

Tested with 2011.03.1. Newer versions don't boot anymore on my pcm043 :-(.

Signed-off-by: Tim Sander <tim.sander at hbm.com>

---
 scripts/genenv |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/scripts/genenv b/scripts/genenv
index de8b4f1..c6bcd4b 100755
--- a/scripts/genenv
+++ b/scripts/genenv
@@ -13,7 +13,9 @@ tempdir=$(mktemp -d)
 for i in $*; do
        cp -r $i/* $tempdir
 done
+find $tempdir -name .svn |xargs rm -r
+
 $objtree/scripts/bareboxenv -s $tempdir $objtree/barebox_default_env
 
-rm -r $tempdir
+rm -rf $tempdir
 
-- 
1.7.0.4


Hottinger Baldwin Messtechnik GmbH, Im Tiefen See 45, 64293 Darmstadt, Germany | www.hbm.com 

Registered as GmbH (German limited liability corporation) in the commercial register at the local court of Darmstadt, HRB 1147  
Company domiciled in Darmstadt | CEO: Andreas Huellhorst | Chairman of the board: James Charles Webster

Als Gesellschaft mit beschraenkter Haftung eingetragen im Handelsregister des Amtsgerichts Darmstadt unter HRB 1147 
Sitz der Gesellschaft: Darmstadt | Geschaeftsfuehrung: Andreas Huellhorst | Aufsichtsratsvorsitzender: James Charles Webster

The information in this email is confidential. It is intended solely for the addressee. If you are not the intended recipient, please let me know and delete this email.

Die in dieser E-Mail enthaltene Information ist vertraulich und lediglich fur den Empfaenger bestimmt. Sollten Sie nicht der eigentliche Empfaenger sein, informieren Sie mich bitte kurz und loeschen diese E-Mail.



From tim.sander at hbm.com  Fri May 20 08:07:08 2011
From: tim.sander at hbm.com (Tim Sander)
Date: Fri, 20 May 2011 14:07:08 +0200
Subject: GPIO Support on pcm043
Message-ID: <201105201407.08429.tim.sander@hbm.com>

Hi

I just tried (for i in `seq 0 96`)
gpio_set_direction $i 1
and 
gpio_set_direction $i 0

on a barebox for pcm043 with gpio support compiled in.
But no LED was lighting up. 

Is there some obvious error on my side or is there no gpio
support for pcm043? At least there seems to be support for
the gpio ports on imx?

Any hints?
Thanks
Tim

Hottinger Baldwin Messtechnik GmbH, Im Tiefen See 45, 64293 Darmstadt, Germany | www.hbm.com 

Registered as GmbH (German limited liability corporation) in the commercial register at the local court of Darmstadt, HRB 1147  
Company domiciled in Darmstadt | CEO: Andreas Huellhorst | Chairman of the board: James Charles Webster

Als Gesellschaft mit beschraenkter Haftung eingetragen im Handelsregister des Amtsgerichts Darmstadt unter HRB 1147 
Sitz der Gesellschaft: Darmstadt | Geschaeftsfuehrung: Andreas Huellhorst | Aufsichtsratsvorsitzender: James Charles Webster

The information in this email is confidential. It is intended solely for the addressee. If you are not the intended recipient, please let me know and delete this email.

Die in dieser E-Mail enthaltene Information ist vertraulich und lediglich fur den Empfaenger bestimmt. Sollten Sie nicht der eigentliche Empfaenger sein, informieren Sie mich bitte kurz und loeschen diese E-Mail.



From eric at eukrea.com  Fri May 20 09:14:46 2011
From: eric at eukrea.com (=?ISO-8859-1?Q?Eric_B=E9nard?=)
Date: Fri, 20 May 2011 15:14:46 +0200
Subject: GPIO Support on pcm043
In-Reply-To: <201105201407.08429.tim.sander@hbm.com>
References: <201105201407.08429.tim.sander@hbm.com>
Message-ID: <4DD66946.4050906@eukrea.com>

Hi Tim,

On 20/05/2011 14:07, Tim Sander wrote:
> I just tried (for i in `seq 0 96`)
> gpio_set_direction $i 1
> and
> gpio_set_direction $i 0
>
> on a barebox for pcm043 with gpio support compiled in.
> But no LED was lighting up.
>
> Is there some obvious error on my side or is there no gpio
> support for pcm043? At least there seems to be support for
> the gpio ports on imx?
>
> Any hints?

you first need to configure the mux of the pins to GPIO mode, then you can use 
them as gpio.

Eric


From tim.sander at hbm.com  Fri May 20 09:30:19 2011
From: tim.sander at hbm.com (Tim Sander)
Date: Fri, 20 May 2011 15:30:19 +0200
Subject: GPIO Support on pcm043
In-Reply-To: <4DD66946.4050906@eukrea.com>
References: <201105201407.08429.tim.sander@hbm.com>
	<4DD66946.4050906@eukrea.com>
Message-ID: <201105201530.20237.tim.sander@hbm.com>

Hi Eric

Thanks for your answer
> > Is there some obvious error on my side or is there no gpio
> > support for pcm043? At least there seems to be support for
> > the gpio ports on imx?
> > Any hints?
> 
> you first need to configure the mux of the pins to GPIO mode, then you can
> use them as gpio.
After tripping into that trap multiple times, i've already checked that, but
forgot to mention it:
static struct pad_desc pcm043_pads[] = {
	...
        MX35_PAD_D3_CLS__GPIO1_4,
        MX35_PAD_D3_SPL__GPIO1_5,
	...

These should be the gpio nrs 4 and 5 which means that
gpio_set_direction 4 1
or
gpio_set_direction 4 0
should light up the led.

The led is working under linux so it's some problem with the gpio setup.

Thanks
Tim

Hottinger Baldwin Messtechnik GmbH, Im Tiefen See 45, 64293 Darmstadt, Germany | www.hbm.com 

Registered as GmbH (German limited liability corporation) in the commercial register at the local court of Darmstadt, HRB 1147  
Company domiciled in Darmstadt | CEO: Andreas Huellhorst | Chairman of the board: James Charles Webster

Als Gesellschaft mit beschraenkter Haftung eingetragen im Handelsregister des Amtsgerichts Darmstadt unter HRB 1147 
Sitz der Gesellschaft: Darmstadt | Geschaeftsfuehrung: Andreas Huellhorst | Aufsichtsratsvorsitzender: James Charles Webster

The information in this email is confidential. It is intended solely for the addressee. If you are not the intended recipient, please let me know and delete this email.

Die in dieser E-Mail enthaltene Information ist vertraulich und lediglich f?r den Empfaenger bestimmt. Sollten Sie nicht der eigentliche Empfaenger sein, informieren Sie mich bitte kurz und loeschen diese E-Mail.



From eric at eukrea.com  Fri May 20 09:34:01 2011
From: eric at eukrea.com (=?ISO-8859-1?Q?Eric_B=E9nard?=)
Date: Fri, 20 May 2011 15:34:01 +0200
Subject: GPIO Support on pcm043
In-Reply-To: <201105201530.20237.tim.sander@hbm.com>
References: <201105201407.08429.tim.sander@hbm.com>
	<4DD66946.4050906@eukrea.com>
	<201105201530.20237.tim.sander@hbm.com>
Message-ID: <4DD66DC9.1090304@eukrea.com>

On 20/05/2011 15:30, Tim Sander wrote:
> Hi Eric
>
> Thanks for your answer
>>> Is there some obvious error on my side or is there no gpio
>>> support for pcm043? At least there seems to be support for
>>> the gpio ports on imx?
>>> Any hints?
>>
>> you first need to configure the mux of the pins to GPIO mode, then you can
>> use them as gpio.
> After tripping into that trap multiple times, i've already checked that, but
> forgot to mention it:
> static struct pad_desc pcm043_pads[] = {
> 	...
>          MX35_PAD_D3_CLS__GPIO1_4,
>          MX35_PAD_D3_SPL__GPIO1_5,
> 	...
>
> These should be the gpio nrs 4 and 5 which means that
> gpio_set_direction 4 1
> or
> gpio_set_direction 4 0
> should light up the led.
>
if the led is wired on gpio1_5 it should.

Eric


From eric at eukrea.com  Fri May 20 10:16:53 2011
From: eric at eukrea.com (=?ISO-8859-1?Q?Eric_B=E9nard?=)
Date: Fri, 20 May 2011 16:16:53 +0200
Subject: GPIO Support on pcm043
In-Reply-To: <4DD66DC9.1090304@eukrea.com>
References: <201105201407.08429.tim.sander@hbm.com>	<4DD66946.4050906@eukrea.com>	<201105201530.20237.tim.sander@hbm.com>
	<4DD66DC9.1090304@eukrea.com>
Message-ID: <4DD677D5.6020300@eukrea.com>

Hi,

On 20/05/2011 15:34, Eric B?nard wrote:
> On 20/05/2011 15:30, Tim Sander wrote:
>> Hi Eric
>>
>> Thanks for your answer
>>>> Is there some obvious error on my side or is there no gpio
>>>> support for pcm043? At least there seems to be support for
>>>> the gpio ports on imx?
>>>> Any hints?
>>>
>>> you first need to configure the mux of the pins to GPIO mode, then you can
>>> use them as gpio.
>> After tripping into that trap multiple times, i've already checked that, but
>> forgot to mention it:
>> static struct pad_desc pcm043_pads[] = {
>> ...
>> MX35_PAD_D3_CLS__GPIO1_4,
>> MX35_PAD_D3_SPL__GPIO1_5,
>> ...
>>
>> These should be the gpio nrs 4 and 5 which means that
>> gpio_set_direction 4 1
>> or
>> gpio_set_direction 4 0
>> should light up the led.
>>
> if the led is wired on gpio1_5 it should.
>
I mean 1_4 here

Eric



From s.hauer at pengutronix.de  Mon May 23 03:06:39 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 May 2011 09:06:39 +0200
Subject: GPIO Support on pcm043
In-Reply-To: <201105201407.08429.tim.sander@hbm.com>
References: <201105201407.08429.tim.sander@hbm.com>
Message-ID: <20110523070639.GB20715@pengutronix.de>

Hi Tim,

On Fri, May 20, 2011 at 02:07:08PM +0200, Tim Sander wrote:
> Hi
> 
> I just tried (for i in `seq 0 96`)
> gpio_set_direction $i 1
> and 
> gpio_set_direction $i 0

I suppose the actual command you used is gpio_direction_output, right?
there is no gpio_set_direction command.

I just checked that as of latest master the LED on the baseboard
connected to gpio2_6 works with:

gpio_direction_output 38 0
gpio_direction_output 38 1

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon May 23 03:12:56 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 May 2011 09:12:56 +0200
Subject: GPIO Support on pcm043
In-Reply-To: <201105201530.20237.tim.sander@hbm.com>
References: <201105201407.08429.tim.sander@hbm.com>
	<4DD66946.4050906@eukrea.com>
	<201105201530.20237.tim.sander@hbm.com>
Message-ID: <20110523071256.GC20715@pengutronix.de>

On Fri, May 20, 2011 at 03:30:19PM +0200, Tim Sander wrote:
> Hi Eric
> 
> Thanks for your answer
> > > Is there some obvious error on my side or is there no gpio
> > > support for pcm043? At least there seems to be support for
> > > the gpio ports on imx?
> > > Any hints?
> > 
> > you first need to configure the mux of the pins to GPIO mode, then you can
> > use them as gpio.
> After tripping into that trap multiple times, i've already checked that, but
> forgot to mention it:
> static struct pad_desc pcm043_pads[] = {
> 	...
>         MX35_PAD_D3_CLS__GPIO1_4,
>         MX35_PAD_D3_SPL__GPIO1_5,
> 	...

Have you checked that you chose the correct iomux setup? These
particular pins can be routed to three different pads each:

#define MX35_PAD_CAPTURE__GPIO1_4	IOMUX_PAD(0x328, 0x004, 5, 0x850, 0, NO_PAD_CTRL)
#define MX35_PAD_SCKR__GPIO1_4		IOMUX_PAD(0x584, 0x140, 5, 0x850, 1, NO_PAD_CTRL)
#define MX35_PAD_D3_CLS__GPIO1_4	IOMUX_PAD(0x68c, 0x228, 5, 0x850, 2, NO_PAD_CTRL)
#define MX35_PAD_COMPARE__GPIO1_5	IOMUX_PAD(0x32c, 0x008, 5, 0x854, 0, NO_PAD_CTRL)
#define MX35_PAD_FSR__GPIO1_5		IOMUX_PAD(0x588, 0x144, 5, 0x854, 1, NO_PAD_CTRL)
#define MX35_PAD_D3_SPL__GPIO1_5	IOMUX_PAD(0x690, 0x22c, 5, 0x854, 2, NO_PAD_CTRL)

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Mon May 23 03:21:59 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 23 May 2011 09:21:59 +0200
Subject: [PATCH] fix genenv when using svn based enviroment directory
In-Reply-To: <201105201500.50593.tim.sander@hbm.com>
References: <201105201500.50593.tim.sander@hbm.com>
Message-ID: <20110523072159.GE20715@pengutronix.de>

Hi Tim,

On Fri, May 20, 2011 at 03:00:50PM +0200, Tim Sander wrote:
> Hi
> 
> When setting the default env of barebox to a svn directory the build stops
> with questions on removal and the barebox env is polluted with svn files.
> 
> The patch below fixes that.
> 
> Tested with 2011.03.1. Newer versions don't boot anymore on my pcm043 :-(.
> 
> Signed-off-by: Tim Sander <tim.sander at hbm.com>
> 
> ---
>  scripts/genenv |    4 +++-
>  1 files changed, 3 insertions(+), 1 deletions(-)
> 
> diff --git a/scripts/genenv b/scripts/genenv
> index de8b4f1..c6bcd4b 100755
> --- a/scripts/genenv
> +++ b/scripts/genenv
> @@ -13,7 +13,9 @@ tempdir=$(mktemp -d)
>  for i in $*; do
>         cp -r $i/* $tempdir
>  done
> +find $tempdir -name .svn |xargs rm -r
> +
>  $objtree/scripts/bareboxenv -s $tempdir $objtree/barebox_default_env
>  
> -rm -r $tempdir
> +rm -rf $tempdir

Is this second change intended? If yes, why?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From tim.sander at hbm.com  Mon May 23 03:47:40 2011
From: tim.sander at hbm.com (Tim Sander)
Date: Mon, 23 May 2011 09:47:40 +0200
Subject: [PATCH] Re: [PATCH] fix genenv when using svn based enviroment
	directory
Message-ID: <201105230947.40484.tim.sander@hbm.com>

Hi Sascha
> >  $objtree/scripts/bareboxenv -s $tempdir $objtree/barebox_default_env
> > 
> > -rm -r $tempdir
> > +rm -rf $tempdir
> 
> Is this second change intended? If yes, why?
If the barebox environment managed with subversion there are some read only 
directories within this dir, which make rm wait for a confirmation, which is 
more annoying when building with ptxdist.

But i made this change before the first one, i just checked that the -f option 
is not needed anymore since the environment clobbering .svn directories have 
been removed earlier.

So the more minimalistic patch version is attached below.
Best Regards
Tim


Signed-of-by: Tim Sander <tim.sander at hbm.com>
---
 scripts/genenv |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/scripts/genenv b/scripts/genenv
index de8b4f1..65c074e 100755
--- a/scripts/genenv
+++ b/scripts/genenv
@@ -13,6 +13,8 @@ tempdir=$(mktemp -d)
 for i in $*; do
        cp -r $i/* $tempdir
 done
+find $tempdir -name .svn |xargs rm -r
+
 $objtree/scripts/bareboxenv -s $tempdir $objtree/barebox_default_env
 
 rm -r $tempdir
-- 
1.7.0.4

PS: Forgot the list in reply, this is the manual forward.

Hottinger Baldwin Messtechnik GmbH, Im Tiefen See 45, 64293 Darmstadt, Germany | www.hbm.com 

Registered as GmbH (German limited liability corporation) in the commercial register at the local court of Darmstadt, HRB 1147  
Company domiciled in Darmstadt | CEO: Andreas Huellhorst | Chairman of the board: James Charles Webster

Als Gesellschaft mit beschraenkter Haftung eingetragen im Handelsregister des Amtsgerichts Darmstadt unter HRB 1147 
Sitz der Gesellschaft: Darmstadt | Geschaeftsfuehrung: Andreas Huellhorst | Aufsichtsratsvorsitzender: James Charles Webster

The information in this email is confidential. It is intended solely for the addressee. If you are not the intended recipient, please let me know and delete this email.

Die in dieser E-Mail enthaltene Information ist vertraulich und lediglich f?r den Empfaenger bestimmt. Sollten Sie nicht der eigentliche Empfaenger sein, informieren Sie mich bitte kurz und loeschen diese E-Mail.



From tim.sander at hbm.com  Mon May 23 06:20:45 2011
From: tim.sander at hbm.com (Tim Sander)
Date: Mon, 23 May 2011 12:20:45 +0200
Subject: GPIO Support on pcm043
In-Reply-To: <20110523071256.GC20715@pengutronix.de>
References: <201105201407.08429.tim.sander@hbm.com>
	<201105201530.20237.tim.sander@hbm.com>
	<20110523071256.GC20715@pengutronix.de>
Message-ID: <201105231220.45663.tim.sander@hbm.com>

Hi

Thanks for your help guys! I just noticed i had two mux entries per pad. The 
last had overriden my first settings. Its now working as intended, sorry for 
the noise.

Best regards
Tim

Hottinger Baldwin Messtechnik GmbH, Im Tiefen See 45, 64293 Darmstadt, Germany | www.hbm.com 

Registered as GmbH (German limited liability corporation) in the commercial register at the local court of Darmstadt, HRB 1147  
Company domiciled in Darmstadt | CEO: Andreas Huellhorst | Chairman of the board: James Charles Webster

Als Gesellschaft mit beschraenkter Haftung eingetragen im Handelsregister des Amtsgerichts Darmstadt unter HRB 1147 
Sitz der Gesellschaft: Darmstadt | Geschaeftsfuehrung: Andreas Huellhorst | Aufsichtsratsvorsitzender: James Charles Webster

The information in this email is confidential. It is intended solely for the addressee. If you are not the intended recipient, please let me know and delete this email.

Die in dieser E-Mail enthaltene Information ist vertraulich und lediglich f?r den Empfaenger bestimmt. Sollten Sie nicht der eigentliche Empfaenger sein, informieren Sie mich bitte kurz und loeschen diese E-Mail.



From jbe at pengutronix.de  Tue May 24 10:07:21 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 24 May 2011 16:07:21 +0200
Subject: [PATCH/master] Always initialize oob_poi before writing OOB data
Message-ID: <201105241607.21271.jbe@pengutronix.de>

The following patch came across the mtd mailing list today. I thinks its also 
valid for barebox (it handles a special corner case, but maybe it can hit us, 
too):

In nand_do_write_ops() code it is possible for a caller to provide
ops.oobbuf populated and ops.mode == MTD_OOB_AUTO, which currently
means that the chip->oob_poi buffer isn't initialised to all 0xFF.
The nand_fill_oob() method then carries out the task of copying
the provided OOB data to oob_poi, but with MTD_OOB_AUTO it skips
areas marked as unavailable by the layout struct, including the
bad block marker bytes.

An example of this causing issues is when the last OOB data read
was from the start of a bad block where the markers are not 0xFF,
and the caller wishes to write new OOB data at the beginning of
another block. In this scenario the caller would provide OOB data,
but nand_fill_oob() would skip the bad block marker bytes in
oob_poi before copying the OOB data provided by the caller.
This means that when the OOB data is written back to NAND,
the block is inadvertently marked as bad without the caller knowing.
This has been witnessed when using YAFFS2 where tags are stored
in the OOB.

This patch changes the code so that oob_poi is always initialised
to 0xFF to make sure no left over data is inadvertently written
back to OOB data.

The comment above is for the linux kernel, but the same is valid for barebox
and CPUs writing the OOB date controlled in software (like the Samsung
S3C2440 does).

Signed-off-by: Adam Thomson <adam.thomson at alcatel-lucent.com>
Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---

diff --git a/drivers/mtd/nand/nand_write.c b/drivers/mtd/nand/nand_write.c
index 89dc47b..376d2a9 100644
--- a/drivers/mtd/nand/nand_write.c
+++ b/drivers/mtd/nand/nand_write.c
@@ -303,9 +303,9 @@ int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 	    (chip->pagebuf << chip->page_shift) < (to + ops->len))
 		chip->pagebuf = -1;
 
-	/* If we're not given explicit OOB data, let it be 0xFF */
-	if (likely(!oob))
-		memset(chip->oob_poi, 0xff, mtd->oobsize);
+	/* Initialize to all 0xFF, to avoid the possibility of
+	   left over OOB data from a previous OOB read. */
+	memset(chip->oob_poi, 0xff, mtd->oobsize);
 
 	while(1) {
 		int bytes = mtd->writesize;


-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-5121-206917-5128 |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From T.Gamez at phytec.de  Wed May 25 08:39:59 2011
From: T.Gamez at phytec.de (Teresa Gamez)
Date: Wed, 25 May 2011 14:39:59 +0200
Subject: [PATCH] phyCORE-i.MX27: Keep frequency multiplier enabled to
	be able to do a warmstart
In-Reply-To: <201011251752.42159.jbe@pengutronix.de>
References: <201011251752.42159.jbe@pengutronix.de>
Message-ID: <1306327199.22033.168.camel@lws-gamez>

Are there any reasons why this patch was not added to the barebox?
It works fine for us.

Teresa 

Am Donnerstag, den 25.11.2010, 17:52 +0100 schrieb Juergen Beisert:
> commit 7d25a0552dd3a4b65412ae1cbf8f9ca8a88b5d27
> Author: Juergen Beisert <jbe at pengutronix.de>
> Date:   Thu Nov 25 17:49:11 2010 +0100
> 
>     Keep frequency multiplier enabled to be able to do a warmstart
>     
>     The wachtdog's reset does only reset the ARM core, not the whole silicon.
>     But the PLLs seems to do some strange things: It seems they switch back to
>     the low frequency reference when the watchdog barks. But in the case the
>     frequency multiplier is off (not used due to 26 MHz reference usage) the
>     machine stops, because the PLLs are stopping due to the lack of a reference
>     frequency. As the power on reset will set the FPM_EN bit again, a power cycle
>     brings the machine back to life.
>     By keeping the frequency multiplier enabled, also a warmstart triggered by the
>     watchdog can restart the machine now.
>     
>     Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
> 
> diff --git a/arch/arm/boards/pcm038/pll.h b/arch/arm/boards/pcm038/pll.h
> index 13a7989..15b94cf 100644
> --- a/arch/arm/boards/pcm038/pll.h
> +++ b/arch/arm/boards/pcm038/pll.h
> @@ -36,6 +36,7 @@
>  		CSCR_MCU_SEL | /* 26 MHz reference */ \
>  		CSCR_ARM_DIV(0) | /* CPU runs at MPLL/3 clock */ \
>  		CSCR_AHB_DIV(1) | /* AHB runs at MPLL/6 clock */ \
> +		CSCR_FPM_EN | \
>  		CSCR_SPEN |		\
>  		CSCR_MPEN)
>  
> @@ -51,6 +52,7 @@
>  		CSCR_ARM_SRC_MPLL | /* use main MPLL clock */ \
>  		CSCR_ARM_DIV(0) | /* CPU run at full MPLL clock */ \
>  		CSCR_AHB_DIV(1) | /* AHB runs at MPLL/6 clock */ \
> +		CSCR_FPM_EN | /* do not disable it! */ \
>  		CSCR_SPEN |		\
>  		CSCR_MPEN)
>  
> 




From jacmet at sunsite.dk  Thu May 26 04:02:57 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Thu, 26 May 2011 10:02:57 +0200
Subject: [PATCH] Fix sandbox ./barebox --help by reverting 6b082cfe (fix
	printf warnings)
In-Reply-To: <1305408544-29710-1-git-send-email-jacmet@sunsite.dk> (Peter
	Korsgaard's message of "Sat, 14 May 2011 23:29:04 +0200")
References: <1305408544-29710-1-git-send-email-jacmet@sunsite.dk>
Message-ID: <87ei3lriry.fsf@macbook.be.48ers.dk>

>>>>> "Peter" == Peter Korsgaard <jacmet at sunsite.dk> writes:

 Peter> While getting rid of all the format(barebox_printf) warnings was nice,
 Peter> it caused the printf calls in arch/sandbox/os/common.c to get directed
 Peter> to the barebox versions rather than the libc ones causing a crash:

 Peter> E.G. before this revert:
 Peter> nm -a barebox|grep -w printf
 Peter> 0000000000404fa3 T print

 Peter> And after:
 Peter> nm -a barebox|grep -w printf
 Peter> U printf@@GLIBC_2.2.5

 Peter> Signed-off-by: Peter Korsgaard <jacmet at sunsite.dk>

Ping?

 Peter> ---
 Peter>  include/stdio.h |    5 -----
 Peter>  1 files changed, 0 insertions(+), 5 deletions(-)

 Peter> diff --git a/include/stdio.h b/include/stdio.h
 Peter> index 9b1f161..c824764 100644
 Peter> --- a/include/stdio.h
 Peter> +++ b/include/stdio.h
 Peter> @@ -8,9 +8,6 @@
 Peter>   * STDIO based functions (can always be used)
 Peter>   */
 
 Peter> -#define ORIG_printf	printf
 Peter> -#undef printf
 Peter> -
 Peter>  /* serial stuff */
 Peter>  void	serial_printf(const char *fmt, ...) __attribute__ ((format(printf, 1, 2)));
 
 Peter> @@ -63,6 +60,4 @@ int	fputc(int file, const char c);
 Peter>  int	ftstc(int file);
 Peter>  int	fgetc(int file);
 
 Peter> -#define printf			ORIG_printf
 Peter> -
 Peter>  #endif /* __STDIO_H */
 Peter> -- 
 Peter> 1.7.4.4

-- 
Bye, Peter Korsgaard


From jbe at pengutronix.de  Thu May 26 15:39:12 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 26 May 2011 21:39:12 +0200
Subject: [Patch/master] pr_warn() must be pr_warning() instead
Message-ID: <201105262139.12927.jbe@pengutronix.de>

Fixing the following warning and error message:
[...]
drivers/mci/mci-core.c: In function 'mci_card_probe':
drivers/mci/mci-core.c:1195:3: warning: implicit declaration of function 'pr_warn'
[...]
drivers/built-in.o: In function `mci_card_probe':
/home/jb/work/Pengutronix/barebox-development/barebox-git/drivers/mci/mci-core.c:1195: undefined reference to `pr_warn'

diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index a06c997..79c5e82 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -1192,7 +1192,7 @@ static int mci_card_probe(struct device_d *mci_dev)
 	/* reset the card */
 	rc = mci_go_idle(mci_dev);
 	if (rc) {
-		pr_warn("Cannot reset the SD/MMC card\n");
+		pr_warning("Cannot reset the SD/MMC card\n");
 		goto on_error;
 	}

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-5121-206917-5128 |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From u.kleine-koenig at pengutronix.de  Sat May 28 15:29:30 2011
From: u.kleine-koenig at pengutronix.de (Uwe =?iso-8859-1?Q?Kleine-K=F6nig?=)
Date: Sat, 28 May 2011 21:29:30 +0200
Subject: [Patch/master] pr_warn() must be pr_warning() instead
In-Reply-To: <201105262139.12927.jbe@pengutronix.de>
References: <201105262139.12927.jbe@pengutronix.de>
Message-ID: <20110528192930.GM9907@pengutronix.de>

On Thu, May 26, 2011 at 09:39:12PM +0200, Juergen Beisert wrote:
> Fixing the following warning and error message:
> [...]
> drivers/mci/mci-core.c: In function 'mci_card_probe':
> drivers/mci/mci-core.c:1195:3: warning: implicit declaration of function 'pr_warn'
> [...]
> drivers/built-in.o: In function `mci_card_probe':
> /home/jb/work/Pengutronix/barebox-development/barebox-git/drivers/mci/mci-core.c:1195: undefined reference to `pr_warn'
> 
> diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
> index a06c997..79c5e82 100644
> --- a/drivers/mci/mci-core.c
> +++ b/drivers/mci/mci-core.c
> @@ -1192,7 +1192,7 @@ static int mci_card_probe(struct device_d *mci_dev)
>  	/* reset the card */
>  	rc = mci_go_idle(mci_dev);
>  	if (rc) {
> -		pr_warn("Cannot reset the SD/MMC card\n");
> +		pr_warning("Cannot reset the SD/MMC card\n");
The kernel has
#define pr_warn pr_warning

Maybe barebox should get that, too?

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |


From boaz.bd at wellsense-tech.com  Sun May 29 02:08:58 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Sun, 29 May 2011 09:08:58 +0300
Subject: iMX35 3stack framebuffer problem
In-Reply-To: <20110308071058.GB22012@jasper.tkos.co.il>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F8A2@SBS2008.wellsense.local>
	<201103081635.29082.marc@cpdesign.com.au>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F8A4@SBS2008.wellsense.local>
	<20110308071058.GB22012@jasper.tkos.co.il>
Message-ID: <4DE1E2FA.1090907@wellsense-tech.com>

Hi,

Revisiting the issue below, it there a convinient way
to use the FB in barebox without creating a flicker on the LCD in the 
transition
from Barebox to the kernel?

Thanks,

Boaz.

On 03/08/11 09:10, Baruch Siach wrote:
> Hi Boaz,
>
> On Tue, Mar 08, 2011 at 09:03:55AM +0200, Boaz Ben-David wrote:
>> Yes, I am using the freescale kernel unfotunately.
>> Do you know of some way to fix this (a patch for the freescale kernel
>> maybe)?
> A simple way to check whether this is the problems is to just disable the
> framebuffer in the kernel build, and make sure that you can boot again.
>
> Then, the fix for this problem is to move the request_irq() call to the end of
> the .probe routine.
>
> You should not expect any kind of support from Freescale for their released
> Linux kernels.
>
> baruch
>
>> On Tue, 2011-03-08 at 16:35 +1100, Marc Reilly wrote:
>>> On Tuesday, March 08, 2011 03:35:10 am Boaz Ben-David wrote:
>>>> Hi,
>>>>
>>>> When using the iMX35 freescale 3stack we are having some issues with the FB
>>>> driver. On device boot we enable the fb using "fb0.enable=1" and then try
>>>> to boot the kernel from nand. The problem is that after the kernel is
>>>> loaded to RAM and extracted the board hangs. If we do not init the fb0
>>>> device but simply boot the kernel it works fine. Trying "fb0.enable=0"
>>>> before booting also did not help.
>>>> Did anyone encounter this issue yet or are we doing something wrong?
>>> Are you using the freescale kernel? It doesn't handle loading the IPU driver
>>> if the IPU has been enabled previously.. (an IRQ fires before all the driver
>>> structures have been initialized and crashes)
>>>
>>> Cheers,
>>> Marc


-- 


*Boaz Ben-David*
R&D Engineer

	

cid:image001.jpg at 01CBF829.06DE9870

*Tel:*+972.2.6470.709

	

*Mob:*+972.54.678.1511**

	

*Email**: *boaz.bd at wellsense-tech.com

	

www.themapsystem.com 
<redir.aspx?C=e6361e2526464b699e255e33ea5cfebb&URL=http%3a%2f%2fwww.themapsystem.com%2f>

cid:image002.gif at 01CBF829.06DE9870 Please consider the impact on the 
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From baruch at tkos.co.il  Sun May 29 02:33:51 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Sun, 29 May 2011 09:33:51 +0300
Subject: iMX35 3stack framebuffer problem
In-Reply-To: <4DE1E2FA.1090907@wellsense-tech.com>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F8A2@SBS2008.wellsense.local>
	<201103081635.29082.marc@cpdesign.com.au>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F8A4@SBS2008.wellsense.local>
	<20110308071058.GB22012@jasper.tkos.co.il>
	<4DE1E2FA.1090907@wellsense-tech.com>
Message-ID: <20110529063350.GB32378@jasper.tkos.co.il>

Hi Boaz,

On Sun, May 29, 2011 at 09:08:58AM +0300, Boaz Ben-David wrote:
> Revisiting the issue below, it there a convinient way
> to use the FB in barebox without creating a flicker on the LCD in
> the transition from Barebox to the kernel?

Probably not, at the moment.

One big problem (not the only one) is that the mx3fb driver uses DMA to 
transfer the display image from the system RAM to the LCD. The ARM booting 
document, however, requires the bootloader to "quiesce all DMA capable 
devices" (Documentation/arm/Booting).

The best you can achieve (assuming you have designed your hardware correctly) 
is to blank your LCD using a GPIO just before booting the kernel, and then 
switch this GPIO again just after painting your logo from the newly boot 
kernel.

baruch

> On 03/08/11 09:10, Baruch Siach wrote:
> >Hi Boaz,
> >
> >On Tue, Mar 08, 2011 at 09:03:55AM +0200, Boaz Ben-David wrote:
> >>Yes, I am using the freescale kernel unfotunately.
> >>Do you know of some way to fix this (a patch for the freescale kernel
> >>maybe)?
> >A simple way to check whether this is the problems is to just disable the
> >framebuffer in the kernel build, and make sure that you can boot again.
> >
> >Then, the fix for this problem is to move the request_irq() call to the end of
> >the .probe routine.
> >
> >You should not expect any kind of support from Freescale for their released
> >Linux kernels.
> >
> >baruch
> >
> >>On Tue, 2011-03-08 at 16:35 +1100, Marc Reilly wrote:
> >>>On Tuesday, March 08, 2011 03:35:10 am Boaz Ben-David wrote:
> >>>>Hi,
> >>>>
> >>>>When using the iMX35 freescale 3stack we are having some issues with the FB
> >>>>driver. On device boot we enable the fb using "fb0.enable=1" and then try
> >>>>to boot the kernel from nand. The problem is that after the kernel is
> >>>>loaded to RAM and extracted the board hangs. If we do not init the fb0
> >>>>device but simply boot the kernel it works fine. Trying "fb0.enable=0"
> >>>>before booting also did not help.
> >>>>Did anyone encounter this issue yet or are we doing something wrong?
> >>>Are you using the freescale kernel? It doesn't handle loading the IPU driver
> >>>if the IPU has been enabled previously.. (an IRQ fires before all the driver
> >>>structures have been initialized and crashes)
> >>>
> >>>Cheers,
> >>>Marc

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From boaz.bd at wellsense-tech.com  Sun May 29 03:14:27 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Sun, 29 May 2011 10:14:27 +0300
Subject: iMX35 3stack framebuffer problem
In-Reply-To: <20110529063350.GB32378@jasper.tkos.co.il>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F8A2@SBS2008.wellsense.local>
	<201103081635.29082.marc@cpdesign.com.au>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F8A4@SBS2008.wellsense.local>
	<20110308071058.GB22012@jasper.tkos.co.il>
	<4DE1E2FA.1090907@wellsense-tech.com>
	<20110529063350.GB32378@jasper.tkos.co.il>
Message-ID: <4DE1F253.4050504@wellsense-tech.com>

Thanks,

I think I will have to be creative on this.
The only GPIO I can use is the same as the LCD contrast pin. I think I 
need to
start it as a GPIO, put 0 on it and after the FB is inited mux it back 
to LCD contrast function,  if that is possible.

Boaz.

On 05/29/11 09:33, Baruch Siach wrote:
> Hi Boaz,
>
> On Sun, May 29, 2011 at 09:08:58AM +0300, Boaz Ben-David wrote:
>> Revisiting the issue below, it there a convinient way
>> to use the FB in barebox without creating a flicker on the LCD in
>> the transition from Barebox to the kernel?
> Probably not, at the moment.
>
> One big problem (not the only one) is that the mx3fb driver uses DMA to
> transfer the display image from the system RAM to the LCD. The ARM booting
> document, however, requires the bootloader to "quiesce all DMA capable
> devices" (Documentation/arm/Booting).
>
> The best you can achieve (assuming you have designed your hardware correctly)
> is to blank your LCD using a GPIO just before booting the kernel, and then
> switch this GPIO again just after painting your logo from the newly boot
> kernel.
>
> baruch
>
>> On 03/08/11 09:10, Baruch Siach wrote:
>>> Hi Boaz,
>>>
>>> On Tue, Mar 08, 2011 at 09:03:55AM +0200, Boaz Ben-David wrote:
>>>> Yes, I am using the freescale kernel unfotunately.
>>>> Do you know of some way to fix this (a patch for the freescale kernel
>>>> maybe)?
>>> A simple way to check whether this is the problems is to just disable the
>>> framebuffer in the kernel build, and make sure that you can boot again.
>>>
>>> Then, the fix for this problem is to move the request_irq() call to the end of
>>> the .probe routine.
>>>
>>> You should not expect any kind of support from Freescale for their released
>>> Linux kernels.
>>>
>>> baruch
>>>
>>>> On Tue, 2011-03-08 at 16:35 +1100, Marc Reilly wrote:
>>>>> On Tuesday, March 08, 2011 03:35:10 am Boaz Ben-David wrote:
>>>>>> Hi,
>>>>>>
>>>>>> When using the iMX35 freescale 3stack we are having some issues with the FB
>>>>>> driver. On device boot we enable the fb using "fb0.enable=1" and then try
>>>>>> to boot the kernel from nand. The problem is that after the kernel is
>>>>>> loaded to RAM and extracted the board hangs. If we do not init the fb0
>>>>>> device but simply boot the kernel it works fine. Trying "fb0.enable=0"
>>>>>> before booting also did not help.
>>>>>> Did anyone encounter this issue yet or are we doing something wrong?
>>>>> Are you using the freescale kernel? It doesn't handle loading the IPU driver
>>>>> if the IPU has been enabled previously.. (an IRQ fires before all the driver
>>>>> structures have been initialized and crashes)
>>>>>
>>>>> Cheers,
>>>>> Marc


-- 


*Boaz Ben-David*
R&D Engineer

	

cid:image001.jpg at 01CBF829.06DE9870

*Tel:*+972.2.6470.709

	

*Mob:*+972.54.678.1511**

	

*Email**: *boaz.bd at wellsense-tech.com

	

www.themapsystem.com 
<redir.aspx?C=e6361e2526464b699e255e33ea5cfebb&URL=http%3a%2f%2fwww.themapsystem.com%2f>

cid:image002.gif at 01CBF829.06DE9870 Please consider the impact on the 
environment before printing this e-mail and/or the attachment(s).


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From baruch at tkos.co.il  Sun May 29 03:28:03 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Sun, 29 May 2011 10:28:03 +0300
Subject: iMX35 3stack framebuffer problem
In-Reply-To: <4DE1F253.4050504@wellsense-tech.com>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F8A2@SBS2008.wellsense.local>
	<201103081635.29082.marc@cpdesign.com.au>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F8A4@SBS2008.wellsense.local>
	<20110308071058.GB22012@jasper.tkos.co.il>
	<4DE1E2FA.1090907@wellsense-tech.com>
	<20110529063350.GB32378@jasper.tkos.co.il>
	<4DE1F253.4050504@wellsense-tech.com>
Message-ID: <20110529072803.GE32378@jasper.tkos.co.il>

Hi Boaz,

On Sun, May 29, 2011 at 10:14:27AM +0300, Boaz Ben-David wrote:
> I think I will have to be creative on this.
> The only GPIO I can use is the same as the LCD contrast pin.

You probably mean LCD brightness here. If so, this is probably the best you 
can do if you can't power down the LCD completely with a GPIO.

> I think I need to
> start it as a GPIO, put 0 on it and after the FB is inited mux it
> back to LCD contrast function,  if that is possible.

Ugly, but definitely possible. You have the .enable callback for that.

baruch

> On 05/29/11 09:33, Baruch Siach wrote:
> >Hi Boaz,
> >
> >On Sun, May 29, 2011 at 09:08:58AM +0300, Boaz Ben-David wrote:
> >>Revisiting the issue below, it there a convinient way
> >>to use the FB in barebox without creating a flicker on the LCD in
> >>the transition from Barebox to the kernel?
> >Probably not, at the moment.
> >
> >One big problem (not the only one) is that the mx3fb driver uses DMA to
> >transfer the display image from the system RAM to the LCD. The ARM booting
> >document, however, requires the bootloader to "quiesce all DMA capable
> >devices" (Documentation/arm/Booting).
> >
> >The best you can achieve (assuming you have designed your hardware correctly)
> >is to blank your LCD using a GPIO just before booting the kernel, and then
> >switch this GPIO again just after painting your logo from the newly boot
> >kernel.
> >
> >baruch
> >
> >>On 03/08/11 09:10, Baruch Siach wrote:
> >>>Hi Boaz,
> >>>
> >>>On Tue, Mar 08, 2011 at 09:03:55AM +0200, Boaz Ben-David wrote:
> >>>>Yes, I am using the freescale kernel unfotunately.
> >>>>Do you know of some way to fix this (a patch for the freescale kernel
> >>>>maybe)?
> >>>A simple way to check whether this is the problems is to just disable the
> >>>framebuffer in the kernel build, and make sure that you can boot again.
> >>>
> >>>Then, the fix for this problem is to move the request_irq() call to the end of
> >>>the .probe routine.
> >>>
> >>>You should not expect any kind of support from Freescale for their released
> >>>Linux kernels.
> >>>
> >>>baruch
> >>>
> >>>>On Tue, 2011-03-08 at 16:35 +1100, Marc Reilly wrote:
> >>>>>On Tuesday, March 08, 2011 03:35:10 am Boaz Ben-David wrote:
> >>>>>>Hi,
> >>>>>>
> >>>>>>When using the iMX35 freescale 3stack we are having some issues with the FB
> >>>>>>driver. On device boot we enable the fb using "fb0.enable=1" and then try
> >>>>>>to boot the kernel from nand. The problem is that after the kernel is
> >>>>>>loaded to RAM and extracted the board hangs. If we do not init the fb0
> >>>>>>device but simply boot the kernel it works fine. Trying "fb0.enable=0"
> >>>>>>before booting also did not help.
> >>>>>>Did anyone encounter this issue yet or are we doing something wrong?
> >>>>>Are you using the freescale kernel? It doesn't handle loading the IPU driver
> >>>>>if the IPU has been enabled previously.. (an IRQ fires before all the driver
> >>>>>structures have been initialized and crashes)
> >>>>>
> >>>>>Cheers,
> >>>>>Marc
> 
> 
> -- 
> 
> 
> *Boaz Ben-David*
> R&D Engineer
> 
> 	
> 
> cid:image001.jpg at 01CBF829.06DE9870
> 
> *Tel:*+972.2.6470.709
> 
> 	
> 
> *Mob:*+972.54.678.1511**
> 
> 	
> 
> *Email**: *boaz.bd at wellsense-tech.com
> 
> 	
> 
> www.themapsystem.com <redir.aspx?C=e6361e2526464b699e255e33ea5cfebb&URL=http%3a%2f%2fwww.themapsystem.com%2f>
> 
> cid:image002.gif at 01CBF829.06DE9870 Please consider the impact on the
> environment before printing this e-mail and/or the attachment(s).
> 
> 

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From carlo.caione at gmail.com  Mon May 30 04:31:44 2011
From: carlo.caione at gmail.com (Carlo Caione)
Date: Mon, 30 May 2011 10:31:44 +0200
Subject: guruplug/dreamplug porting
Message-ID: <4DE355F0.1020502@gmail.com>

Hi,
I was wondering how feasible it is to port barebox on guruplug/dreamplug 
marvell-based boards.
The most noticeable problem for me is the initialization part in asm 
(I'm not an asm junkie). Is it possible to reuse the arm code (asm) in 
the current version of barebox or at least to take it from u-boot 
sources (according to uboot conf files, uboot uses the arm926ejs as CPU 
for the guruplug)?

Regards,

--
Carlo Caione


From plagnioj at jcrosoft.com  Mon May 30 05:51:18 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Mon, 30 May 2011 11:51:18 +0200
Subject: guruplug/dreamplug porting
In-Reply-To: <4DE355F0.1020502@gmail.com>
References: <4DE355F0.1020502@gmail.com>
Message-ID: <20110530095118.GG12442@game.jcrosoft.org>

On 10:31 Mon 30 May     , Carlo Caione wrote:
> Hi,
> I was wondering how feasible it is to port barebox on
> guruplug/dreamplug marvell-based boards.
> The most noticeable problem for me is the initialization part in asm
> (I'm not an asm junkie).
so write it in c

a lots of us do so, Sascha or I mostly write the lowlevel init in C now
as example the generic lowlevel arm init is done in C now

I did it recently on at91rm9200
and will update the at91sam9 to c also
> Is it possible to reuse the arm code (asm)
mostly you can copy it but you will have to put it in the right section
> in the current version of barebox or at least to take it from u-boot
> sources (according to uboot conf files, uboot uses the arm926ejs as
> CPU for the guruplug)?
First do more simple, use barebox as a second stage start by u-boot and then
write the lowloevel init

in barebox we do not have one lowlevel init per armvx but one generic one
so normally the only assembly you could have to write is the
board_lowlevel_init which can be written in C anynway

Best Regards,
J.


From vikram186 at gmail.com  Mon May 30 17:21:45 2011
From: vikram186 at gmail.com (Vikram Narayanan)
Date: Tue, 31 May 2011 02:51:45 +0530
Subject: [PATCH] Helper function clocksource_khz2mult in clock.c
Message-ID: <1306790505.10548.6.camel@ubuntu.ubuntu-domain>

Hi,

Won't this helper function be a good one to add in the clock.c code?
Taken from the kernel file "include/linux/clocksource.h"
If it can be, please find below the patch.
---
diff --git a/common/clock.c b/common/clock.c
index 15df0ab..b07b449 100644
--- a/common/clock.c
+++ b/common/clock.c
@@ -57,6 +57,31 @@ uint64_t get_time_ns(void)
 EXPORT_SYMBOL(get_time_ns);
 
 /**
+ * clocksource_khz2mult - calculates mult from khz and shift
+ * @khz:		Clocksource frequency in KHz
+ * @shift_constant:	Clocksource shift factor
+ *
+ * Helper functions that converts a khz counter frequency to a
timsource
+ * multiplier, given the clocksource shift value
+ */
+static inline u32 clocksource_khz2mult(u32 khz, u32 shift_constant)
+{
+	/*  khz = cyc/(Million ns)
+	 *  mult/2^shift  = ns/cyc
+	 *  mult = ns/cyc * 2^shift
+	 *  mult = 1Million/khz * 2^shift
+	 *  mult = 1000000 * 2^shift / khz
+	 *  mult = (1000000<<shift) / khz
+	 */
+	u64 tmp = ((u64)1000000) << shift_constant;
+
+	tmp += khz/2; /* round for do_div */
+	do_div(tmp, khz);
+
+	return (u32)tmp;
+}
+
+/**
  * clocksource_hz2mult - calculates mult from hz and shift
  * @hz:                 Clocksource frequency in Hz
  * @shift_constant:     Clocksource shift factor

-
Thanks,
Vikram




From h.feurstein at gmail.com  Tue May 31 10:57:37 2011
From: h.feurstein at gmail.com (Hubert Feurstein)
Date: Tue, 31 May 2011 16:57:37 +0200
Subject: [PATCH] mci-core: add missing newline in debug message
Message-ID: <1306853857-23946-1-git-send-email-h.feurstein@gmail.com>

Signed-off-by: Hubert Feurstein <h.feurstein at gmail.com>
---
 drivers/mci/mci-core.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index a06c997..1c16cf1 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -957,7 +957,7 @@ static int mci_sd_write(struct device_d *disk_dev, uint64_t sector_start,
 	struct mci *mci = GET_MCI_DATA(mci_dev);
 	int rc;
 
-	pr_debug("%s: Write %u block(s), starting at %u",
+	pr_debug("%s: Write %u block(s), starting at %u\n",
 		__func__, sector_count, (unsigned)sector_start);
 
 	if (mci->write_bl_len != 512) {
-- 
1.7.1



From h.feurstein at gmail.com  Tue May 31 11:02:50 2011
From: h.feurstein at gmail.com (Hubert Feurstein)
Date: Tue, 31 May 2011 17:02:50 +0200
Subject: [PATCH] mci: add Atmel AT91 MCI driver
Message-ID: <1306854170-24064-1-git-send-email-h.feurstein@gmail.com>

The driver supports push and pull transfers.
Tested on at91sam9m10 SoC.

Signed-off-by: Hubert Feurstein <h.feurstein at gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre at atmel.com>
Cc: Patrice Vilchez <patrice.vilchez at atmel.com>
---
 arch/arm/mach-at91/at91sam9g45_devices.c   |   92 +++++
 arch/arm/mach-at91/include/mach/at91_mci.h |  121 +++++++
 arch/arm/mach-at91/include/mach/board.h    |   10 +
 drivers/mci/Kconfig                        |    7 +
 drivers/mci/Makefile                       |    1 +
 drivers/mci/atmel_mci.c                    |  519 ++++++++++++++++++++++++++++
 6 files changed, 750 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-at91/include/mach/at91_mci.h
 create mode 100644 drivers/mci/atmel_mci.c

diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index ddb005a..950d083 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -10,6 +10,7 @@
  *
  */
 #include <common.h>
+#include <sizes.h>
 #include <asm/armlinux.h>
 #include <asm/hardware.h>
 #include <mach/at91_pmc.h>
@@ -240,3 +241,94 @@ void at91_register_uart(unsigned id, unsigned pins)
 	}
 
 }
+
+#if defined(CONFIG_MCI_ATMEL)
+static struct device_d mci0_device = {
+	.id	  = 0,
+	.name     = "atmel_mci",
+	.map_base = AT91SAM9G45_BASE_MCI0,
+	.size     = SZ_16K,
+};
+
+static struct device_d mci1_device = {
+	.id	  = 1,
+	.name     = "atmel_mci",
+	.map_base = AT91SAM9G45_BASE_MCI1,
+	.size     = SZ_16K,
+};
+
+/* Consider only one slot : slot 0 */
+void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
+{
+
+	if (!data)
+		return;
+
+	/* Must have at least one usable slot */
+	if (!data->bus_width)
+		return;
+
+	/* input/irq */
+	if (data->detect_pin) {
+		at91_set_gpio_input(data->detect_pin, 1);
+		at91_set_deglitch(data->detect_pin, 1);
+	}
+	if (data->wp_pin)
+		at91_set_gpio_input(data->wp_pin, 1);
+
+	if (mmc_id == 0) {		/* MCI0 */
+
+		/* CLK */
+		at91_set_A_periph(AT91_PIN_PA0, 0);
+
+		/* CMD */
+		at91_set_A_periph(AT91_PIN_PA1, 1);
+
+		/* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
+		at91_set_A_periph(AT91_PIN_PA2, 1);
+		if (data->bus_width == 4) {
+			at91_set_A_periph(AT91_PIN_PA3, 1);
+			at91_set_A_periph(AT91_PIN_PA4, 1);
+			at91_set_A_periph(AT91_PIN_PA5, 1);
+			if (data->bus_width == 8) {
+				at91_set_A_periph(AT91_PIN_PA6, 1);
+				at91_set_A_periph(AT91_PIN_PA7, 1);
+				at91_set_A_periph(AT91_PIN_PA8, 1);
+				at91_set_A_periph(AT91_PIN_PA9, 1);
+			}
+		}
+
+		mci0_device.platform_data = data;
+		at91_clock_associate("mci0_clk", &mci0_device, "mci_clk");
+		register_device(&mci0_device);
+
+	} else {			/* MCI1 */
+		/* CLK */
+		at91_set_A_periph(AT91_PIN_PA31, 0);
+
+		/* CMD */
+		at91_set_A_periph(AT91_PIN_PA22, 1);
+
+		/* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
+		at91_set_A_periph(AT91_PIN_PA23, 1);
+		if (data->bus_width == 4) {
+			at91_set_A_periph(AT91_PIN_PA24, 1);
+			at91_set_A_periph(AT91_PIN_PA25, 1);
+			at91_set_A_periph(AT91_PIN_PA26, 1);
+			if (data->bus_width == 8) {
+				at91_set_A_periph(AT91_PIN_PA27, 1);
+				at91_set_A_periph(AT91_PIN_PA28, 1);
+				at91_set_A_periph(AT91_PIN_PA29, 1);
+				at91_set_A_periph(AT91_PIN_PA30, 1);
+			}
+		}
+
+		mci1_device.platform_data = data;
+		at91_clock_associate("mci1_clk", &mci1_device, "mci_clk");
+		register_device(&mci1_device);
+	}
+}
+#else
+void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data) {}
+#endif
+
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
new file mode 100644
index 0000000..6aa50aa
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_mci.h
@@ -0,0 +1,121 @@
+/*
+ * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_mci.h]
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * MultiMedia Card Interface (MCI) registers.
+ * Based on AT91RM9200 datasheet revision F.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_MCI_H
+#define AT91_MCI_H
+
+#define AT91_MCI_CR		0x00		/* Control Register */
+#define		AT91_MCI_MCIEN		(1 <<  0)	/* Multi-Media Interface Enable */
+#define		AT91_MCI_MCIDIS		(1 <<  1)	/* Multi-Media Interface Disable */
+#define		AT91_MCI_PWSEN		(1 <<  2)	/* Power Save Mode Enable */
+#define		AT91_MCI_PWSDIS		(1 <<  3)	/* Power Save Mode Disable */
+#define		AT91_MCI_SWRST		(1 <<  7)	/* Software Reset */
+
+#define AT91_MCI_MR		0x04		/* Mode Register */
+#define		AT91_MCI_CLKDIV		(0xff  <<  0)	/* Clock Divider */
+#define		AT91_MCI_PWSDIV		(7     <<  8)	/* Power Saving Divider */
+#define		AT91_MCI_RDPROOF	(1     << 11)	/* Read Proof Enable [SAM926[03] only] */
+#define		AT91_MCI_WRPROOF	(1     << 12)	/* Write Proof Enable [SAM926[03] only] */
+#define		AT91_MCI_PDCFBYTE	(1     << 13)	/* PDC Force Byte Transfer [SAM926[03] only] */
+#define		AT91_MCI_PDCPADV	(1     << 14)	/* PDC Padding Value */
+#define		AT91_MCI_PDCMODE	(1     << 15)	/* PDC-orientated Mode */
+#define		AT91_MCI_BLKLEN		(0xfff << 18)	/* Data Block Length */
+
+#define AT91_MCI_DTOR		0x08		/* Data Timeout Register */
+#define		AT91_MCI_DTOCYC		(0xf << 0)	/* Data Timeout Cycle Number */
+#define		AT91_MCI_DTOMUL		(7   << 4)	/* Data Timeout Multiplier */
+#define		AT91_MCI_DTOMUL_1		(0 <<  4)
+#define		AT91_MCI_DTOMUL_16		(1 <<  4)
+#define		AT91_MCI_DTOMUL_128		(2 <<  4)
+#define		AT91_MCI_DTOMUL_256		(3 <<  4)
+#define		AT91_MCI_DTOMUL_1K		(4 <<  4)
+#define		AT91_MCI_DTOMUL_4K		(5 <<  4)
+#define		AT91_MCI_DTOMUL_64K		(6 <<  4)
+#define		AT91_MCI_DTOMUL_1M		(7 <<  4)
+
+#define AT91_MCI_SDCR		0x0c		/* SD Card Register */
+#define		AT91_MCI_SDCSEL		(3 << 0)	/* SD Card Selector */
+#define		AT91_MCI_SDCBUS		(3 << 6)	/* 1-bit, 4-bit, or 8-bit bus */
+#define			AT91_MCI_SDCBUS_1BIT	(0 << 6)	/* 1-bit bus */
+#define			AT91_MCI_SDCBUS_4BIT	(2 << 6)	/* 4-bit bus */
+#define			AT91_MCI_SDCBUS_8BIT	(3 << 6)	/* 4-bit bus */
+
+#define AT91_MCI_ARGR		0x10		/* Argument Register */
+
+#define AT91_MCI_CMDR		0x14		/* Command Register */
+#define		AT91_MCI_CMDNB		(0x3f << 0)	/* Command Number */
+#define		AT91_MCI_RSPTYP		(3    << 6)	/* Response Type */
+#define			AT91_MCI_RSPTYP_NONE	(0 <<  6)
+#define			AT91_MCI_RSPTYP_48	(1 <<  6)
+#define			AT91_MCI_RSPTYP_136	(2 <<  6)
+#define			AT91_MCI_RSPTYP_R1B	(3 <<  6)
+#define		AT91_MCI_SPCMD		(7    << 8)	/* Special Command */
+#define			AT91_MCI_SPCMD_NONE	(0 <<  8)
+#define			AT91_MCI_SPCMD_INIT	(1 <<  8)
+#define			AT91_MCI_SPCMD_SYNC	(2 <<  8)
+#define			AT91_MCI_SPCMD_ICMD	(4 <<  8)
+#define			AT91_MCI_SPCMD_IRESP	(5 <<  8)
+#define		AT91_MCI_OPDCMD		(1 << 11)	/* Open Drain Command */
+#define		AT91_MCI_MAXLAT		(1 << 12)	/* Max Latency for Command to Response */
+#define		AT91_MCI_TRCMD		(3 << 16)	/* Transfer Command */
+#define			AT91_MCI_TRCMD_NONE	(0 << 16)
+#define			AT91_MCI_TRCMD_START	(1 << 16)
+#define			AT91_MCI_TRCMD_STOP	(2 << 16)
+#define		AT91_MCI_TRDIR		(1 << 18)	/* Transfer Direction */
+#define			AT91_MCI_TRDIR_RX	(1 << 18)	/* Read Transfer Direction */
+#define			AT91_MCI_TRDIR_TX	(0 << 18)	/* Write Transfer Direction */
+#define		AT91_MCI_TRTYP		(3 << 19)	/* Transfer Type */
+#define			AT91_MCI_TRTYP_BLOCK	(0 << 19)
+#define			AT91_MCI_TRTYP_MULTIPLE	(1 << 19)
+#define			AT91_MCI_TRTYP_STREAM	(2 << 19)
+#define			AT91_MCI_TRTYP_SDIO_BYTE	(4 << 19)
+#define			AT91_MCI_TRTYP_SDIO_BLOCK	(5 << 19)
+
+#define AT91_MCI_BLKR		0x18		/* Block Register */
+#define		AT91_MCI_BLKR_BCNT(n)	((0xffff & (n)) << 0)	/* Block count */
+#define		AT91_MCI_BLKR_BLKLEN(n)	((0xffff & (n)) << 16)	/* Block length */
+
+#define AT91_MCI_RSPR(n)	(0x20 + ((n) * 4))	/* Response Registers 0-3 */
+#define AT91_MCR_RDR		0x30		/* Receive Data Register */
+#define AT91_MCR_TDR		0x34		/* Transmit Data Register */
+
+#define AT91_MCI_SR		0x40		/* Status Register */
+#define		AT91_MCI_CMDRDY		(1 <<  0)	/* Command Ready */
+#define		AT91_MCI_RXRDY		(1 <<  1)	/* Receiver Ready */
+#define		AT91_MCI_TXRDY		(1 <<  2)	/* Transmit Ready */
+#define		AT91_MCI_BLKE		(1 <<  3)	/* Data Block Ended */
+#define		AT91_MCI_DTIP		(1 <<  4)	/* Data Transfer in Progress */
+#define		AT91_MCI_NOTBUSY	(1 <<  5)	/* Data Not Busy */
+#define		AT91_MCI_ENDRX		(1 <<  6)	/* End of RX Buffer */
+#define		AT91_MCI_ENDTX		(1 <<  7)	/* End fo TX Buffer */
+#define		AT91_MCI_SDIOIRQA	(1 <<  8)	/* SDIO Interrupt for Slot A */
+#define		AT91_MCI_SDIOIRQB	(1 <<  9)	/* SDIO Interrupt for Slot B */
+#define		AT91_MCI_RXBUFF		(1 << 14)	/* RX Buffer Full */
+#define		AT91_MCI_TXBUFE		(1 << 15)	/* TX Buffer Empty */
+#define		AT91_MCI_RINDE		(1 << 16)	/* Response Index Error */
+#define		AT91_MCI_RDIRE		(1 << 17)	/* Response Direction Error */
+#define		AT91_MCI_RCRCE		(1 << 18)	/* Response CRC Error */
+#define		AT91_MCI_RENDE		(1 << 19)	/* Response End Bit Error */
+#define		AT91_MCI_RTOE		(1 << 20)	/* Response Time-out Error */
+#define		AT91_MCI_DCRCE		(1 << 21)	/* Data CRC Error */
+#define		AT91_MCI_DTOE		(1 << 22)	/* Data Time-out Error */
+#define		AT91_MCI_OVRE		(1 << 30)	/* Overrun */
+#define		AT91_MCI_UNRE		(1 << 31)	/* Underrun */
+
+#define AT91_MCI_IER		0x44		/* Interrupt Enable Register */
+#define AT91_MCI_IDR		0x48		/* Interrupt Disable Register */
+#define AT91_MCI_IMR		0x4c		/* Interrupt Mask Register */
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 1ab05ad..89c1746 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -63,4 +63,14 @@ void at91_add_device_sdram(u32 size);
 #define ATMEL_UART_RI	0x20
 
 void at91_register_uart(unsigned id, unsigned pins);
+
+/* Multimedia Card Interface */
+struct atmel_mci_platform_data {
+	unsigned bus_width;
+	unsigned host_caps; /* MCI_MODE_* from mci.h */
+	unsigned detect_pin;
+	unsigned wp_pin;
+};
+
+void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data);
 #endif
diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index 5d8adbd..7b71b99 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -73,4 +73,11 @@ config MCI_OMAP_HSMMC
 	  Enable this entry to add support to read and write SD cards on a
 	  OMAP4 based system.
 
+config MCI_ATMEL
+	bool "ATMEL (AT91)"
+	depends on ARCH_AT91
+	help
+	  Enable this entry to add support to read and write SD cards on a
+	  Atmel AT91.
+
 endif
diff --git a/drivers/mci/Makefile b/drivers/mci/Makefile
index 2bb9a93..4fc0046 100644
--- a/drivers/mci/Makefile
+++ b/drivers/mci/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_MCI_S3C) += s3c.o
 obj-$(CONFIG_MCI_IMX) += imx.o
 obj-$(CONFIG_MCI_IMX_ESDHC) += imx-esdhc.o
 obj-$(CONFIG_MCI_OMAP_HSMMC) += omap_hsmmc.o
+obj-$(CONFIG_MCI_ATMEL) += atmel_mci.o
diff --git a/drivers/mci/atmel_mci.c b/drivers/mci/atmel_mci.c
new file mode 100644
index 0000000..62e2822
--- /dev/null
+++ b/drivers/mci/atmel_mci.c
@@ -0,0 +1,519 @@
+/*
+ * Atmel AT91 MCI driver
+ *
+ * Copyright (C) 2011 Hubert Feurstein <h.feurstein at gmail.com>
+ *
+ * heavily based on imx.c by:
+ * Copyright (C) 2009 Ilya Yanok, <yanok at emcraft.com>
+ * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer at pengutronix.de>
+ * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa at pikron.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * 
+ */
+
+/* #define DEBUG */
+
+#include <common.h>
+#include <init.h>
+#include <mci.h>
+#include <errno.h>
+#include <clock.h>
+#include <gpio.h>
+#include <asm/io.h>
+#include <mach/board.h>
+#include <linux/clk.h>
+
+#include <mach/at91_mci.h>
+
+/*
+ * Structure for struct SoC access.
+ * Names starting with '_' are fillers.
+ */
+struct atmel_mci_regs {
+	/*	reg	Offset */
+	u32	cr;	/* 0x00 */
+	u32	mr;	/* 0x04 */
+	u32	dtor;	/* 0x08 */
+	u32	sdcr;	/* 0x0c */
+	u32	argr;	/* 0x10 */
+	u32	cmdr;	/* 0x14 */
+	u32	blkr;	/* 0x18 */
+	u32	_1c;	/* 0x1c */
+	u32	rspr;	/* 0x20 */
+	u32	rspr1;	/* 0x24 */
+	u32	rspr2;	/* 0x28 */
+	u32	rspr3;	/* 0x2c */
+	u32	rdr;	/* 0x30 */
+	u32	tdr;	/* 0x34 */
+	u32	_38;	/* 0x38 */
+	u32	_3c;	/* 0x3c */
+	u32	sr;	/* 0x40 */
+	u32	ier;	/* 0x44 */
+	u32	idr;	/* 0x48 */
+	u32	imr;	/* 0x4c */
+};
+
+struct atmel_mci_host {
+	struct mci_host mci;
+	struct atmel_mci_regs volatile __iomem *base;
+	struct device_d *hw_dev;
+	struct clk *clk;
+	
+	u32 datasize;
+	struct mci_cmd *cmd;
+	struct mci_data *data;
+};
+
+#define to_mci_host(mci)	container_of(mci, struct atmel_mci_host, mci)
+
+#define STATUS_ERROR_MASK	(AT91_MCI_RINDE  \
+				| AT91_MCI_RDIRE \
+				| AT91_MCI_RCRCE \
+				| AT91_MCI_RENDE \
+				| AT91_MCI_RTOE  \
+				| AT91_MCI_DCRCE \
+				| AT91_MCI_DTOE  \
+				| AT91_MCI_OVRE  \
+				| AT91_MCI_UNRE)
+
+static void atmel_mci_reset(struct atmel_mci_host *host)
+{
+	writel(AT91_MCI_SWRST | AT91_MCI_MCIDIS, &host->base->cr);
+	writel(0x5f, &host->base->dtor);
+	writel(~0UL, &host->base->idr);
+}
+
+static void atmel_set_clk_rate(struct atmel_mci_host *host, unsigned int clk_ios)
+{
+	unsigned int divider;
+	unsigned int clk_in = clk_get_rate(host->clk);
+
+	if (clk_ios > 0)
+		divider = (clk_in / clk_ios) / 2 - 1;
+
+	if (divider > 255 || clk_ios == 0)
+		divider = 255;
+
+	pr_debug("atmel_set_clk_rate: clkIn=%d clkIos=%d divider=%d\n",
+		clk_in, clk_ios, divider);
+
+	writel(((AT91_MCI_CLKDIV & divider)
+		| AT91_MCI_RDPROOF
+		| AT91_MCI_WRPROOF), &host->base->mr);
+}
+
+static int atmel_poll_status(struct atmel_mci_host *host, u32 mask)
+{
+	u32 stat;
+	uint64_t start = get_time_ns();
+
+	do {
+		stat = readl(&host->base->sr);
+		if (stat & STATUS_ERROR_MASK)
+			return stat;
+		if (is_timeout(start, SECOND))
+			return AT91_MCI_RTOE | stat;
+		if (stat & mask)
+			return 0;
+	} while (1);
+}
+
+static int atmel_pull(struct atmel_mci_host *host, void *_buf, int bytes)
+{
+	unsigned int stat;
+	u32 *buf = _buf;
+
+	while (bytes > 3) {
+		stat = atmel_poll_status(host, AT91_MCI_RXRDY);
+		if (stat)
+			return stat;
+		
+		*buf++ = readl(&host->base->rdr);
+		bytes -= 4;
+	}
+
+	if (bytes) {
+		u8 *b = (u8 *)buf;
+		u32 tmp;
+
+		stat = atmel_poll_status(host, AT91_MCI_RXRDY);
+		if (stat)
+			return stat;
+		
+		tmp = readl(&host->base->rdr);
+		memcpy(b, &tmp, bytes);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_MCI_WRITE
+static int atmel_push(struct atmel_mci_host *host, const void *_buf, int bytes)
+{
+	unsigned int stat;
+	const u32 *buf = _buf;
+
+	while (bytes > 3) {
+		stat = atmel_poll_status(host, AT91_MCI_TXRDY);
+		if (stat)
+			return stat;
+		
+		writel(*buf++, &host->base->tdr);
+		bytes -= 4;
+	}
+
+	if (bytes) {
+		const u8 *b = (u8 *)buf;
+		u32 tmp;
+
+		stat = atmel_poll_status(host, AT91_MCI_TXRDY);
+		if (stat)
+			return stat;
+
+		memcpy(&tmp, b, bytes);
+		writel(tmp, &host->base->tdr);
+	}
+
+	stat = atmel_poll_status(host, AT91_MCI_TXRDY);
+	if (stat)
+		return stat;
+
+	return 0;
+}
+#endif /* CONFIG_MCI_WRITE */
+
+static int atmel_transfer_data(struct atmel_mci_host *host)
+{
+	struct mci_data *data = host->data;
+	int stat;
+	unsigned long length;
+
+	length = data->blocks * data->blocksize;
+	host->datasize = 0;
+
+	if (data->flags & MMC_DATA_READ) {
+		stat = atmel_pull(host, data->dest, length);
+		if (stat)
+			return stat;
+
+		stat = atmel_poll_status(host, AT91_MCI_NOTBUSY);
+		if (stat)
+			return stat;
+
+		host->datasize += length;
+	} else {
+#ifdef CONFIG_MCI_WRITE
+		stat = atmel_push(host, (const void *)(data->src), length);
+		if (stat)
+			return stat;
+
+		host->datasize += length;
+		stat = atmel_poll_status(host, AT91_MCI_NOTBUSY);
+		if (stat)
+			return stat;
+#endif /* CONFIG_MCI_WRITE */
+	}
+	return 0;
+}
+
+static void atmel_finish_request(struct atmel_mci_host *host)
+{
+	host->cmd = NULL;
+	host->data = NULL;
+}
+
+static int atmel_finish_data(struct atmel_mci_host *host, unsigned int stat)
+{
+	int data_error = 0;
+
+	if (stat & STATUS_ERROR_MASK) {
+		pr_err("atmel_mci: request failed (status=0x%08x)\n",
+				stat);
+		if (stat & AT91_MCI_DCRCE) {
+			data_error = -EILSEQ;
+		} else if (stat & (AT91_MCI_RTOE | AT91_MCI_DTOE)) {
+			data_error = -ETIMEDOUT;
+		} else {
+			data_error = -EIO;
+		}
+	}
+
+	host->data = NULL;
+
+	return data_error;
+}
+
+static void atmel_setup_data(struct atmel_mci_host *host, struct mci_data *data)
+{
+	unsigned int nob = data->blocks;
+	unsigned int blksz = data->blocksize;
+	unsigned int datasize = nob * blksz;
+
+	BUG_ON(data->blocksize & 3);
+	BUG_ON(nob == 0);
+	
+	host->data = data;
+
+	pr_debug("atmel_setup_data: nob=%d blksz=%d\n", nob, blksz);
+	
+	writel(AT91_MCI_BLKR_BCNT(nob)
+		| AT91_MCI_BLKR_BLKLEN(blksz), &host->base->blkr);
+
+	host->datasize = datasize;
+}
+
+static int atmel_read_response(struct atmel_mci_host *host, unsigned int stat)
+{
+	struct mci_cmd *cmd = host->cmd;
+	int i;
+	u32 *resp = (u32 *)cmd->response;
+
+	if (!cmd)
+		return 0;
+
+	if (stat & (AT91_MCI_RTOE | AT91_MCI_DTOE)) {
+		pr_err("atmel_mci: command/data timeout\n");
+		return -ETIMEDOUT;
+	} else if ((stat & AT91_MCI_RCRCE) && (cmd->resp_type & MMC_RSP_CRC)) {
+		pr_err("atmel_mci: cmd crc error\n");
+		return -EILSEQ;
+	}
+
+	if (cmd->resp_type & MMC_RSP_PRESENT) {
+		if (cmd->resp_type & MMC_RSP_136) {
+			for (i = 0; i < 4; i++)
+				resp[i] =readl(&host->base->rspr);
+		} else {
+			resp[0] = readl(&host->base->rspr);
+		}
+	}
+
+	return 0;
+}
+
+static int atmel_cmd_done(struct atmel_mci_host *host, unsigned int stat)
+{
+	int datastat;
+	int ret;
+
+	ret = atmel_read_response(host, stat);
+
+	if (ret) {
+		atmel_finish_request(host);
+		return ret;
+	}
+
+	if (!host->data) {
+		atmel_finish_request(host);
+		return 0;
+	}
+
+	datastat = atmel_transfer_data(host);
+	ret = atmel_finish_data(host, datastat);
+	atmel_finish_request(host);
+	return ret;
+}
+
+static int atmel_start_cmd(struct atmel_mci_host *host, struct mci_cmd *cmd,
+		unsigned int cmdat)
+{
+	unsigned flags = 0;
+	unsigned cmdval = 0;
+	
+	if (host->cmd != NULL)
+		pr_err("atmel_mci: error!\n");
+
+	if ((readl(&host->base->sr) & AT91_MCI_CMDRDY) == 0) {
+		pr_err("atmel_mci: mci not ready!\n");
+		return -EBUSY;
+	}
+
+	host->cmd = cmd;
+	cmdval = AT91_MCI_CMDNB & cmd->cmdidx;
+	
+	switch (cmd->resp_type) {
+	case MMC_RSP_R1: /* short CRC, OPCODE */
+	case MMC_RSP_R1b:/* short CRC, OPCODE, BUSY */
+		flags |= AT91_MCI_RSPTYP_48;
+		break;
+	case MMC_RSP_R2: /* long 136 bit + CRC */
+		flags |= AT91_MCI_RSPTYP_136;
+		break;
+	case MMC_RSP_R3: /* short */
+		flags |= AT91_MCI_RSPTYP_48;
+		break;
+	case MMC_RSP_NONE:
+		flags |= AT91_MCI_RSPTYP_NONE;
+		break;
+	default:
+		pr_err("atmel_mci: unhandled response type 0x%x\n",
+				cmd->resp_type);
+		return -EINVAL;
+	}
+	cmdval |= AT91_MCI_RSPTYP & flags;
+	cmdval |= cmdat & ~(AT91_MCI_CMDNB | AT91_MCI_RSPTYP);
+	
+	writel(cmd->cmdarg, &host->base->argr);
+	writel(cmdval, &host->base->cmdr);
+
+	return 0;
+}
+
+/** init the host interface */
+static int mci_reset(struct mci_host* mci, struct device_d* mci_dev)
+{
+	int ret;
+	struct atmel_mci_host* host = to_mci_host(mci);
+	struct atmel_mci_platform_data* pd = host->hw_dev->platform_data;
+
+	ret = gpio_get_value(pd->detect_pin);
+	pr_debug("atmel_mci: card %sdetected\n", ret != 0 ? "not " : "");
+	
+	if (pd->detect_pin && ret == 1)
+		return -ENODEV;
+		
+	clk_enable(host->clk);
+	atmel_mci_reset(host);
+	
+	return 0;
+}
+
+/** change host interface settings */
+static void mci_set_ios(struct mci_host* mci, struct device_d* mci_dev, unsigned bus_width, unsigned clock)
+{
+	struct atmel_mci_host* host = to_mci_host(mci);
+	
+	pr_debug("atmel_mci_set_ios: bus_width=%d clk=%d\n", bus_width, clock);
+
+	if (bus_width == 8)
+		writel(AT91_MCI_SDCBUS_8BIT, &host->base->sdcr);
+	if (bus_width == 4)
+		writel(AT91_MCI_SDCBUS_4BIT, &host->base->sdcr);
+	else
+		writel(AT91_MCI_SDCBUS_1BIT, &host->base->sdcr);
+
+	if (clock) {
+		atmel_set_clk_rate(host, clock);
+		writel(AT91_MCI_MCIEN, &host->base->cr);
+	} else {
+		writel(AT91_MCI_MCIDIS, &host->base->cr);
+	}
+
+	return;
+}
+
+/** handle a command */
+static int mci_request(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
+{
+	struct atmel_mci_host *host = to_mci_host(mci);
+	u32 stat, cmdat = 0;
+	int ret;
+
+	if (cmd->resp_type != MMC_RSP_NONE)
+		cmdat |= AT91_MCI_MAXLAT;
+
+	if (data) {
+		atmel_setup_data(host, data);
+
+		cmdat |= AT91_MCI_TRCMD_START | AT91_MCI_TRTYP_MULTIPLE;
+
+		if (data->flags & MMC_DATA_READ)
+			cmdat |= AT91_MCI_TRDIR_RX;
+	}
+
+	if ((ret = atmel_start_cmd(host, cmd, cmdat))) {
+		atmel_finish_request(host);
+		return ret;
+	}
+
+	stat = atmel_poll_status(host, AT91_MCI_CMDRDY);
+	return atmel_cmd_done(host, stat);
+}
+	
+
+#ifdef CONFIG_MCI_INFO
+static void mci_info(struct device_d *mci_dev)
+{
+	struct atmel_mci_host *host = mci_dev->priv;
+	struct atmel_mci_platform_data *pd = host->hw_dev->platform_data;
+
+	printf("  Bus data width: %d bit\n", host->mci.bus_width);
+
+	printf("  Bus frequency: %u Hz\n", host->mci.clock);
+	printf("  Frequency limits: ");
+	if (host->mci.f_min == 0)
+		printf("no lower limit ");
+	else
+		printf("%u Hz lower limit ", host->mci.f_min);
+	if (host->mci.f_max == 0)
+		printf("- no upper limit");
+	else
+		printf("- %u Hz upper limit", host->mci.f_max);
+
+	printf("\n  Card detection support: %s\n",
+		pd->detect_pin != 0 ? "yes" : "no");
+
+}
+#endif /* CONFIG_MCI_INFO */
+
+static int mci_probe(struct device_d *hw_dev)
+{
+	unsigned long clk_rate;
+	struct atmel_mci_host *host;
+	struct atmel_mci_platform_data *pd = hw_dev->platform_data;
+
+	if (pd == NULL) {
+		pr_err("atmel_mci: missing platform data\n");
+		return -EINVAL;
+	}
+
+	host = xzalloc(sizeof(*host));
+	host->mci.send_cmd = mci_request;
+	host->mci.set_ios = mci_set_ios;
+	host->mci.init = mci_reset;
+	
+	host->mci.host_caps = pd->host_caps;
+	if (pd->bus_width == 4)
+		host->mci.host_caps |= MMC_MODE_4BIT;
+	else if (pd->bus_width == 8)
+		host->mci.host_caps |= MMC_MODE_8BIT;
+	
+	host->base = (struct atmel_mci_regs *)hw_dev->map_base;
+	host->hw_dev = hw_dev;
+	hw_dev->priv = host;
+	host->clk = clk_get(hw_dev, "mci_clk");
+	if (host->clk == NULL) {
+		pr_err("atmel_mci: no mci_clk\n");
+		return -EINVAL;
+	}
+
+	clk_rate = clk_get_rate(host->clk);
+
+	host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+
+	host->mci.f_min = clk_rate >> 9;
+	host->mci.f_max = clk_rate >> 1;
+
+	mci_register(&host->mci);
+
+	return 0;
+}
+
+static struct driver_d atmel_mci_driver = {
+        .name  = "atmel_mci",
+        .probe = mci_probe,
+#ifdef CONFIG_MCI_INFO
+	.info = mci_info,
+#endif
+};
+
+static int atmel_mci_init_driver(void)
+{
+        register_driver(&atmel_mci_driver);
+        return 0;
+}
+
+device_initcall(atmel_mci_init_driver);
-- 
1.7.1



From dirk.behme at googlemail.com  Tue May 31 11:32:27 2011
From: dirk.behme at googlemail.com (Dirk Behme)
Date: Tue, 31 May 2011 17:32:27 +0200
Subject: [Patch/master v2] pr_warn() must be pr_warning()
Message-ID: <1306855947-4725-1-git-send-email-dirk.behme@gmail.com>

From: Dirk Behme <dirk.behme at googlemail.com>

Fix the warning/error:

drivers/mci/mci-core.c: In function 'mci_card_probe':
drivers/mci/mci-core.c:1195: warning: implicit declaration of function 'pr_warn'
...
drivers/built-in.o: In function `mci_card_probe':
mc13892.c:(.text.mci_card_probe+0x68): undefined reference to `pr_warn'

Signed-off-by: Dirk Behme <dirk.behme at googlemail.com>

---

Note: This replaces the patch

http://lists.infradead.org/pipermail/barebox/2011-May/003549.html

by using the kernel macro as proposed by Uwe Kleine-Koenig.

 include/linux/barebox-wrapper.h |    2 ++
 1 file changed, 2 insertions(+)

Index: barebox.git/include/linux/barebox-wrapper.h
===================================================================
--- barebox.git.orig/include/linux/barebox-wrapper.h
+++ barebox.git/include/linux/barebox-wrapper.h
@@ -20,6 +20,8 @@
 
 #define printk			printf
 
+#define pr_warn			pr_warning
+
 #define __init
 
 #define MODULE_AUTHOR(x)


