From plagnioj at jcrosoft.com  Wed Feb  2 01:23:23 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 2 Feb 2011 07:23:23 +0100
Subject: kconfig: update
Message-ID: <20110202062323.GH26656@game.jcrosoft.org>

Hi Sascha,

please pull
The following changes since commit a3463cc12877f6527624972c190a80ebb787a604:

  lib/decompress_unlzo: use fill and full to read and write data (2011-01-28 19:05:00 +0100)

are available in the git repository at:
  git://git.jcrosoft.org/barebox.git kconfig

Jean-Christophe PLAGNIOL-VILLARD (1):
      kconfig: syn with linux kernel v2.6.38-rc3

 Kconfig                                    |   11 +
 scripts/kconfig/Makefile                   |   87 +++--
 scripts/kconfig/conf.c                     |   19 +-
 scripts/kconfig/confdata.c                 |  159 ++++----
 scripts/kconfig/expr.c                     |   44 ++-
 scripts/kconfig/expr.h                     |    7 +-
 scripts/kconfig/gconf.c                    |   20 +-
 scripts/kconfig/gconf.glade                |    1 -
 scripts/kconfig/kxgettext.c                |   15 +-
 scripts/kconfig/lex.zconf.c_shipped        |    7 +-
 scripts/kconfig/lkc.h                      |   16 +-
 scripts/kconfig/lkc_proto.h                |    3 +
 scripts/kconfig/lxdialog/check-lxdialog.sh |    2 +
 scripts/kconfig/mconf.c                    |   64 ++--
 scripts/kconfig/menu.c                     |   53 ++-
 scripts/kconfig/nconf.c                    |  495 +++++++++++------------
 scripts/kconfig/nconf.gui.c                |   22 +-
 scripts/kconfig/nconf.h                    |    3 +-
 scripts/kconfig/qconf.cc                   |  174 +++++----
 scripts/kconfig/qconf.h                    |   76 ++--
 scripts/kconfig/streamline_config.pl       |   43 ++-
 scripts/kconfig/symbol.c                   |   59 +++-
 scripts/kconfig/util.c                     |    7 +-
 scripts/kconfig/zconf.gperf                |    1 +
 scripts/kconfig/zconf.hash.c_shipped       |  122 +++---
 scripts/kconfig/zconf.l                    |    7 +-
 scripts/kconfig/zconf.tab.c_shipped        |  603 +++++++++++++++-------------
 scripts/kconfig/zconf.y                    |   37 ++-
 28 files changed, 1217 insertions(+), 940 deletions(-)
 create mode 100644 Kconfig

Best Regards,
J.


From plagnioj at jcrosoft.com  Wed Feb  2 01:24:54 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed,  2 Feb 2011 07:24:54 +0100
Subject: [to be tested] [PATCH] at91: switch to CLKDEV_LOOKUP
Message-ID: <1296627894-1612-1-git-send-email-plagnioj@jcrosoft.com>

with this first commit we do not change the clock naming convention so
does not need to switcht the AVR32 yet

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre at atmel.com>
Cc: Patrice Vilchez <patrice.vilchez at atmel.com>
---
 arch/arm/Kconfig                         |    1 +
 arch/arm/mach-at91/at572d940hf.c         |   84 ++++++++++++++++---------
 arch/arm/mach-at91/at91cap9.c            |   76 +++++++++++++----------
 arch/arm/mach-at91/at91rm9200.c          |   66 ++++++++++++--------
 arch/arm/mach-at91/at91sam9260.c         |   66 ++++++++++++--------
 arch/arm/mach-at91/at91sam9261.c         |   68 +++++++++++++--------
 arch/arm/mach-at91/at91sam9263.c         |   68 ++++++++++++--------
 arch/arm/mach-at91/at91sam9g45.c         |   99 +++++++++++++++--------------
 arch/arm/mach-at91/at91sam9rl.c          |   62 +++++++++++--------
 arch/arm/mach-at91/clock.c               |   60 ++++--------------
 arch/arm/mach-at91/clock.h               |    7 +-
 arch/arm/mach-at91/generic.h             |   12 +++-
 arch/arm/mach-at91/include/mach/clkdev.h |    7 ++
 13 files changed, 383 insertions(+), 293 deletions(-)
 create mode 100644 arch/arm/mach-at91/include/mach/clkdev.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165..3d88948 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -278,6 +278,7 @@ config ARCH_AT91
 	bool "Atmel AT91"
 	select ARCH_REQUIRE_GPIOLIB
 	select HAVE_CLK
+	select CLKDEV_LOOKUP
 	help
 	  This enables support for systems based on the Atmel AT91RM9200,
 	  AT91SAM9 and AT91CAP9 processors.
diff --git a/arch/arm/mach-at91/at572d940hf.c b/arch/arm/mach-at91/at572d940hf.c
index a6b9c68..1cd9e0d 100644
--- a/arch/arm/mach-at91/at572d940hf.c
+++ b/arch/arm/mach-at91/at572d940hf.c
@@ -56,122 +56,98 @@ static struct map_desc at572d940hf_io_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk pioA_clk = {
-	.name		= "pioA_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_PIOA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioB_clk = {
-	.name		= "pioB_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_PIOB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioC_clk = {
-	.name		= "pioC_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_PIOC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-	.name		= "macb_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_EMAC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc_clk = {
-	.name		= "mci_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_MCI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk udc_clk = {
-	.name		= "udc_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_UDP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi0_clk = {
-	.name		= "twi0_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_TWI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi0_clk = {
-	.name		= "spi0_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_SPI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi1_clk = {
-	.name		= "spi1_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_SPI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc0_clk = {
-	.name		= "ssc0_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_SSC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc1_clk = {
-	.name		= "ssc1_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_SSC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc2_clk = {
-	.name		= "ssc2_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_SSC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc0_clk = {
-	.name		= "tc0_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_TC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc1_clk = {
-	.name		= "tc1_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_TC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc2_clk = {
-	.name		= "tc2_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_TC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ohci_clk = {
-	.name		= "ohci_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_UHP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc3_clk = {
-	.name		= "ssc3_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_SSC3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi1_clk = {
-	.name		= "twi1_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_TWI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk can0_clk = {
-	.name		= "can0_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_CAN0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk can1_clk = {
-	.name		= "can1_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_CAN1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mAgicV_clk = {
-	.name		= "mAgicV_clk",
 	.pmc_mask	= 1 << AT572D940HF_ID_MSIRQ0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
@@ -205,56 +181,91 @@ static struct clk *periph_clocks[] __initdata = {
 	/* irq0 .. irq2 */
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+	CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+	CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+	CLKDEV_CON_ID("macb_clk", &macb_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("mci_clk", &mmc_clk),
+	CLKDEV_CON_ID("udc_clk", &udc_clk),
+	CLKDEV_CON_ID("twi0_clk", &twi0_clk),
+	CLKDEV_CON_ID("spi0_clk", &spi0_clk),
+	CLKDEV_CON_ID("spi1_clk", &spi1_clk),
+	CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+	CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+	CLKDEV_CON_ID("ssc2_clk", &ssc2_clk),
+	CLKDEV_CON_ID("tc0_clk", &tc0_clk),
+	CLKDEV_CON_ID("tc1_clk", &tc1_clk),
+	CLKDEV_CON_ID("tc2_clk", &tc2_clk),
+	CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+	CLKDEV_CON_ID("ssc3_clk", &ssc3_clk),
+	CLKDEV_CON_ID("twi1_clk", &twi1_clk),
+	CLKDEV_CON_ID("can0_clk", &can0_clk),
+	CLKDEV_CON_ID("can1_clk", &can1_clk),
+	CLKDEV_CON_ID("mAgicV_clk", &mAgicV_clk),
+};
+
 /*
  * The five programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 static struct clk pck2 = {
-	.name		= "pck2",
 	.pmc_mask	= AT91_PMC_PCK2,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 2,
 };
 static struct clk pck3 = {
-	.name		= "pck3",
 	.pmc_mask	= AT91_PMC_PCK3,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 3,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+	CLKDEV_CON_ID("pck2", &pck2),
+	CLKDEV_CON_ID("pck3", &pck3),
+};
+
 static struct clk mAgicV_mem_clk = {
-	.name		= "mAgicV_mem_clk",
 	.pmc_mask	= AT91_PMC_PCK4,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 4,
 };
 
+static struct clk_lookup mAgicV_mem_clk_lookup =
+	CLKDEV_CON_ID("mAgicV_mem_clk", &mAgicV_mem_clk);
+
 /* HClocks */
 static struct clk hck0 = {
-	.name		= "hck0",
 	.pmc_mask	= AT91_PMC_HCK0,
 	.type		= CLK_TYPE_SYSTEM,
 	.id		= 0,
 };
 static struct clk hck1 = {
-	.name		= "hck1",
 	.pmc_mask	= AT91_PMC_HCK1,
 	.type		= CLK_TYPE_SYSTEM,
 	.id		= 1,
 };
 
+static struct clk_lookup hc_clocks_lookups[] = {
+	CLKDEV_CON_ID("hck0", &hck0),
+	CLKDEV_CON_ID("hck1", &hck1),
+};
+
 static void __init at572d940hf_register_clocks(void)
 {
 	int i;
@@ -262,14 +273,25 @@ static void __init at572d940hf_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
 	clk_register(&pck0);
 	clk_register(&pck1);
 	clk_register(&pck2);
 	clk_register(&pck3);
+
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
+
 	clk_register(&mAgicV_mem_clk);
+	clkdev_add(&mAgicV_mem_clk_lookup);
 
 	clk_register(&hck0);
 	clk_register(&hck1);
+
+	clkdev_add_table(hc_clocks_lookups,
+			 ARRAY_SIZE(hc_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 7337617..af21ccd 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -50,142 +50,114 @@ static struct map_desc at91cap9_io_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk pioABCD_clk = {
-	.name		= "pioABCD_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_PIOABCD,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mpb0_clk = {
-	.name		= "mpb0_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_MPB0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mpb1_clk = {
-	.name		= "mpb1_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_MPB1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mpb2_clk = {
-	.name		= "mpb2_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_MPB2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mpb3_clk = {
-	.name		= "mpb3_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_MPB3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mpb4_clk = {
-	.name		= "mpb4_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_MPB4,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc0_clk = {
-	.name		= "mci0_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_MCI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc1_clk = {
-	.name		= "mci1_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_MCI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk can_clk = {
-	.name		= "can_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_CAN,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi_clk = {
-	.name		= "twi_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_TWI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi0_clk = {
-	.name		= "spi0_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_SPI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi1_clk = {
-	.name		= "spi1_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_SPI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc0_clk = {
-	.name		= "ssc0_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_SSC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc1_clk = {
-	.name		= "ssc1_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_SSC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ac97_clk = {
-	.name		= "ac97_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_AC97C,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tcb_clk = {
-	.name		= "tcb_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_TCB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pwm_clk = {
-	.name		= "pwm_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_PWMC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-	.name		= "macb_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_EMAC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk aestdes_clk = {
-	.name		= "aestdes_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_AESTDES,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk adc_clk = {
-	.name		= "adc_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_ADC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk isi_clk = {
-	.name		= "isi_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_ISI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk lcdc_clk = {
-	.name		= "lcdc_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_LCDC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk dma_clk = {
-	.name		= "dma_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_DMA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk udphs_clk = {
-	.name		= "udphs_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_UDPHS,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ohci_clk = {
-	.name		= "ohci_clk",
 	.pmc_mask	= 1 << AT91CAP9_ID_UHP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
@@ -222,35 +194,69 @@ static struct clk *periph_clocks[] __initdata = {
 	// irq0 .. irq1
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("pioABCD_clk", &pioABCD_clk),
+	CLKDEV_CON_ID("mpb0_clk", &mpb0_clk),
+	CLKDEV_CON_ID("mpb1_clk", &mpb1_clk),
+	CLKDEV_CON_ID("mpb2_clk", &mpb2_clk),
+	CLKDEV_CON_ID("mpb3_clk", &mpb3_clk),
+	CLKDEV_CON_ID("mpb4_clk", &mpb4_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("mci0_clk", &mmc0_clk),
+	CLKDEV_CON_ID("mci1_clk", &mmc1_clk),
+	CLKDEV_CON_ID("can_clk", &can_clk),
+	CLKDEV_CON_ID("twi_clk", &twi_clk),
+	CLKDEV_CON_ID("spi0_clk", &spi0_clk),
+	CLKDEV_CON_ID("spi1_clk", &spi1_clk),
+	CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+	CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+	CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+	CLKDEV_CON_ID("tcb_clk", &tcb_clk),
+	CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+	CLKDEV_CON_ID("macb_clk", &macb_clk),
+	CLKDEV_CON_ID("aestdes_clk", &aestdes_clk),
+	CLKDEV_CON_ID("adc_clk", &adc_clk),
+	CLKDEV_CON_ID("isi_clk", &isi_clk),
+	CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+	CLKDEV_CON_ID("dma_clk", &dma_clk),
+	CLKDEV_CON_ID("udphs_clk", &udphs_clk),
+	CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 static struct clk pck2 = {
-	.name		= "pck2",
 	.pmc_mask	= AT91_PMC_PCK2,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 2,
 };
 static struct clk pck3 = {
-	.name		= "pck3",
 	.pmc_mask	= AT91_PMC_PCK3,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 3,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+	CLKDEV_CON_ID("pck2", &pck2),
+	CLKDEV_CON_ID("pck3", &pck3),
+};
+
 static void __init at91cap9_register_clocks(void)
 {
 	int i;
@@ -258,10 +264,16 @@ static void __init at91cap9_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
 	clk_register(&pck0);
 	clk_register(&pck1);
 	clk_register(&pck2);
 	clk_register(&pck3);
+
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 2e9ecad..bd1e056 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -49,117 +49,94 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk udc_clk = {
-	.name		= "udc_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_UDP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ohci_clk = {
-	.name		= "ohci_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_UHP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ether_clk = {
-	.name		= "ether_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_EMAC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc_clk = {
-	.name		= "mci_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_MCI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi_clk = {
-	.name		= "twi_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_TWI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart3_clk = {
-	.name		= "usart3_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_US3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi_clk = {
-	.name		= "spi_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_SPI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioA_clk = {
-	.name		= "pioA_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_PIOA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioB_clk = {
-	.name		= "pioB_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_PIOB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioC_clk = {
-	.name		= "pioC_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_PIOC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioD_clk = {
-	.name		= "pioD_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc0_clk = {
-	.name		= "ssc0_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_SSC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc1_clk = {
-	.name		= "ssc1_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_SSC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc2_clk = {
-	.name		= "ssc2_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_SSC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc0_clk = {
-	.name		= "tc0_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_TC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc1_clk = {
-	.name		= "tc1_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_TC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc2_clk = {
-	.name		= "tc2_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_TC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc3_clk = {
-	.name		= "tc3_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_TC3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc4_clk = {
-	.name		= "tc4_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_TC4,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc5_clk = {
-	.name		= "tc5_clk",
 	.pmc_mask	= 1 << AT91RM9200_ID_TC5,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
@@ -191,35 +168,64 @@ static struct clk *periph_clocks[] __initdata = {
 	// irq0 .. irq6
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("udc_clk", &udc_clk),
+	CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+	CLKDEV_CON_ID("ether_clk", &ether_clk),
+	CLKDEV_CON_ID("mci_clk", &mmc_clk),
+	CLKDEV_CON_ID("twi_clk", &twi_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("usart3_clk", &usart3_clk),
+	CLKDEV_CON_ID("spi_clk", &spi_clk),
+	CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+	CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+	CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+	CLKDEV_CON_ID("pioD_clk", &pioD_clk),
+	CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+	CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+	CLKDEV_CON_ID("ssc2_clk", &ssc2_clk),
+	CLKDEV_CON_ID("tc0_clk", &tc0_clk),
+	CLKDEV_CON_ID("tc1_clk", &tc1_clk),
+	CLKDEV_CON_ID("tc2_clk", &tc2_clk),
+	CLKDEV_CON_ID("tc3_clk", &tc3_clk),
+	CLKDEV_CON_ID("tc4_clk", &tc4_clk),
+	CLKDEV_CON_ID("tc5_clk", &tc5_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 static struct clk pck2 = {
-	.name		= "pck2",
 	.pmc_mask	= AT91_PMC_PCK2,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 2,
 };
 static struct clk pck3 = {
-	.name		= "pck3",
 	.pmc_mask	= AT91_PMC_PCK3,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 3,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+	CLKDEV_CON_ID("pck2", &pck2),
+	CLKDEV_CON_ID("pck3", &pck3),
+};
+
 static void __init at91rm9200_register_clocks(void)
 {
 	int i;
@@ -227,10 +233,16 @@ static void __init at91rm9200_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
 	clk_register(&pck0);
 	clk_register(&pck1);
 	clk_register(&pck2);
 	clk_register(&pck3);
+
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 195208b..447879e 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -77,127 +77,102 @@ static struct map_desc at91sam9xe_sram_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk pioA_clk = {
-	.name		= "pioA_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_PIOA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioB_clk = {
-	.name		= "pioB_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_PIOB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioC_clk = {
-	.name		= "pioC_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_PIOC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk adc_clk = {
-	.name		= "adc_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_ADC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc_clk = {
-	.name		= "mci_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_MCI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk udc_clk = {
-	.name		= "udc_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_UDP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi_clk = {
-	.name		= "twi_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_TWI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi0_clk = {
-	.name		= "spi0_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_SPI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi1_clk = {
-	.name		= "spi1_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_SPI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc_clk = {
-	.name		= "ssc_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_SSC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc0_clk = {
-	.name		= "tc0_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_TC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc1_clk = {
-	.name		= "tc1_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_TC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc2_clk = {
-	.name		= "tc2_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_TC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ohci_clk = {
-	.name		= "ohci_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_UHP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-	.name		= "macb_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_EMAC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk isi_clk = {
-	.name		= "isi_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_ISI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart3_clk = {
-	.name		= "usart3_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_US3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart4_clk = {
-	.name		= "usart4_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_US4,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart5_clk = {
-	.name		= "usart5_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_US5,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc3_clk = {
-	.name		= "tc3_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_TC3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc4_clk = {
-	.name		= "tc4_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_TC4,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc5_clk = {
-	.name		= "tc5_clk",
 	.pmc_mask	= 1 << AT91SAM9260_ID_TC5,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
@@ -231,23 +206,54 @@ static struct clk *periph_clocks[] __initdata = {
 	// irq0 .. irq2
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+	CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+	CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+	CLKDEV_CON_ID("adc_clk", &adc_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("mci_clk", &mmc_clk),
+	CLKDEV_CON_ID("udc_clk", &udc_clk),
+	CLKDEV_CON_ID("twi_clk", &twi_clk),
+	CLKDEV_CON_ID("spi0_clk", &spi0_clk),
+	CLKDEV_CON_ID("spi1_clk", &spi1_clk),
+	CLKDEV_CON_ID("ssc_clk", &ssc_clk),
+	CLKDEV_CON_ID("tc0_clk", &tc0_clk),
+	CLKDEV_CON_ID("tc1_clk", &tc1_clk),
+	CLKDEV_CON_ID("tc2_clk", &tc2_clk),
+	CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+	CLKDEV_CON_ID("macb_clk", &macb_clk),
+	CLKDEV_CON_ID("isi_clk", &isi_clk),
+	CLKDEV_CON_ID("usart3_clk", &usart3_clk),
+	CLKDEV_CON_ID("usart4_clk", &usart4_clk),
+	CLKDEV_CON_ID("usart5_clk", &usart5_clk),
+	CLKDEV_CON_ID("tc3_clk", &tc3_clk),
+	CLKDEV_CON_ID("tc4_clk", &tc4_clk),
+	CLKDEV_CON_ID("tc5_clk", &tc5_clk),
+};
+
 /*
  * The two programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+};
+
 static void __init at91sam9260_register_clocks(void)
 {
 	int i;
@@ -255,8 +261,14 @@ static void __init at91sam9260_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
 	clk_register(&pck0);
 	clk_register(&pck1);
+
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index fcad886..10f4462 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -60,97 +60,78 @@ static struct map_desc at91sam9g10_sram_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk pioA_clk = {
-	.name		= "pioA_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_PIOA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioB_clk = {
-	.name		= "pioB_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_PIOB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioC_clk = {
-	.name		= "pioC_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_PIOC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc_clk = {
-	.name		= "mci_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_MCI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk udc_clk = {
-	.name		= "udc_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_UDP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi_clk = {
-	.name		= "twi_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_TWI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi0_clk = {
-	.name		= "spi0_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_SPI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi1_clk = {
-	.name		= "spi1_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_SPI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc0_clk = {
-	.name		= "ssc0_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_SSC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc1_clk = {
-	.name		= "ssc1_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_SSC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc2_clk = {
-	.name		= "ssc2_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_SSC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc0_clk = {
-	.name		= "tc0_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_TC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc1_clk = {
-	.name		= "tc1_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_TC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc2_clk = {
-	.name		= "tc2_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_TC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ohci_clk = {
-	.name		= "ohci_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_UHP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk lcdc_clk = {
-	.name		= "lcdc_clk",
 	.pmc_mask	= 1 << AT91SAM9261_ID_LCDC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
@@ -178,49 +159,77 @@ static struct clk *periph_clocks[] __initdata = {
 	// irq0 .. irq2
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+	CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+	CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("mci_clk", &mmc_clk),
+	CLKDEV_CON_ID("udc_clk", &udc_clk),
+	CLKDEV_CON_ID("twi_clk", &twi_clk),
+	CLKDEV_CON_ID("spi0_clk", &spi0_clk),
+	CLKDEV_CON_ID("spi1_clk", &spi1_clk),
+	CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+	CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+	CLKDEV_CON_ID("ssc2_clk", &ssc2_clk),
+	CLKDEV_CON_ID("tc0_clk", &tc0_clk),
+	CLKDEV_CON_ID("tc1_clk", &tc1_clk),
+	CLKDEV_CON_ID("tc2_clk", &tc2_clk),
+	CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+	CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 static struct clk pck2 = {
-	.name		= "pck2",
 	.pmc_mask	= AT91_PMC_PCK2,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 2,
 };
 static struct clk pck3 = {
-	.name		= "pck3",
 	.pmc_mask	= AT91_PMC_PCK3,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 3,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+	CLKDEV_CON_ID("pck2", &pck2),
+	CLKDEV_CON_ID("pck3", &pck3),
+};
+
 /* HClocks */
 static struct clk hck0 = {
-	.name		= "hck0",
 	.pmc_mask	= AT91_PMC_HCK0,
 	.type		= CLK_TYPE_SYSTEM,
 	.id		= 0,
 };
 static struct clk hck1 = {
-	.name		= "hck1",
 	.pmc_mask	= AT91_PMC_HCK1,
 	.type		= CLK_TYPE_SYSTEM,
 	.id		= 1,
 };
 
+static struct clk_lookup hc_clocks_lookups[] = {
+	CLKDEV_CON_ID("hck0", &hck0),
+	CLKDEV_CON_ID("hck1", &hck1),
+};
+
 static void __init at91sam9261_register_clocks(void)
 {
 	int i;
@@ -228,13 +237,22 @@ static void __init at91sam9261_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
 	clk_register(&pck0);
 	clk_register(&pck1);
 	clk_register(&pck2);
 	clk_register(&pck3);
 
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
+
 	clk_register(&hck0);
 	clk_register(&hck1);
+
+	clkdev_add_table(hc_clocks_lookups,
+			 ARRAY_SIZE(hc_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 249f900..20deb56 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -51,122 +51,98 @@ static struct map_desc at91sam9263_io_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk pioA_clk = {
-	.name		= "pioA_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_PIOA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioB_clk = {
-	.name		= "pioB_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_PIOB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioCDE_clk = {
-	.name		= "pioCDE_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_PIOCDE,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc0_clk = {
-	.name		= "mci0_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_MCI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc1_clk = {
-	.name		= "mci1_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_MCI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk can_clk = {
-	.name		= "can_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_CAN,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi_clk = {
-	.name		= "twi_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_TWI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi0_clk = {
-	.name		= "spi0_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_SPI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi1_clk = {
-	.name		= "spi1_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_SPI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc0_clk = {
-	.name		= "ssc0_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_SSC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc1_clk = {
-	.name		= "ssc1_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_SSC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ac97_clk = {
-	.name		= "ac97_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_AC97C,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tcb_clk = {
-	.name		= "tcb_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_TCB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pwm_clk = {
-	.name		= "pwm_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_PWMC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-	.name		= "macb_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_EMAC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk dma_clk = {
-	.name		= "dma_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_DMA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twodge_clk = {
-	.name		= "2dge_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_2DGE,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk udc_clk = {
-	.name		= "udc_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_UDP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk isi_clk = {
-	.name		= "isi_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_ISI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk lcdc_clk = {
-	.name		= "lcdc_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_LCDC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ohci_clk = {
-	.name		= "ohci_clk",
 	.pmc_mask	= 1 << AT91SAM9263_ID_UHP,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
@@ -199,35 +175,65 @@ static struct clk *periph_clocks[] __initdata = {
 	// irq0 .. irq1
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+	CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+	CLKDEV_CON_ID("pioCDE_clk", &pioCDE_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("mci0_clk", &mmc0_clk),
+	CLKDEV_CON_ID("mci1_clk", &mmc1_clk),
+	CLKDEV_CON_ID("can_clk", &can_clk),
+	CLKDEV_CON_ID("twi_clk", &twi_clk),
+	CLKDEV_CON_ID("spi0_clk", &spi0_clk),
+	CLKDEV_CON_ID("spi1_clk", &spi1_clk),
+	CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+	CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+	CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+	CLKDEV_CON_ID("tcb_clk", &tcb_clk),
+	CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+	CLKDEV_CON_ID("macb_clk", &macb_clk),
+	CLKDEV_CON_ID("dma_clk", &dma_clk),
+	CLKDEV_CON_ID("2dge_clk", &twodge_clk),
+	CLKDEV_CON_ID("udc_clkk", &udc_clk),
+	CLKDEV_CON_ID("isi_clk", &isi_clk),
+	CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+	CLKDEV_CON_ID("ohci_clk", &ohci_clk),
+};
+
 /*
  * The four programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 static struct clk pck2 = {
-	.name		= "pck2",
 	.pmc_mask	= AT91_PMC_PCK2,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 2,
 };
 static struct clk pck3 = {
-	.name		= "pck3",
 	.pmc_mask	= AT91_PMC_PCK3,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 3,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+	CLKDEV_CON_ID("pck2", &pck2),
+	CLKDEV_CON_ID("pck3", &pck3),
+};
+
 static void __init at91sam9263_register_clocks(void)
 {
 	int i;
@@ -235,10 +241,16 @@ static void __init at91sam9263_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
 	clk_register(&pck0);
 	clk_register(&pck1);
 	clk_register(&pck2);
 	clk_register(&pck3);
+
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index c67b47f..1f6a83d 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -47,159 +47,116 @@ static struct map_desc at91sam9g45_io_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk pioA_clk = {
-	.name		= "pioA_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_PIOA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioB_clk = {
-	.name		= "pioB_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_PIOB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioC_clk = {
-	.name		= "pioC_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_PIOC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioDE_clk = {
-	.name		= "pioDE_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_PIODE,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart3_clk = {
-	.name		= "usart3_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_US3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc0_clk = {
-	.name		= "mci0_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_MCI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi0_clk = {
-	.name		= "twi0_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_TWI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi1_clk = {
-	.name		= "twi1_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_TWI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi0_clk = {
-	.name		= "spi0_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_SPI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi1_clk = {
-	.name		= "spi1_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_SPI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc0_clk = {
-	.name		= "ssc0_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_SSC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc1_clk = {
-	.name		= "ssc1_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_SSC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tcb0_clk = {
-	.name		= "tcb0_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_TCB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pwm_clk = {
-	.name		= "pwm_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_PWMC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tsc_clk = {
-	.name		= "tsc_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_TSC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk dma_clk = {
-	.name		= "dma_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_DMA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk uhphs_clk = {
-	.name		= "uhphs_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_UHPHS,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk lcdc_clk = {
-	.name		= "lcdc_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_LCDC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ac97_clk = {
-	.name		= "ac97_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_AC97C,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-	.name		= "macb_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_EMAC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk isi_clk = {
-	.name		= "isi_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_ISI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk udphs_clk = {
-	.name		= "udphs_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_UDPHS,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc1_clk = {
-	.name		= "mci1_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_MCI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 
 /* Video decoder clock - Only for sam9m10/sam9m11 */
 static struct clk vdec_clk = {
-	.name		= "vdec_clk",
 	.pmc_mask	= 1 << AT91SAM9G45_ID_VDEC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 
-/* One additional fake clock for ohci */
-static struct clk ohci_clk = {
-	.name		= "ohci_clk",
-	.pmc_mask	= 0,
-	.type		= CLK_TYPE_PERIPHERAL,
-	.parent		= &uhphs_clk,
-};
-
-/* One additional fake clock for second TC block */
-static struct clk tcb1_clk = {
-	.name		= "tcb1_clk",
-	.pmc_mask	= 0,
-	.type		= CLK_TYPE_PERIPHERAL,
-	.parent		= &tcb0_clk,
-};
-
 static struct clk *periph_clocks[] __initdata = {
 	&pioA_clk,
 	&pioB_clk,
@@ -228,27 +185,65 @@ static struct clk *periph_clocks[] __initdata = {
 	&udphs_clk,
 	&mmc1_clk,
 	// irq0
-	&ohci_clk,
-	&tcb1_clk,
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+	CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+	CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+	CLKDEV_CON_ID("pioDE_clk", &pioDE_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("usart3_clk", &usart3_clk),
+	CLKDEV_CON_ID("mci0_clk", &mmc0_clk),
+	CLKDEV_CON_ID("twi0_clk", &twi0_clk),
+	CLKDEV_CON_ID("twi1_clk", &twi1_clk),
+	CLKDEV_CON_ID("spi0_clk", &spi0_clk),
+	CLKDEV_CON_ID("spi1_clk", &spi1_clk),
+	CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+	CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+	CLKDEV_CON_ID("tcb0_clk", &tcb0_clk),
+	CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+	CLKDEV_CON_ID("tsc_clk", &tsc_clk),
+	CLKDEV_CON_ID("dma_clk", &dma_clk),
+	CLKDEV_CON_ID("uhphs_clk", &uhphs_clk),
+	CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+	CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+	CLKDEV_CON_ID("macb_clk", &macb_clk),
+	CLKDEV_CON_ID("isi_clk", &isi_clk),
+	CLKDEV_CON_ID("udphs_clk", &udphs_clk),
+	CLKDEV_CON_ID("mci1_clk", &mmc1_clk),
+	/* One additional fake clock for ohci */
+	CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
+	/* One additional fake clock for second TC block */
+	CLKDEV_CON_ID("tcb1_clk", &tcb0_clk),
+};
+
+/* Video decoder clock - Only for sam9m10/sam9m11 */
+static struct clk_lookup vdec_clk_lookup =
+	CLKDEV_CON_ID("vdec_clk", &vdec_clk);
+
 /*
  * The two programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+};
+
 static void __init at91sam9g45_register_clocks(void)
 {
 	int i;
@@ -256,11 +251,19 @@ static void __init at91sam9g45_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
-	if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
+	if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11()) {
 		clk_register(&vdec_clk);
+		clkdev_add(&vdec_clk_lookup);
+	}
 
 	clk_register(&pck0);
 	clk_register(&pck1);
+
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 6a9d24e..da9fea5 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -48,117 +48,94 @@ static struct map_desc at91sam9rl_sram_desc[] __initdata = {
  * The peripheral clocks.
  */
 static struct clk pioA_clk = {
-	.name		= "pioA_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioB_clk = {
-	.name		= "pioB_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOB,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioC_clk = {
-	.name		= "pioC_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pioD_clk = {
-	.name		= "pioD_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOD,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart0_clk = {
-	.name		= "usart0_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_US0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart1_clk = {
-	.name		= "usart1_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_US1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart2_clk = {
-	.name		= "usart2_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_US2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk usart3_clk = {
-	.name		= "usart3_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_US3,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk mmc_clk = {
-	.name		= "mci_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_MCI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi0_clk = {
-	.name		= "twi0_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_TWI0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk twi1_clk = {
-	.name		= "twi1_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_TWI1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk spi_clk = {
-	.name		= "spi_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_SPI,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc0_clk = {
-	.name		= "ssc0_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_SSC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ssc1_clk = {
-	.name		= "ssc1_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_SSC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc0_clk = {
-	.name		= "tc0_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_TC0,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc1_clk = {
-	.name		= "tc1_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_TC1,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tc2_clk = {
-	.name		= "tc2_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_TC2,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk pwm_clk = {
-	.name		= "pwm_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_PWMC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk tsc_clk = {
-	.name		= "tsc_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_TSC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk dma_clk = {
-	.name		= "dma_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_DMA,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk udphs_clk = {
-	.name		= "udphs_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_UDPHS,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk lcdc_clk = {
-	.name		= "lcdc_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_LCDC,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
 static struct clk ac97_clk = {
-	.name		= "ac97_clk",
 	.pmc_mask	= 1 << AT91SAM9RL_ID_AC97C,
 	.type		= CLK_TYPE_PERIPHERAL,
 };
@@ -190,23 +167,52 @@ static struct clk *periph_clocks[] __initdata = {
 	// irq0
 };
 
+static struct clk_lookup periph_clocks_lookups[] = {
+	CLKDEV_CON_ID("pioA_clk", &pioA_clk),
+	CLKDEV_CON_ID("pioB_clk", &pioB_clk),
+	CLKDEV_CON_ID("pioC_clk", &pioC_clk),
+	CLKDEV_CON_ID("pioD_clk", &pioD_clk),
+	CLKDEV_CON_ID("usart0_clk", &usart0_clk),
+	CLKDEV_CON_ID("usart1_clk", &usart1_clk),
+	CLKDEV_CON_ID("usart2_clk", &usart2_clk),
+	CLKDEV_CON_ID("usart3_clk", &usart3_clk),
+	CLKDEV_CON_ID("mci_clk", &mmc_clk),
+	CLKDEV_CON_ID("twi0_clk", &twi0_clk),
+	CLKDEV_CON_ID("twi1_clk", &twi1_clk),
+	CLKDEV_CON_ID("spi_clk", &spi_clk),
+	CLKDEV_CON_ID("ssc0_clk", &ssc0_clk),
+	CLKDEV_CON_ID("ssc1_clk", &ssc1_clk),
+	CLKDEV_CON_ID("tc0_clk", &tc0_clk),
+	CLKDEV_CON_ID("tc1_clk", &tc1_clk),
+	CLKDEV_CON_ID("tc2_clk", &tc2_clk),
+	CLKDEV_CON_ID("pwm_clk", &pwm_clk),
+	CLKDEV_CON_ID("tsc_clk", &tsc_clk),
+	CLKDEV_CON_ID("dma_clk", &dma_clk),
+	CLKDEV_CON_ID("udphs_clk", &udphs_clk),
+	CLKDEV_CON_ID("lcdc_clk", &lcdc_clk),
+	CLKDEV_CON_ID("ac97_clk", &ac97_clk),
+};
+
 /*
  * The two programmable clocks.
  * You must configure pin multiplexing to bring these signals out.
  */
 static struct clk pck0 = {
-	.name		= "pck0",
 	.pmc_mask	= AT91_PMC_PCK0,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 0,
 };
 static struct clk pck1 = {
-	.name		= "pck1",
 	.pmc_mask	= AT91_PMC_PCK1,
 	.type		= CLK_TYPE_PROGRAMMABLE,
 	.id		= 1,
 };
 
+static struct clk_lookup program_clocks_lookups[] = {
+	CLKDEV_CON_ID("pck0", &pck0),
+	CLKDEV_CON_ID("pck1", &pck1),
+};
+
 static void __init at91sam9rl_register_clocks(void)
 {
 	int i;
@@ -214,8 +220,14 @@ static void __init at91sam9rl_register_clocks(void)
 	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 		clk_register(periph_clocks[i]);
 
+	clkdev_add_table(periph_clocks_lookups,
+			 ARRAY_SIZE(periph_clocks_lookups));
+
 	clk_register(&pck0);
 	clk_register(&pck1);
+
+	clkdev_add_table(program_clocks_lookups,
+			 ARRAY_SIZE(program_clocks_lookups));
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 9113da6..9beabae 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -80,20 +80,17 @@ static u32 at91_pllb_usb_init;
  * both PLLs are turned off to run in "slow clock mode" (system suspend).
  */
 static struct clk clk32k = {
-	.name		= "clk32k",
 	.rate_hz	= AT91_SLOW_CLOCK,
 	.users		= 1,		/* always on */
 	.id		= 0,
 	.type		= CLK_TYPE_PRIMARY,
 };
 static struct clk main_clk = {
-	.name		= "main",
 	.pmc_mask	= AT91_PMC_MOSCS,	/* in PMC_SR */
 	.id		= 1,
 	.type		= CLK_TYPE_PRIMARY,
 };
 static struct clk plla = {
-	.name		= "plla",
 	.parent		= &main_clk,
 	.pmc_mask	= AT91_PMC_LOCKA,	/* in PMC_SR */
 	.id		= 2,
@@ -119,7 +116,6 @@ static void pllb_mode(struct clk *clk, int is_on)
 }
 
 static struct clk pllb = {
-	.name		= "pllb",
 	.parent		= &main_clk,
 	.pmc_mask	= AT91_PMC_LOCKB,	/* in PMC_SR */
 	.mode		= pllb_mode,
@@ -159,19 +155,16 @@ static void pmc_uckr_mode(struct clk *clk, int is_on)
 
 /* USB function clocks (PLLB must be 48 MHz) */
 static struct clk udpck = {
-	.name		= "udpck",
 	.parent		= &pllb,
 	.mode		= pmc_sys_mode,
 };
 static struct clk utmi_clk = {
-	.name		= "utmi_clk",
 	.parent		= &main_clk,
 	.pmc_mask	= AT91_PMC_UPLLEN,	/* in CKGR_UCKR */
 	.mode		= pmc_uckr_mode,
 	.type		= CLK_TYPE_PLL,
 };
 static struct clk uhpck = {
-	.name		= "uhpck",
 	/*.parent		= ... we choose parent at runtime */
 	.mode		= pmc_sys_mode,
 };
@@ -183,7 +176,6 @@ static struct clk uhpck = {
  * (e.g baud rate generation).  It's sourced from one of the primary clocks.
  */
 static struct clk mck = {
-	.name		= "mck",
 	.pmc_mask	= AT91_PMC_MCKRDY,	/* in PMC_SR */
 };
 
@@ -215,43 +207,6 @@ static struct clk __init *at91_css_to_clk(unsigned long css)
 	return NULL;
 }
 
-/*
- * Associate a particular clock with a function (eg, "uart") and device.
- * The drivers can then request the same 'function' with several different
- * devices and not care about which clock name to use.
- */
-void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
-{
-	struct clk *clk = clk_get(NULL, id);
-
-	if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
-		return;
-
-	clk->function = func;
-	clk->dev = dev;
-}
-
-/* clocks cannot be de-registered no refcounting necessary */
-struct clk *clk_get(struct device *dev, const char *id)
-{
-	struct clk *clk;
-
-	list_for_each_entry(clk, &clocks, node) {
-		if (strcmp(id, clk->name) == 0)
-			return clk;
-		if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
-			return clk;
-	}
-
-	return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
 static void __clk_enable(struct clk *clk)
 {
 	if (clk->parent)
@@ -662,6 +617,17 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
 	uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
 }
 
+static struct clk_lookup lookups[]  = {
+	CLKDEV_CON_ID("clk32k", &clk32k),
+	CLKDEV_CON_ID("main", &main_clk),
+	CLKDEV_CON_ID("plla", &plla),
+	CLKDEV_CON_ID("mck", &mck),
+	CLKDEV_CON_ID("pllb", &pllb),
+	CLKDEV_CON_ID("udpck", &udpck),
+	CLKDEV_CON_ID("utmi_clk", &utmi_clk),
+	CLKDEV_CON_ID("uhpck", &uhpck),
+};
+
 int __init at91_clock_init(unsigned long main_clock)
 {
 	unsigned tmp, freq, mckr;
@@ -771,6 +737,8 @@ int __init at91_clock_init(unsigned long main_clock)
 	/* MCK and CPU clock are "always on" */
 	clk_enable(&mck);
 
+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
 	printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
 		freq / 1000000, (unsigned) mck.rate_hz / 1000000,
 		(unsigned) main_clock / 1000000,
@@ -798,7 +766,7 @@ static int __init at91_clock_reset(void)
 		if (clk->mode == pmc_sys_mode)
 			scdr |= clk->pmc_mask;
 
-		pr_debug("Clocks: disable unused %s\n", clk->name);
+		pr_debug("Clocks: disable unused 0x%p\n", clk);
 	}
 
 	at91_sys_write(AT91_PMC_PCDR, pcdr);
diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h
index 6cf4b78..916d662 100644
--- a/arch/arm/mach-at91/clock.h
+++ b/arch/arm/mach-at91/clock.h
@@ -6,6 +6,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/clkdev.h>
+
 #define CLK_TYPE_PRIMARY	0x1
 #define CLK_TYPE_PLL		0x2
 #define CLK_TYPE_PROGRAMMABLE	0x4
@@ -15,9 +17,6 @@
 
 struct clk {
 	struct list_head node;
-	const char	*name;		/* unique clock name */
-	const char	*function;	/* function of the clock */
-	struct device	*dev;		/* device associated with function */
 	unsigned long	rate_hz;
 	struct clk	*parent;
 	u32		pmc_mask;
@@ -29,3 +28,5 @@ struct clk {
 
 
 extern int __init clk_register(struct clk *clk);
+
+#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 0c66deb..c617a18 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -8,6 +8,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/clkdev.h>
+
  /* Processors */
 extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
 extern void __init at91sam9260_initialize(unsigned long main_clock);
@@ -40,7 +42,15 @@ extern struct sys_timer at91x40_timer;
  /* Clocks */
 extern int __init at91_clock_init(unsigned long main_clock);
 struct device;
-extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
+
+/*
+ * Associate a particular clock with a function (eg, "uart") and device.
+ * The drivers can then request the same 'function' with several different
+ * devices and not care about which clock name to use.
+ */static int inline at91_clock_associate(char *dev_id, struct device *dev, const char *con_id)
+{
+	return clk_add_alias(con_id, NULL, dev_id, dev);
+}
 
  /* Power Management */
 extern void at91_irq_suspend(void);
diff --git a/arch/arm/mach-at91/include/mach/clkdev.h b/arch/arm/mach-at91/include/mach/clkdev.h
new file mode 100644
index 0000000..04b37a8
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
-- 
1.7.2.3



From plagnioj at jcrosoft.com  Wed Feb  2 01:28:04 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 2 Feb 2011 07:28:04 +0100
Subject: [to be tested] [PATCH] at91: switch to CLKDEV_LOOKUP
In-Reply-To: <1296627894-1612-1-git-send-email-plagnioj@jcrosoft.com>
References: <1296627894-1612-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20110202062804.GI26656@game.jcrosoft.org>

On 07:24 Wed 02 Feb     , Jean-Christophe PLAGNIOL-VILLARD wrote:
> with this first commit we do not change the clock naming convention so
> does not need to switcht the AVR32 yet
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> Cc: Nicolas Ferre <nicolas.ferre at atmel.com>
> Cc: Patrice Vilchez <patrice.vilchez at atmel.com>
> ---
sory wrong ML this one is for the kernel a similar update will be done on
barebox later

Best Regards,
J.


From plagnioj at jcrosoft.com  Wed Feb  2 11:47:25 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed,  2 Feb 2011 17:47:25 +0100
Subject: [PATCH] sandbox: remove non used functions linux_getc/putc
Message-ID: <1296665245-27385-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/sandbox/mach-sandbox/include/mach/linux.h |    2 --
 arch/sandbox/os/common.c                       |   20 --------------------
 2 files changed, 0 insertions(+), 22 deletions(-)

diff --git a/arch/sandbox/mach-sandbox/include/mach/linux.h b/arch/sandbox/mach-sandbox/include/mach/linux.h
index b9053d8..7c2386d 100644
--- a/arch/sandbox/mach-sandbox/include/mach/linux.h
+++ b/arch/sandbox/mach-sandbox/include/mach/linux.h
@@ -8,8 +8,6 @@ int linux_read(int fd, void *buf, size_t count);
 int linux_read_nonblock(int fd, void *buf, size_t count);
 ssize_t linux_write(int fd, const void *buf, size_t count);
 off_t linux_lseek(int fildes, off_t offset);
-int linux_getc (void);
-void linux_putc (const char c);
 int linux_tstc(int fd);
 
 int barebox_register_console(char *name_template, int stdinfd, int stdoutfd);
diff --git a/arch/sandbox/os/common.c b/arch/sandbox/os/common.c
index 287be0d..dcaf0c8 100644
--- a/arch/sandbox/os/common.c
+++ b/arch/sandbox/os/common.c
@@ -73,17 +73,6 @@ static void cookmode(void)
 	tcsetattr(0, TCSANOW, &term_orig);
 }
 
-void linux_putc(const char c)
-{
-	fputc(c, stdout);
-
-	/* If \n, also do \r */
-	if (c == '\n')
-		linux_putc ('\r');
-
-	fflush(stdout);
-}
-
 int linux_tstc(int fd)
 {
 	struct timeval tv = {
@@ -117,15 +106,6 @@ int ctrlc(void)
 	return 0;
 }
 
-int linux_getc(void)
-{
-	char ret;
-
-	read(0, &ret, 1);
-
-	return ret;
-}
-
 uint64_t linux_get_time(void)
 {
 	struct timespec ts;
-- 
1.7.2.3



From mkl at pengutronix.de  Wed Feb  2 17:09:18 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Wed,  2 Feb 2011 23:09:18 +0100
Subject: [PATCH] defaultenv/bin/boot: fix ubi root's name assignment
Message-ID: <1296684558-16821-1-git-send-email-mkl@pengutronix.de>

This patch fixes a regression introduced in commit
d15cfafeef8f99ff1a47e77362d0adf1b07f26ae.

While there, use "-z" to check if ubiroot variable is empty.

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
Cc: Eric B?nard <eric at eukrea.com>
---
 defaultenv/bin/boot |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot
index fa68748..788a781 100644
--- a/defaultenv/bin/boot
+++ b/defaultenv/bin/boot
@@ -34,8 +34,8 @@ else
 	fi
 
 	if [ x$rootfs_type = xubifs ]; then
-		if [ x$ubiroot = x ]; then
-			ubiroot = "root"
+		if [ -z $ubiroot ]; then
+			ubiroot="root"
 		fi
 		bootargs="$bootargs root=ubi0:$ubiroot ubi.mtd=$rootfs_mtdblock"
 	else
-- 
1.7.2.3



From eric at eukrea.com  Wed Feb  2 17:14:08 2011
From: eric at eukrea.com (=?UTF-8?B?RXJpYyBCw6luYXJk?=)
Date: Wed, 02 Feb 2011 23:14:08 +0100
Subject: [PATCH] defaultenv/bin/boot: fix ubi root's name assignment
In-Reply-To: <1296684558-16821-1-git-send-email-mkl@pengutronix.de>
References: <1296684558-16821-1-git-send-email-mkl@pengutronix.de>
Message-ID: <4D49D730.3040009@eukrea.com>

On 02/02/2011 23:09, Marc Kleine-Budde wrote:
> This patch fixes a regression introduced in commit
> d15cfafeef8f99ff1a47e77362d0adf1b07f26ae.
>
> While there, use "-z" to check if ubiroot variable is empty.
>
> Signed-off-by: Marc Kleine-Budde<mkl at pengutronix.de>
> Cc: Eric B?nard<eric at eukrea.com>
Acked-By: Eric B?nard<eric at eukrea.com>

and shame on me for not testing this part ...

Eric
> ---
>   defaultenv/bin/boot |    4 ++--
>   1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot
> index fa68748..788a781 100644
> --- a/defaultenv/bin/boot
> +++ b/defaultenv/bin/boot
> @@ -34,8 +34,8 @@ else
>   	fi
>
>   	if [ x$rootfs_type = xubifs ]; then
> -		if [ x$ubiroot = x ]; then
> -			ubiroot = "root"
> +		if [ -z $ubiroot ]; then
> +			ubiroot="root"
>   		fi
>   		bootargs="$bootargs root=ubi0:$ubiroot ubi.mtd=$rootfs_mtdblock"
>   	else



From mkl at pengutronix.de  Wed Feb  2 17:18:08 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Wed, 02 Feb 2011 23:18:08 +0100
Subject: [PATCH] defaultenv/bin/boot: fix ubi root's name assignment
In-Reply-To: <4D49D730.3040009@eukrea.com>
References: <1296684558-16821-1-git-send-email-mkl@pengutronix.de>
	<4D49D730.3040009@eukrea.com>
Message-ID: <4D49D820.9020700@pengutronix.de>

On 02/02/2011 11:14 PM, Eric B?nard wrote:
> On 02/02/2011 23:09, Marc Kleine-Budde wrote:
>> This patch fixes a regression introduced in commit
>> d15cfafeef8f99ff1a47e77362d0adf1b07f26ae.
>>
>> While there, use "-z" to check if ubiroot variable is empty.
>>
>> Signed-off-by: Marc Kleine-Budde<mkl at pengutronix.de>
>> Cc: Eric B?nard<eric at eukrea.com>
> Acked-By: Eric B?nard<eric at eukrea.com>
> 
> and shame on me for not testing this part ...

Sascha, can you fix Eric's name, I fsck'ed it up :)

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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From mkl at pengutronix.de  Wed Feb  2 17:20:48 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Wed,  2 Feb 2011 23:20:48 +0100
Subject: [PATCH v2] defaultenv/bin/boot: fix ubi root's name assignment
Message-ID: <1296685248-18699-1-git-send-email-mkl@pengutronix.de>

This patch fixes a regression introduced in commit
d15cfafeef8f99ff1a47e77362d0adf1b07f26ae.

While there, use "-z" to check if ubiroot variable is empty.

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
Cc: Eric B?nard <eric at eukrea.com>
---

changes since v1: fix (hopefully) encoding of Enric's name, sorry.

 defaultenv/bin/boot |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/defaultenv/bin/boot b/defaultenv/bin/boot
index fa68748..788a781 100644
--- a/defaultenv/bin/boot
+++ b/defaultenv/bin/boot
@@ -34,8 +34,8 @@ else
 	fi
 
 	if [ x$rootfs_type = xubifs ]; then
-		if [ x$ubiroot = x ]; then
-			ubiroot = "root"
+		if [ -z $ubiroot ]; then
+			ubiroot="root"
 		fi
 		bootargs="$bootargs root=ubi0:$ubiroot ubi.mtd=$rootfs_mtdblock"
 	else
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb  3 04:48:49 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 3 Feb 2011 10:48:49 +0100
Subject: v2011.02.0
Message-ID: <20110203094849.GC9041@pengutronix.de>

Hi all,

v2011.02.0 is out. Here is what happened since the last release:

The following changes since commit d836124f8bbe05843a3f954727e6544a0fb96013:

  Release v2011.01.0 (2011-01-06 11:25:35 +0100)

are available in the git repository at:
  git://git.pengutronix.de/git/barebox.git master

Alexey Zaytsev (1):
      Add basic support from ARM Versatile/PB

Baruch Siach (2):
      remove redundant .gitignore entries
      miidev: allow read/write of all registers

Fabio Porcedda (1):
      xyzModem.c: fix 'dummy' is used uninitialized in this function warning

Jean-Christophe PLAGNIOL-VILLARD (2):
      versatile: add missing env/config
      at91sam9g45: fix ARCH_TEXT_BASE

Juergen Beisert (35):
      STM/MCI: Fix wrong register bit
      Make DIV_ROUND_UP macro globally available
      Add macro for correct rounding in integer devisions
      STM378x: Use Hz as the clock unit like in all other arch
      STM378x: Do not configure any pin usage in the driver
      STM378x: Parameterize the max. possible GPIO number
      STM378x: Separate i.MX23 clock handling
      IMX: Ignore i.MX23/i.MX28 related code in shared devices
      STM378x: Add i.MX28 architecture
      STM378x: Adapt the serial driver to support i.MX23 and i.MX28
      STM378x: Adapt the MCI driver to support i.MX23 and i.MX28
      Fixup the FEC driver files
      MX28: add FEC support
      STM378x: Add TX28 CPU module
      STM378x: Add the TX28 Starterkit-5 baseboard
      Add more useful generic macros
      ARM Chumby: Fix memory index
      ARM Chumby: Fix unit of the clocks after the change to Hz
      ARM Chumby: Just fix some typos
      Fix default framebuffer 'enable' set
      Add the feature to change the video mode at runtime
      ARM STM/i.MX: Add a pixel clock calculation routine for i.MX23/i.MX28
      ARM STM/i.MX: Add video driver for i.MX23/i.MX28
      ARM KARO-TX28-STK5: Add a user for video graphics support on i.MX28
      ARM Chumby-Falconwing: Add a user for video graphics support on i.MX23
      Fix a typo in the GPIO doc
      ARM STM/i.MX: Fix register offset calculation for GPIO input pins
      ARM STM/i.MX: Remove variable size restrictions in iomux managing routines
      ARM STM/i.MX: Setting the iomux needs at least 32 bit.
      ARM STM/i.MX: Just fix the docs
      ARM STM/i.MX: Add support for the gpio commands
      ARM STM/i.MX: Avoid very long lines
      ARM STM/i.MX: Replace cryptic numbers
      ARM Chumby: Add list of available GPIOs and their meaning
      Fix default baudrate setting

Krzysztof Halasa (10):
      Remove unused eth_get_name() prototype.
      Flash CFI: removed unused 'size' variable.
      Fix help text for "loadb" and "loady" commands.
      Fix top-level Makefile to work with GNU make 3.82.
      Cosmetic fixes, including format attributes for printf() and friends.
      ARM: support big-endian processors.
      Silence few warnings.
      Fix NOR CFI flash driver to work on big endian systems.
      Fix usage of __LITTLE_ENDIAN macro.
      CFI NOR flash: fix write timeout units.

Marc Kleine-Budde (1):
      Add generic poll infrastructure

Marc Reilly (3):
      arm: update mach-types
      imx: add IMX_GPIO_NR macro.
      Put the explicit flash header sections back in.

Peter Korsgaard (1):
      console_simple: add fprintf / console_list for commands/loadb.c

Sanjeev Premi (17):
      omap3: Add macros to extract hawkeye and version
      omap3: Detect cpu based on hawkeye
      omap3: Update method to detect si revision
      omap3: Add DPLL tables for silicon rev 1 and 2
      omap3: Define separate functions for DPLL configuration
      omap3: Select DPLL tables based on cpu revision
      omap34x: Add suffix to DPLL tables and related function
      omap36x: Add support for dynamic detection
      omap36x: Detect silicon revisions
      omap36x: Define structure for PER DPLL
      omap36x: Add DPLL tables and functions to access them
      omap36x: Define per domain functions for DPLL configuration
      omap36x: Perform basic clock initialization
      omap3: Avoid sudden change to SYS_CLK divider
      omap3: Define GFX_DIV values for OMAP34xx and OMAP36xx
      omap: echi: fix compile error
      nand: Fix warnings due to incompatible format strings

Sascha Hauer (39):
      ARM STM/i.MX: remove GENERIC_GPIO from ARCH_STM
      ARM tx28stk5_defconfig: update config
      cfi flash driver: check for ctrl-c during erase
      basic LED support
      LED: Add gpio LED support
      LED: Add LED trigger support
      LED: Add led command
      LED: Add trigger command
      ARM pcm043 board: Add LED support
      Merge branch 'led' into next
      Merge branch 'next'
      i.MX: fix printf compiler warnings
      net: fix printf compiler warnings
      fec_imx: fix printf compiler warnings
      nand: fix printf compiler warnings
      cdev: fix printf compiler warnings
      usb: add missing byteorder include
      add to speed
      eukrea_cpuimx35: fix printf compiler warnings
      blackfin: fix printf compiler warnings
      cs8900: fix printf compiler warnings
      dm9000: fix printf compiler warnings
      smc911x: fix printf compiler warnings
      ipe337: fix printf compiler warnings
      device tree: fix printf compiler warnings
      netx: fix printf compiler warnings
      guf-cupid: fix printf compiler warnings
      pcm043: fix printf compiler warnings
      at91: fix printf compiler warnings
      ppc: fix printf compiler warnings
      imx-esdhc: fix printf compiler warnings
      mci-core: fix printf compiler warnings
      imx-ipu-fb: fix printf compiler warnings
      mpc5xxx: fix printf compiler warnings
      i.MX nand: do not select NAND_IMX_BOOT
      fb: update cdev map_base
      Merge branch 'fb-master'
      fb: When setting a mode, also update xres, yres and fb size
      Release v2011.02.0

Wolfram Sang (1):
      defaultenv: make 'boot' work from subdirs

 .gitignore                                        |    2 -
 Documentation/boards.dox                          |    1 +
 Makefile                                          |   10 +-
 arch/arm/Kconfig                                  |    5 +
 arch/arm/Makefile                                 |    3 +
 arch/arm/boards/chumby_falconwing/falconwing.c    |  184 ++++++-
 arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c |    2 +-
 arch/arm/boards/guf-cupid/board.c                 |    2 +-
 arch/arm/boards/karo-tx28/Makefile                |    2 +
 arch/arm/boards/karo-tx28/config.h                |   16 +
 arch/arm/boards/karo-tx28/env/config              |   47 ++
 arch/arm/boards/karo-tx28/tx28-stk5.c             |  377 ++++++++++++++
 arch/arm/boards/karo-tx28/tx28.c                  |  156 ++++++
 arch/arm/boards/pcm043/pcm043.c                   |   12 +-
 arch/arm/boards/versatile/Kconfig                 |   10 +
 arch/arm/boards/versatile/Makefile                |    2 +
 arch/arm/boards/versatile/config.h                |    5 +
 arch/arm/boards/versatile/env/config              |   43 ++
 arch/arm/boards/versatile/versatilepb.c           |   72 +++
 arch/arm/configs/chumbyone_defconfig              |    4 +
 arch/arm/configs/tx28stk5_defconfig               |   46 ++
 arch/arm/configs/versatilepb_defconfig            |   48 ++
 arch/arm/cpu/Kconfig                              |    3 +
 arch/arm/cpu/start.c                              |    3 +
 arch/arm/include/asm/hardware/arm_timer.h         |   33 ++
 arch/arm/mach-at91/Kconfig                        |    1 +
 arch/arm/mach-at91/clock.c                        |    2 +-
 arch/arm/mach-imx/Kconfig                         |    1 -
 arch/arm/mach-imx/include/mach/generic.h          |    2 +
 arch/arm/mach-imx/include/mach/imx-flash-header.h |   12 +
 arch/arm/mach-imx/include/mach/imx-regs.h         |    4 +
 arch/arm/mach-imx/speed-imx1.c                    |   20 +-
 arch/arm/mach-imx/speed-imx21.c                   |   20 +-
 arch/arm/mach-imx/speed-imx25.c                   |   20 +-
 arch/arm/mach-imx/speed-imx27.c                   |   20 +-
 arch/arm/mach-imx/speed-imx31.c                   |    4 +-
 arch/arm/mach-imx/speed-imx35.c                   |   18 +-
 arch/arm/mach-netx/generic.c                      |    2 +-
 arch/arm/mach-omap/include/mach/omap3-clock.h     |   33 +-
 arch/arm/mach-omap/include/mach/omap3-silicon.h   |   16 +-
 arch/arm/mach-omap/include/mach/sys_info.h        |   40 +-
 arch/arm/mach-omap/omap3_clock.c                  |  547 ++++++++++++++++----
 arch/arm/mach-omap/omap3_clock_core.S             |  290 ++++++++----
 arch/arm/mach-omap/omap3_generic.c                |   89 +++-
 arch/arm/mach-stm/Kconfig                         |   36 ++
 arch/arm/mach-stm/Makefile                        |    6 +-
 arch/arm/mach-stm/clocksource-imx28.c             |   73 +++
 arch/arm/mach-stm/{imx23.c => imx.c}              |    0
 arch/arm/mach-stm/imx_lcd_clk.c                   |  149 ++++++
 arch/arm/mach-stm/include/mach/clock-imx23.h      |   28 +
 arch/arm/mach-stm/include/mach/clock-imx28.h      |   31 ++
 arch/arm/mach-stm/include/mach/clock.h            |   22 +-
 arch/arm/mach-stm/include/mach/fb.h               |   43 ++
 arch/arm/mach-stm/include/mach/generic.h          |    6 +
 arch/arm/mach-stm/include/mach/gpio.h             |   11 +-
 arch/arm/mach-stm/include/mach/imx-regs.h         |    9 +
 arch/arm/mach-stm/include/mach/imx23-regs.h       |    1 +
 arch/arm/mach-stm/include/mach/imx28-regs.h       |   47 ++
 arch/arm/mach-stm/include/mach/iomux-imx28.h      |  552 +++++++++++++++++++++
 arch/arm/mach-stm/{iomux-imx23.c => iomux-imx.c}  |  114 ++++-
 arch/arm/mach-stm/{reset-imx23.c => reset-imx.c}  |    0
 arch/arm/mach-stm/speed-imx23.c                   |   52 +-
 arch/arm/mach-stm/speed-imx28.c                   |  392 +++++++++++++++
 arch/arm/mach-versatile/Kconfig                   |   16 +
 arch/arm/mach-versatile/Makefile                  |    2 +
 arch/arm/mach-versatile/core.c                    |  224 +++++++++
 arch/arm/mach-versatile/include/mach/clkdev.h     |    7 +
 arch/arm/mach-versatile/include/mach/debug_ll.h   |   37 ++
 arch/arm/mach-versatile/include/mach/init.h       |    8 +
 arch/arm/mach-versatile/include/mach/platform.h   |  417 ++++++++++++++++
 arch/arm/tools/mach-types                         |  385 ++++++++++++++-
 arch/blackfin/boards/ipe337/cmd_alternate.c       |    4 +-
 arch/blackfin/lib/blackfin_linux.c                |    2 +-
 arch/blackfin/lib/traps.c                         |    2 +-
 arch/ppc/lib/ppclinux.c                           |    2 +-
 arch/ppc/mach-mpc5xxx/cpu.c                       |    2 +-
 commands/Kconfig                                  |   15 +
 commands/Makefile                                 |    2 +
 commands/crc.c                                    |    2 +-
 commands/flash.c                                  |    4 +-
 commands/go.c                                     |    2 +-
 commands/gpio.c                                   |    2 +-
 commands/led.c                                    |   90 ++++
 commands/loadb.c                                  |    3 +-
 commands/ls.c                                     |    4 +-
 commands/menu.c                                   |    2 +-
 commands/nand.c                                   |    2 +-
 commands/trigger.c                                |  107 ++++
 commands/xyzModem.c                               |    2 +-
 common/Kconfig                                    |    3 +
 common/Makefile                                   |    1 +
 common/console.c                                  |    8 +-
 common/console_simple.c                           |   26 +-
 common/ft_build.c                                 |    2 +-
 common/poller.c                                   |   45 ++
 common/startup.c                                  |    2 +-
 defaultenv/bin/boot                               |    4 +-
 drivers/Kconfig                                   |    1 +
 drivers/Makefile                                  |    1 +
 drivers/led/Kconfig                               |   21 +
 drivers/led/Makefile                              |    3 +
 drivers/led/core.c                                |  157 ++++++
 drivers/led/led-gpio.c                            |   94 ++++
 drivers/led/led-triggers.c                        |  153 ++++++
 drivers/mci/Kconfig                               |    4 +-
 drivers/mci/imx-esdhc.c                           |    2 +-
 drivers/mci/mci-core.c                            |    4 +-
 drivers/mci/stm378x.c                             |  143 +++++-
 drivers/mtd/nand/nand.c                           |   14 +-
 drivers/mtd/nand/nand_base.c                      |    2 +-
 drivers/mtd/ubi/cdev.c                            |    2 +-
 drivers/net/cs8900.c                              |    6 +-
 drivers/net/dm9000.c                              |   12 +-
 drivers/net/fec_imx.c                             |  101 +++-
 drivers/net/fec_imx.h                             |   21 +-
 drivers/net/miidev.c                              |    2 +-
 drivers/net/netx_eth.c                            |    1 -
 drivers/net/smc911x.c                             |    2 +-
 drivers/nor/cfi_flash.c                           |  161 +++----
 drivers/nor/cfi_flash.h                           |   25 +-
 drivers/serial/Kconfig                            |    2 +-
 drivers/serial/stm-serial.c                       |    9 +-
 drivers/spi/imx_spi.c                             |    3 -
 drivers/usb/host/ehci-omap.c                      |    2 +-
 drivers/video/Kconfig                             |    7 +
 drivers/video/Makefile                            |    1 +
 drivers/video/fb.c                                |   52 ++-
 drivers/video/imx-ipu-fb.c                        |    2 +-
 drivers/video/stm.c                               |  540 ++++++++++++++++++++
 include/common.h                                  |   19 +
 include/cramfs/cramfs_fs.h                        |    4 +-
 include/fb.h                                      |    3 +
 include/led.h                                     |  102 ++++
 include/net.h                                     |    4 +-
 include/poller.h                                  |   31 ++
 include/stdio.h                                   |   18 +-
 include/usb/usb.h                                 |    3 +-
 lib/readline.c                                    |    4 +-
 lib/vsprintf.c                                    |    4 +
 net/eth.c                                         |   10 +-
 net/net.c                                         |   20 +-
 net/tftp.c                                        |    2 +-
 142 files changed, 6368 insertions(+), 643 deletions(-)
 create mode 100644 arch/arm/boards/karo-tx28/Makefile
 create mode 100644 arch/arm/boards/karo-tx28/config.h
 create mode 100644 arch/arm/boards/karo-tx28/env/config
 create mode 100644 arch/arm/boards/karo-tx28/tx28-stk5.c
 create mode 100644 arch/arm/boards/karo-tx28/tx28.c
 create mode 100644 arch/arm/boards/versatile/Kconfig
 create mode 100644 arch/arm/boards/versatile/Makefile
 create mode 100644 arch/arm/boards/versatile/config.h
 create mode 100644 arch/arm/boards/versatile/env/config
 create mode 100644 arch/arm/boards/versatile/versatilepb.c
 create mode 100644 arch/arm/configs/tx28stk5_defconfig
 create mode 100644 arch/arm/configs/versatilepb_defconfig
 create mode 100644 arch/arm/include/asm/hardware/arm_timer.h
 create mode 100644 arch/arm/mach-stm/clocksource-imx28.c
 rename arch/arm/mach-stm/{imx23.c => imx.c} (100%)
 create mode 100644 arch/arm/mach-stm/imx_lcd_clk.c
 create mode 100644 arch/arm/mach-stm/include/mach/clock-imx23.h
 create mode 100644 arch/arm/mach-stm/include/mach/clock-imx28.h
 create mode 100644 arch/arm/mach-stm/include/mach/fb.h
 create mode 100644 arch/arm/mach-stm/include/mach/imx28-regs.h
 create mode 100644 arch/arm/mach-stm/include/mach/iomux-imx28.h
 rename arch/arm/mach-stm/{iomux-imx23.c => iomux-imx.c} (50%)
 rename arch/arm/mach-stm/{reset-imx23.c => reset-imx.c} (100%)
 create mode 100644 arch/arm/mach-stm/speed-imx28.c
 create mode 100644 arch/arm/mach-versatile/Kconfig
 create mode 100644 arch/arm/mach-versatile/Makefile
 create mode 100644 arch/arm/mach-versatile/core.c
 create mode 100644 arch/arm/mach-versatile/include/mach/clkdev.h
 create mode 100644 arch/arm/mach-versatile/include/mach/debug_ll.h
 create mode 100644 arch/arm/mach-versatile/include/mach/init.h
 create mode 100644 arch/arm/mach-versatile/include/mach/platform.h
 create mode 100644 commands/led.c
 create mode 100644 commands/trigger.c
 create mode 100644 common/poller.c
 create mode 100644 drivers/led/Kconfig
 create mode 100644 drivers/led/Makefile
 create mode 100644 drivers/led/core.c
 create mode 100644 drivers/led/led-gpio.c
 create mode 100644 drivers/led/led-triggers.c
 create mode 100644 drivers/video/stm.c
 create mode 100644 include/led.h
 create mode 100644 include/poller.h
-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Feb  3 04:57:13 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  3 Feb 2011 10:57:13 +0100
Subject: [PATCH 1/2] fb: For multiple video modes print the available modes in
	devinfo
In-Reply-To: <1296727034-19693-1-git-send-email-s.hauer@pengutronix.de>
References: <1296727034-19693-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1296727034-19693-2-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/video/fb.c |   38 ++++++++++++++++++++++++++++++++++++++
 1 files changed, 38 insertions(+), 0 deletions(-)

diff --git a/drivers/video/fb.c b/drivers/video/fb.c
index cf21c4b..85db904 100644
--- a/drivers/video/fb.c
+++ b/drivers/video/fb.c
@@ -5,6 +5,7 @@
 #include <getopt.h>
 #include <fcntl.h>
 #include <fs.h>
+#include <init.h>
 
 static int fb_ioctl(struct cdev* cdev, int req, void *data)
 {
@@ -135,3 +136,40 @@ int register_framebuffer(struct fb_info *info)
 	return 0;
 }
 
+static void fb_info(struct device_d *dev)
+{
+	struct fb_info *info = dev->priv;
+	int i;
+
+	if (!info->num_modes)
+		return;
+
+	printf("available modes:\n");
+
+	for (i = 0; i < info->num_modes; i++) {
+		struct fb_videomode *mode = &info->mode_list[i];
+
+		printf("%-10s %dx%d@%d\n", mode->name,
+				mode->xres, mode->yres, mode->refresh);
+	}
+
+	printf("\n");
+}
+
+static int fb_probe(struct device_d *hw_dev)
+{
+	return 0;
+}
+
+static struct driver_d fb_driver = {
+	.name  = "fb",
+	.probe = fb_probe,
+	.info = fb_info,
+};
+
+static int fb_init_driver(void)
+{
+	register_driver(&fb_driver);
+	return 0;
+}
+device_initcall(fb_init_driver);
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb  3 04:57:14 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  3 Feb 2011 10:57:14 +0100
Subject: [PATCH 2/2] ARM tx28: Add hook for enabling the display
In-Reply-To: <1296727034-19693-1-git-send-email-s.hauer@pengutronix.de>
References: <1296727034-19693-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1296727034-19693-3-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/karo-tx28/tx28-stk5.c |   27 +++++++++++++++++++++++----
 1 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boards/karo-tx28/tx28-stk5.c b/arch/arm/boards/karo-tx28/tx28-stk5.c
index e8338a3..d5a7831 100644
--- a/arch/arm/boards/karo-tx28/tx28-stk5.c
+++ b/arch/arm/boards/karo-tx28/tx28-stk5.c
@@ -186,20 +186,39 @@ static struct fb_videomode tx28evk_vmodes[] = {
 
 #define MAX_FB_SIZE SZ_2M
 
-static struct imx_fb_videomode imxfb_mode = {
+#define GPIO_LCD_RESET	126 /* 1 -> Reset  */
+#define GPIO_BACKLIGHT	112 /* 0 -> backlight active */
+#define GPIO_LCD_ENABLE	 63 /* 1 -> LCD enabled */
+
+static void tx28_fb_enable(int enable)
+{
+	gpio_direction_output(GPIO_LCD_RESET, enable);
+	gpio_direction_output(GPIO_LCD_ENABLE, enable);
+
+	/* Give the display a chance to sync before we enable
+	 * the backlight to avoid flickering
+	 */
+	if (enable)
+		mdelay(100);
+
+	gpio_direction_output(GPIO_BACKLIGHT, !enable);
+}
+
+static struct imx_fb_platformdata tx28_fb_pdata = {
 	.mode_list = tx28evk_vmodes,
 	.mode_cnt = ARRAY_SIZE(tx28evk_vmodes),
 	.dotclk_delay = 0,	/* no adaption required */
 	.ld_intf_width = STMLCDIF_24BIT,	/* full 24 bit */
 	.fixed_screen = (void *)(0x40000000 + SZ_128M - MAX_FB_SIZE),
 	.fixed_screen_size = MAX_FB_SIZE,
+	.enable = tx28_fb_enable,
 };
 
 static struct device_d ldcif_dev = {
 	.name = "stmfb",
 	.map_base = IMX_FB_BASE,
 	.size = 4096,
-	.platform_data = &imxfb_mode,
+	.platform_data = &tx28_fb_pdata,
 };
 
 static const uint32_t tx28_starterkit_pad_setup[] = {
@@ -360,9 +379,9 @@ void base_board_init(void)
 
 	register_device(&mci_socket);
 
-	if (imxfb_mode.fixed_screen < (void *)&_end) {
+	if (tx28_fb_pdata.fixed_screen < (void *)&_end) {
 		printf("Warning: fixed_screen overlaps barebox\n");
-		imxfb_mode.fixed_screen = NULL;
+		tx28_fb_pdata.fixed_screen = NULL;
 	}
 
 	register_device(&ldcif_dev);
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb  3 04:57:12 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu,  3 Feb 2011 10:57:12 +0100
Subject: fb patches
Message-ID: <1296727034-19693-1-git-send-email-s.hauer@pengutronix.de>


Two small patches, one for printing out the available videomodes when there
are multiple modes, the other for enabling the display on an Karo tx28 module.

Sascha Hauer (2):
      fb: For multiple video modes print the available modes in devinfo
      ARM tx28: Add hook for enabling the display

 arch/arm/boards/karo-tx28/tx28-stk5.c |   27 ++++++++++++++++++++---
 drivers/video/fb.c                    |   38 +++++++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+), 4 deletions(-)



From mkl at pengutronix.de  Fri Feb  4 07:45:16 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Fri,  4 Feb 2011 13:45:16 +0100
Subject: [PATCH] defaultenv/bin/update: fix return values
Message-ID: <1296823516-7467-1-git-send-email-mkl@pengutronix.de>

This patch fixes the return values of the update script.

- Exit with an error of the "_update" script fails.
- Add a "else; true" to the crc check, otherwise the script
  exists with "1".

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 defaultenv/bin/update |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/defaultenv/bin/update b/defaultenv/bin/update
index 43d3097..7c37c36 100644
--- a/defaultenv/bin/update
+++ b/defaultenv/bin/update
@@ -64,7 +64,9 @@ if [ x${mode} != xtftp ] && [ x${mode} != xxmodem ] ; then
 	exit 1
 fi
 
-. /env/bin/_update
+. /env/bin/_update || exit 1
 if [ x${check} = xy ]; then
 	crc32 -f $image -F $part
+else
+	true
 fi
-- 
1.7.2.3



From mkl at pengutronix.de  Fri Feb  4 07:50:49 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Fri,  4 Feb 2011 13:50:49 +0100
Subject: [PATCH v2] defaultenv/bin/update: fix return values
Message-ID: <1296823849-8692-1-git-send-email-mkl@pengutronix.de>

This patch fixes the return values of the update script.

- Exit with an error of the "_update" script fails.
- Add a "else; true" to the crc check, otherwise the script
  exits with "1".

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---

Changes since v1:
- fix exists type in commit message

 defaultenv/bin/update |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/defaultenv/bin/update b/defaultenv/bin/update
index 43d3097..7c37c36 100644
--- a/defaultenv/bin/update
+++ b/defaultenv/bin/update
@@ -64,7 +64,9 @@ if [ x${mode} != xtftp ] && [ x${mode} != xxmodem ] ; then
 	exit 1
 fi
 
-. /env/bin/_update
+. /env/bin/_update || exit 1
 if [ x${check} = xy ]; then
 	crc32 -f $image -F $part
+else
+	true
 fi
-- 
1.7.2.3



From mkl at pengutronix.de  Fri Feb  4 09:12:35 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Fri, 04 Feb 2011 15:12:35 +0100
Subject: [PATCH v2] defaultenv/bin/update: fix return values
In-Reply-To: <1296823849-8692-1-git-send-email-mkl@pengutronix.de>
References: <1296823849-8692-1-git-send-email-mkl@pengutronix.de>
Message-ID: <4D4C0953.5020704@pengutronix.de>

On 02/04/2011 01:50 PM, Marc Kleine-Budde wrote:
> This patch fixes the return values of the update script.
> 
> - Exit with an error of the "_update" script fails.
> - Add a "else; true" to the crc check, otherwise the script
>   exits with "1".
> 
> Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
> 
> Changes since v1:
> - fix exists type in commit message
               typo

that is

Marc
> 
>  defaultenv/bin/update |    4 +++-
>  1 files changed, 3 insertions(+), 1 deletions(-)
> 
> diff --git a/defaultenv/bin/update b/defaultenv/bin/update
> index 43d3097..7c37c36 100644
> --- a/defaultenv/bin/update
> +++ b/defaultenv/bin/update
> @@ -64,7 +64,9 @@ if [ x${mode} != xtftp ] && [ x${mode} != xxmodem ] ; then
>  	exit 1
>  fi
>  
> -. /env/bin/_update
> +. /env/bin/_update || exit 1
>  if [ x${check} = xy ]; then
>  	crc32 -f $image -F $part
> +else
> +	true
>  fi


-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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From boaz.bd at wellsense-tech.com  Sun Feb  6 09:06:56 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Sun, 6 Feb 2011 16:06:56 +0200
Subject: Manipulating boot environment from user-space
Message-ID: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>

Hi,

Is there a way to change values in the environment used by barebox
after booting? e.g. already in the linux user space of device booted?

Thanks,

Boaz.

From baruch at tkos.co.il  Sun Feb  6 09:34:41 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Sun, 6 Feb 2011 16:34:41 +0200
Subject: Manipulating boot environment from user-space
In-Reply-To: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
Message-ID: <20110206143440.GA26377@tarshish>

Hi Boaz,

On Sun, Feb 06, 2011 at 04:06:56PM +0200, Boaz Ben-David wrote:
> Is there a way to change values in the environment used by barebox
> after booting? e.g. already in the linux user space of device booted?

Use the bareboxenv utility. See scripts/bareboxenv.c.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From boaz.bd at wellsense-tech.com  Sun Feb  6 09:43:12 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Sun, 6 Feb 2011 16:43:12 +0200
Subject: Manipulating boot environment from user-space
In-Reply-To: <20110206143440.GA26377@tarshish>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
	<20110206143440.GA26377@tarshish>
Message-ID: <39A4B204C321D34DA3490E3B119D5A6C68C006F855@SBS2008.wellsense.local>

This is exactly what I was looking for, thanks.
Now I need to make it cross-compile...

On Sun, 2011-02-06 at 16:34 +0200, Baruch Siach wrote:
> Hi Boaz,
> 
> On Sun, Feb 06, 2011 at 04:06:56PM +0200, Boaz Ben-David wrote:
> > Is there a way to change values in the environment used by barebox
> > after booting? e.g. already in the linux user space of device booted?
> 
> Use the bareboxenv utility. See scripts/bareboxenv.c.
> 
> baruch
> 
> -- 
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From boaz.bd at wellsense-tech.com  Sun Feb  6 09:56:33 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Sun, 6 Feb 2011 16:56:33 +0200
Subject: Manipulating boot environment from user-space
In-Reply-To: <20110206143440.GA26377@tarshish>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
	<20110206143440.GA26377@tarshish>
Message-ID: <39A4B204C321D34DA3490E3B119D5A6C68C006F856@SBS2008.wellsense.local>

Nevermind, simple enough...

just arm-none-linux-gnueabi-gcc bareboxenv.c -o bareboxenv

Thanks.

On Sun, 2011-02-06 at 16:34 +0200, Baruch Siach wrote:
> Hi Boaz,
> 
> On Sun, Feb 06, 2011 at 04:06:56PM +0200, Boaz Ben-David wrote:
> > Is there a way to change values in the environment used by barebox
> > after booting? e.g. already in the linux user space of device booted?
> 
> Use the bareboxenv utility. See scripts/bareboxenv.c.
> 
> baruch
> 
> -- 
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From marek.belisko at gmail.com  Sun Feb  6 11:36:57 2011
From: marek.belisko at gmail.com (Belisko Marek)
Date: Sun, 6 Feb 2011 17:36:57 +0100
Subject: Manipulating boot environment from user-space
In-Reply-To: <20110206143440.GA26377@tarshish>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
	<20110206143440.GA26377@tarshish>
Message-ID: <AANLkTimsb2yaVC6Jun75xLZvkkNVAoKjovdVe3bGna7n@mail.gmail.com>

On Sun, Feb 6, 2011 at 3:34 PM, Baruch Siach <baruch at tkos.co.il> wrote:
> Hi Boaz,
>
> On Sun, Feb 06, 2011 at 04:06:56PM +0200, Boaz Ben-David wrote:
>> Is there a way to change values in the environment used by barebox
>> after booting? e.g. already in the linux user space of device booted?
>
> Use the bareboxenv utility. See scripts/bareboxenv.c.
Shouldn't make sense add this utility to busybox?>
> baruch
>
> --
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ~. .~ ? Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
> ? - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>

thanks,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
icq: 290551086
web: http://open-nandra.com


From boaz.bd at wellsense-tech.com  Mon Feb  7 07:52:21 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Mon, 7 Feb 2011 14:52:21 +0200
Subject: Manipulating boot environment from user-space
In-Reply-To: <AANLkTimsb2yaVC6Jun75xLZvkkNVAoKjovdVe3bGna7n@mail.gmail.com>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
	<20110206143440.GA26377@tarshish>
	<AANLkTimsb2yaVC6Jun75xLZvkkNVAoKjovdVe3bGna7n@mail.gmail.com>
Message-ID: <39A4B204C321D34DA3490E3B119D5A6C68C006F85C@SBS2008.wellsense.local>

I think that would be nice.

On Sun, 2011-02-06 at 17:36 +0100, Belisko Marek wrote:
> On Sun, Feb 6, 2011 at 3:34 PM, Baruch Siach <baruch at tkos.co.il> wrote:
> > Hi Boaz,
> >
> > On Sun, Feb 06, 2011 at 04:06:56PM +0200, Boaz Ben-David wrote:
> >> Is there a way to change values in the environment used by barebox
> >> after booting? e.g. already in the linux user space of device booted?
> >
> > Use the bareboxenv utility. See scripts/bareboxenv.c.
> Shouldn't make sense add this utility to busybox?>
> > baruch
> >
> > --
> >                                                     ~. .~   Tk Open Systems
> > =}------------------------------------------------ooO--U--Ooo------------{=
> >   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
> >
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox
> >
> 
> thanks,
> 
> marek
> 
> -- 
> as simple and primitive as possible
> -------------------------------------------------
> Marek Belisko - OPEN-NANDRA
> Freelance Developer
> 
> Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
> Tel: +421 915 052 184
> skype: marekwhite
> icq: 290551086
> web: http://open-nandra.com


From baruch at tkos.co.il  Mon Feb  7 08:00:55 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Mon, 7 Feb 2011 15:00:55 +0200
Subject: Manipulating boot environment from user-space
In-Reply-To: <39A4B204C321D34DA3490E3B119D5A6C68C006F85C@SBS2008.wellsense.local>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
	<20110206143440.GA26377@tarshish>
	<AANLkTimsb2yaVC6Jun75xLZvkkNVAoKjovdVe3bGna7n@mail.gmail.com>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F85C@SBS2008.wellsense.local>
Message-ID: <20110207130054.GG2586@jasper.tkos.co.il>

Hi Boaz, Belisko,

On Mon, Feb 07, 2011 at 02:52:21PM +0200, Boaz Ben-David wrote:
> I think that would be nice.

Patches are very much welcome at busybox at busybox.net.

baruch

> On Sun, 2011-02-06 at 17:36 +0100, Belisko Marek wrote:
> > On Sun, Feb 6, 2011 at 3:34 PM, Baruch Siach <baruch at tkos.co.il> wrote:
> > > Hi Boaz,
> > > On Sun, Feb 06, 2011 at 04:06:56PM +0200, Boaz Ben-David wrote:
> > >> Is there a way to change values in the environment used by barebox
> > >> after booting? e.g. already in the linux user space of device booted?
> > >
> > > Use the bareboxenv utility. See scripts/bareboxenv.c.
> > Shouldn't make sense add this utility to busybox?>
> > > baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From marek.belisko at gmail.com  Mon Feb  7 08:06:27 2011
From: marek.belisko at gmail.com (Belisko Marek)
Date: Mon, 7 Feb 2011 14:06:27 +0100
Subject: Manipulating boot environment from user-space
In-Reply-To: <20110207130054.GG2586@jasper.tkos.co.il>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F854@SBS2008.wellsense.local>
	<20110206143440.GA26377@tarshish>
	<AANLkTimsb2yaVC6Jun75xLZvkkNVAoKjovdVe3bGna7n@mail.gmail.com>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F85C@SBS2008.wellsense.local>
	<20110207130054.GG2586@jasper.tkos.co.il>
Message-ID: <AANLkTikHmRBdJJQve8Ruk7tdiuHP-vN+WteVGcfTU_97@mail.gmail.com>

Hi Baruch,

On Mon, Feb 7, 2011 at 2:00 PM, Baruch Siach <baruch at tkos.co.il> wrote:
> Hi Boaz, Belisko,
>
> On Mon, Feb 07, 2011 at 02:52:21PM +0200, Boaz Ben-David wrote:
>> I think that would be nice.
>
> Patches are very much welcome at busybox at busybox.net.
OK will work on it ;)
>
> baruch
>
>> On Sun, 2011-02-06 at 17:36 +0100, Belisko Marek wrote:
>> > On Sun, Feb 6, 2011 at 3:34 PM, Baruch Siach <baruch at tkos.co.il> wrote:
>> > > Hi Boaz,
>> > > On Sun, Feb 06, 2011 at 04:06:56PM +0200, Boaz Ben-David wrote:
>> > >> Is there a way to change values in the environment used by barebox
>> > >> after booting? e.g. already in the linux user space of device booted?
>> > >
>> > > Use the bareboxenv utility. See scripts/bareboxenv.c.
>> > Shouldn't make sense add this utility to busybox?>
>> > > baruch
>
> --
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ~. .~ ? Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
> ? - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
>

thanks,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
icq: 290551086
web: http://open-nandra.com


From mickael.chazaux at gmail.com  Wed Feb  9 10:26:50 2011
From: mickael.chazaux at gmail.com (Mickael Chazaux)
Date: Wed, 9 Feb 2011 16:26:50 +0100
Subject: Compile failure (as of fri Feb 4 13:50:49 2011 +0100, c5dd4c4d0a6a6)
Message-ID: <AANLkTikbxuCpCj7Et3V20vBwBdkmHXFMmtxy+nhYu_LB@mail.gmail.com>

Hi,

ARCH=arm
CROSS_COMPILE=/home/mc/OE/tmp/sysroots/i686-linux/usr/armv5te/bin/arm-angstrom-linux-gnueabi-

git clone, make menuconfig, not touching anything, exit, save, make
gives this [1]. Seems the buildsystem tries to cross-compile stuff
under scripts/.

Regards,

Mickael

[1]
mc at ubuntu:~/T?l?chargements/barebox$ make menuconfig
  HOSTCC  scripts/kconfig/lxdialog/checklist.o
  HOSTCC  scripts/kconfig/lxdialog/inputbox.o
  HOSTCC  scripts/kconfig/lxdialog/menubox.o
  HOSTCC  scripts/kconfig/lxdialog/textbox.o
  HOSTCC  scripts/kconfig/lxdialog/util.o
  HOSTCC  scripts/kconfig/lxdialog/yesno.o
  HOSTCC  scripts/kconfig/mconf.o
  HOSTLD  scripts/kconfig/mconf
scripts/kconfig/mconf Kconfig
#
# configuration written to .config
#


*** End of the configuration.
*** Execute 'make' to start the build or try 'make help'.

mc at ubuntu:~/T?l?chargements/barebox$ make
scripts/kconfig/conf --silentoldconfig Kconfig
make[1]: ? include/generated/mach-types.h ? est ? jour.
  CHK     include/generated/version.h
  UPD     include/generated/version.h
  CHK     include/generated/utsrelease.h
  UPD     include/generated/utsrelease.h
  SYMLINK include/asm -> include/asm-arm
  SYMLINK include/config.h -> arch/arm/boards/at91sam9260ek//config.h
  CC      scripts/mod/empty.o
  HOSTCC  scripts/mod/mk_elfconfig
  MKELF   scripts/mod/elfconfig.h
  HOSTCC  scripts/mod/modpost.o
  HOSTCC  scripts/mod/sumversion.o
  HOSTLD  scripts/mod/modpost
  HOSTCC  scripts/bin2c
  HOSTCC  scripts/mkimage
  HOSTCC  scripts/bareboxenv
  CC      common/hush.o
  CC      common/date.o
  CC      common/dlmalloc.o
  CC      common/clock.o
  CC      common/command.o
  CC      common/console.o
  CC      /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.o
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:11:19:
erreur: ctype.h : Aucun fichier ou dossier de ce type
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:14:20:
erreur: limits.h : Aucun fichier ou dossier de ce type
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:18:20:
erreur: unistd.h : Aucun fichier ou dossier de ce type
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:19:20:
erreur: locale.h : Aucun fichier ou dossier de ce type
In file included from /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:9,
                 from
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:22:
/home/mc/T?l?chargements/barebox/scripts/kconfig/expr.h:212: erreur:
expected declaration specifiers or ?...? before ?FILE?
Dans le fichier inclus ? partir de
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:22:
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:12:22: erreur:
libintl.h : Aucun fichier ou dossier de ce type
In file included from
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:22:
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:76: erreur:
expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:78: erreur:
expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:85: erreur:
expected declaration specifiers or ?...? before ?FILE?
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:96: erreur:
expected declaration specifiers or ?...? before ?FILE?
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h: In function ?xfwrite?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: attention :
implicit declaration of function ?fwrite?
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: erreur:
?out? undeclared (first use in this function)
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: erreur:
(Each undeclared identifier is reported only once
/home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: erreur: for
each function it appears in.)
Dans le fichier inclus ? partir de
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:23:
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:21:23:
erreur: sys/types.h : Aucun fichier ou dossier de ce type
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:38:10:
erreur: #include attend "NOM_DE_FICHIER" ou <NOM_DE_FICHIER>
In file included from
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:23:
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:
Hors de toute fonction :
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:103:
erreur: expected specifier-qualifier-list before ?chtype?
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:193:
erreur: expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:199:
erreur: expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:201:
erreur: expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:202:
erreur: expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:203:
erreur: expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:204:
erreur: expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:206:
erreur: expected ?)? before ?*? token
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:286: erreur:
?PATH_MAX? undeclared here (not in a function)
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?set_config_filename?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:289:
attention : unused variable ?menu_backtitle?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?search_conf?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:312:
attention : implicit declaration of function ?gettext?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:315:
attention : passing argument 1 of ?dialog_inputbox? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:315:
attention : passing argument 2 of ?dialog_inputbox? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:320:
attention : passing argument 1 of ?show_helptext? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:328:
attention : implicit declaration of function ?strncasecmp?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:333:
attention : implicit declaration of function ?free?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:334:
attention : passing argument 1 of ?show_textbox? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?build_conf?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:366:
attention : assignment makes pointer from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:494:
attention : non concordance entre pointeur et entier dans une
expression conditionnelle
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:502:
attention : non concordance entre pointeur et entier dans une
expression conditionnelle
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function ?conf?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:534:
attention : passing argument 1 of ?item_make? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:536:
attention : passing argument 1 of ?item_make? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:542:
attention : passing argument 1 of ?dialog_menu? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:542:
attention : passing argument 2 of ?dialog_menu? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:543: erreur:
?KEY_MAX? undeclared (first use in this function)
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:587:
attention : passing argument 1 of ?show_helptext? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:587:
attention : passing argument 2 of ?show_helptext? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?show_help?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:636:
attention : implicit declaration of function ?getmaxx?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:636: erreur:
?stdscr? undeclared (first use in this function)
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:639:
attention : passing argument 1 of ?show_helptext? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?conf_choice?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:645:
attention : initialization makes pointer from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:674:
attention : passing argument 1 of ?dialog_checklist? makes pointer
from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:674:
attention : passing argument 2 of ?dialog_checklist? makes pointer
from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:696: erreur:
?KEY_MAX? undeclared (first use in this function)
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?conf_string?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:712:
attention : assignment makes pointer from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:715:
attention : assignment makes pointer from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:718:
attention : assignment makes pointer from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:721:
attention : assignment makes pointer from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:726:
attention : passing argument 1 of ?dialog_inputbox? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:731:
attention : passing argument 2 of ?show_textbox? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?conf_load?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:759:
attention : passing argument 2 of ?show_textbox? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:762:
attention : passing argument 1 of ?show_helptext? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
?conf_save?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:785:
attention : passing argument 2 of ?show_textbox? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:788:
attention : passing argument 1 of ?show_helptext? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function ?main?:
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:802:
attention : implicit declaration of function ?setlocale?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:802: erreur:
?LC_ALL? undeclared (first use in this function)
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:803:
attention : implicit declaration of function ?bindtextdomain?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:804:
attention : implicit declaration of function ?textdomain?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:809:
attention : implicit declaration of function ?getenv?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:809:
attention : assignment makes pointer from integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:811:
attention : implicit declaration of function ?strcasecmp?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:815:
attention : implicit declaration of function ?initscr?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:817:
attention : implicit declaration of function ?getyx?
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:817: erreur:
?stdscr? undeclared (first use in this function)
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:833:
attention : passing argument 2 of ?dialog_yesno? makes pointer from
integer without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:842:
attention : passing argument 2 of ?fprintf? makes pointer from integer
without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:849:
attention : passing argument 1 of ?printf? makes pointer from integer
without a cast
/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:855:
attention : passing argument 2 of ?fprintf? makes pointer from integer
without a cast
make[1]: *** [/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.o] Erreur 1
make: *** [common] Erreur 2


From s.hauer at pengutronix.de  Wed Feb  9 10:43:09 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 9 Feb 2011 16:43:09 +0100
Subject: Compile failure (as of fri Feb 4 13:50:49 2011 +0100,
	c5dd4c4d0a6a6)
In-Reply-To: <AANLkTikbxuCpCj7Et3V20vBwBdkmHXFMmtxy+nhYu_LB@mail.gmail.com>
References: <AANLkTikbxuCpCj7Et3V20vBwBdkmHXFMmtxy+nhYu_LB@mail.gmail.com>
Message-ID: <20110209154309.GO9041@pengutronix.de>

Hi Mickael,

On Wed, Feb 09, 2011 at 04:26:50PM +0100, Mickael Chazaux wrote:
> Hi,
> 
> ARCH=arm
> CROSS_COMPILE=/home/mc/OE/tmp/sysroots/i686-linux/usr/armv5te/bin/arm-angstrom-linux-gnueabi-
> 
> git clone, make menuconfig, not touching anything, exit, save, make
> gives this [1]. Seems the buildsystem tries to cross-compile stuff
> under scripts/.

This happens when CONFIG_DEFAULT_ENVIRONMENT=y is combined with
CONFIG_DEFAULT_ENVIRONMENT_PATH="". This configuration is not
particularly useful but of course should not break the build. I haven't
looked deeply into it and currently do not have a fix.
For now disable CONFIG_DEFAULT_ENVIRONMENT or specify a (relative) path
to your environment directory in CONFIG_DEFAULT_ENVIRONMENT_PATH

Sascha

> 
> Regards,
> 
> Mickael
> 
> [1]
> mc at ubuntu:~/T?l?chargements/barebox$ make menuconfig
>   HOSTCC  scripts/kconfig/lxdialog/checklist.o
>   HOSTCC  scripts/kconfig/lxdialog/inputbox.o
>   HOSTCC  scripts/kconfig/lxdialog/menubox.o
>   HOSTCC  scripts/kconfig/lxdialog/textbox.o
>   HOSTCC  scripts/kconfig/lxdialog/util.o
>   HOSTCC  scripts/kconfig/lxdialog/yesno.o
>   HOSTCC  scripts/kconfig/mconf.o
>   HOSTLD  scripts/kconfig/mconf
> scripts/kconfig/mconf Kconfig
> #
> # configuration written to .config
> #
> 
> 
> *** End of the configuration.
> *** Execute 'make' to start the build or try 'make help'.
> 
> mc at ubuntu:~/T?l?chargements/barebox$ make
> scripts/kconfig/conf --silentoldconfig Kconfig
> make[1]: ? include/generated/mach-types.h ? est ? jour.
>   CHK     include/generated/version.h
>   UPD     include/generated/version.h
>   CHK     include/generated/utsrelease.h
>   UPD     include/generated/utsrelease.h
>   SYMLINK include/asm -> include/asm-arm
>   SYMLINK include/config.h -> arch/arm/boards/at91sam9260ek//config.h
>   CC      scripts/mod/empty.o
>   HOSTCC  scripts/mod/mk_elfconfig
>   MKELF   scripts/mod/elfconfig.h
>   HOSTCC  scripts/mod/modpost.o
>   HOSTCC  scripts/mod/sumversion.o
>   HOSTLD  scripts/mod/modpost
>   HOSTCC  scripts/bin2c
>   HOSTCC  scripts/mkimage
>   HOSTCC  scripts/bareboxenv
>   CC      common/hush.o
>   CC      common/date.o
>   CC      common/dlmalloc.o
>   CC      common/clock.o
>   CC      common/command.o
>   CC      common/console.o
>   CC      /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.o
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:11:19:
> erreur: ctype.h : Aucun fichier ou dossier de ce type
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:14:20:
> erreur: limits.h : Aucun fichier ou dossier de ce type
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:18:20:
> erreur: unistd.h : Aucun fichier ou dossier de ce type
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:19:20:
> erreur: locale.h : Aucun fichier ou dossier de ce type
> In file included from /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:9,
>                  from
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:22:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/expr.h:212: erreur:
> expected declaration specifiers or ?...? before ?FILE?
> Dans le fichier inclus ? partir de
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:22:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:12:22: erreur:
> libintl.h : Aucun fichier ou dossier de ce type
> In file included from
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:22:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:76: erreur:
> expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:78: erreur:
> expected ?=?, ?,?, ?;?, ?asm? or ?__attribute__? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:85: erreur:
> expected declaration specifiers or ?...? before ?FILE?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:96: erreur:
> expected declaration specifiers or ?...? before ?FILE?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h: In function ?xfwrite?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: attention :
> implicit declaration of function ?fwrite?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: erreur:
> ?out? undeclared (first use in this function)
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: erreur:
> (Each undeclared identifier is reported only once
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lkc.h:98: erreur: for
> each function it appears in.)
> Dans le fichier inclus ? partir de
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:23:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:21:23:
> erreur: sys/types.h : Aucun fichier ou dossier de ce type
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:38:10:
> erreur: #include attend "NOM_DE_FICHIER" ou <NOM_DE_FICHIER>
> In file included from
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:23:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:
> Hors de toute fonction :
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:103:
> erreur: expected specifier-qualifier-list before ?chtype?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:193:
> erreur: expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:199:
> erreur: expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:201:
> erreur: expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:202:
> erreur: expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:203:
> erreur: expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:204:
> erreur: expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/lxdialog/dialog.h:206:
> erreur: expected ?)? before ?*? token
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:286: erreur:
> ?PATH_MAX? undeclared here (not in a function)
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?set_config_filename?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:289:
> attention : unused variable ?menu_backtitle?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?search_conf?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:312:
> attention : implicit declaration of function ?gettext?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:315:
> attention : passing argument 1 of ?dialog_inputbox? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:315:
> attention : passing argument 2 of ?dialog_inputbox? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:320:
> attention : passing argument 1 of ?show_helptext? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:328:
> attention : implicit declaration of function ?strncasecmp?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:333:
> attention : implicit declaration of function ?free?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:334:
> attention : passing argument 1 of ?show_textbox? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?build_conf?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:366:
> attention : assignment makes pointer from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:494:
> attention : non concordance entre pointeur et entier dans une
> expression conditionnelle
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:502:
> attention : non concordance entre pointeur et entier dans une
> expression conditionnelle
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function ?conf?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:534:
> attention : passing argument 1 of ?item_make? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:536:
> attention : passing argument 1 of ?item_make? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:542:
> attention : passing argument 1 of ?dialog_menu? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:542:
> attention : passing argument 2 of ?dialog_menu? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:543: erreur:
> ?KEY_MAX? undeclared (first use in this function)
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:587:
> attention : passing argument 1 of ?show_helptext? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:587:
> attention : passing argument 2 of ?show_helptext? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?show_help?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:636:
> attention : implicit declaration of function ?getmaxx?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:636: erreur:
> ?stdscr? undeclared (first use in this function)
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:639:
> attention : passing argument 1 of ?show_helptext? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?conf_choice?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:645:
> attention : initialization makes pointer from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:674:
> attention : passing argument 1 of ?dialog_checklist? makes pointer
> from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:674:
> attention : passing argument 2 of ?dialog_checklist? makes pointer
> from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:696: erreur:
> ?KEY_MAX? undeclared (first use in this function)
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?conf_string?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:712:
> attention : assignment makes pointer from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:715:
> attention : assignment makes pointer from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:718:
> attention : assignment makes pointer from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:721:
> attention : assignment makes pointer from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:726:
> attention : passing argument 1 of ?dialog_inputbox? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:731:
> attention : passing argument 2 of ?show_textbox? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?conf_load?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:759:
> attention : passing argument 2 of ?show_textbox? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:762:
> attention : passing argument 1 of ?show_helptext? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function
> ?conf_save?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:785:
> attention : passing argument 2 of ?show_textbox? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:788:
> attention : passing argument 1 of ?show_helptext? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c: In function ?main?:
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:802:
> attention : implicit declaration of function ?setlocale?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:802: erreur:
> ?LC_ALL? undeclared (first use in this function)
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:803:
> attention : implicit declaration of function ?bindtextdomain?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:804:
> attention : implicit declaration of function ?textdomain?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:809:
> attention : implicit declaration of function ?getenv?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:809:
> attention : assignment makes pointer from integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:811:
> attention : implicit declaration of function ?strcasecmp?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:815:
> attention : implicit declaration of function ?initscr?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:817:
> attention : implicit declaration of function ?getyx?
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:817: erreur:
> ?stdscr? undeclared (first use in this function)
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:833:
> attention : passing argument 2 of ?dialog_yesno? makes pointer from
> integer without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:842:
> attention : passing argument 2 of ?fprintf? makes pointer from integer
> without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:849:
> attention : passing argument 1 of ?printf? makes pointer from integer
> without a cast
> /home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.c:855:
> attention : passing argument 2 of ?fprintf? makes pointer from integer
> without a cast
> make[1]: *** [/home/mc/T?l?chargements/barebox/scripts/kconfig/mconf.o] Erreur 1
> make: *** [common] Erreur 2
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mickael.chazaux at gmail.com  Wed Feb  9 11:14:58 2011
From: mickael.chazaux at gmail.com (Mickael Chazaux)
Date: Wed, 9 Feb 2011 17:14:58 +0100
Subject: Compile failure (as of fri Feb 4 13:50:49 2011 +0100,
	c5dd4c4d0a6a6)
In-Reply-To: <20110209154309.GO9041@pengutronix.de>
References: <AANLkTikbxuCpCj7Et3V20vBwBdkmHXFMmtxy+nhYu_LB@mail.gmail.com>
	<20110209154309.GO9041@pengutronix.de>
Message-ID: <AANLkTimS2eJ1u5mH3Bfqq3OrLSQ+UtswP4A-egg1qx-O@mail.gmail.com>

Hi,

2011/2/9 Sascha Hauer <s.hauer at pengutronix.de>:
> Hi Mickael,
>
> On Wed, Feb 09, 2011 at 04:26:50PM +0100, Mickael Chazaux wrote:
>> Hi,
>>
>> ARCH=arm
>> CROSS_COMPILE=/home/mc/OE/tmp/sysroots/i686-linux/usr/armv5te/bin/arm-angstrom-linux-gnueabi-
>>
>> git clone, make menuconfig, not touching anything, exit, save, make
>> gives this [1]. Seems the buildsystem tries to cross-compile stuff
>> under scripts/.
>
> This happens when CONFIG_DEFAULT_ENVIRONMENT=y is combined with
> CONFIG_DEFAULT_ENVIRONMENT_PATH="". This configuration is not
> particularly useful but of course should not break the build. I haven't
> looked deeply into it and currently do not have a fix.
> For now disable CONFIG_DEFAULT_ENVIRONMENT or specify a (relative) path
> to your environment directory in CONFIG_DEFAULT_ENVIRONMENT_PATH
>
Thank you, it helps.

Mickael


From robert at schwebel.de  Wed Feb  9 12:07:24 2011
From: robert at schwebel.de (Robert Schwebel)
Date: Wed, 9 Feb 2011 18:07:24 +0100
Subject: [PATCH] tx28: fix kconfig warning
Message-ID: <20110209170724.GK22009@pengutronix.de>

Without this patch (against next) I get this:

rsc at thebe:barebox$ make ARCH=arm CROSS_COMPILE=<path>/arm-v5te-linux-gnueabi- menuconfig
  HOSTCC  scripts/kconfig/lxdialog/checklist.o
  HOSTCC  scripts/kconfig/lxdialog/inputbox.o
  HOSTCC  scripts/kconfig/lxdialog/menubox.o
  HOSTCC  scripts/kconfig/lxdialog/textbox.o
  HOSTCC  scripts/kconfig/lxdialog/util.o
  HOSTCC  scripts/kconfig/lxdialog/yesno.o
  HOSTCC  scripts/kconfig/mconf.o
  HOSTLD  scripts/kconfig/mconf
scripts/kconfig/mconf Kconfig
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)

Add the option for the FEC on MX28 as well.

Signed-off-by: Robert Schwebel <r.schwebel at pengutronix.de>
---
 arch/arm/mach-mxs/Kconfig |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index f9cefaf..3a19a98 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -61,6 +61,9 @@ config MACH_TX28
 
 endchoice
 
+config ARCH_HAS_FEC_IMX
+	bool
+
 endif
 
 menu "Board specific settings       "
-- 
1.7.2.3

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From plagnioj at jcrosoft.com  Wed Feb  9 22:32:00 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 10 Feb 2011 04:32:00 +0100
Subject: [PATCH 4/4] devices_shutdown: move remove call to bus
In-Reply-To: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
References: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1297308720-26390-4-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 drivers/base/driver.c   |    4 ++--
 drivers/base/platform.c |    3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/base/driver.c b/drivers/base/driver.c
index bd7464e..6ad61f7 100644
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c
@@ -259,8 +259,8 @@ void devices_shutdown(void)
 	struct device_d *dev;
 
 	list_for_each_entry(dev, &active, active) {
-		if (dev->driver->remove)
-			dev->driver->remove(dev);
+		if (dev->bus->remove)
+			dev->bus->remove(dev);
 	}
 }
 
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index f1ee38c..e0a83b9 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -34,7 +34,8 @@ static int platform_probe(struct device_d *dev)
 
 static void platform_remove(struct device_d *dev)
 {
-	dev->driver->remove(dev);
+	if (dev->driver->remove)
+		dev->driver->remove(dev);
 }
 
 struct bus_type platform_bus = {
-- 
1.7.2.3



From plagnioj at jcrosoft.com  Wed Feb  9 22:31:59 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 10 Feb 2011 04:31:59 +0100
Subject: [PATCH 3/4] driver/memmap: fix generic_memmap_rw and generic_memmap_ro
In-Reply-To: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
References: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1297308720-26390-3-git-send-email-plagnioj@jcrosoft.com>

we check before the RW access for generic_memmap_ro instead of
generic_memmap_rw

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 drivers/base/driver.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/base/driver.c b/drivers/base/driver.c
index ff92e44..bd7464e 100644
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c
@@ -223,8 +223,6 @@ int generic_memmap_ro(struct cdev *cdev, void **map, int flags)
 	if (!cdev->dev)
 		return -EINVAL;
 
-	if (flags & PROT_WRITE)
-		return -EACCES;
 	*map = (void *)cdev->dev->map_base;
 	return 0;
 }
@@ -234,6 +232,9 @@ int generic_memmap_rw(struct cdev *cdev, void **map, int flags)
 	if (!cdev->dev)
 		return -EINVAL;
 
+	if (flags & PROT_WRITE)
+		return -EACCES;
+
 	*map = (void *)cdev->dev->map_base;
 	return 0;
 }
-- 
1.7.2.3



From plagnioj at jcrosoft.com  Wed Feb  9 22:31:57 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 10 Feb 2011 04:31:57 +0100
Subject: [PATCH 1/4] bus: remove dead code
Message-ID: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 lib/bus.c |   13 -------------
 1 files changed, 0 insertions(+), 13 deletions(-)

diff --git a/lib/bus.c b/lib/bus.c
index e0dd9ea..c34982e 100644
--- a/lib/bus.c
+++ b/lib/bus.c
@@ -43,16 +43,3 @@ struct bus_type platform_bus = {
 	.probe = platform_probe,
 	.remove = platform_remove,
 };
-
-#if 0
-LIST_HEAD(bus_list);
-EXPORT_SYMBOL(bus_list);
-
-int bus_register(struct bus_type *bus)
-{
-	list_add_tail(&bus->list, &bus_list);
-
-	return 0;
-}
-#endif
-
-- 
1.7.2.3



From plagnioj at jcrosoft.com  Wed Feb  9 22:31:58 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 10 Feb 2011 04:31:58 +0100
Subject: [PATCH 2/4] bus/driver: move from lib to drivers/base
In-Reply-To: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
References: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <1297308720-26390-2-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 drivers/Makefile        |    1 +
 drivers/base/Makefile   |    2 +
 drivers/base/driver.c   |  380 +++++++++++++++++++++++++++++++++++++++++++++++
 drivers/base/platform.c |   45 ++++++
 lib/Makefile            |    2 -
 lib/bus.c               |   45 ------
 lib/driver.c            |  380 -----------------------------------------------
 7 files changed, 428 insertions(+), 427 deletions(-)
 create mode 100644 drivers/base/Makefile
 create mode 100644 drivers/base/driver.c
 create mode 100644 drivers/base/platform.c
 delete mode 100644 lib/bus.c
 delete mode 100644 lib/driver.c

diff --git a/drivers/Makefile b/drivers/Makefile
index b1b402f..9a90434 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -1,3 +1,4 @@
+obj-y	+= base/
 obj-y	+= net/
 obj-y	+= serial/
 obj-y	+= mtd/
diff --git a/drivers/base/Makefile b/drivers/base/Makefile
new file mode 100644
index 0000000..dcec449
--- /dev/null
+++ b/drivers/base/Makefile
@@ -0,0 +1,2 @@
+obj-y			+= driver.o
+obj-y			+= platform.o
diff --git a/drivers/base/driver.c b/drivers/base/driver.c
new file mode 100644
index 0000000..ff92e44
--- /dev/null
+++ b/drivers/base/driver.c
@@ -0,0 +1,380 @@
+/*
+ * driver.c - barebox driver model
+ *
+ * Copyright (c) 2007 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+/**
+ * @file
+ * @brief barebox's driver model, and devinfo command
+ */
+
+#include <common.h>
+#include <command.h>
+#include <driver.h>
+#include <malloc.h>
+#include <linux/ctype.h>
+#include <errno.h>
+#include <fs.h>
+#include <linux/list.h>
+
+LIST_HEAD(device_list);
+EXPORT_SYMBOL(device_list);
+
+LIST_HEAD(driver_list);
+EXPORT_SYMBOL(driver_list);
+
+static LIST_HEAD(active);
+
+struct device_d *get_device_by_name(const char *name)
+{
+	struct device_d *dev;
+
+	for_each_device(dev) {
+		if(!strcmp(dev_name(dev), name))
+			return dev;
+	}
+
+	return NULL;
+}
+
+static struct device_d *get_device_by_name_id(const char *name, int id)
+{
+	struct device_d *dev;
+
+	for_each_device(dev) {
+		if(!strcmp(dev->name, name) && id == dev->id)
+			return dev;
+	}
+
+	return NULL;
+}
+
+int get_free_deviceid(const char *name_template)
+{
+	int i = 0;
+
+	while (1) {
+		if (!get_device_by_name_id(name_template, i))
+			return i;
+		i++;
+	};
+}
+
+static int match(struct driver_d *drv, struct device_d *dev)
+{
+	if (dev->driver)
+		return -1;
+
+	dev->driver = drv;
+
+	if (dev->bus != drv->bus)
+		goto err_out;
+	if (dev->bus->match(dev, drv))
+		goto err_out;
+	if (dev->bus->probe(dev))
+		goto err_out;
+
+	list_add(&dev->active, &active);
+
+	return 0;
+err_out:
+	dev->driver = NULL;
+	return -1;
+}
+
+int register_device(struct device_d *new_device)
+{
+	struct driver_d *drv;
+
+	if (new_device->id < 0) {
+		new_device->id = get_free_deviceid(new_device->name);
+	} else {
+		if (get_device_by_name_id(new_device->name, new_device->id)) {
+			eprintf("register_device: already registered %s\n",
+				dev_name(new_device));
+			return -EINVAL;
+		}
+	}
+
+	debug ("register_device: %s\n", dev_name(new_device));
+
+	if (!new_device->bus) {
+//		dev_err(new_device, "no bus type associated. Needs fixup\n");
+		new_device->bus = &platform_bus;
+	}
+
+	list_add_tail(&new_device->list, &device_list);
+	INIT_LIST_HEAD(&new_device->children);
+	INIT_LIST_HEAD(&new_device->cdevs);
+	INIT_LIST_HEAD(&new_device->parameters);
+
+	for_each_driver(drv) {
+		if (!match(drv, new_device))
+			break;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(register_device);
+
+int unregister_device(struct device_d *old_dev)
+{
+	debug("unregister_device: %s\n", dev_name(old_dev));
+
+	if (!list_empty(&old_dev->children)) {
+		errno = -EBUSY;
+		return errno;
+	}
+
+	if (old_dev->driver)
+		old_dev->bus->remove(old_dev);
+
+	list_del(&old_dev->list);
+
+	/* remove device from parents child list */
+	if (old_dev->parent)
+		list_del(&old_dev->sibling);
+
+	return 0;
+}
+EXPORT_SYMBOL(unregister_device);
+
+int dev_add_child(struct device_d *dev, struct device_d *child)
+{
+	child->parent = dev;
+
+	list_add_tail(&child->sibling, &dev->children);
+
+	return 0;
+}
+EXPORT_SYMBOL(dev_add_child);
+
+struct driver_d *get_driver_by_name(const char *name)
+{
+	struct driver_d *drv;
+
+	for_each_driver(drv) {
+		if(!strcmp(name, drv->name))
+			return drv;
+	}
+
+	return NULL;
+}
+
+static void noinfo(struct device_d *dev)
+{
+	printf("no info available for %s\n", dev_name(dev));
+}
+
+static void noshortinfo(struct device_d *dev)
+{
+}
+
+int register_driver(struct driver_d *drv)
+{
+	struct device_d *dev = NULL;
+
+	debug("register_driver: %s\n", drv->name);
+
+	if (!drv->bus) {
+//		pr_err("driver %s has no bus type associated. Needs fixup\n", drv->name);
+		drv->bus = &platform_bus;
+	}
+
+	list_add_tail(&drv->list, &driver_list);
+
+	if (!drv->info)
+		drv->info = noinfo;
+	if (!drv->shortinfo)
+		drv->shortinfo = noshortinfo;
+
+	for_each_device(dev)
+		match(drv, dev);
+
+	return 0;
+}
+EXPORT_SYMBOL(register_driver);
+
+int dev_protect(struct device_d *dev, size_t count, unsigned long offset, int prot)
+{
+	printf("%s: currently broken\n", __func__);
+	return -EINVAL;
+}
+
+int generic_memmap_ro(struct cdev *cdev, void **map, int flags)
+{
+	if (!cdev->dev)
+		return -EINVAL;
+
+	if (flags & PROT_WRITE)
+		return -EACCES;
+	*map = (void *)cdev->dev->map_base;
+	return 0;
+}
+
+int generic_memmap_rw(struct cdev *cdev, void **map, int flags)
+{
+	if (!cdev->dev)
+		return -EINVAL;
+
+	*map = (void *)cdev->dev->map_base;
+	return 0;
+}
+
+int dummy_probe(struct device_d *dev)
+{
+	return 0;
+}
+EXPORT_SYMBOL(dummy_probe);
+
+const char *dev_id(const struct device_d *dev)
+{
+	static char buf[sizeof(unsigned long) * 2];
+
+	sprintf(buf, FORMAT_DRIVER_MANE_ID, dev->name, dev->id);
+
+	return buf;
+}
+
+void devices_shutdown(void)
+{
+	struct device_d *dev;
+
+	list_for_each_entry(dev, &active, active) {
+		if (dev->driver->remove)
+			dev->driver->remove(dev);
+	}
+}
+
+#ifdef CONFIG_CMD_DEVINFO
+static int do_devinfo_subtree(struct device_d *dev, int depth, char edge)
+{
+	struct device_d *child;
+	struct cdev *cdev;
+	int i;
+
+	for (i = 0; i < depth; i++)
+		printf("|    ");
+
+	printf("%c----%s", edge, dev_name(dev));
+	if (!list_empty(&dev->cdevs)) {
+		printf(" (");
+		list_for_each_entry(cdev, &dev->cdevs, devices_list) {
+			printf("%s", cdev->name);
+			if (!list_is_last(&cdev->devices_list, &dev->cdevs))
+				printf(", ");
+		}
+		printf(")");
+	}
+	printf("\n");
+
+	if (!list_empty(&dev->children)) {
+		device_for_each_child(dev, child) {
+			do_devinfo_subtree(child, depth + 1,
+					list_is_last(&child->sibling,
+						&dev->children) ? '`' : '|');
+		}
+	}
+
+	return 0;
+}
+
+static int do_devinfo(struct command *cmdtp, int argc, char *argv[])
+{
+	struct device_d *dev;
+	struct driver_d *drv;
+	struct param_d *param;
+
+	if (argc == 1) {
+		printf("devices:\n");
+
+		for_each_device(dev) {
+			if (!dev->parent)
+				do_devinfo_subtree(dev, 0, '|');
+		}
+
+		printf("\ndrivers:\n");
+		for_each_driver(drv)
+			printf("%10s\n",drv->name);
+	} else {
+		dev = get_device_by_name(argv[1]);
+
+		if (!dev) {
+			printf("no such device: %s\n",argv[1]);
+			return -1;
+		}
+
+		printf("base  : 0x%08x\nsize  : 0x%08x\ndriver: %s\n\n",
+			dev->map_base, dev->size,
+			dev->driver ? 
+				dev->driver->name : "none");
+
+		if (dev->driver)
+			dev->driver->info(dev);
+
+		printf("%s\n", list_empty(&dev->parameters) ?
+				"no parameters available" : "Parameters:");
+
+		list_for_each_entry(param, &dev->parameters, list)
+			printf("%16s = %s\n", param->name, param->value);
+	}
+
+	return 0;
+}
+
+BAREBOX_CMD_HELP_START(devinfo)
+BAREBOX_CMD_HELP_USAGE("devinfo [DEVICE]\n")
+BAREBOX_CMD_HELP_SHORT("Output device information.\n")
+BAREBOX_CMD_HELP_END
+
+/**
+ * @page devinfo_command
+
+If called without arguments, devinfo shows a summary of the known
+devices and drivers.
+
+If called with a device path being the argument, devinfo shows more
+default information about this device and its parameters.
+
+Example from an MPC5200 based system:
+
+ at verbatim
+  barebox:/ devinfo /dev/eth0
+  base  : 0x1002b000
+  size  : 0x00000000
+  driver: fec_mpc5xxx
+
+  no info available for eth0
+  Parameters:
+      ipaddr = 192.168.23.197
+     ethaddr = 80:81:82:83:84:86
+     gateway = 192.168.23.1
+     netmask = 255.255.255.0
+    serverip = 192.168.23.2
+ at endverbatim
+ */
+
+BAREBOX_CMD_START(devinfo)
+	.cmd		= do_devinfo,
+	.usage		= "Show information about devices and drivers.",
+	BAREBOX_CMD_HELP(cmd_devinfo_help)
+BAREBOX_CMD_END
+#endif
+
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
new file mode 100644
index 0000000..f1ee38c
--- /dev/null
+++ b/drivers/base/platform.c
@@ -0,0 +1,45 @@
+/*
+ * platform.c - barebox platform driver model
+ *
+ * Copyright (c) 2009 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <common.h>
+#include <driver.h>
+
+static int platform_match(struct device_d *dev, struct driver_d *drv)
+{
+	return strcmp(dev->name, drv->name) ? -1 : 0;
+}
+
+static int platform_probe(struct device_d *dev)
+{
+	return dev->driver->probe(dev);
+}
+
+static void platform_remove(struct device_d *dev)
+{
+	dev->driver->remove(dev);
+}
+
+struct bus_type platform_bus = {
+	.name = "platform",
+	.match = platform_match,
+	.probe = platform_probe,
+	.remove = platform_remove,
+};
diff --git a/lib/Makefile b/lib/Makefile
index 8b986d2..d96cfe7 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -5,8 +5,6 @@ obj-y			+= string.o
 obj-y			+= vsprintf.o
 obj-y			+= div64.o
 obj-y			+= misc.o
-obj-y			+= driver.o
-obj-y			+= bus.o
 obj-y			+= parameter.o
 obj-y			+= xfuncs.o
 obj-y			+= getopt.o
diff --git a/lib/bus.c b/lib/bus.c
deleted file mode 100644
index c34982e..0000000
--- a/lib/bus.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * bus.c - barebox driver model
- *
- * Copyright (c) 2009 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#include <common.h>
-#include <driver.h>
-
-static int platform_match(struct device_d *dev, struct driver_d *drv)
-{
-	return strcmp(dev->name, drv->name) ? -1 : 0;
-}
-
-static int platform_probe(struct device_d *dev)
-{
-	return dev->driver->probe(dev);
-}
-
-static void platform_remove(struct device_d *dev)
-{
-	dev->driver->remove(dev);
-}
-
-struct bus_type platform_bus = {
-	.name = "platform",
-	.match = platform_match,
-	.probe = platform_probe,
-	.remove = platform_remove,
-};
diff --git a/lib/driver.c b/lib/driver.c
deleted file mode 100644
index ff92e44..0000000
--- a/lib/driver.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * driver.c - barebox driver model
- *
- * Copyright (c) 2007 Sascha Hauer <s.hauer at pengutronix.de>, Pengutronix
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-/**
- * @file
- * @brief barebox's driver model, and devinfo command
- */
-
-#include <common.h>
-#include <command.h>
-#include <driver.h>
-#include <malloc.h>
-#include <linux/ctype.h>
-#include <errno.h>
-#include <fs.h>
-#include <linux/list.h>
-
-LIST_HEAD(device_list);
-EXPORT_SYMBOL(device_list);
-
-LIST_HEAD(driver_list);
-EXPORT_SYMBOL(driver_list);
-
-static LIST_HEAD(active);
-
-struct device_d *get_device_by_name(const char *name)
-{
-	struct device_d *dev;
-
-	for_each_device(dev) {
-		if(!strcmp(dev_name(dev), name))
-			return dev;
-	}
-
-	return NULL;
-}
-
-static struct device_d *get_device_by_name_id(const char *name, int id)
-{
-	struct device_d *dev;
-
-	for_each_device(dev) {
-		if(!strcmp(dev->name, name) && id == dev->id)
-			return dev;
-	}
-
-	return NULL;
-}
-
-int get_free_deviceid(const char *name_template)
-{
-	int i = 0;
-
-	while (1) {
-		if (!get_device_by_name_id(name_template, i))
-			return i;
-		i++;
-	};
-}
-
-static int match(struct driver_d *drv, struct device_d *dev)
-{
-	if (dev->driver)
-		return -1;
-
-	dev->driver = drv;
-
-	if (dev->bus != drv->bus)
-		goto err_out;
-	if (dev->bus->match(dev, drv))
-		goto err_out;
-	if (dev->bus->probe(dev))
-		goto err_out;
-
-	list_add(&dev->active, &active);
-
-	return 0;
-err_out:
-	dev->driver = NULL;
-	return -1;
-}
-
-int register_device(struct device_d *new_device)
-{
-	struct driver_d *drv;
-
-	if (new_device->id < 0) {
-		new_device->id = get_free_deviceid(new_device->name);
-	} else {
-		if (get_device_by_name_id(new_device->name, new_device->id)) {
-			eprintf("register_device: already registered %s\n",
-				dev_name(new_device));
-			return -EINVAL;
-		}
-	}
-
-	debug ("register_device: %s\n", dev_name(new_device));
-
-	if (!new_device->bus) {
-//		dev_err(new_device, "no bus type associated. Needs fixup\n");
-		new_device->bus = &platform_bus;
-	}
-
-	list_add_tail(&new_device->list, &device_list);
-	INIT_LIST_HEAD(&new_device->children);
-	INIT_LIST_HEAD(&new_device->cdevs);
-	INIT_LIST_HEAD(&new_device->parameters);
-
-	for_each_driver(drv) {
-		if (!match(drv, new_device))
-			break;
-	}
-
-	return 0;
-}
-EXPORT_SYMBOL(register_device);
-
-int unregister_device(struct device_d *old_dev)
-{
-	debug("unregister_device: %s\n", dev_name(old_dev));
-
-	if (!list_empty(&old_dev->children)) {
-		errno = -EBUSY;
-		return errno;
-	}
-
-	if (old_dev->driver)
-		old_dev->bus->remove(old_dev);
-
-	list_del(&old_dev->list);
-
-	/* remove device from parents child list */
-	if (old_dev->parent)
-		list_del(&old_dev->sibling);
-
-	return 0;
-}
-EXPORT_SYMBOL(unregister_device);
-
-int dev_add_child(struct device_d *dev, struct device_d *child)
-{
-	child->parent = dev;
-
-	list_add_tail(&child->sibling, &dev->children);
-
-	return 0;
-}
-EXPORT_SYMBOL(dev_add_child);
-
-struct driver_d *get_driver_by_name(const char *name)
-{
-	struct driver_d *drv;
-
-	for_each_driver(drv) {
-		if(!strcmp(name, drv->name))
-			return drv;
-	}
-
-	return NULL;
-}
-
-static void noinfo(struct device_d *dev)
-{
-	printf("no info available for %s\n", dev_name(dev));
-}
-
-static void noshortinfo(struct device_d *dev)
-{
-}
-
-int register_driver(struct driver_d *drv)
-{
-	struct device_d *dev = NULL;
-
-	debug("register_driver: %s\n", drv->name);
-
-	if (!drv->bus) {
-//		pr_err("driver %s has no bus type associated. Needs fixup\n", drv->name);
-		drv->bus = &platform_bus;
-	}
-
-	list_add_tail(&drv->list, &driver_list);
-
-	if (!drv->info)
-		drv->info = noinfo;
-	if (!drv->shortinfo)
-		drv->shortinfo = noshortinfo;
-
-	for_each_device(dev)
-		match(drv, dev);
-
-	return 0;
-}
-EXPORT_SYMBOL(register_driver);
-
-int dev_protect(struct device_d *dev, size_t count, unsigned long offset, int prot)
-{
-	printf("%s: currently broken\n", __func__);
-	return -EINVAL;
-}
-
-int generic_memmap_ro(struct cdev *cdev, void **map, int flags)
-{
-	if (!cdev->dev)
-		return -EINVAL;
-
-	if (flags & PROT_WRITE)
-		return -EACCES;
-	*map = (void *)cdev->dev->map_base;
-	return 0;
-}
-
-int generic_memmap_rw(struct cdev *cdev, void **map, int flags)
-{
-	if (!cdev->dev)
-		return -EINVAL;
-
-	*map = (void *)cdev->dev->map_base;
-	return 0;
-}
-
-int dummy_probe(struct device_d *dev)
-{
-	return 0;
-}
-EXPORT_SYMBOL(dummy_probe);
-
-const char *dev_id(const struct device_d *dev)
-{
-	static char buf[sizeof(unsigned long) * 2];
-
-	sprintf(buf, FORMAT_DRIVER_MANE_ID, dev->name, dev->id);
-
-	return buf;
-}
-
-void devices_shutdown(void)
-{
-	struct device_d *dev;
-
-	list_for_each_entry(dev, &active, active) {
-		if (dev->driver->remove)
-			dev->driver->remove(dev);
-	}
-}
-
-#ifdef CONFIG_CMD_DEVINFO
-static int do_devinfo_subtree(struct device_d *dev, int depth, char edge)
-{
-	struct device_d *child;
-	struct cdev *cdev;
-	int i;
-
-	for (i = 0; i < depth; i++)
-		printf("|    ");
-
-	printf("%c----%s", edge, dev_name(dev));
-	if (!list_empty(&dev->cdevs)) {
-		printf(" (");
-		list_for_each_entry(cdev, &dev->cdevs, devices_list) {
-			printf("%s", cdev->name);
-			if (!list_is_last(&cdev->devices_list, &dev->cdevs))
-				printf(", ");
-		}
-		printf(")");
-	}
-	printf("\n");
-
-	if (!list_empty(&dev->children)) {
-		device_for_each_child(dev, child) {
-			do_devinfo_subtree(child, depth + 1,
-					list_is_last(&child->sibling,
-						&dev->children) ? '`' : '|');
-		}
-	}
-
-	return 0;
-}
-
-static int do_devinfo(struct command *cmdtp, int argc, char *argv[])
-{
-	struct device_d *dev;
-	struct driver_d *drv;
-	struct param_d *param;
-
-	if (argc == 1) {
-		printf("devices:\n");
-
-		for_each_device(dev) {
-			if (!dev->parent)
-				do_devinfo_subtree(dev, 0, '|');
-		}
-
-		printf("\ndrivers:\n");
-		for_each_driver(drv)
-			printf("%10s\n",drv->name);
-	} else {
-		dev = get_device_by_name(argv[1]);
-
-		if (!dev) {
-			printf("no such device: %s\n",argv[1]);
-			return -1;
-		}
-
-		printf("base  : 0x%08x\nsize  : 0x%08x\ndriver: %s\n\n",
-			dev->map_base, dev->size,
-			dev->driver ? 
-				dev->driver->name : "none");
-
-		if (dev->driver)
-			dev->driver->info(dev);
-
-		printf("%s\n", list_empty(&dev->parameters) ?
-				"no parameters available" : "Parameters:");
-
-		list_for_each_entry(param, &dev->parameters, list)
-			printf("%16s = %s\n", param->name, param->value);
-	}
-
-	return 0;
-}
-
-BAREBOX_CMD_HELP_START(devinfo)
-BAREBOX_CMD_HELP_USAGE("devinfo [DEVICE]\n")
-BAREBOX_CMD_HELP_SHORT("Output device information.\n")
-BAREBOX_CMD_HELP_END
-
-/**
- * @page devinfo_command
-
-If called without arguments, devinfo shows a summary of the known
-devices and drivers.
-
-If called with a device path being the argument, devinfo shows more
-default information about this device and its parameters.
-
-Example from an MPC5200 based system:
-
- at verbatim
-  barebox:/ devinfo /dev/eth0
-  base  : 0x1002b000
-  size  : 0x00000000
-  driver: fec_mpc5xxx
-
-  no info available for eth0
-  Parameters:
-      ipaddr = 192.168.23.197
-     ethaddr = 80:81:82:83:84:86
-     gateway = 192.168.23.1
-     netmask = 255.255.255.0
-    serverip = 192.168.23.2
- at endverbatim
- */
-
-BAREBOX_CMD_START(devinfo)
-	.cmd		= do_devinfo,
-	.usage		= "Show information about devices and drivers.",
-	BAREBOX_CMD_HELP(cmd_devinfo_help)
-BAREBOX_CMD_END
-#endif
-
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb 10 02:12:25 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 10 Feb 2011 08:12:25 +0100
Subject: [PATCH 3/4] driver/memmap: fix generic_memmap_rw and
	generic_memmap_ro
In-Reply-To: <1297308720-26390-3-git-send-email-plagnioj@jcrosoft.com>
References: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
	<1297308720-26390-3-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <20110210071225.GP9041@pengutronix.de>

On Thu, Feb 10, 2011 at 04:31:59AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> we check before the RW access for generic_memmap_ro instead of
> generic_memmap_rw
> 
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> ---
>  drivers/base/driver.c |    5 +++--
>  1 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/base/driver.c b/drivers/base/driver.c
> index ff92e44..bd7464e 100644
> --- a/drivers/base/driver.c
> +++ b/drivers/base/driver.c
> @@ -223,8 +223,6 @@ int generic_memmap_ro(struct cdev *cdev, void **map, int flags)
>  	if (!cdev->dev)
>  		return -EINVAL;
>  
> -	if (flags & PROT_WRITE)
> -		return -EACCES;
>  	*map = (void *)cdev->dev->map_base;
>  	return 0;
>  }
> @@ -234,6 +232,9 @@ int generic_memmap_rw(struct cdev *cdev, void **map, int flags)
>  	if (!cdev->dev)
>  		return -EINVAL;
>  
> +	if (flags & PROT_WRITE)
> +		return -EACCES;
> +

So instead of allowing write access in the read/write function we now
allow it in the readonly function? I'm afraid I don't understand this.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Feb 10 02:19:27 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 10 Feb 2011 08:19:27 +0100
Subject: [PATCH] tx28: fix kconfig warning
In-Reply-To: <20110209170724.GK22009@pengutronix.de>
References: <20110209170724.GK22009@pengutronix.de>
Message-ID: <20110210071927.GQ9041@pengutronix.de>


Hi Robert,

I would go with the following instead which moves the ARCH_HAS_FEC_IMX
to drivers/net where it's accessible for all archs which need it.

Sascha

8<------------------------------------

Without this patch (against next) I get this:

rsc at thebe:barebox$ make ARCH=arm CROSS_COMPILE=<path>/arm-v5te-linux-gnueabi- menuconfig
  HOSTCC  scripts/kconfig/lxdialog/checklist.o
  HOSTCC  scripts/kconfig/lxdialog/inputbox.o
  HOSTCC  scripts/kconfig/lxdialog/menubox.o
  HOSTCC  scripts/kconfig/lxdialog/textbox.o
  HOSTCC  scripts/kconfig/lxdialog/util.o
  HOSTCC  scripts/kconfig/lxdialog/yesno.o
  HOSTCC  scripts/kconfig/mconf.o
  HOSTLD  scripts/kconfig/mconf
scripts/kconfig/mconf Kconfig
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)
warning: (ARCH_IMX25 && ARCH_IMX27 && ARCH_IMX35 && ARCH_IMX51 && ARCH_IMX28) selects ARCH_HAS_FEC_IMX which has unmet direct dependencies (ARCH_IMX)

Add the option for the FEC on MX28 as well.

Signed-off-by: Robert Schwebel <r.schwebel at pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/Kconfig |    3 ---
 drivers/net/Kconfig       |    3 +++
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c9f55b5..5b8ac89 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -37,9 +37,6 @@ config BOARDINFO
 	default "Freescale i.MX51 PDK" if MACH_FREESCALE_MX51_PDK
 	default "Garz+Fricke Cupid" if MACH_GUF_CUPID
 
-config ARCH_HAS_FEC_IMX
-	bool
-
 config ARCH_IMX_INTERNAL_BOOT
 	bool "support internal boot mode"
 	depends on ARCH_IMX25 || ARCH_IMX35 || ARCH_IMX51
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 69f3352..6479417 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -13,6 +13,9 @@ config HAS_AT91_ETHER
 config HAS_NETX_ETHER
 	bool
 
+config ARCH_HAS_FEC_IMX
+	bool
+
 config MIIDEV
 	bool
 
-- 
1.7.2.3

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From r.schwebel at pengutronix.de  Thu Feb 10 02:22:11 2011
From: r.schwebel at pengutronix.de (Robert Schwebel)
Date: Thu, 10 Feb 2011 08:22:11 +0100
Subject: [PATCH] tx28: fix kconfig warning
In-Reply-To: <20110210071927.GQ9041@pengutronix.de>
References: <20110209170724.GK22009@pengutronix.de>
	<20110210071927.GQ9041@pengutronix.de>
Message-ID: <20110210072211.GU22009@pengutronix.de>

On Thu, Feb 10, 2011 at 08:19:27AM +0100, Sascha Hauer wrote:
> I would go with the following instead which moves the ARCH_HAS_FEC_IMX
> to drivers/net where it's accessible for all archs which need it.

Yes, sounds better!

thx, rsc
-- 
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From F.Vanalme at TELEVIC.com  Thu Feb 10 04:04:26 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Thu, 10 Feb 2011 10:04:26 +0100
Subject: barebox startup
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FEA30445A@SRV-VS06.TELEVIC.COM>

After struggling a while with i.MX27 NAND flash controller, I was able to start Barebox. Now, I have added some device, but I am not sure that everything starts as it should.
This is how my devices_init function looks like now : 

static struct memory_platform_data ram_pdata = {
	.name = "ram0",
	.flags = DEVFS_RDWR,
};

static struct device_d sdram_dev = {
	.id	  = -1,
	.name     = "mem",
	.map_base = 0xa0000000,
	.size     = 128 * 1024 * 1024,  /* 128 MB SDRAM */
	.platform_data = &ram_pdata,
};

static struct fec_platform_data fec_info = {
	.xcv_type = MII100,
	.phy_addr = 1,
};

static struct imx_nand_platform_data nand_info = {
    .width      = 1,
    .hw_ecc     = 1,
    .flash_bbt  = 1,
};

static int imx27pdk_devices_init(void)
{
  int i;

  unsigned int mode[] = {
      /* FEC */
      PD0_AIN_FEC_TXD0,
      PD1_AIN_FEC_TXD1,
      PD2_AIN_FEC_TXD2,
      PD3_AIN_FEC_TXD3,
      PD4_AOUT_FEC_RX_ER,
      PD5_AOUT_FEC_RXD1,
      PD6_AOUT_FEC_RXD2,
      PD7_AOUT_FEC_RXD3,
      PD8_AF_FEC_MDIO,
      PD9_AIN_FEC_MDC | GPIO_PUEN,
      PD10_AOUT_FEC_CRS,
      PD11_AOUT_FEC_TX_CLK,
      PD12_AOUT_FEC_RXD0,
      PD13_AOUT_FEC_RX_DV,
      PD14_AOUT_FEC_RX_CLK,
      PD15_AOUT_FEC_COL,
      PD16_AIN_FEC_TX_ER,
      PF23_AIN_FEC_TX_EN,
      /* UART */
      PE12_PF_UART1_TXD,
      PE13_PF_UART1_RXD,
      PE14_PF_UART1_CTS,
      PE15_PF_UART1_RTS,
      /* display */
      PA5_PF_LSCLK,
      PA6_PF_LD0,
      PA7_PF_LD1,
      PA8_PF_LD2,
      PA9_PF_LD3,
      PA10_PF_LD4,
      PA11_PF_LD5,
      PA12_PF_LD6,
      PA13_PF_LD7,
      PA14_PF_LD8,
      PA15_PF_LD9,
      PA16_PF_LD10,
      PA17_PF_LD11,
      PA18_PF_LD12,
      PA19_PF_LD13,
      PA20_PF_LD14,
      PA21_PF_LD15,
      PA22_PF_LD16,
      PA23_PF_LD17,
      PA24_PF_REV,
      PA25_PF_CLS,
      PA26_PF_PS,
      PA27_PF_SPL_SPR,
      PA28_PF_HSYNC,
      PA29_PF_VSYNC,
      PA30_PF_CONTRAST,
      PA31_PF_OE_ACD,
  };

  /* initialize gpios */
  for (i = 0; i < ARRAY_SIZE(mode); i++)
     imx_gpio_mode(mode[i]);

  register_device(&sdram_dev);
  imx27_add_fec(&fec_info);
  imx27_add_nand(&nand_info);

  devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
  dev_add_bb_dev("self_raw", "self0");

  devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
  dev_add_bb_dev("env_raw", "env0");


  armlinux_add_dram(&sdram_dev);
  armlinux_set_bootparams((void *)0xa0000100);

  return 0;
}

device_initcall(imx27pdk_devices_init);


(I used the pcm038 board as a reference. Most of the items in this function I took from that board's lowlevel function).

When starting up, I get the following console output :

barebox 2010.12.0-00073-gfad11e8-dirty (Feb  9 2011 - 14:09:49)

Board: Freescale i.MX27 PDK 3Stack
NAND device: Manufacturer ID: 0xec, Chip ID: 0xaa (Samsung NAND 256MiB 1,8V 8-bit)
Bad block table found at page 131008, version 0x02
Bad block table found at page 130944, version 0x02
Malloc space: 0xa7b00000 -> 0xa7f00000 (size  4 MB)
Stack space : 0xa7af8000 -> 0xa7b00000 (size 32 kB)
running /env/bin/init...
not found
barebox:/

This is the console output when executing the devinfo command :

barebox:/ devinfo
devices:
|----imx_serial0
|----cs0
|----ramfs0
|----devfs0
|----mem0 (defaultenv)
|----mem1 (mem)
|----mem2 (ram0)
|----fec_imx0
|----miidev0 (phy0)
|----eth0
|----imx_nand0
|----nand0 (nand0, nand_oob0, self_raw, env_raw)

drivers:
imx_serial
     ramfs
     devfs
   fec_imx
    miidev
  imx_nand
 cfi_flash
     imxfb
       mem
barebox:/


I expected to see the autoboot count-down and at least something about the network initialization. 
I think it probably has something to do with the env/config script file. I don't know exactly how it should be used. I ran ./scripts/bareboxenv -s -p 0x10000 arch/arm/imx27pdk/env env.bin which created env.bin in the barebox root. Afterwards, when doing a make all, I could see that there is a /env folder on my device which contains the config file. I could execute that script from the command line, but I suppose it should be executed automatically somehow.


For the moment, I don't have any activity on my Ethernet ports (no leds on or blinking), although I added the fec device. When I execute the dhcp command, I get :

barebox:/ dhcp
warning: No MAC address set. Using random address 8E:A2:E8:DD:E2:73
phy0: Link is up - 100/Full
transmission timeout
T transmission timeout
T transmission timeout

But, whether I connect the cable or not, it always shows "phy0:Link is up - 100/Full".

I also have a problem with the environment settings. Obviously, I can set some environment variables, e.g. ipaddr=192.168.1.10 :

barebox:/ ipaddr=192.168.1.10
barebox:/ printenv
locals:
ipaddr=192.168.1.10
globals:
barebox:/ saveenv
saving environment
barebox:/

But, although I did a saveenv (obviously successful), the environment settings disappear after resetting the board.



I think I might still miss something to make my board start correctly.

Someone can point me in the good direction ? (or point me to some doc about this)

Filip


From mickael.chazaux at gmail.com  Thu Feb 10 06:09:31 2011
From: mickael.chazaux at gmail.com (Mickael Chazaux)
Date: Thu, 10 Feb 2011 12:09:31 +0100
Subject: No NAND access on AT91SAM9G20-EK
Message-ID: <AANLkTikb2tgLZhBYbunUG10Sz7FO3Yx_P1+5Fo0GonAD@mail.gmail.com>

Hi,

I managed to compile Barebox for AT91SAM9G20-EK, and I can run it. However
it seems not capable of reading the NAND Flash.

Output is at [1], my configuration is [2]. The "err -74" is EBADMSG, in
line 1057 of "file drivers/mtd/nand/nand_base.c"

[1]
barebox 2011.02.0-00070-gc5dd4c4-dirty (Feb 10 2011 - 11:58:24)

Board: Atmel at91sam9g20-ek
Clocks: CPU 792 MHz, master 132 MHz, main 18.432 MHz
NAND device: Manufacturer ID: 0xec, Chip ID: 0xda (Samsung NAND 256MiB
3,3V 8-bit)
Scanning device for bad blocks
Bad eraseblock 1621 at 0x0caa0000
Malloc space: 0x23b00000 -> 0x23f00000 (size  4 MB)
Stack space : 0x23af8000 -> 0x23b00000 (size 32 kB)
err -74
envfs: wrong magic on /dev/env0
no valid environment found on /dev/env0. Using default environment
running /env/bin/init...

Hit any key to stop autoboot:  3

type update_kernel [<imagename>] to update kernel into flash
type udate_root [<imagename>] to update rootfs into flash

9G20-EK:/

[2]
#
# Automatically generated make config: don't edit
# Linux/arm 2011.02.0 Barebox Configuration
# Thu Feb 10 11:58:15 2011
#
# CONFIG_BOARD_LINKER_SCRIPT is not set
CONFIG_GENERIC_LINKER_SCRIPT=y
CONFIG_ARM=y

#
# System Type
#
CONFIG_ARCH_AT91=y
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_MXS is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_NOMADIK is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_S3C24xx is not set
# CONFIG_ARCH_VERSATILE is not set

#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y

#
# processor features
#
# CONFIG_BOOT_ENDIANNESS_SWITCH is not set
CONFIG_ARCH_TEXT_BASE=0x23f00000
CONFIG_BOARDINFO="Atmel at91sam9g20-ek"
CONFIG_HAVE_NAND_ATMEL_BUSWIDTH_16=y

#
# Atmel AT91 System-on-Chip
#
# CONFIG_ARCH_AT91SAM9260 is not set
# CONFIG_ARCH_AT91SAM9261 is not set
# CONFIG_ARCH_AT91SAM9263 is not set
# CONFIG_ARCH_AT91SAM9G10 is not set
CONFIG_ARCH_AT91SAM9G20=y
# CONFIG_ARCH_AT91SAM9G45 is not set
CONFIG_MACH_AT91SAM9G20EK=y

#
# AT91 Board Options
#
# CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16 is not set
# CONFIG_AT91_HAVE_2MMC is not set
# CONFIG_AEABI is not set

#
# Arm specific settings
#
CONFIG_CMD_ARM_CPUINFO=y
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
CONFIG_GREGORIAN_CALENDER=y
CONFIG_HAS_KALLSYMS=y
CONFIG_HAS_MODULES=y
CONFIG_CMD_MEMORY=y
CONFIG_ENV_HANDLING=y
CONFIG_GENERIC_GPIO=y

#
# General Settings
#
CONFIG_LOCALVERSION_AUTO=y

#
# memory layout
#
CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
CONFIG_TEXT_BASE=0x23f00000
CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
CONFIG_MEMORY_LAYOUT_DEFAULT=y
# CONFIG_MEMORY_LAYOUT_FIXED is not set
CONFIG_STACK_SIZE=0x8000
CONFIG_MALLOC_SIZE=0x400000
# CONFIG_BROKEN is not set
# CONFIG_EXPERIMENTAL is not set
CONFIG_PROMPT="9G20-EK:"
CONFIG_BAUDRATE=115200
CONFIG_LONGHELP=y
CONFIG_CBSIZE=1024
CONFIG_MAXARGS=16
CONFIG_SHELL_HUSH=y
# CONFIG_SHELL_SIMPLE is not set
CONFIG_GLOB=y
CONFIG_PROMPT_HUSH_PS2="y"
# CONFIG_HUSH_FANCY_PROMPT is not set
# CONFIG_HUSH_GETOPT is not set
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
# CONFIG_MENU is not set
# CONFIG_PASSWORD is not set
CONFIG_DYNAMIC_CRC_TABLE=y
CONFIG_ERRNO_MESSAGES=y
CONFIG_TIMESTAMP=y
CONFIG_CONSOLE_FULL=y
CONFIG_CONSOLE_ACTIVATE_FIRST=y
# CONFIG_OF_FLAT_TREE is not set
CONFIG_PARTITION=y
CONFIG_DEFAULT_ENVIRONMENT=y
# CONFIG_DEFAULT_ENVIRONMENT_GENERIC is not set
CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9260ek/env"
# CONFIG_POLLER is not set

#
# Debugging
#
# CONFIG_DEBUG_INFO is not set
CONFIG_ENABLE_FLASH_NOISE=y
# CONFIG_ENABLE_PARTITION_NOISE is not set
# CONFIG_ENABLE_DEVICE_NOISE is not set

#
# Commands
#

#
# scripting
#
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_LOADENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
CONFIG_CMD_TRUE=y
CONFIG_CMD_FALSE=y
# CONFIG_CMD_LOGIN is not set
# CONFIG_CMD_PASSWD is not set

#
# file commands
#
CONFIG_CMD_LS=y
CONFIG_CMD_RM=y
CONFIG_CMD_CAT=y
CONFIG_CMD_MKDIR=y
CONFIG_CMD_RMDIR=y
CONFIG_CMD_CP=y
CONFIG_CMD_PWD=y
CONFIG_CMD_CD=y
CONFIG_CMD_MOUNT=y
CONFIG_CMD_UMOUNT=y

#
# console
#
CONFIG_CMD_CLEAR=y
CONFIG_CMD_ECHO=y
# CONFIG_CMD_ECHO_E is not set

#
# memory
#
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_CRC=y
# CONFIG_CMD_CRC_CMP is not set
CONFIG_CMD_MTEST=y
CONFIG_CMD_MTEST_ALTERNATIVE=y

#
# flash
#
CONFIG_CMD_FLASH=y
# CONFIG_CMD_UBI is not set

#
# booting
#
CONFIG_CMD_BOOTM=y
# CONFIG_CMD_BOOTM_ZLIB is not set
# CONFIG_CMD_BOOTM_BZLIB is not set
CONFIG_CMD_BOOTM_SHOW_TYPE=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_BOOTU=y
CONFIG_CMD_RESET=y
CONFIG_CMD_GO=y
CONFIG_CMD_TIMEOUT=y
CONFIG_CMD_PARTITION=y
CONFIG_CMD_TEST=y
CONFIG_CMD_VERSION=y
CONFIG_CMD_HELP=y
CONFIG_CMD_DEVINFO=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_UNLZO is not set
# CONFIG_CMD_I2C is not set
CONFIG_NET=y
CONFIG_NET_DHCP=y
# CONFIG_NET_NFS is not set
CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
# CONFIG_NET_TFTP_PUSH is not set
# CONFIG_NET_NETCONSOLE is not set
# CONFIG_NET_RESOLV is not set

#
# Drivers
#

#
# serial drivers
#
# CONFIG_DRIVER_SERIAL_ARM_DCC is not set
# CONFIG_DRIVER_SERIAL_NS16550 is not set
CONFIG_DRIVER_SERIAL_ATMEL=y
CONFIG_HAS_MACB=y
CONFIG_MIIDEV=y

#
# Network drivers
#
# CONFIG_DRIVER_NET_SMC911X is not set
# CONFIG_DRIVER_NET_SMC91111 is not set
CONFIG_DRIVER_NET_MACB=y

#
# SPI drivers
#
# CONFIG_SPI is not set
CONFIG_I2C=y

#
# I2C Hardware Bus support
#

#
# flash drivers
#
CONFIG_DRIVER_CFI=y
CONFIG_DRIVER_CFI_INTEL=y
CONFIG_DRIVER_CFI_AMD=y
CONFIG_DRIVER_CFI_BANK_WIDTH_1=y
CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
CONFIG_DRIVER_CFI_BANK_WIDTH_4=y
# CONFIG_DRIVER_CFI_BANK_WIDTH_8 is not set
CONFIG_CFI_BUFFER_WRITE=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_ATMEL=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
# CONFIG_MTD_NAND_ECC_SMC is not set
CONFIG_MTD_NAND_IDS=y
# CONFIG_UBI is not set
# CONFIG_ATA is not set
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
# CONFIG_VIDEO is not set
# CONFIG_MCI is not set

#
# MFD
#
# CONFIG_I2C_MC13892 is not set
# CONFIG_I2C_MC34704 is not set
# CONFIG_I2C_MC9SDZ60 is not set
# CONFIG_I2C_LP3972 is not set
# CONFIG_I2C_TWL4030 is not set
# CONFIG_LED is not set

#
# Filesystem support
#
# CONFIG_FS_CRAMFS is not set
CONFIG_FS_RAMFS=y
CONFIG_FS_DEVFS=y
CONFIG_CRC32=y
# CONFIG_DIGEST is not set
# CONFIG_GENERIC_FIND_NEXT_BIT is not set
# CONFIG_PROCESS_ESCAPE_SEQUENCE is not set


From plagnioj at jcrosoft.com  Thu Feb 10 06:48:58 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 10 Feb 2011 12:48:58 +0100
Subject: No NAND access on AT91SAM9G20-EK
In-Reply-To: <AANLkTikb2tgLZhBYbunUG10Sz7FO3Yx_P1+5Fo0GonAD@mail.gmail.com>
References: <AANLkTikb2tgLZhBYbunUG10Sz7FO3Yx_P1+5Fo0GonAD@mail.gmail.com>
Message-ID: <20110210114858.GC11255@game.jcrosoft.org>

Hi,

	which ecc did u use before?

Best Regards,
J.
On 12:09 Thu 10 Feb     , Mickael Chazaux wrote:
> Hi,
> 
> I managed to compile Barebox for AT91SAM9G20-EK, and I can run it. However
> it seems not capable of reading the NAND Flash.
> 
> Output is at [1], my configuration is [2]. The "err -74" is EBADMSG, in
> line 1057 of "file drivers/mtd/nand/nand_base.c"
> 
> [1]
> barebox 2011.02.0-00070-gc5dd4c4-dirty (Feb 10 2011 - 11:58:24)
> 
> Board: Atmel at91sam9g20-ek
> Clocks: CPU 792 MHz, master 132 MHz, main 18.432 MHz
> NAND device: Manufacturer ID: 0xec, Chip ID: 0xda (Samsung NAND 256MiB
> 3,3V 8-bit)
> Scanning device for bad blocks
> Bad eraseblock 1621 at 0x0caa0000
> Malloc space: 0x23b00000 -> 0x23f00000 (size  4 MB)
> Stack space : 0x23af8000 -> 0x23b00000 (size 32 kB)
> err -74
> envfs: wrong magic on /dev/env0
> no valid environment found on /dev/env0. Using default environment
> running /env/bin/init...
> 
> Hit any key to stop autoboot:  3
> 
> type update_kernel [<imagename>] to update kernel into flash
> type udate_root [<imagename>] to update rootfs into flash
> 
> 9G20-EK:/
> 
> [2]
> #
> # Automatically generated make config: don't edit
> # Linux/arm 2011.02.0 Barebox Configuration
> # Thu Feb 10 11:58:15 2011
> #
> # CONFIG_BOARD_LINKER_SCRIPT is not set
> CONFIG_GENERIC_LINKER_SCRIPT=y
> CONFIG_ARM=y
> 
> #
> # System Type
> #
> CONFIG_ARCH_AT91=y
> # CONFIG_ARCH_EP93XX is not set
> # CONFIG_ARCH_IMX is not set
> # CONFIG_ARCH_MXS is not set
> # CONFIG_ARCH_NETX is not set
> # CONFIG_ARCH_NOMADIK is not set
> # CONFIG_ARCH_OMAP is not set
> # CONFIG_ARCH_S3C24xx is not set
> # CONFIG_ARCH_VERSATILE is not set
> 
> #
> # Processor Type
> #
> CONFIG_CPU_32=y
> CONFIG_CPU_ARM926T=y
> CONFIG_CPU_32v5=y
> 
> #
> # processor features
> #
> # CONFIG_BOOT_ENDIANNESS_SWITCH is not set
> CONFIG_ARCH_TEXT_BASE=0x23f00000
> CONFIG_BOARDINFO="Atmel at91sam9g20-ek"
> CONFIG_HAVE_NAND_ATMEL_BUSWIDTH_16=y
> 
> #
> # Atmel AT91 System-on-Chip
> #
> # CONFIG_ARCH_AT91SAM9260 is not set
> # CONFIG_ARCH_AT91SAM9261 is not set
> # CONFIG_ARCH_AT91SAM9263 is not set
> # CONFIG_ARCH_AT91SAM9G10 is not set
> CONFIG_ARCH_AT91SAM9G20=y
> # CONFIG_ARCH_AT91SAM9G45 is not set
> CONFIG_MACH_AT91SAM9G20EK=y
> 
> #
> # AT91 Board Options
> #
> # CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16 is not set
> # CONFIG_AT91_HAVE_2MMC is not set
> # CONFIG_AEABI is not set
> 
> #
> # Arm specific settings
> #
> CONFIG_CMD_ARM_CPUINFO=y
> CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
> CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
> CONFIG_GREGORIAN_CALENDER=y
> CONFIG_HAS_KALLSYMS=y
> CONFIG_HAS_MODULES=y
> CONFIG_CMD_MEMORY=y
> CONFIG_ENV_HANDLING=y
> CONFIG_GENERIC_GPIO=y
> 
> #
> # General Settings
> #
> CONFIG_LOCALVERSION_AUTO=y
> 
> #
> # memory layout
> #
> CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
> CONFIG_TEXT_BASE=0x23f00000
> CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
> CONFIG_MEMORY_LAYOUT_DEFAULT=y
> # CONFIG_MEMORY_LAYOUT_FIXED is not set
> CONFIG_STACK_SIZE=0x8000
> CONFIG_MALLOC_SIZE=0x400000
> # CONFIG_BROKEN is not set
> # CONFIG_EXPERIMENTAL is not set
> CONFIG_PROMPT="9G20-EK:"
> CONFIG_BAUDRATE=115200
> CONFIG_LONGHELP=y
> CONFIG_CBSIZE=1024
> CONFIG_MAXARGS=16
> CONFIG_SHELL_HUSH=y
> # CONFIG_SHELL_SIMPLE is not set
> CONFIG_GLOB=y
> CONFIG_PROMPT_HUSH_PS2="y"
> # CONFIG_HUSH_FANCY_PROMPT is not set
> # CONFIG_HUSH_GETOPT is not set
> CONFIG_CMDLINE_EDITING=y
> CONFIG_AUTO_COMPLETE=y
> # CONFIG_MENU is not set
> # CONFIG_PASSWORD is not set
> CONFIG_DYNAMIC_CRC_TABLE=y
> CONFIG_ERRNO_MESSAGES=y
> CONFIG_TIMESTAMP=y
> CONFIG_CONSOLE_FULL=y
> CONFIG_CONSOLE_ACTIVATE_FIRST=y
> # CONFIG_OF_FLAT_TREE is not set
> CONFIG_PARTITION=y
> CONFIG_DEFAULT_ENVIRONMENT=y
> # CONFIG_DEFAULT_ENVIRONMENT_GENERIC is not set
> CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9260ek/env"
> # CONFIG_POLLER is not set
> 
> #
> # Debugging
> #
> # CONFIG_DEBUG_INFO is not set
> CONFIG_ENABLE_FLASH_NOISE=y
> # CONFIG_ENABLE_PARTITION_NOISE is not set
> # CONFIG_ENABLE_DEVICE_NOISE is not set
> 
> #
> # Commands
> #
> 
> #
> # scripting
> #
> CONFIG_CMD_EDIT=y
> CONFIG_CMD_SLEEP=y
> CONFIG_CMD_SAVEENV=y
> CONFIG_CMD_LOADENV=y
> CONFIG_CMD_EXPORT=y
> CONFIG_CMD_PRINTENV=y
> CONFIG_CMD_READLINE=y
> CONFIG_CMD_TRUE=y
> CONFIG_CMD_FALSE=y
> # CONFIG_CMD_LOGIN is not set
> # CONFIG_CMD_PASSWD is not set
> 
> #
> # file commands
> #
> CONFIG_CMD_LS=y
> CONFIG_CMD_RM=y
> CONFIG_CMD_CAT=y
> CONFIG_CMD_MKDIR=y
> CONFIG_CMD_RMDIR=y
> CONFIG_CMD_CP=y
> CONFIG_CMD_PWD=y
> CONFIG_CMD_CD=y
> CONFIG_CMD_MOUNT=y
> CONFIG_CMD_UMOUNT=y
> 
> #
> # console
> #
> CONFIG_CMD_CLEAR=y
> CONFIG_CMD_ECHO=y
> # CONFIG_CMD_ECHO_E is not set
> 
> #
> # memory
> #
> # CONFIG_CMD_LOADB is not set
> CONFIG_CMD_MEMINFO=y
> CONFIG_CMD_CRC=y
> # CONFIG_CMD_CRC_CMP is not set
> CONFIG_CMD_MTEST=y
> CONFIG_CMD_MTEST_ALTERNATIVE=y
> 
> #
> # flash
> #
> CONFIG_CMD_FLASH=y
> # CONFIG_CMD_UBI is not set
> 
> #
> # booting
> #
> CONFIG_CMD_BOOTM=y
> # CONFIG_CMD_BOOTM_ZLIB is not set
> # CONFIG_CMD_BOOTM_BZLIB is not set
> CONFIG_CMD_BOOTM_SHOW_TYPE=y
> CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_BOOTU=y
> CONFIG_CMD_RESET=y
> CONFIG_CMD_GO=y
> CONFIG_CMD_TIMEOUT=y
> CONFIG_CMD_PARTITION=y
> CONFIG_CMD_TEST=y
> CONFIG_CMD_VERSION=y
> CONFIG_CMD_HELP=y
> CONFIG_CMD_DEVINFO=y
> CONFIG_CMD_GPIO=y
> # CONFIG_CMD_UNLZO is not set
> # CONFIG_CMD_I2C is not set
> CONFIG_NET=y
> CONFIG_NET_DHCP=y
> # CONFIG_NET_NFS is not set
> CONFIG_NET_PING=y
> CONFIG_NET_TFTP=y
> # CONFIG_NET_TFTP_PUSH is not set
> # CONFIG_NET_NETCONSOLE is not set
> # CONFIG_NET_RESOLV is not set
> 
> #
> # Drivers
> #
> 
> #
> # serial drivers
> #
> # CONFIG_DRIVER_SERIAL_ARM_DCC is not set
> # CONFIG_DRIVER_SERIAL_NS16550 is not set
> CONFIG_DRIVER_SERIAL_ATMEL=y
> CONFIG_HAS_MACB=y
> CONFIG_MIIDEV=y
> 
> #
> # Network drivers
> #
> # CONFIG_DRIVER_NET_SMC911X is not set
> # CONFIG_DRIVER_NET_SMC91111 is not set
> CONFIG_DRIVER_NET_MACB=y
> 
> #
> # SPI drivers
> #
> # CONFIG_SPI is not set
> CONFIG_I2C=y
> 
> #
> # I2C Hardware Bus support
> #
> 
> #
> # flash drivers
> #
> CONFIG_DRIVER_CFI=y
> CONFIG_DRIVER_CFI_INTEL=y
> CONFIG_DRIVER_CFI_AMD=y
> CONFIG_DRIVER_CFI_BANK_WIDTH_1=y
> CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
> CONFIG_DRIVER_CFI_BANK_WIDTH_4=y
> # CONFIG_DRIVER_CFI_BANK_WIDTH_8 is not set
> CONFIG_CFI_BUFFER_WRITE=y
> CONFIG_MTD=y
> CONFIG_NAND=y
> CONFIG_NAND_ATMEL=y
> # CONFIG_MTD_NAND_VERIFY_WRITE is not set
> # CONFIG_MTD_NAND_ECC_SMC is not set
> CONFIG_MTD_NAND_IDS=y
> # CONFIG_UBI is not set
> # CONFIG_ATA is not set
> # CONFIG_USB is not set
> # CONFIG_USB_GADGET is not set
> # CONFIG_VIDEO is not set
> # CONFIG_MCI is not set
> 
> #
> # MFD
> #
> # CONFIG_I2C_MC13892 is not set
> # CONFIG_I2C_MC34704 is not set
> # CONFIG_I2C_MC9SDZ60 is not set
> # CONFIG_I2C_LP3972 is not set
> # CONFIG_I2C_TWL4030 is not set
> # CONFIG_LED is not set
> 
> #
> # Filesystem support
> #
> # CONFIG_FS_CRAMFS is not set
> CONFIG_FS_RAMFS=y
> CONFIG_FS_DEVFS=y
> CONFIG_CRC32=y
> # CONFIG_DIGEST is not set
> # CONFIG_GENERIC_FIND_NEXT_BIT is not set
> # CONFIG_PROCESS_ESCAPE_SEQUENCE is not set
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From plagnioj at jcrosoft.com  Thu Feb 10 06:50:14 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Thu, 10 Feb 2011 12:50:14 +0100
Subject: [PATCH 3/4] driver/memmap: fix generic_memmap_rw and
	generic_memmap_ro
In-Reply-To: <20110210071225.GP9041@pengutronix.de>
References: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
	<1297308720-26390-3-git-send-email-plagnioj@jcrosoft.com>
	<20110210071225.GP9041@pengutronix.de>
Message-ID: <20110210115014.GD11255@game.jcrosoft.org>

On 08:12 Thu 10 Feb     , Sascha Hauer wrote:
> On Thu, Feb 10, 2011 at 04:31:59AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > we check before the RW access for generic_memmap_ro instead of
> > generic_memmap_rw
> > 
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > ---
> >  drivers/base/driver.c |    5 +++--
> >  1 files changed, 3 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/base/driver.c b/drivers/base/driver.c
> > index ff92e44..bd7464e 100644
> > --- a/drivers/base/driver.c
> > +++ b/drivers/base/driver.c
> > @@ -223,8 +223,6 @@ int generic_memmap_ro(struct cdev *cdev, void **map, int flags)
> >  	if (!cdev->dev)
> >  		return -EINVAL;
> >  
> > -	if (flags & PROT_WRITE)
> > -		return -EACCES;
> >  	*map = (void *)cdev->dev->map_base;
> >  	return 0;
> >  }
> > @@ -234,6 +232,9 @@ int generic_memmap_rw(struct cdev *cdev, void **map, int flags)
> >  	if (!cdev->dev)
> >  		return -EINVAL;
> >  
> > +	if (flags & PROT_WRITE)
> > +		return -EACCES;
> > +
> 
> So instead of allowing write access in the read/write function we now
> allow it in the readonly function? I'm afraid I don't understand this.
PROT_WRITE means ro no?

Best Regards,
J.


From s.hauer at pengutronix.de  Thu Feb 10 07:01:41 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 10 Feb 2011 13:01:41 +0100
Subject: [PATCH 3/4] driver/memmap: fix generic_memmap_rw and
	generic_memmap_ro
In-Reply-To: <20110210115014.GD11255@game.jcrosoft.org>
References: <1297308720-26390-1-git-send-email-plagnioj@jcrosoft.com>
	<1297308720-26390-3-git-send-email-plagnioj@jcrosoft.com>
	<20110210071225.GP9041@pengutronix.de>
	<20110210115014.GD11255@game.jcrosoft.org>
Message-ID: <20110210120141.GS9041@pengutronix.de>

On Thu, Feb 10, 2011 at 12:50:14PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 08:12 Thu 10 Feb     , Sascha Hauer wrote:
> > On Thu, Feb 10, 2011 at 04:31:59AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > we check before the RW access for generic_memmap_ro instead of
> > > generic_memmap_rw
> > > 
> > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
> > > ---
> > >  drivers/base/driver.c |    5 +++--
> > >  1 files changed, 3 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/base/driver.c b/drivers/base/driver.c
> > > index ff92e44..bd7464e 100644
> > > --- a/drivers/base/driver.c
> > > +++ b/drivers/base/driver.c
> > > @@ -223,8 +223,6 @@ int generic_memmap_ro(struct cdev *cdev, void **map, int flags)
> > >  	if (!cdev->dev)
> > >  		return -EINVAL;
> > >  
> > > -	if (flags & PROT_WRITE)
> > > -		return -EACCES;
> > >  	*map = (void *)cdev->dev->map_base;
> > >  	return 0;
> > >  }
> > > @@ -234,6 +232,9 @@ int generic_memmap_rw(struct cdev *cdev, void **map, int flags)
> > >  	if (!cdev->dev)
> > >  		return -EINVAL;
> > >  
> > > +	if (flags & PROT_WRITE)
> > > +		return -EACCES;
> > > +
> > 
> > So instead of allowing write access in the read/write function we now
> > allow it in the readonly function? I'm afraid I don't understand this.
> PROT_WRITE means ro no?

No. The semantics are from mmap(2):

	PROT_EXEC  Pages may be executed.

	PROT_READ  Pages may be read.

	PROT_WRITE Pages may be written.

	PROT_NONE  Pages may not be accessed.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From s.hauer at pengutronix.de  Thu Feb 10 07:10:03 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 10 Feb 2011 13:10:03 +0100
Subject: barebox startup
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FEA30445A@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FEA30445A@SRV-VS06.TELEVIC.COM>
Message-ID: <20110210121003.GT9041@pengutronix.de>

On Thu, Feb 10, 2011 at 10:04:26AM +0100, Vanalme Filip wrote:
> After struggling a while with i.MX27 NAND flash controller, I was able to start Barebox. Now, I have added some device, but I am not sure that everything starts as it should.
> This is how my devices_init function looks like now : 
> 
> static struct memory_platform_data ram_pdata = {
> 	.name = "ram0",
> 	.flags = DEVFS_RDWR,
> };
> 
> static struct device_d sdram_dev = {
> 	.id	  = -1,
> 	.name     = "mem",
> 	.map_base = 0xa0000000,
> 	.size     = 128 * 1024 * 1024,  /* 128 MB SDRAM */
> 	.platform_data = &ram_pdata,
> };
> 
> static struct fec_platform_data fec_info = {
> 	.xcv_type = MII100,
> 	.phy_addr = 1,
> };

The phy address may be wrong, please check in the schematics/phy data
sheet whether it is correct.

> 
> 
> I expected to see the autoboot count-down and at least something about
> the network initialization.  I think it probably has something to do
> with the env/config script file. I don't know exactly how it should be
> used. I ran ./scripts/bareboxenv -s -p 0x10000 arch/arm/imx27pdk/env
> env.bin which created env.bin in the barebox root. Afterwards, when
> doing a make all, I could see that there is a /env folder on my device
> which contains the config file. I could execute that script from the
> command line, but I suppose it should be executed automatically
> somehow.

You should have something like the following in your config to get an
environment:

CONFIG_DEFAULT_ENVIRONMENT=y
CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/karo-tx28/env"

(with karo-tx28 being your board)

> 
> 
> For the moment, I don't have any activity on my Ethernet ports (no
> leds on or blinking), although I added the fec device. When I execute
> the dhcp command, I get :
> 
> barebox:/ dhcp
> warning: No MAC address set. Using random address 8E:A2:E8:DD:E2:73
> phy0: Link is up - 100/Full
> transmission timeout
> T transmission timeout
> T transmission timeout
> 
> But, whether I connect the cable or not, it always shows "phy0:Link is up - 100/Full".

Have a look at the output of md -s /dev/phy0. You should see valid phy
registers, not 0xffffffff.

> 
> I also have a problem with the environment settings. Obviously, I can
> set some environment variables, e.g. ipaddr=192.168.1.10 :
> 
> barebox:/ ipaddr=192.168.1.10
> barebox:/ printenv
> locals:
> ipaddr=192.168.1.10
> globals:
> barebox:/ saveenv
> saving environment
> barebox:/
> 
> But, although I did a saveenv (obviously successful), the environment
> settings disappear after resetting the board.

Unlike U-Boot barebox does not save the content of environment
variables. Instead it saves the content of /env/. So to change the ip
address do a 'edit /env/config', saveenv. Also, the ip address is stored
in a device variable which is accessible through eth0.ipaddr=a.b.c.d.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mickael.chazaux at gmail.com  Thu Feb 10 08:47:56 2011
From: mickael.chazaux at gmail.com (Mickael Chazaux)
Date: Thu, 10 Feb 2011 14:47:56 +0100
Subject: No NAND access on AT91SAM9G20-EK
In-Reply-To: <20110210114858.GC11255@game.jcrosoft.org>
References: <AANLkTikb2tgLZhBYbunUG10Sz7FO3Yx_P1+5Fo0GonAD@mail.gmail.com>
	<20110210114858.GC11255@game.jcrosoft.org>
Message-ID: <AANLkTik2GqQpHfbnXAOy1+uar0LwCwpX+itJbNN3x+xg@mail.gmail.com>

Hi,

2011/2/10 Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>:
> Hi,
>
> ? ? ? ?which ecc did u use before?

The ECC type used is NAND_ECC_HW, defined in file
arch/arm/boards/at91sam9260ek/init.c. I program the NAND using USB and
SAM-BA. I did not find a setting in SAM-BA to change the ECC type.

Changing the ECC to NAND_ECC_NONE in the above mentioned file makes
the NAND readable and my kernel boots, but this big fat warning ;-)
appears : NAND_ECC_NONE selected by board driver. This is not
recommended !!

Regards,

Mickael

>
> Best Regards,
> J.
> On 12:09 Thu 10 Feb ? ? , Mickael Chazaux wrote:
>> Hi,
>>
>> I managed to compile Barebox for AT91SAM9G20-EK, and I can run it. However
>> it seems not capable of reading the NAND Flash.
>>
>> Output is at [1], my configuration is [2]. The "err -74" is EBADMSG, in
>> line 1057 of "file drivers/mtd/nand/nand_base.c"
>>
>> [1]
>> barebox 2011.02.0-00070-gc5dd4c4-dirty (Feb 10 2011 - 11:58:24)
>>
>> Board: Atmel at91sam9g20-ek
>> Clocks: CPU 792 MHz, master 132 MHz, main 18.432 MHz
>> NAND device: Manufacturer ID: 0xec, Chip ID: 0xda (Samsung NAND 256MiB
>> 3,3V 8-bit)
>> Scanning device for bad blocks
>> Bad eraseblock 1621 at 0x0caa0000
>> Malloc space: 0x23b00000 -> 0x23f00000 (size ?4 MB)
>> Stack space : 0x23af8000 -> 0x23b00000 (size 32 kB)
>> err -74
>> envfs: wrong magic on /dev/env0
>> no valid environment found on /dev/env0. Using default environment
>> running /env/bin/init...
>>
>> Hit any key to stop autoboot: ?3
>>
>> type update_kernel [<imagename>] to update kernel into flash
>> type udate_root [<imagename>] to update rootfs into flash
>>
>> 9G20-EK:/
>>
>> [2]
>> #
>> # Automatically generated make config: don't edit
>> # Linux/arm 2011.02.0 Barebox Configuration
>> # Thu Feb 10 11:58:15 2011
>> #
>> # CONFIG_BOARD_LINKER_SCRIPT is not set
>> CONFIG_GENERIC_LINKER_SCRIPT=y
>> CONFIG_ARM=y
>>
>> #
>> # System Type
>> #
>> CONFIG_ARCH_AT91=y
>> # CONFIG_ARCH_EP93XX is not set
>> # CONFIG_ARCH_IMX is not set
>> # CONFIG_ARCH_MXS is not set
>> # CONFIG_ARCH_NETX is not set
>> # CONFIG_ARCH_NOMADIK is not set
>> # CONFIG_ARCH_OMAP is not set
>> # CONFIG_ARCH_S3C24xx is not set
>> # CONFIG_ARCH_VERSATILE is not set
>>
>> #
>> # Processor Type
>> #
>> CONFIG_CPU_32=y
>> CONFIG_CPU_ARM926T=y
>> CONFIG_CPU_32v5=y
>>
>> #
>> # processor features
>> #
>> # CONFIG_BOOT_ENDIANNESS_SWITCH is not set
>> CONFIG_ARCH_TEXT_BASE=0x23f00000
>> CONFIG_BOARDINFO="Atmel at91sam9g20-ek"
>> CONFIG_HAVE_NAND_ATMEL_BUSWIDTH_16=y
>>
>> #
>> # Atmel AT91 System-on-Chip
>> #
>> # CONFIG_ARCH_AT91SAM9260 is not set
>> # CONFIG_ARCH_AT91SAM9261 is not set
>> # CONFIG_ARCH_AT91SAM9263 is not set
>> # CONFIG_ARCH_AT91SAM9G10 is not set
>> CONFIG_ARCH_AT91SAM9G20=y
>> # CONFIG_ARCH_AT91SAM9G45 is not set
>> CONFIG_MACH_AT91SAM9G20EK=y
>>
>> #
>> # AT91 Board Options
>> #
>> # CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16 is not set
>> # CONFIG_AT91_HAVE_2MMC is not set
>> # CONFIG_AEABI is not set
>>
>> #
>> # Arm specific settings
>> #
>> CONFIG_CMD_ARM_CPUINFO=y
>> CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
>> CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
>> CONFIG_GREGORIAN_CALENDER=y
>> CONFIG_HAS_KALLSYMS=y
>> CONFIG_HAS_MODULES=y
>> CONFIG_CMD_MEMORY=y
>> CONFIG_ENV_HANDLING=y
>> CONFIG_GENERIC_GPIO=y
>>
>> #
>> # General Settings
>> #
>> CONFIG_LOCALVERSION_AUTO=y
>>
>> #
>> # memory layout
>> #
>> CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
>> CONFIG_TEXT_BASE=0x23f00000
>> CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
>> CONFIG_MEMORY_LAYOUT_DEFAULT=y
>> # CONFIG_MEMORY_LAYOUT_FIXED is not set
>> CONFIG_STACK_SIZE=0x8000
>> CONFIG_MALLOC_SIZE=0x400000
>> # CONFIG_BROKEN is not set
>> # CONFIG_EXPERIMENTAL is not set
>> CONFIG_PROMPT="9G20-EK:"
>> CONFIG_BAUDRATE=115200
>> CONFIG_LONGHELP=y
>> CONFIG_CBSIZE=1024
>> CONFIG_MAXARGS=16
>> CONFIG_SHELL_HUSH=y
>> # CONFIG_SHELL_SIMPLE is not set
>> CONFIG_GLOB=y
>> CONFIG_PROMPT_HUSH_PS2="y"
>> # CONFIG_HUSH_FANCY_PROMPT is not set
>> # CONFIG_HUSH_GETOPT is not set
>> CONFIG_CMDLINE_EDITING=y
>> CONFIG_AUTO_COMPLETE=y
>> # CONFIG_MENU is not set
>> # CONFIG_PASSWORD is not set
>> CONFIG_DYNAMIC_CRC_TABLE=y
>> CONFIG_ERRNO_MESSAGES=y
>> CONFIG_TIMESTAMP=y
>> CONFIG_CONSOLE_FULL=y
>> CONFIG_CONSOLE_ACTIVATE_FIRST=y
>> # CONFIG_OF_FLAT_TREE is not set
>> CONFIG_PARTITION=y
>> CONFIG_DEFAULT_ENVIRONMENT=y
>> # CONFIG_DEFAULT_ENVIRONMENT_GENERIC is not set
>> CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9260ek/env"
>> # CONFIG_POLLER is not set
>>
>> #
>> # Debugging
>> #
>> # CONFIG_DEBUG_INFO is not set
>> CONFIG_ENABLE_FLASH_NOISE=y
>> # CONFIG_ENABLE_PARTITION_NOISE is not set
>> # CONFIG_ENABLE_DEVICE_NOISE is not set
>>
>> #
>> # Commands
>> #
>>
>> #
>> # scripting
>> #
>> CONFIG_CMD_EDIT=y
>> CONFIG_CMD_SLEEP=y
>> CONFIG_CMD_SAVEENV=y
>> CONFIG_CMD_LOADENV=y
>> CONFIG_CMD_EXPORT=y
>> CONFIG_CMD_PRINTENV=y
>> CONFIG_CMD_READLINE=y
>> CONFIG_CMD_TRUE=y
>> CONFIG_CMD_FALSE=y
>> # CONFIG_CMD_LOGIN is not set
>> # CONFIG_CMD_PASSWD is not set
>>
>> #
>> # file commands
>> #
>> CONFIG_CMD_LS=y
>> CONFIG_CMD_RM=y
>> CONFIG_CMD_CAT=y
>> CONFIG_CMD_MKDIR=y
>> CONFIG_CMD_RMDIR=y
>> CONFIG_CMD_CP=y
>> CONFIG_CMD_PWD=y
>> CONFIG_CMD_CD=y
>> CONFIG_CMD_MOUNT=y
>> CONFIG_CMD_UMOUNT=y
>>
>> #
>> # console
>> #
>> CONFIG_CMD_CLEAR=y
>> CONFIG_CMD_ECHO=y
>> # CONFIG_CMD_ECHO_E is not set
>>
>> #
>> # memory
>> #
>> # CONFIG_CMD_LOADB is not set
>> CONFIG_CMD_MEMINFO=y
>> CONFIG_CMD_CRC=y
>> # CONFIG_CMD_CRC_CMP is not set
>> CONFIG_CMD_MTEST=y
>> CONFIG_CMD_MTEST_ALTERNATIVE=y
>>
>> #
>> # flash
>> #
>> CONFIG_CMD_FLASH=y
>> # CONFIG_CMD_UBI is not set
>>
>> #
>> # booting
>> #
>> CONFIG_CMD_BOOTM=y
>> # CONFIG_CMD_BOOTM_ZLIB is not set
>> # CONFIG_CMD_BOOTM_BZLIB is not set
>> CONFIG_CMD_BOOTM_SHOW_TYPE=y
>> CONFIG_CMD_BOOTZ=y
>> CONFIG_CMD_BOOTU=y
>> CONFIG_CMD_RESET=y
>> CONFIG_CMD_GO=y
>> CONFIG_CMD_TIMEOUT=y
>> CONFIG_CMD_PARTITION=y
>> CONFIG_CMD_TEST=y
>> CONFIG_CMD_VERSION=y
>> CONFIG_CMD_HELP=y
>> CONFIG_CMD_DEVINFO=y
>> CONFIG_CMD_GPIO=y
>> # CONFIG_CMD_UNLZO is not set
>> # CONFIG_CMD_I2C is not set
>> CONFIG_NET=y
>> CONFIG_NET_DHCP=y
>> # CONFIG_NET_NFS is not set
>> CONFIG_NET_PING=y
>> CONFIG_NET_TFTP=y
>> # CONFIG_NET_TFTP_PUSH is not set
>> # CONFIG_NET_NETCONSOLE is not set
>> # CONFIG_NET_RESOLV is not set
>>
>> #
>> # Drivers
>> #
>>
>> #
>> # serial drivers
>> #
>> # CONFIG_DRIVER_SERIAL_ARM_DCC is not set
>> # CONFIG_DRIVER_SERIAL_NS16550 is not set
>> CONFIG_DRIVER_SERIAL_ATMEL=y
>> CONFIG_HAS_MACB=y
>> CONFIG_MIIDEV=y
>>
>> #
>> # Network drivers
>> #
>> # CONFIG_DRIVER_NET_SMC911X is not set
>> # CONFIG_DRIVER_NET_SMC91111 is not set
>> CONFIG_DRIVER_NET_MACB=y
>>
>> #
>> # SPI drivers
>> #
>> # CONFIG_SPI is not set
>> CONFIG_I2C=y
>>
>> #
>> # I2C Hardware Bus support
>> #
>>
>> #
>> # flash drivers
>> #
>> CONFIG_DRIVER_CFI=y
>> CONFIG_DRIVER_CFI_INTEL=y
>> CONFIG_DRIVER_CFI_AMD=y
>> CONFIG_DRIVER_CFI_BANK_WIDTH_1=y
>> CONFIG_DRIVER_CFI_BANK_WIDTH_2=y
>> CONFIG_DRIVER_CFI_BANK_WIDTH_4=y
>> # CONFIG_DRIVER_CFI_BANK_WIDTH_8 is not set
>> CONFIG_CFI_BUFFER_WRITE=y
>> CONFIG_MTD=y
>> CONFIG_NAND=y
>> CONFIG_NAND_ATMEL=y
>> # CONFIG_MTD_NAND_VERIFY_WRITE is not set
>> # CONFIG_MTD_NAND_ECC_SMC is not set
>> CONFIG_MTD_NAND_IDS=y
>> # CONFIG_UBI is not set
>> # CONFIG_ATA is not set
>> # CONFIG_USB is not set
>> # CONFIG_USB_GADGET is not set
>> # CONFIG_VIDEO is not set
>> # CONFIG_MCI is not set
>>
>> #
>> # MFD
>> #
>> # CONFIG_I2C_MC13892 is not set
>> # CONFIG_I2C_MC34704 is not set
>> # CONFIG_I2C_MC9SDZ60 is not set
>> # CONFIG_I2C_LP3972 is not set
>> # CONFIG_I2C_TWL4030 is not set
>> # CONFIG_LED is not set
>>
>> #
>> # Filesystem support
>> #
>> # CONFIG_FS_CRAMFS is not set
>> CONFIG_FS_RAMFS=y
>> CONFIG_FS_DEVFS=y
>> CONFIG_CRC32=y
>> # CONFIG_DIGEST is not set
>> # CONFIG_GENERIC_FIND_NEXT_BIT is not set
>> # CONFIG_PROCESS_ESCAPE_SEQUENCE is not set
>>
>> _______________________________________________
>> barebox mailing list
>> barebox at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox
>


From plagnioj at jcrosoft.com  Fri Feb 11 14:22:04 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 11 Feb 2011 20:22:04 +0100
Subject: [PATCH] at91sam263ek: switch to default env
Message-ID: <1297452124-22242-1-git-send-email-plagnioj@jcrosoft.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre at atmel.com>
Cc: Patrice Vilchez <patrice.vilchez at atmel.com>
---
 arch/arm/boards/at91sam9263ek/env/bin/_update      |   36 --------------
 arch/arm/boards/at91sam9263ek/env/bin/boot         |   47 ------------------
 arch/arm/boards/at91sam9263ek/env/bin/hush_hack    |    1 -
 arch/arm/boards/at91sam9263ek/env/bin/init         |   38 ---------------
 .../at91sam9263ek/env/bin/update_barebox_xmodem    |   26 ----------
 .../arm/boards/at91sam9263ek/env/bin/update_kernel |   15 ------
 arch/arm/boards/at91sam9263ek/env/bin/update_root  |   16 ------
 arch/arm/boards/at91sam9263ek/env/config           |   51 ++++++++++++-------
 arch/arm/configs/at91sam9263ek_defconfig           |    3 +-
 9 files changed, 34 insertions(+), 199 deletions(-)
 delete mode 100644 arch/arm/boards/at91sam9263ek/env/bin/_update
 delete mode 100644 arch/arm/boards/at91sam9263ek/env/bin/boot
 delete mode 100644 arch/arm/boards/at91sam9263ek/env/bin/hush_hack
 delete mode 100644 arch/arm/boards/at91sam9263ek/env/bin/init
 delete mode 100644 arch/arm/boards/at91sam9263ek/env/bin/update_barebox_xmodem
 delete mode 100644 arch/arm/boards/at91sam9263ek/env/bin/update_kernel
 delete mode 100644 arch/arm/boards/at91sam9263ek/env/bin/update_root

diff --git a/arch/arm/boards/at91sam9263ek/env/bin/_update b/arch/arm/boards/at91sam9263ek/env/bin/_update
deleted file mode 100644
index 014bce3..0000000
--- a/arch/arm/boards/at91sam9263ek/env/bin/_update
+++ /dev/null
@@ -1,36 +0,0 @@
-#!/bin/sh
-
-if [ -z "$part" -o -z "$image" ]; then
-	echo "define \$part and \$image"
-	exit 1
-fi
-
-if [ ! -e "$part" ]; then
-	echo "Partition $part does not exist"
-	exit 1
-fi
-
-if [ $# = 1 ]; then
-	image=$1
-fi
-
-if [ x$ip = xdhcp ]; then
-	dhcp
-fi
-
-ping $eth0.serverip
-if [ $? -ne 0 ] ; then
-	echo "update aborted"
-	exit 1
-fi
-
-unprotect $part
-
-echo
-echo "erasing partition $part"
-erase $part
-
-echo
-echo "flashing $image to $part"
-echo
-tftp $image $part
diff --git a/arch/arm/boards/at91sam9263ek/env/bin/boot b/arch/arm/boards/at91sam9263ek/env/bin/boot
deleted file mode 100644
index 533dea7..0000000
--- a/arch/arm/boards/at91sam9263ek/env/bin/boot
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-if [ x$1 = xnand ]; then
-	root=nand
-	kernel=nand
-fi
-
-if [ x$1 = xnet ]; then
-	root=net
-	kernel=net
-fi
-
-if [ x$1 = xnor ]; then
-	root=nor
-	kernel=nor
-fi
-
-if [ x$ip = xdhcp ]; then
-	bootargs="$bootargs ip=dhcp"
-else
-	bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::"
-fi
-
-if [ x$root = xnand ]; then
-	bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2"
-elif [ x$root = xnor ]; then
-	bootargs="$bootargs root=$rootpart_nor rootfstype=jffs2"
-else
-	bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp"
-fi
-
-bootargs="$bootargs mtdparts=physmap-flash.0:$nor_parts"
-
-if [ $kernel = net ]; then
-	if [ x$ip = xdhcp ]; then
-		dhcp
-	fi
-	tftp $uimage uImage || exit 1
-	bootm uImage
-elif [ $kernel = nor ]; then
-	bootm /dev/nor0.kernel
-else
-	bootm /dev/nand0.kernel.bb
-fi
-
diff --git a/arch/arm/boards/at91sam9263ek/env/bin/hush_hack b/arch/arm/boards/at91sam9263ek/env/bin/hush_hack
deleted file mode 100644
index 5fffa92..0000000
--- a/arch/arm/boards/at91sam9263ek/env/bin/hush_hack
+++ /dev/null
@@ -1 +0,0 @@
-nand -a /dev/nand0.*
diff --git a/arch/arm/boards/at91sam9263ek/env/bin/init b/arch/arm/boards/at91sam9263ek/env/bin/init
deleted file mode 100644
index eaa298d..0000000
--- a/arch/arm/boards/at91sam9263ek/env/bin/init
+++ /dev/null
@@ -1,38 +0,0 @@
-#!/bin/sh
-
-PATH=/env/bin
-export PATH
-
-. /env/config
-if [ -e /dev/nor0 ]; then
-	addpart /dev/nor0 $nor_parts
-fi
-
-if [ -e /dev/nand0 ]; then
-	addpart /dev/nand0 $nand_parts
-
-	# Uh, oh, hush first expands wildcards and then starts executing
-	# commands. What a bug!
-	source /env/bin/hush_hack 
-fi
-
-if [ -z $eth0.ethaddr ]; then
-	while [ -z $eth0.ethaddr ]; do
-		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
-	done
-	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
-fi
-
-echo
-echo -n "Hit any key to stop autoboot: "
-timeout -a $autoboot_timeout
-if [ $? != 0 ]; then
-	echo
-	echo "type update_kernel nor [<imagename>] to update kernel into flash"
-	echo "type update_root nor [<imagename>] to update rootfs into flash"
-	echo "type update_barebox_xmodem nor to update barebox into flash"
-	echo
-	exit
-fi
-
-boot
diff --git a/arch/arm/boards/at91sam9263ek/env/bin/update_barebox_xmodem b/arch/arm/boards/at91sam9263ek/env/bin/update_barebox_xmodem
deleted file mode 100644
index 39818b5..0000000
--- a/arch/arm/boards/at91sam9263ek/env/bin/update_barebox_xmodem
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-if [ x$1 = xnand ]; then
-	part=/dev/nand0.barebox
-elif [ x$1 = xnor ]; then
-	part=/dev/nor0.barebox
-else
-	echo "usage: $0 nor|nand"
-	exit 1
-fi
-
-loadb -f barebox.bin -c
-
-unprotect $part
-echo
-echo "erasing partition $part"
-erase $part
-
-echo
-echo "flashing barebox.bin to $part"
-echo
-cp barebox.bin $part
-crc32 -f barebox.bin
-crc32 -f $part
diff --git a/arch/arm/boards/at91sam9263ek/env/bin/update_kernel b/arch/arm/boards/at91sam9263ek/env/bin/update_kernel
deleted file mode 100644
index 05c822d..0000000
--- a/arch/arm/boards/at91sam9263ek/env/bin/update_kernel
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-image=$uimage
-if [ x$1 = xnand ]; then
-	part=/dev/nand0.kernel.bb
-elif [ x$1 = xnor ]; then
-	part=/dev/nor0.kernel
-else
-	echo "usage: $0 nor|nand [imagename]"
-	exit 1
-fi
-
-. /env/bin/_update $2
diff --git a/arch/arm/boards/at91sam9263ek/env/bin/update_root b/arch/arm/boards/at91sam9263ek/env/bin/update_root
deleted file mode 100644
index a751372..0000000
--- a/arch/arm/boards/at91sam9263ek/env/bin/update_root
+++ /dev/null
@@ -1,16 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-image=$jffs2
-if [ x$1 = xnand ]; then
-	part=/dev/nand0.root.bb
-elif [ x$1 = xnor ]; then
-	part=/dev/nor0.root
-else
-	echo "usage: $0 nor|nand [imagename]"
-	exit 1
-fi
-
-. /env/bin/_update $2
-
diff --git a/arch/arm/boards/at91sam9263ek/env/config b/arch/arm/boards/at91sam9263ek/env/config
index 4b322ad..49c4339 100644
--- a/arch/arm/boards/at91sam9263ek/env/config
+++ b/arch/arm/boards/at91sam9263ek/env/config
@@ -1,28 +1,41 @@
 #!/bin/sh
 
-# can be either 'net', 'nor' or 'nand''
-kernel=net
-root=net
-
-uimage=uImage
-jffs2=root.jffs2
-
-autoboot_timeout=3
-
-nfsroot=""
-bootargs="console=ttyS0,115200"
-
-nor_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)"
-rootpart_nor="/dev/mtdblock3"
-
-#nand_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)"
-#rootpart_nand="/dev/mtdblock7"
-
 # use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
 ip=dhcp
 
 # or set your networking parameters here
 #eth0.ipaddr=a.b.c.d
 #eth0.netmask=a.b.c.d
 #eth0.gateway=a.b.c.d
-#eth0.serverip=192.168.23.1
+#eth0.serverip=a.b.c.d
+
+# can be either 'net' , 'nor' or 'nand'
+kernel_loc=net
+# can be either 'net', 'nor', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root.$rootfs_type
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+#kernelimage_type=zimage
+#kernelimage=zImage
+kernelimage_type=uimage
+kernelimage=uImage
+#kernelimage_type=raw
+#kernelimage=Image
+#kernelimage_type=raw_lzo
+#kernelimage=Image.lzo
+
+nand_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nand=3
+
+autoboot_timeout=3
+
+bootargs="console=ttyS0,115200"
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
+
diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263ek_defconfig
index c92999f..3e7752a 100644
--- a/arch/arm/configs/at91sam9263ek_defconfig
+++ b/arch/arm/configs/at91sam9263ek_defconfig
@@ -3,9 +3,11 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_PROMPT="9263-EK:"
 CONFIG_LONGHELP=y
 CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/at91sam9263ek/env"
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
@@ -15,7 +17,6 @@ CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
 CONFIG_CMD_MTEST=y
 CONFIG_CMD_FLASH=y
 CONFIG_CMD_BOOTM_ZLIB=y
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:50 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:50 +0100
Subject: [PATCH 13/15] mini2440: Add booting from NAND support
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-14-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

With this patch barebox can now be booted from RAM, NOR and NAND on the
mini2440 platform. 'CONFIG_S3C24XX_NAND_BOOT' must still be 'y' to be able to
boot from NAND.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/Makefile        |    2 +-
 arch/arm/boards/mini2440/lowlevel_init.S |   39 ++++++++++++++++++++++++++++++
 arch/arm/mach-s3c24xx/Kconfig            |    4 +++
 3 files changed, 44 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/boards/mini2440/lowlevel_init.S

diff --git a/arch/arm/boards/mini2440/Makefile b/arch/arm/boards/mini2440/Makefile
index 09f7e7d..856fed0 100644
--- a/arch/arm/boards/mini2440/Makefile
+++ b/arch/arm/boards/mini2440/Makefile
@@ -1,2 +1,2 @@
 
-obj-y += mini2440.o
+obj-y += mini2440.o lowlevel_init.o
diff --git a/arch/arm/boards/mini2440/lowlevel_init.S b/arch/arm/boards/mini2440/lowlevel_init.S
new file mode 100644
index 0000000..41f50cb
--- /dev/null
+++ b/arch/arm/boards/mini2440/lowlevel_init.S
@@ -0,0 +1,39 @@
+/*
+ * Low level initialization for the FriendlyARM mini2440 board
+ */
+
+#include <config.h>
+#include <mach/s3c24x0-iomap.h>
+
+	.section ".text_bare_init.board_init_lowlevel","ax"
+
+/* ------------------------------------------------------------------------ */
+
+.globl board_init_lowlevel
+board_init_lowlevel:
+
+	mov r10, lr		/* save the link register */
+
+	bl s3c24x0_disable_wd
+
+	/* skip everything here if we are already running from SDRAM */
+	cmp pc, #S3C24X0_SDRAM_BASE
+	blo 1f
+	cmp pc, #S3C24X0_SDRAM_END
+	bhs 1f
+
+	mov pc, r10
+
+/* we are running from NOR or NAND/SRAM memory. Do further initialisation */
+1:
+	bl s3c24x0_pll_init
+
+	bl s3c24x0_sdram_init
+
+#ifdef CONFIG_S3C24XX_NAND_BOOT
+	mov lr, r10		/* restore the link register */
+/* up to here we are running from the internal SRAM area */
+	b s3c24x0_nand_boot	/* does return directly to our caller into SDRAM */
+#else
+	mov pc, r10
+#endif
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 8b86d2d..33d230c 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -41,6 +41,10 @@ config MACH_A9M2440
 config MACH_MINI2440
 	bool "Mini 2440"
 	select CPU_S3C2440
+	select MACH_HAS_LOWLEVEL_INIT
+	select MACH_DO_LOWLEVEL_INIT
+	select S3C24XX_PLL_INIT
+	select S3C24XX_SDRAM_INIT
 	select HAS_DM9000
 	help
 	  Say Y here if you are using Mini 2440 dev board equipped
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:48 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:48 +0100
Subject: [PATCH 11/15] mini2440: Add GPIO settings
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-12-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND, when there is no
other first level bootlader.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |  137 +++++++++++++++++++++++++++++++++++
 1 files changed, 137 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 2aeb09e..30dff07 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -35,6 +35,7 @@
 #include <nand.h>
 #include <asm/armlinux.h>
 #include <asm/io.h>
+#include <mach/gpio.h>
 #include <mach/s3c24x0-iomap.h>
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
@@ -82,12 +83,148 @@ static struct device_d dm9000_dev = {
 	.platform_data = &dm9000_data,
 };
 
+static const unsigned pin_usage[] = {
+	/* address bus, used by NOR, SDRAM */
+	GPA1_ADDR16,
+	GPA2_ADDR17,
+	GPA3_ADDR18,
+	GPA4_ADDR19,
+	GPA5_ADDR20,
+	GPA6_ADDR21,
+	GPA7_ADDR22,
+
+	GPA8_ADDR23_GPIO | GPIO_IN,
+	GPA9_ADDR24,	/* BA0 */
+	GPA10_ADDR25,	/* BA1 */
+	GPA11_ADDR26_GPIO | GPIO_IN,	/* not connected */
+
+	/* DM9000 requirements */
+	GPA15_NGCS4,
+	GPF7_EINT7,
+
+	/* de-activate the speaker */
+	GPB0_GPIO | GPIO_OUT | GPIO_VAL(0),
+
+	/* SD socket */
+	GPE5_SDCLK,
+	GPE6_SDCMD,
+	GPE7_SDDAT0,
+	GPE8_SDDAT1,
+	GPE9_SDDAT2,
+	GPE10_SDDAT3,
+	GPG8_GPIO | GPIO_IN,	/* change detection */
+	GPH8_GPIO | GPIO_IN,	/* write protection sense */
+
+	/* NAND requirements */
+	GPA17_CLE,
+	GPA18_ALE,
+	GPA19_NFWE,
+	GPA20_NFRE,
+	GPA21_NRSTOUT,
+	GPA22_NFCE,
+
+	/* Video out */
+	GPC0_LEND,
+	GPC1_VCLK,
+	GPC2_VLINE,
+	GPC3_VFRAME,
+	GPC4_VM,
+	GPC5_LPCOE,
+	GPC6_LPCREV,
+	GPC7_LPCREVB,
+	GPG4_LCD_PWREN,
+
+	GPC8_VD0,
+	GPC9_VD1,
+	GPC10_VD2,
+	GPC11_VD3,
+	GPC12_VD4,
+	GPC13_VD5,
+	GPC14_VD6,
+	GPC15_VD7,
+	GPD0_VD8,
+	GPD1_VD9,
+	GPD2_VD10,
+	GPD3_VD11,
+	GPD4_VD12,
+	GPD5_VD13,
+	GPD6_VD14,
+	GPD7_VD15,
+	GPD8_VD16,
+	GPD9_VD17,
+	GPD10_VD18,
+	GPD11_VD19,
+	GPD12_VD20,
+	GPD13_VD21,
+	GPD14_VD22,
+	GPD15_VD23,
+
+	/* K6 or CON12, pin 6, external pull up  */
+	GPG11_EINT19 | GPIO_IN,
+	/* K5 or CON12, pin 5*/
+	GPG7_EINT15 | GPIO_IN,
+	/* K4 or CON12, pin 4 */
+	GPG6_EINT14 | GPIO_IN,
+	/* K3 or CON12, pin 3 */
+	GPG5_EINT13 | GPIO_IN,
+	/* K2 or CON12, pin 2 */
+	GPG3_EINT11 | GPIO_IN,
+	/* K1 or CON12, pin 1, external pull up */
+	GPG0_EINT8 | GPIO_IN,
+
+	/* LED 1 1=off */
+	GPB5_GPIO | GPIO_OUT | GPIO_VAL(1),
+	/* LED 2 1=off */
+	GPB6_GPIO | GPIO_OUT | GPIO_VAL(1),
+	/* LED 3 1=off */
+	GPB7_GPIO | GPIO_OUT | GPIO_VAL(1),
+	/* LED 4 1=off */
+	GPB8_GPIO | GPIO_OUT | GPIO_VAL(1),
+
+	/* camera interface (ignore it) */
+	GPJ0_GPIO | GPIO_IN,
+	GPJ1_GPIO | GPIO_IN,
+	GPJ2_GPIO | GPIO_IN,
+	GPJ3_GPIO | GPIO_IN,
+	GPJ4_GPIO | GPIO_IN,
+	GPJ5_GPIO | GPIO_IN,
+	GPJ6_GPIO | GPIO_IN,
+	GPJ7_GPIO | GPIO_IN,
+	GPJ8_GPIO | GPIO_IN,
+	GPJ9_GPIO | GPIO_IN,
+	GPJ10_GPIO | GPIO_IN,
+	GPJ11_GPIO | GPIO_IN,
+	GPJ12_GPIO | GPIO_IN,
+
+	/* I2C bus */
+	GPE14_IICSCL,	/* external pull up */
+	GPE15_IICSDA,	/* external pull up */
+
+	GPA12_NGCS1,	/* CON5, pin 7 */
+	GPA13_NGCS2,	/* CON5, pin 8 */
+	GPA14_NGCS3,	/* CON5, pin 9 */
+	GPA16_NGCS5,	/* CON5, pin 10 */
+
+	/* UART2 (spare) */
+	GPH4_TXD1,
+	GPH5_RXD1,
+
+	/* UART3 (spare) */
+	GPH6_TXD2,
+	GPH7_RXD2,
+};
+
 static int mini2440_devices_init(void)
 {
 	uint32_t reg;
+	int i;
 
 	sdram_dev.size = s3c24x0_get_memory_size();
 
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
+		s3c_gpio_mode(pin_usage[i]);
+
 	reg = readl(BWSCON);
 
 	/* CS#4 to access the network controller */
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:39 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:39 +0100
Subject: [PATCH 02/15] MACH-S3C24xx: Fix typo in UART2_SIZE macro
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-3-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h
index ab3dc4f..a990d80 100644
--- a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h
+++ b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h
@@ -88,7 +88,7 @@
 #define UART1_BASE (S3C24X0_UART_BASE)
 #define UART1_SIZE 0x4000
 #define UART2_BASE (S3C24X0_UART_BASE + 0x4000)
-#define UART3_SIZE 0x4000
+#define UART2_SIZE 0x4000
 #define UART3_BASE (S3C24X0_UART_BASE + 0x8000)
 #define UART3_SIZE 0x4000
 
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:47 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:47 +0100
Subject: [PATCH 10/15] mini2440: Add SDRAM size autodetection
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-11-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

If the SDRAM type will change in the future, only the 'config.h' must be
adapted to the new settings. The real size will be read back from this setting.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 46581cc..2aeb09e 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -48,7 +48,6 @@ static struct device_d sdram_dev = {
 	.id		= -1,
 	.name		= "mem",
 	.map_base	= CS6_BASE,
-	.size		= 64 * 1024 * 1024,
 	.platform_data	= &ram_pdata,
 };
 
@@ -87,6 +86,8 @@ static int mini2440_devices_init(void)
 {
 	uint32_t reg;
 
+	sdram_dev.size = s3c24x0_get_memory_size();
+
 	reg = readl(BWSCON);
 
 	/* CS#4 to access the network controller */
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:42 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:42 +0100
Subject: [PATCH 05/15] mini2440: Fix a runtime warning when '.id=0' is used
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-6-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

---
 arch/arm/boards/mini2440/mini2440.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index a3bb817..e22fbd0 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -45,6 +45,7 @@ static struct memory_platform_data ram_pdata = {
 };
 
 static struct device_d sdram_dev = {
+	.id		= -1,
 	.name		= "mem",
 	.map_base	= CS6_BASE,
 	.size		= 64 * 1024 * 1024,
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:45 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:45 +0100
Subject: [PATCH 08/15] mini2440: Add SDRAM config settings
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-9-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.

Two types of SDRAM devices are known to be shipped by FriendlyARM. This config
should work on both of them. But it is really tested only for the HY57V561620
type.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/config.h |   58 +++++++++++++++++++++++++++++++++++++
 1 files changed, 58 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/config.h b/arch/arm/boards/mini2440/config.h
index 1edd69c..1f2fb4c 100644
--- a/arch/arm/boards/mini2440/config.h
+++ b/arch/arm/boards/mini2440/config.h
@@ -69,4 +69,62 @@
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 # define BOARD_DEFAULT_NAND_TIMING CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1)
 #endif
+
+/*
+ * Needed in the generic SDRAM boot code only
+ *
+ * SDRAM configuration
+ * Two types of SDRAM devices are common on mini2440:
+ * - Two devices of HY57V561620 to form 64 MiB in bank 6 only
+ *   - http://friendlyarm.net/dl.php?file=HY57V561620.pdf
+ * - Two devices of MT48LC16M16 to form 64 MiB in bank 6 only
+ *   - http://friendlyarm.net/dl.php?file=MT48LC16M16.pdf
+
+ * Most of the time the CPU is specified for 400 MHz only. As the CPU frequency
+ * and the SDRAM frequency are fix coupled by 4:1, the SDRAM runs at HCLCK.
+ * So, we need a 100 MHz timing setup with CL=2 for the SDRAMs.
+ */
+
+/*
+ * - ST7/WS7/DW7: reserved, this SDRAM bank is not used
+ * - ST6/WS6/DW6: 32 bit data bus (for SDRAM usage)
+ * - ST5/WS5/DW5: reserved, to be set by the board init code
+ * - ST4/WS4/DW4: reserved, to be set by the board init code
+ * - ST3/WS3/DW3: reserved, to be set by the board init code
+ * - ST2/WS2/DW2: reserved, to be set by the board init code
+ * - ST1/WS1/DW1: reserved, to be set by the board init code
+ * - DW0: not to be changed
+ */
+#define BOARD_SPECIFIC_BWSCON ((0x3 << 28) | (0x2 << 24) | 0x333330)
+/*
+ *  - MT = 11 (= sync dram type)
+ *  - Trcd = 00 (= CL2)
+ *  - SCAN = 01 (= 9 bit collumns)
+ */
+#define BOARD_SPECIFIC_BANKCON6 ((0x3 << 15) + (0x0 << 2) + (0x1))
+#define BOARD_SPECIFIC_BANKCON7 0 /* disabled */
+/*
+ * SDRAM refresh settings
+ *  - REFEN = 1 (= refresh enabled)
+ *  - TREFMD = 0 (= auto refresh)
+ *  - Trp = 00 (= 2 RAS precharge clocks)
+ *  - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns)
+ *  - Refresh = 2^11 + 1 - 100 * 7.8 = 2049 - 780 = 1269
+ */
+#define BOARD_SPECIFIC_REFRESH ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x1 << 18) + 1269)
+/*
+ * SDRAM banksize
+ *  - BURST_EN = 1 (= burst mode enabled)
+ *  - SCKE_EN = 1 (= SDRAM SCKE enabled)
+ *  - SCLK_EN = 1 (= clock active only during accesses)
+ *  - BK67MAP = 001 (= 64 MiB)
+ */
+# define BOARD_SPECIFIC_BANKSIZE ((1 << 7) + (1 << 5) + (1 << 4) + 1)
+/*
+ * SDRAM mode register
+ * CL = 010 (= 2 clocks)
+ */
+# define BOARD_SPECIFIC_MRSRB6 (0x2 << 4)
+# define BOARD_SPECIFIC_MRSRB7 0	/* not used */
+
 #endif /* __CONFIG_H */
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:37 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:37 +0100
Subject: RFC: Booting from NAND for mini2440 platform
Message-ID: <1297606252-802-1-git-send-email-jbe@pengutronix.de>

This patch series brings in NAND boot support for the mini24040 platform and
also does some cleanup (and also fixes some typos).

Testes are welcome, as I only have a mini2440 board with HY57V561620 SDRAM
devices. I added some documentation (thanks to Marek for info how it works
with DFU) about the board itself and how to bring in barebox. Hope it helps
others to enjoy barebox on mini2440.

Regards,
Juergen



From jbe at pengutronix.de  Sun Feb 13 09:10:43 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:43 +0100
Subject: [PATCH 06/15] mini2440: Add some useful documentation
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-7-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |  157 +++++++++++++++++++++++++++++++++++
 1 files changed, 157 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index e22fbd0..17496a4 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -64,6 +64,10 @@ static struct device_d nand_dev = {
 
 /*
  * dm9000 network controller onboard
+ * Connected to CS line 4 and interrupt line EINT7,
+ * data width is 16 bit
+ * Area 1: Offset 0x300...0x303
+ * Area 2: Offset 0x304...0x307
  */
 static struct dm9000_platform_data dm9000_data = {
 	.iobase   = CS4_BASE + 0x300,
@@ -139,3 +143,156 @@ static int mini2440_console_init(void)
 }
 
 console_initcall(mini2440_console_init);
+
+/** @page mini2440 FriendlyARM's mini2440
+
+This system is based on a Samsung S3C2440 CPU. The card is shipped with:
+
+- S3C2440\@400 MHz or 533 MHz (ARM920T/ARMv4T)
+- 12 MHz crystal reference
+- 32.768 kHz crystal reference
+- SDRAM 64 MiB (one bank only)
+   - HY57V561620 (two devices for 64 MiB to form a 32 bit bus)
+     - 4M x 16bit x 4 Banks Mobile SDRAM
+     - 8192 refresh cycles / 64 ms
+     - CL2\@100 MHz
+     - 133 MHz max
+     - collumn address size is 9 bits
+     - row address size is 13 bits
+   - MT48LC16M16 (two devices for 64 MiB to form a 32 bit bus)
+     - 4M x 16bit x 4 Banks Mobile SDRAM
+     - commercial & industrial type
+     - 8192 refresh cycles / 64 ms
+     - CL2\@100 MHz
+     - 133 MHz max
+     - collumn address size is 9 bits
+     - row address size is 13 bits
+- NAND Flash 128MiB...1GiB
+   - K9Fxx08
+- NOR Flash (up to 22 address lines available)
+   - AM29LV160DB, 2 MiB
+   - SST39VF1601, 2 MiB
+   - 16 bit data bus
+- SD card interface, 3.3V (fixed voltage)
+- Host and device USB interface, USB1.1 compliant
+- UDA1341TS Audio
+- DM9000 Ethernet interface
+  - uses CS#4
+  - uses EINT7
+  - 16 bit data bus
+- I2C interface, 100 KHz and 400 KHz
+  - EEPROM
+    - ST M24C08
+    - address 0x50
+- Speaker on GPB0 ("low" = inactive)
+- LCD interface
+- Touch Screen interface
+- Camera interface
+- I2S interface
+- AC97 Audio-CODEC interface
+- three serial RS232 interfaces (one with level converter)
+- SPI interface
+- JTAG interface
+
+How to get the binary image:
+
+Using the default configuration:
+
+ at code
+make ARCH=arm mini2440_defconfig
+ at endcode
+
+Build the binary image:
+
+ at code
+make ARCH=arm CROSS_COMPILE=armv4compiler
+ at endcode
+
+ at note replace the armv4compiler with your ARM v4 cross compiler.
+
+How to bring in \a barebox ?
+
+First run it as a second stage bootloader. There are two known working ways to
+do so:
+
+One way is to use the "device firmware update" feature of the 'supervivi'.
+ - connect a terminal application to the mini2440's serial connector
+ - switch S2 to 'boot from NOR' to boot into 'supervivi'
+ - connect your host to the usb device connector on the mini2440
+ - switch on your mini2440
+ - in 'supervivi' type q (command line) then:
+ at code
+load ram 0x31000000 \<barebox-size\> u
+ at endcode
+ - use a tool for DFU update (for example from openkomo) to transfer the 'barebox.bin' binary
+ - then in 'supervivi' just run
+ at code
+go 0x31000000
+ at endcode
+
+A second way is to use any kind of JTAG adapter. For this case I'm using the
+'JTAKkey tiny' from Amontec and OpenOCD. First you need an adapter for this
+kind of Dongle as it uses a 20 pin connector with 2.54 mm grid, and the
+mini2440 uses a 10 pin connector with 2 mm grid.
+
+ at code
+             Amontec JTAGkey tiny               mini2440
+           -------------------------------------------------------
+              VREF  1   2  n.c.             VREF  1   2  VREF
+            TRST_N  3   4  GND            TRST_N  3   4  SRST_N
+               TDI  5   6  GND               TDI  5   6  TDO
+               TMS  7   8  GND               TMS  7   8  GND
+               TCK  9  10  GND               TCK  9  10  GND
+              n.c. 11  12  GND
+               TDO 13  14  GND
+            SRST_N 15  16  GND
+              n.c. 17  18  GND
+              n.c. 19  20  GND
+ at endcode
+
+Create a simple board description file. I did it this way:
+
+ at code
+source [find interface/jtagkey-tiny.cfg]
+source [find target/samsung_s3c2440.cfg]
+
+adapter_khz 12000
+ at endcode
+
+And then the following steps:
+ - connect a terminal application to the mini2440's serial connector
+ - connect the mini2440 to a working network
+ - switch S2 to boot from NOR to boot into 'supervivi'
+ - switch on your mini2440
+ - run the OpenOCD daemon configured with the file shown above
+ - connect to the OpenOCD daemon via 'telnet'.
+ - run the following commands to download @a barebox into your target
+ at code
+> halt
+> load_image \<path to the 'barebox.bin'\> 0x31000000 bin
+> resume 0x31000000
+ at endcode
+
+Now @a barebox is starting from an already initialized CPU and SDRAM (done by
+'supervivi').
+
+Change to your terminal console and configure the network first. Adapt the
+following settings to your network:
+ at code
+eth0.ipaddr=192.168.1.240
+eth0.netmask=255.255.255.0
+eth0.gateway=192.168.23.2
+eth0.serverip=192.168.1.7
+eth0.ethaddr=00:04:f3:00:06:35
+ at endcode
+
+A 'ping' to your TFTP server should bring a "...is alive" message now.
+
+We are ready now to program @a barebox into the NAND flash:
+
+ at code
+erase /dev/nand0.barebox.bb
+tftp barebox.bin /dev/nand0.barebox.bb
+ at endcode
+
+*/
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:51 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:51 +0100
Subject: [PATCH 14/15] mini2440: Remove some A9M2440 platform leftovers
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-15-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/env/config |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boards/mini2440/env/config b/arch/arm/boards/mini2440/env/config
index 05a2d01..3169fd9 100644
--- a/arch/arm/boards/mini2440/env/config
+++ b/arch/arm/boards/mini2440/env/config
@@ -4,9 +4,8 @@
 kernel=net
 root=net
 
-#uimage=uImage-a9m2440
-uimage=uImage
-jffs2=root-a9m2440.jffs2
+uimage=uImage-mini2440
+jffs2=root-mini2440.jffs2
 
 autoboot_timeout=3
 
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:49 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:49 +0100
Subject: [PATCH 12/15] mini2440: Add MCI support
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-13-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

---
 arch/arm/boards/mini2440/mini2440.c |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 30dff07..b30a9e2 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -33,12 +33,14 @@
 #include <partition.h>
 #include <dm9000.h>
 #include <nand.h>
+#include <mci.h>
 #include <asm/armlinux.h>
 #include <asm/io.h>
 #include <mach/gpio.h>
 #include <mach/s3c24x0-iomap.h>
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
+#include <mach/mci.h>
 
 static struct memory_platform_data ram_pdata = {
 	.name		= "ram0",
@@ -83,6 +85,19 @@ static struct device_d dm9000_dev = {
 	.platform_data = &dm9000_data,
 };
 
+static struct s3c_mci_platform_data mci_data = {
+	.caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz,
+	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
+	.gpio_detect = 232,	/* GPG8_GPIO */
+	.detect_invert = 0,
+};
+
+static struct device_d mci_dev = {
+	.name     = "s3c_mci",
+	.map_base = S3C2410_SDI_BASE,
+	.platform_data	= &mci_data,
+};
+
 static const unsigned pin_usage[] = {
 	/* address bus, used by NOR, SDRAM */
 	GPA1_ADDR16,
@@ -252,6 +267,7 @@ static int mini2440_devices_init(void)
 	devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
 	dev_add_bb_dev("env_raw", NULL);
 #endif
+	register_device(&mci_dev);
 	armlinux_add_dram(&sdram_dev);
 	armlinux_set_bootparams((void *)sdram_dev.map_base + 0x100);
 	armlinux_set_architecture(MACH_TYPE_MINI2440);
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:38 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:38 +0100
Subject: [PATCH 01/15] S3C24xx: Just remove a trailing whitespace
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-2-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/mach-s3c24xx/Kconfig |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 0f4d6e7..8b86d2d 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -43,7 +43,7 @@ config MACH_MINI2440
 	select CPU_S3C2440
 	select HAS_DM9000
 	help
-	  Say Y here if you are using Mini 2440 dev board equipped 
+	  Say Y here if you are using Mini 2440 dev board equipped
 	  with a Samsung S3C2440 Processor
 
 endchoice
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:46 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:46 +0100
Subject: [PATCH 09/15] mini2440: Configure debug UART pins very early
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-10-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND and to avoid any visible
garbage on the screen until the pins are really set.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 17496a4..46581cc 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -138,6 +138,15 @@ static struct device_d mini2440_serial_device = {
 
 static int mini2440_console_init(void)
 {
+	/*
+	 * configure the UART1 right now, as barebox will
+	 * start to send data immediately
+	 */
+	s3c_gpio_mode(GPH0_NCTS0);
+	s3c_gpio_mode(GPH1_NRTS0);
+	s3c_gpio_mode(GPH2_TXD0);
+	s3c_gpio_mode(GPH3_RXD0);
+
 	register_device(&mini2440_serial_device);
 	return 0;
 }
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:41 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:41 +0100
Subject: [PATCH 04/15] mini2440: Be a little be pedantic with the include file
	order
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-5-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

---
 arch/arm/boards/mini2440/mini2440.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 9639176..a3bb817 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -29,15 +29,15 @@
 #include <common.h>
 #include <driver.h>
 #include <init.h>
-#include <asm/armlinux.h>
 #include <generated/mach-types.h>
 #include <partition.h>
+#include <dm9000.h>
 #include <nand.h>
+#include <asm/armlinux.h>
 #include <asm/io.h>
 #include <mach/s3c24x0-iomap.h>
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
-#include <dm9000.h>
 
 static struct memory_platform_data ram_pdata = {
 	.name		= "ram0",
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:44 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:44 +0100
Subject: [PATCH 07/15] mini2440: Add PLL settings
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-8-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/config.h |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/config.h b/arch/arm/boards/mini2440/config.h
index a664017..1edd69c 100644
--- a/arch/arm/boards/mini2440/config.h
+++ b/arch/arm/boards/mini2440/config.h
@@ -26,6 +26,28 @@
  */
 #define S3C24XX_CLOCK_REFERENCE 12000000
 
+/**
+ * Define the main clock configuration to be used in register CLKDIVN
+ *
+ * We must limit the frequency of the connected SDRAMs with the clock ratio
+ * setup to 1:4:8. This will result into FCLK:HCLK:PCLK = 405Mhz:102MHz:51MHz
+ */
+#define BOARD_SPECIFIC_CLKDIVN 0x05
+
+/**
+ * Define the MPLL configuration to be used in register MPLLCON
+ *
+ * We want the MPLL to run at 405.0 MHz
+ */
+#define BOARD_SPECIFIC_MPLL ((0x7f << 12) + (2 << 4) + 1)
+
+/**
+ * Define the UPLL configuration to be used in register UPLLCON
+ *
+ * We want the UPLL to run at 48.0 MHz
+ */
+#define BOARD_SPECIFIC_UPLL ((0x38 << 12) + (2 << 4) + 2)
+
 /*
  * Flash access timings
  * Tacls  = 0ns (but 20ns data setup time)
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:40 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:40 +0100
Subject: [PATCH 03/15] MACH-S324xx: Change detection method of the second
	SDRAM bank
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-4-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

There is no rule how to connect the SDRAMs to the two clocks signales the CPU
provides. Some boards are using them on a per bank base, some others on a per
chip base. So, the check for the enabled second clock cannot be used to detect
if the second SDRAM bank is populated.
A better way is to check the MT bits of the second SDRAM bank register. When
the init code sets these bits to '00' the second bank is not used for SDRAM
and gets ignored.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/mach-s3c24xx/generic.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/generic.c b/arch/arm/mach-s3c24xx/generic.c
index c04e0b6..4c7e799 100644
--- a/arch/arm/mach-s3c24xx/generic.c
+++ b/arch/arm/mach-s3c24xx/generic.c
@@ -181,8 +181,9 @@ int s3c24xx_dump_clocks(void)
 	printf("hclk:    %7d kHz\n", s3c24xx_get_hclk() / 1000);
 	printf("pclk:    %7d kHz\n", s3c24xx_get_pclk() / 1000);
 	printf("SDRAM1:   CL%d@%dMHz\n", ((readl(BANKCON6) & 0xc) >> 2) + 2, s3c24xx_get_hclk() / 1000000);
-	if (!(readl(MISCCR) & (1 << 18)))
-		printf("SDRAM2:   CL%d@%dMHz\n", ((readl(BANKCON7) & 0xc) >> 2) + 2, s3c24xx_get_hclk() / 1000000);
+	if ((readl(BANKCON7) & (0x3 << 15)) == (0x3 << 15))
+		printf("SDRAM2:   CL%d@%dMHz\n", ((readl(BANKCON7) & 0xc) >> 2) + 2,
+			s3c24xx_get_hclk() / 1000000);
 	return 0;
 }
 
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 09:10:52 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 15:10:52 +0100
Subject: [PATCH 15/15] mini2440: Use generic environment
In-Reply-To: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297606252-802-16-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This patch also adapts the default config to use all new features.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/env/bin/_update       |   34 ----
 arch/arm/boards/mini2440/env/bin/boot          |   40 ----
 arch/arm/boards/mini2440/env/bin/hush_hack     |    1 -
 arch/arm/boards/mini2440/env/bin/init          |   34 ----
 arch/arm/boards/mini2440/env/bin/update_kernel |   13 --
 arch/arm/boards/mini2440/env/bin/update_root   |   13 --
 arch/arm/configs/mini2440_defconfig            |  226 +-----------------------
 7 files changed, 7 insertions(+), 354 deletions(-)
 delete mode 100644 arch/arm/boards/mini2440/env/bin/_update
 delete mode 100644 arch/arm/boards/mini2440/env/bin/boot
 delete mode 100644 arch/arm/boards/mini2440/env/bin/hush_hack
 delete mode 100644 arch/arm/boards/mini2440/env/bin/init
 delete mode 100644 arch/arm/boards/mini2440/env/bin/update_kernel
 delete mode 100644 arch/arm/boards/mini2440/env/bin/update_root

diff --git a/arch/arm/boards/mini2440/env/bin/_update b/arch/arm/boards/mini2440/env/bin/_update
deleted file mode 100644
index b10682e..0000000
--- a/arch/arm/boards/mini2440/env/bin/_update
+++ /dev/null
@@ -1,34 +0,0 @@
-#!/bin/sh
-
-if [ -z "$part" -o -z "$image" ]; then
-	echo "define \$part and \$image"
-	exit 1
-fi
-
-if [ ! -e "$part" ]; then
-	echo "Partition $part does not exist"
-	exit 1
-fi
-
-if [ $# = 1 ]; then
-	image=$1
-fi
-
-if [ x$ip = xdhcp ]; then
-	dhcp
-fi
-
-ping $eth0.serverip
-if [ $? -ne 0 ] ; then
-	echo "update aborted"
-	exit 1
-fi
-
-echo
-echo "erasing partition $part"
-erase $part
-
-echo
-echo "flashing $image to $part"
-echo
-tftp $image $part
diff --git a/arch/arm/boards/mini2440/env/bin/boot b/arch/arm/boards/mini2440/env/bin/boot
deleted file mode 100644
index 86e22cf..0000000
--- a/arch/arm/boards/mini2440/env/bin/boot
+++ /dev/null
@@ -1,40 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-if [ x$1 = xnand ]; then
-	root=nand
-	kernel=nand
-fi
-
-if [ x$1 = xnet ]; then
-	root=net
-	kernel=net
-fi
-
-if [ x$root = xnand ]; then
-	bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2"
-fi
-if [ x$root = xnet ]; then
-	bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp"
-	if [ x$ip = xdhcp ]; then
-		bootargs="$bootargs ip=dhcp"
-	else
-		bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::"
-	fi
-fi
-
-bootargs="$bootargs mtdparts=\"NAND 32MiB 3,3V 8-bit:$nand_parts\""
-
-bootargs="$bootargs cs89x0_media=rj45 cs89x0_mac=$eth0.ethaddr"
-
-if [ x$kernel = xnet ]; then
-	if [ x$ip = xdhcp ]; then
-		dhcp
-	fi
-	tftp $uimage uImage || exit 1
-	bootm uImage
-else
-	bootm /dev/nand0.kernel.bb
-fi
-
diff --git a/arch/arm/boards/mini2440/env/bin/hush_hack b/arch/arm/boards/mini2440/env/bin/hush_hack
deleted file mode 100644
index 5fffa92..0000000
--- a/arch/arm/boards/mini2440/env/bin/hush_hack
+++ /dev/null
@@ -1 +0,0 @@
-nand -a /dev/nand0.*
diff --git a/arch/arm/boards/mini2440/env/bin/init b/arch/arm/boards/mini2440/env/bin/init
deleted file mode 100644
index e98ab84..0000000
--- a/arch/arm/boards/mini2440/env/bin/init
+++ /dev/null
@@ -1,34 +0,0 @@
-#!/bin/sh
-
-PATH=/env/bin
-export PATH
-
-. /env/config
-
-if [ -e /dev/nand0 ]; then
-#addpart /dev/nand0 $nand_parts
-
-	# Uh, oh, hush first expands wildcards and then starts executing
-	# commands. What a bug!
-	source /env/bin/hush_hack
-fi
-
-if [ -z $eth0.ethaddr ]; then
-	while [ -z $eth0.ethaddr ]; do
-		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
-	done
-	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
-fi
-
-echo
-echo -n "Hit any key to stop autoboot: "
-timeout -a $autoboot_timeout
-if [ $? != 0 ]; then
-	echo
-	echo "type update_kernel [<imagename>] to update kernel into flash"
-	echo "type update_root [<imagename>] to update rootfs into flash"
-	echo
-	exit
-fi
-
-boot
diff --git a/arch/arm/boards/mini2440/env/bin/update_kernel b/arch/arm/boards/mini2440/env/bin/update_kernel
deleted file mode 100644
index c43a557..0000000
--- a/arch/arm/boards/mini2440/env/bin/update_kernel
+++ /dev/null
@@ -1,13 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-part=/dev/nand0.kernel.bb
-
-if [ x$1 = x ]; then
-	image=$uimage
-else
-	image=$1
-fi
-
-. /env/bin/_update $image
diff --git a/arch/arm/boards/mini2440/env/bin/update_root b/arch/arm/boards/mini2440/env/bin/update_root
deleted file mode 100644
index 46cbca5..0000000
--- a/arch/arm/boards/mini2440/env/bin/update_root
+++ /dev/null
@@ -1,13 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-part=/dev/nand0.root.bb
-
-if [ x$1 = x ]; then
-	image=$jffs2
-else
-	image=$1
-fi
-
-. /env/bin/_update $image
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index f289f0d..e770871 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -1,122 +1,19 @@
-#
-# Automatically generated make config: don't edit
-# Linux barebox version: 2010.10.0
-# Tue Oct 19 09:01:55 2010
-#
-# CONFIG_BOARD_LINKER_SCRIPT is not set
-CONFIG_GENERIC_LINKER_SCRIPT=y
-CONFIG_ARM=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_NOMADIK is not set
-# CONFIG_ARCH_OMAP is not set
 CONFIG_ARCH_S3C24xx=y
-
-#
-# Processor Type
-#
-CONFIG_CPU_32=y
-CONFIG_CPU_ARM920T=y
-CONFIG_CPU_32v4T=y
-
-#
-# processor features
-#
-CONFIG_ARCH_TEXT_BASE=0x31fc0000
-CONFIG_BOARDINFO="Mini 2440"
-CONFIG_CPU_S3C2440=y
-# CONFIG_MACH_A9M2410 is not set
-# CONFIG_MACH_A9M2440 is not set
 CONFIG_MACH_MINI2440=y
-
-#
-# Board specific settings
-#
-
-#
-# S3C24X0 Features
-#
-# CONFIG_S3C24XX_PLL_INIT is not set
-# CONFIG_S3C24XX_SDRAM_INIT is not set
 CONFIG_S3C24XX_NAND_BOOT=y
-# CONFIG_AEABI is not set
-
-#
-# Arm specific settings
-#
-CONFIG_CMD_ARM_CPUINFO=y
+CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
-CONFIG_GREGORIAN_CALENDER=y
-CONFIG_HAS_KALLSYMS=y
-CONFIG_HAS_MODULES=y
-CONFIG_CMD_MEMORY=y
-CONFIG_ENV_HANDLING=y
-
-#
-# General Settings
-#
-CONFIG_LOCALVERSION_AUTO=y
-
-#
-# memory layout
-#
-CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
-CONFIG_TEXT_BASE=0x31fc0000
-CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
-CONFIG_MEMORY_LAYOUT_DEFAULT=y
-# CONFIG_MEMORY_LAYOUT_FIXED is not set
-CONFIG_STACK_SIZE=0x8000
-CONFIG_MALLOC_SIZE=0x400000
+CONFIG_TEXT_BASE=0x33e00000
 CONFIG_BROKEN=y
-CONFIG_EXPERIMENTAL=y
-# CONFIG_MODULES is not set
-# CONFIG_KALLSYMS is not set
-CONFIG_PROMPT="barebox:"
-CONFIG_BAUDRATE=38400
+CONFIG_PROMPT="mini2440:"
 CONFIG_LONGHELP=y
-CONFIG_CBSIZE=1024
-CONFIG_MAXARGS=16
-CONFIG_SHELL_HUSH=y
-# CONFIG_SHELL_SIMPLE is not set
 CONFIG_GLOB=y
-CONFIG_PROMPT_HUSH_PS2="> "
-# CONFIG_HUSH_FANCY_PROMPT is not set
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-# CONFIG_MENU is not set
-# CONFIG_PASSWORD is not set
-CONFIG_DYNAMIC_CRC_TABLE=y
-CONFIG_ERRNO_MESSAGES=y
-CONFIG_TIMESTAMP=y
-CONFIG_CONSOLE_FULL=y
-CONFIG_CONSOLE_ACTIVATE_FIRST=y
-# CONFIG_OF_FLAT_TREE is not set
 CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mini2440/env"
-
-#
-# Debugging
-#
 CONFIG_DEBUG_INFO=y
-# CONFIG_ENABLE_FLASH_NOISE is not set
-# CONFIG_ENABLE_PARTITION_NOISE is not set
-CONFIG_ENABLE_DEVICE_NOISE=y
-
-#
-# Commands
-#
-
-#
-# scripting
-#
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_SAVEENV=y
@@ -124,128 +21,19 @@ CONFIG_CMD_LOADENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
-CONFIG_CMD_TRUE=y
-CONFIG_CMD_FALSE=y
-# CONFIG_CMD_LOGIN is not set
-# CONFIG_CMD_PASSWD is not set
-
-#
-# file commands
-#
-CONFIG_CMD_LS=y
-CONFIG_CMD_RM=y
-CONFIG_CMD_CAT=y
-CONFIG_CMD_MKDIR=y
-CONFIG_CMD_RMDIR=y
-CONFIG_CMD_CP=y
-CONFIG_CMD_PWD=y
-CONFIG_CMD_CD=y
-CONFIG_CMD_MOUNT=y
-CONFIG_CMD_UMOUNT=y
-
-#
-# console
-#
-CONFIG_CMD_CLEAR=y
-CONFIG_CMD_ECHO=y
-# CONFIG_CMD_ECHO_E is not set
-
-#
-# memory
-#
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADY is not set
-# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
 CONFIG_CMD_MTEST=y
-# CONFIG_CMD_MTEST_ALTERNATIVE is not set
-
-#
-# flash
-#
 CONFIG_CMD_FLASH=y
-# CONFIG_CMD_UBI is not set
-
-#
-# booting
-#
-CONFIG_CMD_BOOTM=y
-# CONFIG_CMD_BOOTM_ZLIB is not set
-# CONFIG_CMD_BOOTM_BZLIB is not set
-# CONFIG_CMD_BOOTM_LZO is not set
-# CONFIG_CMD_BOOTM_SHOW_TYPE is not set
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTU=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_TEST=y
-CONFIG_CMD_VERSION=y
-CONFIG_CMD_HELP=y
-CONFIG_CMD_DEVINFO=y
-# CONFIG_CMD_UNLZO is not set
+CONFIG_CMD_GPIO=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
-# CONFIG_NET_NFS is not set
 CONFIG_NET_PING=y
 CONFIG_NET_TFTP=y
-# CONFIG_NET_TFTP_PUSH is not set
-# CONFIG_NET_NETCONSOLE is not set
-# CONFIG_NET_RESOLV is not set
-
-#
-# Drivers
-#
-
-#
-# serial drivers
-#
-# CONFIG_DRIVER_SERIAL_ARM_DCC is not set
-# CONFIG_DRIVER_SERIAL_NS16550 is not set
-CONFIG_DRIVER_SERIAL_S3C24X0=y
-# CONFIG_DRIVER_SERIAL_S3C24X0_AUTOSYNC is not set
-CONFIG_HAS_DM9000=y
-CONFIG_MIIDEV=y
-
-#
-# Network drivers
-#
-# CONFIG_DRIVER_NET_SMC911X is not set
-# CONFIG_DRIVER_NET_SMC91111 is not set
 CONFIG_DRIVER_NET_DM9000=y
-
-#
-# SPI drivers
-#
 # CONFIG_SPI is not set
-# CONFIG_I2C is not set
-
-#
-# flash drivers
-#
-# CONFIG_DRIVER_CFI is not set
-CONFIG_MTD=y
-CONFIG_NAND=y
-CONFIG_NAND_S3C24X0=y
-# CONFIG_MTD_NAND_VERIFY_WRITE is not set
-# CONFIG_MTD_NAND_ECC_SMC is not set
-CONFIG_MTD_NAND_IDS=y
-# CONFIG_MTD_NAND_DISKONCHIP is not set
-# CONFIG_UBI is not set
-# CONFIG_ATA is not set
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-# CONFIG_VIDEO is not set
-
-#
-# Filesystem support
-#
-# CONFIG_FS_CRAMFS is not set
-CONFIG_FS_RAMFS=y
-CONFIG_FS_DEVFS=y
-CONFIG_CRC32=y
-# CONFIG_DIGEST is not set
-# CONFIG_GENERIC_FIND_NEXT_BIT is not set
-# CONFIG_PROCESS_ESCAPE_SEQUENCE is not set
+CONFIG_MCI=y
+CONFIG_MCI_S3C=y
-- 
1.7.2.3



From jbe at pengutronix.de  Sun Feb 13 14:01:04 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 20:01:04 +0100
Subject: mini2440: Forgotten patches to make it work (1 of 2)
In-Reply-To: <1297606252-802-16-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
	<1297606252-802-16-git-send-email-jbe@pengutronix.de>
Message-ID: <201102132001.04701.jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>
Subject: mini2440: Make barebox able to save a runtime environment

Without this modification saving a modified environment ends up with:

mini2440:/ saveenv
saving environment
could not open /dev/env0: Read-only file system

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>

---
 arch/arm/boards/mini2440/mini2440.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Index: barebox-2011.01.0/arch/arm/boards/mini2440/mini2440.c
===================================================================
--- barebox-2011.01.0.orig/arch/arm/boards/mini2440/mini2440.c
+++ barebox-2011.01.0/arch/arm/boards/mini2440/mini2440.c
@@ -262,11 +262,11 @@ static int mini2440_devices_init(void)
 	/* ----------- add some vital partitions -------- */
 	devfs_del_partition("self_raw");
 	devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
-	dev_add_bb_dev("self_raw", NULL);
+	dev_add_bb_dev("self_raw", "self0");
 
 	devfs_del_partition("env_raw");
 	devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
-	dev_add_bb_dev("env_raw", NULL);
+	dev_add_bb_dev("env_raw", "env0");
 #endif
 	register_device(&mci_dev);
 	armlinux_add_dram(&sdram_dev);


From jbe at pengutronix.de  Sun Feb 13 14:49:19 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 13 Feb 2011 20:49:19 +0100
Subject: mini2440: Forgotten patches to make it work (2 of 2)
In-Reply-To: <201102132001.04701.jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
	<1297606252-802-16-git-send-email-jbe@pengutronix.de>
	<201102132001.04701.jbe@pengutronix.de>
Message-ID: <201102132049.20291.jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>
Subject: MACH-S3C24XX: Add support for flash based BBT

The default configuration of the current 2.6.37 kernel uses a flash based BBT.
So, barebox must also use one, to be in sync with the kernel about bad blocks
in the flash.

Due to the used OOB layout, the generic BBT description coming with the
framework can be used.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>

---
 arch/arm/boards/mini2440/mini2440.c               |    3 ++-
 arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h |    1 +
 drivers/mtd/nand/nand_s3c2410.c                   |    6 ++++++
 3 files changed, 9 insertions(+), 1 deletion(-)

Index: barebox-2011.01.0/arch/arm/boards/mini2440/mini2440.c
===================================================================
--- barebox-2011.01.0.orig/arch/arm/boards/mini2440/mini2440.c
+++ barebox-2011.01.0/arch/arm/boards/mini2440/mini2440.c
@@ -55,7 +55,8 @@ static struct device_d sdram_dev = {
 };
 
 static struct s3c24x0_nand_platform_data nand_info = {
-	.nand_timing = CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1)
+	.nand_timing = CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1),
+	.flash_bbt = 1,	/* same as the kernel */
 };
 
 static struct device_d nand_dev = {
Index: barebox-2011.01.0/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
===================================================================
--- barebox-2011.01.0.orig/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
+++ barebox-2011.01.0/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
@@ -45,6 +45,7 @@ extern void s3c24x0_nand_load_image(void
  */
 struct s3c24x0_nand_platform_data {
 	uint32_t nand_timing;	/**< value for the NFCONF register (timing bits only) */
+	char flash_bbt;	/**< not 0 if a flash based BBT should be used */
 };
 
 /**
Index: barebox-2011.01.0/drivers/mtd/nand/nand_s3c2410.c
===================================================================
--- barebox-2011.01.0.orig/drivers/mtd/nand/nand_s3c2410.c
+++ barebox-2011.01.0/drivers/mtd/nand/nand_s3c2410.c
@@ -349,6 +349,7 @@ static int s3c24x0_nand_inithw(struct s3
 static int s3c24x0_nand_probe(struct device_d *dev)
 {
 	struct nand_chip *chip;
+	struct s3c24x0_nand_platform_data *pdata = dev->platform_data;
 	struct mtd_info *mtd;
 	struct s3c24x0_nand_host *host;
 	int ret;
@@ -393,6 +394,11 @@ static int s3c24x0_nand_probe(struct dev
 	chip->ecc.bytes = 3;
 	chip->ecc.layout = &nand_hw_eccoob;
 
+	if (pdata->flash_bbt) {
+		/* use a flash based bbt */
+		chip->options |= NAND_USE_FLASH_BBT;
+	}
+
 	ret = s3c24x0_nand_inithw(host);
 	if (ret != 0)
 		goto on_error;


From jbe at pengutronix.de  Mon Feb 14 04:35:45 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Mon, 14 Feb 2011 10:35:45 +0100
Subject: [PATCH 14/15] mini2440: Remove some A9M2440 platform leftovers
In-Reply-To: <1297606252-802-15-git-send-email-jbe@pengutronix.de>
References: <1297606252-802-1-git-send-email-jbe@pengutronix.de>
	<1297606252-802-15-git-send-email-jbe@pengutronix.de>
Message-ID: <201102141035.46065.jbe@pengutronix.de>

Hmm, arch/arm/boards/mini2440/env/config needs some additional adaption to 
make it work with the generic environment. I will re-send a new patch for 
this.

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From jbe at pengutronix.de  Tue Feb 15 08:49:32 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 15 Feb 2011 14:49:32 +0100
Subject: [PATCH] Generic environment: Fix assembling of the 'mtdparts' variable
Message-ID: <201102151449.32123.jbe@pengutronix.de>

The semicolon is a delimiter, not an end marker. With a trailing semicolon the
kernel give the confusing message:

mtd: no mtd-id

With this patch, a semicolon gets added on demand only.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>

---
 defaultenv/bin/boot |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Index: barebox-2011.01.0/defaultenv/bin/boot
===================================================================
--- barebox-2011.01.0.orig/defaultenv/bin/boot
+++ barebox-2011.01.0/defaultenv/bin/boot
@@ -43,11 +43,14 @@ else
 fi
 
 if [ -n $nor_parts ]; then
-	mtdparts="${mtdparts}physmap-flash.0:${nor_parts};"
+	mtdparts="${mtdparts}physmap-flash.0:${nor_parts}"
 fi
 
 if [ -n $nand_parts ]; then
-	mtdparts="${mtdparts}${nand_device}:${nand_parts};"
+	if [ -n ${mtdparts} ]; then
+		mtdparts="${mtdparts};"
+	fi
+	mtdparts="${mtdparts}${nand_device}:${nand_parts}"
 fi
 
 if [ -n $mtdparts ]; then

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From F.Vanalme at TELEVIC.com  Wed Feb 16 03:37:53 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Wed, 16 Feb 2011 09:37:53 +0100
Subject: PMIC device driver
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B007AF@SRV-VS06.TELEVIC.COM>

Up till now, I could not start up the network on my i.mx27PDK board. After measuring on the device, I could see that power was missing for the PHY. Good reason, of course, for not starting up... 
To enable the missing power, I have to adjust some registers in the PMIC device (mc13783).
If I look into the mc13783.c file, I could see that this has similarities with Linux device drivers. So, to access the PMIC, I guess I have to do an open("/dev/pmic") and then a read or write. However, when I look to the pmic_read() and pmic_write() function, they have, besides the device pointer, buffer pointer and buffer size, an offset parameter that indicate the register within the PMIC to read/write. On the other hand, the standard read and write functions only take 3 parameters (device, buffer, buffersize). How do I pass that offset to these functions ? How do I use the PMIC device driver ?
(Maybe this is a general Linux device driver question, but I'm not that familiar with device drivers, so...)

Is it the best way to do it like this (open, read, write), or do I better call those functions directly ? (I have to set the PMIC registers in the "late_init" function of the barebox startup sequence)

Filip Vanalme




From F.Vanalme at TELEVIC.com  Wed Feb 16 07:20:36 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Wed, 16 Feb 2011 13:20:36 +0100
Subject: PMIC device driver
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00817@SRV-VS06.TELEVIC.COM>

> -----Original Message-----
> From: Vanalme Filip
> Sent: woensdag 16 februari 2011 9:38
> To: 'barebox at lists.infradead.org'
> Subject: PMIC device driver
> 
> Up till now, I could not start up the network on my i.mx27PDK board. After
> measuring on the device, I could see that power was missing for the PHY. Good
> reason, of course, for not starting up...
> To enable the missing power, I have to adjust some registers in the PMIC device
> (mc13783).
> If I look into the mc13783.c file, I could see that this has similarities with Linux
> device drivers. So, to access the PMIC, I guess I have to do an open("/dev/pmic")
> and then a read or write. However, when I look to the pmic_read() and pmic_write()
> function, they have, besides the device pointer, buffer pointer and buffer size, an
> offset parameter that indicate the register within the PMIC to read/write. On the
> other hand, the standard read and write functions only take 3 parameters (device,
> buffer, buffersize). How do I pass that offset to these functions ? How do I use the
> PMIC device driver ?
> (Maybe this is a general Linux device driver question, but I'm not that familiar with
> device drivers, so...)
> 
> Is it the best way to do it like this (open, read, write), or do I better call those
> functions directly ? (I have to set the PMIC registers in the "late_init" function of
> the barebox startup sequence)
> 
> Filip Vanalme
> 

[Filip] Think I found how it works. I have to use the normal read, write and lseek functions to read/write PMIC registers. The 'offset' and 'flag' parameters in read and write functions are for internal use only. Correct. When reading, an internal index is incremented. A following read starts where the previous ended. With lseek, one can move that index to address the correct register. Right ?


From jbe at pengutronix.de  Wed Feb 16 13:13:41 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:41 +0100
Subject: [PATCH 16/20] mini2440: Make it able to save a runtime environment
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-17-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Without this modification saving a modified environment ends with:

mini2440:/ saveenv
saving environment
could not open /dev/env0: Read-only file system

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index b30a9e2..ae48a51 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -261,11 +261,11 @@ static int mini2440_devices_init(void)
 	/* ----------- add some vital partitions -------- */
 	devfs_del_partition("self_raw");
 	devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
-	dev_add_bb_dev("self_raw", NULL);
+	dev_add_bb_dev("self_raw", "self0");
 
 	devfs_del_partition("env_raw");
 	devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
-	dev_add_bb_dev("env_raw", NULL);
+	dev_add_bb_dev("env_raw", "env0");
 #endif
 	register_device(&mci_dev);
 	armlinux_add_dram(&sdram_dev);
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:26 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:26 +0100
Subject: [PATCH 01/20] S3C24xx: Just remove a trailing whitespace
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-2-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/mach-s3c24xx/Kconfig |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 0f4d6e7..8b86d2d 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -43,7 +43,7 @@ config MACH_MINI2440
 	select CPU_S3C2440
 	select HAS_DM9000
 	help
-	  Say Y here if you are using Mini 2440 dev board equipped 
+	  Say Y here if you are using Mini 2440 dev board equipped
 	  with a Samsung S3C2440 Processor
 
 endchoice
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:25 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:25 +0100
Subject: [PATCH v2] Booting from NAND for the mini2440 platform
Message-ID: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>

This patch series brings in NAND boot support for the mini2440 platform and
also does some cleanups (and also fixes some typos).

Testers are welcome, as I only have a mini2440 board with HY57V561620 SDRAM
devices. I added some documentation (thanks to Marek for info how it works
with DFU) about the board itself and how to bring in barebox. Hope it helps
others to enjoy barebox on mini2440.

This is revision 2 of my patch series as the first one misses some important
changes. For example: Did someone noticed that the NAND controller support
for S3C2440 is currently broken? The NAND controller seems mostly the same than
the one found on S3C2410. But it isn't. At least the ECC handlings needs some
adaptions. Be warned: Don't use the NAND support from older barebox for any
S3C2440 based card. It clobbers your OOB.
So, maybe at least the "MACH-S3C2440: Fix NAND controller for this CPU" patch
is also a candidate for master as it fixes an ugly bug.

While barebox with this patch set applied comes up on my HY57V561620 SDRAM based
mini2440, Marek reports it cannot boot his MT48LC16M16 SDRAM based mini2440.
Anybody here with an idea why? Both SDRAM devices seems similar. Also in their
timing.

Comments are welcome.

Regards,
Juergen



From jbe at pengutronix.de  Wed Feb 16 13:13:32 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:32 +0100
Subject: [PATCH 07/20] mini2440: Be a little be pedantic with the include file
	order
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-8-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 9639176..a3bb817 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -29,15 +29,15 @@
 #include <common.h>
 #include <driver.h>
 #include <init.h>
-#include <asm/armlinux.h>
 #include <generated/mach-types.h>
 #include <partition.h>
+#include <dm9000.h>
 #include <nand.h>
+#include <asm/armlinux.h>
 #include <asm/io.h>
 #include <mach/s3c24x0-iomap.h>
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
-#include <dm9000.h>
 
 static struct memory_platform_data ram_pdata = {
 	.name		= "ram0",
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:29 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:29 +0100
Subject: [PATCH 04/20] MACH-S3C24XX: Add support for flash based BBT
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-5-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

The default configuration of the current 2.6.37 kernel uses a flash based BBT.
So, barebox must also use one, to be in sync with the kernel about bad blocks
in the flash.

Due to the used OOB layout, the generic BBT description coming with the
framework can be used.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h |    1 +
 drivers/mtd/nand/nand_s3c2410.c                   |    6 ++++++
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
index 05f9cf0..d06287e 100644
--- a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
+++ b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
@@ -45,6 +45,7 @@ extern void s3c24x0_nand_load_image(void*, int, int, int);
  */
 struct s3c24x0_nand_platform_data {
 	uint32_t nand_timing;	/**< value for the NFCONF register (timing bits only) */
+	char flash_bbt;	/**< force a flash based BBT */
 };
 
 /**
diff --git a/drivers/mtd/nand/nand_s3c2410.c b/drivers/mtd/nand/nand_s3c2410.c
index fa4acf4..8a47dc6 100644
--- a/drivers/mtd/nand/nand_s3c2410.c
+++ b/drivers/mtd/nand/nand_s3c2410.c
@@ -349,6 +349,7 @@ static int s3c24x0_nand_inithw(struct s3c24x0_nand_host *host)
 static int s3c24x0_nand_probe(struct device_d *dev)
 {
 	struct nand_chip *chip;
+	struct s3c24x0_nand_platform_data *pdata = dev->platform_data;
 	struct mtd_info *mtd;
 	struct s3c24x0_nand_host *host;
 	int ret;
@@ -393,6 +394,11 @@ static int s3c24x0_nand_probe(struct device_d *dev)
 	chip->ecc.bytes = 3;
 	chip->ecc.layout = &nand_hw_eccoob;
 
+	if (pdata->flash_bbt) {
+		/* use a flash based bbt */
+		chip->options |= NAND_USE_FLASH_BBT;
+	}
+
 	ret = s3c24x0_nand_inithw(host);
 	if (ret != 0)
 		goto on_error;
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:30 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:30 +0100
Subject: [PATCH 05/20] MACH-S3C2440: Fix NAND controller for this CPU
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-6-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

There are a few but important differences in S3C2410 and S3C2440. This patch
fixes them for the S3C2440 CPU.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 drivers/mtd/nand/nand_s3c2410.c |   18 +++++++++++++++---
 1 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/nand_s3c2410.c b/drivers/mtd/nand/nand_s3c2410.c
index 8a47dc6..76ea9db 100644
--- a/drivers/mtd/nand/nand_s3c2410.c
+++ b/drivers/mtd/nand/nand_s3c2410.c
@@ -77,14 +77,13 @@
 #define NFCMD 0x08
 #define NFADDR 0x0C
 #define NFDATA 0x10
-
-#define NFECC 0x1C
 #define NFSTAT 0x20
+#define NFECC 0x2C
 
 /* S3C2440 specific bits */
 #define NFSTAT_BUSY (1)
 #define NFCONT_nFCE (1 << 1)
-#define NFCONF_INITECC (1 << 12)
+#define NFCONT_INITECC (1 << 4)
 #define NFCONT_EN (1)
 
 #endif	/* CONFIG_CPU_S3C2440 */
@@ -272,7 +271,12 @@ static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
 	struct nand_chip *nand_chip = mtd->priv;
 	struct s3c24x0_nand_host *host = nand_chip->priv;
 
+#ifdef CONFIG_CPU_S3C2410
 	writel(readl(host->base + NFCONF) | NFCONF_INITECC , host->base + NFCONF);
+#endif
+#ifdef CONFIG_CPU_S3C2440
+	writel(readl(host->base + NFCONT) | NFCONT_INITECC , host->base + NFCONT);
+#endif
 }
 
 static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, uint8_t *ecc_code)
@@ -280,10 +284,18 @@ static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
 	struct nand_chip *nand_chip = mtd->priv;
 	struct s3c24x0_nand_host *host = nand_chip->priv;
 
+#ifdef CONFIG_CPU_S3C2410
 	ecc_code[0] = readb(host->base + NFECC);
 	ecc_code[1] = readb(host->base + NFECC + 1);
 	ecc_code[2] = readb(host->base + NFECC + 2);
+#endif
+#ifdef CONFIG_CPU_S3C2440
+	unsigned long ecc = readl(host->base + NFECC);
 
+	ecc_code[0] = ecc;
+	ecc_code[1] = ecc >> 8;
+	ecc_code[2] = ecc >> 16;
+#endif
 	return 0;
 }
 
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:40 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:40 +0100
Subject: [PATCH 15/20] mini2440: Add MCI support
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-16-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

---
 arch/arm/boards/mini2440/mini2440.c |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 30dff07..b30a9e2 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -33,12 +33,14 @@
 #include <partition.h>
 #include <dm9000.h>
 #include <nand.h>
+#include <mci.h>
 #include <asm/armlinux.h>
 #include <asm/io.h>
 #include <mach/gpio.h>
 #include <mach/s3c24x0-iomap.h>
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
+#include <mach/mci.h>
 
 static struct memory_platform_data ram_pdata = {
 	.name		= "ram0",
@@ -83,6 +85,19 @@ static struct device_d dm9000_dev = {
 	.platform_data = &dm9000_data,
 };
 
+static struct s3c_mci_platform_data mci_data = {
+	.caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz,
+	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
+	.gpio_detect = 232,	/* GPG8_GPIO */
+	.detect_invert = 0,
+};
+
+static struct device_d mci_dev = {
+	.name     = "s3c_mci",
+	.map_base = S3C2410_SDI_BASE,
+	.platform_data	= &mci_data,
+};
+
 static const unsigned pin_usage[] = {
 	/* address bus, used by NOR, SDRAM */
 	GPA1_ADDR16,
@@ -252,6 +267,7 @@ static int mini2440_devices_init(void)
 	devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
 	dev_add_bb_dev("env_raw", NULL);
 #endif
+	register_device(&mci_dev);
 	armlinux_add_dram(&sdram_dev);
 	armlinux_set_bootparams((void *)sdram_dev.map_base + 0x100);
 	armlinux_set_architecture(MACH_TYPE_MINI2440);
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:43 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:43 +0100
Subject: [PATCH 18/20] mini2440: Add booting from NAND support
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-19-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

With this patch barebox can now be booted from RAM, NOR and NAND on the
mini2440 platform. 'CONFIG_S3C24XX_NAND_BOOT' must still be 'y' to be able to
boot from NAND.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/Makefile        |    2 +-
 arch/arm/boards/mini2440/lowlevel_init.S |   39 ++++++++++++++++++++++++++++++
 arch/arm/mach-s3c24xx/Kconfig            |    4 +++
 3 files changed, 44 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/boards/mini2440/lowlevel_init.S

diff --git a/arch/arm/boards/mini2440/Makefile b/arch/arm/boards/mini2440/Makefile
index 09f7e7d..856fed0 100644
--- a/arch/arm/boards/mini2440/Makefile
+++ b/arch/arm/boards/mini2440/Makefile
@@ -1,2 +1,2 @@
 
-obj-y += mini2440.o
+obj-y += mini2440.o lowlevel_init.o
diff --git a/arch/arm/boards/mini2440/lowlevel_init.S b/arch/arm/boards/mini2440/lowlevel_init.S
new file mode 100644
index 0000000..41f50cb
--- /dev/null
+++ b/arch/arm/boards/mini2440/lowlevel_init.S
@@ -0,0 +1,39 @@
+/*
+ * Low level initialization for the FriendlyARM mini2440 board
+ */
+
+#include <config.h>
+#include <mach/s3c24x0-iomap.h>
+
+	.section ".text_bare_init.board_init_lowlevel","ax"
+
+/* ------------------------------------------------------------------------ */
+
+.globl board_init_lowlevel
+board_init_lowlevel:
+
+	mov r10, lr		/* save the link register */
+
+	bl s3c24x0_disable_wd
+
+	/* skip everything here if we are already running from SDRAM */
+	cmp pc, #S3C24X0_SDRAM_BASE
+	blo 1f
+	cmp pc, #S3C24X0_SDRAM_END
+	bhs 1f
+
+	mov pc, r10
+
+/* we are running from NOR or NAND/SRAM memory. Do further initialisation */
+1:
+	bl s3c24x0_pll_init
+
+	bl s3c24x0_sdram_init
+
+#ifdef CONFIG_S3C24XX_NAND_BOOT
+	mov lr, r10		/* restore the link register */
+/* up to here we are running from the internal SRAM area */
+	b s3c24x0_nand_boot	/* does return directly to our caller into SDRAM */
+#else
+	mov pc, r10
+#endif
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 8b86d2d..33d230c 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -41,6 +41,10 @@ config MACH_A9M2440
 config MACH_MINI2440
 	bool "Mini 2440"
 	select CPU_S3C2440
+	select MACH_HAS_LOWLEVEL_INIT
+	select MACH_DO_LOWLEVEL_INIT
+	select S3C24XX_PLL_INIT
+	select S3C24XX_SDRAM_INIT
 	select HAS_DM9000
 	help
 	  Say Y here if you are using Mini 2440 dev board equipped
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:31 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:31 +0100
Subject: [PATCH 06/20] MACH-S3C2440: Speed up NAND controller for this CPU
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-7-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

The S3C2440 provides 32 bit access to the NAND's data. Add specific read
routines to speed up data reading and writing.

These routines are stolen from the Linux kernel.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 drivers/mtd/nand/nand_s3c2410.c |   55 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 55 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_s3c2410.c b/drivers/mtd/nand/nand_s3c2410.c
index 76ea9db..df0b7c1 100644
--- a/drivers/mtd/nand/nand_s3c2410.c
+++ b/drivers/mtd/nand/nand_s3c2410.c
@@ -194,6 +194,57 @@ static void __nand_boot_init disable_nand_controller(void __iomem *host)
 
 /* ----------------------------------------------------------------------- */
 
+#ifdef CONFIG_CPU_S3C2440
+/**
+ * Read one block of data from the NAND port
+ * @param[in] mtd Instance data
+ * @param[out] buf buffer to write data to
+ * @param[in] len byte count
+ *
+ * This is a special block read variant for the S3C2440 CPU.
+ */
+static void s3c2440_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	struct nand_chip *nand_chip = mtd->priv;
+	struct s3c24x0_nand_host *host = nand_chip->priv;
+
+	readsl(host->base + NFDATA, buf, len >> 2);
+
+	/* cleanup any fractional read */
+	if (len & 3) {
+		buf += len & ~3;
+
+		for (; len & 3; len--)
+			*buf++ = readb(host->base + NFDATA);
+	}
+}
+
+/**
+ * Write one block of data to the NAND port
+ * @param[in] mtd Instance data
+ * @param[out] buf buffer to read data from
+ * @param[in] len byte count
+ *
+ * This is a special block write variant for the S3C2440 CPU.
+ */
+static void s3c2440_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf,
+					int len)
+{
+	struct nand_chip *nand_chip = mtd->priv;
+	struct s3c24x0_nand_host *host = nand_chip->priv;
+
+	writesl(host->base + NFDATA, buf, len >> 2);
+
+	/* cleanup any fractional write */
+	if (len & 3) {
+		buf += len & ~3;
+
+		for (; len & 3; len--, buf++)
+			writeb(*buf, host->base + NFDATA);
+	}
+}
+#endif
+
 /**
  * Check the ECC and try to repair the data if possible
  * @param[in] mtd_info FIXME
@@ -390,6 +441,10 @@ static int s3c24x0_nand_probe(struct device_d *dev)
 
 	chip->IO_ADDR_R = chip->IO_ADDR_W = IOMEM(dev->map_base + NFDATA);
 
+#ifdef CONFIG_CPU_S3C2440
+	chip->read_buf = s3c2440_nand_read_buf;
+	chip->write_buf = s3c2440_nand_write_buf;
+#endif
 	chip->cmd_ctrl = s3c24x0_nand_hwcontrol;
 	chip->dev_ready = s3c24x0_nand_devready;
 	chip->select_chip = s3c24x0_nand_select_chip;
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:36 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:36 +0100
Subject: [PATCH 11/20] mini2440: Add SDRAM config settings
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-12-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.

Two types of SDRAM devices are known to be shipped by FriendlyARM. This config
should work on both of them. But it is really tested only for the HY57V561620
type.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/config.h |   58 +++++++++++++++++++++++++++++++++++++
 1 files changed, 58 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/config.h b/arch/arm/boards/mini2440/config.h
index 1edd69c..1f2fb4c 100644
--- a/arch/arm/boards/mini2440/config.h
+++ b/arch/arm/boards/mini2440/config.h
@@ -69,4 +69,62 @@
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 # define BOARD_DEFAULT_NAND_TIMING CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1)
 #endif
+
+/*
+ * Needed in the generic SDRAM boot code only
+ *
+ * SDRAM configuration
+ * Two types of SDRAM devices are common on mini2440:
+ * - Two devices of HY57V561620 to form 64 MiB in bank 6 only
+ *   - http://friendlyarm.net/dl.php?file=HY57V561620.pdf
+ * - Two devices of MT48LC16M16 to form 64 MiB in bank 6 only
+ *   - http://friendlyarm.net/dl.php?file=MT48LC16M16.pdf
+
+ * Most of the time the CPU is specified for 400 MHz only. As the CPU frequency
+ * and the SDRAM frequency are fix coupled by 4:1, the SDRAM runs at HCLCK.
+ * So, we need a 100 MHz timing setup with CL=2 for the SDRAMs.
+ */
+
+/*
+ * - ST7/WS7/DW7: reserved, this SDRAM bank is not used
+ * - ST6/WS6/DW6: 32 bit data bus (for SDRAM usage)
+ * - ST5/WS5/DW5: reserved, to be set by the board init code
+ * - ST4/WS4/DW4: reserved, to be set by the board init code
+ * - ST3/WS3/DW3: reserved, to be set by the board init code
+ * - ST2/WS2/DW2: reserved, to be set by the board init code
+ * - ST1/WS1/DW1: reserved, to be set by the board init code
+ * - DW0: not to be changed
+ */
+#define BOARD_SPECIFIC_BWSCON ((0x3 << 28) | (0x2 << 24) | 0x333330)
+/*
+ *  - MT = 11 (= sync dram type)
+ *  - Trcd = 00 (= CL2)
+ *  - SCAN = 01 (= 9 bit collumns)
+ */
+#define BOARD_SPECIFIC_BANKCON6 ((0x3 << 15) + (0x0 << 2) + (0x1))
+#define BOARD_SPECIFIC_BANKCON7 0 /* disabled */
+/*
+ * SDRAM refresh settings
+ *  - REFEN = 1 (= refresh enabled)
+ *  - TREFMD = 0 (= auto refresh)
+ *  - Trp = 00 (= 2 RAS precharge clocks)
+ *  - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns)
+ *  - Refresh = 2^11 + 1 - 100 * 7.8 = 2049 - 780 = 1269
+ */
+#define BOARD_SPECIFIC_REFRESH ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x1 << 18) + 1269)
+/*
+ * SDRAM banksize
+ *  - BURST_EN = 1 (= burst mode enabled)
+ *  - SCKE_EN = 1 (= SDRAM SCKE enabled)
+ *  - SCLK_EN = 1 (= clock active only during accesses)
+ *  - BK67MAP = 001 (= 64 MiB)
+ */
+# define BOARD_SPECIFIC_BANKSIZE ((1 << 7) + (1 << 5) + (1 << 4) + 1)
+/*
+ * SDRAM mode register
+ * CL = 010 (= 2 clocks)
+ */
+# define BOARD_SPECIFIC_MRSRB6 (0x2 << 4)
+# define BOARD_SPECIFIC_MRSRB7 0	/* not used */
+
 #endif /* __CONFIG_H */
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:33 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:33 +0100
Subject: [PATCH 08/20] mini2440: Fix a runtime warning when '.id=0' is used
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-9-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index a3bb817..e22fbd0 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -45,6 +45,7 @@ static struct memory_platform_data ram_pdata = {
 };
 
 static struct device_d sdram_dev = {
+	.id		= -1,
 	.name		= "mem",
 	.map_base	= CS6_BASE,
 	.size		= 64 * 1024 * 1024,
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:37 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:37 +0100
Subject: [PATCH 12/20] mini2440: Configure debug UART pins very early
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-13-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND and to avoid any visible
garbage on the screen until the pins are really set.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 17496a4..46581cc 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -138,6 +138,15 @@ static struct device_d mini2440_serial_device = {
 
 static int mini2440_console_init(void)
 {
+	/*
+	 * configure the UART1 right now, as barebox will
+	 * start to send data immediately
+	 */
+	s3c_gpio_mode(GPH0_NCTS0);
+	s3c_gpio_mode(GPH1_NRTS0);
+	s3c_gpio_mode(GPH2_TXD0);
+	s3c_gpio_mode(GPH3_RXD0);
+
 	register_device(&mini2440_serial_device);
 	return 0;
 }
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:38 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:38 +0100
Subject: [PATCH 13/20] mini2440: Add SDRAM size autodetection
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-14-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

If the SDRAM type will change in the future, only the 'config.h' must be
adapted to the new settings. The real size will be read back from this setting.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 46581cc..2aeb09e 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -48,7 +48,6 @@ static struct device_d sdram_dev = {
 	.id		= -1,
 	.name		= "mem",
 	.map_base	= CS6_BASE,
-	.size		= 64 * 1024 * 1024,
 	.platform_data	= &ram_pdata,
 };
 
@@ -87,6 +86,8 @@ static int mini2440_devices_init(void)
 {
 	uint32_t reg;
 
+	sdram_dev.size = s3c24x0_get_memory_size();
+
 	reg = readl(BWSCON);
 
 	/* CS#4 to access the network controller */
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:27 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:27 +0100
Subject: [PATCH 02/20] MACH-S3C24XX: Fix typo in UART2_SIZE macro
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-3-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h
index ab3dc4f..a990d80 100644
--- a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h
+++ b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-iomap.h
@@ -88,7 +88,7 @@
 #define UART1_BASE (S3C24X0_UART_BASE)
 #define UART1_SIZE 0x4000
 #define UART2_BASE (S3C24X0_UART_BASE + 0x4000)
-#define UART3_SIZE 0x4000
+#define UART2_SIZE 0x4000
 #define UART3_BASE (S3C24X0_UART_BASE + 0x8000)
 #define UART3_SIZE 0x4000
 
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:28 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:28 +0100
Subject: [PATCH 03/20] MACH-S3C24XX: Change detection method of the second
	SDRAM bank
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-4-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

There is no rule how to connect the SDRAMs to the two clocks signales the CPU
provides. Some boards are using them on a per bank base, some others on a per
chip base. So, the check for the enabled second clock cannot be used to detect
if the second SDRAM bank is populated.
A better way is to check the MT bits of the second SDRAM bank register. When
the init code sets these bits to '00' the second bank is not used for SDRAM
and gets ignored.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/mach-s3c24xx/generic.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/generic.c b/arch/arm/mach-s3c24xx/generic.c
index c04e0b6..4c7e799 100644
--- a/arch/arm/mach-s3c24xx/generic.c
+++ b/arch/arm/mach-s3c24xx/generic.c
@@ -181,8 +181,9 @@ int s3c24xx_dump_clocks(void)
 	printf("hclk:    %7d kHz\n", s3c24xx_get_hclk() / 1000);
 	printf("pclk:    %7d kHz\n", s3c24xx_get_pclk() / 1000);
 	printf("SDRAM1:   CL%d@%dMHz\n", ((readl(BANKCON6) & 0xc) >> 2) + 2, s3c24xx_get_hclk() / 1000000);
-	if (!(readl(MISCCR) & (1 << 18)))
-		printf("SDRAM2:   CL%d@%dMHz\n", ((readl(BANKCON7) & 0xc) >> 2) + 2, s3c24xx_get_hclk() / 1000000);
+	if ((readl(BANKCON7) & (0x3 << 15)) == (0x3 << 15))
+		printf("SDRAM2:   CL%d@%dMHz\n", ((readl(BANKCON7) & 0xc) >> 2) + 2,
+			s3c24xx_get_hclk() / 1000000);
 	return 0;
 }
 
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:42 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:42 +0100
Subject: [PATCH 17/20] mini2440: Use a flash based BBT as the kernel also does
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-18-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

The default configuration of the mini2440 in the current 2.6.37 kernel uses
a flash based BBT. So, the barebox for the mini2440 must also use one, to be
in sync with the kernel about bad blocks in the flash.

Due to the used OOB layout, the generic BBT description coming with the
framework can be used.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index ae48a51..ab309a0 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -55,7 +55,8 @@ static struct device_d sdram_dev = {
 };
 
 static struct s3c24x0_nand_platform_data nand_info = {
-	.nand_timing = CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1)
+	.nand_timing = CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1),
+	.flash_bbt = 1,	/* same as the kernel */
 };
 
 static struct device_d nand_dev = {
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:35 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:35 +0100
Subject: [PATCH 10/20] mini2440: Add PLL settings
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-11-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/config.h |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/config.h b/arch/arm/boards/mini2440/config.h
index a664017..1edd69c 100644
--- a/arch/arm/boards/mini2440/config.h
+++ b/arch/arm/boards/mini2440/config.h
@@ -26,6 +26,28 @@
  */
 #define S3C24XX_CLOCK_REFERENCE 12000000
 
+/**
+ * Define the main clock configuration to be used in register CLKDIVN
+ *
+ * We must limit the frequency of the connected SDRAMs with the clock ratio
+ * setup to 1:4:8. This will result into FCLK:HCLK:PCLK = 405Mhz:102MHz:51MHz
+ */
+#define BOARD_SPECIFIC_CLKDIVN 0x05
+
+/**
+ * Define the MPLL configuration to be used in register MPLLCON
+ *
+ * We want the MPLL to run at 405.0 MHz
+ */
+#define BOARD_SPECIFIC_MPLL ((0x7f << 12) + (2 << 4) + 1)
+
+/**
+ * Define the UPLL configuration to be used in register UPLLCON
+ *
+ * We want the UPLL to run at 48.0 MHz
+ */
+#define BOARD_SPECIFIC_UPLL ((0x38 << 12) + (2 << 4) + 2)
+
 /*
  * Flash access timings
  * Tacls  = 0ns (but 20ns data setup time)
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:44 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:44 +0100
Subject: [PATCH 19/20] mini2440: Remove some A9M2440 platform leftovers
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-20-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Also adapt the config file to the default environment.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/env/config |   71 +++++++++++++++++++++++++---------
 1 files changed, 52 insertions(+), 19 deletions(-)

diff --git a/arch/arm/boards/mini2440/env/config b/arch/arm/boards/mini2440/env/config
index 05a2d01..b24877e 100644
--- a/arch/arm/boards/mini2440/env/config
+++ b/arch/arm/boards/mini2440/env/config
@@ -1,27 +1,60 @@
 #!/bin/sh
 
-# can be either 'net' or 'nand''
-kernel=net
-root=net
+machine=mini2440
+eth0.serverip=
+user=
 
-#uimage=uImage-a9m2440
-uimage=uImage
-jffs2=root-a9m2440.jffs2
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
 
-autoboot_timeout=3
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
 
-nfsroot="/home/open-nandra/rootfs"
-bootargs="console=ttySAC0,115200"
+# can be either 'net', or 'nand'
+kernel_loc=net
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=net
 
-nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)"
-rootpart_nand="/dev/mtdblock3"
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-${machine}.${rootfs_type}
 
-# use 'dhcp' to do dhcp in barebox and in kernel
-#ip=dhcp
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-${machine}
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
 
-# or set your networking parameters here
-eth0.ipaddr=192.168.42.32
-eth0.netmask=255.255.0.0
-eth0.gateway=192.168.23.1
-eth0.serverip=192.168.23.2
-eth0.ethaddr=00:04:f3:00:06:35
+if [ -n $user ]; then
+	kernelimage="${user}"-"${kernelimage}"
+	nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
+	rootfsimage="${user}"-"${rootfsimage}"
+else
+	nfsroot="${eth0.serverip}:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+#
+# "mini2440" kernel parameter
+# 0 .. 9 = screen type
+# b = backlight enabled
+# t = touch enabled
+# c = camera enabled
+# Note: can be "minit2440= " if nothing of these components are connected
+#
+bootargs="console=ttySAC0,115200 mini2440=0tbc"
+
+# TODO NOR support
+
+nand_device="nand"
+nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)"
+rootfs_mtdblock_nand=3
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:39 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:39 +0100
Subject: [PATCH 14/20] mini2440: Add GPIO settings
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-15-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

This is required in order to enable booting from NAND, when there is no
other first level bootlader.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |  137 +++++++++++++++++++++++++++++++++++
 1 files changed, 137 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 2aeb09e..30dff07 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -35,6 +35,7 @@
 #include <nand.h>
 #include <asm/armlinux.h>
 #include <asm/io.h>
+#include <mach/gpio.h>
 #include <mach/s3c24x0-iomap.h>
 #include <mach/s3c24x0-nand.h>
 #include <mach/s3c24xx-generic.h>
@@ -82,12 +83,148 @@ static struct device_d dm9000_dev = {
 	.platform_data = &dm9000_data,
 };
 
+static const unsigned pin_usage[] = {
+	/* address bus, used by NOR, SDRAM */
+	GPA1_ADDR16,
+	GPA2_ADDR17,
+	GPA3_ADDR18,
+	GPA4_ADDR19,
+	GPA5_ADDR20,
+	GPA6_ADDR21,
+	GPA7_ADDR22,
+
+	GPA8_ADDR23_GPIO | GPIO_IN,
+	GPA9_ADDR24,	/* BA0 */
+	GPA10_ADDR25,	/* BA1 */
+	GPA11_ADDR26_GPIO | GPIO_IN,	/* not connected */
+
+	/* DM9000 requirements */
+	GPA15_NGCS4,
+	GPF7_EINT7,
+
+	/* de-activate the speaker */
+	GPB0_GPIO | GPIO_OUT | GPIO_VAL(0),
+
+	/* SD socket */
+	GPE5_SDCLK,
+	GPE6_SDCMD,
+	GPE7_SDDAT0,
+	GPE8_SDDAT1,
+	GPE9_SDDAT2,
+	GPE10_SDDAT3,
+	GPG8_GPIO | GPIO_IN,	/* change detection */
+	GPH8_GPIO | GPIO_IN,	/* write protection sense */
+
+	/* NAND requirements */
+	GPA17_CLE,
+	GPA18_ALE,
+	GPA19_NFWE,
+	GPA20_NFRE,
+	GPA21_NRSTOUT,
+	GPA22_NFCE,
+
+	/* Video out */
+	GPC0_LEND,
+	GPC1_VCLK,
+	GPC2_VLINE,
+	GPC3_VFRAME,
+	GPC4_VM,
+	GPC5_LPCOE,
+	GPC6_LPCREV,
+	GPC7_LPCREVB,
+	GPG4_LCD_PWREN,
+
+	GPC8_VD0,
+	GPC9_VD1,
+	GPC10_VD2,
+	GPC11_VD3,
+	GPC12_VD4,
+	GPC13_VD5,
+	GPC14_VD6,
+	GPC15_VD7,
+	GPD0_VD8,
+	GPD1_VD9,
+	GPD2_VD10,
+	GPD3_VD11,
+	GPD4_VD12,
+	GPD5_VD13,
+	GPD6_VD14,
+	GPD7_VD15,
+	GPD8_VD16,
+	GPD9_VD17,
+	GPD10_VD18,
+	GPD11_VD19,
+	GPD12_VD20,
+	GPD13_VD21,
+	GPD14_VD22,
+	GPD15_VD23,
+
+	/* K6 or CON12, pin 6, external pull up  */
+	GPG11_EINT19 | GPIO_IN,
+	/* K5 or CON12, pin 5*/
+	GPG7_EINT15 | GPIO_IN,
+	/* K4 or CON12, pin 4 */
+	GPG6_EINT14 | GPIO_IN,
+	/* K3 or CON12, pin 3 */
+	GPG5_EINT13 | GPIO_IN,
+	/* K2 or CON12, pin 2 */
+	GPG3_EINT11 | GPIO_IN,
+	/* K1 or CON12, pin 1, external pull up */
+	GPG0_EINT8 | GPIO_IN,
+
+	/* LED 1 1=off */
+	GPB5_GPIO | GPIO_OUT | GPIO_VAL(1),
+	/* LED 2 1=off */
+	GPB6_GPIO | GPIO_OUT | GPIO_VAL(1),
+	/* LED 3 1=off */
+	GPB7_GPIO | GPIO_OUT | GPIO_VAL(1),
+	/* LED 4 1=off */
+	GPB8_GPIO | GPIO_OUT | GPIO_VAL(1),
+
+	/* camera interface (ignore it) */
+	GPJ0_GPIO | GPIO_IN,
+	GPJ1_GPIO | GPIO_IN,
+	GPJ2_GPIO | GPIO_IN,
+	GPJ3_GPIO | GPIO_IN,
+	GPJ4_GPIO | GPIO_IN,
+	GPJ5_GPIO | GPIO_IN,
+	GPJ6_GPIO | GPIO_IN,
+	GPJ7_GPIO | GPIO_IN,
+	GPJ8_GPIO | GPIO_IN,
+	GPJ9_GPIO | GPIO_IN,
+	GPJ10_GPIO | GPIO_IN,
+	GPJ11_GPIO | GPIO_IN,
+	GPJ12_GPIO | GPIO_IN,
+
+	/* I2C bus */
+	GPE14_IICSCL,	/* external pull up */
+	GPE15_IICSDA,	/* external pull up */
+
+	GPA12_NGCS1,	/* CON5, pin 7 */
+	GPA13_NGCS2,	/* CON5, pin 8 */
+	GPA14_NGCS3,	/* CON5, pin 9 */
+	GPA16_NGCS5,	/* CON5, pin 10 */
+
+	/* UART2 (spare) */
+	GPH4_TXD1,
+	GPH5_RXD1,
+
+	/* UART3 (spare) */
+	GPH6_TXD2,
+	GPH7_RXD2,
+};
+
 static int mini2440_devices_init(void)
 {
 	uint32_t reg;
+	int i;
 
 	sdram_dev.size = s3c24x0_get_memory_size();
 
+	/* ----------- configure the access to the outer space ---------- */
+	for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
+		s3c_gpio_mode(pin_usage[i]);
+
 	reg = readl(BWSCON);
 
 	/* CS#4 to access the network controller */
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:34 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:34 +0100
Subject: [PATCH 09/20] mini2440: Add some useful documentation
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-10-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |  157 +++++++++++++++++++++++++++++++++++
 1 files changed, 157 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index e22fbd0..17496a4 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -64,6 +64,10 @@ static struct device_d nand_dev = {
 
 /*
  * dm9000 network controller onboard
+ * Connected to CS line 4 and interrupt line EINT7,
+ * data width is 16 bit
+ * Area 1: Offset 0x300...0x303
+ * Area 2: Offset 0x304...0x307
  */
 static struct dm9000_platform_data dm9000_data = {
 	.iobase   = CS4_BASE + 0x300,
@@ -139,3 +143,156 @@ static int mini2440_console_init(void)
 }
 
 console_initcall(mini2440_console_init);
+
+/** @page mini2440 FriendlyARM's mini2440
+
+This system is based on a Samsung S3C2440 CPU. The card is shipped with:
+
+- S3C2440\@400 MHz or 533 MHz (ARM920T/ARMv4T)
+- 12 MHz crystal reference
+- 32.768 kHz crystal reference
+- SDRAM 64 MiB (one bank only)
+   - HY57V561620 (two devices for 64 MiB to form a 32 bit bus)
+     - 4M x 16bit x 4 Banks Mobile SDRAM
+     - 8192 refresh cycles / 64 ms
+     - CL2\@100 MHz
+     - 133 MHz max
+     - collumn address size is 9 bits
+     - row address size is 13 bits
+   - MT48LC16M16 (two devices for 64 MiB to form a 32 bit bus)
+     - 4M x 16bit x 4 Banks Mobile SDRAM
+     - commercial & industrial type
+     - 8192 refresh cycles / 64 ms
+     - CL2\@100 MHz
+     - 133 MHz max
+     - collumn address size is 9 bits
+     - row address size is 13 bits
+- NAND Flash 128MiB...1GiB
+   - K9Fxx08
+- NOR Flash (up to 22 address lines available)
+   - AM29LV160DB, 2 MiB
+   - SST39VF1601, 2 MiB
+   - 16 bit data bus
+- SD card interface, 3.3V (fixed voltage)
+- Host and device USB interface, USB1.1 compliant
+- UDA1341TS Audio
+- DM9000 Ethernet interface
+  - uses CS#4
+  - uses EINT7
+  - 16 bit data bus
+- I2C interface, 100 KHz and 400 KHz
+  - EEPROM
+    - ST M24C08
+    - address 0x50
+- Speaker on GPB0 ("low" = inactive)
+- LCD interface
+- Touch Screen interface
+- Camera interface
+- I2S interface
+- AC97 Audio-CODEC interface
+- three serial RS232 interfaces (one with level converter)
+- SPI interface
+- JTAG interface
+
+How to get the binary image:
+
+Using the default configuration:
+
+ at code
+make ARCH=arm mini2440_defconfig
+ at endcode
+
+Build the binary image:
+
+ at code
+make ARCH=arm CROSS_COMPILE=armv4compiler
+ at endcode
+
+ at note replace the armv4compiler with your ARM v4 cross compiler.
+
+How to bring in \a barebox ?
+
+First run it as a second stage bootloader. There are two known working ways to
+do so:
+
+One way is to use the "device firmware update" feature of the 'supervivi'.
+ - connect a terminal application to the mini2440's serial connector
+ - switch S2 to 'boot from NOR' to boot into 'supervivi'
+ - connect your host to the usb device connector on the mini2440
+ - switch on your mini2440
+ - in 'supervivi' type q (command line) then:
+ at code
+load ram 0x31000000 \<barebox-size\> u
+ at endcode
+ - use a tool for DFU update (for example from openkomo) to transfer the 'barebox.bin' binary
+ - then in 'supervivi' just run
+ at code
+go 0x31000000
+ at endcode
+
+A second way is to use any kind of JTAG adapter. For this case I'm using the
+'JTAKkey tiny' from Amontec and OpenOCD. First you need an adapter for this
+kind of Dongle as it uses a 20 pin connector with 2.54 mm grid, and the
+mini2440 uses a 10 pin connector with 2 mm grid.
+
+ at code
+             Amontec JTAGkey tiny               mini2440
+           -------------------------------------------------------
+              VREF  1   2  n.c.             VREF  1   2  VREF
+            TRST_N  3   4  GND            TRST_N  3   4  SRST_N
+               TDI  5   6  GND               TDI  5   6  TDO
+               TMS  7   8  GND               TMS  7   8  GND
+               TCK  9  10  GND               TCK  9  10  GND
+              n.c. 11  12  GND
+               TDO 13  14  GND
+            SRST_N 15  16  GND
+              n.c. 17  18  GND
+              n.c. 19  20  GND
+ at endcode
+
+Create a simple board description file. I did it this way:
+
+ at code
+source [find interface/jtagkey-tiny.cfg]
+source [find target/samsung_s3c2440.cfg]
+
+adapter_khz 12000
+ at endcode
+
+And then the following steps:
+ - connect a terminal application to the mini2440's serial connector
+ - connect the mini2440 to a working network
+ - switch S2 to boot from NOR to boot into 'supervivi'
+ - switch on your mini2440
+ - run the OpenOCD daemon configured with the file shown above
+ - connect to the OpenOCD daemon via 'telnet'.
+ - run the following commands to download @a barebox into your target
+ at code
+> halt
+> load_image \<path to the 'barebox.bin'\> 0x31000000 bin
+> resume 0x31000000
+ at endcode
+
+Now @a barebox is starting from an already initialized CPU and SDRAM (done by
+'supervivi').
+
+Change to your terminal console and configure the network first. Adapt the
+following settings to your network:
+ at code
+eth0.ipaddr=192.168.1.240
+eth0.netmask=255.255.255.0
+eth0.gateway=192.168.23.2
+eth0.serverip=192.168.1.7
+eth0.ethaddr=00:04:f3:00:06:35
+ at endcode
+
+A 'ping' to your TFTP server should bring a "...is alive" message now.
+
+We are ready now to program @a barebox into the NAND flash:
+
+ at code
+erase /dev/nand0.barebox.bb
+tftp barebox.bin /dev/nand0.barebox.bb
+ at endcode
+
+*/
-- 
1.7.2.3



From jbe at pengutronix.de  Wed Feb 16 13:13:45 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 16 Feb 2011 19:13:45 +0100
Subject: [PATCH 20/20] mini2440: Use generic environment
In-Reply-To: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
References: <1297880025-7184-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1297880025-7184-21-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/env/bin/_update       |   34 ----
 arch/arm/boards/mini2440/env/bin/boot          |   40 ----
 arch/arm/boards/mini2440/env/bin/hush_hack     |    1 -
 arch/arm/boards/mini2440/env/bin/init          |   34 ----
 arch/arm/boards/mini2440/env/bin/update_kernel |   13 --
 arch/arm/boards/mini2440/env/bin/update_root   |   13 --
 arch/arm/configs/mini2440_defconfig            |  226 +-----------------------
 7 files changed, 7 insertions(+), 354 deletions(-)
 delete mode 100644 arch/arm/boards/mini2440/env/bin/_update
 delete mode 100644 arch/arm/boards/mini2440/env/bin/boot
 delete mode 100644 arch/arm/boards/mini2440/env/bin/hush_hack
 delete mode 100644 arch/arm/boards/mini2440/env/bin/init
 delete mode 100644 arch/arm/boards/mini2440/env/bin/update_kernel
 delete mode 100644 arch/arm/boards/mini2440/env/bin/update_root

diff --git a/arch/arm/boards/mini2440/env/bin/_update b/arch/arm/boards/mini2440/env/bin/_update
deleted file mode 100644
index b10682e..0000000
--- a/arch/arm/boards/mini2440/env/bin/_update
+++ /dev/null
@@ -1,34 +0,0 @@
-#!/bin/sh
-
-if [ -z "$part" -o -z "$image" ]; then
-	echo "define \$part and \$image"
-	exit 1
-fi
-
-if [ ! -e "$part" ]; then
-	echo "Partition $part does not exist"
-	exit 1
-fi
-
-if [ $# = 1 ]; then
-	image=$1
-fi
-
-if [ x$ip = xdhcp ]; then
-	dhcp
-fi
-
-ping $eth0.serverip
-if [ $? -ne 0 ] ; then
-	echo "update aborted"
-	exit 1
-fi
-
-echo
-echo "erasing partition $part"
-erase $part
-
-echo
-echo "flashing $image to $part"
-echo
-tftp $image $part
diff --git a/arch/arm/boards/mini2440/env/bin/boot b/arch/arm/boards/mini2440/env/bin/boot
deleted file mode 100644
index 86e22cf..0000000
--- a/arch/arm/boards/mini2440/env/bin/boot
+++ /dev/null
@@ -1,40 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-if [ x$1 = xnand ]; then
-	root=nand
-	kernel=nand
-fi
-
-if [ x$1 = xnet ]; then
-	root=net
-	kernel=net
-fi
-
-if [ x$root = xnand ]; then
-	bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2"
-fi
-if [ x$root = xnet ]; then
-	bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp"
-	if [ x$ip = xdhcp ]; then
-		bootargs="$bootargs ip=dhcp"
-	else
-		bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::"
-	fi
-fi
-
-bootargs="$bootargs mtdparts=\"NAND 32MiB 3,3V 8-bit:$nand_parts\""
-
-bootargs="$bootargs cs89x0_media=rj45 cs89x0_mac=$eth0.ethaddr"
-
-if [ x$kernel = xnet ]; then
-	if [ x$ip = xdhcp ]; then
-		dhcp
-	fi
-	tftp $uimage uImage || exit 1
-	bootm uImage
-else
-	bootm /dev/nand0.kernel.bb
-fi
-
diff --git a/arch/arm/boards/mini2440/env/bin/hush_hack b/arch/arm/boards/mini2440/env/bin/hush_hack
deleted file mode 100644
index 5fffa92..0000000
--- a/arch/arm/boards/mini2440/env/bin/hush_hack
+++ /dev/null
@@ -1 +0,0 @@
-nand -a /dev/nand0.*
diff --git a/arch/arm/boards/mini2440/env/bin/init b/arch/arm/boards/mini2440/env/bin/init
deleted file mode 100644
index e98ab84..0000000
--- a/arch/arm/boards/mini2440/env/bin/init
+++ /dev/null
@@ -1,34 +0,0 @@
-#!/bin/sh
-
-PATH=/env/bin
-export PATH
-
-. /env/config
-
-if [ -e /dev/nand0 ]; then
-#addpart /dev/nand0 $nand_parts
-
-	# Uh, oh, hush first expands wildcards and then starts executing
-	# commands. What a bug!
-	source /env/bin/hush_hack
-fi
-
-if [ -z $eth0.ethaddr ]; then
-	while [ -z $eth0.ethaddr ]; do
-		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
-	done
-	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
-fi
-
-echo
-echo -n "Hit any key to stop autoboot: "
-timeout -a $autoboot_timeout
-if [ $? != 0 ]; then
-	echo
-	echo "type update_kernel [<imagename>] to update kernel into flash"
-	echo "type update_root [<imagename>] to update rootfs into flash"
-	echo
-	exit
-fi
-
-boot
diff --git a/arch/arm/boards/mini2440/env/bin/update_kernel b/arch/arm/boards/mini2440/env/bin/update_kernel
deleted file mode 100644
index c43a557..0000000
--- a/arch/arm/boards/mini2440/env/bin/update_kernel
+++ /dev/null
@@ -1,13 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-part=/dev/nand0.kernel.bb
-
-if [ x$1 = x ]; then
-	image=$uimage
-else
-	image=$1
-fi
-
-. /env/bin/_update $image
diff --git a/arch/arm/boards/mini2440/env/bin/update_root b/arch/arm/boards/mini2440/env/bin/update_root
deleted file mode 100644
index 46cbca5..0000000
--- a/arch/arm/boards/mini2440/env/bin/update_root
+++ /dev/null
@@ -1,13 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-part=/dev/nand0.root.bb
-
-if [ x$1 = x ]; then
-	image=$jffs2
-else
-	image=$1
-fi
-
-. /env/bin/_update $image
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index f289f0d..e770871 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -1,122 +1,19 @@
-#
-# Automatically generated make config: don't edit
-# Linux barebox version: 2010.10.0
-# Tue Oct 19 09:01:55 2010
-#
-# CONFIG_BOARD_LINKER_SCRIPT is not set
-CONFIG_GENERIC_LINKER_SCRIPT=y
-CONFIG_ARM=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_NOMADIK is not set
-# CONFIG_ARCH_OMAP is not set
 CONFIG_ARCH_S3C24xx=y
-
-#
-# Processor Type
-#
-CONFIG_CPU_32=y
-CONFIG_CPU_ARM920T=y
-CONFIG_CPU_32v4T=y
-
-#
-# processor features
-#
-CONFIG_ARCH_TEXT_BASE=0x31fc0000
-CONFIG_BOARDINFO="Mini 2440"
-CONFIG_CPU_S3C2440=y
-# CONFIG_MACH_A9M2410 is not set
-# CONFIG_MACH_A9M2440 is not set
 CONFIG_MACH_MINI2440=y
-
-#
-# Board specific settings
-#
-
-#
-# S3C24X0 Features
-#
-# CONFIG_S3C24XX_PLL_INIT is not set
-# CONFIG_S3C24XX_SDRAM_INIT is not set
 CONFIG_S3C24XX_NAND_BOOT=y
-# CONFIG_AEABI is not set
-
-#
-# Arm specific settings
-#
-CONFIG_CMD_ARM_CPUINFO=y
+CONFIG_AEABI=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
-CONFIG_GREGORIAN_CALENDER=y
-CONFIG_HAS_KALLSYMS=y
-CONFIG_HAS_MODULES=y
-CONFIG_CMD_MEMORY=y
-CONFIG_ENV_HANDLING=y
-
-#
-# General Settings
-#
-CONFIG_LOCALVERSION_AUTO=y
-
-#
-# memory layout
-#
-CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
-CONFIG_TEXT_BASE=0x31fc0000
-CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
-CONFIG_MEMORY_LAYOUT_DEFAULT=y
-# CONFIG_MEMORY_LAYOUT_FIXED is not set
-CONFIG_STACK_SIZE=0x8000
-CONFIG_MALLOC_SIZE=0x400000
+CONFIG_TEXT_BASE=0x33e00000
 CONFIG_BROKEN=y
-CONFIG_EXPERIMENTAL=y
-# CONFIG_MODULES is not set
-# CONFIG_KALLSYMS is not set
-CONFIG_PROMPT="barebox:"
-CONFIG_BAUDRATE=38400
+CONFIG_PROMPT="mini2440:"
 CONFIG_LONGHELP=y
-CONFIG_CBSIZE=1024
-CONFIG_MAXARGS=16
-CONFIG_SHELL_HUSH=y
-# CONFIG_SHELL_SIMPLE is not set
 CONFIG_GLOB=y
-CONFIG_PROMPT_HUSH_PS2="> "
-# CONFIG_HUSH_FANCY_PROMPT is not set
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
-# CONFIG_MENU is not set
-# CONFIG_PASSWORD is not set
-CONFIG_DYNAMIC_CRC_TABLE=y
-CONFIG_ERRNO_MESSAGES=y
-CONFIG_TIMESTAMP=y
-CONFIG_CONSOLE_FULL=y
-CONFIG_CONSOLE_ACTIVATE_FIRST=y
-# CONFIG_OF_FLAT_TREE is not set
 CONFIG_PARTITION=y
-CONFIG_DEFAULT_ENVIRONMENT=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/mini2440/env"
-
-#
-# Debugging
-#
 CONFIG_DEBUG_INFO=y
-# CONFIG_ENABLE_FLASH_NOISE is not set
-# CONFIG_ENABLE_PARTITION_NOISE is not set
-CONFIG_ENABLE_DEVICE_NOISE=y
-
-#
-# Commands
-#
-
-#
-# scripting
-#
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_SAVEENV=y
@@ -124,128 +21,19 @@ CONFIG_CMD_LOADENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
-CONFIG_CMD_TRUE=y
-CONFIG_CMD_FALSE=y
-# CONFIG_CMD_LOGIN is not set
-# CONFIG_CMD_PASSWD is not set
-
-#
-# file commands
-#
-CONFIG_CMD_LS=y
-CONFIG_CMD_RM=y
-CONFIG_CMD_CAT=y
-CONFIG_CMD_MKDIR=y
-CONFIG_CMD_RMDIR=y
-CONFIG_CMD_CP=y
-CONFIG_CMD_PWD=y
-CONFIG_CMD_CD=y
-CONFIG_CMD_MOUNT=y
-CONFIG_CMD_UMOUNT=y
-
-#
-# console
-#
-CONFIG_CMD_CLEAR=y
-CONFIG_CMD_ECHO=y
-# CONFIG_CMD_ECHO_E is not set
-
-#
-# memory
-#
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADY is not set
-# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
 CONFIG_CMD_MTEST=y
-# CONFIG_CMD_MTEST_ALTERNATIVE is not set
-
-#
-# flash
-#
 CONFIG_CMD_FLASH=y
-# CONFIG_CMD_UBI is not set
-
-#
-# booting
-#
-CONFIG_CMD_BOOTM=y
-# CONFIG_CMD_BOOTM_ZLIB is not set
-# CONFIG_CMD_BOOTM_BZLIB is not set
-# CONFIG_CMD_BOOTM_LZO is not set
-# CONFIG_CMD_BOOTM_SHOW_TYPE is not set
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTU=y
 CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_TIMEOUT=y
 CONFIG_CMD_PARTITION=y
-CONFIG_CMD_TEST=y
-CONFIG_CMD_VERSION=y
-CONFIG_CMD_HELP=y
-CONFIG_CMD_DEVINFO=y
-# CONFIG_CMD_UNLZO is not set
+CONFIG_CMD_GPIO=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
-# CONFIG_NET_NFS is not set
 CONFIG_NET_PING=y
 CONFIG_NET_TFTP=y
-# CONFIG_NET_TFTP_PUSH is not set
-# CONFIG_NET_NETCONSOLE is not set
-# CONFIG_NET_RESOLV is not set
-
-#
-# Drivers
-#
-
-#
-# serial drivers
-#
-# CONFIG_DRIVER_SERIAL_ARM_DCC is not set
-# CONFIG_DRIVER_SERIAL_NS16550 is not set
-CONFIG_DRIVER_SERIAL_S3C24X0=y
-# CONFIG_DRIVER_SERIAL_S3C24X0_AUTOSYNC is not set
-CONFIG_HAS_DM9000=y
-CONFIG_MIIDEV=y
-
-#
-# Network drivers
-#
-# CONFIG_DRIVER_NET_SMC911X is not set
-# CONFIG_DRIVER_NET_SMC91111 is not set
 CONFIG_DRIVER_NET_DM9000=y
-
-#
-# SPI drivers
-#
 # CONFIG_SPI is not set
-# CONFIG_I2C is not set
-
-#
-# flash drivers
-#
-# CONFIG_DRIVER_CFI is not set
-CONFIG_MTD=y
-CONFIG_NAND=y
-CONFIG_NAND_S3C24X0=y
-# CONFIG_MTD_NAND_VERIFY_WRITE is not set
-# CONFIG_MTD_NAND_ECC_SMC is not set
-CONFIG_MTD_NAND_IDS=y
-# CONFIG_MTD_NAND_DISKONCHIP is not set
-# CONFIG_UBI is not set
-# CONFIG_ATA is not set
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-# CONFIG_VIDEO is not set
-
-#
-# Filesystem support
-#
-# CONFIG_FS_CRAMFS is not set
-CONFIG_FS_RAMFS=y
-CONFIG_FS_DEVFS=y
-CONFIG_CRC32=y
-# CONFIG_DIGEST is not set
-# CONFIG_GENERIC_FIND_NEXT_BIT is not set
-# CONFIG_PROCESS_ESCAPE_SEQUENCE is not set
+CONFIG_MCI=y
+CONFIG_MCI_S3C=y
-- 
1.7.2.3



From marc at cpdesign.com.au  Wed Feb 16 15:34:34 2011
From: marc at cpdesign.com.au (Marc Reilly)
Date: Thu, 17 Feb 2011 07:34:34 +1100
Subject: PMIC device driver
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00817@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00817@SRV-VS06.TELEVIC.COM>
Message-ID: <201102170734.34357.marc@cpdesign.com.au>


Hi,

> > indicate the register within the PMIC to read/write. On the other hand,
> > the standard read and write functions only take 3 parameters (device,
> > buffer, buffersize). How do I pass that offset to these functions ? How
> > do I use the PMIC device driver ?
> > (Maybe this is a general Linux device driver question, but I'm not that
> > familiar with device drivers, so...)

I'd be using the pmic_read_reg and pmic_write_reg functions (they should be 
renamed and exported first though.)

Have a look at the mc13892 driver ..

> > 
> > Is it the best way to do it like this (open, read, write), or do I better
> > call those functions directly ? (I have to set the PMIC registers in the
> > "late_init" function of the barebox startup sequence)

... and the freescale-mx35-3stack for example.


> 
> [Filip] Think I found how it works. I have to use the normal read, write
> and lseek functions to read/write PMIC registers. 

As I said above, I reckon your board code will be cleaner if you skip the file 
I/O and use the _read_reg and _write_reg functions directly.


> The 'offset' and 'flag'
> parameters in read and write functions are for internal use only. Correct.
> When reading, an internal index is incremented. A following read starts
> where the previous ended. With lseek, one can move that index to address
> the correct register. Right ?
In general, yes.


HTH,

Cheers
Marc


> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From jbe at pengutronix.de  Thu Feb 17 05:40:26 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 17 Feb 2011 11:40:26 +0100
Subject: [PATCH]  Fix end of expression char
Message-ID: <201102171140.26674.jbe@pengutronix.de>

Its not a bug fix, just a clean up.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>

---
 drivers/net/fec_imx.c |   10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Index: a/drivers/net/fec_imx.c
===================================================================
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -605,11 +605,11 @@ static int fec_probe(struct device_d *de
 	dev->type_data = edev;
 	fec = (struct fec_priv *)xzalloc(sizeof(*fec));
 	edev->priv = fec;
-	edev->open = fec_open,
-	edev->init = fec_init,
-	edev->send = fec_send,
-	edev->recv = fec_recv,
-	edev->halt = fec_halt,
+	edev->open = fec_open;
+	edev->init = fec_init;
+	edev->send = fec_send;
+	edev->recv = fec_recv;
+	edev->halt = fec_halt;
 	edev->get_ethaddr = fec_get_hwaddr,
 	edev->set_ethaddr = fec_set_hwaddr,
 

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From jbe at pengutronix.de  Thu Feb 17 05:57:14 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 17 Feb 2011 11:57:14 +0100
Subject: How to handle more than one network device in barebox
Message-ID: <201102171157.14757.jbe@pengutronix.de>

Hi,

due to the fact (all?) network device drivers in barebox are using xzalloc to 
allocate their "struct eth_device" the embedded "struct dev's" '.id' is 
always '0'. So the registration of a second network device fails always with

 register_device: already registered eth0

Currently there is no way to overwrite the network device's ID. If I init 
the "edev->dev.id" with '-1', it works. But it would be nice to define the 
network device ordering from inside the platform (and not only with the order 
I register the base devices). And copying the ".id" from the registered base 
device also does not work if the network devices are of different type, due 
to the framework starts with index 0 for different names.

Any ideas how to?

Regards,
Juergen

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Thu Feb 17 06:24:14 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 17 Feb 2011 12:24:14 +0100
Subject: How to handle more than one network device in barebox
In-Reply-To: <201102171157.14757.jbe@pengutronix.de>
References: <201102171157.14757.jbe@pengutronix.de>
Message-ID: <20110217112414.GC24426@pengutronix.de>

On Thu, Feb 17, 2011 at 11:57:14AM +0100, Juergen Beisert wrote:
> Hi,
> 
> due to the fact (all?) network device drivers in barebox are using xzalloc to 
> allocate their "struct eth_device" the embedded "struct dev's" '.id' is 
> always '0'. So the registration of a second network device fails always with
> 
>  register_device: already registered eth0
> 
> Currently there is no way to overwrite the network device's ID. If I init 
> the "edev->dev.id" with '-1', it works. But it would be nice to define the 
> network device ordering from inside the platform (and not only with the order 
> I register the base devices). And copying the ".id" from the registered base 
> device also does not work if the network devices are of different type, due 
> to the framework starts with index 0 for different names.
> 
> Any ideas how to?

I stumbled upon this aswell.

I solved this with the following patch which I forgot to send to the
list. It still does not solve the issue that the order of network
devices is defined by the registration order, but at least it makes
multiple network devices work again.

Sascha

commit fe1864bdcf237a3ed0f5391e1cbd6cec13b518bc
Author: Sascha Hauer <s.hauer at pengutronix.de>
Date:   Thu Feb 3 13:07:57 2011 +0100

    network: initialize new net device id with -1
    
    Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

diff --git a/net/eth.c b/net/eth.c
index 8333d80..9eae17c 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -151,6 +151,7 @@ int eth_register(struct eth_device *edev)
 	}
 
 	strcpy(edev->dev.name, "eth");
+	edev->dev.id = -1;
 	register_device(&edev->dev);
 
 	dev->type_data = edev;

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Thu Feb 17 06:23:24 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 17 Feb 2011 12:23:24 +0100
Subject: [PATCH v2]  Fix end of expression char (some lines forgotten in v1)
In-Reply-To: <201102171140.26674.jbe@pengutronix.de>
References: <201102171140.26674.jbe@pengutronix.de>
Message-ID: <201102171223.24921.jbe@pengutronix.de>

Its not a bug fix, just a clean up.

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>

---
 drivers/net/fec_imx.c |   14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Index: barebox-2011.02.0/drivers/net/fec_imx.c
===================================================================
--- barebox-2011.02.0.orig/drivers/net/fec_imx.c
+++ barebox-2011.02.0/drivers/net/fec_imx.c
@@ -605,13 +605,13 @@ static int fec_probe(struct device_d *de
 	dev->type_data = edev;
 	fec = (struct fec_priv *)xzalloc(sizeof(*fec));
 	edev->priv = fec;
-	edev->open = fec_open,
-	edev->init = fec_init,
-	edev->send = fec_send,
-	edev->recv = fec_recv,
-	edev->halt = fec_halt,
-	edev->get_ethaddr = fec_get_hwaddr,
-	edev->set_ethaddr = fec_set_hwaddr,
+	edev->open = fec_open;
+	edev->init = fec_init;
+	edev->send = fec_send;
+	edev->recv = fec_recv;
+	edev->halt = fec_halt;
+	edev->get_ethaddr = fec_get_hwaddr;
+	edev->set_ethaddr = fec_set_hwaddr;
 
 	fec->regs = (void *)dev->map_base;
 


-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Thu Feb 17 06:39:29 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 17 Feb 2011 12:39:29 +0100
Subject: [PATCH 2/4] ARM i.MX esdctl: Add some missing bitfields
In-Reply-To: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
References: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1297942771-2289-3-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/include/mach/esdctl.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/esdctl.h b/arch/arm/mach-imx/include/mach/esdctl.h
index fe74cb6..10c8b9b 100644
--- a/arch/arm/mach-imx/include/mach/esdctl.h
+++ b/arch/arm/mach-imx/include/mach/esdctl.h
@@ -31,6 +31,10 @@
 #define ESDCTL0_REF4				(3 << 13)
 #define ESDCTL0_REF8				(4 << 13)
 #define ESDCTL0_REF16				(5 << 13)
+#define ESDCTL0_PWDT_DISABLED			(0 << 10)
+#define ESDCTL0_PWDT_PRECHARGE_PWDN		(1 << 10)
+#define ESDCTL0_PWDT_PWDN_64			(2 << 10)
+#define ESDCTL0_PWDT_PWDN_128			(3 << 10)
 #define ESDCTL0_FP				(1 << 8)
 #define ESDCTL0_BL				(1 << 7)
 
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb 17 06:39:31 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 17 Feb 2011 12:39:31 +0100
Subject: [PATCH 4/4] ARM tx25: Add defconfig
In-Reply-To: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
References: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1297942771-2289-5-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/configs/tx25stk5_defconfig |   49 +++++++++++++++++++++++++++++++++++
 1 files changed, 49 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/configs/tx25stk5_defconfig

diff --git a/arch/arm/configs/tx25stk5_defconfig b/arch/arm/configs/tx25stk5_defconfig
new file mode 100644
index 0000000..8127ff3
--- /dev/null
+++ b/arch/arm/configs/tx25stk5_defconfig
@@ -0,0 +1,49 @@
+CONFIG_ARCH_IMX=y
+CONFIG_ARCH_IMX25=y
+CONFIG_MACH_TX25=y
+CONFIG_IMX_IIM=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_MMU=y
+CONFIG_MALLOC_SIZE=0x1000000
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/karo-tx25/env"
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_MTEST_ALTERNATIVE=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_GPIO=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_NET_TFTP_PUSH=y
+CONFIG_NET_NETCONSOLE=y
+CONFIG_DRIVER_NET_FEC_IMX=y
+# CONFIG_SPI is not set
+CONFIG_MTD=y
+CONFIG_NAND=y
+CONFIG_NAND_IMX=y
+CONFIG_NAND_IMX_BOOT=y
+CONFIG_UBI=y
+CONFIG_VIDEO=y
+CONFIG_DRIVER_VIDEO_IMX=y
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb 17 06:39:27 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 17 Feb 2011 12:39:27 +0100
Subject: [PATCH] i.MX25 patches
Message-ID: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>

The following adds support for the Ka-Ro tx25 board. Also, it brings
the i.MX25 iomux support (more or less) in sync with the kernel. The
kernel currently sets the sion bit for gpios which is imo wrong, so
this patch does not set the sion bits.

Sascha

Sascha Hauer (4):
      ARM i.MX: sync i.MX25 iomux support with kernel
      ARM i.MX esdctl: Add some missing bitfields
      initial karo tx25 board support
      ARM tx25: Add defconfig

 arch/arm/Makefile                                 |    1 +
 arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c |   90 +-
 arch/arm/boards/freescale-mx25-3-stack/3stack.c   |   36 +-
 arch/arm/boards/karo-tx25/Makefile                |   24 +
 arch/arm/boards/karo-tx25/board.c                 |  312 +++++
 arch/arm/boards/karo-tx25/config.h                |   31 +
 arch/arm/boards/karo-tx25/env/bin/init_board      |    6 +
 arch/arm/boards/karo-tx25/env/config              |   53 +
 arch/arm/boards/karo-tx25/lowlevel.c              |  173 +++
 arch/arm/configs/tx25stk5_defconfig               |   49 +
 arch/arm/mach-imx/Kconfig                         |    9 +
 arch/arm/mach-imx/include/mach/esdctl.h           |    4 +
 arch/arm/mach-imx/include/mach/iomux-mx25.h       | 1288 +++++++++------------
 arch/arm/mach-imx/include/mach/iomux-mx51.h       |    2 +-
 arch/arm/mach-imx/include/mach/iomux-v3.h         |   37 +-
 15 files changed, 1264 insertions(+), 851 deletions(-)
 create mode 100644 arch/arm/boards/karo-tx25/Makefile
 create mode 100644 arch/arm/boards/karo-tx25/board.c
 create mode 100644 arch/arm/boards/karo-tx25/config.h
 create mode 100644 arch/arm/boards/karo-tx25/env/bin/init_board
 create mode 100644 arch/arm/boards/karo-tx25/env/config
 create mode 100644 arch/arm/boards/karo-tx25/lowlevel.c
 create mode 100644 arch/arm/configs/tx25stk5_defconfig



From s.hauer at pengutronix.de  Thu Feb 17 06:39:30 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 17 Feb 2011 12:39:30 +0100
Subject: [PATCH 3/4] initial karo tx25 board support
In-Reply-To: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
References: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1297942771-2289-4-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/Makefile                            |    1 +
 arch/arm/boards/karo-tx25/Makefile           |   24 ++
 arch/arm/boards/karo-tx25/board.c            |  312 ++++++++++++++++++++++++++
 arch/arm/boards/karo-tx25/config.h           |   31 +++
 arch/arm/boards/karo-tx25/env/bin/init_board |    6 +
 arch/arm/boards/karo-tx25/env/config         |   53 +++++
 arch/arm/boards/karo-tx25/lowlevel.c         |  173 ++++++++++++++
 arch/arm/mach-imx/Kconfig                    |    9 +
 8 files changed, 609 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/karo-tx25/Makefile
 create mode 100644 arch/arm/boards/karo-tx25/board.c
 create mode 100644 arch/arm/boards/karo-tx25/config.h
 create mode 100644 arch/arm/boards/karo-tx25/env/bin/init_board
 create mode 100644 arch/arm/boards/karo-tx25/env/config
 create mode 100644 arch/arm/boards/karo-tx25/lowlevel.c

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 57a045f..14fd4f1 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -95,6 +95,7 @@ board-$(CONFIG_MACH_FREESCALE_MX51_PDK)		:= freescale-mx51-pdk
 board-$(CONFIG_MACH_GUF_CUPID)			:= guf-cupid
 board-$(CONFIG_MACH_MINI2440)			:= mini2440
 board-$(CONFIG_MACH_VERSATILEPB)		:= versatile
+board-$(CONFIG_MACH_TX25)			:= karo-tx25
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 
diff --git a/arch/arm/boards/karo-tx25/Makefile b/arch/arm/boards/karo-tx25/Makefile
new file mode 100644
index 0000000..e909a2c
--- /dev/null
+++ b/arch/arm/boards/karo-tx25/Makefile
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2011 Sascha Hauer <s.hauer at pengutronix.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+obj-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c
new file mode 100644
index 0000000..ea35857
--- /dev/null
+++ b/arch/arm/boards/karo-tx25/board.c
@@ -0,0 +1,312 @@
+/*
+ * (C) 2011 Pengutronix, Sascha Hauer <s.hauer at pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <environment.h>
+#include <mach/imx-regs.h>
+#include <asm/armlinux.h>
+#include <mach/gpio.h>
+#include <asm/io.h>
+#include <partition.h>
+#include <generated/mach-types.h>
+#include <mach/imx-nand.h>
+#include <fec.h>
+#include <nand.h>
+#include <mach/iomux-mx25.h>
+#include <mach/generic.h>
+#include <linux/err.h>
+#include <mach/devices-imx25.h>
+#include <asm/mmu.h>
+
+static struct fec_platform_data fec_info = {
+	.xcv_type	= RMII,
+	.phy_addr	= 0x1f,
+};
+
+static struct memory_platform_data sdram0_pdata = {
+	.name	= "ram0",
+	.flags	= DEVFS_RDWR,
+};
+
+static struct device_d sdram0_dev = {
+	.id	  = -1,
+	.name     = "mem",
+	.map_base = IMX_SDRAM_CS0,
+	.size     = 32 * 1024 * 1024,
+	.platform_data = &sdram0_pdata,
+};
+
+static struct memory_platform_data sdram1_pdata = {
+	.name	= "ram1",
+	.flags	= DEVFS_RDWR,
+};
+
+static struct device_d sdram1_dev = {
+	.id	  = -1,
+	.name     = "mem",
+	.map_base = IMX_SDRAM_CS1,
+	.size     = 32 * 1024 * 1024,
+	.platform_data = &sdram1_pdata,
+};
+
+static struct memory_platform_data sram_pdata = {
+	.name	= "sram0",
+	.flags	= DEVFS_RDWR,
+};
+
+static struct device_d sram0_dev = {
+	.id	  = -1,
+	.name     = "mem",
+	.map_base = 0x78000000,
+	.size     = 128 * 1024,
+	.platform_data = &sram_pdata,
+};
+
+struct imx_nand_platform_data nand_info = {
+	.width	= 1,
+	.hw_ecc	= 1,
+	.flash_bbt = 1,
+};
+
+#ifdef CONFIG_MMU
+static int tx25_mmu_init(void)
+{
+	mmu_init();
+
+	arm_create_section(0x80000000, 0x80000000, 32, PMD_SECT_DEF_CACHED);
+	arm_create_section(0x90000000, 0x90000000, 32, PMD_SECT_DEF_CACHED);
+	arm_create_section(0x92000000, 0x90000000, 32, PMD_SECT_DEF_UNCACHED);
+
+	setup_dma_coherent(0x02000000);
+
+#if TEXT_BASE & (0x100000 - 1)
+#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
+#else
+	arm_create_section(0x0,        TEXT_BASE,   1, PMD_SECT_DEF_UNCACHED);
+#endif
+	mmu_enable();
+
+	return 0;
+}
+postcore_initcall(tx25_mmu_init);
+#endif
+
+static struct pad_desc karo_tx25_padsd_fec[] = {
+	MX25_PAD_D11__GPIO_4_9,		/* FEC PHY power on pin */
+	MX25_PAD_D13__GPIO_4_7,		/* FEC reset */
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+};
+
+#define TX25_FEC_PWR_GPIO	(GPIO_PORTD | 9)
+#define TX25_FEC_RST_GPIO	(GPIO_PORTD | 7)
+
+static void noinline gpio_fec_active(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(karo_tx25_padsd_fec,
+			ARRAY_SIZE(karo_tx25_padsd_fec));
+
+	/* power down phy, put into reset */
+	gpio_direction_output(TX25_FEC_PWR_GPIO, 0);
+	gpio_direction_output(TX25_FEC_RST_GPIO, 0);
+
+	udelay(10);
+
+	/* power up phy, get out of reset */
+	gpio_direction_output(TX25_FEC_PWR_GPIO, 1);
+	gpio_direction_output(TX25_FEC_RST_GPIO, 1);
+
+	udelay(100);
+
+	/* apply a reset to the powered phy again */
+	gpio_direction_output(TX25_FEC_RST_GPIO, 0);
+	udelay(100);
+	gpio_direction_output(TX25_FEC_RST_GPIO, 1);
+}
+
+static int tx25_devices_init(void)
+{
+	gpio_fec_active();
+
+	imx25_add_fec(&fec_info);
+
+	if (readl(IMX_CCM_BASE + CCM_RCSR) & (1 << 14))
+		nand_info.width = 2;
+
+	imx25_add_nand(&nand_info);
+
+	devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
+	dev_add_bb_dev("self_raw", "self0");
+
+	devfs_add_partition("nand0", 0x40000, 0x80000, PARTITION_FIXED, "env_raw");
+	dev_add_bb_dev("env_raw", "env0");
+
+	register_device(&sdram0_dev);
+	register_device(&sdram1_dev);
+	register_device(&sram0_dev);
+
+	armlinux_add_dram(&sdram0_dev);
+	armlinux_add_dram(&sdram1_dev);
+	armlinux_set_bootparams((void *)0x80000100);
+	armlinux_set_architecture(MACH_TYPE_TX25);
+	armlinux_set_serial(imx_uid());
+
+	return 0;
+}
+
+device_initcall(tx25_devices_init);
+
+static struct pad_desc tx25_pads[] = {
+	MX25_PAD_D12__GPIO_4_8,
+	MX25_PAD_D10__GPIO_4_10,
+	MX25_PAD_NF_CE0__NF_CE0,
+	MX25_PAD_NFWE_B__NFWE_B,
+	MX25_PAD_NFRE_B__NFRE_B,
+	MX25_PAD_NFALE__NFALE,
+	MX25_PAD_NFCLE__NFCLE,
+	MX25_PAD_NFWP_B__NFWP_B,
+	MX25_PAD_NFRB__NFRB,
+	MX25_PAD_D7__D7,
+	MX25_PAD_D6__D6,
+	MX25_PAD_D5__D5,
+	MX25_PAD_D4__D4,
+	MX25_PAD_D3__D3,
+	MX25_PAD_D2__D2,
+	MX25_PAD_D1__D1,
+	MX25_PAD_D0__D0,
+	MX25_PAD_UART1_TXD__UART1_TXD,
+	MX25_PAD_UART1_RXD__UART1_RXD,
+	MX25_PAD_UART1_CTS__UART1_CTS,
+	MX25_PAD_UART1_RTS__UART1_RTS,
+};
+
+static int tx25_console_init(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(tx25_pads, ARRAY_SIZE(tx25_pads));
+
+	imx25_add_uart0();
+	return 0;
+}
+
+console_initcall(tx25_console_init);
+
+#ifdef CONFIG_NAND_IMX_BOOT
+void __bare_init nand_boot(void)
+{
+	imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
+}
+#endif
+
+static struct pad_desc tx25_lcdc_gpios[] = {
+	MX25_PAD_A18__GPIO_2_4,		/* LCD Reset (active LOW) */
+	MX25_PAD_PWM__GPIO_1_26,	/* LCD Backlight brightness 0: full 1: off */
+	MX25_PAD_A19__GPIO_2_5,		/* LCD Power Enable 0: off 1: on */
+	MX25_PAD_LSCLK__LSCLK,
+	MX25_PAD_LD0__LD0,
+	MX25_PAD_LD1__LD1,
+	MX25_PAD_LD2__LD2,
+	MX25_PAD_LD3__LD3,
+	MX25_PAD_LD4__LD4,
+	MX25_PAD_LD5__LD5,
+	MX25_PAD_LD6__LD6,
+	MX25_PAD_LD7__LD7,
+	MX25_PAD_LD8__LD8,
+	MX25_PAD_LD9__LD9,
+	MX25_PAD_LD10__LD10,
+	MX25_PAD_LD11__LD11,
+	MX25_PAD_LD12__LD12,
+	MX25_PAD_LD13__LD13,
+	MX25_PAD_LD14__LD14,
+	MX25_PAD_LD15__LD15,
+	MX25_PAD_D15__LD16,
+	MX25_PAD_D14__LD17,
+	MX25_PAD_HSYNC__HSYNC,
+	MX25_PAD_VSYNC__VSYNC,
+	MX25_PAD_OE_ACD__OE_ACD,
+};
+
+static struct imx_fb_videomode stk5_fb_mode = {
+	.bpp	= 16,
+	.mode = {
+		.name = "G-ETV570G0DMU",
+		.pixclock	= 33333,
+
+		.xres		= 640,
+		.yres		= 480,
+
+		.hsync_len	= 64,
+		.left_margin	= 96,
+		.right_margin	= 80,
+
+		.vsync_len	= 3,
+		.upper_margin	= 46,
+		.lower_margin	= 39,
+	},
+	.pcr	= PCR_TFT | PCR_COLOR | PCR_FLMPOL | PCR_LPPOL | PCR_SCLK_SEL,
+};
+
+#define STK5_LCD_BACKLIGHT_GPIO		(GPIO_PORTA | 26)
+#define STK5_LCD_RESET_GPIO		(GPIO_PORTB | 4)
+#define STK5_LCD_POWER_GPIO		(GPIO_PORTB | 5)
+
+static void tx25_fb_enable(int enable)
+{
+	if (enable) {
+		gpio_direction_output(STK5_LCD_RESET_GPIO, 1);
+		gpio_direction_output(STK5_LCD_POWER_GPIO, 1);
+		mdelay(300);
+		gpio_direction_output(STK5_LCD_BACKLIGHT_GPIO, 0);
+	} else {
+		gpio_direction_output(STK5_LCD_BACKLIGHT_GPIO, 1);
+		gpio_direction_output(STK5_LCD_RESET_GPIO, 0);
+		gpio_direction_output(STK5_LCD_POWER_GPIO, 0);
+	}
+}
+
+static struct imx_fb_platform_data tx25_fb_data = {
+	.mode		= &stk5_fb_mode,
+	.dmacr		= 0x80040060,
+	.enable		= tx25_fb_enable,
+};
+
+static int tx25_init_fb(void)
+{
+	tx25_fb_enable(0);
+
+	mxc_iomux_v3_setup_multiple_pads(tx25_lcdc_gpios,
+			ARRAY_SIZE(tx25_lcdc_gpios));
+
+	imx25_add_fb(&tx25_fb_data);
+
+	return 0;
+}
+device_initcall(tx25_init_fb);
diff --git a/arch/arm/boards/karo-tx25/config.h b/arch/arm/boards/karo-tx25/config.h
new file mode 100644
index 0000000..f3a7c80
--- /dev/null
+++ b/arch/arm/boards/karo-tx25/config.h
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2011 Sascha Hauer <s.hauer at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Definitions related to passing arguments to kernel.
+ */
+
+#define CONFIG_MX25_HCLK_FREQ	24000000
+
+#endif
+
+/* nothing to do here yet */
diff --git a/arch/arm/boards/karo-tx25/env/bin/init_board b/arch/arm/boards/karo-tx25/env/bin/init_board
new file mode 100644
index 0000000..b17c55d
--- /dev/null
+++ b/arch/arm/boards/karo-tx25/env/bin/init_board
@@ -0,0 +1,6 @@
+
+if [ -e /dev/fb0 -a -e /env/splash.bmp ]; then
+	bmp /env/splash.bmp
+	fb0.enable=1
+fi
+
diff --git a/arch/arm/boards/karo-tx25/env/config b/arch/arm/boards/karo-tx25/env/config
new file mode 100644
index 0000000..e4ff756
--- /dev/null
+++ b/arch/arm/boards/karo-tx25/env/config
@@ -0,0 +1,53 @@
+
+machine=tx25
+baseboard=tx28stk5
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.ethaddr=de:ad:be:ef:00:00
+#eth0.netmask=a.b.c.d
+#eth0.serverip=a.b.c.d
+#eth0.gateway=a.b.c.d
+
+# can be either 'net'
+kernel_loc=net
+# can be either 'net' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-$machine.$rootfs_type
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-$machine
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+	kernelimage="$user"-"$kernelimage"
+	nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
+	rootfsimage="$user"-"$rootfsimage"
+else
+	nfsroot="$eth0.serverip:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+bootargs="console=ttymxc0,115200 tx25_base=$baseboard"
+
+nand_parts="256k(barebox)ro,512k(bareboxenv),2M(kernel),-(root)"
+nand_device=mxc_nand
+rootfs_mtdblock_nand=3
+
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
+
diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c
new file mode 100644
index 0000000..86319d7
--- /dev/null
+++ b/arch/arm/boards/karo-tx25/lowlevel.c
@@ -0,0 +1,173 @@
+/*
+ *
+ * (c) 2011 Pengutronix, Sascha Hauer <s.hauer at pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <init.h>
+#include <mach/imx-regs.h>
+#include <mach/esdctl.h>
+#include <asm/io.h>
+#include <mach/imx-nand.h>
+#include <asm/barebox-arm.h>
+#include <asm/system.h>
+#include <asm-generic/memory_layout.h>
+
+#ifdef CONFIG_NAND_IMX_BOOT
+static void __bare_init __naked insdram(void)
+{
+	uint32_t r;
+
+	/* setup a stack to be able to call imx_nand_load_image() */
+	r = STACK_BASE + STACK_SIZE - 12;
+	__asm__ __volatile__("mov sp, %0" : : "r"(r));
+
+	imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
+
+	board_init_lowlevel_return();
+}
+#endif
+
+static inline void __bare_init  setup_sdram(uint32_t base, uint32_t esdctl,
+		uint32_t esdcfg)
+{
+	uint32_t esdctlreg = ESDCTL0;
+	uint32_t esdcfgreg = ESDCFG0;
+
+	if (base == 0x90000000) {
+		esdctlreg += 8;
+		esdcfgreg += 8;
+	}
+
+	esdctl |= ESDCTL0_SDE;
+
+	writel(esdcfg, esdcfgreg);
+	writel(esdctl | ESDCTL0_SMODE_PRECHARGE, esdctlreg);
+	writel(0, base + 1024);
+	writel(esdctl | ESDCTL0_SMODE_AUTO_REFRESH, esdctlreg);
+	readb(base);
+	readb(base);
+	writel(esdctl | ESDCTL0_SMODE_LOAD_MODE, esdctlreg);
+	writeb(0, base + 0x33);
+	writel(esdctl, esdctlreg);
+}
+
+void __bare_init __naked board_init_lowlevel(void)
+{
+	uint32_t r;
+	int i;
+#ifdef CONFIG_NAND_IMX_BOOT
+	unsigned int *trg, *src;
+#endif
+
+	/* AIPS setup - Only setup MPROTx registers. The PACR default values are good.
+	 * Set all MPROTx to be non-bufferable, trusted for R/W,
+	 * not forced to user-mode.
+	 */
+	writel(0x77777777, 0x43f00000);
+	writel(0x77777777, 0x43f00004);
+	writel(0x77777777, 0x53f00000);
+	writel(0x77777777, 0x53f00004);
+
+	/* MAX (Multi-Layer AHB Crossbar Switch) setup
+	 * MPR - priority for MX25 is (SDHC2/SDMA)>USBOTG>RTIC>IAHB>DAHB
+	 */
+	writel(0x00043210, 0x43f04000);
+	writel(0x00043210, 0x43f04100);
+	writel(0x00043210, 0x43f04200);
+	writel(0x00043210, 0x43f04300);
+	writel(0x00043210, 0x43f04400);
+	/* SGPCR - always park on last master */
+	writel(0x10, 0x43f04010);
+	writel(0x10, 0x43f04110);
+	writel(0x10, 0x43f04210);
+	writel(0x10, 0x43f04310);
+	writel(0x10, 0x43f04410);
+	/* MGPCR - restore default values */
+	writel(0x0, 0x43f04800);
+	writel(0x0, 0x43f04900);
+	writel(0x0, 0x43f04a00);
+	writel(0x0, 0x43f04b00);
+	writel(0x0, 0x43f04c00);
+
+	/* Configure M3IF registers
+	 * M3IF Control Register (M3IFCTL) for MX25
+	 * MRRP[0] = LCDC           on priority list (1 << 0)  = 0x00000001
+	 * MRRP[1] = MAX1       not on priority list (0 << 1)  = 0x00000000
+	 * MRRP[2] = MAX0       not on priority list (0 << 2)  = 0x00000000
+	 * MRRP[3] = USB HOST   not on priority list (0 << 3)  = 0x00000000
+	 * MRRP[4] = SDMA       not on priority list (0 << 4)  = 0x00000000
+	 * MRRP[5] = SD/ATA/FEC not on priority list (0 << 5)  = 0x00000000
+	 * MRRP[6] = SCMFBC     not on priority list (0 << 6)  = 0x00000000
+	 * MRRP[7] = CSI        not on priority list (0 << 7)  = 0x00000000
+	 *                                                       ----------
+	 *                                                       0x00000001
+	 */
+	writel(0x1, 0xb8003000);
+
+	/* configure ARM clk */
+	writel(0x20034000, IMX_CCM_BASE + CCM_CCTL);
+
+	/* enable all the clocks */
+	writel(0x1fffffff, IMX_CCM_BASE + CCM_CGCR0);
+	writel(0xffffffff, IMX_CCM_BASE + CCM_CGCR1);
+	writel(0x000fdfff, IMX_CCM_BASE + CCM_CGCR2);
+
+	/* Skip SDRAM initialization if we run from RAM */
+	r = get_pc();
+	if (r > 0x80000000 && r < 0x90000000)
+		board_init_lowlevel_return();
+
+	/* set to 3.3v SDRAM */
+	writel(0x800, IMX_IOMUXC_BASE + 0x454);
+
+	writel(ESDMISC_RST, ESDMISC);
+
+	while (!(readl(ESDMISC) & (1 << 31)));
+
+#define ESDCTLVAL	(ESDCTL0_ROW13 | ESDCTL0_COL9 |	ESDCTL0_DSIZ_15_0 | \
+			 ESDCTL0_REF4 | ESDCTL0_PWDT_PRECHARGE_PWDN | ESDCTL0_BL)
+#define ESDCFGVAL	(ESDCFGx_tRP_3 | ESDCFGx_tMRD_2 | ESDCFGx_tRAS_6 | \
+			 ESDCFGx_tRRD_2 | ESDCFGx_tCAS_3 | ESDCFGx_tRCD_3 | \
+			 ESDCFGx_tRC_9)
+
+	setup_sdram(0x80000000, ESDCTLVAL, ESDCFGVAL);
+	setup_sdram(0x90000000, ESDCTLVAL, ESDCFGVAL);
+
+#ifdef CONFIG_NAND_IMX_BOOT
+	/* skip NAND boot if not running from NFC space */
+	r = get_pc();
+	if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x800)
+		board_init_lowlevel_return();
+
+	src = (unsigned int *)IMX_NFC_BASE;
+	trg = (unsigned int *)TEXT_BASE;
+
+	/* Move ourselves out of NFC SRAM */
+	for (i = 0; i < 0x800 / sizeof(int); i++)
+		*trg++ = *src++;
+
+	/* Jump to SDRAM */
+	r = (unsigned int)&insdram;
+	__asm__ __volatile__("mov pc, %0" : : "r"(r));
+#else
+	board_init_lowlevel_return();
+#endif
+}
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b8ac89..235f644 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -19,6 +19,7 @@ config ARCH_TEXT_BASE
 	default 0xa7e00000 if MACH_NESO
 	default 0x97f00000 if MACH_MX51_PDK
 	default 0x87f00000 if MACH_GUF_CUPID
+	default 0x93d00000 if MACH_TX25
 
 config BOARDINFO
 	default "Eukrea CPUIMX25" if MACH_EUKREA_CPUIMX25
@@ -36,6 +37,7 @@ config BOARDINFO
 	default "Garz+Fricke Neso" if MACH_NESO
 	default "Freescale i.MX51 PDK" if MACH_FREESCALE_MX51_PDK
 	default "Garz+Fricke Cupid" if MACH_GUF_CUPID
+	default "Ka-Ro tx25" if MACH_TX25
 
 config ARCH_IMX_INTERNAL_BOOT
 	bool "support internal boot mode"
@@ -175,6 +177,13 @@ config MACH_FREESCALE_MX25_3STACK
 	  Say Y here if you are using the Freescale MX25 3stack board equipped
 	  with a Freescale i.MX25 Processor
 
+config MACH_TX25
+	bool "Ka-Ro TX25"
+	select MACH_HAS_LOWLEVEL_INIT
+	select HAVE_MMU
+	help
+	  Say Y here if you are using the Ka-Ro tx25 board
+
 endchoice
 
 endif
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb 17 06:39:28 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 17 Feb 2011 12:39:28 +0100
Subject: [PATCH 1/4] ARM i.MX: sync i.MX25 iomux support with kernel
In-Reply-To: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
References: <1297942771-2289-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1297942771-2289-2-git-send-email-s.hauer@pengutronix.de>

At least partly. We have pads in barebox that we do
not have in the kernel. Also, this with this patch we
do not set the sion bit which the kernel does.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c |   90 +-
 arch/arm/boards/freescale-mx25-3-stack/3stack.c   |   36 +-
 arch/arm/mach-imx/include/mach/iomux-mx25.h       | 1288 +++++++++------------
 arch/arm/mach-imx/include/mach/iomux-mx51.h       |    2 +-
 arch/arm/mach-imx/include/mach/iomux-v3.h         |   37 +-
 5 files changed, 602 insertions(+), 851 deletions(-)

diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
index ce9be97..f2b2523 100644
--- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
+++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
@@ -200,57 +200,57 @@ static void eukrea_cpuimx25_mmu_init(void)
 #endif
 
 static struct pad_desc eukrea_cpuimx25_pads[] = {
-	MX25_PAD_FEC_MDC__MDC,
-	MX25_PAD_FEC_MDIO__MDIO,
-	MX25_PAD_FEC_RDATA0__RDATA0,
-	MX25_PAD_FEC_RDATA1__RDATA1,
-	MX25_PAD_FEC_RX_DV__RX_DV,
-	MX25_PAD_FEC_TDATA0__TDATA0,
-	MX25_PAD_FEC_TDATA1__TDATA1,
-	MX25_PAD_FEC_TX_CLK__TX_CLK,
-	MX25_PAD_FEC_TX_EN__TX_EN,
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
 	/* UART1 */
-	MX25_PAD_UART1_RXD__RXD_MUX,
-	MX25_PAD_UART1_TXD__TXD_MUX,
-	MX25_PAD_UART1_RTS__RTS,
-	MX25_PAD_UART1_CTS__CTS,
+	MX25_PAD_UART1_RXD__UART1_RXD,
+	MX25_PAD_UART1_TXD__UART1_TXD,
+	MX25_PAD_UART1_RTS__UART1_RTS,
+	MX25_PAD_UART1_CTS__UART1_CTS,
 	/* LCDC */
-	MX25_PAD_LD0__LCDC_LD0,
-	MX25_PAD_LD1__LCDC_LD1,
-	MX25_PAD_LD2__LCDC_LD2,
-	MX25_PAD_LD3__LCDC_LD3,
-	MX25_PAD_LD4__LCDC_LD4,
-	MX25_PAD_LD5__LCDC_LD5,
-	MX25_PAD_LD6__LCDC_LD6,
-	MX25_PAD_LD7__LCDC_LD7,
-	MX25_PAD_LD8__LCDC_LD8,
-	MX25_PAD_LD9__LCDC_LD9,
-	MX25_PAD_LD10__LCDC_LD10,
-	MX25_PAD_LD11__LCDC_LD11,
-	MX25_PAD_LD12__LCDC_LD12,
-	MX25_PAD_LD13__LCDC_LD13,
-	MX25_PAD_LD14__LCDC_LD14,
-	MX25_PAD_LD15__LCDC_LD15,
-	MX25_PAD_GPIO_E__LCDC_LD16,
-	MX25_PAD_GPIO_F__LCDC_LD17,
-	MX25_PAD_LSCLK__LCDC_LSCLK,
-	MX25_PAD_OE_ACD__LCDC_OE_ACD,
-	MX25_PAD_VSYNC__LCDC_VSYN,
-	MX25_PAD_HSYNC__LCDC_HSYN,
+	MX25_PAD_LD0__LD0,
+	MX25_PAD_LD1__LD1,
+	MX25_PAD_LD2__LD2,
+	MX25_PAD_LD3__LD3,
+	MX25_PAD_LD4__LD4,
+	MX25_PAD_LD5__LD5,
+	MX25_PAD_LD6__LD6,
+	MX25_PAD_LD7__LD7,
+	MX25_PAD_LD8__LD8,
+	MX25_PAD_LD9__LD9,
+	MX25_PAD_LD10__LD10,
+	MX25_PAD_LD11__LD11,
+	MX25_PAD_LD12__LD12,
+	MX25_PAD_LD13__LD13,
+	MX25_PAD_LD14__LD14,
+	MX25_PAD_LD15__LD15,
+	MX25_PAD_GPIO_E__LD16,
+	MX25_PAD_GPIO_F__LD17,
+	MX25_PAD_LSCLK__LSCLK,
+	MX25_PAD_OE_ACD__OE_ACD,
+	MX25_PAD_VSYNC__VSYNC,
+	MX25_PAD_HSYNC__HSYNC,
 	/* BACKLIGHT CONTROL */
-	MX25_PAD_PWM__GPIO26,
+	MX25_PAD_PWM__GPIO_1_26,
 	/* I2C */
-	MX25_PAD_I2C1_CLK__SCL,
-	MX25_PAD_I2C1_DAT__SDA,
+	MX25_PAD_I2C1_CLK__I2C1_CLK,
+	MX25_PAD_I2C1_DAT__I2C1_DAT,
 	/* SDCard */
-	MX25_PAD_SD1_CLK__CLK,
-	MX25_PAD_SD1_CMD__CMD,
-	MX25_PAD_SD1_DATA0__DAT0,
-	MX25_PAD_SD1_DATA1__DAT1,
-	MX25_PAD_SD1_DATA2__DAT2,
-	MX25_PAD_SD1_DATA3__DAT3,
+	MX25_PAD_SD1_CLK__SD1_CLK,
+	MX25_PAD_SD1_CMD__SD1_CMD,
+	MX25_PAD_SD1_DATA0__SD1_DATA0,
+	MX25_PAD_SD1_DATA1__SD1_DATA1,
+	MX25_PAD_SD1_DATA2__SD1_DATA2,
+	MX25_PAD_SD1_DATA3__SD1_DATA3,
 	/* LED */
-	MX25_PAD_POWER_FAIL__GPIO19,
+	MX25_PAD_POWER_FAIL__GPIO_3_19,
 };
 
 static int eukrea_cpuimx25_devices_init(void)
diff --git a/arch/arm/boards/freescale-mx25-3-stack/3stack.c b/arch/arm/boards/freescale-mx25-3-stack/3stack.c
index 49b7f5c..e3607f5 100644
--- a/arch/arm/boards/freescale-mx25-3-stack/3stack.c
+++ b/arch/arm/boards/freescale-mx25-3-stack/3stack.c
@@ -270,23 +270,23 @@ static int imx25_devices_init(void)
 device_initcall(imx25_devices_init);
 
 static struct pad_desc imx25_pads[] = {
-	MX25_PAD_FEC_MDC__MDC,
-	MX25_PAD_FEC_MDIO__MDIO,
-	MX25_PAD_FEC_RDATA0__RDATA0,
-	MX25_PAD_FEC_RDATA1__RDATA1,
-	MX25_PAD_FEC_RX_DV__RX_DV,
-	MX25_PAD_FEC_TDATA0__TDATA0,
-	MX25_PAD_FEC_TDATA1__TDATA1,
-	MX25_PAD_FEC_TX_CLK__TX_CLK,
-	MX25_PAD_FEC_TX_EN__TX_EN,
-	MX25_PAD_POWER_FAIL__POWER_FAIL_INT,
-	MX25_PAD_A17__GPIO3,
-	MX25_PAD_D12__GPIO8,
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
+	MX25_PAD_POWER_FAIL__POWER_FAIL,
+	MX25_PAD_A17__GPIO_2_3,
+	MX25_PAD_D12__GPIO_4_8,
 	/* UART1 */
-	MX25_PAD_UART1_RXD__RXD_MUX,
-	MX25_PAD_UART1_TXD__TXD_MUX,
-	MX25_PAD_UART1_RTS__RTS,
-	MX25_PAD_UART1_CTS__CTS,
+	MX25_PAD_UART1_RXD__UART1_RXD,
+	MX25_PAD_UART1_TXD__UART1_TXD,
+	MX25_PAD_UART1_RTS__UART1_RTS,
+	MX25_PAD_UART1_CTS__UART1_CTS,
 	/* USBH2 */
 	MX25_PAD_D9__USBH2_PWR,
 	MX25_PAD_D8__USBH2_OC,
@@ -303,8 +303,8 @@ static struct pad_desc imx25_pads[] = {
 	MX25_PAD_LSCLK__USBH2_DATA6,
 	MX25_PAD_OE_ACD__USBH2_DATA7,
 	/* i2c */
-	MX25_PAD_I2C1_CLK__SCL,
-	MX25_PAD_I2C1_DAT__SDA,
+	MX25_PAD_I2C1_CLK__I2C1_CLK,
+	MX25_PAD_I2C1_DAT__I2C1_DAT,
 };
 
 static int imx25_console_init(void)
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx25.h b/arch/arm/mach-imx/include/mach/iomux-mx25.h
index a8ca8f1..e636c7f 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx25.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx25.h
@@ -1,773 +1,529 @@
+/*
+ * arch/arm/plat-mxc/include/mach/iomux-mx25.h
+ *
+ * Copyright (C) 2009 by Lothar Wassmann <LW at KARO-electronics.de>
+ *
+ * based on arch/arm/mach-mx25/mx25_pins.h
+ *    Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ * and
+ * arch/arm/plat-mxc/include/mach/iomux-mx35.h
+ *    Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux at phytec.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
 #ifndef __MACH_IOMUX_MX25_H__
 #define __MACH_IOMUX_MX25_H__
 
 #include <mach/iomux-v3.h>
 
-#define SRE		(1 << 0)
-#define DSE_STD		(0 << 1)
-#define DSE_HIGH	(1 << 1)
-#define DSE_MAX		(2 << 1)
-#define ODE		(1 << 3)
-#define PUS_100K_DOWN	(0 << 4)
-#define PUS_47K_UP	(1 << 4)
-#define PUS_100K_UP	(2 << 4)
-#define PUS_22K_UP	(3 << 4)
-#define PUE		(1 << 6)
-#define PKE		(1 << 7)
-#define HYS		(1 << 8)
-#define DVS		(1 << 13)
-
-#define MX25_PAD_A10__EIM_DA_H10                           IOMUX_PAD(0x000,   0x8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A10__GPIO0                                IOMUX_PAD(0x000,   0x8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A13__EIM_DA_H13                           IOMUX_PAD(0x22c,   0xc, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A13__GPIO1                                IOMUX_PAD(0x22c,   0xc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A13__LCDC_CLS                             IOMUX_PAD(0x22c,   0xc, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A14__EIM_DA_H214                          IOMUX_PAD(0x230,  0x10, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A14__GPIO0                                IOMUX_PAD(0x230,  0x10, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A14__CLK1                                 IOMUX_PAD(0x230,  0x10, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A14__LCDC_SPL                             IOMUX_PAD(0x230,  0x10, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A15__EIM_DA_H215                          IOMUX_PAD(0x234,  0x14, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A15__GPIO1                                IOMUX_PAD(0x234,  0x14, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A15__RST1                                 IOMUX_PAD(0x234,  0x14, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A15__LCDC_PS                              IOMUX_PAD(0x234,  0x14, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A16__EIM_A16                              IOMUX_PAD(0x000,  0x18, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A16__GPIO2                                IOMUX_PAD(0x000,  0x18, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A16__VEN1                                 IOMUX_PAD(0x000,  0x18, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A16__LCDC_REV                             IOMUX_PAD(0x000,  0x18, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A17__EIM_A17                              IOMUX_PAD(0x238,  0x1c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A17__GPIO3                                IOMUX_PAD(0x238,  0x1c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A17__TX1                                  IOMUX_PAD(0x238,  0x1c, 6, 0x554, 0, NO_PAD_CTRL)
-#define MX25_PAD_A17__TX_ERR                               IOMUX_PAD(0x238,  0x1c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A18__EIM_A18                              IOMUX_PAD(0x23c,  0x20, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A18__GPIO4                                IOMUX_PAD(0x23c,  0x20, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A18__PD1                                  IOMUX_PAD(0x23c,  0x20, 6, 0x550, 0, NO_PAD_CTRL)
-#define MX25_PAD_A18__COL                                  IOMUX_PAD(0x23c,  0x20, 7, 0x504, 0, NO_PAD_CTRL)
-#define MX25_PAD_A19__EIM_A19                              IOMUX_PAD(0x240,  0x24, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A19__GPIO5                                IOMUX_PAD(0x240,  0x24, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A19__RX1                                  IOMUX_PAD(0x240,  0x24, 6, 0x54c, 0, NO_PAD_CTRL)
-#define MX25_PAD_A19__RX_ERR                               IOMUX_PAD(0x240,  0x24, 7, 0x518, 0, NO_PAD_CTRL)
-#define MX25_PAD_A20__EIM_A20                              IOMUX_PAD(0x244,  0x28, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A20__GPIO6                                IOMUX_PAD(0x244,  0x28, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A20__CLK1                                 IOMUX_PAD(0x244,  0x28, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A20__RDATA2                               IOMUX_PAD(0x244,  0x28, 7, 0x50c, 0, NO_PAD_CTRL)
-#define MX25_PAD_A21__EIM_A21                              IOMUX_PAD(0x248,  0x2c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A21__GPIO7                                IOMUX_PAD(0x248,  0x2c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A21__RST1                                 IOMUX_PAD(0x248,  0x2c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A21__RDATA3                               IOMUX_PAD(0x248,  0x2c, 7, 0x510, 0, NO_PAD_CTRL)
-#define MX25_PAD_A22__EIM_A22                              IOMUX_PAD(0x000,  0x30, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A22__GPIO8                                IOMUX_PAD(0x000,  0x30, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A22__VEN1                                 IOMUX_PAD(0x000,  0x30, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A22__TDATA2                               IOMUX_PAD(0x000,  0x30, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A23__EIM_A23                              IOMUX_PAD(0x24c,  0x34, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A23__GPIO9                                IOMUX_PAD(0x24c,  0x34, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A23__TX1                                  IOMUX_PAD(0x24c,  0x34, 6, 0x560, 0, NO_PAD_CTRL)
-#define MX25_PAD_A23__TDATA3                               IOMUX_PAD(0x24c,  0x34, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A24__EIM_A24                              IOMUX_PAD(0x250,  0x38, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A24__GPIO10                               IOMUX_PAD(0x250,  0x38, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A24__PD1                                  IOMUX_PAD(0x250,  0x38, 6, 0x55c, 0, NO_PAD_CTRL)
-#define MX25_PAD_A24__RX_CLK                               IOMUX_PAD(0x250,  0x38, 7, 0x514, 0, NO_PAD_CTRL)
-#define MX25_PAD_A25__EIM_A25                              IOMUX_PAD(0x254,  0x3c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A25__GPIO11                               IOMUX_PAD(0x254,  0x3c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A25__RX1                                  IOMUX_PAD(0x254,  0x3c, 6, 0x558, 0, NO_PAD_CTRL)
-#define MX25_PAD_A25__CRS                                  IOMUX_PAD(0x254,  0x3c, 7, 0x508, 0, NO_PAD_CTRL)
-#define MX25_PAD_BCLK__EIM_BCLK                            IOMUX_PAD(0x000,  0x68, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_BCLK__GPIO4                               IOMUX_PAD(0x000,  0x68, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_BOOT_MODE0__BOOT_MODE0                    IOMUX_PAD(0x000, 0x224, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_BOOT_MODE0__GPIO30                        IOMUX_PAD(0x000, 0x224, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_BOOT_MODE1__BOOT_MODE1                    IOMUX_PAD(0x000, 0x228, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_BOOT_MODE1__GPIO31                        IOMUX_PAD(0x000, 0x228, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CLKO__CLKO                                IOMUX_PAD(0x414, 0x220, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CLKO__GPIO21                              IOMUX_PAD(0x414, 0x220, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__LCDC_CONTRAST                   IOMUX_PAD(0x310, 0x118, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__CAPIN1                          IOMUX_PAD(0x310, 0x118, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__SS1                             IOMUX_PAD(0x310, 0x118, 2, 0x4a8, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__DA_2                            IOMUX_PAD(0x310, 0x118, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__PWMO                            IOMUX_PAD(0x310, 0x118, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__CRS                             IOMUX_PAD(0x310, 0x118, 5, 0x508, 1, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__USBH2_PWR                       IOMUX_PAD(0x310, 0x118, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__WDOG_B                          IOMUX_PAD(0x310, 0x118, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS0__EIM_CS0                              IOMUX_PAD(0x000,  0x4c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS0__GPIO2                                IOMUX_PAD(0x000,  0x4c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS1__EIM_CS1                              IOMUX_PAD(0x000,  0x50, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS1__NANDF_CE3                            IOMUX_PAD(0x000,  0x50, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS1__GPIO3                                IOMUX_PAD(0x000,  0x50, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS4__EIM_CS4                              IOMUX_PAD(0x264,  0x54, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS4__NANDF_CE1                            IOMUX_PAD(0x264,  0x54, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS4__CTS                                  IOMUX_PAD(0x264,  0x54, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS4__AUD4_RXC                             IOMUX_PAD(0x264,  0x54, 4, 0x468, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS4__GPIO20                               IOMUX_PAD(0x264,  0x54, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS4__MOSI                                 IOMUX_PAD(0x264,  0x54, 6, 0x4b8, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS4__TRSYNC                               IOMUX_PAD(0x264,  0x54, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__EIM_CS5                              IOMUX_PAD(0x268,  0x58, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__NANDF_CE2                            IOMUX_PAD(0x268,  0x58, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__DTACK_B                              IOMUX_PAD(0x268,  0x58, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__RTS                                  IOMUX_PAD(0x268,  0x58, 3, 0x574, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__AUD4_RXFS                            IOMUX_PAD(0x268,  0x58, 4, 0x46c, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__GPIO21                               IOMUX_PAD(0x268,  0x58, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__MISO                                 IOMUX_PAD(0x268,  0x58, 6, 0x4b4, 0, NO_PAD_CTRL)
-#define MX25_PAD_CS5__TRCLK                                IOMUX_PAD(0x268,  0x58, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__CSI_D2                            IOMUX_PAD(0x318, 0x120, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__RXD_MUX                           IOMUX_PAD(0x318, 0x120, 1, 0x578, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__DAT4                              IOMUX_PAD(0x318, 0x120, 2, 0x4f4, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__SCKR                              IOMUX_PAD(0x318, 0x120, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__CLK0                              IOMUX_PAD(0x318, 0x120, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__GPIO27                            IOMUX_PAD(0x318, 0x120, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__MOSI                              IOMUX_PAD(0x318, 0x120, 7, 0x4b8, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D2__USBOTG_DATA0                      IOMUX_PAD(0x318, 0x120, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__CSI_D3                            IOMUX_PAD(0x31c, 0x124, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__TXD_MUX                           IOMUX_PAD(0x31c, 0x124, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__DAT5                              IOMUX_PAD(0x31c, 0x124, 2, 0x4f8, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__FSR                               IOMUX_PAD(0x31c, 0x124, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__RST0                              IOMUX_PAD(0x31c, 0x124, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__GPIO28                            IOMUX_PAD(0x31c, 0x124, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__MISO                              IOMUX_PAD(0x31c, 0x124, 7, 0x4b4, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D3__USBOTG_DATA1                      IOMUX_PAD(0x31c, 0x124, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__CSI_D4                            IOMUX_PAD(0x320, 0x128, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__RTS                               IOMUX_PAD(0x320, 0x128, 1, 0x574, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__DAT6                              IOMUX_PAD(0x320, 0x128, 2, 0x4fc, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__HCKR                              IOMUX_PAD(0x320, 0x128, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__VEN0                              IOMUX_PAD(0x320, 0x128, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__GPIO29                            IOMUX_PAD(0x320, 0x128, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__USBOTG_DATA2                      IOMUX_PAD(0x320, 0x128, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D4__SCLK                              IOMUX_PAD(0x320, 0x128, 7, 0x4ac, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__CSI_D5                            IOMUX_PAD(0x324, 0x12c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__CTS                               IOMUX_PAD(0x324, 0x12c, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__DAT7                              IOMUX_PAD(0x324, 0x12c, 2, 0x500, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__SCKT                              IOMUX_PAD(0x324, 0x12c, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__TX0                               IOMUX_PAD(0x324, 0x12c, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__GPIO30                            IOMUX_PAD(0x324, 0x12c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__USBOTG_DATA3                      IOMUX_PAD(0x324, 0x12c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D5__RDY                               IOMUX_PAD(0x324, 0x12c, 7, 0x4b0, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__CSI_D6                            IOMUX_PAD(0x328, 0x130, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__ROW6                              IOMUX_PAD(0x328, 0x130, 1, 0x544, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__CMD                               IOMUX_PAD(0x328, 0x130, 2, 0x4e0, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__FST                               IOMUX_PAD(0x328, 0x130, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__PD0                               IOMUX_PAD(0x328, 0x130, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__GPIO31                            IOMUX_PAD(0x328, 0x130, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__USBOTG_DATA4                      IOMUX_PAD(0x328, 0x130, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D6__SS0                               IOMUX_PAD(0x328, 0x130, 7, 0x4bc, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__CSI_D7                            IOMUX_PAD(0x32c, 0x134, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__ROW7                              IOMUX_PAD(0x32c, 0x134, 1, 0x548, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__CLK                               IOMUX_PAD(0x32c, 0x134, 2, 0x4dc, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__HCKT                              IOMUX_PAD(0x32c, 0x134, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__RX0                               IOMUX_PAD(0x32c, 0x134, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__GPIO6                             IOMUX_PAD(0x32c, 0x134, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__USBOTG_DATA5                      IOMUX_PAD(0x32c, 0x134, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D7__SS1                               IOMUX_PAD(0x32c, 0x134, 7, 0x4c0, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__CSI_D8                            IOMUX_PAD(0x330, 0x138, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__COL6                              IOMUX_PAD(0x330, 0x138, 1, 0x534, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__AUD6_RXC                          IOMUX_PAD(0x330, 0x138, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__TX5_RX0                           IOMUX_PAD(0x330, 0x138, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__CLK0                              IOMUX_PAD(0x330, 0x138, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__GPIO7                             IOMUX_PAD(0x330, 0x138, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__USBOTG_DATA6                      IOMUX_PAD(0x330, 0x138, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D8__SS2                               IOMUX_PAD(0x330, 0x138, 7, 0x4c4, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__CSI_D9                            IOMUX_PAD(0x334, 0x13c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__COL7                              IOMUX_PAD(0x334, 0x13c, 1, 0x538, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__AUD6_RXFS                         IOMUX_PAD(0x334, 0x13c, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__TX4_RX1                           IOMUX_PAD(0x334, 0x13c, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__RST0                              IOMUX_PAD(0x334, 0x13c, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__GPIO21                            IOMUX_PAD(0x334, 0x13c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__USBOTG_DATA7                      IOMUX_PAD(0x334, 0x13c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_D9__SS3                               IOMUX_PAD(0x334, 0x13c, 7, 0x4c8, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__CSI_HSYNC                      IOMUX_PAD(0x340, 0x148, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__AUD6_TXC                       IOMUX_PAD(0x340, 0x148, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__DAT2                           IOMUX_PAD(0x340, 0x148, 2, 0x4ec, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__TX1                            IOMUX_PAD(0x340, 0x148, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__PD0                            IOMUX_PAD(0x340, 0x148, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__GPIO10                         IOMUX_PAD(0x340, 0x148, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__USBOTG_NXT                     IOMUX_PAD(0x340, 0x148, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_HSYNC__BT_RES2                        IOMUX_PAD(0x340, 0x148, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__CSI_MCLK                        IOMUX_PAD(0x338, 0x140, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__AUD6_TXD                        IOMUX_PAD(0x338, 0x140, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__DAT0                            IOMUX_PAD(0x338, 0x140, 2, 0x4e4, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__TX3_RX2                         IOMUX_PAD(0x338, 0x140, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__VEN0                            IOMUX_PAD(0x338, 0x140, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__GPIO8                           IOMUX_PAD(0x338, 0x140, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__USBOTG_DIR                      IOMUX_PAD(0x338, 0x140, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_MCLK__BT_RES0                         IOMUX_PAD(0x338, 0x140, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__CSI_PIXCLK                    IOMUX_PAD(0x344, 0x14c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__AUD6_TXFS                     IOMUX_PAD(0x344, 0x14c, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__DAT3                          IOMUX_PAD(0x344, 0x14c, 2, 0x4f0, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__TX0                           IOMUX_PAD(0x344, 0x14c, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__RX0                           IOMUX_PAD(0x344, 0x14c, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__GPIO11                        IOMUX_PAD(0x344, 0x14c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__USBOTG_CLK                    IOMUX_PAD(0x344, 0x14c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_PIXCLK__BT_RES3                       IOMUX_PAD(0x344, 0x14c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__CSI_VSYNC                      IOMUX_PAD(0x33c, 0x144, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__AUD6_RXD                       IOMUX_PAD(0x33c, 0x144, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__DAT1                           IOMUX_PAD(0x33c, 0x144, 2, 0x4e8, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__TX2_RX3                        IOMUX_PAD(0x33c, 0x144, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__TX0                            IOMUX_PAD(0x33c, 0x144, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__GPIO9                          IOMUX_PAD(0x33c, 0x144, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__USBOTG_STP                     IOMUX_PAD(0x33c, 0x144, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSI_VSYNC__BT_RES1                        IOMUX_PAD(0x33c, 0x144, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MISO__MISO                          IOMUX_PAD(0x354, 0x15c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MISO__TXD_MUX                       IOMUX_PAD(0x354, 0x15c, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MISO__SDMA_DBG_EVT_1                IOMUX_PAD(0x354, 0x15c, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MISO__GPIO15                        IOMUX_PAD(0x354, 0x15c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MISO__SLCDC_DATA13                  IOMUX_PAD(0x354, 0x15c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MISO__TRACE5                        IOMUX_PAD(0x354, 0x15c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MOSI__MOSI                          IOMUX_PAD(0x350, 0x158, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MOSI__RXD_MUX                       IOMUX_PAD(0x350, 0x158, 2, 0x568, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MOSI__SDMA_DBG_EVT_0                IOMUX_PAD(0x350, 0x158, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MOSI__GPIO14                        IOMUX_PAD(0x350, 0x158, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MOSI__SLCDC_DATA12                  IOMUX_PAD(0x350, 0x158, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_MOSI__TRACE4                        IOMUX_PAD(0x350, 0x158, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_RDY__RDY                            IOMUX_PAD(0x364, 0x16c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_RDY__SDMA_DBG_EVT_5                 IOMUX_PAD(0x364, 0x16c, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_RDY__GPIO22                         IOMUX_PAD(0x364, 0x16c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_RDY__SLCDC_DATA15                   IOMUX_PAD(0x364, 0x16c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_RDY__TRACE9                         IOMUX_PAD(0x364, 0x16c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SCLK__SCLK                          IOMUX_PAD(0x360, 0x168, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SCLK__CTS                           IOMUX_PAD(0x360, 0x168, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SCLK__SDMA_DBG_EVT_4                IOMUX_PAD(0x360, 0x168, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SCLK__GPIO18                        IOMUX_PAD(0x360, 0x168, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SCLK__SLCDC_DATA14                  IOMUX_PAD(0x360, 0x168, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SCLK__TRACE8                        IOMUX_PAD(0x360, 0x168, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS0__SS0                            IOMUX_PAD(0x358, 0x160, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS0__LCDC_LD16                      IOMUX_PAD(0x358, 0x160, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS0__PWMO                           IOMUX_PAD(0x358, 0x160, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS0__SDMA_DBG_EVT_2                 IOMUX_PAD(0x358, 0x160, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS0__GPIO16                         IOMUX_PAD(0x358, 0x160, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS0__SLCDC_CS                       IOMUX_PAD(0x358, 0x160, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS0__TRACE6                         IOMUX_PAD(0x358, 0x160, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS1__SS1                            IOMUX_PAD(0x35c, 0x164, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS1__SDA                            IOMUX_PAD(0x35c, 0x164, 1, 0x528, 1, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS1__RTS                            IOMUX_PAD(0x35c, 0x164, 2, 0x564, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS1__SDMA_DBG_EVT_3                 IOMUX_PAD(0x35c, 0x164, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS1__GPIO17                         IOMUX_PAD(0x35c, 0x164, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS1__SLCDC_RS                       IOMUX_PAD(0x35c, 0x164, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CSPI1_SS1__TRACE7                         IOMUX_PAD(0x35c, 0x164, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D0__EIM_D0                                IOMUX_PAD(0x2bc,  0xc4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D0__GPIO20                                IOMUX_PAD(0x2bc,  0xc4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D10__EIM_D10                              IOMUX_PAD(0x294,  0x9c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D10__LCDC_LD21                            IOMUX_PAD(0x294,  0x9c, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D10__GPIO10                               IOMUX_PAD(0x294,  0x9c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D10__USBOTG_OC                            IOMUX_PAD(0x294,  0x9c, 6, 0x57c, 0, NO_PAD_CTRL)
-#define MX25_PAD_D11__EIM_D11                              IOMUX_PAD(0x290,  0x98, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D11__LCDC_LD20                            IOMUX_PAD(0x290,  0x98, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D11__GPIO9                                IOMUX_PAD(0x290,  0x98, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D11__USBOTG_PWR                           IOMUX_PAD(0x290,  0x98, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D12__EIM_D12                              IOMUX_PAD(0x28c,  0x94, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D12__GPIO8                                IOMUX_PAD(0x28c,  0x94, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D12__DAT4                                 IOMUX_PAD(0x28c,  0x94, 6, 0x4cc, 0, NO_PAD_CTRL)
-#define MX25_PAD_D12__LCDC_LD19                            IOMUX_PAD(0x28c,  0x94, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D13__EIM_D13                              IOMUX_PAD(0x288,  0x90, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D13__LCDC_LD18                            IOMUX_PAD(0x288,  0x90, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D13__GPIO7                                IOMUX_PAD(0x288,  0x90, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D13__DAT5                                 IOMUX_PAD(0x288,  0x90, 6, 0x4d0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D14__EIM_D14                              IOMUX_PAD(0x284,  0x8c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D14__LCDC_LD17                            IOMUX_PAD(0x284,  0x8c, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D14__GPIO6                                IOMUX_PAD(0x284,  0x8c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D14__DAT6                                 IOMUX_PAD(0x284,  0x8c, 6, 0x4d4, 0, NO_PAD_CTRL)
-#define MX25_PAD_D15__EIM_D15                              IOMUX_PAD(0x280,  0x88, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D15__LCDC_LD16                            IOMUX_PAD(0x280,  0x88, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D15__GPIO5                                IOMUX_PAD(0x280,  0x88, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D15__DAT7                                 IOMUX_PAD(0x280,  0x88, 6, 0x4d8, 0, NO_PAD_CTRL)
-#define MX25_PAD_D1__EIM_D1                                IOMUX_PAD(0x2b8,  0xc0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D1__GPIO19                                IOMUX_PAD(0x2b8,  0xc0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D2__EIM_D2                                IOMUX_PAD(0x2b4,  0xbc, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D2__GPIO18                                IOMUX_PAD(0x2b4,  0xbc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D3__EIM_D3                                IOMUX_PAD(0x2b0,  0xb8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D3__GPIO17                                IOMUX_PAD(0x2b0,  0xb8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D4__EIM_D4                                IOMUX_PAD(0x2ac,  0xb4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D4__GPIO16                                IOMUX_PAD(0x2ac,  0xb4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D5__EIM_D5                                IOMUX_PAD(0x2a8,  0xb0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D5__GPIO15                                IOMUX_PAD(0x2a8,  0xb0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D6__EIM_D6                                IOMUX_PAD(0x2a4,  0xac, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D6__GPIO14                                IOMUX_PAD(0x2a4,  0xac, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D7__EIM_D7                                IOMUX_PAD(0x2a0,  0xa8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D7__GPIO13                                IOMUX_PAD(0x2a0,  0xa8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D8__EIM_D8                                IOMUX_PAD(0x29c,  0xa4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D8__LCDC_LD23                             IOMUX_PAD(0x29c,  0xa4, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D8__GPIO12                                IOMUX_PAD(0x29c,  0xa4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D8__USBH2_OC                              IOMUX_PAD(0x29c,  0xa4, 6, 0x580, 0, 0x1c0)
-#define MX25_PAD_D9__EIM_D9                                IOMUX_PAD(0x298,  0xa0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D9__LCDC_LD22                             IOMUX_PAD(0x298,  0xa0, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D9__GPIO11                                IOMUX_PAD(0x298,  0xa0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_D9__USBH2_PWR                             IOMUX_PAD(0x298,  0xa0, 6,     0, 0, 0x60)
-#define MX25_PAD_DE_B__DE_B                                IOMUX_PAD(0x3ec, 0x1f0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_DE_B__GPIO20                              IOMUX_PAD(0x3ec, 0x1f0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB0__EIM_EB0_B                            IOMUX_PAD(0x258,  0x40, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB0__AUD4_TXD                             IOMUX_PAD(0x258,  0x40, 4, 0x464, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB0__GPIO12                               IOMUX_PAD(0x258,  0x40, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB0__SS0                                  IOMUX_PAD(0x258,  0x40, 6, 0x4bc, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB1__EIM_EB1_B                            IOMUX_PAD(0x25c,  0x44, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB1__AUD4_RXD                             IOMUX_PAD(0x25c,  0x44, 4, 0x460, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB1__GPIO13                               IOMUX_PAD(0x25c,  0x44, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_EB1__SS1                                  IOMUX_PAD(0x25c,  0x44, 6, 0x4c0, 0, NO_PAD_CTRL)
-#define MX25_PAD_ECB__EIM_ECB                              IOMUX_PAD(0x270,  0x60, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_ECB__TXD_MUX                              IOMUX_PAD(0x270,  0x60, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_ECB__GPIO23                               IOMUX_PAD(0x270,  0x60, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_ECB__SCLK                                 IOMUX_PAD(0x270,  0x60, 6, 0x4ac, 0, NO_PAD_CTRL)
-#define MX25_PAD_EXT_ARMCLK__EXT_ARMCLK                    IOMUX_PAD(0x000, 0x20c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_EXT_ARMCLK__GPIO15                        IOMUX_PAD(0x000, 0x20c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDC__MDC                              IOMUX_PAD(0x3c0, 0x1c8, 0,     0, 0, PUE)
-#define MX25_PAD_FEC_MDC__CMD                              IOMUX_PAD(0x3c0, 0x1c8, 1, 0x4e0, 2, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDC__AUD4_TXD                         IOMUX_PAD(0x3c0, 0x1c8, 2, 0x464, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDC__DIOR                             IOMUX_PAD(0x3c0, 0x1c8, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDC__GPIO5                            IOMUX_PAD(0x3c0, 0x1c8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDC__SDMA_DBG_PC_8                    IOMUX_PAD(0x3c0, 0x1c8, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDC__LCDC_LD16                        IOMUX_PAD(0x3c0, 0x1c8, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDIO__MDIO                            IOMUX_PAD(0x3c4, 0x1cc, 0,     0, 0, (HYS | PKE | PUE | PUS_22K_UP))
-#define MX25_PAD_FEC_MDIO__CLK                             IOMUX_PAD(0x3c4, 0x1cc, 1, 0x4dc, 2, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDIO__AUD4_RXD                        IOMUX_PAD(0x3c4, 0x1cc, 2, 0x460, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDIO__DIOW                            IOMUX_PAD(0x3c4, 0x1cc, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDIO__GPIO6                           IOMUX_PAD(0x3c4, 0x1cc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDIO__SDMA_DBG_PC_9                   IOMUX_PAD(0x3c4, 0x1cc, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_MDIO__LCDC_LD17                       IOMUX_PAD(0x3c4, 0x1cc, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA0__RDATA0                        IOMUX_PAD(0x3d4, 0x1dc, 0,     0, 0, (HYS | PKE | PUE))
-#define MX25_PAD_FEC_RDATA0__DAT3                          IOMUX_PAD(0x3d4, 0x1dc, 1, 0x4f0, 2, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA0__AUD4_RXFS                     IOMUX_PAD(0x3d4, 0x1dc, 2, 0x46c, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA0__INTRQ                         IOMUX_PAD(0x3d4, 0x1dc, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA0__RXCAN                         IOMUX_PAD(0x3d4, 0x1dc, 4, 0x480, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA0__GPIO10                        IOMUX_PAD(0x3d4, 0x1dc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA0__ROW5                          IOMUX_PAD(0x3d4, 0x1dc, 6, 0x540, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA0__LCDC_LD21                     IOMUX_PAD(0x3d4, 0x1dc, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA1__RDATA1                        IOMUX_PAD(0x3d8, 0x1e0, 0,     0, 0, (HYS | PKE | PUE))
-#define MX25_PAD_FEC_RDATA1__SCL                           IOMUX_PAD(0x3d8, 0x1e0, 1, 0x51c, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA1__DAT4                          IOMUX_PAD(0x3d8, 0x1e0, 2, 0x4f4, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA1__CS0                           IOMUX_PAD(0x3d8, 0x1e0, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA1__TXCAN                         IOMUX_PAD(0x3d8, 0x1e0, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA1__GPIO11                        IOMUX_PAD(0x3d8, 0x1e0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA1__COL4                          IOMUX_PAD(0x3d8, 0x1e0, 6, 0x52c, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RDATA1__LCDC_LD22                     IOMUX_PAD(0x3d8, 0x1e0, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RX_DV__RX_DV                          IOMUX_PAD(0x3dc, 0x1e4, 0,     0, 0, (HYS | PKE | PUE))
-#define MX25_PAD_FEC_RX_DV__SDA                            IOMUX_PAD(0x3dc, 0x1e4, 1, 0x520, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RX_DV__DAT5                           IOMUX_PAD(0x3dc, 0x1e4, 2, 0x4f8, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RX_DV__CS1                            IOMUX_PAD(0x3dc, 0x1e4, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RX_DV__RXCAN                          IOMUX_PAD(0x3dc, 0x1e4, 4, 0x484, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RX_DV__GPIO12                         IOMUX_PAD(0x3dc, 0x1e4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RX_DV__COL5                           IOMUX_PAD(0x3dc, 0x1e4, 6, 0x530, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_RX_DV__LCDC_LD23                      IOMUX_PAD(0x3dc, 0x1e4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA0__TDATA0                        IOMUX_PAD(0x3c8, 0x1d0, 0,     0, 0, PUE)
-#define MX25_PAD_FEC_TDATA0__DAT0                          IOMUX_PAD(0x3c8, 0x1d0, 1, 0x4e4, 2, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA0__AUD4_TXC                      IOMUX_PAD(0x3c8, 0x1d0, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA0__DMACK                         IOMUX_PAD(0x3c8, 0x1d0, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA0__GPIO7                         IOMUX_PAD(0x3c8, 0x1d0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA0__SDMA_DBG_PC_10                IOMUX_PAD(0x3c8, 0x1d0, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA0__LCDC_LD18                     IOMUX_PAD(0x3c8, 0x1d0, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA1__TDATA1                        IOMUX_PAD(0x3cc, 0x1d4, 0,     0, 0, PUE)
-#define MX25_PAD_FEC_TDATA1__DAT1                          IOMUX_PAD(0x3cc, 0x1d4, 1, 0x4e8, 2, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA1__AUD4_TXFS                     IOMUX_PAD(0x3cc, 0x1d4, 2, 0x474, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA1__RESET_B                       IOMUX_PAD(0x3cc, 0x1d4, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA1__GPIO8                         IOMUX_PAD(0x3cc, 0x1d4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA1__SDMA_DBG_PC_11                IOMUX_PAD(0x3cc, 0x1d4, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TDATA1__LCDC_LD19                     IOMUX_PAD(0x3cc, 0x1d4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_CLK__TX_CLK                        IOMUX_PAD(0x3e0, 0x1e8, 0,     0, 0, (HYS | PKE | PUE))
-#define MX25_PAD_FEC_TX_CLK__PWMO                          IOMUX_PAD(0x3e0, 0x1e8, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_CLK__DAT6                          IOMUX_PAD(0x3e0, 0x1e8, 2, 0x4fc, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_CLK__LCDC_LD16                     IOMUX_PAD(0x3e0, 0x1e8, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_CLK__GPIO13                        IOMUX_PAD(0x3e0, 0x1e8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_CLK__SDMA_DBG_PC_12                IOMUX_PAD(0x3e0, 0x1e8, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_CLK__M3IF_CHOSEN_MASTER_0          IOMUX_PAD(0x3e0, 0x1e8, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_EN__TX_EN                          IOMUX_PAD(0x3d0, 0x1d8, 0,     0, 0, PUE)
-#define MX25_PAD_FEC_TX_EN__DAT2                           IOMUX_PAD(0x3d0, 0x1d8, 1, 0x4ec, 2, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_EN__AUD4_RXC                       IOMUX_PAD(0x3d0, 0x1d8, 2, 0x468, 1, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_EN__IORDY                          IOMUX_PAD(0x3d0, 0x1d8, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_EN__TXCAN                          IOMUX_PAD(0x3d0, 0x1d8, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_EN__GPIO9                          IOMUX_PAD(0x3d0, 0x1d8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_EN__ROW4                           IOMUX_PAD(0x3d0, 0x1d8, 6, 0x53c, 0, NO_PAD_CTRL)
-#define MX25_PAD_FEC_TX_EN__LCDC_LD20                      IOMUX_PAD(0x3d0, 0x1d8, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_A__GPIO0                             IOMUX_PAD(0x3f0, 0x1f4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_A__PWMO                              IOMUX_PAD(0x3f0, 0x1f4, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_A__USBOTG_PWR                        IOMUX_PAD(0x3f0, 0x1f4, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_A__ROW4                              IOMUX_PAD(0x3f0, 0x1f4, 3, 0x53c, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_A__SCL                               IOMUX_PAD(0x3f0, 0x1f4, 4, 0x524, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_A__TXCAN                             IOMUX_PAD(0x3f0, 0x1f4, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_A__INT_MUX_OUT                       IOMUX_PAD(0x3f0, 0x1f4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_B__GPIO1                             IOMUX_PAD(0x3f4, 0x1f8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_B__PWMO                              IOMUX_PAD(0x3f4, 0x1f8, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_B__USBOTG_OC                         IOMUX_PAD(0x3f4, 0x1f8, 2, 0x57c, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_B__ROW5                              IOMUX_PAD(0x3f4, 0x1f8, 3, 0x540, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_B__SDA                               IOMUX_PAD(0x3f4, 0x1f8, 4, 0x528, 2, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_B__RXCAN                             IOMUX_PAD(0x3f4, 0x1f8, 6, 0x480, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__GPIO2                             IOMUX_PAD(0x3f8, 0x1fc, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__PWMO                              IOMUX_PAD(0x3f8, 0x1fc, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__SCL                               IOMUX_PAD(0x3f8, 0x1fc, 2, 0x51c, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__COL4                              IOMUX_PAD(0x3f8, 0x1fc, 3, 0x52c, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__CAPIN1                            IOMUX_PAD(0x3f8, 0x1fc, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__CSPI1_SS2                         IOMUX_PAD(0x3f8, 0x1fc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__TXCAN                             IOMUX_PAD(0x3f8, 0x1fc, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_C__CSPI2_SS2                         IOMUX_PAD(0x3f8, 0x1fc, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_D__GPIO3                             IOMUX_PAD(0x3fc, 0x200, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_D__WDOG_B                            IOMUX_PAD(0x3fc, 0x200, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_D__SDA                               IOMUX_PAD(0x3fc, 0x200, 2, 0x520, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_D__COL5                              IOMUX_PAD(0x3fc, 0x200, 3, 0x530, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_D__CMPOUT1                           IOMUX_PAD(0x3fc, 0x200, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_D__RXCAN                             IOMUX_PAD(0x3fc, 0x200, 6, 0x484, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_D__SS2                               IOMUX_PAD(0x3fc, 0x200, 7, 0x4c4, 1, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_E__GPIO4                             IOMUX_PAD(0x400, 0x204, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_E__SCL                               IOMUX_PAD(0x400, 0x204, 1, 0x524, 2, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_E__LCDC_LD16                         IOMUX_PAD(0x400, 0x204, 2,     0, 0, (PKE | PUE | PUS_100K_UP))
-#define MX25_PAD_GPIO_E__AUD7_TXD                          IOMUX_PAD(0x400, 0x204, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_E__RXD_MUX                           IOMUX_PAD(0x400, 0x204, 6, 0x570, 2, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_E__CTI_TRIG_IN0_6                    IOMUX_PAD(0x400, 0x204, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_F__GPIO5                             IOMUX_PAD(0x404, 0x208, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_F__LCDC_LD17                         IOMUX_PAD(0x404, 0x208, 2,     0, 0, (PKE | PUE | PUS_100K_UP))
-#define MX25_PAD_GPIO_F__EPITO                             IOMUX_PAD(0x404, 0x208, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_F__AUD7_TXC                          IOMUX_PAD(0x404, 0x208, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_F__TXD_MUX                           IOMUX_PAD(0x404, 0x208, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_GPIO_F__CTI_TRIG_OUT0_6                   IOMUX_PAD(0x404, 0x208, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_HSYNC__LCDC_HSYN                          IOMUX_PAD(0x300, 0x108, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_HSYNC__SCL                                IOMUX_PAD(0x300, 0x108, 2, 0x524, 0, NO_PAD_CTRL)
-#define MX25_PAD_HSYNC__BUFFER_EN                          IOMUX_PAD(0x300, 0x108, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_HSYNC__VEN1                               IOMUX_PAD(0x300, 0x108, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_HSYNC__GPIO22                             IOMUX_PAD(0x300, 0x108, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_HSYNC__USBH2_DATA4                        IOMUX_PAD(0x300, 0x108, 6,     0, 0, 0xe5)
-#define MX25_PAD_HSYNC__BT_UART_SRC1                       IOMUX_PAD(0x300, 0x108, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_I2C1_CLK__SCL                             IOMUX_PAD(0x348, 0x150, 0,     0, 0, (HYS | PKE | PUE | PUS_100K_UP))
-#define MX25_PAD_I2C1_CLK__GPIO12                          IOMUX_PAD(0x348, 0x150, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_I2C1_CLK__SLCDC_DATA6                     IOMUX_PAD(0x348, 0x150, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_I2C1_DAT__SDA                             IOMUX_PAD(0x34c, 0x154, 0,     0, 0, (HYS | PKE | PUE | PUS_100K_UP))
-#define MX25_PAD_I2C1_DAT__GPIO13                          IOMUX_PAD(0x34c, 0x154, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_I2C1_DAT__SLCDC_DATA7                     IOMUX_PAD(0x34c, 0x154, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL0__COL0                            IOMUX_PAD(0x3b0, 0x1b8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL0__RXD_MUX                         IOMUX_PAD(0x3b0, 0x1b8, 1, 0x570, 1, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL0__AUD5_TXD                        IOMUX_PAD(0x3b0, 0x1b8, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL0__GPIO1                           IOMUX_PAD(0x3b0, 0x1b8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL0__SDMA_DBG_PC_4                   IOMUX_PAD(0x3b0, 0x1b8, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL1__COL1                            IOMUX_PAD(0x3b4, 0x1bc, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL1__TXD_MUX                         IOMUX_PAD(0x3b4, 0x1bc, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL1__AUD5_RXD                        IOMUX_PAD(0x3b4, 0x1bc, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL1__GPIO2                           IOMUX_PAD(0x3b4, 0x1bc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL1__SDMA_DBG_PC_5                   IOMUX_PAD(0x3b4, 0x1bc, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL2__COL2                            IOMUX_PAD(0x3b8, 0x1c0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL2__RTS                             IOMUX_PAD(0x3b8, 0x1c0, 1, 0x56c, 1, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL2__AUD5_TXC                        IOMUX_PAD(0x3b8, 0x1c0, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL2__GPIO3                           IOMUX_PAD(0x3b8, 0x1c0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL2__SDMA_DBG_PC_6                   IOMUX_PAD(0x3b8, 0x1c0, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL2__M3IF_CHOSEN_MASTER_1            IOMUX_PAD(0x3b8, 0x1c0, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL3__COL3                            IOMUX_PAD(0x3bc, 0x1c4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL3__CTS                             IOMUX_PAD(0x3bc, 0x1c4, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL3__AUD5_TXFS                       IOMUX_PAD(0x3bc, 0x1c4, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL3__GPIO4                           IOMUX_PAD(0x3bc, 0x1c4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL3__SDMA_DBG_PC_7                   IOMUX_PAD(0x3bc, 0x1c4, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_COL3__M3IF_CHOSEN_MASTER_2            IOMUX_PAD(0x3bc, 0x1c4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW0__RXD_MUX                         IOMUX_PAD(0x3a0, 0x1a8, 1, 0x568, 1, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW0__ROW0                            IOMUX_PAD(0x3a0, 0x1a8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW0__DTR                             IOMUX_PAD(0x3a0, 0x1a8, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW0__GPIO29                          IOMUX_PAD(0x3a0, 0x1a8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW0__SDMA_DBG_PC_0                   IOMUX_PAD(0x3a0, 0x1a8, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW1__ROW1                            IOMUX_PAD(0x3a4, 0x1ac, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW1__TXD_MUX                         IOMUX_PAD(0x3a4, 0x1ac, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW1__DSR                             IOMUX_PAD(0x3a4, 0x1ac, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW1__GPIO30                          IOMUX_PAD(0x3a4, 0x1ac, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW1__SDMA_DBG_PC_1                   IOMUX_PAD(0x3a4, 0x1ac, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW2__ROW2                            IOMUX_PAD(0x3a8, 0x1b0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW2__RTS                             IOMUX_PAD(0x3a8, 0x1b0, 1, 0x564, 1, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW2__AUD5_RXC                        IOMUX_PAD(0x3a8, 0x1b0, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW2__CSI_D0                          IOMUX_PAD(0x3a8, 0x1b0, 3, 0x488, 2, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW2__DCD                             IOMUX_PAD(0x3a8, 0x1b0, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW2__GPIO31                          IOMUX_PAD(0x3a8, 0x1b0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW2__SDMA_DBG_PC_2                   IOMUX_PAD(0x3a8, 0x1b0, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW3__ROW3                            IOMUX_PAD(0x3ac, 0x1b4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW3__CTS                             IOMUX_PAD(0x3ac, 0x1b4, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW3__AUD5_RXFS                       IOMUX_PAD(0x3ac, 0x1b4, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW3__CSI_D1                          IOMUX_PAD(0x3ac, 0x1b4, 3, 0x48c, 2, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW3__RI                              IOMUX_PAD(0x3ac, 0x1b4, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW3__GPIO0                           IOMUX_PAD(0x3ac, 0x1b4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_KPP_ROW3__SDMA_DBG_PC_3                   IOMUX_PAD(0x3ac, 0x1b4, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LBA__EIM_LBA                              IOMUX_PAD(0x274,  0x64, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LBA__RXD_MUX                              IOMUX_PAD(0x274,  0x64, 3, 0x578, 0, NO_PAD_CTRL)
-#define MX25_PAD_LBA__GPIO24                               IOMUX_PAD(0x274,  0x64, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LBA__RDY                                  IOMUX_PAD(0x274,  0x64, 6, 0x4b0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD0__LCDC_LD0                             IOMUX_PAD(0x2c0,  0xc8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD0__SLCDC_DATA0                          IOMUX_PAD(0x2c0,  0xc8, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD0__CSI_D0                               IOMUX_PAD(0x2c0,  0xc8, 2, 0x488, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD0__DATA0                                IOMUX_PAD(0x2c0,  0xc8, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD0__CLK1                                 IOMUX_PAD(0x2c0,  0xc8, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD0__GPIO15                               IOMUX_PAD(0x2c0,  0xc8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD0__USBH2_CLK                            IOMUX_PAD(0x2c0,  0xc8, 6,     0, 0, 0xe0)
-#define MX25_PAD_LD0__BT_MEM_CTRL0                         IOMUX_PAD(0x2c0,  0xc8, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__LCDC_LD10                           IOMUX_PAD(0x2e8,  0xf0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__SLCDC_DATA10                        IOMUX_PAD(0x2e8,  0xf0, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__RTS                                 IOMUX_PAD(0x2e8,  0xf0, 2, 0x56c, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__DATA10                              IOMUX_PAD(0x2e8,  0xf0, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__AUD3_TXC                            IOMUX_PAD(0x2e8,  0xf0, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__DAT0                                IOMUX_PAD(0x2e8,  0xf0, 6, 0x4e4, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__RX_ERR                              IOMUX_PAD(0x2e8,  0xf0, 5, 0x518, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD10__BT_MLC_SEL                          IOMUX_PAD(0x2e8,  0xf0, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__LCDC_LD11                           IOMUX_PAD(0x2ec,  0xf4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__SLCDC_DATA11                        IOMUX_PAD(0x2ec,  0xf4, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__CTS                                 IOMUX_PAD(0x2ec,  0xf4, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__DATA11                              IOMUX_PAD(0x2ec,  0xf4, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__AUD3_TXFS                           IOMUX_PAD(0x2ec,  0xf4, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__RDATA2                              IOMUX_PAD(0x2ec,  0xf4, 5, 0x50c, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD11__DAT1                                IOMUX_PAD(0x2ec,  0xf4, 6, 0x4e8, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__BT_SPARE_SIZE                       IOMUX_PAD(0x2ec,  0xf4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__LCDC_LD12                           IOMUX_PAD(0x2f0,  0xf8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__SLCDC_DATA12                        IOMUX_PAD(0x2f0,  0xf8, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__MOSI                                IOMUX_PAD(0x2f0,  0xf8, 2, 0x4a0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__DATA12                              IOMUX_PAD(0x2f0,  0xf8, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__ROW6                                IOMUX_PAD(0x2f0,  0xf8, 4, 0x544, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__RDATA3                              IOMUX_PAD(0x2f0,  0xf8, 5, 0x510, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD12__DAT2                                IOMUX_PAD(0x2f0,  0xf8, 6, 0x4ec, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__BT_SRC0                             IOMUX_PAD(0x2f0,  0xf8, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__LCDC_LD13                           IOMUX_PAD(0x2f4,  0xfc, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__SLCDC_DATA13                        IOMUX_PAD(0x2f4,  0xfc, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__MISO                                IOMUX_PAD(0x2f4,  0xfc, 2, 0x49c, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__DATA13                              IOMUX_PAD(0x2f4,  0xfc, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__ROW7                                IOMUX_PAD(0x2f4,  0xfc, 4, 0x548, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__TDATA2                              IOMUX_PAD(0x2f4,  0xfc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__DAT3                                IOMUX_PAD(0x2f4,  0xfc, 6, 0x4f0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__BT_SRC1                             IOMUX_PAD(0x2f4,  0xfc, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__LCDC_LD14                           IOMUX_PAD(0x2f8, 0x100, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__SLCDC_DATA14                        IOMUX_PAD(0x2f8, 0x100, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__SCLK                                IOMUX_PAD(0x2f8, 0x100, 2, 0x494, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__DATA14                              IOMUX_PAD(0x2f8, 0x100, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__COL6                                IOMUX_PAD(0x2f8, 0x100, 4, 0x534, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__TDATA3                              IOMUX_PAD(0x2f8, 0x100, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__AUD3_RXC                            IOMUX_PAD(0x2f8, 0x100, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__BT_EEPROM_CFG                       IOMUX_PAD(0x2f8, 0x100, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__LCDC_LD15                           IOMUX_PAD(0x2fc, 0x104, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__SLCDC_DATA15                        IOMUX_PAD(0x2fc, 0x104, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__RDY                                 IOMUX_PAD(0x2fc, 0x104, 2, 0x498, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__DATA15                              IOMUX_PAD(0x2fc, 0x104, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__COL7                                IOMUX_PAD(0x2fc, 0x104, 4, 0x538, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__RX_CLK                              IOMUX_PAD(0x2fc, 0x104, 5, 0x514, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD15__AUD3_RXFS                           IOMUX_PAD(0x2fc, 0x104, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__BT_UART_SRC0                        IOMUX_PAD(0x2fc, 0x104, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD1__LCDC_LD1                             IOMUX_PAD(0x2c4,  0xcc, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD1__SLCDC_DATA1                          IOMUX_PAD(0x2c4,  0xcc, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD1__CSI_D1                               IOMUX_PAD(0x2c4,  0xcc, 2, 0x48c, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD1__DATA1                                IOMUX_PAD(0x2c4,  0xcc, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD1__RST1                                 IOMUX_PAD(0x2c4,  0xcc, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD1__GPIO16                               IOMUX_PAD(0x2c4,  0xcc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD1__USBH2_DIR                            IOMUX_PAD(0x2c4,  0xcc, 6,     0, 0, 0xe0)
-#define MX25_PAD_LD1__BT_MEM_CTRL1                         IOMUX_PAD(0x2c4,  0xcc, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD2__LCDC_LD2                             IOMUX_PAD(0x2c8,  0xd0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD2__SLCDC_DATA2                          IOMUX_PAD(0x2c8,  0xd0, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD2__CSI_D15                              IOMUX_PAD(0x2c8,  0xd0, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD2__DATA2                                IOMUX_PAD(0x2c8,  0xd0, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD2__VEN1                                 IOMUX_PAD(0x2c8,  0xd0, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD2__GPIO17                               IOMUX_PAD(0x2c8,  0xd0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD2__USBH2_STP                            IOMUX_PAD(0x2c8,  0xd0, 6,     0, 0, 0xe5)
-#define MX25_PAD_LD2__BT_MEM_TYPE0                         IOMUX_PAD(0x2c8,  0xd0, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD3__LCDC_LD3                             IOMUX_PAD(0x2cc,  0xd4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD3__SLCDC_DATA3                          IOMUX_PAD(0x2cc,  0xd4, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD3__CSI_D14                              IOMUX_PAD(0x2cc,  0xd4, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD3__DATA3                                IOMUX_PAD(0x2cc,  0xd4, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD3__TX1                                  IOMUX_PAD(0x2cc,  0xd4, 4, 0x554, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD3__GPIO18                               IOMUX_PAD(0x2cc,  0xd4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD3__USBH2_NXT                            IOMUX_PAD(0x2cc,  0xd4, 6,     0, 0, 0xe0)
-#define MX25_PAD_LD3__BT_MEM_TYPE1                         IOMUX_PAD(0x2cc,  0xd4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD4__LCDC_LD4                             IOMUX_PAD(0x2d0,  0xd8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD4__SLCDC_DATA4                          IOMUX_PAD(0x2d0,  0xd8, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD4__CSI_D13                              IOMUX_PAD(0x2d0,  0xd8, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD4__DATA4                                IOMUX_PAD(0x2d0,  0xd8, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD4__PD1                                  IOMUX_PAD(0x2d0,  0xd8, 4, 0x550, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD4__GPIO19                               IOMUX_PAD(0x2d0,  0xd8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD4__USBH2_DATA0                          IOMUX_PAD(0x2d0,  0xd8, 6,     0, 0, 0xe5)
-#define MX25_PAD_LD4__BT_PAGE_SIZE0                        IOMUX_PAD(0x2d0,  0xd8, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD5__LCDC_LD5                             IOMUX_PAD(0x2d4,  0xdc, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD5__SLCDC_DATA5                          IOMUX_PAD(0x2d4,  0xdc, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD5__CSI_D12                              IOMUX_PAD(0x2d4,  0xdc, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD5__DATA5                                IOMUX_PAD(0x2d4,  0xdc, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD5__RX1                                  IOMUX_PAD(0x2d4,  0xdc, 4, 0x54c, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD5__GPIO19                               IOMUX_PAD(0x2d4,  0xdc, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD5__USBH2_DATA1                          IOMUX_PAD(0x2d4,  0xdc, 6,     0, 0, 0xe5)
-#define MX25_PAD_LD5__BT_PAGE_SIZE1                        IOMUX_PAD(0x2d4,  0xdc, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD6__LCDC_LD6                             IOMUX_PAD(0x2d8,  0xe0, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD6__SLCDC_DATA6                          IOMUX_PAD(0x2d8,  0xe0, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD6__CSI_D11                              IOMUX_PAD(0x2d8,  0xe0, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD6__DATA6                                IOMUX_PAD(0x2d8,  0xe0, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD6__CLK1                                 IOMUX_PAD(0x2d8,  0xe0, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD6__GPIO20                               IOMUX_PAD(0x2d8,  0xe0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD6__USBH2_DATA2                          IOMUX_PAD(0x2d8,  0xe0, 6,     0, 0, 0xe5)
-#define MX25_PAD_LD6__BT_BUS_WIDTH0                        IOMUX_PAD(0x2d8,  0xe0, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD7__LCDC_LD7                             IOMUX_PAD(0x2dc,  0xe4, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD7__SLCDC_DATA7                          IOMUX_PAD(0x2dc,  0xe4, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD7__CSI_D10                              IOMUX_PAD(0x2dc,  0xe4, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD7__DATA7                                IOMUX_PAD(0x2dc,  0xe4, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD7__RST1                                 IOMUX_PAD(0x2dc,  0xe4, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD7__GPIO21                               IOMUX_PAD(0x2dc,  0xe4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD7__USBH2_DATA3                          IOMUX_PAD(0x2dc,  0xe4, 6,     0, 0, 0xe5)
-#define MX25_PAD_LD7__BT_BUS_WIDTH1                        IOMUX_PAD(0x2dc,  0xe4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__LCDC_LD8                             IOMUX_PAD(0x2e0,  0xe8, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__SLCDC_DATA8                          IOMUX_PAD(0x2e0,  0xe8, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__RXD_MUX                              IOMUX_PAD(0x2e0,  0xe8, 2, 0x570, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__DATA8                                IOMUX_PAD(0x2e0,  0xe8, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__AUD3_TXD                             IOMUX_PAD(0x2e0,  0xe8, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__TX_ERR                               IOMUX_PAD(0x2e0,  0xe8, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__CMD                                  IOMUX_PAD(0x2e0,  0xe8, 6, 0x4e0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__BT_USB_SRC0                          IOMUX_PAD(0x2e0,  0xe8, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__LCDC_LD9                             IOMUX_PAD(0x2e4,  0xec, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__SLCDC_DATA9                          IOMUX_PAD(0x2e4,  0xec, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__TXD_MUX                              IOMUX_PAD(0x2e4,  0xec, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__DATA9                                IOMUX_PAD(0x2e4,  0xec, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__AUD3_RXD                             IOMUX_PAD(0x2e4,  0xec, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__COL                                  IOMUX_PAD(0x2e4,  0xec, 5, 0x504, 1, NO_PAD_CTRL)
-#define MX25_PAD_LD9__CLK                                  IOMUX_PAD(0x2e4,  0xec, 6, 0x4dc, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__BT_USB_SRC1                          IOMUX_PAD(0x2e4,  0xec, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LSCLK__LCDC_LSCLK                         IOMUX_PAD(0x308, 0x110, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LSCLK__SLCDC_CS                           IOMUX_PAD(0x308, 0x110, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LSCLK__DA_0                               IOMUX_PAD(0x308, 0x110, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LSCLK__PD1                                IOMUX_PAD(0x308, 0x110, 4, 0x55c, 1, NO_PAD_CTRL)
-#define MX25_PAD_LSCLK__GPIO24                             IOMUX_PAD(0x308, 0x110, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LSCLK__USBH2_DATA6                        IOMUX_PAD(0x308, 0x110, 6,     0, 0, 0xe5)
-#define MX25_PAD_LSCLK__BT_LPB_FREQ0                       IOMUX_PAD(0x308, 0x110, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFALE__NANDF_ALE                          IOMUX_PAD(0x000,  0x78, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFALE__GPIO28                             IOMUX_PAD(0x000,  0x78, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFALE__PIPESTAT0                          IOMUX_PAD(0x000,  0x78, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NF_CE0__NANDF_CE0                         IOMUX_PAD(0x26c,  0x5c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NF_CE0__SS3                               IOMUX_PAD(0x26c,  0x5c, 1, 0x490, 0, NO_PAD_CTRL)
-#define MX25_PAD_NF_CE0__GPIO22                            IOMUX_PAD(0x26c,  0x5c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NF_CE0__TRACE3                            IOMUX_PAD(0x26c,  0x5c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFCLE__NANDF_CLE                          IOMUX_PAD(0x000,  0x7c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFCLE__GPIO29                             IOMUX_PAD(0x000,  0x7c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFCLE__TRACE0                             IOMUX_PAD(0x000,  0x7c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFRB__NANDF_RB                            IOMUX_PAD(0x27c,  0x84, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFRB__GPIO31                              IOMUX_PAD(0x27c,  0x84, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFRB__TRACE2                              IOMUX_PAD(0x27c,  0x84, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFRE_B__NANDF_RE_B                        IOMUX_PAD(0x000,  0x74, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFRE_B__GPIO27                            IOMUX_PAD(0x000,  0x74, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFRE_B__PIPESTAT1                         IOMUX_PAD(0x000,  0x74, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFWE_B__NANDF_WE_B                        IOMUX_PAD(0x000,  0x70, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFWE_B__GPIO26                            IOMUX_PAD(0x000,  0x70, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFWE_B__PIPESTAT2                         IOMUX_PAD(0x000,  0x70, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFWP_B__NANDF_WP_B                        IOMUX_PAD(0x000,  0x80, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFWP_B__GPIO30                            IOMUX_PAD(0x000,  0x80, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_NFWP_B__TRACE1                            IOMUX_PAD(0x000,  0x80, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE_ACD__LCDC_OE_ACD                       IOMUX_PAD(0x30c, 0x114, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE_ACD__SLCDC_RS                          IOMUX_PAD(0x30c, 0x114, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE_ACD__SS0                               IOMUX_PAD(0x30c, 0x114, 2, 0x4a4, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE_ACD__DA_1                              IOMUX_PAD(0x30c, 0x114, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE_ACD__RX1                               IOMUX_PAD(0x30c, 0x114, 4, 0x558, 1, NO_PAD_CTRL)
-#define MX25_PAD_OE_ACD__GPIO25                            IOMUX_PAD(0x30c, 0x114, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE_ACD__USBH2_DATA7                       IOMUX_PAD(0x30c, 0x114, 6,     0, 0, 0xe5)
-#define MX25_PAD_OE_ACD__BT_LPB_FREQ1                      IOMUX_PAD(0x30c, 0x114, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE__EIM_OE                                IOMUX_PAD(0x260,  0x48, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE__AUD4_TXC                              IOMUX_PAD(0x260,  0x48, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_OE__GPIO14                                IOMUX_PAD(0x260,  0x48, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_POWER_FAIL__POWER_FAIL_INT                IOMUX_PAD(0x410, 0x21c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_POWER_FAIL__AUD7_RXD                      IOMUX_PAD(0x410, 0x21c, 4, 0x478, 1, NO_PAD_CTRL)
-#define MX25_PAD_POWER_FAIL__GPIO19                        IOMUX_PAD(0x410, 0x21c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_POWER_FAIL__CTS                           IOMUX_PAD(0x410, 0x21c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_PWM__PWMO                                 IOMUX_PAD(0x314, 0x11c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_PWM__CMPOUT1                              IOMUX_PAD(0x314, 0x11c, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_PWM__GPIO26                               IOMUX_PAD(0x314, 0x11c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_PWM__USBH2_OC                             IOMUX_PAD(0x314, 0x11c, 6, 0x580, 1, NO_PAD_CTRL)
-#define MX25_PAD_PWM__BT_LPB_FREQ2                         IOMUX_PAD(0x314, 0x11c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_RTCK__RTCK                                IOMUX_PAD(0x3e4, 0x1ec, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_RTCK__LINE                                IOMUX_PAD(0x3e4, 0x1ec, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_RTCK__DAT7                                IOMUX_PAD(0x3e4, 0x1ec, 2, 0x500, 1, NO_PAD_CTRL)
-#define MX25_PAD_RTCK__GPIO14                              IOMUX_PAD(0x3e4, 0x1ec, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_RTCK__SDMA_DBG_PC_13                      IOMUX_PAD(0x3e4, 0x1ec, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_RW__EIM_RW                                IOMUX_PAD(0x278,  0x6c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_RW__AUD4_TXFS                             IOMUX_PAD(0x278,  0x6c, 4, 0x474, 0, NO_PAD_CTRL)
-#define MX25_PAD_RW__GPIO25                                IOMUX_PAD(0x278,  0x6c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CLK__CLK                              IOMUX_PAD(0x38c, 0x194, 0x10,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CLK__MISO                             IOMUX_PAD(0x38c, 0x194, 1, 0x49c, 1, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CLK__RDATA3                           IOMUX_PAD(0x38c, 0x194, 2, 0x510, 2, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CLK__SDMA_DBG_STAT_0                  IOMUX_PAD(0x38c, 0x194, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CLK__GPIO24                           IOMUX_PAD(0x38c, 0x194, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CLK__SLCDC_DATA1                      IOMUX_PAD(0x38c, 0x194, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CLK__TRACE11                          IOMUX_PAD(0x38c, 0x194, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CMD__CMD                              IOMUX_PAD(0x388, 0x190, 0x10,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CMD__MOSI                             IOMUX_PAD(0x388, 0x190, 1, 0x4a0, 1, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CMD__RDATA2                           IOMUX_PAD(0x388, 0x190, 2, 0x50c, 2, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CMD__SDMA_DBG_EVT_SEL                 IOMUX_PAD(0x388, 0x190, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CMD__GPIO23                           IOMUX_PAD(0x388, 0x190, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CMD__SLCDC_DATA0                      IOMUX_PAD(0x388, 0x190, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_CMD__TRACE10                          IOMUX_PAD(0x388, 0x190, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__DAT0                           IOMUX_PAD(0x390, 0x198, 0x10,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__SCLK                           IOMUX_PAD(0x390, 0x198, 1, 0x494, 1, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__TDATA2                         IOMUX_PAD(0x390, 0x198, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__AUD7_TXFS                      IOMUX_PAD(0x390, 0x198, 3, 0x47c, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__SDMA_DBG_STAT_1                IOMUX_PAD(0x390, 0x198, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__GPIO25                         IOMUX_PAD(0x390, 0x198, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__SLCDC_DATA2                    IOMUX_PAD(0x390, 0x198, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA0__TRACE12                        IOMUX_PAD(0x390, 0x198, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__DAT1                           IOMUX_PAD(0x394, 0x19c, 0x10,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__RDY                            IOMUX_PAD(0x394, 0x19c, 1, 0x498, 1, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__TDATA3                         IOMUX_PAD(0x394, 0x19c, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__AUD7_RXD                       IOMUX_PAD(0x394, 0x19c, 3, 0x478, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__SDMA_DBG_STAT_2                IOMUX_PAD(0x394, 0x19c, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__GPIO26                         IOMUX_PAD(0x394, 0x19c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__SLCDC_DATA3                    IOMUX_PAD(0x394, 0x19c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA1__TRACE13                        IOMUX_PAD(0x394, 0x19c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__DAT2                           IOMUX_PAD(0x398, 0x1a0, 0x10,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__SS0                            IOMUX_PAD(0x398, 0x1a0, 1, 0x4a4, 1, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__RX_CLK                         IOMUX_PAD(0x398, 0x1a0, 2, 0x514, 2, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__AUD7_RXC                       IOMUX_PAD(0x398, 0x1a0, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__SDMA_DBG_STAT_3                IOMUX_PAD(0x398, 0x1a0, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__GPIO27                         IOMUX_PAD(0x398, 0x1a0, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__SLCDC_DATA4                    IOMUX_PAD(0x398, 0x1a0, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA2__TRACE14                        IOMUX_PAD(0x398, 0x1a0, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA3__DAT3                           IOMUX_PAD(0x39c, 0x1a4, 0x10,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA3__SS1                            IOMUX_PAD(0x39c, 0x1a4, 1, 0x4a8, 1, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA3__CRS                            IOMUX_PAD(0x39c, 0x1a4, 2, 0x508, 2, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA3__AUD7_RXFS                      IOMUX_PAD(0x39c, 0x1a4, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA3__GPIO28                         IOMUX_PAD(0x39c, 0x1a4, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA3__SLCDC_DATA5                    IOMUX_PAD(0x39c, 0x1a4, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_SD1_DATA3__TRACE15                        IOMUX_PAD(0x39c, 0x1a4, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_CTS__CTS                            IOMUX_PAD(0x374, 0x17c, 0,     0, 0, 0x40)
-#define MX25_PAD_UART1_CTS__CSI_D1                         IOMUX_PAD(0x374, 0x17c, 1, 0x48c, 1, NO_PAD_CTRL)
-#define MX25_PAD_UART1_CTS__CMPOUT1                        IOMUX_PAD(0x374, 0x17c, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_CTS__RI                             IOMUX_PAD(0x374, 0x17c, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_CTS__LCDC_REV                       IOMUX_PAD(0x374, 0x17c, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_CTS__GPIO25                         IOMUX_PAD(0x374, 0x17c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_CTS__SLCDC_DATA11                   IOMUX_PAD(0x374, 0x17c, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RTS__RTS                            IOMUX_PAD(0x370, 0x178, 0,     0, 0, 0x1E0)
-#define MX25_PAD_UART1_RTS__CSI_D0                         IOMUX_PAD(0x370, 0x178, 1, 0x488, 1, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RTS__CAPIN1                         IOMUX_PAD(0x370, 0x178, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RTS__DCD                            IOMUX_PAD(0x370, 0x178, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RTS__LCDC_PS                        IOMUX_PAD(0x370, 0x178, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RTS__GPIO24                         IOMUX_PAD(0x370, 0x178, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RTS__SLCDC_DATA10                   IOMUX_PAD(0x370, 0x178, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RXD__RXD_MUX                        IOMUX_PAD(0x368, 0x170, 0,     0, 0, 0x1e0)
-#define MX25_PAD_UART1_RXD__DTR                            IOMUX_PAD(0x368, 0x170, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RXD__LCDC_CLS                       IOMUX_PAD(0x368, 0x170, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RXD__GPIO22                         IOMUX_PAD(0x368, 0x170, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_RXD__SLCDC_DATA8                    IOMUX_PAD(0x368, 0x170, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_TXD__TXD_MUX                        IOMUX_PAD(0x36c, 0x174, 0,     0, 0, 0x40)
-#define MX25_PAD_UART1_TXD__DSR                            IOMUX_PAD(0x36c, 0x174, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_TXD__LCDC_SPL                       IOMUX_PAD(0x36c, 0x174, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_TXD__GPIO23                         IOMUX_PAD(0x36c, 0x174, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART1_TXD__SLCDC_DATA9                    IOMUX_PAD(0x36c, 0x174, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_CTS__CTS                            IOMUX_PAD(0x384, 0x18c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_CTS__DAT4                           IOMUX_PAD(0x384, 0x18c, 1, 0x4cc, 1, NO_PAD_CTRL)
-#define MX25_PAD_UART2_CTS__RX_ERR                         IOMUX_PAD(0x384, 0x18c, 2, 0x518, 2, NO_PAD_CTRL)
-#define MX25_PAD_UART2_CTS__CMPOUT1                        IOMUX_PAD(0x384, 0x18c, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_CTS__GPIO29                         IOMUX_PAD(0x384, 0x18c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_CTS__SS3                            IOMUX_PAD(0x384, 0x18c, 6, 0x4c8, 1, NO_PAD_CTRL)
-#define MX25_PAD_UART2_CTS__EXTDMA_2                       IOMUX_PAD(0x384, 0x18c, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__RTS                            IOMUX_PAD(0x380, 0x188, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__DAT5                           IOMUX_PAD(0x380, 0x188, 1, 0x4d0, 1, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__COL                            IOMUX_PAD(0x380, 0x188, 2, 0x504, 2, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__CAPIN1                         IOMUX_PAD(0x380, 0x188, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__EPITO                          IOMUX_PAD(0x380, 0x188, 4,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__GPIO28                         IOMUX_PAD(0x380, 0x188, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__SS3                            IOMUX_PAD(0x380, 0x188, 6,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__EXTDMA_1                       IOMUX_PAD(0x380, 0x188, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RXD__RXD_MUX                        IOMUX_PAD(0x378, 0x180, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RXD__DAT7                           IOMUX_PAD(0x378, 0x180, 1, 0x4d8, 1, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RXD__GPIO26                         IOMUX_PAD(0x378, 0x180, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_TXD__TXD_MUX                        IOMUX_PAD(0x37c, 0x184, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_TXD__DAT6                           IOMUX_PAD(0x37c, 0x184, 1, 0x4d4, 1, NO_PAD_CTRL)
-#define MX25_PAD_UART2_TXD__TX_ERR                         IOMUX_PAD(0x37c, 0x184, 2,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_TXD__GPIO27                         IOMUX_PAD(0x37c, 0x184, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_TXD__EXTDMA_0                       IOMUX_PAD(0x37c, 0x184, 7,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK                  IOMUX_PAD(0x000, 0x210, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UPLL_BYPCLK__GPIO16                       IOMUX_PAD(0x000, 0x210, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_ACK__hreset_b                       IOMUX_PAD(0x40c, 0x218, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_ACK__VSTBY_ACK                      IOMUX_PAD(0x40c, 0x218, 1,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_ACK__SS3                            IOMUX_PAD(0x40c, 0x218, 2, 0x490, 1, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_ACK__EPITO                          IOMUX_PAD(0x40c, 0x218, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_ACK__GPIO18                         IOMUX_PAD(0x40c, 0x218, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_REQ__VSTBY_REQ                      IOMUX_PAD(0x408, 0x214, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_REQ__AUD7_TXFS                      IOMUX_PAD(0x408, 0x214, 4, 0x47c, 1, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_REQ__GPIO17                         IOMUX_PAD(0x408, 0x214, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSTBY_REQ__RTS                            IOMUX_PAD(0x408, 0x214, 6, 0x56c, 2, NO_PAD_CTRL)
-#define MX25_PAD_VSYNC__LCDC_VSYN                          IOMUX_PAD(0x304, 0x10c, 0,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSYNC__SDA                                IOMUX_PAD(0x304, 0x10c, 2, 0x528, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSYNC__DMARQ                              IOMUX_PAD(0x304, 0x10c, 3,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSYNC__TX1                                IOMUX_PAD(0x304, 0x10c, 4, 0x560, 1, NO_PAD_CTRL)
-#define MX25_PAD_VSYNC__GPIO23                             IOMUX_PAD(0x304, 0x10c, 5,     0, 0, NO_PAD_CTRL)
-#define MX25_PAD_VSYNC__USBH2_DATA5                        IOMUX_PAD(0x304, 0x10c, 6,     0, 0, 0xe5)
-#define MX25_PAD_VSYNC__BT_UART_SRC2                       IOMUX_PAD(0x304, 0x10c, 7,     0, 0, NO_PAD_CTRL)
+/*
+ * IOMUX/PAD Bit field definitions
+ */
 
-#endif /* __MACH_IOMUX_MX25_H__ */
+#define MX25_PAD_A10__A10		IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A10__GPIO_4_0		IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A13__A13		IOMUX_PAD(0x22C, 0x00c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A13__GPIO_4_1		IOMUX_PAD(0x22C, 0x00c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A14__A14		IOMUX_PAD(0x230, 0x010, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A14__GPIO_2_0		IOMUX_PAD(0x230, 0x010, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A15__A15		IOMUX_PAD(0x234, 0x014, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A15__GPIO_2_1		IOMUX_PAD(0x234, 0x014, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A16__A16		IOMUX_PAD(0x000, 0x018, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A16__GPIO_2_2		IOMUX_PAD(0x000, 0x018, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A17__A17		IOMUX_PAD(0x238, 0x01c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x07, 0x504, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A19__A19		IOMUX_PAD(0x240, 0x024, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x07, 0x518, 0, NO_PAD_CTRL)
+#define MX25_PAD_A19__GPIO_2_5		IOMUX_PAD(0x240, 0x024, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A20__A20		IOMUX_PAD(0x244, 0x028, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A20__GPIO_2_6		IOMUX_PAD(0x244, 0x028, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x07, 0x50c, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A21__A21		IOMUX_PAD(0x248, 0x02c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A21__GPIO_2_7		IOMUX_PAD(0x248, 0x02c, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x07, 0x510, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A22__A22		IOMUX_PAD(0x000, 0x030, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A22__GPIO_2_8		IOMUX_PAD(0x000, 0x030, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A23__A23		IOMUX_PAD(0x24c, 0x034, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A23__GPIO_2_9		IOMUX_PAD(0x24c, 0x034, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A24__A24		IOMUX_PAD(0x250, 0x038, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A24__GPIO_2_10		IOMUX_PAD(0x250, 0x038, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x07, 0x514, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_A25__A25		IOMUX_PAD(0x254, 0x03c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A25__GPIO_2_11		IOMUX_PAD(0x254, 0x03c, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x07, 0x508, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_EB0__EB0		IOMUX_PAD(0x258, 0x040, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_EB0__AUD4_TXD		IOMUX_PAD(0x258, 0x040, 0x04, 0x464, 0, NO_PAD_CTRL)
+#define MX25_PAD_EB0__GPIO_2_12		IOMUX_PAD(0x258, 0x040, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_EB1__EB1		IOMUX_PAD(0x25c, 0x044, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_EB1__AUD4_RXD		IOMUX_PAD(0x25c, 0x044, 0x04, 0x460, 0, NO_PAD_CTRL)
+#define MX25_PAD_EB1__GPIO_2_13		IOMUX_PAD(0x25c, 0x044, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_OE__OE			IOMUX_PAD(0x260, 0x048, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_OE__AUD4_TXC		IOMUX_PAD(0x260, 0x048, 0x04, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_OE__GPIO_2_14		IOMUX_PAD(0x260, 0x048, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CS0__CS0		IOMUX_PAD(0x000, 0x04c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CS0__GPIO_4_2		IOMUX_PAD(0x000, 0x04c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CS1__CS1		IOMUX_PAD(0x000, 0x050, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CS1__GPIO_4_3		IOMUX_PAD(0x000, 0x050, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CS4__CS4		IOMUX_PAD(0x264, 0x054, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CS4__UART5_CTS		IOMUX_PAD(0x264, 0x054, 0x03, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CS4__GPIO_3_20		IOMUX_PAD(0x264, 0x054, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CS5__CS5		IOMUX_PAD(0x268, 0x058, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CS5__UART5_RTS		IOMUX_PAD(0x268, 0x058, 0x03, 0x574, 0, NO_PAD_CTRL)
+#define MX25_PAD_CS5__GPIO_3_21		IOMUX_PAD(0x268, 0x058, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_NF_CE0__GPIO_3_22	IOMUX_PAD(0x26c, 0x05c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_ECB__ECB		IOMUX_PAD(0x270, 0x060, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_ECB__UART5_TXD_MUX	IOMUX_PAD(0x270, 0x060, 0x03, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_ECB__GPIO_3_23		IOMUX_PAD(0x270, 0x060, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_LBA__LBA		IOMUX_PAD(0x274, 0x064, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LBA__UART5_RXD_MUX	IOMUX_PAD(0x274, 0x064, 0x03, 0x578, 0, NO_PAD_CTRL)
+#define MX25_PAD_LBA__GPIO_3_24		IOMUX_PAD(0x274, 0x064, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_BCLK__BCLK		IOMUX_PAD(0x000, 0x068, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_BCLK__GPIO_4_4		IOMUX_PAD(0x000, 0x068, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_RW__RW			IOMUX_PAD(0x278, 0x06c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_RW__AUD4_TXFS		IOMUX_PAD(0x278, 0x06c, 0x04, 0x474, 0, NO_PAD_CTRL)
+#define MX25_PAD_RW__GPIO_3_25		IOMUX_PAD(0x278, 0x06c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_NFWE_B__NFWE_B		IOMUX_PAD(0x000, 0x070, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_NFWE_B__GPIO_3_26	IOMUX_PAD(0x000, 0x070, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_NFRE_B__NFRE_B		IOMUX_PAD(0x000, 0x074, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_NFRE_B__GPIO_3_27	IOMUX_PAD(0x000, 0x074, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_NFALE__NFALE		IOMUX_PAD(0x000, 0x078, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_NFALE__GPIO_3_28	IOMUX_PAD(0x000, 0x078, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_NFCLE__NFCLE		IOMUX_PAD(0x000, 0x07c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_NFCLE__GPIO_3_29	IOMUX_PAD(0x000, 0x07c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_NFWP_B__NFWP_B		IOMUX_PAD(0x000, 0x080, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_NFWP_B__GPIO_3_30	IOMUX_PAD(0x000, 0x080, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_NFRB__NFRB		IOMUX_PAD(0x27c, 0x084, 0x00, 0, 0, PAD_CTL_PKE)
+#define MX25_PAD_NFRB__GPIO_3_31	IOMUX_PAD(0x27c, 0x084, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D15__D15		IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D15__LD16		IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D15__GPIO_4_5		IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D14__D14		IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D14__LD17		IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D14__GPIO_4_6		IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D13__D13		IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D13__LD18		IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D13__GPIO_4_7		IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D12__D12		IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D12__GPIO_4_8		IOMUX_PAD(0x28c, 0x094, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D11__D11		IOMUX_PAD(0x290, 0x098, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D11__GPIO_4_9		IOMUX_PAD(0x290, 0x098, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D10__D10		IOMUX_PAD(0x294, 0x09c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D10__GPIO_4_10		IOMUX_PAD(0x294, 0x09c, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D10__USBOTG_OC		IOMUX_PAD(0x294, 0x09c, 0x06, 0x57c, 0, PAD_CTL_PUS_100K_UP)
+
+#define MX25_PAD_D9__D9			IOMUX_PAD(0x298, 0x0a0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D9__GPIO_4_11		IOMUX_PAD(0x298, 0x0a0, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D9__USBH2_PWR		IOMUX_PAD(0x298, 0x0a0, 0x06, 0, 0, PAD_CTL_PKE)
+
+#define MX25_PAD_D8__D8			IOMUX_PAD(0x29c, 0x0a4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D8__GPIO_4_12		IOMUX_PAD(0x29c, 0x0a4, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D8__USBH2_OC		IOMUX_PAD(0x29c, 0x0a4, 0x06, 0x580, 0, PAD_CTL_PUS_100K_UP)
+
+#define MX25_PAD_D7__D7			IOMUX_PAD(0x2a0, 0x0a8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D7__GPIO_4_13		IOMUX_PAD(0x2a0, 0x0a8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D6__D6			IOMUX_PAD(0x2a4, 0x0ac, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D6__GPIO_4_14		IOMUX_PAD(0x2a4, 0x0ac, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D5__D5			IOMUX_PAD(0x2a8, 0x0b0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D5__GPIO_4_15		IOMUX_PAD(0x2a8, 0x0b0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D4__D4			IOMUX_PAD(0x2ac, 0x0b4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D4__GPIO_4_16		IOMUX_PAD(0x2ac, 0x0b4, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D3__D3			IOMUX_PAD(0x2b0, 0x0b8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D3__GPIO_4_17		IOMUX_PAD(0x2b0, 0x0b8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D2__D2			IOMUX_PAD(0x2b4, 0x0bc, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D2__GPIO_4_18		IOMUX_PAD(0x2b4, 0x0bc, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D1__D1			IOMUX_PAD(0x2b8, 0x0c0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D1__GPIO_4_19		IOMUX_PAD(0x2b8, 0x0c0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_D0__D0			IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_D0__GPIO_4_20		IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_LD0__LD0		IOMUX_PAD(0x2c0, 0x0c8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD0__CSI_D0		IOMUX_PAD(0x2c0, 0x0c8, 0x02, 0x488, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD0__GPIO_2_15		IOMUX_PAD(0x2c0, 0x0c8, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD0__USBH2_CLK		IOMUX_PAD(0x2c0,  0xc8, 0x06, 0, 0, 0xe0)
+
+#define MX25_PAD_LD1__LD1		IOMUX_PAD(0x2c4, 0x0cc, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD1__CSI_D1		IOMUX_PAD(0x2c4, 0x0cc, 0x02, 0x48c, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD1__GPIO_2_16		IOMUX_PAD(0x2c4, 0x0cc, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD1__USBH2_DIR		IOMUX_PAD(0x2c4, 0x0cc, 0x06, 0, 0, 0xe0)
+
+#define MX25_PAD_LD2__LD2		IOMUX_PAD(0x2c8, 0x0d0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD2__GPIO_2_17		IOMUX_PAD(0x2c8, 0x0d0, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD2__USBH2_STP		IOMUX_PAD(0x2c8, 0x0d0, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_LD3__LD3		IOMUX_PAD(0x2cc, 0x0d4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD3__GPIO_2_18		IOMUX_PAD(0x2cc, 0x0d4, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD3__USBH2_NXT		IOMUX_PAD(0x2cc, 0x0d4, 0x06, 0, 0, 0xe0)
+
+#define MX25_PAD_LD4__LD4		IOMUX_PAD(0x2d0, 0x0d8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD4__GPIO_2_19		IOMUX_PAD(0x2d0, 0x0d8, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD4__USBH2_DATA0	IOMUX_PAD(0x2d0, 0x0d8, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_LD5__LD5		IOMUX_PAD(0x2d4, 0x0dc, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD5__GPIO_1_19		IOMUX_PAD(0x2d4, 0x0dc, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD5__USBH2_DATA1	IOMUX_PAD(0x2d4, 0x0dc, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_LD6__LD6		IOMUX_PAD(0x2d8, 0x0e0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD6__GPIO_1_20		IOMUX_PAD(0x2d8, 0x0e0, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD6__USBH2_DATA2	IOMUX_PAD(0x2d8, 0x0e0, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_LD7__LD7		IOMUX_PAD(0x2dc, 0x0e4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD7__GPIO_1_21		IOMUX_PAD(0x2dc, 0x0e4, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD7__USBH2_DATA3	IOMUX_PAD(0x2dc, 0x0e4, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_LD8__LD8		IOMUX_PAD(0x2e0, 0x0e8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_LD9__LD9		IOMUX_PAD(0x2e4, 0x0ec, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x05, 0x504, 1, NO_PAD_CTRL)
+
+#define MX25_PAD_LD10__LD10		IOMUX_PAD(0x2e8, 0x0f0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x05, 0x518, 1, NO_PAD_CTRL)
+
+#define MX25_PAD_LD11__LD11		IOMUX_PAD(0x2ec, 0x0f4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x05, 0x50c, 1, NO_PAD_CTRL)
+
+#define MX25_PAD_LD12__LD12		IOMUX_PAD(0x2f0, 0x0f8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x05, 0x510, 1, NO_PAD_CTRL)
+
+#define MX25_PAD_LD13__LD13		IOMUX_PAD(0x2f4, 0x0fc, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_LD14__LD14		IOMUX_PAD(0x2f8, 0x100, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_LD15__LD15		IOMUX_PAD(0x2fc, 0x104, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x05, 0x514, 1, NO_PAD_CTRL)
+
+#define MX25_PAD_HSYNC__HSYNC		IOMUX_PAD(0x300, 0x108, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_HSYNC__GPIO_1_22	IOMUX_PAD(0x300, 0x108, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_HSYNC__USBH2_DATA4	IOMUX_PAD(0x300, 0x108, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_VSYNC__VSYNC		IOMUX_PAD(0x304, 0x10c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_VSYNC__GPIO_1_23	IOMUX_PAD(0x304, 0x10c, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_VSYNC__USBH2_DATA5	IOMUX_PAD(0x304, 0x10c, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_LSCLK__LSCLK		IOMUX_PAD(0x308, 0x110, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LSCLK__GPIO_1_24	IOMUX_PAD(0x308, 0x110, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_LSCLK__USBH2_DATA6	IOMUX_PAD(0x308, 0x110, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_OE_ACD__OE_ACD		IOMUX_PAD(0x30c, 0x114, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_OE_ACD__GPIO_1_25	IOMUX_PAD(0x30c, 0x114, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_OE_ACD__USBH2_DATA7	IOMUX_PAD(0x30c, 0x114, 0x06, 0, 0, 0xe5)
+
+#define MX25_PAD_CONTRAST__CONTRAST	IOMUX_PAD(0x310, 0x118, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CONTRAST__PWM4_PWMO	IOMUX_PAD(0x310, 0x118, 0x04, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x05, 0x508, 1, NO_PAD_CTRL)
+
+#define MX25_PAD_PWM__PWM		IOMUX_PAD(0x314, 0x11c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_PWM__GPIO_1_26		IOMUX_PAD(0x314, 0x11c, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_PWM__USBH2_OC		IOMUX_PAD(0x314, 0x11c, 0x16, 0x580, 1, PAD_CTL_PUS_100K_UP)
 
+#define MX25_PAD_CSI_D2__CSI_D2		IOMUX_PAD(0x318, 0x120, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D2__UART5_RXD_MUX	IOMUX_PAD(0x318, 0x120, 0x01, 0x578, 1, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D2__GPIO_1_27	IOMUX_PAD(0x318, 0x120, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_D3__CSI_D3		IOMUX_PAD(0x31c, 0x124, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D3__GPIO_1_28	IOMUX_PAD(0x31c, 0x124, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_D4__CSI_D4		IOMUX_PAD(0x320, 0x128, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D4__UART5_RTS	IOMUX_PAD(0x320, 0x128, 0x01, 0x574, 1, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D4__GPIO_1_29	IOMUX_PAD(0x320, 0x128, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_D5__CSI_D5		IOMUX_PAD(0x324, 0x12c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D5__GPIO_1_30	IOMUX_PAD(0x324, 0x12c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_D6__CSI_D6		IOMUX_PAD(0x328, 0x130, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D6__GPIO_1_31	IOMUX_PAD(0x328, 0x130, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_D7__CSI_D7		IOMUX_PAD(0x32c, 0x134, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D7__GPIO_1_6	IOMUX_PAD(0x32c, 0x134, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_D8__CSI_D8		IOMUX_PAD(0x330, 0x138, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D8__GPIO_1_7	IOMUX_PAD(0x330, 0x138, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_D9__CSI_D9		IOMUX_PAD(0x334, 0x13c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_D9__GPIO_4_21	IOMUX_PAD(0x334, 0x13c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_MCLK__CSI_MCLK	IOMUX_PAD(0x338, 0x140, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_MCLK__GPIO_1_8	IOMUX_PAD(0x338, 0x140, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_VSYNC__CSI_VSYNC	IOMUX_PAD(0x33c, 0x144, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_VSYNC__GPIO_1_9	IOMUX_PAD(0x33c, 0x144, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_HSYNC__CSI_HSYNC	IOMUX_PAD(0x340, 0x148, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_HSYNC__GPIO_1_10	IOMUX_PAD(0x340, 0x148, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSI_PIXCLK__CSI_PIXCLK	IOMUX_PAD(0x344, 0x14c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSI_PIXCLK__GPIO_1_11	IOMUX_PAD(0x344, 0x14c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_I2C1_CLK__I2C1_CLK	IOMUX_PAD(0x348, 0x150, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_I2C1_CLK__GPIO_1_12	IOMUX_PAD(0x348, 0x150, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_I2C1_DAT__I2C1_DAT	IOMUX_PAD(0x34c, 0x154, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_I2C1_DAT__GPIO_1_13	IOMUX_PAD(0x34c, 0x154, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSPI1_MOSI__CSPI1_MOSI	IOMUX_PAD(0x350, 0x158, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSPI1_MOSI__GPIO_1_14	IOMUX_PAD(0x350, 0x158, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSPI1_MISO__CSPI1_MISO	IOMUX_PAD(0x354, 0x15c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSPI1_MISO__GPIO_1_15	IOMUX_PAD(0x354, 0x15c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSPI1_SS0__CSPI1_SS0	IOMUX_PAD(0x358, 0x160, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSPI1_SS0__GPIO_1_16	IOMUX_PAD(0x358, 0x160, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSPI1_SS1__CSPI1_SS1	IOMUX_PAD(0x35c, 0x164, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSPI1_SS1__GPIO_1_17	IOMUX_PAD(0x35c, 0x164, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSPI1_SCLK__CSPI1_SCLK	IOMUX_PAD(0x360, 0x168, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CSPI1_SCLK__GPIO_1_18	IOMUX_PAD(0x360, 0x168, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CSPI1_RDY__CSPI1_RDY	IOMUX_PAD(0x364, 0x16c, 0x00, 0, 0, PAD_CTL_PKE)
+#define MX25_PAD_CSPI1_RDY__GPIO_2_22	IOMUX_PAD(0x364, 0x16c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART1_RXD__UART1_RXD	IOMUX_PAD(0x368, 0x170, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN)
+#define MX25_PAD_UART1_RXD__GPIO_4_22	IOMUX_PAD(0x368, 0x170, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART1_TXD__UART1_TXD	IOMUX_PAD(0x36c, 0x174, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_UART1_TXD__GPIO_4_23	IOMUX_PAD(0x36c, 0x174, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART1_RTS__UART1_RTS	IOMUX_PAD(0x370, 0x178, 0x00, 0, 0, PAD_CTL_PUS_100K_UP)
+#define MX25_PAD_UART1_RTS__CSI_D0	IOMUX_PAD(0x370, 0x178, 0x01, 0x488, 1, NO_PAD_CTRL)
+#define MX25_PAD_UART1_RTS__GPIO_4_24	IOMUX_PAD(0x370, 0x178, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART1_CTS__UART1_CTS	IOMUX_PAD(0x374, 0x17c, 0x00, 0, 0, PAD_CTL_PUS_100K_UP)
+#define MX25_PAD_UART1_CTS__CSI_D1	IOMUX_PAD(0x374, 0x17c, 0x01, 0x48c, 1, NO_PAD_CTRL)
+#define MX25_PAD_UART1_CTS__GPIO_4_25	IOMUX_PAD(0x374, 0x17c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART2_RXD__UART2_RXD	IOMUX_PAD(0x378, 0x180, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_UART2_RXD__GPIO_4_26	IOMUX_PAD(0x378, 0x180, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART2_TXD__UART2_TXD	IOMUX_PAD(0x37c, 0x184, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_UART2_TXD__GPIO_4_27	IOMUX_PAD(0x37c, 0x184, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART2_RTS__UART2_RTS	IOMUX_PAD(0x380, 0x188, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x02, 0x504, 2, NO_PAD_CTRL)
+#define MX25_PAD_UART2_RTS__GPIO_4_28	IOMUX_PAD(0x380, 0x188, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x02, 0x518, 2, NO_PAD_CTRL)
+#define MX25_PAD_UART2_CTS__UART2_CTS	IOMUX_PAD(0x384, 0x18c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_UART2_CTS__GPIO_4_29	IOMUX_PAD(0x384, 0x18c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_SD1_CMD__SD1_CMD	IOMUX_PAD(0x388, 0x190, 0x00, 0, 0, PAD_CTL_PUS_47K_UP)
+#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x02, 0x50c, 2, NO_PAD_CTRL)
+#define MX25_PAD_SD1_CMD__GPIO_2_23	IOMUX_PAD(0x388, 0x190, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_SD1_CLK__SD1_CLK	IOMUX_PAD(0x38c, 0x194, 0x00, 0, 0, PAD_CTL_PUS_47K_UP)
+#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x02, 0x510, 2, NO_PAD_CTRL)
+#define MX25_PAD_SD1_CLK__GPIO_2_24	IOMUX_PAD(0x38c, 0x194, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_SD1_DATA0__SD1_DATA0	IOMUX_PAD(0x390, 0x198, 0x00, 0, 0, PAD_CTL_PUS_47K_UP)
+#define MX25_PAD_SD1_DATA0__GPIO_2_25	IOMUX_PAD(0x390, 0x198, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_SD1_DATA1__SD1_DATA1	IOMUX_PAD(0x394, 0x19c, 0x00, 0, 0, PAD_CTL_PUS_47K_UP)
+#define MX25_PAD_SD1_DATA1__AUD7_RXD	IOMUX_PAD(0x394, 0x19c, 0x03, 0x478, 0, NO_PAD_CTRL)
+#define MX25_PAD_SD1_DATA1__GPIO_2_26	IOMUX_PAD(0x394, 0x19c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_SD1_DATA2__SD1_DATA2	IOMUX_PAD(0x398, 0x1a0, 0x00, 0, 0, PAD_CTL_PUS_47K_UP)
+#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x05, 0x514, 2, NO_PAD_CTRL)
+#define MX25_PAD_SD1_DATA2__GPIO_2_27	IOMUX_PAD(0x398, 0x1a0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_SD1_DATA3__SD1_DATA3	IOMUX_PAD(0x39c, 0x1a4, 0x00, 0, 0, PAD_CTL_PUS_47K_UP)
+#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x00, 0x508, 2, NO_PAD_CTRL)
+#define MX25_PAD_SD1_DATA3__GPIO_2_28	IOMUX_PAD(0x39c, 0x1a4, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define KPP_CTL_ROW	(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
+#define KPP_CTL_COL	(PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
+
+#define MX25_PAD_KPP_ROW0__KPP_ROW0	IOMUX_PAD(0x3a0, 0x1a8, 0x00, 0, 0, KPP_CTL_ROW)
+#define MX25_PAD_KPP_ROW0__GPIO_2_29	IOMUX_PAD(0x3a0, 0x1a8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_KPP_ROW1__KPP_ROW1	IOMUX_PAD(0x3a4, 0x1ac, 0x00, 0, 0, KPP_CTL_ROW)
+#define MX25_PAD_KPP_ROW1__GPIO_2_30	IOMUX_PAD(0x3a4, 0x1ac, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_KPP_ROW2__KPP_ROW2	IOMUX_PAD(0x3a8, 0x1b0, 0x00, 0, 0, KPP_CTL_ROW)
+#define MX25_PAD_KPP_ROW2__CSI_D0	IOMUX_PAD(0x3a8, 0x1b0, 0x03, 0x488, 2, NO_PAD_CTRL)
+#define MX25_PAD_KPP_ROW2__GPIO_2_31	IOMUX_PAD(0x3a8, 0x1b0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_KPP_ROW3__KPP_ROW3	IOMUX_PAD(0x3ac, 0x1b4, 0x00, 0, 0, KPP_CTL_ROW)
+#define MX25_PAD_KPP_ROW3__CSI_LD1	IOMUX_PAD(0x3ac, 0x1b4, 0x03, 0x48c, 2, NO_PAD_CTRL)
+#define MX25_PAD_KPP_ROW3__GPIO_3_0	IOMUX_PAD(0x3ac, 0x1b4, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_KPP_COL0__KPP_COL0	IOMUX_PAD(0x3b0, 0x1b8, 0x00, 0, 0, KPP_CTL_COL)
+#define MX25_PAD_KPP_COL0__UART4_RXD_MUX IOMUX_PAD(0x3b0, 0x1b8, 0x01, 0x570, 1, NO_PAD_CTRL)
+#define MX25_PAD_KPP_COL0__AUD5_TXD	IOMUX_PAD(0x3b0, 0x1b8, 0x02, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
+#define MX25_PAD_KPP_COL0__GPIO_3_1	IOMUX_PAD(0x3b0, 0x1b8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_KPP_COL1__KPP_COL1	IOMUX_PAD(0x3b4, 0x1bc, 0x00, 0, 0, KPP_CTL_COL)
+#define MX25_PAD_KPP_COL1__UART4_TXD_MUX IOMUX_PAD(0x3b4, 0x1bc, 0x01, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_KPP_COL1__AUD5_RXD	IOMUX_PAD(0x3b4, 0x1bc, 0x02, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
+#define MX25_PAD_KPP_COL1__GPIO_3_2	IOMUX_PAD(0x3b4, 0x1bc, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_KPP_COL2__KPP_COL2	IOMUX_PAD(0x3b8, 0x1c0, 0x00, 0, 0, KPP_CTL_COL)
+#define MX25_PAD_KPP_COL2__UART4_RTS	IOMUX_PAD(0x3b8, 0x1c0, 0x01, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_KPP_COL2__AUD5_TXC	IOMUX_PAD(0x3b8, 0x1c0, 0x02, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
+#define MX25_PAD_KPP_COL2__GPIO_3_3	IOMUX_PAD(0x3b8, 0x1c0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x00, 0, 0, KPP_CTL_COL)
+#define MX25_PAD_KPP_COL3__UART4_CTS	IOMUX_PAD(0x3bc, 0x1c4, 0x01, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_KPP_COL3__AUD5_TXFS	IOMUX_PAD(0x3bc, 0x1c4, 0x02, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
+#define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x02, 0x464, 1, NO_PAD_CTRL)
+#define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP | PAD_CTL_PUE)
+#define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x02, 0x460, 1, NO_PAD_CTRL)
+#define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x02, 0x474, 1, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x04, 0x484, 0, PAD_CTL_PUS_22K_UP)
+#define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
+#define MX25_PAD_FEC_TX_CLK__GPIO_3_13	IOMUX_PAD(0x3e0, 0x1e8, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_RTCK__RTCK		IOMUX_PAD(0x3e4, 0x1ec, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_RTCK__OWIRE		IOMUX_PAD(0x3e4, 0x1ec, 0x01, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_RTCK__GPIO_3_14	IOMUX_PAD(0x3e4, 0x1ec, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_DE_B__DE_B		IOMUX_PAD(0x3ec, 0x1f0, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_DE_B__GPIO_2_20	IOMUX_PAD(0x3ec, 0x1f0, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_TDO__TDO		IOMUX_PAD(0x3e8, 0x000, 0x00, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_GPIO_A__GPIO_A		IOMUX_PAD(0x3f0, 0x1f4, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_A__CAN1_TX	IOMUX_PAD(0x3f0, 0x1f4, 0x16, 0, 0, PAD_CTL_PUS_22K_UP)
+#define MX25_PAD_GPIO_A__USBOTG_PWR	IOMUX_PAD(0x3f0, 0x1f4, 0x02, 0, 0, PAD_CTL_PKE)
+
+#define MX25_PAD_GPIO_B__GPIO_B		IOMUX_PAD(0x3f4, 0x1f8, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_B__CAN1_RX	IOMUX_PAD(0x3f4, 0x1f8, 0x16, 0x480, 1, PAD_CTL_PUS_22K)
+#define MX25_PAD_GPIO_B__USBOTG_OC	IOMUX_PAD(0x3f4, 0x1f8, 0x02, 0x57c, 1, PAD_CTL_PUS_100K_UP)
+
+#define MX25_PAD_GPIO_C__GPIO_C		IOMUX_PAD(0x3f8, 0x1fc, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_C__CAN2_TX	IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP)
+
+#define MX25_PAD_GPIO_D__GPIO_D		IOMUX_PAD(0x3fc, 0x200, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_E__LD16		IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_D__CAN2_RX	IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP)
+
+#define MX25_PAD_GPIO_E__GPIO_E		IOMUX_PAD(0x400, 0x204, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_F__LD17		IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_E__AUD7_TXD	IOMUX_PAD(0x400, 0x204, 0x04, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_GPIO_F__GPIO_F		IOMUX_PAD(0x404, 0x208, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_F__AUD7_TXC	IOMUX_PAD(0x404, 0x208, 0x04, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_EXT_ARMCLK__EXT_ARMCLK	IOMUX_PAD(0x000, 0x20c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_EXT_ARMCLK__GPIO_3_15	IOMUX_PAD(0x000, 0x20c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_UPLL_BYPCLK__UPLL_BYPCLK IOMUX_PAD(0x000, 0x210, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_UPLL_BYPCLK__GPIO_3_16	IOMUX_PAD(0x000, 0x210, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_VSTBY_REQ__VSTBY_REQ	IOMUX_PAD(0x408, 0x214, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_VSTBY_REQ__AUD7_TXFS	IOMUX_PAD(0x408, 0x214, 0x04, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_VSTBY_REQ__GPIO_3_17	IOMUX_PAD(0x408, 0x214, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_VSTBY_ACK__VSTBY_ACK	IOMUX_PAD(0x40c, 0x218, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_VSTBY_ACK__GPIO_3_18	IOMUX_PAD(0x40c, 0x218, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_POWER_FAIL__POWER_FAIL	IOMUX_PAD(0x410, 0x21c, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_POWER_FAIL__AUD7_RXD	IOMUX_PAD(0x410, 0x21c, 0x04, 0x478, 1, NO_PAD_CTRL)
+#define MX25_PAD_POWER_FAIL__GPIO_3_19	IOMUX_PAD(0x410, 0x21c, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CLKO__CLKO		IOMUX_PAD(0x414, 0x220, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CLKO__GPIO_2_21	IOMUX_PAD(0x414, 0x220, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_BOOT_MODE0__BOOT_MODE0	IOMUX_PAD(0x000, 0x224, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_BOOT_MODE0__GPIO_4_30	IOMUX_PAD(0x000, 0x224, 0x05, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_BOOT_MODE1__BOOT_MODE1	IOMUX_PAD(0x000, 0x228, 0x00, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_BOOT_MODE1__GPIO_4_31	IOMUX_PAD(0x000, 0x228, 0x05, 0, 0, NO_PAD_CTRL)
+
+#define MX25_PAD_CTL_GRP_DVS_MISC	IOMUX_PAD(0x418, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_FEC	IOMUX_PAD(0x41c, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DVS_JTAG	IOMUX_PAD(0x420, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_NFC	IOMUX_PAD(0x424, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_CSI	IOMUX_PAD(0x428, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_WEIM	IOMUX_PAD(0x42c, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_DDR	IOMUX_PAD(0x430, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DVS_CRM	IOMUX_PAD(0x434, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_KPP	IOMUX_PAD(0x438, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_SDHC1	IOMUX_PAD(0x43c, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_LCD	IOMUX_PAD(0x440, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_UART	IOMUX_PAD(0x444, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DVS_NFC	IOMUX_PAD(0x448, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DVS_CSI	IOMUX_PAD(0x44c, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DSE_CSPI1	IOMUX_PAD(0x450, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DDRTYPE	IOMUX_PAD(0x454, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DVS_SDHC1	IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_CTL_GRP_DVS_LCD	IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL)
+
+#endif /* __MACH_IOMUX_MX25_H__ */
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
index 2901ee6..66dee8e 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
@@ -21,7 +21,7 @@
 
 #include <mach/iomux-v3.h>
 
-#define MX51_FEC_PAD_CTRL      (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRIVE_STRENGTH_HIGH)
+#define MX51_FEC_PAD_CTRL      (PAD_CTL_DVS | PAD_CTL_DSE_HIGH)
 
 /*
  * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode>
diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mach/iomux-v3.h
index 198286a..8a1adc2 100644
--- a/arch/arm/mach-imx/include/mach/iomux-v3.h
+++ b/arch/arm/mach-imx/include/mach/iomux-v3.h
@@ -68,32 +68,27 @@ struct pad_desc {
 /*
  * Use to set PAD control
  */
-#define PAD_CTL_DRIVE_VOLTAGE_3_3_V	(0)
-#define PAD_CTL_DRIVE_VOLTAGE_1_8_V	(1 << 13)
+#define PAD_CTL_DVS			(1 << 13)
+#define PAD_CTL_HYS			(1 << 8)
 
-#define PAD_CTL_NO_HYSTERESIS		(0)
-#define PAD_CTL_HYSTERESIS		(1 << 8)
+#define PAD_CTL_PKE			(1 << 7)
+#define PAD_CTL_PUE			(1 << 6)
+#define PAD_CTL_PUS_100K_DOWN		(0 << 4)
+#define PAD_CTL_PUS_47K_UP		(1 << 4)
+#define PAD_CTL_PUS_100K_UP		(2 << 4)
+#define PAD_CTL_PUS_22K_UP		(3 << 4)
 
-#define PAD_CTL_PULL_DISABLED		(0)
-#define PAD_CTL_PULL_KEEPER		(0xa << 4)
-#define PAD_CTL_PULL_DOWN_100K		(0xc << 4)
-#define PAD_CTL_PULL_UP_47K		(0xd << 4)
-#define PAD_CTL_PULL_UP_100K		(0xe << 4)
-#define PAD_CTL_PULL_UP_22K		(0xf << 4)
+#define PAD_CTL_ODE			(1 << 3)
 
-#define PAD_CTL_OUTPUT_CMOS		(0)
-#define PAD_CTL_OUTPUT_OPEN_DRAIN	(1 << 3)
+#define PAD_CTL_DSE_LOW			(0 << 1)
+#define PAD_CTL_DSE_MED			(1 << 1)
+#define PAD_CTL_DSE_HIGH		(2 << 1)
+#define PAD_CTL_DSE_MAX			(3 << 1)
 
-#define PAD_CTL_DRIVE_STRENGTH_LOW	(0 << 1)
-#define PAD_CTL_DRIVE_STRENGTH_MED	(1 << 1)
-#define PAD_CTL_DRIVE_STRENGTH_HIGH	(2 << 1)
-#define PAD_CTL_DRIVE_STRENGTH_MAX	(3 << 1)
+#define PAD_CTL_SRE_FAST		(1 << 0)
+#define PAD_CTL_SRE_SLOW		(0 << 0)
 
-#define PAD_CTL_SLEW_RATE_SLOW		0
-#define PAD_CTL_SLEW_RATE_FAST		1
-
-#define PAD_CTL_DRV_VOT_LOW            (0 << 13)
-#define PAD_CTL_DRV_VOT_HIGH           (1 << 13)
+#define IOMUX_CONFIG_SION		(0x1 << 4)
 
 /*
  * setups a single pad:
-- 
1.7.2.3



From mkl at pengutronix.de  Thu Feb 17 16:50:25 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Thu, 17 Feb 2011 22:50:25 +0100
Subject: No NAND access on AT91SAM9G20-EK
In-Reply-To: <20110210114858.GC11255@game.jcrosoft.org>
References: <AANLkTikb2tgLZhBYbunUG10Sz7FO3Yx_P1+5Fo0GonAD@mail.gmail.com>
	<20110210114858.GC11255@game.jcrosoft.org>
Message-ID: <4D5D9821.6070500@pengutronix.de>

Hello Jean-Christophe,

On 02/10/2011 12:48 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> 	which ecc did u use before?

I'm working on a at91sam9m10ek, using latest origin/next.

The ecc-mode is "hardcoded" to NAND_ECC_HW in
arch/arm/mach-at91/at91sam9g45_devices.c. I've got the same -74 problem
when reading from the nand.

Barebox fails to read the environment, even if barebox has written it.
After changing the ecc mode to soft the env can be read and written
without problems.

I ported the atmel nand driver from linux-2.6.37, which had no
significant differences.

cheers, Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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From mkl at pengutronix.de  Thu Feb 17 17:45:58 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Thu, 17 Feb 2011 23:45:58 +0100
Subject: No NAND access on AT91SAM9G20-EK
In-Reply-To: <4D5D9821.6070500@pengutronix.de>
References: <AANLkTikb2tgLZhBYbunUG10Sz7FO3Yx_P1+5Fo0GonAD@mail.gmail.com>
	<20110210114858.GC11255@game.jcrosoft.org>
	<4D5D9821.6070500@pengutronix.de>
Message-ID: <4D5DA526.1070801@pengutronix.de>

On 02/17/2011 10:50 PM, Marc Kleine-Budde wrote:
> Hello Jean-Christophe,
> 
> On 02/10/2011 12:48 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> 	which ecc did u use before?
> 
> I'm working on a at91sam9m10ek, using latest origin/next.
> 
> The ecc-mode is "hardcoded" to NAND_ECC_HW in
> arch/arm/mach-at91/at91sam9g45_devices.c. I've got the same -74 problem
> when reading from the nand.
> 
> Barebox fails to read the environment, even if barebox has written it.
> After changing the ecc mode to soft the env can be read and written
> without problems.
> 
> I ported the atmel nand driver from linux-2.6.37, which had no
> significant differences.

I just found in linux Kconfig:

> config MTD_NAND_ATMEL_ECC_HW
> 	bool "Hardware ECC"
> 	depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32

The sam9g45 is not listed here....Maybe we should hardcode "soft" in
barebox for the 9g45

regards,
Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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From plagnioj at jcrosoft.com  Fri Feb 18 03:55:24 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 18 Feb 2011 09:55:24 +0100
Subject: No NAND access on AT91SAM9G20-EK
In-Reply-To: <4D5DA526.1070801@pengutronix.de>
References: <AANLkTikb2tgLZhBYbunUG10Sz7FO3Yx_P1+5Fo0GonAD@mail.gmail.com>
	<20110210114858.GC11255@game.jcrosoft.org>
	<4D5D9821.6070500@pengutronix.de> <4D5DA526.1070801@pengutronix.de>
Message-ID: <20110218085524.GD17919@game.jcrosoft.org>

On 23:45 Thu 17 Feb     , Marc Kleine-Budde wrote:
> On 02/17/2011 10:50 PM, Marc Kleine-Budde wrote:
> > Hello Jean-Christophe,
> > 
> > On 02/10/2011 12:48 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >> 	which ecc did u use before?
> > 
> > I'm working on a at91sam9m10ek, using latest origin/next.
> > 
> > The ecc-mode is "hardcoded" to NAND_ECC_HW in
> > arch/arm/mach-at91/at91sam9g45_devices.c. I've got the same -74 problem
> > when reading from the nand.
> > 
> > Barebox fails to read the environment, even if barebox has written it.
> > After changing the ecc mode to soft the env can be read and written
> > without problems.
> > 
> > I ported the atmel nand driver from linux-2.6.37, which had no
> > significant differences.
> 
> I just found in linux Kconfig:
> 
> > config MTD_NAND_ATMEL_ECC_HW
> > 	bool "Hardware ECC"
> > 	depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32
> 
> The sam9g45 is not listed here....Maybe we should hardcode "soft" in
> barebox for the 9g45
I prefer we detect it as we could change it the kernel

Best Regards,
J.


From mkl at pengutronix.de  Fri Feb 18 06:33:03 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Fri, 18 Feb 2011 12:33:03 +0100
Subject: [PATCH] tags and cscope support really belongs in a shell script as
	they do not benefit from the make functionality.
Message-ID: <1298028783-29440-1-git-send-email-mkl@pengutronix.de>

From: Sam Ravnborg <sam at ravnborg.org>

Moving the support to a shell script has several benefits:
- The readability of the code has increased a lot
- More people is able to extend the tags support
- We see less changes to the top-level Makefile

The shell script version includes improvements from:
Alexey Dobriyan <adobriyan at gmail.com> (jump to kconfig symbols)
Alexey Dobriyan <adobriyan at gmail.com> (drop ./ in paths)
Ian Campbell <ijc at hellion.org.uk> (simplified find algorithms)

This version has a few caveats:
=> It does not support ALLSOURCE_ARCHS
   - it is easy to add if it is really used
=> It assumes all archs have moved to arch/$ARCH/include
   - until that happens we have a few additional hits in the archs

Signed-off-by: Sam Ravnborg <sam at ravnborg.org>
Cc: Alexey Dobriyan <adobriyan at gmail.com>
Tested-by: Ian Campbell <ijc at hellion.org.uk>

[mkl: ported from linux commit: a680eedc6c621c75695c68198533fc3c98f4053b]
Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---

Without the patch the TAGS are not properly generated by my ubuntu-10.04's
emacs-etags.

cheers, Marc

 Makefile        |  111 +-------------------------------------
 scripts/tags.sh |  160 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 163 insertions(+), 108 deletions(-)
 create mode 100755 scripts/tags.sh

diff --git a/Makefile b/Makefile
index 49901e0..99ac2bc 100644
--- a/Makefile
+++ b/Makefile
@@ -1111,115 +1111,10 @@ htmldocs: Doxyfile.version
 
 # Generate tags for editors
 # ---------------------------------------------------------------------------
+quiet_cmd_tags = GEN     $@
+      cmd_tags = $(CONFIG_SHELL) $(srctree)/scripts/tags.sh $@
 
-#We want __srctree to totally vanish out when KBUILD_OUTPUT is not set
-#(which is the most common case IMHO) to avoid unneeded clutter in the big tags file.
-#Adding $(srctree) adds about 20M on i386 to the size of the output file!
-
-ifeq ($(src),$(obj))
-__srctree =
-else
-__srctree = $(srctree)/
-endif
-
-ifeq ($(ALLSOURCE_ARCHS),)
-ifeq ($(ARCH),um)
-ALLINCLUDE_ARCHS := $(ARCH) $(SUBARCH)
-else
-ALLINCLUDE_ARCHS := $(ARCH)
-endif
-else
-#Allow user to specify only ALLSOURCE_PATHS on the command line, keeping existing behavour.
-ALLINCLUDE_ARCHS := $(ALLSOURCE_ARCHS)
-endif
-
-ALLSOURCE_ARCHS := $(ARCH)
-
-define find-sources
-        ( find $(__srctree) $(RCS_FIND_IGNORE) \
-	       \( -name include -o -name arch \) -prune -o \
-	       -name $1 -print; \
-	  for ARCH in $(ALLSOURCE_ARCHS) ; do \
-	       find $(__srctree)arch/$${ARCH} $(RCS_FIND_IGNORE) \
-	            -name $1 -print; \
-	  done ; \
-	  find $(__srctree)include $(RCS_FIND_IGNORE) \
-	       \( -name config -o -name 'asm-*' \) -prune \
-	       -o -name $1 -print; \
-	  for ARCH in $(ALLINCLUDE_ARCHS) ; do \
-	       test -e $(__srctree)include/asm-$${arch} && \
-	         find $(__srctree)include/asm-$${arch} $(RCS_FIND_IGNORE) \
-	           -name $1 -print; \
-	      test -e $(__srctree)arch/$${arch}/include/asm && \
-	        find $(__srctree)arch/$${arch}/include/asm $(RCS_FIND_IGNORE) \
-	            -name $1 -print; \
-	  done ; \
-	  find $(__srctree)include/asm-generic $(RCS_FIND_IGNORE) \
-	       -name $1 -print )
-endef
-
-define all-sources
-	$(call find-sources,'*.[chS]')
-endef
-define all-kconfigs
-	$(call find-sources,'Kconfig*')
-endef
-define all-defconfigs
-	$(call find-sources,'defconfig')
-endef
-
-define xtags
-	if $1 --version 2>&1 | grep -iq exuberant; then \
-	    $(all-sources) | xargs $1 -a \
-		-I __initdata,__exitdata,__acquires,__releases \
-		-I EXPORT_SYMBOL,EXPORT_SYMBOL_GPL \
-		--extra=+f --c-kinds=+px \
-		--regex-asm='/ENTRY\(([^)]*)\).*/\1/'; \
-	    $(all-kconfigs) | xargs $1 -a \
-		--langdef=kconfig \
-		--language-force=kconfig \
-		--regex-kconfig='/^[[:blank:]]*config[[:blank:]]+([[:alnum:]_]+)/\1/'; \
-	    $(all-defconfigs) | xargs -r $1 -a \
-		--langdef=dotconfig \
-		--language-force=dotconfig \
-		--regex-dotconfig='/^#?[[:blank:]]*(CONFIG_[[:alnum:]_]+)/\1/'; \
-	elif $1 --version 2>&1 | grep -iq emacs; then \
-	    $(all-sources) | xargs $1 -a; \
-	    $(all-kconfigs) | xargs $1 -a \
-		--regex='/^[ \t]*config[ \t]+\([a-zA-Z0-9_]+\)/\1/'; \
-	    $(all-defconfigs) | xargs -r $1 -a \
-		--regex='/^#?[ \t]?\(CONFIG_[a-zA-Z0-9_]+\)/\1/'; \
-	else \
-	    $(all-sources) | xargs $1 -a; \
-	fi
-endef
-
-quiet_cmd_cscope-file = FILELST cscope.files
-      cmd_cscope-file = (echo \-k; echo \-q; $(all-sources)) > cscope.files
-
-quiet_cmd_cscope = MAKE    cscope.out
-      cmd_cscope = cscope -b
-
-cscope: FORCE
-	$(call cmd,cscope-file)
-	$(call cmd,cscope)
-
-quiet_cmd_TAGS = MAKE   $@
-define cmd_TAGS
-	rm -f $@; \
-	$(call xtags,etags)
-endef
-
-TAGS: FORCE
-	$(call cmd,TAGS)
-
-quiet_cmd_tags = MAKE   $@
-define cmd_tags
-	rm -f $@; \
-	$(call xtags,ctags)
-endef
-
-tags: FORCE
+tags TAGS cscope: FORCE
 	$(call cmd,tags)
 
 
diff --git a/scripts/tags.sh b/scripts/tags.sh
new file mode 100755
index 0000000..47274dc
--- /dev/null
+++ b/scripts/tags.sh
@@ -0,0 +1,160 @@
+#!/bin/sh
+# Generate tags or cscope files
+# Usage tags.sh <mode>
+#
+# mode may be any of: tags, TAGS, cscope
+#
+# Uses the following environment variables:
+# ARCH, SUBARCH, srctree, src, obj
+
+if [ $KBUILD_VERBOSE == 1 ]; then
+	set -x
+fi
+
+# This is a duplicate of RCS_FIND_IGNORE without escaped '()'
+ignore="( -name SCCS -o -name BitKeeper -o -name .svn -o \
+          -name CVS  -o -name .pc       -o -name .hg  -o \
+          -name .git )                                   \
+          -prune -o"
+
+# Do not use full path is we do not use O=.. builds
+if [ ${src} == ${obj} ]; then
+	tree=
+else
+	tree=${srctree}
+fi
+
+# find sources in arch/$ARCH
+find_arch_sources()
+{
+	find ${tree}arch/$1 $ignore -name $2 -print;
+}
+
+# find sources in arch/$1/include
+find_arch_include_sources()
+{
+	find ${tree}arch/$1/include $ignore -name $2 -print;
+}
+
+# find sources in include/
+find_include_sources()
+{
+	find ${tree}include $ignore -name config -prune -o -name $1 -print;
+}
+
+# find sources in rest of tree
+# we could benefit from a list of dirs to search in here
+find_other_sources()
+{
+	find ${tree}* $ignore \
+	     \( -name include -o -name arch -o -name '.tmp_*' \) -prune -o \
+	       -name $1 -print;
+}
+
+find_sources()
+{
+	find_arch_sources $1 $2
+	find_include_sources $2
+	find_other_sources $2
+}
+
+all_sources()
+{
+	find_sources $SRCARCH *.[chS]
+	if [ ! -z "$archinclude" ]; then
+		find_arch_include_sources $archinclude *.[chS]
+	fi
+}
+
+all_kconfigs()
+{
+	find_sources $SRCARCH "Kconfig*"
+}
+
+all_defconfigs()
+{
+	find_sources $SRCARCH "defconfig"
+}
+
+docscope()
+{
+	(echo \-k; echo \-q; all_sources) > cscope.files
+	cscope -b -f cscope.out
+}
+
+exuberant()
+{
+	all_sources > all
+	all_sources | xargs $1 -a                               \
+	-I __initdata,__exitdata,__acquires,__releases          \
+	-I __read_mostly,____cacheline_aligned                  \
+	-I ____cacheline_aligned_in_smp                         \
+	-I ____cacheline_internodealigned_in_smp                \
+	-I EXPORT_SYMBOL,EXPORT_SYMBOL_GPL                      \
+	--extra=+f --c-kinds=+px                                \
+	--regex-asm='/^ENTRY\(([^)]*)\).*/\1/'
+
+	all_kconfigs | xargs $1 -a                              \
+	--langdef=kconfig --language-force=kconfig              \
+	--regex-kconfig='/^[[:blank:]]*(menu|)config[[:blank:]]+([[:alnum:]_]+)/\2/'
+
+	all_kconfigs | xargs $1 -a                              \
+	--langdef=kconfig --language-force=kconfig              \
+	--regex-kconfig='/^[[:blank:]]*(menu|)config[[:blank:]]+([[:alnum:]_]+)/CONFIG_\2/'
+
+	all_defconfigs | xargs -r $1 -a                         \
+	--langdef=dotconfig --language-force=dotconfig          \
+	--regex-dotconfig='/^#?[[:blank:]]*(CONFIG_[[:alnum:]_]+)/\1/'
+
+}
+
+emacs()
+{
+	all_sources | xargs $1 -a
+
+	all_kconfigs | xargs $1 -a                              \
+	--regex='/^[ \t]*\(\(menu\)*config\)[ \t]+\([a-zA-Z0-9_]+\)/\3/'
+
+	all_kconfigs | xargs $1 -a                              \
+	--regex='/^[ \t]*\(\(menu\)*config\)[ \t]+\([a-zA-Z0-9_]+\)/CONFIG_\3/'
+
+	all_defconfigs | xargs -r $1 -a                         \
+	--regex='/^#?[ \t]?\(CONFIG_[a-zA-Z0-9_]+\)/\1/'
+}
+
+xtags()
+{
+	if $1 --version 2>&1 | grep -iq exuberant; then
+		exuberant $1
+	elif $1 --version 2>&1 | grep -iq emacs; then
+		emacs $1
+	else
+		all_sources | xargs $1 -a
+        fi
+}
+
+
+# Support um (which uses SUBARCH)
+if [ ${ARCH} == um ]; then
+	if [ $SUBARCH == i386 ]; then
+		archinclude=x86
+	elif [ $SUBARCH == x86_64 ]; then
+		archinclude=x86
+	else
+		archinclude=${SUBARCH}
+	fi
+fi
+
+case "$1" in
+	"cscope")
+		docscope
+		;;
+
+	"tags")
+		xtags ctags
+		;;
+
+	"TAGS")
+		xtags etags
+		;;
+esac
-- 
1.7.2.3



From F.Vanalme at TELEVIC.com  Fri Feb 18 07:48:07 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Fri, 18 Feb 2011 13:48:07 +0100
Subject: SPI devices
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B0099F@SRV-VS06.TELEVIC.COM>

My i.MX27PDK board has the PHY chip on CSPI2 and the LCD on CSPI1. The PHY uses SS0 of CSPI2, the LCD uses SS2 of CSPI1.
I'm not sure if I'm doing it right when I implement it like this :

static int imx27pdk_spi_phy_cs[] = {GPIO_PORTD + 21};

static struct spi_imx_master imx27pdk_spi_1_data = {
    .chipselect = imx27pdk_spi_phy_cs,
    .num_chipselect = ARRAY_SIZE(imx27pdk_spi_phy_cs),
};

static int imx27pdk_spi_lcd_cs[] = {GPIO_PORTD + 26};

static struct spi_imx_master imx27pdk_spi_0_data = {
    .chipselect = imx27pdk_spi_lcd_cs,
    .num_chipselect = ARRAY_SIZE(imx27pdk_spi_lcd_cs),
};

static struct spi_board_info imx27pdk_spi_board_info[] = {
    {
      .name = "LCD",
      .max_speed_hz = 3000000,
      .bus_num = 0,
      .chip_select = 2,
    },
    {
      .name = "mc13783",
      .max_speed_hz = 3000000,
      .bus_num = 1,
      .chip_select = 0,
    },
};

spi_register_board_info(imx27pdk_spi_board_info, ARRAY_SIZE(imx27pdk_spi_board_info));
imx27_add_spi0(&imx27pdk_spi_0_data);
imx27_add_spi1(&imx27pdk_spi_1_data);


Is this OK ? I.e. I'm not sure how to use bus_num and chip_select


Filip 



From F.Vanalme at TELEVIC.com  Mon Feb 21 04:16:20 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Mon, 21 Feb 2011 10:16:20 +0100
Subject: iMX27 NFC
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00A2F@SRV-VS06.TELEVIC.COM>

Just wanna come back once more on the iMX27 NFC bug issue.
I see that Barebox also supports other boards that have the iMX27 processor, e.g. PhyCard and Eukrea iMX27. Don't know the boards, but  I guess they all suffer from the NFC bug as they all use the i.MX27 processor. Just wondering how they solve the problem of that bug ? As a workaround (swapping Bi-byte) is not implemented in the "standard" imx nand driver, they may handle this issue differently. (maybe this is rather a  question for their mailing lists...)
I'm still struggling with the NAND issue and whether to add a patch to swap bytes, or doing a run-once swap when using the NAND for the first time so the BI byte is always in the right location for the standard driver. It feels like the latter solution is the best because one can use the drivers (Barebox and Linux kernel) as they are, without any modifications. For the Kernel, Freescale opt obviously for patches. Patches we have to port if we want to use a recent Kernel version...
Maybe there's a way to add that "run-once" piece of code to the board's start-up code. If, when booting, I could detect in some way that the "conversion" was done already, I could skip that part of the code and continue normally. (maybe I can use the oob data of the first block to add a kind of a marker - if marker not set, read the factory bad blocks and move them in flash so they match for the standard driver and set the marker. If marker set, skip moving part, and continue with normal boot code). 
Maybe people on this mailing list have other/better ideas/solutions to deal with this.




Filip



From franck.jullien at gmail.com  Mon Feb 21 17:02:30 2011
From: franck.jullien at gmail.com (Franck JULLIEN)
Date: Mon, 21 Feb 2011 23:02:30 +0100
Subject: Submission of the Altera nios2 port
Message-ID: <AANLkTi=btK3R6C6KTF8HALSx5z9jKowYGN9iApPfca5S@mail.gmail.com>

Hello,

I'm ready to submit the nios2 port. However, I don't know what to commit....
I was about to commit the serial and Ethernet drivers in two separate
commits.
Should I post those ones first ? Or should a send you arch/nios2 files first
?
How much files per commits ?

Thanks,
Franck.
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From r.schwebel at pengutronix.de  Mon Feb 21 17:10:37 2011
From: r.schwebel at pengutronix.de (Robert Schwebel)
Date: Mon, 21 Feb 2011 23:10:37 +0100
Subject: Submission of the Altera nios2 port
In-Reply-To: <AANLkTi=btK3R6C6KTF8HALSx5z9jKowYGN9iApPfca5S@mail.gmail.com>
References: <AANLkTi=btK3R6C6KTF8HALSx5z9jKowYGN9iApPfca5S@mail.gmail.com>
Message-ID: <20110221221037.GJ26213@pengutronix.de>

On Mon, Feb 21, 2011 at 11:02:30PM +0100, Franck JULLIEN wrote:
> I'm ready to submit the nios2 port. However, I don't know what to commit....
> I was about to commit the serial and Ethernet drivers in two separate commits.
> Should I post those ones first ? Or should a send you arch/nios2 files first ?
> How much files per commits ?

Please follow the kernel guidelines for patch submission: one topic per
patch, start with the core first and then add drivers. Please follow the
canonical patch format (which comes out of git automatically if you use
it).

rsc
-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From mkl at pengutronix.de  Tue Feb 22 06:13:03 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:13:03 +0100
Subject: [PATCH 1/3] at91sam9g45_devices: fix compilation if NAND driver is
	enabled
In-Reply-To: <1298373185-27624-1-git-send-email-mkl@pengutronix.de>
References: <1298373185-27624-1-git-send-email-mkl@pengutronix.de>
Message-ID: <1298373185-27624-2-git-send-email-mkl@pengutronix.de>

From: Juergen Beisert <jbe at pengutronix.de>

Enabling the AT91 NAND driver fails with the following error:

arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_nand':
arch/arm/mach-at91/at91sam9g45_devices.c:101: error: 'NAND_ECC_HW' undeclared (first use in this function)

Include the missing "nand.h".

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---
 arch/arm/mach-at91/at91sam9g45_devices.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index ddb005a..306d1e4 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -17,6 +17,7 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/io.h>
+#include <linux/mtd/nand.h>
 
 #include "generic.h"
 
-- 
1.7.2.3



From mkl at pengutronix.de  Tue Feb 22 06:13:02 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:13:02 +0100
Subject: [PATCH 0/3] at91 fixes
Message-ID: <1298373185-27624-1-git-send-email-mkl@pengutronix.de>

Hello,

this patch series fixes some problems on the at91sam9g45 and adds support for
flash based bad block table to the atmel nand driver.

The following changes since commit 58ec1a81a16a758bc6125f7736d13137c5b7e17f:

  Merge branch 'tx25' into next (2011-02-18 11:11:48 +0100)

are available in the git repository at:

  git://git.pengutronix.de/git/mkl/barebox.git at91

Juergen Beisert (1):
      at91sam9g45_devices: fix compilation if NAND driver is enabled

Marc Kleine-Budde (2):
      at91sam9g45_devices: don't hardcode nand ecc mode
      atmel_nand: add support for flash based bad block table

 arch/arm/mach-at91/at91sam9g45_devices.c |    2 +-
 arch/arm/mach-at91/include/mach/board.h  |    1 +
 drivers/mtd/nand/atmel_nand.c            |    5 +++++
 3 files changed, 7 insertions(+), 1 deletions(-)

regards, Marc



From mkl at pengutronix.de  Tue Feb 22 06:13:04 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:13:04 +0100
Subject: [PATCH 2/3] at91sam9g45_devices: don't hardcode nand ecc mode
In-Reply-To: <1298373185-27624-1-git-send-email-mkl@pengutronix.de>
References: <1298373185-27624-1-git-send-email-mkl@pengutronix.de>
Message-ID: <1298373185-27624-3-git-send-email-mkl@pengutronix.de>

Hardware is currently not working on the at91sam9g45. So give the user a
change to specify software ecc mode.

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/mach-at91/at91sam9g45_devices.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 306d1e4..9e2c572 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -99,7 +99,6 @@ void at91_add_device_nand(struct atmel_nand_data *data)
 		return;
 
 	data->ecc_base = (void __iomem *)(AT91_BASE_SYS + AT91_ECC);
-	data->ecc_mode = NAND_ECC_HW;
 
 	csa = at91_sys_read(AT91_MATRIX_EBICSA);
 	at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
-- 
1.7.2.3



From mkl at pengutronix.de  Tue Feb 22 06:13:05 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:13:05 +0100
Subject: [PATCH 3/3] atmel_nand: add support for flash based bad block table
In-Reply-To: <1298373185-27624-1-git-send-email-mkl@pengutronix.de>
References: <1298373185-27624-1-git-send-email-mkl@pengutronix.de>
Message-ID: <1298373185-27624-4-git-send-email-mkl@pengutronix.de>

Inspired by Simon Polette's the kernel commit
f4fa697c26bcd9e942de26bad970f4de1da5a49b.

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---
 arch/arm/mach-at91/include/mach/board.h |    1 +
 drivers/mtd/nand/atmel_nand.c           |    5 +++++
 2 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 1ab05ad..34a3966 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -34,6 +34,7 @@ struct atmel_nand_data {
 	u8		ale;		/* address line number connected to ALE */
 	u8		cle;		/* address line number connected to CLE */
 	u8		bus_width_16;	/* buswidth is 16 bit */
+	u8		flash_bbt;	/* use a flash based bbt */
 	u8		ecc_mode;	/* NAND_ECC_* */
 };
 
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index e8f85fc..85e4b24 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -436,6 +436,11 @@ static int __init atmel_nand_probe(struct device_d *dev)
 		}
 	}
 
+	if (host->board->flash_bbt) {
+		printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
+		nand_chip->options |= NAND_USE_FLASH_BBT;
+	}
+
 	/* first scan to find the device and get the page size */
 	if (nand_scan_ident(mtd, 1)) {
 		res = -ENXIO;
-- 
1.7.2.3



From mkl at pengutronix.de  Tue Feb 22 06:32:43 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:32:43 +0100
Subject: [PATCH V2 0/3] at91 fixes
Message-ID: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>

Hello,

this patch series fixes some problems on the at91sam9g45 and adds support for
flash based bad block table to the atmel nand driver.

changes since V1:

- fix wording in commit message

The following changes since commit 58ec1a81a16a758bc6125f7736d13137c5b7e17f:

  Merge branch 'tx25' into next (2011-02-18 11:11:48 +0100)

are available in the git repository at:

  git://git.pengutronix.de/git/mkl/barebox.git at91

Juergen Beisert (1):
      at91sam9g45_devices: fix compilation if NAND driver is enabled

Marc Kleine-Budde (2):
      at91sam9g45_devices: don't hardcode nand ecc mode
      atmel_nand: add support for flash based bad block table

 arch/arm/mach-at91/at91sam9g45_devices.c |    2 +-
 arch/arm/mach-at91/include/mach/board.h  |    1 +
 drivers/mtd/nand/atmel_nand.c            |    5 +++++
 3 files changed, 7 insertions(+), 1 deletions(-)




From mkl at pengutronix.de  Tue Feb 22 06:32:44 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:32:44 +0100
Subject: [PATCH V2 1/3] at91sam9g45_devices: fix compilation if NAND driver is
	enabled
In-Reply-To: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
References: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
Message-ID: <1298374366-6956-2-git-send-email-mkl@pengutronix.de>

From: Juergen Beisert <jbe at pengutronix.de>

Enabling the AT91 NAND driver fails with the following error:

arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_nand':
arch/arm/mach-at91/at91sam9g45_devices.c:101: error: 'NAND_ECC_HW' undeclared (first use in this function)

Include the missing "nand.h".

Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---
 arch/arm/mach-at91/at91sam9g45_devices.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index ddb005a..306d1e4 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -17,6 +17,7 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/io.h>
+#include <linux/mtd/nand.h>
 
 #include "generic.h"
 
-- 
1.7.2.3



From mkl at pengutronix.de  Tue Feb 22 06:32:46 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:32:46 +0100
Subject: [PATCH V2 3/3] atmel_nand: add support for flash based bad block table
In-Reply-To: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
References: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
Message-ID: <1298374366-6956-4-git-send-email-mkl@pengutronix.de>

Inspired by Simon Polette's kernel commit
f4fa697c26bcd9e942de26bad970f4de1da5a49b.

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
---

Changes since V1:
- better commit message

 arch/arm/mach-at91/include/mach/board.h |    1 +
 drivers/mtd/nand/atmel_nand.c           |    5 +++++
 2 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 1ab05ad..34a3966 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -34,6 +34,7 @@ struct atmel_nand_data {
 	u8		ale;		/* address line number connected to ALE */
 	u8		cle;		/* address line number connected to CLE */
 	u8		bus_width_16;	/* buswidth is 16 bit */
+	u8		flash_bbt;	/* use a flash based bbt */
 	u8		ecc_mode;	/* NAND_ECC_* */
 };
 
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index e8f85fc..85e4b24 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -436,6 +436,11 @@ static int __init atmel_nand_probe(struct device_d *dev)
 		}
 	}
 
+	if (host->board->flash_bbt) {
+		printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
+		nand_chip->options |= NAND_USE_FLASH_BBT;
+	}
+
 	/* first scan to find the device and get the page size */
 	if (nand_scan_ident(mtd, 1)) {
 		res = -ENXIO;
-- 
1.7.2.3



From mkl at pengutronix.de  Tue Feb 22 06:32:45 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Tue, 22 Feb 2011 12:32:45 +0100
Subject: [PATCH V2 2/3] at91sam9g45_devices: don't hardcode nand ecc mode
In-Reply-To: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
References: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
Message-ID: <1298374366-6956-3-git-send-email-mkl@pengutronix.de>

Hardware ECC is currently not working on the at91sam9g45. So give the user a
change to specify software ecc mode.

Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---

Changes since V1:
- better commit message

 arch/arm/mach-at91/at91sam9g45_devices.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 306d1e4..9e2c572 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -99,7 +99,6 @@ void at91_add_device_nand(struct atmel_nand_data *data)
 		return;
 
 	data->ecc_base = (void __iomem *)(AT91_BASE_SYS + AT91_ECC);
-	data->ecc_mode = NAND_ECC_HW;
 
 	csa = at91_sys_read(AT91_MATRIX_EBICSA);
 	at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
-- 
1.7.2.3



From plagnioj at jcrosoft.com  Tue Feb 22 07:02:28 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Tue, 22 Feb 2011 13:02:28 +0100
Subject: [PATCH V2 2/3] at91sam9g45_devices: don't hardcode nand ecc mode
In-Reply-To: <1298374366-6956-3-git-send-email-mkl@pengutronix.de>
References: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
	<1298374366-6956-3-git-send-email-mkl@pengutronix.de>
Message-ID: <20110222120228.GD31436@game.jcrosoft.org>

On 12:32 Tue 22 Feb     , Marc Kleine-Budde wrote:
> Hardware ECC is currently not working on the at91sam9g45. So give the user a
> change to specify software ecc mode.
> 
> Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
I prefer we detect it in the nand driver
than the user select it
and ise the user choice if not detection failled or forced

Best Regards,
J.


From plagnioj at jcrosoft.com  Tue Feb 22 07:03:12 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Tue, 22 Feb 2011 13:03:12 +0100
Subject: [PATCH V2 3/3] atmel_nand: add support for flash based bad
	block table
In-Reply-To: <1298374366-6956-4-git-send-email-mkl@pengutronix.de>
References: <1298374366-6956-1-git-send-email-mkl@pengutronix.de>
	<1298374366-6956-4-git-send-email-mkl@pengutronix.de>
Message-ID: <20110222120312.GE31436@game.jcrosoft.org>

On 12:32 Tue 22 Feb     , Marc Kleine-Budde wrote:
> Inspired by Simon Polette's kernel commit
> f4fa697c26bcd9e942de26bad970f4de1da5a49b.
> 
> Signed-off-by: Marc Kleine-Budde <mkl at pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>

Best Regards,
J.


From F.Vanalme at TELEVIC.com  Tue Feb 22 08:15:46 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Tue, 22 Feb 2011 14:15:46 +0100
Subject: booting kernel(s)
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00AF4@SRV-VS06.TELEVIC.COM>

On our i.MX27 based board, we would like to have two Kernels : a default kernel and a "rescue" kernel. The first one is the one that will be started normally. The latter would be used only in (the rare) case the default kernel fails to start. E.g., when we remotely update the kernel, it could be that the uploaded image gets corrupt and cannot be started anymore. In that case, we would like to fall back to a "rescue" kernel, a minimal kernel and a small application with a minimum of capabilities, i.e. with some network capabilities just to be able to upload a new image.
We already have this feature for another device that runs U-boot. I guess this should also be possible in barebox ?
Because it was implemented in U-boot some time ago by another company, I'm not completely sure how it is done. I think it's done with this single line in the board's configuration file :
#define CONFIG_BOOTCOMMAND   "bootm 0x20200000;bootm 0x200A0000"
I guess, when the first bootm command fails (due to corrupt image), it will execute the second one. If the first command is successful, the Linux kernel takes over and the second command gets never executed. Am I right ?
I think I can do the same thing in my Barebox's boot script, can I ? Or are there other/better solutions to handle this ?



Filip



From jbe at pengutronix.de  Tue Feb 22 16:20:48 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 22 Feb 2011 22:20:48 +0100
Subject: [RFC] Add more changes to make the mini2440 work
Message-ID: <1298409650-28408-1-git-send-email-jbe@pengutronix.de>

It seems there are more variants of the mini2440 in the wild than I ever
thought.

If there is someone out there with a different SDRAM and NAND setting than my
system, please test this patches on top of barebox-next. My SDRAM is of type
Hynix HY57V561620FTP-H and my NAND is of type Samsung K9F1208U0C.
It seems my NAND is the only type with 512 byte pages. All other possible
NAND devices (K9F1G08UOB, K9F2G08UOB, K9K8G08U0A) are using 2048 bytes per
page. This difference is important when booting from NAND. So, I add a menu
entry to select 512 or 2048 bytes per page. I have no idea how to handle this
in a different/generic way, as it's hard to detect the NAND device at this
early point of time when the system starts after reset.

Comments are welcome.

jbe



From jbe at pengutronix.de  Tue Feb 22 16:20:50 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 22 Feb 2011 22:20:50 +0100
Subject: [PATCH 2/2] mini2440: Consider correct NAND page size for boot.
In-Reply-To: <1298409650-28408-1-git-send-email-jbe@pengutronix.de>
References: <1298409650-28408-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1298409650-28408-3-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

When booting from NAND, its important to know the correct page size.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |   22 +++++++++++++++++++++-
 arch/arm/mach-s3c24xx/Kconfig       |   25 +++++++++++++++++++++++++
 2 files changed, 46 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 6842a79..d710e6d 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -279,9 +279,20 @@ static int mini2440_devices_init(void)
 device_initcall(mini2440_devices_init);
 
 #ifdef CONFIG_S3C24XX_NAND_BOOT
+/*
+ * To make barebox booting from NAND the page size must be known, as
+ * there is no way to autodetect it at this early point of boot time.
+ */
+#ifdef CONFIG_MACH_MINI2440_NAND_512B_PAGE_SIZE
+# define NAND_PAGE_SIZE 512
+#endif
+#ifdef CONFIG_MACH_MINI2440_NAND_2048B_PAGE_SIZE
+# define NAND_PAGE_SIZE 2048
+#endif
+
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
+	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, NAND_PAGE_SIZE);
 }
 #endif
 
@@ -388,6 +399,15 @@ Using the default configuration:
 make ARCH=arm mini2440_defconfig
 @endcode
 
+To make barebox booting from NAND you must define the page size of the NAND
+in use on your mini2440. Run the menuconfig
+
+ at code
+make ARCH=arm menuconfig
+ at endcode
+
+and select the corresponding NAND device in the 'Board specific settings' menu.
+
 Build the binary image:
 
 @code
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 33d230c..eaa955f 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -67,6 +67,31 @@ config MACH_A9M2410DEV
 
 endchoice
 
+choice
+	prompt "NAND flash size"
+	depends on MACH_MINI2440
+
+config MACH_MINI2440_NAND_512B_PAGE_SIZE
+	bool
+	prompt "is 64 MiB or less"
+	help
+	  Select this if your mini2440 is shipped with a NAND flash with 64 MiB
+	  or less in size. This is true for the Samsung 'K9F1208U0C' device.
+	  Or select this entry, if you are sure, your NAND comes with a page
+	  size of 512 bytes.
+
+config MACH_MINI2440_NAND_2048B_PAGE_SIZE
+	bool
+	prompt "is 128 MiB or more"
+	help
+	  Select this if your mini2440 is shipped with a NAND flash with
+	  128 MiB or more in size. This is true for the Samsung 'K9F1G08UOB',
+	  'K9F2G08UOB' or 'K9K8G08U0A' devices.
+	  Or select this entry, if you are sure, your NAND comes with a page
+	  size of 2048 bytes.
+
+endchoice
+
 endmenu
 
 menu "S3C24X0 Features              "
-- 
1.7.2.3



From jbe at pengutronix.de  Tue Feb 22 16:20:49 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 22 Feb 2011 22:20:49 +0100
Subject: [PATCH 1/2] mini2440: Add more info about possible SDRAM and flash
	devices
In-Reply-To: <1298409650-28408-1-git-send-email-jbe@pengutronix.de>
References: <1298409650-28408-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1298409650-28408-2-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

It seems there are various combinations of the mini2440 in the wild. Not only
the SDRAM differ, but more important the NAND also differs.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |   54 ++++++++++++++++++++++++----------
 1 files changed, 38 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index ab309a0..6842a79 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -316,23 +316,45 @@ This system is based on a Samsung S3C2440 CPU. The card is shipped with:
 - 12 MHz crystal reference
 - 32.768 kHz crystal reference
 - SDRAM 64 MiB (one bank only)
-   - HY57V561620 (two devices for 64 MiB to form a 32 bit bus)
-     - 4M x 16bit x 4 Banks Mobile SDRAM
-     - 8192 refresh cycles / 64 ms
-     - CL2\@100 MHz
-     - 133 MHz max
-     - collumn address size is 9 bits
-     - row address size is 13 bits
-   - MT48LC16M16 (two devices for 64 MiB to form a 32 bit bus)
-     - 4M x 16bit x 4 Banks Mobile SDRAM
-     - commercial & industrial type
-     - 8192 refresh cycles / 64 ms
-     - CL2\@100 MHz
-     - 133 MHz max
-     - collumn address size is 9 bits
-     - row address size is 13 bits
+   - Hynix SDRAM
+    - HY57V561620FTP-H (two devices for 64 MiB to form a 32 bit bus)
+      - 4M x 16bit x 4 Banks Mobile SDRAM
+      - 8192 refresh cycles / 64 ms
+      - CL2\@100 MHz
+      - 133 MHz max
+      - collumn address size is 9 bits
+      - row address size is 13 bits
+   - Micron SDRAM
+    - MT48LC16M16A2-75IT (two devices for 64 MiB to form a 32 bit bus)
+    - MT48LC16M16A2-7E (two devices for 64 MiB to form a 32 bit bus)
+      - 4M x 16bit x 4 Banks Mobile SDRAM
+      - commercial & industrial type
+      - 8192 refresh cycles / 64 ms
+      - CL2\@100 MHz
+      - 133 MHz max
+      - collumn address size is 9 bits
+      - row address size is 13 bits
 - NAND Flash 128MiB...1GiB
-   - K9Fxx08
+   - K9F1208U0C
+      - VID: 0xec, DID: 0x76
+      - Samsung/64MiB 3,3V 8-bit
+      - 512 + 8 bytes per page
+      - 16 kiB block size
+   - K9F1G08UOB
+      - VID: 0xec, DID: 0xf1
+      - Samsung/128MiB 3,3V 8-bit
+      - 2048 + 64 bytes per page
+      - 128 kiB block size
+   - K9F2G08UOB
+      - VID: 0xec, DID: 0xda
+      - Samsung/256MiB 3,3V 8-bit
+      - 2048 + 64 bytes per page
+      - 128 kiB block size
+   - K9K8G08U0A
+      - VID: 0xec, DID: 0xd3
+      - Samsung/1GiB 3,3V 8-bit
+      - 2048 + 64 bytes per page
+      - 128 kiB block size
 - NOR Flash (up to 22 address lines available)
    - AM29LV160DB, 2 MiB
    - SST39VF1601, 2 MiB
-- 
1.7.2.3



From jbe at pengutronix.de  Tue Feb 22 16:21:52 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Tue, 22 Feb 2011 22:21:52 +0100
Subject: Doxygen based documentation fades out?
Message-ID: <201102222221.52797.jbe@pengutronix.de>

Hi Sascha,

as the Doxygen based documentation in barebox should fade out, what is the 
alternative to add useful documentation to this project now?

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From eric at eukrea.com  Tue Feb 22 18:59:54 2011
From: eric at eukrea.com (Eric Benard)
Date: Wed, 23 Feb 2011 00:59:54 +0100
Subject: [PATCH] lib/decompress_unlzo: use fill and full to read and write
	data
In-Reply-To: <1296209604-29790-1-git-send-email-plagnioj@jcrosoft.com>
References: <1296209604-29790-1-git-send-email-plagnioj@jcrosoft.com>
Message-ID: <4D644DFA.9070706@eukrea.com>

Hi Jean Christophe,

On 28/01/2011 11:13, Jean-Christophe PLAGNIOL-VILLARD wrote:
> this will all to simplify the sync with the kernel and later easly add the
> self decompression support to barebox
>
> as example with a lzo compression will reduce barebox from 180224 to 99863
> bytes so 55.41%
> -rwxr-xr-x 1 root root  99863 Jan 28 02:17 build/versatilepb/barebox.bin.lzo
>
> we also reduce the binary size by 224 bytes
>
> Old version
> # ls -al build/versatilepb/barebox.bin
> -rwxr-xr-x 1 root root 180468 Jan 28 02:14 build/versatilepb/barebox.bin
>
> New version
> # ls -al build/versatilepb/barebox*
> -rwxr-xr-x 1 root root 180244 Jan 28 02:13 build/versatilepb/barebox.bin
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD<plagnioj at jcrosoft.com>

unfortunatly, this commit breaks unlzo in barebox :
unlzo logo.bmp.lzo logo.bmp stays blocked forever
reverting this commit unbreak the unlzo command.

Eric


From zoltan at bendor.com.au  Tue Feb 22 23:00:37 2011
From: zoltan at bendor.com.au (zoltan at bendor.com.au)
Date: Wed, 23 Feb 2011 15:00:37 +1100 (EST)
Subject: [PATCH 2/2] mini2440: Consider correct NAND page size for boot.
In-Reply-To: <1298409650-28408-3-git-send-email-jbe@pengutronix.de>
Message-ID: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>

On Tue, 22 Feb 2011, Juergen Beisert wrote:

> From: Juergen Beisert <juergen at kreuzholzen.de>
>
> When booting from NAND, its important to know the correct page size.

Isn't that info available as soon as SteppingStone sucked in the first 4K
into the internal SRAM?

As far as I can follow the s3c2440 manual, bit 0 and the read-only bits 1
to 3 of the NFCONF register convey that information and these bits are set
by sampling a few GPIO (NCON and GPG13-GPG15) pins at reset. Supposedly
these pins are pulled up/low during reset so that SteppingStone itself can
read the boot code from the NAND.

What am I missing?

Zoltan



From jbe at pengutronix.de  Wed Feb 23 02:26:59 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 23 Feb 2011 08:26:59 +0100
Subject: [PATCH 2/2] mini2440: Consider correct NAND page size for boot.
In-Reply-To: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>
References: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>
Message-ID: <201102230826.59603.jbe@pengutronix.de>

zoltan at bendor.com.au wrote:
> On Tue, 22 Feb 2011, Juergen Beisert wrote:
> > From: Juergen Beisert <juergen at kreuzholzen.de>
> >
> > When booting from NAND, its important to know the correct page size.
>
> Isn't that info available as soon as SteppingStone sucked in the first 4K
> into the internal SRAM?
>
> As far as I can follow the s3c2440 manual, bit 0 and the read-only bits 1
> to 3 of the NFCONF register convey that information and these bits are set
> by sampling a few GPIO (NCON and GPG13-GPG15) pins at reset. Supposedly
> these pins are pulled up/low during reset so that SteppingStone itself can
> read the boot code from the NAND.
>
> What am I missing?

Hmm, good idea. I will try it. Thanks for the hint.

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Wed Feb 23 04:03:10 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Wed, 23 Feb 2011 10:03:10 +0100
Subject: booting kernel(s)
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00AF4@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00AF4@SRV-VS06.TELEVIC.COM>
Message-ID: <20110223090310.GG7381@pengutronix.de>

On Tue, Feb 22, 2011 at 02:15:46PM +0100, Vanalme Filip wrote:
> On our i.MX27 based board, we would like to have two Kernels : a
> default kernel and a "rescue" kernel. The first one is the one that
> will be started normally. The latter would be used only in (the rare)
> case the default kernel fails to start. E.g., when we remotely update
> the kernel, it could be that the uploaded image gets corrupt and
> cannot be started anymore. In that case, we would like to fall back to
> a "rescue" kernel, a minimal kernel and a small application with a
> minimum of capabilities, i.e. with some network capabilities just to
> be able to upload a new image.  We already have this feature for
> another device that runs U-boot. I guess this should also be possible
> in barebox ?

Sure. You have to adjust your partitioning to store a second kernel
and maybe a second rootfs.

> Because it was implemented in U-boot some time ago by
> another company, I'm not completely sure how it is done. I think it's
> done with this single line in the board's configuration file : #define
> CONFIG_BOOTCOMMAND   "bootm 0x20200000;bootm 0x200A0000"

This works for the case the checksum in the first kernel image is wrong.
Then the second bootm command will be executed.

In barebox this would look like this:

nand_parts=256k(barebox),256k(barebox_env),2M(kernel1),2M(kernel2),-(root)

...

bootm /dev/nand0.kernel1.bb; bootm /dev/nand0.kernel2.bb

> I guess, when
> the first bootm command fails (due to corrupt image), it will execute
> the second one. If the first command is successful, the Linux kernel
> takes over and the second command gets never executed. Am I right ?  I
> think I can do the same thing in my Barebox's boot script, can I ? Or
> are there other/better solutions to handle this ?

This fails when the first kernel has a valid checksum but fails to start
maybe because of a corrupt rootfs. But there are currently no general
solutions for this.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From baruch at tkos.co.il  Wed Feb 23 04:16:52 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Wed, 23 Feb 2011 11:16:52 +0200
Subject: booting kernel(s)
In-Reply-To: <20110223090310.GG7381@pengutronix.de>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00AF4@SRV-VS06.TELEVIC.COM>
	<20110223090310.GG7381@pengutronix.de>
Message-ID: <20110223091652.GA339@jasper.tkos.co.il>

Hi Sascha, Vanalme,

On Wed, Feb 23, 2011 at 10:03:10AM +0100, Sascha Hauer wrote:
> On Tue, Feb 22, 2011 at 02:15:46PM +0100, Vanalme Filip wrote:
> > I guess, when
> > the first bootm command fails (due to corrupt image), it will execute
> > the second one. If the first command is successful, the Linux kernel
> > takes over and the second command gets never executed. Am I right ?  I
> > think I can do the same thing in my Barebox's boot script, can I ? Or
> > are there other/better solutions to handle this ?
> 
> This fails when the first kernel has a valid checksum but fails to start
> maybe because of a corrupt rootfs. But there are currently no general
> solutions for this.

A partial solution is to use initramfs (see the kernel 
Documentation/filesystems/ramfs-rootfs-initramfs.txt). You can mount your 
rootfs from the /init script of the initramfs. Then, if mount fails because of 
a corrupt rootfs, you can mount your rescue rootfs instead, or just run 
whatever rescue application you want directly from initramfs.

Another partial solution is a to use a hardware watchdog, and a userspace 
watchdog ping process. Then, upon boot you may check whether this is a normal 
power-on reset or a watchdog reset, and load the appropriate kernel.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From jacmet at sunsite.dk  Wed Feb 23 04:56:50 2011
From: jacmet at sunsite.dk (Peter Korsgaard)
Date: Wed, 23 Feb 2011 10:56:50 +0100
Subject: booting kernel(s)
In-Reply-To: <20110223091652.GA339@jasper.tkos.co.il> (Baruch Siach's message
	of "Wed, 23 Feb 2011 11:16:52 +0200")
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00AF4@SRV-VS06.TELEVIC.COM>
	<20110223090310.GG7381@pengutronix.de>
	<20110223091652.GA339@jasper.tkos.co.il>
Message-ID: <87y657xee5.fsf@macbook.be.48ers.dk>

>>>>> "Baruch" == Baruch Siach <baruch at tkos.co.il> writes:

 Baruch> A partial solution is to use initramfs (see the kernel
 Baruch> Documentation/filesystems/ramfs-rootfs-initramfs.txt). You can
 Baruch> mount your rootfs from the /init script of the initramfs. Then,
 Baruch> if mount fails because of a corrupt rootfs, you can mount your
 Baruch> rescue rootfs instead, or just run whatever rescue application
 Baruch> you want directly from initramfs.

This only works if mount does a complete rootfs check, which isn't the
case. In the typical situation of a power loss in the middle of an
update, the superblock will normally be valid and you will only discover
the corruption when you start accessing files.

 Baruch> Another partial solution is a to use a hardware watchdog, and a
 Baruch> userspace watchdog ping process. Then, upon boot you may check
 Baruch> whether this is a normal power-on reset or a watchdog reset,
 Baruch> and load the appropriate kernel.

That's imho a better solution, and pretty simply to implement without
any adverse affects on the startup time, whereas the CRC checks do add
to the startup time.

-- 
Bye, Peter Korsgaard


From jbe at pengutronix.de  Wed Feb 23 10:20:30 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 23 Feb 2011 16:20:30 +0100
Subject: [PATCH 2/2] mini2440: Consider correct NAND page size for boot.
In-Reply-To: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>
References: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>
Message-ID: <201102231620.30283.jbe@pengutronix.de>

zoltan at bendor.com.au wrote:
> On Tue, 22 Feb 2011, Juergen Beisert wrote:
> > From: Juergen Beisert <juergen at kreuzholzen.de>
> >
> > When booting from NAND, its important to know the correct page size.
>
> Isn't that info available as soon as SteppingStone sucked in the first 4K
> into the internal SRAM?
>
> As far as I can follow the s3c2440 manual, bit 0 and the read-only bits 1
> to 3 of the NFCONF register convey that information and these bits are set
> by sampling a few GPIO (NCON and GPG13-GPG15) pins at reset. Supposedly
> these pins are pulled up/low during reset so that SteppingStone itself can
> read the boot code from the NAND.
>
> What am I missing?

I did a look at it. On my board this register states "0110" which means:
 - 8 bit NAND
 - 512 bytes per page (e.g. "normal" NAND)
 - 4 address cycles
And this setting is all right, my flash is a K9F1208U0A.

But Marek's board states "1110" which means:
 - 8 bit NAND
 - 2048 bytes per page (e.g. "advanced" NAND)
 - 5 address cycles
And this setting is bad, because his K9F1G08U0B uses 4 address cycles only.
Maybe it works because the NAND ignores the 5th address cycle?

Others here around with a mini2440? Can you send me your NAND device type and 
the content of register 0x4e000000?

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From plagnioj at jcrosoft.com  Wed Feb 23 12:03:58 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 23 Feb 2011 18:03:58 +0100
Subject: [PATCH] dm9000: read the mac address from the register if none are
	specified
Message-ID: <1298480638-8522-1-git-send-email-plagnioj@jcrosoft.com>

as barebox can be run as a second stage the first stage may have init it
before so re-used it

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 drivers/net/dm9000.c |   18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
index b0e8822..c8d8517 100644
--- a/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
@@ -169,6 +169,7 @@ struct dm9000_priv {
 	void __iomem *iodata;
 	struct mii_device miidev;
 	int buswidth;
+	int srom;
 };
 
 #ifdef CONFIG_DM9000_DEBUG
@@ -433,12 +434,17 @@ static u16 read_srom_word(struct dm9000_priv *priv, int offset)
 static int dm9000_get_ethaddr(struct eth_device *edev, unsigned char *adr)
 {
 	struct dm9000_priv *priv = (struct dm9000_priv *)edev->priv;
-	int i;
+	int i, oft;
 
-        for (i = 0; i < 3; i++)
-		((u16 *) adr)[i] = read_srom_word(priv, i);
+	if (priv->srom) {
+		for (i = 0; i < 3; i++)
+			((u16 *) adr)[i] = read_srom_word(priv, i);
+	} else {
+		for (i = 0, oft = 0x10; i < 6; i++, oft++)
+			adr[i] = DM9000_ior(priv, oft);
+	}
 
-        return 0;
+	return 0;
 }
 
 static int dm9000_set_ethaddr(struct eth_device *edev, unsigned char *adr)
@@ -491,6 +497,7 @@ static int dm9000_probe(struct device_d *dev)
 	priv->buswidth = pdata->buswidth;
 	priv->iodata = (void *)pdata->iodata;
 	priv->iobase = (void *)pdata->iobase;
+	priv->srom = pdata->srom;
 
 	edev->init = dm9000_init_dev;
 	edev->open = dm9000_eth_open;
@@ -498,8 +505,7 @@ static int dm9000_probe(struct device_d *dev)
 	edev->recv = dm9000_eth_rx;
 	edev->halt = dm9000_eth_halt;
 	edev->set_ethaddr = dm9000_set_ethaddr;
-	if (pdata->srom)
-		edev->get_ethaddr = dm9000_get_ethaddr;
+	edev->get_ethaddr = dm9000_get_ethaddr;
 
 	/* RESET device */
 	dm9000_reset(priv);
-- 
1.7.2.3



From plagnioj at jcrosoft.com  Wed Feb 23 12:05:12 2011
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Wed, 23 Feb 2011 18:05:12 +0100
Subject: [PATCH] lib/decompress_unlzo: use fill and full to read and
	write data
In-Reply-To: <4D644DFA.9070706@eukrea.com>
References: <1296209604-29790-1-git-send-email-plagnioj@jcrosoft.com>
	<4D644DFA.9070706@eukrea.com>
Message-ID: <20110223170512.GB29927@game.jcrosoft.org>

On 00:59 Wed 23 Feb     , Eric Benard wrote:
> Hi Jean Christophe,
> 
> On 28/01/2011 11:13, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >this will all to simplify the sync with the kernel and later easly add the
> >self decompression support to barebox
> >
> >as example with a lzo compression will reduce barebox from 180224 to 99863
> >bytes so 55.41%
> >-rwxr-xr-x 1 root root  99863 Jan 28 02:17 build/versatilepb/barebox.bin.lzo
> >
> >we also reduce the binary size by 224 bytes
> >
> >Old version
> ># ls -al build/versatilepb/barebox.bin
> >-rwxr-xr-x 1 root root 180468 Jan 28 02:14 build/versatilepb/barebox.bin
> >
> >New version
> ># ls -al build/versatilepb/barebox*
> >-rwxr-xr-x 1 root root 180244 Jan 28 02:13 build/versatilepb/barebox.bin
> >
> >Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD<plagnioj at jcrosoft.com>
> 
> unfortunatly, this commit breaks unlzo in barebox :
> unlzo logo.bmp.lzo logo.bmp stays blocked forever
> reverting this commit unbreak the unlzo command.
I try it here on the versatile and it's work fine

I will it again on the sam9261ek and other at91

Best Regards,
J.


From eric at eukrea.com  Wed Feb 23 12:21:40 2011
From: eric at eukrea.com (Eric Benard)
Date: Wed, 23 Feb 2011 18:21:40 +0100
Subject: [PATCH] lib/decompress_unlzo: use fill and full to read and write
	data
In-Reply-To: <20110223170512.GB29927@game.jcrosoft.org>
References: <1296209604-29790-1-git-send-email-plagnioj@jcrosoft.com>
	<4D644DFA.9070706@eukrea.com>
	<20110223170512.GB29927@game.jcrosoft.org>
Message-ID: <4D654224.2030504@eukrea.com>

Hi Jean Christophe,

On 23/02/2011 18:05, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 00:59 Wed 23 Feb     , Eric Benard wrote:
>> On 28/01/2011 11:13, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>
>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD<plagnioj at jcrosoft.com>
>>
>> unfortunatly, this commit breaks unlzo in barebox :
>> unlzo logo.bmp.lzo logo.bmp stays blocked forever
>> reverting this commit unbreak the unlzo command.
> I try it here on the versatile and it's work fine
>
> I will it again on the sam9261ek and other at91
>
strange. My test is done on an ARM11 (i.MX35).
I'll try to add log when I have time to find where it's blocked.

Eric


From eric at eukrea.com  Wed Feb 23 15:34:46 2011
From: eric at eukrea.com (Eric Benard)
Date: Wed, 23 Feb 2011 21:34:46 +0100
Subject: i.MX51 & MMU
Message-ID: <4D656F66.8030501@eukrea.com>

Hi,

has anyone recently tested barebox master on a babbage board with MMU enabled 
? Here (not on a babbage, with a TO2 i.MX515 with 1 bank of DDR2), enabling 
MMU crash the board (which works fine with barebox with MMU disabled and with 
Linux 2.6.38-rc6 so the hardware seems not to be the root of the problem).

Thanks,
Eric



From jbe at pengutronix.de  Wed Feb 23 17:08:14 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Wed, 23 Feb 2011 23:08:14 +0100
Subject: [PATCH 2/2] mini2440: Consider correct NAND page size for boot.
In-Reply-To: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>
References: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>
Message-ID: <201102232308.14721.jbe@pengutronix.de>

Hi Zoltan,

> Isn't that info available as soon as SteppingStone sucked in the first 4K
> into the internal SRAM?
>
> As far as I can follow the s3c2440 manual, bit 0 and the read-only bits 1
> to 3 of the NFCONF register convey that information and these bits are set
> by sampling a few GPIO (NCON and GPG13-GPG15) pins at reset. Supposedly
> these pins are pulled up/low during reset so that SteppingStone itself can
> read the boot code from the NAND

do you mean something like that?

From: Juergen Beisert <juergen at kreuzholzen.de>
Subject: mini2440: Consider correct NAND page size for boot.

When booting from NAND, its important to know the correct page size. When
the NAND is used as the boot source, four dedicated pins are used to configure
the correct page size and address cycle count. These pins can be read back in
one of the NFC registers to parametrize the load function.

This patch also extends the read routine to support more than four address
cycles on demand.

BTW: At least some mini2440s are misconfigured to use five address cycles for
a NAND device that is known to need only four address cycles. In this case the
vendor is at our side: This NAND simply ignores any additional address cycles
than required.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>

---
 arch/arm/boards/a9m2410/a9m2410.c                 |    2 
 arch/arm/boards/a9m2440/a9m2440.c                 |    2 
 arch/arm/boards/mini2440/mini2440.c               |    2 
 arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h |    2 
 drivers/mtd/nand/nand_s3c2410.c                   |   60 ++++++++++++++++------
 5 files changed, 48 insertions(+), 20 deletions(-)

Index: barebox-2011.01.0/drivers/mtd/nand/nand_s3c2410.c
===================================================================
--- barebox-2011.01.0.orig/drivers/mtd/nand/nand_s3c2410.c
+++ barebox-2011.01.0/drivers/mtd/nand/nand_s3c2410.c
@@ -497,12 +497,23 @@ static void __nand_boot_init wait_for_co
 		;
 }
 
-static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs)
+static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs,
+					int ps, int c)
 {
 	send_addr(host, offs & 0xff);
-	send_addr(host, (offs >> 9) & 0xff);
-	send_addr(host, (offs >> 17) & 0xff);
-	send_addr(host, (offs >> 25) & 0xff);
+
+	if (ps == 512) {
+		send_addr(host, (offs >> 9) & 0xff);
+		send_addr(host, (offs >> 17) & 0xff);
+		if (c > 3)
+			send_addr(host, (offs >> 25) & 0xff);
+	} else {
+		send_addr(host, (offs >> 8) & 0xf0);
+		send_addr(host, (offs >> 12) & 0xff);
+		send_addr(host, (offs >> 20) & 0xff);
+		if (c > 4)
+			send_addr(host, (offs >> 28) & 0xff);
+	}
 }
 
 /**
@@ -510,24 +521,42 @@ static void __nand_boot_init nfc_addr(vo
  * @param[out] dest Pointer to target area (in SDRAM)
  * @param[in] size Bytes to read from NAND device
  * @param[in] page Start page to read from
- * @param[in] pagesize Size of each page in the NAND
  *
  * This function must be located in the first 4kiB of the barebox image
- * (guess why). When this routine is running the SDRAM is up and running
- * and it runs from the correct address (physical=linked address).
- * TODO Could we access the platform data from the boardfile?
- * Due to it makes no sense this function does not return in case of failure.
+ * (guess why).
  */
-void __nand_boot_init s3c24x0_nand_load_image(void *dest, int size, int page, int pagesize)
+void __nand_boot_init s3c24x0_nand_load_image(void *dest, int size, int page)
 {
 	void __iomem *host = (void __iomem *)S3C24X0_NAND_BASE;
-	int i;
+	unsigned pagesize;
+	int i, cycle;
 
 	/*
 	 * Reenable the NFC and use the default (but slow) access
 	 * timing or the board specific setting if provided.
 	 */
 	enable_nand_controller(host, BOARD_DEFAULT_NAND_TIMING);
+
+	/* use the current NAND hardware configuration */
+	switch (readl(S3C24X0_NAND_BASE) & 0xf) {
+	case 0x6:	/* 8 bit, 4 addr cycles, 512 bpp, normal NAND */
+		pagesize = 512;
+		cycle = 4;
+		break;
+	case 0xc:	/* 8 bit, 4 addr cycles, 2048 bpp, advanced NAND */
+		pagesize = 2048;
+		cycle = 4;
+		break;
+	case 0xe:	/* 8 bit, 5 addr cycles, 2048 bpp, advanced NAND */
+		pagesize = 2048;
+		cycle = 5;
+		break;
+	default:
+		/* we cannot output an error message here :-( */
+		disable_nand_controller(host);
+		return;
+	}
+
 	enable_cs(host);
 
 	/* Reset the NAND device */
@@ -538,7 +567,7 @@ void __nand_boot_init s3c24x0_nand_load_
 	do {
 		enable_cs(host);
 		send_cmd(host, NAND_CMD_READ0);
-		nfc_addr(host, page * pagesize);
+		nfc_addr(host, page * pagesize, pagesize, cycle);
 		wait_for_completion(host);
 		/* copy one page (do *not* use readsb() here!)*/
 		for (i = 0; i < pagesize; i++)
@@ -560,22 +589,21 @@ void __nand_boot_init s3c24x0_nand_load_
 static int do_nand_boot_test(struct command *cmdtp, int argc, char *argv[])
 {
 	void *dest;
-	int size, pagesize;
+	int size;
 
 	if (argc < 3)
 		return COMMAND_ERROR_USAGE;
 
 	dest = (void *)strtoul_suffix(argv[1], NULL, 0);
 	size = strtoul_suffix(argv[2], NULL, 0);
-	pagesize = strtoul_suffix(argv[3], NULL, 0);
 
-	s3c24x0_nand_load_image(dest, size, 0, pagesize);
+	s3c24x0_nand_load_image(dest, size, 0);
 
 	return 0;
 }
 
 static const __maybe_unused char cmd_nand_boot_test_help[] =
-"Usage: nand_boot_test <dest> <size> <pagesize>\n";
+"Usage: nand_boot_test <dest> <size>\n";
 
 BAREBOX_CMD_START(nand_boot_test)
 	.cmd		= do_nand_boot_test,
Index: barebox-2011.01.0/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
===================================================================
--- barebox-2011.01.0.orig/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
+++ barebox-2011.01.0/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
@@ -19,7 +19,7 @@
  */
 
 #ifdef CONFIG_S3C24XX_NAND_BOOT
-extern void s3c24x0_nand_load_image(void*, int, int, int);
+extern void s3c24x0_nand_load_image(void*, int, int);
 #endif
 
 /**
Index: barebox-2011.01.0/arch/arm/boards/a9m2410/a9m2410.c
===================================================================
--- barebox-2011.01.0.orig/arch/arm/boards/a9m2410/a9m2410.c
+++ barebox-2011.01.0/arch/arm/boards/a9m2410/a9m2410.c
@@ -176,7 +176,7 @@ device_initcall(a9m2410_devices_init);
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
+	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
 }
 #endif
 
Index: barebox-2011.01.0/arch/arm/boards/a9m2440/a9m2440.c
===================================================================
--- barebox-2011.01.0.orig/arch/arm/boards/a9m2440/a9m2440.c
+++ barebox-2011.01.0/arch/arm/boards/a9m2440/a9m2440.c
@@ -182,7 +182,7 @@ device_initcall(a9m2440_devices_init);
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
+	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
 }
 #endif
 
Index: barebox-2011.01.0/arch/arm/boards/mini2440/mini2440.c
===================================================================
--- barebox-2011.01.0.orig/arch/arm/boards/mini2440/mini2440.c
+++ barebox-2011.01.0/arch/arm/boards/mini2440/mini2440.c
@@ -281,7 +281,7 @@ device_initcall(mini2440_devices_init);
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
+	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
 }
 #endif
 

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Thu Feb 24 03:39:25 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 24 Feb 2011 09:39:25 +0100
Subject: i.MX51 & MMU
In-Reply-To: <4D656F66.8030501@eukrea.com>
References: <4D656F66.8030501@eukrea.com>
Message-ID: <20110224083925.GO7381@pengutronix.de>

Hi Eric,

On Wed, Feb 23, 2011 at 09:34:46PM +0100, Eric Benard wrote:
> Hi,
> 
> has anyone recently tested barebox master on a babbage board with
> MMU enabled ? Here (not on a babbage, with a TO2 i.MX515 with 1 bank
> of DDR2), enabling MMU crash the board (which works fine with
> barebox with MMU disabled and with Linux 2.6.38-rc6 so the hardware
> seems not to be the root of the problem).

The memory space of the i.MX51 is a bit tight. It may be that you shadow
registers with the dma coherent memory space. Can you please post your
mmu setup code sniplet?
The babbage works with mmu enabled.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From zoltan at bendor.com.au  Thu Feb 24 03:47:37 2011
From: zoltan at bendor.com.au (=?UTF-8?B?Wm9sdMOhbiBLw7Njc2k=?=)
Date: Thu, 24 Feb 2011 19:47:37 +1100
Subject: [PATCH 2/2] mini2440: Consider correct NAND page size for boot.
In-Reply-To: <201102232308.14721.jbe@pengutronix.de>
References: <Pine.LNX.4.31.1102231440230.20973-100000@susu.bendor.com.au>
	<201102232308.14721.jbe@pengutronix.de>
Message-ID: <20110224194737.24b79a0e@manocska.bendor.com.au>

On Wed, 23 Feb 2011 23:08:14 +0100
Juergen Beisert <jbe at pengutronix.de> wrote:

> Hi Zoltan,
> 
> > [..]
> 
> do you mean something like that?
> 
> From: Juergen Beisert <juergen at kreuzholzen.de>
> Subject: mini2440: Consider correct NAND page size for boot.
> 
> When booting from NAND, its important to know the correct page size.
> When the NAND is used as the boot source, four dedicated pins are
> used to configure the correct page size and address cycle count.
> These pins can be read back in one of the NFC registers to
> parametrize the load function.
> [...]

Yes, *exactly* like that!

Best Regards,

Zoltan


From eric at eukrea.com  Thu Feb 24 04:01:03 2011
From: eric at eukrea.com (Eric Benard)
Date: Thu, 24 Feb 2011 10:01:03 +0100
Subject: i.MX51 & MMU
In-Reply-To: <20110224083925.GO7381@pengutronix.de>
References: <4D656F66.8030501@eukrea.com>
	<20110224083925.GO7381@pengutronix.de>
Message-ID: <4D661E4F.20801@eukrea.com>

Hi Sascha,

On 24/02/2011 09:39, Sascha Hauer wrote:
> On Wed, Feb 23, 2011 at 09:34:46PM +0100, Eric Benard wrote:
>> Hi,
>>
>> has anyone recently tested barebox master on a babbage board with
>> MMU enabled ? Here (not on a babbage, with a TO2 i.MX515 with 1 bank
>> of DDR2), enabling MMU crash the board (which works fine with
>> barebox with MMU disabled and with Linux 2.6.38-rc6 so the hardware
>> seems not to be the root of the problem).
>
> The memory space of the i.MX51 is a bit tight. It may be that you shadow
> registers with the dma coherent memory space. Can you please post your
> mmu setup code sniplet?
> The babbage works with mmu enabled.
>
OK so the problem is on my side. For the moment the mmu part is the one of the 
babbage. But I must investigate as I only have one DDR2 bank on this board 
(for a 256MB total size) when the babbage has 2 (for a 512MB total size).

Thanks,
Eric


From eric at eukrea.com  Thu Feb 24 04:01:46 2011
From: eric at eukrea.com (Eric Benard)
Date: Thu, 24 Feb 2011 10:01:46 +0100
Subject: i.MX51 & MMU
In-Reply-To: <20110224083925.GO7381@pengutronix.de>
References: <4D656F66.8030501@eukrea.com>
	<20110224083925.GO7381@pengutronix.de>
Message-ID: <4D661E7A.8030605@eukrea.com>

On 24/02/2011 09:39, Sascha Hauer wrote:
> On Wed, Feb 23, 2011 at 09:34:46PM +0100, Eric Benard wrote:
>> Hi,
>>
>> has anyone recently tested barebox master on a babbage board with
>> MMU enabled ? Here (not on a babbage, with a TO2 i.MX515 with 1 bank
>> of DDR2), enabling MMU crash the board (which works fine with
>> barebox with MMU disabled and with Linux 2.6.38-rc6 so the hardware
>> seems not to be the root of the problem).
>
> The memory space of the i.MX51 is a bit tight. It may be that you shadow
> registers with the dma coherent memory space. Can you please post your
> mmu setup code sniplet?
> The babbage works with mmu enabled.
>
btw: NAND support for i.MX51 works fine here (with a 8 bits width 2k pages 
size NAND).

Eric


From thomas.mayer at telemotive.de  Thu Feb 24 08:08:55 2011
From: thomas.mayer at telemotive.de (Thomas Mayer)
Date: Thu, 24 Feb 2011 14:08:55 +0100
Subject: Install barebox on target
Message-ID: <4D665867.4010404@telemotive.de>

Hi,

i'm working on a project with a Freescale i.MX35 3-Stack board and try
to use barebox as bootloader.
My problem is that i don't know how to install barebox to NAND memory or
better directly to a sd-card.
Is there any documentation about this really basic stuff?

regards
Thomas
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From s.hauer at pengutronix.de  Thu Feb 24 10:55:05 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 24 Feb 2011 16:55:05 +0100
Subject: assorted patches
Message-ID: <1298562907-9870-1-git-send-email-s.hauer@pengutronix.de>


Sascha Hauer (2):
      net: use dev_* for printing network related stuff
      ARM i.MX: cleanup boot modes

 arch/arm/mach-imx/Kconfig                 |   51 +++++
 arch/arm/mach-imx/Makefile                |    1 +
 arch/arm/mach-imx/include/mach/imx-nand.h |   56 +++++-
 arch/arm/mach-imx/internal-nand-boot.c    |  269 +++++++++++++++++++++++++
 drivers/mtd/nand/Kconfig                  |   21 --
 drivers/mtd/nand/nand_imx.c               |  307 -----------------------------
 net/eth.c                                 |    4 +-
 7 files changed, 378 insertions(+), 331 deletions(-)
 create mode 100644 arch/arm/mach-imx/internal-nand-boot.c



From s.hauer at pengutronix.de  Thu Feb 24 10:55:06 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 24 Feb 2011 16:55:06 +0100
Subject: [PATCH 1/2] net: use dev_* for printing network related stuff
In-Reply-To: <1298562907-9870-1-git-send-email-s.hauer@pengutronix.de>
References: <1298562907-9870-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298562907-9870-2-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 net/eth.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/eth.c b/net/eth.c
index 9eae17c..0251e59 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -146,7 +146,7 @@ int eth_register(struct eth_device *edev)
 	unsigned char ethaddr[6];
 
 	if (!edev->get_ethaddr) {
-		printf("no get_mac_address found for current eth device\n");
+		dev_err(dev, "no get_mac_address found for current eth device\n");
 		return -1;
 	}
 
@@ -167,7 +167,7 @@ int eth_register(struct eth_device *edev)
 
 	if (edev->get_ethaddr(edev, ethaddr) == 0) {
 		ethaddr_to_string(ethaddr, ethaddr_str);
-		printf("got MAC address from EEPROM: %s\n", ethaddr_str);
+		dev_info(dev, "got MAC address from EEPROM: %s\n", ethaddr_str);
 		dev_set_param(dev, "ethaddr", ethaddr_str);
 	}
 
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb 24 10:55:07 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 24 Feb 2011 16:55:07 +0100
Subject: [PATCH 2/2] ARM i.MX: cleanup boot modes
In-Reply-To: <1298562907-9870-1-git-send-email-s.hauer@pengutronix.de>
References: <1298562907-9870-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298562907-9870-3-git-send-email-s.hauer@pengutronix.de>

The i.MX Processors support two different boot modes, the internal
boot mode and the external boot mode. Traditionally the external
NAND boot mode is handled in drivers/mtd/nand and the internal
boot mode is handled in arch/arm/mach-imx. This patch consolidates
the handling of both boot modes in arch/arm/mach-imx so that
the user does not have to look in the mtd kconfig section for
booting from NAND. Also, selecting between internal and external
boot mode now is a clear choice.
The external NAND boot mode has been independent of the mtd nand
driver, but as the code was contained in the NAND driver it was
not possible to support booting from NAND without a mtd nand driver.
This is changed with this patch.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-imx/Kconfig                 |   51 +++++
 arch/arm/mach-imx/Makefile                |    1 +
 arch/arm/mach-imx/include/mach/imx-nand.h |   56 +++++-
 arch/arm/mach-imx/internal-nand-boot.c    |  269 +++++++++++++++++++++++++
 drivers/mtd/nand/Kconfig                  |   21 --
 drivers/mtd/nand/nand_imx.c               |  307 -----------------------------
 6 files changed, 376 insertions(+), 329 deletions(-)
 create mode 100644 arch/arm/mach-imx/internal-nand-boot.c

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 235f644..5454505 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -39,10 +39,35 @@ config BOARDINFO
 	default "Garz+Fricke Cupid" if MACH_GUF_CUPID
 	default "Ka-Ro tx25" if MACH_TX25
 
+choice
+	prompt "Select boot mode"
+	help
+	  i.MX processors support two different boot modes. With the internal
+	  boot mode the boot medium contains a header describing the image to
+	  load. The header also contains a register/value table which can be
+	  used to setup SDRAM. The internal ROM code then initializes SDRAM
+	  using the register/value table, loads the whole barebox image to
+	  SDRAM and starts it. The internal boot mode is available on newer
+	  i.MX processors (i.MX25, i.MX35 and i.MX51). and supports booting
+	  from NOR, NAND, MMC/SD and serial ROMs.
+	  The external boot mode only supports booting from NAND and NOR. With
+	  NOR flash the image is just started in NOR flash. With NAND flash
+	  the NAND controller loads the first 2kbyte from NAND into the NAND
+	  controllers internal SRAM where it is then started. It's the
+	  responsibility of these 2kbyte to load the rest of the boot image.
+	  The external boot mode is supported on older i.MX processors (i.MX1,
+	  i.MX21, i.MX25, i.MX27, i.MX21, i.MX35).
+
 config ARCH_IMX_INTERNAL_BOOT
 	bool "support internal boot mode"
 	depends on ARCH_IMX25 || ARCH_IMX35 || ARCH_IMX51
 
+config ARCH_IMX_EXTERNAL_BOOT
+	bool "support external boot mode"
+	depends on ARCH_IMX1 || ARCH_IMX21 || ARCH_IMX25 || ARCH_IMX27 || ARCH_IMX31 || ARCH_IMX35
+
+endchoice
+
 choice
 	depends on ARCH_IMX_INTERNAL_BOOT
 	prompt "Internal boot source"
@@ -64,6 +89,32 @@ config ARCH_IMX_INTERNAL_BOOT_ONENAND
 
 endchoice
 
+config NAND_IMX_BOOT
+	bool
+	depends on ARCH_IMX_EXTERNAL_BOOT_NAND
+	default y
+
+config ARCH_IMX_EXTERNAL_BOOT_NAND
+	bool
+	prompt "Support Starting barebox from NAND"
+	depends on ARCH_IMX_EXTERNAL_BOOT
+
+choice
+	depends on ARCH_IMX_EXTERNAL_BOOT_NAND
+	default NAND_IMX_BOOT_512_2K
+	prompt "select nand pagesize you want to support booting from"
+
+config NAND_IMX_BOOT_512
+	bool "512 byte page size"
+
+config NAND_IMX_BOOT_2K
+	bool "2048 byte page size"
+
+config NAND_IMX_BOOT_512_2K
+	bool "512 byte and 2048 byte pagesize"
+
+endchoice
+
 comment "Freescale i.MX System-on-Chip"
 
 choice
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 3b2deaf..5fcaac9 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_IMX51) += speed-imx51.o imx51.o iomux-v3.o
 obj-$(CONFIG_IMX_CLKO)	+= clko.o
 obj-$(CONFIG_IMX_IIM)	+= iim.o
 obj-$(CONFIG_NAND_IMX) += nand.o
+obj-$(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND) += internal-nand-boot.o
 obj-y += speed.o
 obj-y += devices.o
 obj-y += boot.o
diff --git a/arch/arm/mach-imx/include/mach/imx-nand.h b/arch/arm/mach-imx/include/mach/imx-nand.h
index eb583a2..22462b2 100644
--- a/arch/arm/mach-imx/include/mach/imx-nand.h
+++ b/arch/arm/mach-imx/include/mach/imx-nand.h
@@ -11,5 +11,59 @@ struct imx_nand_platform_data {
 	unsigned int hw_ecc:1;
 	unsigned int flash_bbt:1;
 };
-#endif /* __ASM_ARCH_NAND_H */
 
+#define nfc_is_v21()		(cpu_is_mx25() || cpu_is_mx35())
+#define nfc_is_v1()		(cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21())
+#define nfc_is_v3_2()		cpu_is_mx51()
+#define nfc_is_v3()		nfc_is_v3_2()
+
+#define NFC_V1_ECC_STATUS_RESULT	0x0c
+#define NFC_V1_RSLTMAIN_AREA		0x0e
+#define NFC_V1_RSLTSPARE_AREA		0x10
+
+#define NFC_V2_ECC_STATUS_RESULT1	0x0c
+#define NFC_V2_ECC_STATUS_RESULT2	0x0e
+#define NFC_V2_SPAS			0x10
+
+#define NFC_V1_V2_BUF_SIZE		0x00
+#define NFC_V1_V2_BUF_ADDR		0x04
+#define NFC_V1_V2_FLASH_ADDR		0x06
+#define NFC_V1_V2_FLASH_CMD		0x08
+#define NFC_V1_V2_CONFIG		0x0a
+
+#define NFC_V1_V2_WRPROT		0x12
+#define NFC_V1_UNLOCKSTART_BLKADDR	0x14
+#define NFC_V1_UNLOCKEND_BLKADDR	0x16
+#define NFC_V21_UNLOCKSTART_BLKADDR	0x20
+#define NFC_V21_UNLOCKEND_BLKADDR	0x22
+#define NFC_V1_V2_NF_WRPRST		0x18
+#define NFC_V1_V2_CONFIG1		0x1a
+#define NFC_V1_V2_CONFIG2		0x1c
+
+#define NFC_V2_CONFIG1_ECC_MODE_4       (1 << 0)
+#define NFC_V1_V2_CONFIG1_SP_EN		(1 << 2)
+#define NFC_V1_V2_CONFIG1_ECC_EN	(1 << 3)
+#define NFC_V1_V2_CONFIG1_INT_MSK	(1 << 4)
+#define NFC_V1_V2_CONFIG1_BIG		(1 << 5)
+#define NFC_V1_V2_CONFIG1_RST		(1 << 6)
+#define NFC_V1_V2_CONFIG1_CE		(1 << 7)
+#define NFC_V1_V2_CONFIG1_ONE_CYCLE	(1 << 8)
+#define NFC_V2_CONFIG1_PPB(x)		(((x) & 0x3) << 9)
+#define NFC_V2_CONFIG1_FP_INT		(1 << 11)
+
+#define NFC_V1_V2_CONFIG2_INT		(1 << 15)
+
+#define NFC_V2_SPAS_SPARESIZE(spas)	((spas) >> 1)
+
+/*
+ * Operation modes for the NFC. Valid for v1, v2 and v3
+ * type controllers.
+ */
+#define NFC_CMD				(1 << 0)
+#define NFC_ADDR			(1 << 1)
+#define NFC_INPUT			(1 << 2)
+#define NFC_OUTPUT			(1 << 3)
+#define NFC_ID				(1 << 4)
+#define NFC_STATUS			(1 << 5)
+
+#endif /* __ASM_ARCH_NAND_H */
diff --git a/arch/arm/mach-imx/internal-nand-boot.c b/arch/arm/mach-imx/internal-nand-boot.c
new file mode 100644
index 0000000..0d71b99
--- /dev/null
+++ b/arch/arm/mach-imx/internal-nand-boot.c
@@ -0,0 +1,269 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <init.h>
+#include <asm/io.h>
+#include <linux/mtd/nand.h>
+#include <mach/imx-nand.h>
+#include <mach/generic.h>
+#include <mach/imx-regs.h>
+
+static void __bare_init noinline imx_nandboot_wait_op_done(void *regs)
+{
+	u32 r;
+
+	while (1) {
+		r = readw(regs + NFC_V1_V2_CONFIG2);
+		if (r & NFC_V1_V2_CONFIG2_INT)
+			break;
+	};
+
+	r &= ~NFC_V1_V2_CONFIG2_INT;
+
+	writew(r, regs + NFC_V1_V2_CONFIG2);
+}
+
+/*
+ * This function issues the specified command to the NAND device and
+ * waits for completion.
+ *
+ * @param       cmd     command for NAND Flash
+ */
+static void __bare_init imx_nandboot_send_cmd(void *regs, u16 cmd)
+{
+	writew(cmd, regs + NFC_V1_V2_FLASH_CMD);
+	writew(NFC_CMD, regs + NFC_V1_V2_CONFIG2);
+
+	imx_nandboot_wait_op_done(regs);
+}
+
+/*
+ * This function sends an address (or partial address) to the
+ * NAND device.  The address is used to select the source/destination for
+ * a NAND command.
+ *
+ * @param       addr    address to be written to NFC.
+ * @param       islast  True if this is the last address cycle for command
+ */
+static void __bare_init noinline imx_nandboot_send_addr(void *regs, u16 addr)
+{
+	writew(addr, regs + NFC_V1_V2_FLASH_ADDR);
+	writew(NFC_ADDR, regs + NFC_V1_V2_CONFIG2);
+
+	/* Wait for operation to complete */
+	imx_nandboot_wait_op_done(regs);
+}
+
+static void __bare_init imx_nandboot_nfc_addr(void *regs, u32 offs, int pagesize_2k)
+{
+	imx_nandboot_send_addr(regs, offs & 0xff);
+
+	if (pagesize_2k) {
+		imx_nandboot_send_addr(regs, offs & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 11) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 19) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 27) & 0xff);
+		imx_nandboot_send_cmd(regs, NAND_CMD_READSTART);
+	} else {
+		imx_nandboot_send_addr(regs, (offs >> 9) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 17) & 0xff);
+		imx_nandboot_send_addr(regs, (offs >> 25) & 0xff);
+	}
+}
+
+static void __bare_init imx_nandboot_send_page(void *regs,
+		unsigned int ops, int pagesize_2k)
+{
+	int bufs, i;
+
+	if (nfc_is_v1() && pagesize_2k)
+		bufs = 4;
+	else
+		bufs = 1;
+
+	for (i = 0; i < bufs; i++) {
+		/* NANDFC buffer 0 is used for page read/write */
+		writew(i, regs + NFC_V1_V2_BUF_ADDR);
+
+		writew(ops, regs + NFC_V1_V2_CONFIG2);
+
+		/* Wait for operation to complete */
+		imx_nandboot_wait_op_done(regs);
+	}
+}
+
+static void __bare_init __memcpy32(void *trg, const void *src, int size)
+{
+	int i;
+	unsigned int *t = trg;
+	unsigned const int *s = src;
+
+	for (i = 0; i < (size >> 2); i++)
+		*t++ = *s++;
+}
+
+static int __maybe_unused is_pagesize_2k(void)
+{
+#ifdef CONFIG_ARCH_IMX21
+	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
+		return 1;
+	else
+		return 0;
+#endif
+#ifdef CONFIG_ARCH_IMX27
+	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
+		return 1;
+	else
+		return 0;
+#endif
+#ifdef CONFIG_ARCH_IMX31
+	if (readl(IMX_CCM_BASE + CCM_RCSR) & RCSR_NFMS)
+		return 1;
+	else
+		return 0;
+#endif
+#if defined(CONFIG_ARCH_IMX35) || defined(CONFIG_ARCH_IMX25)
+	if (readl(IMX_CCM_BASE + CCM_RCSR) & (1 << 8))
+		return 1;
+	else
+		return 0;
+#endif
+}
+
+void __bare_init imx_nand_load_image(void *dest, int size)
+{
+	u32 tmp, page, block, blocksize, pagesize;
+	int pagesize_2k = 1;
+	void *regs, *base, *spare0;
+
+#if defined(CONFIG_NAND_IMX_BOOT_512)
+	pagesize_2k = 0;
+#elif defined(CONFIG_NAND_IMX_BOOT_2K)
+	pagesize_2k = 1;
+#else
+	pagesize_2k = is_pagesize_2k();
+#endif
+
+	if (pagesize_2k) {
+		pagesize = 2048;
+		blocksize = 128 * 1024;
+	} else {
+		pagesize = 512;
+		blocksize = 16 * 1024;
+	}
+
+	base = (void __iomem *)IMX_NFC_BASE;
+	if (nfc_is_v21()) {
+		regs = base + 0x1e00;
+		spare0 = base + 0x1000;
+	} else if (nfc_is_v1()) {
+		regs = base + 0xe00;
+		spare0 = base + 0x800;
+	}
+
+	imx_nandboot_send_cmd(regs, NAND_CMD_RESET);
+
+	/* preset operation */
+	/* Unlock the internal RAM Buffer */
+	writew(0x2, regs + NFC_V1_V2_CONFIG);
+
+	/* Unlock Block Command for given address range */
+	writew(0x4, regs + NFC_V1_V2_WRPROT);
+
+	tmp = readw(regs + NFC_V1_V2_CONFIG1);
+	tmp |= NFC_V1_V2_CONFIG1_ECC_EN;
+	if (nfc_is_v21())
+		/* currently no support for 218 byte OOB with stronger ECC */
+		tmp |= NFC_V2_CONFIG1_ECC_MODE_4;
+	tmp &= ~(NFC_V1_V2_CONFIG1_SP_EN | NFC_V1_V2_CONFIG1_INT_MSK);
+	writew(tmp, regs + NFC_V1_V2_CONFIG1);
+
+	if (nfc_is_v21()) {
+		if (pagesize_2k)
+			writew(NFC_V2_SPAS_SPARESIZE(64), regs + NFC_V2_SPAS);
+		else
+			writew(NFC_V2_SPAS_SPARESIZE(16), regs + NFC_V2_SPAS);
+	}
+
+	block = page = 0;
+
+	while (1) {
+		page = 0;
+		while (page * pagesize < blocksize) {
+			debug("page: %d block: %d dest: %p src "
+					"0x%08x\n",
+					page, block, dest,
+					block * blocksize +
+					page * pagesize);
+
+			imx_nandboot_send_cmd(regs, NAND_CMD_READ0);
+			imx_nandboot_nfc_addr(regs, block * blocksize +
+					page * pagesize, pagesize_2k);
+			imx_nandboot_send_page(regs, NFC_OUTPUT, pagesize_2k);
+			page++;
+
+			if (pagesize_2k) {
+				if ((readw(spare0) & 0xff) != 0xff)
+					continue;
+			} else {
+				if ((readw(spare0 + 4) & 0xff00) != 0xff00)
+					continue;
+			}
+
+			__memcpy32(dest, base, pagesize);
+			dest += pagesize;
+			size -= pagesize;
+
+			if (size <= 0)
+				return;
+		}
+		block++;
+	}
+}
+
+#define CONFIG_NAND_IMX_BOOT_DEBUG
+#ifdef CONFIG_NAND_IMX_BOOT_DEBUG
+#include <command.h>
+
+static int do_nand_boot_test(struct command *cmdtp, int argc, char *argv[])
+{
+	void *dest;
+	int size;
+
+	if (argc < 3)
+		return COMMAND_ERROR_USAGE;
+
+	dest = (void *)strtoul_suffix(argv[1], NULL, 0);
+	size = strtoul_suffix(argv[2], NULL, 0);
+
+	imx_nand_load_image(dest, size);
+
+	return 0;
+}
+
+static const __maybe_unused char cmd_nand_boot_test_help[] =
+"Usage: nand_boot_test <dest> <size>\n"
+"This command loads the booloader from the NAND memory like the reset\n"
+"routine does. Its intended for development tests only";
+
+BAREBOX_CMD_START(nand_boot_test)
+	.cmd		= do_nand_boot_test,
+	.usage		= "load bootloader from NAND",
+	BAREBOX_CMD_HELP(cmd_nand_boot_test_help)
+BAREBOX_CMD_END
+#endif
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 034bb6f..12e1237 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -13,27 +13,6 @@ config NAND_IMX
 	prompt "i.MX NAND driver"
 	depends on ARCH_IMX21 || ARCH_IMX27 || ARCH_IMX31 || ARCH_IMX35 || ARCH_IMX25 || ARCH_IMX51
 
-config NAND_IMX_BOOT
-	bool
-	prompt "Support Starting barebox from NAND"
-	depends on NAND_IMX && !ARCH_IMX51
-
-choice
-	depends on NAND_IMX_BOOT
-	default NAND_IMX_BOOT_512_2K
-	prompt "select nand pagesize you want to support booting from"
-
-config NAND_IMX_BOOT_512
-	bool "512 byte page size"
-
-config NAND_IMX_BOOT_2K
-	bool "2048 byte page size"
-
-config NAND_IMX_BOOT_512_2K
-	bool "512 byte and 2048 byte pagesize"
-
-endchoice
-
 config NAND_OMAP_GPMC
 	tristate "NAND Flash Support for GPMC based OMAP platforms"
 	depends on ((ARCH_OMAP2 || ARCH_OMAP3) && GPMC)
diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c
index 9a15ab2..ca6e55b 100644
--- a/drivers/mtd/nand/nand_imx.c
+++ b/drivers/mtd/nand/nand_imx.c
@@ -30,60 +30,6 @@
 #include <asm/io.h>
 #include <errno.h>
 
-#define nfc_is_v21()		(cpu_is_mx25() || cpu_is_mx35())
-#define nfc_is_v1()		(cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21())
-#define nfc_is_v3_2()		cpu_is_mx51()
-#define nfc_is_v3()		nfc_is_v3_2()
-
-#define NFC_V1_ECC_STATUS_RESULT	0x0c
-#define NFC_V1_RSLTMAIN_AREA		0x0e
-#define NFC_V1_RSLTSPARE_AREA		0x10
-
-#define NFC_V2_ECC_STATUS_RESULT1	0x0c
-#define NFC_V2_ECC_STATUS_RESULT2	0x0e
-#define NFC_V2_SPAS			0x10
-
-#define NFC_V1_V2_BUF_SIZE		0x00
-#define NFC_V1_V2_BUF_ADDR		0x04
-#define NFC_V1_V2_FLASH_ADDR		0x06
-#define NFC_V1_V2_FLASH_CMD		0x08
-#define NFC_V1_V2_CONFIG		0x0a
-
-#define NFC_V1_V2_WRPROT		0x12
-#define NFC_V1_UNLOCKSTART_BLKADDR	0x14
-#define NFC_V1_UNLOCKEND_BLKADDR	0x16
-#define NFC_V21_UNLOCKSTART_BLKADDR	0x20
-#define NFC_V21_UNLOCKEND_BLKADDR	0x22
-#define NFC_V1_V2_NF_WRPRST		0x18
-#define NFC_V1_V2_CONFIG1		0x1a
-#define NFC_V1_V2_CONFIG2		0x1c
-
-#define NFC_V2_CONFIG1_ECC_MODE_4       (1 << 0)
-#define NFC_V1_V2_CONFIG1_SP_EN		(1 << 2)
-#define NFC_V1_V2_CONFIG1_ECC_EN	(1 << 3)
-#define NFC_V1_V2_CONFIG1_INT_MSK	(1 << 4)
-#define NFC_V1_V2_CONFIG1_BIG		(1 << 5)
-#define NFC_V1_V2_CONFIG1_RST		(1 << 6)
-#define NFC_V1_V2_CONFIG1_CE		(1 << 7)
-#define NFC_V1_V2_CONFIG1_ONE_CYCLE	(1 << 8)
-#define NFC_V2_CONFIG1_PPB(x)		(((x) & 0x3) << 9)
-#define NFC_V2_CONFIG1_FP_INT		(1 << 11)
-
-#define NFC_V1_V2_CONFIG2_INT		(1 << 15)
-
-#define NFC_V2_SPAS_SPARESIZE(spas)	((spas) >> 1)
-
-/*
- * Operation modes for the NFC. Valid for v1, v2 and v3
- * type controllers.
- */
-#define NFC_CMD				(1 << 0)
-#define NFC_ADDR			(1 << 1)
-#define NFC_INPUT			(1 << 2)
-#define NFC_OUTPUT			(1 << 3)
-#define NFC_ID				(1 << 4)
-#define NFC_STATUS			(1 << 5)
-
 #define NFC_V3_FLASH_CMD		(host->regs_axi + 0x00)
 #define NFC_V3_FLASH_ADDR0		(host->regs_axi + 0x04)
 
@@ -132,12 +78,6 @@
 
 #define NFC_V3_DELAY_LINE		(host->regs_ip + 0x34)
 
-#ifdef CONFIG_NAND_IMX_BOOT
-#define __nand_boot_init __bare_init
-#else
-#define __nand_boot_init
-#endif
-
 struct imx_nand_host {
 	struct mtd_info		mtd;		
 	struct nand_chip	nand;
@@ -1239,253 +1179,6 @@ static struct driver_d imx_nand_driver = {
 	.probe = imxnd_probe,
 };
 
-#ifdef CONFIG_NAND_IMX_BOOT
-static void __nand_boot_init noinline imx_nandboot_wait_op_done(void *regs)
-{
-	u32 r;
-
-	while (1) {
-		r = readw(regs + NFC_V1_V2_CONFIG2);
-		if (r & NFC_V1_V2_CONFIG2_INT)
-			break;
-	};
-
-	r &= ~NFC_V1_V2_CONFIG2_INT;
-
-	writew(r, regs + NFC_V1_V2_CONFIG2);
-}
-
-/*
- * This function issues the specified command to the NAND device and
- * waits for completion.
- *
- * @param       cmd     command for NAND Flash
- */
-static void __nand_boot_init imx_nandboot_send_cmd(void *regs, u16 cmd)
-{
-	writew(cmd, regs + NFC_V1_V2_FLASH_CMD);
-	writew(NFC_CMD, regs + NFC_V1_V2_CONFIG2);
-
-	imx_nandboot_wait_op_done(regs);
-}
-
-/*
- * This function sends an address (or partial address) to the
- * NAND device.  The address is used to select the source/destination for
- * a NAND command.
- *
- * @param       addr    address to be written to NFC.
- * @param       islast  True if this is the last address cycle for command
- */
-static void __nand_boot_init noinline imx_nandboot_send_addr(void *regs, u16 addr)
-{
-	writew(addr, regs + NFC_V1_V2_FLASH_ADDR);
-	writew(NFC_ADDR, regs + NFC_V1_V2_CONFIG2);
-
-	/* Wait for operation to complete */
-	imx_nandboot_wait_op_done(regs);
-}
-
-static void __nand_boot_init imx_nandboot_nfc_addr(void *regs, u32 offs, int pagesize_2k)
-{
-	imx_nandboot_send_addr(regs, offs & 0xff);
-
-	if (pagesize_2k) {
-		imx_nandboot_send_addr(regs, offs & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 11) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 19) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 27) & 0xff);
-		imx_nandboot_send_cmd(regs, NAND_CMD_READSTART);
-	} else {
-		imx_nandboot_send_addr(regs, (offs >> 9) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 17) & 0xff);
-		imx_nandboot_send_addr(regs, (offs >> 25) & 0xff);
-	}
-}
-
-static void __nand_boot_init imx_nandboot_send_page(void *regs,
-		unsigned int ops, int pagesize_2k)
-{
-	int bufs, i;
-
-	if (nfc_is_v1() && pagesize_2k)
-		bufs = 4;
-	else
-		bufs = 1;
-
-	for (i = 0; i < bufs; i++) {
-		/* NANDFC buffer 0 is used for page read/write */
-		writew(i, regs + NFC_V1_V2_BUF_ADDR);
-
-		writew(ops, regs + NFC_V1_V2_CONFIG2);
-
-		/* Wait for operation to complete */
-		imx_nandboot_wait_op_done(regs);
-	}
-}
-
-static void __nand_boot_init __memcpy32(void *trg, const void *src, int size)
-{
-	int i;
-	unsigned int *t = trg;
-	unsigned const int *s = src;
-
-	for (i = 0; i < (size >> 2); i++)
-		*t++ = *s++;
-}
-
-static int __maybe_unused is_pagesize_2k(void)
-{
-#ifdef CONFIG_ARCH_IMX21
-	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
-		return 1;
-	else
-		return 0;
-#endif
-#ifdef CONFIG_ARCH_IMX27
-	if (readl(IMX_SYSTEM_CTL_BASE + 0x14) & (1 << 5))
-		return 1;
-	else
-		return 0;
-#endif
-#ifdef CONFIG_ARCH_IMX31
-	if (readl(IMX_CCM_BASE + CCM_RCSR) & RCSR_NFMS)
-		return 1;
-	else
-		return 0;
-#endif
-#if defined(CONFIG_ARCH_IMX35) || defined(CONFIG_ARCH_IMX25)
-	if (readl(IMX_CCM_BASE + CCM_RCSR) & (1 << 8))
-		return 1;
-	else
-		return 0;
-#endif
-}
-
-void __nand_boot_init imx_nand_load_image(void *dest, int size)
-{
-	u32 tmp, page, block, blocksize, pagesize;
-	int pagesize_2k = 1;
-	void *regs, *base, *spare0;
-
-#if defined(CONFIG_NAND_IMX_BOOT_512)
-	pagesize_2k = 0;
-#elif defined(CONFIG_NAND_IMX_BOOT_2K)
-	pagesize_2k = 1;
-#else
-	pagesize_2k = is_pagesize_2k();
-#endif
-
-	if (pagesize_2k) {
-		pagesize = 2048;
-		blocksize = 128 * 1024;
-	} else {
-		pagesize = 512;
-		blocksize = 16 * 1024;
-	}
-
-	base = (void __iomem *)IMX_NFC_BASE;
-	if (nfc_is_v21()) {
-		regs = base + 0x1e00;
-		spare0 = base + 0x1000;
-	} else if (nfc_is_v1()) {
-		regs = base + 0xe00;
-		spare0 = base + 0x800;
-	}
-
-	imx_nandboot_send_cmd(regs, NAND_CMD_RESET);
-
-	/* preset operation */
-	/* Unlock the internal RAM Buffer */
-	writew(0x2, regs + NFC_V1_V2_CONFIG);
-
-	/* Unlock Block Command for given address range */
-	writew(0x4, regs + NFC_V1_V2_WRPROT);
-
-	tmp = readw(regs + NFC_V1_V2_CONFIG1);
-	tmp |= NFC_V1_V2_CONFIG1_ECC_EN;
-	if (nfc_is_v21())
-		/* currently no support for 218 byte OOB with stronger ECC */
-		tmp |= NFC_V2_CONFIG1_ECC_MODE_4;
-	tmp &= ~(NFC_V1_V2_CONFIG1_SP_EN | NFC_V1_V2_CONFIG1_INT_MSK);
-	writew(tmp, regs + NFC_V1_V2_CONFIG1);
-
-	if (nfc_is_v21()) {
-		if (pagesize_2k)
-			writew(NFC_V2_SPAS_SPARESIZE(64), regs + NFC_V2_SPAS);
-		else
-			writew(NFC_V2_SPAS_SPARESIZE(16), regs + NFC_V2_SPAS);
-	}
-
-	block = page = 0;
-
-	while (1) {
-		page = 0;
-		while (page * pagesize < blocksize) {
-			debug("page: %d block: %d dest: %p src "
-					"0x%08x\n",
-					page, block, dest,
-					block * blocksize +
-					page * pagesize);
-
-			imx_nandboot_send_cmd(regs, NAND_CMD_READ0);
-			imx_nandboot_nfc_addr(regs, block * blocksize +
-					page * pagesize, pagesize_2k);
-			imx_nandboot_send_page(regs, NFC_OUTPUT, pagesize_2k);
-			page++;
-
-			if (pagesize_2k) {
-				if ((readw(spare0) & 0xff) != 0xff)
-					continue;
-			} else {
-				if ((readw(spare0 + 4) & 0xff00) != 0xff00)
-					continue;
-			}
-
-			__memcpy32(dest, base, pagesize);
-			dest += pagesize;
-			size -= pagesize;
-
-			if (size <= 0)
-				return;
-		}
-		block++;
-	}
-}
-#define CONFIG_NAND_IMX_BOOT_DEBUG
-#ifdef CONFIG_NAND_IMX_BOOT_DEBUG
-#include <command.h>
-
-static int do_nand_boot_test(struct command *cmdtp, int argc, char *argv[])
-{
-	void *dest;
-	int size;
-
-	if (argc < 3)
-		return COMMAND_ERROR_USAGE;
-
-	dest = (void *)strtoul_suffix(argv[1], NULL, 0);
-	size = strtoul_suffix(argv[2], NULL, 0);
-
-	imx_nand_load_image(dest, size);
-
-	return 0;
-}
-
-static const __maybe_unused char cmd_nand_boot_test_help[] =
-"Usage: nand_boot_test <dest> <size>\n"
-"This command loads the booloader from the NAND memory like the reset\n"
-"routine does. Its intended for development tests only";
-
-BAREBOX_CMD_START(nand_boot_test)
-	.cmd		= do_nand_boot_test,
-	.usage		= "load bootloader from NAND",
-	BAREBOX_CMD_HELP(cmd_nand_boot_test_help)
-BAREBOX_CMD_END
-#endif
-
-#endif /* CONFIG_NAND_IMX_BOOT */
-
 /*
  * Main initialization routine
  * @return  0 if successful; non-zero otherwise
-- 
1.7.2.3



From s.hauer at pengutronix.de  Thu Feb 24 11:04:40 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Thu, 24 Feb 2011 17:04:40 +0100
Subject: Install barebox on target
In-Reply-To: <4D665867.4010404@telemotive.de>
References: <4D665867.4010404@telemotive.de>
Message-ID: <20110224160440.GQ7381@pengutronix.de>

Hi Thomas,

On Thu, Feb 24, 2011 at 02:08:55PM +0100, Thomas Mayer wrote:
> Hi,
> 
> i'm working on a project with a Freescale i.MX35 3-Stack board and try
> to use barebox as bootloader.
> My problem is that i don't know how to install barebox to NAND memory or
> better directly to a sd-card.
> Is there any documentation about this really basic stuff?

According to the schematics the i.MX35 3-stack is without modifying it
only able to boot in external boot mode, that is nand or nor flash.
First step should be starting barebox as a second stage loader from the
existing bootloader. For this the defconfig for the 3stack should
be suitable. If you are using redboot you can use the following (replace
0x100000 with some valid sdram address):

load -r -b 0x100000 barebox.bin
run 0x100000

The same for u-Boot:

tftp 0x80100000 barebox.bin
go 0x80100000

If this works you should check if networking works:

dhcp; tftp barebox.bin /dev/ram0

or, if you use the smc9117 on the debug board:

ethact eth1; dhcp; tftp barebox.bin /dev/ram0

you can then flash barebox to either nand or nor flash:

erase /dev/nor0.barebox; tftp barebox.bin /dev/nor0.barebox

or:

erase /dev/nand0.barebox.bb; tftp barebox.bin /dev/nand0.barebox.bb

I suggest that you first try to flash barebox to the flash that does
not contain your original bootloader (if you haven't got jtag)

For getting a barebox suitable for starting from NAND you should enable
CONFIG_NAND_IMX_BOOT in your config.

The 3stack should be able to work in internal boot mode if TP41/42 on
the personality board are adjusted.

You also might want to apply the boot mode cleanup patch I just posted
which makes it a bit clearer what boot modes are actually supported by
barebox.

Hope that helps,

 Sascha

> 
> regards
> Thomas

> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From jbe at pengutronix.de  Thu Feb 24 16:10:37 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 24 Feb 2011 22:10:37 +0100
Subject: [PATCH] S3C24xx: NAND management changes to support booting from NAND
Message-ID: <1298581839-15542-1-git-send-email-jbe@pengutronix.de>

It seems there are more variants of the mini2440 in the wild than I ever
thought.

In order to support booting from NAND some important settings like NAND's page
size and address cycle count must be known. These settings are provided by
four external pins and can be read back from an register of the NFC. This
patch set makes the S3C24xx NFC driver using these bits.

Hopefully now all mini2440 variants can be booted from NAND without the need
for special configurations.

Juergen



From jbe at pengutronix.de  Thu Feb 24 16:10:38 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 24 Feb 2011 22:10:38 +0100
Subject: [PATCH 1/2] mini2440: Add more info about possible SDRAM and flash
	devices
In-Reply-To: <1298581839-15542-1-git-send-email-jbe@pengutronix.de>
References: <1298581839-15542-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1298581839-15542-2-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

It seems there are various variants of the mini2440 in the wild. Not only
the SDRAMs differ, but more important the NANDs also differ.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/mini2440/mini2440.c |   50 +++++++++++++++++++++++-----------
 1 files changed, 34 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index ab309a0..1e5813a 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -316,23 +316,41 @@ This system is based on a Samsung S3C2440 CPU. The card is shipped with:
 - 12 MHz crystal reference
 - 32.768 kHz crystal reference
 - SDRAM 64 MiB (one bank only)
-   - HY57V561620 (two devices for 64 MiB to form a 32 bit bus)
-     - 4M x 16bit x 4 Banks Mobile SDRAM
-     - 8192 refresh cycles / 64 ms
-     - CL2\@100 MHz
-     - 133 MHz max
-     - collumn address size is 9 bits
-     - row address size is 13 bits
-   - MT48LC16M16 (two devices for 64 MiB to form a 32 bit bus)
-     - 4M x 16bit x 4 Banks Mobile SDRAM
-     - commercial & industrial type
-     - 8192 refresh cycles / 64 ms
-     - CL2\@100 MHz
-     - 133 MHz max
-     - collumn address size is 9 bits
-     - row address size is 13 bits
+   - Hynix SDRAM
+    - HY57V561620FTP-H (two devices for 64 MiB to form a 32 bit bus)
+      - 4M x 16bit x 4 Banks Mobile SDRAM
+      - 8192 refresh cycles / 64 ms
+      - CL2\@100 MHz
+      - 133 MHz max
+      - collumn address size is 9 bits
+      - row address size is 13 bits
+   - Micron SDRAM
+    - MT48LC16M16A2-75IT (two devices for 64 MiB to form a 32 bit bus)
+    - MT48LC16M16A2-7E (two devices for 64 MiB to form a 32 bit bus)
+      - 4M x 16bit x 4 Banks Mobile SDRAM
+      - commercial & industrial type
+      - 8192 refresh cycles / 64 ms
+      - CL2\@100 MHz
+      - 133 MHz max
+      - collumn address size is 9 bits
+      - row address size is 13 bits
 - NAND Flash 128MiB...1GiB
-   - K9Fxx08
+   - K9F1208U0C
+      - VID: 0xec, DID: 0x76
+      - Samsung/64MiB 3,3V 8-bit
+      - 512 + 8 bytes per page, 16 kiB block size, 4 address cycles
+   - K9F1G08UOB
+      - VID: 0xec, DID: 0xf1
+      - Samsung/128MiB 3,3V 8-bit
+      - 2048 + 64 bytes per page, 128 kiB block size, 4 address cycles
+   - K9F2G08UOB
+      - VID: 0xec, DID: 0xda
+      - Samsung/256MiB 3,3V 8-bit
+      - 2048 + 64 bytes per page, 128 kiB block size, 5 address cycles
+   - K9K8G08U0A
+      - VID: 0xec, DID: 0xd3
+      - Samsung/1GiB 3,3V 8-bit
+      - 2048 + 64 bytes per page, 128 kiB block size, 5 address cycles
 - NOR Flash (up to 22 address lines available)
    - AM29LV160DB, 2 MiB
    - SST39VF1601, 2 MiB
-- 
1.7.2.3



From jbe at pengutronix.de  Thu Feb 24 16:10:39 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Thu, 24 Feb 2011 22:10:39 +0100
Subject: [PATCH 2/2] mini2440: Consider correct NAND page size for boot.
In-Reply-To: <1298581839-15542-1-git-send-email-jbe@pengutronix.de>
References: <1298581839-15542-1-git-send-email-jbe@pengutronix.de>
Message-ID: <1298581839-15542-3-git-send-email-jbe@pengutronix.de>

From: Juergen Beisert <juergen at kreuzholzen.de>

When booting from NAND, its important to know the correct page size. When
the NAND is used as the boot source, four dedicated pins are used to configure
the correct page size and address cycles. These pins can be read back in one
of the NFC registers to parametrize the load function.

This patch also extends the read routine to support more than four address
cycles on demand.

BTW: At least some mini2440s are misconfigured to use five address cycles for
a NAND device that is known to need only four address cycles. In this case the
vendor is at our side: This NAND simply ignores any additional address cycles
than required.

Signed-off-by: Juergen Beisert <juergen at kreuzholzen.de>
---
 arch/arm/boards/a9m2410/a9m2410.c                 |    2 +-
 arch/arm/boards/a9m2440/a9m2440.c                 |    2 +-
 arch/arm/boards/mini2440/mini2440.c               |    2 +-
 arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h |    2 +-
 drivers/mtd/nand/nand_s3c2410.c                   |   60 +++++++++++++++------
 5 files changed, 48 insertions(+), 20 deletions(-)

diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c
index 57d8fa3..8cbaec5 100644
--- a/arch/arm/boards/a9m2410/a9m2410.c
+++ b/arch/arm/boards/a9m2410/a9m2410.c
@@ -176,7 +176,7 @@ device_initcall(a9m2410_devices_init);
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
+	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
 }
 #endif
 
diff --git a/arch/arm/boards/a9m2440/a9m2440.c b/arch/arm/boards/a9m2440/a9m2440.c
index 764cd65..39b5276 100644
--- a/arch/arm/boards/a9m2440/a9m2440.c
+++ b/arch/arm/boards/a9m2440/a9m2440.c
@@ -182,7 +182,7 @@ device_initcall(a9m2440_devices_init);
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
+	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
 }
 #endif
 
diff --git a/arch/arm/boards/mini2440/mini2440.c b/arch/arm/boards/mini2440/mini2440.c
index 1e5813a..fe60d3b 100644
--- a/arch/arm/boards/mini2440/mini2440.c
+++ b/arch/arm/boards/mini2440/mini2440.c
@@ -281,7 +281,7 @@ device_initcall(mini2440_devices_init);
 #ifdef CONFIG_S3C24XX_NAND_BOOT
 void __bare_init nand_boot(void)
 {
-	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
+	s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
 }
 #endif
 
diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
index d06287e..7610b4e 100644
--- a/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
+++ b/arch/arm/mach-s3c24xx/include/mach/s3c24x0-nand.h
@@ -19,7 +19,7 @@
  */
 
 #ifdef CONFIG_S3C24XX_NAND_BOOT
-extern void s3c24x0_nand_load_image(void*, int, int, int);
+extern void s3c24x0_nand_load_image(void*, int, int);
 #endif
 
 /**
diff --git a/drivers/mtd/nand/nand_s3c2410.c b/drivers/mtd/nand/nand_s3c2410.c
index df0b7c1..374a6fa 100644
--- a/drivers/mtd/nand/nand_s3c2410.c
+++ b/drivers/mtd/nand/nand_s3c2410.c
@@ -497,12 +497,23 @@ static void __nand_boot_init wait_for_completion(void __iomem *host)
 		;
 }
 
-static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs)
+static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs,
+					int ps, int c)
 {
 	send_addr(host, offs & 0xff);
-	send_addr(host, (offs >> 9) & 0xff);
-	send_addr(host, (offs >> 17) & 0xff);
-	send_addr(host, (offs >> 25) & 0xff);
+
+	if (ps == 512) {
+		send_addr(host, (offs >> 9) & 0xff);
+		send_addr(host, (offs >> 17) & 0xff);
+		if (c > 3)
+			send_addr(host, (offs >> 25) & 0xff);
+	} else {
+		send_addr(host, (offs >> 8) & 0xf0);
+		send_addr(host, (offs >> 12) & 0xff);
+		send_addr(host, (offs >> 20) & 0xff);
+		if (c > 4)
+			send_addr(host, (offs >> 28) & 0xff);
+	}
 }
 
 /**
@@ -510,24 +521,42 @@ static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs)
  * @param[out] dest Pointer to target area (in SDRAM)
  * @param[in] size Bytes to read from NAND device
  * @param[in] page Start page to read from
- * @param[in] pagesize Size of each page in the NAND
  *
  * This function must be located in the first 4kiB of the barebox image
- * (guess why). When this routine is running the SDRAM is up and running
- * and it runs from the correct address (physical=linked address).
- * TODO Could we access the platform data from the boardfile?
- * Due to it makes no sense this function does not return in case of failure.
+ * (guess why).
  */
-void __nand_boot_init s3c24x0_nand_load_image(void *dest, int size, int page, int pagesize)
+void __nand_boot_init s3c24x0_nand_load_image(void *dest, int size, int page)
 {
 	void __iomem *host = (void __iomem *)S3C24X0_NAND_BASE;
-	int i;
+	unsigned pagesize;
+	int i, cycle;
 
 	/*
 	 * Reenable the NFC and use the default (but slow) access
 	 * timing or the board specific setting if provided.
 	 */
 	enable_nand_controller(host, BOARD_DEFAULT_NAND_TIMING);
+
+	/* use the current NAND hardware configuration */
+	switch (readl(S3C24X0_NAND_BASE) & 0xf) {
+	case 0x6:	/* 8 bit, 4 addr cycles, 512 bpp, normal NAND */
+		pagesize = 512;
+		cycle = 4;
+		break;
+	case 0xc:	/* 8 bit, 4 addr cycles, 2048 bpp, advanced NAND */
+		pagesize = 2048;
+		cycle = 4;
+		break;
+	case 0xe:	/* 8 bit, 5 addr cycles, 2048 bpp, advanced NAND */
+		pagesize = 2048;
+		cycle = 5;
+		break;
+	default:
+		/* we cannot output an error message here :-( */
+		disable_nand_controller(host);
+		return;
+	}
+
 	enable_cs(host);
 
 	/* Reset the NAND device */
@@ -538,7 +567,7 @@ void __nand_boot_init s3c24x0_nand_load_image(void *dest, int size, int page, in
 	do {
 		enable_cs(host);
 		send_cmd(host, NAND_CMD_READ0);
-		nfc_addr(host, page * pagesize);
+		nfc_addr(host, page * pagesize, pagesize, cycle);
 		wait_for_completion(host);
 		/* copy one page (do *not* use readsb() here!)*/
 		for (i = 0; i < pagesize; i++)
@@ -560,22 +589,21 @@ void __nand_boot_init s3c24x0_nand_load_image(void *dest, int size, int page, in
 static int do_nand_boot_test(struct command *cmdtp, int argc, char *argv[])
 {
 	void *dest;
-	int size, pagesize;
+	int size;
 
 	if (argc < 3)
 		return COMMAND_ERROR_USAGE;
 
 	dest = (void *)strtoul_suffix(argv[1], NULL, 0);
 	size = strtoul_suffix(argv[2], NULL, 0);
-	pagesize = strtoul_suffix(argv[3], NULL, 0);
 
-	s3c24x0_nand_load_image(dest, size, 0, pagesize);
+	s3c24x0_nand_load_image(dest, size, 0);
 
 	return 0;
 }
 
 static const __maybe_unused char cmd_nand_boot_test_help[] =
-"Usage: nand_boot_test <dest> <size> <pagesize>\n";
+"Usage: nand_boot_test <dest> <size>\n";
 
 BAREBOX_CMD_START(nand_boot_test)
 	.cmd		= do_nand_boot_test,
-- 
1.7.2.3



From marek.belisko at gmail.com  Fri Feb 25 02:09:02 2011
From: marek.belisko at gmail.com (Belisko Marek)
Date: Fri, 25 Feb 2011 08:09:02 +0100
Subject: [PATCH] S3C24xx: NAND management changes to support booting from
	NAND
In-Reply-To: <1298581839-15542-1-git-send-email-jbe@pengutronix.de>
References: <1298581839-15542-1-git-send-email-jbe@pengutronix.de>
Message-ID: <AANLkTim1Gh4v672sXxg6PrPMPtbS1wPsQo-HbJfyRWAG@mail.gmail.com>

Hi Juergen,

On Thu, Feb 24, 2011 at 10:10 PM, Juergen Beisert <jbe at pengutronix.de> wrote:
> It seems there are more variants of the mini2440 in the wild than I ever
> thought.
>
> In order to support booting from NAND some important settings like NAND's page
> size and address cycle count must be known. These settings are provided by
> four external pins and can be read back from an register of the NFC. This
> patch set makes the S3C24xx NFC driver using these bits.
>
> Hopefully now all mini2440 variants can be booted from NAND without the need
> for special configurations.
Seems my board is somehow cursed. I apply those 2 patche up to the
next tree (also add slo wdown sdram timing)
but nothing helps. Board still doesn't boot from flash :(.
>
> Juergen
>
>
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>

thanks,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
icq: 290551086
web: http://open-nandra.com


From thomas.mayer at telemotive.de  Fri Feb 25 04:15:01 2011
From: thomas.mayer at telemotive.de (Thomas Mayer)
Date: Fri, 25 Feb 2011 10:15:01 +0100
Subject: Install barebox on target
In-Reply-To: <20110224160440.GQ7381@pengutronix.de>
References: <4D665867.4010404@telemotive.de>
	<20110224160440.GQ7381@pengutronix.de>
Message-ID: <4D677315.5090600@telemotive.de>

Hi Sascha,

That's not quite correct. When you use the debug + personality board you
can boot directly from a mmc-card which contains bootloader, kernel and
rootfs without modifications. Only if you use the single personality
board, you have to modify die board a little bit.
Thanks for your short introduction. I tried to run the barebox image
with u-boot and it seems to work. But after I get the following output
barebox stops and do nothing.


MX35 U-Boot > go 0x80100000
## Starting application at 0x80100000 ...
h?

barebox 2011.02.0 (Feb 25 2011 - 09:49:05)

Board: Freescale MX35 3Stack
cfi_probe: cfi_flash base: 0xa0000000 size: 0x04000000
mc13892-i2c at mc13892-i2c0: PMIC ID: 0x000045d0 [Rev: 2.0a]
register_device: already registered eth0


Have you any idea what the problem is?


regards
Thomas


Am 24.02.2011 17:04, schrieb Sascha Hauer:
> Hi Thomas,
>
> On Thu, Feb 24, 2011 at 02:08:55PM +0100, Thomas Mayer wrote:
>   
>> Hi,
>>
>> i'm working on a project with a Freescale i.MX35 3-Stack board and try
>> to use barebox as bootloader.
>> My problem is that i don't know how to install barebox to NAND memory or
>> better directly to a sd-card.
>> Is there any documentation about this really basic stuff?
>>     
> According to the schematics the i.MX35 3-stack is without modifying it
> only able to boot in external boot mode, that is nand or nor flash.
> First step should be starting barebox as a second stage loader from the
> existing bootloader. For this the defconfig for the 3stack should
> be suitable. If you are using redboot you can use the following (replace
> 0x100000 with some valid sdram address):
>
> load -r -b 0x100000 barebox.bin
> run 0x100000
>
> The same for u-Boot:
>
> tftp 0x80100000 barebox.bin
> go 0x80100000
>
> If this works you should check if networking works:
>
> dhcp; tftp barebox.bin /dev/ram0
>
> or, if you use the smc9117 on the debug board:
>
> ethact eth1; dhcp; tftp barebox.bin /dev/ram0
>
> you can then flash barebox to either nand or nor flash:
>
> erase /dev/nor0.barebox; tftp barebox.bin /dev/nor0.barebox
>
> or:
>
> erase /dev/nand0.barebox.bb; tftp barebox.bin /dev/nand0.barebox.bb
>
> I suggest that you first try to flash barebox to the flash that does
> not contain your original bootloader (if you haven't got jtag)
>
> For getting a barebox suitable for starting from NAND you should enable
> CONFIG_NAND_IMX_BOOT in your config.
>
> The 3stack should be able to work in internal boot mode if TP41/42 on
> the personality board are adjusted.
>
> You also might want to apply the boot mode cleanup patch I just posted
> which makes it a bit clearer what boot modes are actually supported by
> barebox.
>
> Hope that helps,
>
>  Sascha
>
>   
>> regards
>> Thomas
>>     
>   
>> _______________________________________________
>> barebox mailing list
>> barebox at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox
>>     
>
>   



From F.Vanalme at TELEVIC.com  Fri Feb 25 04:31:09 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Fri, 25 Feb 2011 10:31:09 +0100
Subject: writing environment in NAND flash
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00C9D@SRV-VS06.TELEVIC.COM>

I have problems to save my environment settings. Although I set e.g. the MAC address and some other values and do the saveenv command, after reset, all settings have disappeared.
In the logging on the console port, I detected this :
"wrong crc on env
no valid environment found on /dev/env0. Using default environment"

That will be, of course, the cause why the settings disappear.
Further investigation with debugging enabled in nand_imx.c showed that Barebox reads 4 pages when starting up (0x80..0x83). That looks OK, because the environment's size is 6156 bytes. So, indeen 4 pages needed. However, when saving the environment, I only see appear one page write, i.e. on page 0x80. Of course, when reading back the four pages, the 2nd, 3rd and 4th page have all FF because they have never been written (causing a wrong CRC). Any idea why I only see 1 page write when saving the environment although the size is 6156 bytes ? Any hints where to look in the sources ?

Thanks in advance !



Filip



From F.Vanalme at TELEVIC.com  Fri Feb 25 08:50:22 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Fri, 25 Feb 2011 14:50:22 +0100
Subject: writing environment in NAND flash
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD1@SRV-VS06.TELEVIC.COM>

I have problems to save my environment settings. Although I set e.g. the MAC address and some other values and do the saveenv command, after reset, all settings have disappeared.
In the logging on the console port, I detected this :
"wrong crc on env
no valid environment found on /dev/env0. Using default environment"

That will be, of course, the cause why the settings disappear.
Further investigation with debugging enabled in nand_imx.c showed that Barebox reads 4 pages when starting up (0x80..0x83). That looks OK, because the environment's size is 6156 bytes. So, indeen 4 pages needed. However, when saving the environment, I only see appear one page write, i.e. on page 0x80. Of course, when reading back the four pages, the 2nd, 3rd and 4th page have all FF because they have never been written (causing a wrong CRC). Any idea why I only see 1 page write when saving the environment although the size is 6156 bytes ? Any hints where to look in the sources ?

Thanks in advance !



Filip


From jbe at pengutronix.de  Fri Feb 25 08:56:28 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Fri, 25 Feb 2011 14:56:28 +0100
Subject: writing environment in NAND flash
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD1@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD1@SRV-VS06.TELEVIC.COM>
Message-ID: <201102251456.28798.jbe@pengutronix.de>

Hi Filip,

Vanalme Filip wrote:
> [...]
> CRC). Any idea why I only see 1 page write when saving the environment
> although the size is 6156 bytes ?

Is the write of the first page successfull?

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From F.Vanalme at TELEVIC.com  Fri Feb 25 09:13:48 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Fri, 25 Feb 2011 15:13:48 +0100
Subject: writing environment in NAND flash
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD1@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD1@SRV-VS06.TELEVIC.COM>
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD5@SRV-VS06.TELEVIC.COM>

> -----Original Message-----
> From: barebox-bounces at lists.infradead.org [mailto:barebox-
> bounces at lists.infradead.org] On Behalf Of Vanalme Filip
> Sent: vrijdag 25 februari 2011 14:50
> To: barebox at lists.infradead.org
> Subject: writing environment in NAND flash
> 
> I have problems to save my environment settings. Although I set e.g. the MAC
> address and some other values and do the saveenv command, after reset, all
> settings have disappeared.
> In the logging on the console port, I detected this :
> "wrong crc on env
> no valid environment found on /dev/env0. Using default environment"
> 
> That will be, of course, the cause why the settings disappear.
> Further investigation with debugging enabled in nand_imx.c showed that Barebox
> reads 4 pages when starting up (0x80..0x83). That looks OK, because the
> environment's size is 6156 bytes. So, indeen 4 pages needed. However, when
> saving the environment, I only see appear one page write, i.e. on page 0x80. Of
> course, when reading back the four pages, the 2nd, 3rd and 4th page have all FF
> because they have never been written (causing a wrong CRC). Any idea why I
> only see 1 page write when saving the environment although the size is 6156
> bytes ? Any hints where to look in the sources ?
> 
> Thanks in advance !
> 
> 
> 
> Filip
> 
[Filip]  Sorry for sending this message twice to the mailing list....

I have found the cause of this problem.
I have CONFIG_MTD_NAND_VERIFY_WRITE=y.
So, after a write, the code performs a read to verify the written data. For i.MX27, this mean that the function imx_nand_very_buf() is called. Well, that function looks like this :

static int
imx_nand_verify_buf (struct mtd_info *mtd, const u_char * buf, int len) {
  return -EFAULT;
}

Yep...verification always fails... !
Must be a function that still is under development, no ? (although I would have expected a "TODO" somewhere in that function....).

Two things I can do : set the configuration flag to n or add code to this function to really verify the written data.

> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From eric at eukrea.com  Fri Feb 25 09:39:24 2011
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Fri, 25 Feb 2011 15:39:24 +0100
Subject: [PATCH 2/3] eukrea_cpuimx35: use OTG workaround only when gadget is
	selected
In-Reply-To: <1298644765-31654-1-git-send-email-eric@eukrea.com>
References: <1298644765-31654-1-git-send-email-eric@eukrea.com>
Message-ID: <1298644765-31654-2-git-send-email-eric@eukrea.com>

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
index f7a6169..f377793 100644
--- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
+++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
@@ -199,11 +199,12 @@ static int eukrea_cpuimx35_devices_init(void)
 	imx35_usb_init();
 	register_device(&usbh2_dev);
 #endif
+#ifdef CONFIG_USB_GADGET
 	/* Workaround ENGcm09152 */
 	tmp = readl(IMX_OTG_BASE + 0x608);
 	writel(tmp | (1 << 23), IMX_OTG_BASE + 0x608);
 	register_device(&usbotg_dev);
-
+#endif
 	armlinux_add_dram(&sdram_dev);
 	armlinux_set_bootparams((void *)0x80000100);
 	armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX35);
-- 
1.7.4



From eric at eukrea.com  Fri Feb 25 09:39:23 2011
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Fri, 25 Feb 2011 15:39:23 +0100
Subject: [PATCH 1/3] eukrea_cpuimx35: switch to default env
Message-ID: <1298644765-31654-1-git-send-email-eric@eukrea.com>

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 arch/arm/boards/eukrea_cpuimx35/env/bin/_update    |   36 -------------
 arch/arm/boards/eukrea_cpuimx35/env/bin/boot       |   52 -------------------
 arch/arm/boards/eukrea_cpuimx35/env/bin/hush_hack  |    1 -
 arch/arm/boards/eukrea_cpuimx35/env/bin/init       |   45 -----------------
 arch/arm/boards/eukrea_cpuimx35/env/bin/init_board |   20 +++++++
 .../boards/eukrea_cpuimx35/env/bin/update_kernel   |    8 ---
 .../arm/boards/eukrea_cpuimx35/env/bin/update_root |    8 ---
 arch/arm/boards/eukrea_cpuimx35/env/config         |   53 ++++++++++++++------
 8 files changed, 57 insertions(+), 166 deletions(-)
 delete mode 100644 arch/arm/boards/eukrea_cpuimx35/env/bin/_update
 delete mode 100644 arch/arm/boards/eukrea_cpuimx35/env/bin/boot
 delete mode 100644 arch/arm/boards/eukrea_cpuimx35/env/bin/hush_hack
 delete mode 100644 arch/arm/boards/eukrea_cpuimx35/env/bin/init
 create mode 100644 arch/arm/boards/eukrea_cpuimx35/env/bin/init_board
 delete mode 100644 arch/arm/boards/eukrea_cpuimx35/env/bin/update_kernel
 delete mode 100644 arch/arm/boards/eukrea_cpuimx35/env/bin/update_root

diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/_update b/arch/arm/boards/eukrea_cpuimx35/env/bin/_update
deleted file mode 100644
index 014bce3..0000000
--- a/arch/arm/boards/eukrea_cpuimx35/env/bin/_update
+++ /dev/null
@@ -1,36 +0,0 @@
-#!/bin/sh
-
-if [ -z "$part" -o -z "$image" ]; then
-	echo "define \$part and \$image"
-	exit 1
-fi
-
-if [ ! -e "$part" ]; then
-	echo "Partition $part does not exist"
-	exit 1
-fi
-
-if [ $# = 1 ]; then
-	image=$1
-fi
-
-if [ x$ip = xdhcp ]; then
-	dhcp
-fi
-
-ping $eth0.serverip
-if [ $? -ne 0 ] ; then
-	echo "update aborted"
-	exit 1
-fi
-
-unprotect $part
-
-echo
-echo "erasing partition $part"
-erase $part
-
-echo
-echo "flashing $image to $part"
-echo
-tftp $image $part
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/boot b/arch/arm/boards/eukrea_cpuimx35/env/bin/boot
deleted file mode 100644
index fca5b8c..0000000
--- a/arch/arm/boards/eukrea_cpuimx35/env/bin/boot
+++ /dev/null
@@ -1,52 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-if [ x$1 = xjffS2 ]; then
-	root=jffs2
-	kernel=nand
-fi
-
-if [ x$1 = xubifs ]; then
-	root=ubifs
-	kernel=nand
-fi
-
-if [ x$1 = xnet ]; then
-	root=net
-	kernel=net
-fi
-
-if [ x$ip = xdhcp ]; then
-	bootargs="$bootargs ip=dhcp"
-else
-	if [ x$ip = xoff ]; then
-		bootargs="$bootargs ip=off"
-	else
-		bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::"
-	fi
-fi
-
-if [ x$root = xjffs2 ]; then
-	bootargs="$bootargs root=/dev/mtdblock$rootpartnum_nand rootfstype=jffs2"
-fi
-
-if [ x$root = xubifs ]; then
-	bootargs="$bootargs root=ubi0:$ubiroot ubi.mtd=$rootpartnum_nand rootfstype=ubifs"
-fi
-
-if [ x$root = xnet ]; then
-	bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp"
-fi
-
-bootargs="$bootargs mtdparts=mxc_nand:$nand_parts"
-
-if [ $kernel = net ]; then
-	if [ x$ip = xdhcp ]; then
-		dhcp
-	fi
-	tftp $uimage uImage || exit 1
-	bootm uImage
-else
-	bootm /dev/nand0.kernel.bb
-fi
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/hush_hack b/arch/arm/boards/eukrea_cpuimx35/env/bin/hush_hack
deleted file mode 100644
index 5fffa92..0000000
--- a/arch/arm/boards/eukrea_cpuimx35/env/bin/hush_hack
+++ /dev/null
@@ -1 +0,0 @@
-nand -a /dev/nand0.*
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/init b/arch/arm/boards/eukrea_cpuimx35/env/bin/init
deleted file mode 100644
index b56d7b5..0000000
--- a/arch/arm/boards/eukrea_cpuimx35/env/bin/init
+++ /dev/null
@@ -1,45 +0,0 @@
-#!/bin/sh
-
-PATH=/env/bin
-export PATH
-
-. /env/config
-if [ -e /dev/nand0 ]; then
-	addpart /dev/nand0 $nand_parts
-
-	# Uh, oh, hush first expands wildcards and then starts executing
-	# commands. What a bug!
-	source /env/bin/hush_hack 
-fi
-
-if [ -f /env/logo.bmp ]; then
-	fb0.enable=1
-	bmp /env/logo.bmp
-	gpio_set_value 1 1
-elif [ -f /env/logo.bmp.lzo ]; then
-	unlzo /env/logo.bmp.lzo /logo.bmp
-	fb0.enable=1
-	bmp /logo.bmp
-	gpio_set_value 1 1
-fi
-
-if [ -z $eth0.ethaddr ]; then
-	while [ -z $eth0.ethaddr ]; do
-		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
-	done
-	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
-	saveenv
-fi
-
-echo
-echo -n "Hit any key to stop autoboot: "
-timeout -a $autoboot_timeout
-if [ $? != 0 ]; then
-	echo
-	echo "type update_kernel [<imagename>] to update kernel into flash"
-	echo "type update_root [<imagename>] to update rootfs into flash"
-	echo
-	exit
-fi
-
-boot
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/init_board b/arch/arm/boards/eukrea_cpuimx35/env/bin/init_board
new file mode 100644
index 0000000..173ecf9
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx35/env/bin/init_board
@@ -0,0 +1,20 @@
+#!/bin/sh
+
+if [ -f /env/logo.bmp ]; then
+	bmp /env/logo.bmp
+	fb0.enable=1
+	gpio_set_value 1 1
+elif [ -f /env/logo.bmp.lzo ]; then
+	unlzo /env/logo.bmp.lzo /logo.bmp
+	bmp /logo.bmp
+	fb0.enable=1
+	gpio_set_value 1 1
+fi
+
+if [ -z $eth0.ethaddr ]; then
+	while [ -z $eth0.ethaddr ]; do
+		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
+	done
+	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
+	saveenv
+fi
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/update_kernel b/arch/arm/boards/eukrea_cpuimx35/env/bin/update_kernel
deleted file mode 100644
index c2d2cc3..0000000
--- a/arch/arm/boards/eukrea_cpuimx35/env/bin/update_kernel
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-image=$uimage
-part=/dev/nand0.kernel.bb
-
-. /env/bin/_update $1
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/bin/update_root b/arch/arm/boards/eukrea_cpuimx35/env/bin/update_root
deleted file mode 100644
index dd89a5a..0000000
--- a/arch/arm/boards/eukrea_cpuimx35/env/bin/update_root
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-image=$rootfs
-part=/dev/nand0.root.bb
-
-. /env/bin/_update $1
diff --git a/arch/arm/boards/eukrea_cpuimx35/env/config b/arch/arm/boards/eukrea_cpuimx35/env/config
index fc99e51..6ed6b24 100644
--- a/arch/arm/boards/eukrea_cpuimx35/env/config
+++ b/arch/arm/boards/eukrea_cpuimx35/env/config
@@ -1,27 +1,48 @@
 #!/bin/sh
 
-# can be either 'net' or 'nand''
-kernel=nand
-root=ubifs
+# otg port mode : can be 'host' or 'device'
+otg_mode="device"
 
-basedir=cpuimx35
-uimage=$basedir/uImage
-rootfs=$basedir/rootfs
-
-autoboot_timeout=1
-
-nfsroot=""
-bootargs="console=ttymxc0,115200"
-
-nand_parts="256k(barebox)ro,128k(bareboxenv),2432k(kernel),-(root)"
-rootpartnum_nand=3
-ubiroot="eukrea-cpuimx35-rootfs"
+machine=eukrea-cpuimx35
 
 # use 'dhcp' to do dhcp in barebox and in kernel
-ip=off
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=none
 
 # or set your networking parameters here
 #eth0.ipaddr=a.b.c.d
 #eth0.netmask=a.b.c.d
 #eth0.gateway=a.b.c.d
 #eth0.serverip=a.b.c.d
+
+# can be either 'net' or 'nand'
+kernel_loc=nand
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=nand
+
+# rootfs
+rootfs_type=ubifs
+rootfsimage=$machine/rootfs.$rootfs_type
+
+# kernel
+kernelimage_type=uimage
+kernelimage=$machine/uImage-${machine}.bin
+
+# barebox and it's env
+bareboximage=$machine/barebox-${machine}.bin
+bareboxenvimage=$machine/bareboxenv-${machine}.bin
+
+nfsroot="$eth0.serverip:/srv/nfs/$machine"
+
+autoboot_timeout=1
+
+bootargs="console=ttymxc0,115200 otg_mode=$otg_mode"
+
+nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)"
+rootfs_mtdblock_nand=3
+nand_device="mxc_nand"
+ubiroot="$machine-rootfs"
+device_type="nand"
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
-- 
1.7.4



From eric at eukrea.com  Fri Feb 25 09:39:48 2011
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Fri, 25 Feb 2011 15:39:48 +0100
Subject: [PATCH 2/2] add eukrea_cpuimx51 board
In-Reply-To: <1298644788-31735-1-git-send-email-eric@eukrea.com>
References: <1298644788-31735-1-git-send-email-eric@eukrea.com>
Message-ID: <1298644788-31735-2-git-send-email-eric@eukrea.com>

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/eukrea_cpuimx51/Makefile           |    3 +
 arch/arm/boards/eukrea_cpuimx51/config.h           |   24 ++
 arch/arm/boards/eukrea_cpuimx51/env/bin/init_board |   20 ++
 arch/arm/boards/eukrea_cpuimx51/env/config         |   58 ++++
 arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c  |  175 ++++++++++++
 .../arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox |    4 +
 arch/arm/boards/eukrea_cpuimx51/flash_header.c     |   84 ++++++
 arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S    |  216 +++++++++++++++
 arch/arm/configs/eukrea_cpuimx51_defconfig         |  279 ++++++++++++++++++++
 arch/arm/mach-imx/Kconfig                          |   10 +
 11 files changed, 874 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/Makefile
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/config.h
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/env/bin/init_board
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/env/config
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/flash_header.c
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
 create mode 100644 arch/arm/configs/eukrea_cpuimx51_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 57a045f..091fa22 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -70,6 +70,7 @@ board-$(CONFIG_MACH_EDB9315A)			:= edb93xx
 board-$(CONFIG_MACH_EUKREA_CPUIMX25)		:= eukrea_cpuimx25
 board-$(CONFIG_MACH_EUKREA_CPUIMX27)		:= eukrea_cpuimx27
 board-$(CONFIG_MACH_EUKREA_CPUIMX35)		:= eukrea_cpuimx35
+board-$(CONFIG_MACH_EUKREA_CPUIMX51SD)		:= eukrea_cpuimx51
 board-$(CONFIG_MACH_FREESCALE_MX25_3STACK)	:= freescale-mx25-3-stack
 board-$(CONFIG_MACH_FREESCALE_MX35_3STACK)	:= freescale-mx35-3-stack
 board-$(CONFIG_MACH_IMX21ADS)			:= imx21ads
diff --git a/arch/arm/boards/eukrea_cpuimx51/Makefile b/arch/arm/boards/eukrea_cpuimx51/Makefile
new file mode 100644
index 0000000..0f506a3
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/Makefile
@@ -0,0 +1,3 @@
+obj-y += lowlevel_init.o
+obj-y += eukrea_cpuimx51.o
+obj-y += flash_header.o
diff --git a/arch/arm/boards/eukrea_cpuimx51/config.h b/arch/arm/boards/eukrea_cpuimx51/config.h
new file mode 100644
index 0000000..d62e146
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/config.h
@@ -0,0 +1,24 @@
+/**
+ * @file
+ * @brief Global defintions for the ARM i.MX51 based cpuimx51 board
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif	/* __CONFIG_H */
diff --git a/arch/arm/boards/eukrea_cpuimx51/env/bin/init_board b/arch/arm/boards/eukrea_cpuimx51/env/bin/init_board
new file mode 100644
index 0000000..173ecf9
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/env/bin/init_board
@@ -0,0 +1,20 @@
+#!/bin/sh
+
+if [ -f /env/logo.bmp ]; then
+	bmp /env/logo.bmp
+	fb0.enable=1
+	gpio_set_value 1 1
+elif [ -f /env/logo.bmp.lzo ]; then
+	unlzo /env/logo.bmp.lzo /logo.bmp
+	bmp /logo.bmp
+	fb0.enable=1
+	gpio_set_value 1 1
+fi
+
+if [ -z $eth0.ethaddr ]; then
+	while [ -z $eth0.ethaddr ]; do
+		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
+	done
+	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
+	saveenv
+fi
diff --git a/arch/arm/boards/eukrea_cpuimx51/env/config b/arch/arm/boards/eukrea_cpuimx51/env/config
new file mode 100644
index 0000000..51fcdde
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/env/config
@@ -0,0 +1,58 @@
+#!/bin/sh
+
+# otg port mode : can be 'host' or 'device'
+otg_mode="device"
+# video mode : can be 'CMO-QVGA' or any modefb mode
+# ex : 640x480M-16 at 60 800x600M-24 at 60 1024x768M-16 at 60
+video="CMO-QVGA"
+
+machine=eukrea-cpuimx51
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=none
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'net' or 'nand'
+kernel_loc=nand
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=nand
+
+# rootfs
+rootfs_type=ubifs
+rootfsimage=$machine/rootfs.$rootfs_type
+
+# kernel
+kernelimage_type=uimage
+kernelimage=$machine/uImage-${machine}.bin
+kernelimage=uImage
+
+# barebox and it's env
+bareboximage=$machine/barebox-${machine}.bin
+bareboxenvimage=$machine/bareboxenv-${machine}.bin
+
+nfsroot="$eth0.serverip:/srv/nfs/$machine"
+
+autoboot_timeout=1
+
+if [ x$video = xCMO-QVGA ]; then
+        screen_type="tft"
+else
+        screen_type="dvi"
+fi
+
+bootargs="console=ttymxc0,115200 otg_mode=$otg_mode video=$video screen_type=$screen_type"
+
+nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)"
+rootfs_mtdblock_nand=3
+nand_device="mxc_nand"
+ubiroot="$machine-rootfs"
+device_type="nand"
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
new file mode 100644
index 0000000..0847bb1
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ * (c) 2011 Eukrea Electromatique, Eric B?nard <eric at eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <net.h>
+#include <init.h>
+#include <environment.h>
+#include <mach/imx-regs.h>
+#include <fec.h>
+#include <mach/gpio.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <nand.h>
+#include <spi/spi.h>
+#include <mfd/mc13892.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <mach/imx-nand.h>
+#include <mach/spi.h>
+#include <mach/generic.h>
+#include <mach/iomux-mx51.h>
+#include <mach/devices-imx51.h>
+
+static struct memory_platform_data ram_pdata = {
+	.name = "ram0",
+	.flags = DEVFS_RDWR,
+};
+
+static struct device_d sdram_dev = {
+	.id       = -1,
+	.name     = "mem",
+	.map_base = 0x90000000,
+	.size     = 256 * 1024 * 1024,
+	.platform_data = &ram_pdata,
+};
+
+static struct fec_platform_data fec_info = {
+	.xcv_type = MII100,
+};
+
+struct imx_nand_platform_data nand_info = {
+	.width		= 1,
+	.hw_ecc		= 1,
+	.flash_bbt	= 1,
+};
+
+static struct pad_desc eukrea_cpuimx51_pads[] = {
+	/* FEC */
+	MX51_PAD_DISP2_DAT1__FEC_RX_ER,
+	MX51_PAD_DISP2_DAT15__FEC_TDATA0,
+	MX51_PAD_DISP2_DAT6__FEC_TDATA1,
+	MX51_PAD_DISP2_DAT7__FEC_TDATA2,
+	MX51_PAD_DISP2_DAT8__FEC_TDATA3,
+	MX51_PAD_DISP2_DAT9__FEC_TX_EN,
+	MX51_PAD_DISP2_DAT10__FEC_COL,
+	MX51_PAD_DISP2_DAT11__FEC_RX_CLK,
+	MX51_PAD_DISP2_DAT12__FEC_RX_DV,
+	MX51_PAD_DISP2_DAT13__FEC_TX_CLK,
+	MX51_PAD_DI2_PIN4__FEC_CRS,
+	MX51_PAD_DI2_PIN2__FEC_MDC,
+	MX51_PAD_DI2_PIN3__FEC_MDIO,
+	MX51_PAD_DISP2_DAT14__FEC_RDATA0,
+	MX51_PAD_DI2_DISP_CLK__FEC_RDATA1,
+	MX51_PAD_DI_GP4__FEC_RDATA2,
+	MX51_PAD_DISP2_DAT0__FEC_RDATA3,
+	MX51_PAD_DI_GP3__FEC_TX_ER,
+	MX51_PAD_EIM_DTACK__GPIO2_31, /* LAN8700 reset pin */
+	/* NAND */
+	MX51_PAD_NANDF_D7__NANDF_D7,
+	MX51_PAD_NANDF_D6__NANDF_D6,
+	MX51_PAD_NANDF_D5__NANDF_D5,
+	MX51_PAD_NANDF_D4__NANDF_D4,
+	MX51_PAD_NANDF_D3__NANDF_D3,
+	MX51_PAD_NANDF_D2__NANDF_D2,
+	MX51_PAD_NANDF_D1__NANDF_D1,
+	MX51_PAD_NANDF_D0__NANDF_D0,
+	MX51_PAD_NANDF_RB0__NANDF_RB0,
+	MX51_PAD_NANDF_RB1__NANDF_RB1,
+	MX51_PAD_NANDF_CS0__NANDF_CS0,
+	MX51_PAD_NANDF_CS1__NANDF_CS1,
+	/* LCD BL */
+	MX51_PAD_DI1_D1_CS__GPIO3_4,
+};
+
+#define GPIO_LAN8700_RESET	(1 * 32 + 31)
+#define GPIO_LCD_BL		(2 * 32 + 4)
+
+#ifdef CONFIG_MMU
+static void eukrea_cpuimx51_mmu_init(void)
+{
+	mmu_init();
+
+	arm_create_section(0x90000000, 0x90000000, 256, PMD_SECT_DEF_CACHED);
+	arm_create_section(0xa0000000, 0x90000000, 256, PMD_SECT_DEF_UNCACHED);
+
+	setup_dma_coherent(0x10000000);
+
+#if TEXT_BASE & (0x100000 - 1)
+#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
+#else
+	arm_create_section(0x0,        TEXT_BASE,   1, PMD_SECT_DEF_UNCACHED);
+#endif
+
+	mmu_enable();
+}
+#else
+static void eukrea_cpuimx51_mmu_init(void)
+{
+}
+#endif
+
+static int eukrea_cpuimx51_devices_init(void)
+{
+	eukrea_cpuimx51_mmu_init();
+
+	register_device(&sdram_dev);
+	imx51_add_fec(&fec_info);
+#ifdef CONFIG_MCI_IMX_ESDHC
+	imx51_add_mmc0(NULL);
+#endif
+	imx51_add_nand(&nand_info);
+
+	devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
+	dev_add_bb_dev("self_raw", "self0");
+	devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
+	dev_add_bb_dev("env_raw", "env0");
+
+	gpio_direction_output(GPIO_LAN8700_RESET, 0);
+	gpio_set_value(GPIO_LAN8700_RESET, 1);
+	gpio_direction_output(GPIO_LCD_BL, 0);
+
+	armlinux_add_dram(&sdram_dev);
+	armlinux_set_bootparams((void *)0x90000100);
+	armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX51SD);
+
+	return 0;
+}
+
+device_initcall(eukrea_cpuimx51_devices_init);
+
+static int eukrea_cpuimx51_console_init(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, ARRAY_SIZE(eukrea_cpuimx51_pads));
+
+	writel(0, 0x73fa8228);
+	writel(0, 0x73fa822c);
+	writel(0, 0x73fa8230);
+	writel(0, 0x73fa8234);
+
+	imx51_add_uart0();
+	return 0;
+}
+
+console_initcall(eukrea_cpuimx51_console_init);
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox
new file mode 100644
index 0000000..0f35e17
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox
@@ -0,0 +1,4 @@
+/** @page eukrea_cpuimx51 Eukrea's CPUIMX51
+
+
+*/
diff --git a/arch/arm/boards/eukrea_cpuimx51/flash_header.c b/arch/arm/boards/eukrea_cpuimx51/flash_header.c
new file mode 100644
index 0000000..f953b09
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/flash_header.c
@@ -0,0 +1,84 @@
+#include <common.h>
+#include <mach/imx-flash-header.h>
+
+extern unsigned long _stext;
+
+void __naked __flash_header_start go(void)
+{
+	__asm__ __volatile__("b exception_vectors\n");
+}
+
+struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
+	{ .ptr_type = 4, .addr = 0x73fa88a0, .val = 0x00000200, },
+	{ .ptr_type = 4, .addr = 0x73fa850c, .val = 0x000020c5, },
+	{ .ptr_type = 4, .addr = 0x73fa8510, .val = 0x000020c5, },
+	{ .ptr_type = 4, .addr = 0x73fa883c, .val = 0x00000002, },
+	{ .ptr_type = 4, .addr = 0x73fa8848, .val = 0x00000002, },
+	{ .ptr_type = 4, .addr = 0x73fa84b8, .val = 0x000000e7, },
+	{ .ptr_type = 4, .addr = 0x73fa84bc, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa84c0, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa84c4, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa84c8, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa8820, .val = 0x00000000, },
+	{ .ptr_type = 4, .addr = 0x73fa84a4, .val = 0x00000003, },
+	{ .ptr_type = 4, .addr = 0x73fa84a8, .val = 0x00000003, },
+	{ .ptr_type = 4, .addr = 0x73fa84ac, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84b0, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84b4, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84cc, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84d0, .val = 0x000000e2, },
+	{ .ptr_type = 4, .addr = 0x73fa882c, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x73fa88a4, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x73fa88ac, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x73fa88b8, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x83fd9000, .val = 0x82a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9008, .val = 0x82a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9010, .val = 0x000ad0d0, },
+	{ .ptr_type = 4, .addr = 0x83fd9004, .val = 0x3f3584ab, },
+	{ .ptr_type = 4, .addr = 0x83fd900c, .val = 0x3f3584ab, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x04008008, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801a, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801b, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00448019, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x07328018, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x04008008, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008010, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008010, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x06328018, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x03808019, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00408019, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008000, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0400800c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801e, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801f, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801d, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0732801c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0400800c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008014, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008014, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0632801c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0380801d, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0040801d, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008004, },
+	{ .ptr_type = 4, .addr = 0x83fd9000, .val = 0xb2a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9008, .val = 0xb2a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9010, .val = 0x000ad6d0, },
+	{ .ptr_type = 4, .addr = 0x83fd9034, .val = 0x90000000, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00000000, },
+};
+
+#define APP_DEST	0x90000000
+
+struct imx_flash_header __flash_header_section flash_header = {
+	.app_code_jump_vector	= APP_DEST + 0x1000,
+	.app_code_barker	= APP_CODE_BARKER,
+	.app_code_csf		= 0,
+	.dcd_ptr_ptr		= APP_DEST + 0x400 + offsetof(struct imx_flash_header, dcd),
+	.super_root_key		= 0,
+	.dcd			= APP_DEST + 0x400 + offsetof(struct imx_flash_header, dcd_barker),
+	.app_dest		= APP_DEST,
+	.dcd_barker		= DCD_BARKER,
+	.dcd_block_len		= sizeof (dcd_entry),
+};
+
+unsigned long __image_len_section barebox_len = 0x40000;
diff --git a/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S b/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
new file mode 100644
index 0000000..793104c
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
@@ -0,0 +1,216 @@
+/*
+ * This code is based on the ecos babbage startup code
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <mach/imx-regs.h>
+#include <mach/clock-imx51.h>
+
+#define ROM_SI_REV_OFFSET                   0x48
+
+.macro setup_pll pll, freq
+	ldr r2, =\pll
+	ldr r1, =0x00001232
+	str r1, [r2, #MX51_PLL_DP_CTL] /* Set DPLL ON (set UPEN bit): BRMO=1 */
+	mov r1, #0x2
+	str r1, [r2, #MX51_PLL_DP_CONFIG] /* Enable auto-restart AREN bit */
+
+	str r3, [r2, #MX51_PLL_DP_OP]
+	str r3, [r2, #MX51_PLL_DP_HFS_OP]
+
+	str r4, [r2, #MX51_PLL_DP_MFD]
+	str r4, [r2, #MX51_PLL_DP_HFS_MFD]
+
+	str r5, [r2, #MX51_PLL_DP_MFN]
+	str r5, [r2, #MX51_PLL_DP_HFS_MFN]
+
+	ldr r1, =0x00001232
+	str r1, [r2, #MX51_PLL_DP_CTL]
+1:	ldr r1, [r2, #MX51_PLL_DP_CTL]
+	ands r1, r1, #0x1
+	beq 1b
+.endm
+
+#define writel(val, reg) \
+	ldr		r0,	=reg;	\
+	ldr		r1,	=val;	\
+	str		r1,   [r0];
+
+#define IMX51_TO_2
+
+.globl board_init_lowlevel
+board_init_lowlevel:
+	mov     r10, lr
+
+	/* explicitly disable L2 cache */
+	mrc 15, 0, r0, c1, c0, 1
+	bic r0, r0, #0x2
+	mcr 15, 0, r0, c1, c0, 1
+
+	/* reconfigure L2 cache aux control reg */
+	mov r0, #0xC0               /* tag RAM */
+	add r0, r0, #0x4    /* data RAM */
+	orr r0, r0, #(1 << 24)    /* disable write allocate delay */
+	orr r0, r0, #(1 << 23)    /* disable write allocate combine */
+	orr r0, r0, #(1 << 22)    /* disable write allocate */
+
+	ldr r1, =MX51_IROM_BASE_ADDR
+	ldr r3, [r1, #ROM_SI_REV_OFFSET]
+	cmp r3, #0x10
+	orrls r0, r0, #(1 << 25)    /* disable write combine for TO 2 and lower revs */
+
+	mcr 15, 1, r0, c9, c0, 2
+
+	ldr r0, =MX51_CCM_BASE_ADDR
+
+	/* Gate of clocks to the peripherals first */
+	ldr r1, =0x3FFFFFFF
+	str r1, [r0, #MX51_CCM_CCGR0]
+	ldr r1, =0x0
+	str r1, [r0, #MX51_CCM_CCGR1]
+	str r1, [r0, #MX51_CCM_CCGR2]
+	str r1, [r0, #MX51_CCM_CCGR3]
+
+	ldr r1, =0x00030000
+	str r1, [r0, #MX51_CCM_CCGR4]
+	ldr r1, =0x00FFF030
+	str r1, [r0, #MX51_CCM_CCGR5]
+	ldr r1, =0x00000300
+	str r1, [r0, #MX51_CCM_CCGR6]
+
+	/* Disable IPU and HSC dividers */
+	mov r1, #0x60000
+	str r1, [r0, #MX51_CCM_CCDR]
+
+#ifdef IMX51_TO_2
+	/* Make sure to switch the DDR away from PLL 1 */
+	ldr r1, =0x19239145
+	str r1, [r0, #MX51_CCM_CBCDR]
+	/* make sure divider effective */
+1:	ldr r1, [r0, #MX51_CCM_CDHIPR]
+	cmp r1, #0x0
+	bne 1b
+#endif
+
+	/* Switch ARM to step clock */
+	mov r1, #0x4
+	str r1, [r0, #MX51_CCM_CCSR]
+
+	mov r3, #MX51_PLL_DP_OP_800
+	mov r4, #MX51_PLL_DP_MFD_800
+	mov r5, #MX51_PLL_DP_MFN_800
+	setup_pll MX51_PLL1_BASE_ADDR
+
+	mov r3, #MX51_PLL_DP_OP_665
+	mov r4, #MX51_PLL_DP_MFD_665
+	mov r5, #MX51_PLL_DP_MFN_665
+	setup_pll MX51_PLL3_BASE_ADDR
+
+	/* Switch peripheral to PLL 3 */
+	ldr r1, =0x000010C0
+	str r1, [r0, #MX51_CCM_CBCMR]
+	ldr r1, =0x13239145
+	str r1, [r0, #MX51_CCM_CBCDR]
+
+	mov r3, #MX51_PLL_DP_OP_665
+	mov r4, #MX51_PLL_DP_MFD_665
+	mov r5, #MX51_PLL_DP_MFN_665
+	setup_pll MX51_PLL2_BASE_ADDR
+
+	/* Switch peripheral to PLL2 */
+	ldr r1, =0x19239145
+	str r1, [r0, #MX51_CCM_CBCDR]
+	ldr r1, =0x000020C0
+	str r1, [r0, #MX51_CCM_CBCMR]
+
+	mov r3, #MX51_PLL_DP_OP_216
+	mov r4, #MX51_PLL_DP_MFD_216
+	mov r5, #MX51_PLL_DP_MFN_216
+	setup_pll MX51_PLL3_BASE_ADDR
+
+	/* Set the platform clock dividers */
+	ldr r2, =MX51_ARM_BASE_ADDR
+	ldr r1, =0x00000124
+	str r1, [r2, #0x14]
+
+	/* Run TO 3.0 at Full speed, for other TO's wait till we increase VDDGP */
+	ldr r1, =MX51_IROM_BASE_ADDR
+	ldr r3, [r1, #ROM_SI_REV_OFFSET]
+	cmp r3, #0x10
+	movls r1, #0x1
+	movhi r1, #0
+	str r1, [r0, #MX51_CCM_CACRR]
+
+	/* Switch ARM back to PLL 1 */
+	mov r1, #0
+	str r1, [r0,  #MX51_CCM_CCSR]
+
+        /* setup the rest */
+        /* Use lp_apm (24MHz) source for perclk */
+#ifdef IMX51_TO_2
+        ldr r1, =0x000020C2
+        str r1, [r0, #MX51_CCM_CBCMR]
+        // ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz
+        ldr r1, =0x59239100
+        str r1, [r0, #MX51_CCM_CBCDR]
+#else
+        ldr r1, =0x0000E3C2
+        str r1, [r0, #MX51_CCM_CBCMR]
+        // emi=ahb, all perclk dividers are 1 since using 24MHz
+        // DDR divider=6 to have 665/6=110MHz
+        ldr r1, =0x013B9100
+        str r1, [r0, #MX51_CCM_CBCDR]
+#endif
+
+        /* Restore the default values in the Gate registers */
+        ldr r1, =0xFFFFFFFF
+        str r1, [r0, #MX51_CCM_CCGR0]
+        str r1, [r0, #MX51_CCM_CCGR1]
+        str r1, [r0, #MX51_CCM_CCGR2]
+        str r1, [r0, #MX51_CCM_CCGR3]
+        str r1, [r0, #MX51_CCM_CCGR4]
+        str r1, [r0, #MX51_CCM_CCGR5]
+        str r1, [r0, #MX51_CCM_CCGR6]
+
+        /* Use PLL 2 for UART's, get 66.5MHz from it */
+        ldr r1, =0xA5A2A020
+        str r1, [r0, #MX51_CCM_CSCMR1]
+        ldr r1, =0x00C30321
+        str r1, [r0, #MX51_CCM_CSCDR1]
+
+        /* make sure divider effective */
+    1:  ldr r1, [r0, #MX51_CCM_CDHIPR]
+        cmp r1, #0x0
+        bne 1b
+
+	mov r1, #0x0
+	str r1, [r0, #MX51_CCM_CCDR]
+
+	writel(0x1, 0x73fa8074)
+	ldr	r0, =0x73f88000
+	ldr	r1, [r0]
+	orr	r1, #0x40
+	str	r1, [r0]
+
+	ldr	r0, =0x73f88004
+	ldr	r1, [r0]
+	orr	r1, #0x40
+	str	r1, [r0]
+
+	mov	pc, r10
+
diff --git a/arch/arm/configs/eukrea_cpuimx51_defconfig b/arch/arm/configs/eukrea_cpuimx51_defconfig
new file mode 100644
index 0000000..0492691
--- /dev/null
+++ b/arch/arm/configs/eukrea_cpuimx51_defconfig
@@ -0,0 +1,279 @@
+#
+# Automatically generated make config: don't edit
+# Linux/arm 2011.02.0 Barebox Configuration
+# Fri Feb 25 15:21:05 2011
+#
+# CONFIG_BOARD_LINKER_SCRIPT is not set
+CONFIG_GENERIC_LINKER_SCRIPT=y
+CONFIG_ARM=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_EP93XX is not set
+CONFIG_ARCH_IMX=y
+# CONFIG_ARCH_MXS is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_S3C24xx is not set
+# CONFIG_ARCH_VERSATILE is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+
+#
+# processor features
+#
+# CONFIG_BOOT_ENDIANNESS_SWITCH is not set
+CONFIG_ARCH_TEXT_BASE=0x97f00000
+CONFIG_BOARDINFO="Eukrea CPUIMX51"
+CONFIG_ARCH_IMX_INTERNAL_BOOT=y
+CONFIG_ARCH_IMX_INTERNAL_BOOT_NAND=y
+# CONFIG_ARCH_IMX_INTERNAL_BOOT_NOR is not set
+# CONFIG_ARCH_IMX_INTERNAL_BOOT_ONENAND is not set
+
+#
+# Freescale i.MX System-on-Chip
+#
+# CONFIG_ARCH_IMX1 is not set
+# CONFIG_ARCH_IMX21 is not set
+# CONFIG_ARCH_IMX25 is not set
+# CONFIG_ARCH_IMX27 is not set
+# CONFIG_ARCH_IMX31 is not set
+# CONFIG_ARCH_IMX35 is not set
+CONFIG_ARCH_IMX51=y
+# CONFIG_MACH_FREESCALE_MX51_PDK is not set
+CONFIG_MACH_EUKREA_CPUIMX51SD=y
+
+#
+# Board specific settings       
+#
+
+#
+# i.MX specific settings        
+#
+CONFIG_AEABI=y
+
+#
+# Arm specific settings         
+#
+CONFIG_CMD_ARM_CPUINFO=y
+# CONFIG_CPU_V7_DCACHE_SKIP is not set
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
+CONFIG_GREGORIAN_CALENDER=y
+CONFIG_HAS_KALLSYMS=y
+CONFIG_HAS_MODULES=y
+CONFIG_CMD_MEMORY=y
+CONFIG_ENV_HANDLING=y
+CONFIG_GENERIC_GPIO=y
+
+#
+# General Settings              
+#
+CONFIG_LOCALVERSION_AUTO=y
+
+#
+# memory layout                 
+#
+CONFIG_HAVE_MMU=y
+# CONFIG_MMU is not set
+CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
+CONFIG_TEXT_BASE=0x97f00000
+CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
+CONFIG_MEMORY_LAYOUT_DEFAULT=y
+# CONFIG_MEMORY_LAYOUT_FIXED is not set
+CONFIG_STACK_SIZE=0x8000
+CONFIG_MALLOC_SIZE=0x2000000
+# CONFIG_BROKEN is not set
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_MACH_HAS_LOWLEVEL_INIT=y
+CONFIG_MACH_DO_LOWLEVEL_INIT=y
+CONFIG_PROMPT="barebox:"
+CONFIG_BAUDRATE=115200
+CONFIG_LONGHELP=y
+CONFIG_CBSIZE=1024
+CONFIG_MAXARGS=16
+CONFIG_SHELL_HUSH=y
+# CONFIG_SHELL_SIMPLE is not set
+CONFIG_GLOB=y
+CONFIG_PROMPT_HUSH_PS2="> "
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_HUSH_GETOPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+# CONFIG_MENU is not set
+# CONFIG_PASSWORD is not set
+CONFIG_DYNAMIC_CRC_TABLE=y
+CONFIG_ERRNO_MESSAGES=y
+CONFIG_TIMESTAMP=y
+CONFIG_CONSOLE_FULL=y
+CONFIG_CONSOLE_ACTIVATE_FIRST=y
+# CONFIG_OF_FLAT_TREE is not set
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/eukrea_cpuimx51/env"
+# CONFIG_POLLER is not set
+
+#
+# Debugging                     
+#
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_ENABLE_FLASH_NOISE is not set
+# CONFIG_ENABLE_PARTITION_NOISE is not set
+# CONFIG_ENABLE_DEVICE_NOISE is not set
+
+#
+# Commands                      
+#
+
+#
+# scripting                     
+#
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TRUE=y
+CONFIG_CMD_FALSE=y
+# CONFIG_CMD_LOGIN is not set
+# CONFIG_CMD_PASSWD is not set
+
+#
+# file commands                 
+#
+CONFIG_CMD_LS=y
+CONFIG_CMD_RM=y
+CONFIG_CMD_CAT=y
+CONFIG_CMD_MKDIR=y
+CONFIG_CMD_RMDIR=y
+CONFIG_CMD_CP=y
+CONFIG_CMD_PWD=y
+CONFIG_CMD_CD=y
+CONFIG_CMD_MOUNT=y
+CONFIG_CMD_UMOUNT=y
+
+#
+# console                       
+#
+CONFIG_CMD_CLEAR=y
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ECHO_E=y
+
+#
+# memory                        
+#
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_MTEST=y
+# CONFIG_CMD_MTEST_ALTERNATIVE is not set
+
+#
+# flash                         
+#
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_UBI=y
+
+#
+# booting                       
+#
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTM_ZLIB=y
+CONFIG_CMD_BOOTM_BZLIB=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTU=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_TEST=y
+CONFIG_CMD_VERSION=y
+CONFIG_CMD_HELP=y
+CONFIG_CMD_DEVINFO=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNLZO=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+# CONFIG_NET_NFS is not set
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+# CONFIG_NET_TFTP_PUSH is not set
+# CONFIG_NET_NETCONSOLE is not set
+# CONFIG_NET_RESOLV is not set
+
+#
+# Drivers                       
+#
+
+#
+# serial drivers                
+#
+# CONFIG_DRIVER_SERIAL_ARM_DCC is not set
+CONFIG_DRIVER_SERIAL_IMX=y
+# CONFIG_DRIVER_SERIAL_NS16550 is not set
+CONFIG_ARCH_HAS_FEC_IMX=y
+CONFIG_MIIDEV=y
+
+#
+# Network drivers               
+#
+# CONFIG_DRIVER_NET_SMC911X is not set
+# CONFIG_DRIVER_NET_SMC91111 is not set
+CONFIG_DRIVER_NET_FEC_IMX=y
+
+#
+# SPI drivers                   
+#
+# CONFIG_SPI is not set
+CONFIG_DRIVER_SPI_IMX_2_3=y
+# CONFIG_I2C is not set
+
+#
+# flash drivers                 
+#
+# CONFIG_DRIVER_CFI is not set
+CONFIG_MTD=y
+CONFIG_NAND=y
+CONFIG_NAND_IMX=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND_IDS=y
+CONFIG_UBI=y
+# CONFIG_ATA is not set
+# CONFIG_USB is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_VIDEO is not set
+# CONFIG_MCI is not set
+
+#
+# MFD
+#
+# CONFIG_LED is not set
+
+#
+# Filesystem support            
+#
+# CONFIG_FS_CRAMFS is not set
+CONFIG_FS_RAMFS=y
+CONFIG_FS_DEVFS=y
+CONFIG_PARTITION_NEED_MTD=y
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_CRC32=y
+# CONFIG_DIGEST is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_PROCESS_ESCAPE_SEQUENCE=y
+CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b8ac89..4e678b3 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -5,6 +5,7 @@ config ARCH_TEXT_BASE
 	default 0x83f00000 if MACH_EUKREA_CPUIMX25
 	default 0xa0000000 if MACH_EUKREA_CPUIMX27
 	default 0x87f00000 if MACH_EUKREA_CPUIMX35
+	default 0x97f00000 if MACH_EUKREA_CPUIMX51SD
 	default 0x08f00000 if MACH_MX1ADS
 	default 0xc0000000 if MACH_IMX21ADS
 	default 0xa0000000 if MACH_IMX27ADS
@@ -24,6 +25,7 @@ config BOARDINFO
 	default "Eukrea CPUIMX25" if MACH_EUKREA_CPUIMX25
 	default "Eukrea CPUIMX27" if MACH_EUKREA_CPUIMX27
 	default "Eukrea CPUIMX35" if MACH_EUKREA_CPUIMX35
+	default "Eukrea CPUIMX51" if MACH_EUKREA_CPUIMX51SD
 	default "Freescale i.MX21 ADS" if MACH_IMX21ADS
 	default "Freescale i.MX27 ADS" if MACH_IMX27ADS
 	default "Freescale MX35 3Stack" if MACH_FREESCALE_MX35_3STACK
@@ -323,6 +325,14 @@ config MACH_FREESCALE_MX51_PDK
 	select HAVE_MMU
 	select MACH_HAS_LOWLEVEL_INIT
 
+config MACH_EUKREA_CPUIMX51SD
+	bool "EUKREA CPUIMX51"
+	select HAVE_MMU
+	select MACH_HAS_LOWLEVEL_INIT
+	help
+	  Say Y here if you are using Eukrea's CPUIMX51 equipped
+	  with a Freescale i.MX51 Processor
+
 endchoice
 
 endif
-- 
1.7.4



From eric at eukrea.com  Fri Feb 25 09:39:25 2011
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Fri, 25 Feb 2011 15:39:25 +0100
Subject: [PATCH 3/3] eukrea_cpuimx35: update defconfig
In-Reply-To: <1298644765-31654-1-git-send-email-eric@eukrea.com>
References: <1298644765-31654-1-git-send-email-eric@eukrea.com>
Message-ID: <1298644765-31654-3-git-send-email-eric@eukrea.com>

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 arch/arm/configs/eukrea_cpuimx35_defconfig |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/configs/eukrea_cpuimx35_defconfig b/arch/arm/configs/eukrea_cpuimx35_defconfig
index af82827..6964332 100644
--- a/arch/arm/configs/eukrea_cpuimx35_defconfig
+++ b/arch/arm/configs/eukrea_cpuimx35_defconfig
@@ -2,17 +2,19 @@ CONFIG_ARCH_IMX=y
 CONFIG_CACHE_L2X0=y
 CONFIG_ARCH_IMX_INTERNAL_BOOT=y
 CONFIG_ARCH_IMX35=y
+CONFIG_IMX_IIM=y
+CONFIG_IMX_IIM_FUSE_BLOW=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_MMU=y
 CONFIG_MALLOC_SIZE=0x800000
 CONFIG_LONGHELP=y
 CONFIG_GLOB=y
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_HUSH_GETOPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 # CONFIG_CONSOLE_ACTIVATE_FIRST is not set
 CONFIG_CONSOLE_ACTIVATE_ALL=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
 CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/eukrea_cpuimx35/env"
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
@@ -24,8 +26,6 @@ CONFIG_CMD_READLINE=y
 CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
 CONFIG_CMD_MTEST=y
 CONFIG_CMD_FLASH=y
 CONFIG_CMD_RESET=y
@@ -40,6 +40,7 @@ CONFIG_NET=y
 CONFIG_NET_DHCP=y
 CONFIG_NET_PING=y
 CONFIG_NET_TFTP=y
+CONFIG_NET_TFTP_PUSH=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 # CONFIG_SPI is not set
 CONFIG_I2C=y
@@ -49,7 +50,6 @@ CONFIG_NAND=y
 CONFIG_NAND_IMX=y
 CONFIG_USB=y
 CONFIG_USB_EHCI=y
-CONFIG_USB_GADGET=y
 CONFIG_VIDEO=y
 CONFIG_DRIVER_VIDEO_IMX_IPU=y
 CONFIG_MCI=y
-- 
1.7.4



From eric at eukrea.com  Fri Feb 25 09:39:47 2011
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Fri, 25 Feb 2011 15:39:47 +0100
Subject: [PATCH 1/2] iomux-mx51: add more pins definitions
Message-ID: <1298644788-31735-1-git-send-email-eric@eukrea.com>

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
 arch/arm/mach-imx/include/mach/iomux-mx51.h |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h
index 2901ee6..38d7f55 100644
--- a/arch/arm/mach-imx/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h
@@ -103,6 +103,7 @@
 #define MX51_PAD_EIM_CS5__FEC_CRS			IOMUX_PAD(0x52C, 0xF4, 3, 0x950, 0, MX51_FEC_PAD_CTRL)
 
 #define MX51_PAD_EIM_DTACK__EIM_DTACK			IOMUX_PAD(0x48C, 0xF8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DTACK__GPIO2_31			IOMUX_PAD(0x48c, 0xf8, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_LBA__EIM_LBA			IOMUX_PAD(0x494, 0xFC, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_EIM_CRE__EIM_CRE			IOMUX_PAD(0x4A0, 0x100, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DRAM_CS1__DRAM_CS1			IOMUX_PAD(0x4D0, 0x104, 0, 0x0, 0, NO_PAD_CTRL)
@@ -249,6 +250,7 @@
 #define MX51_PAD_DI1_PIN13__DI1_PIN13			IOMUX_PAD(0x6B0, 0x2B0, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DI1_D0_CS__DI1_D0_CS			IOMUX_PAD(0x6B4, 0x2B4, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DI1_D1_CS__DI1_D1_CS			IOMUX_PAD(0x6B8, 0x2B8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI1_D1_CS__GPIO3_4			IOMUX_PAD(0x6B8, 0x2B8, 4, 0x0984, 1, NO_PAD_CTRL)
 #define MX51_PAD_DISPB2_SER_DIN__DISPB2_SER_DIN		IOMUX_PAD(0x6BC, 0x2BC, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DISPB2_SER_DIO__DISPB2_SER_DIO		IOMUX_PAD(0x6C0, 0x2C0, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DISPB2_SER_CLK__DISPB2_SER_CLK		IOMUX_PAD(0x6C4, 0x2C4, 0, 0x0, 0, NO_PAD_CTRL)
@@ -283,26 +285,44 @@
 #define MX51_PAD_DI_GP2__DI_GP2				IOMUX_PAD(0x740, 0x338, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DI_GP3__DI_GP3				IOMUX_PAD(0x744, 0x33C, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DI2_PIN4__DI2_PIN4			IOMUX_PAD(0x748, 0x340, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP3__FEC_TX_ER			IOMUX_PAD(0x744, 0x33c, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DI2_PIN2__DI2_PIN2			IOMUX_PAD(0x74C, 0x344, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN2__FEC_MDC			IOMUX_PAD(0x74c, 0x344, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DI2_PIN3__DI2_PIN3			IOMUX_PAD(0x750, 0x348, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN3__FEC_MDIO			IOMUX_PAD(0x750, 0x348, 2, 0x0954, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK		IOMUX_PAD(0x754, 0x34C, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DI_GP4__DI_GP4				IOMUX_PAD(0x758, 0x350, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP4__FEC_RDATA2			IOMUX_PAD(0x758, 0x350, 2, 0x0960, 1, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_DI2_PIN4__FEC_CRS			IOMUX_PAD(0x748, 0x340, 2, 0x0950, 1, MX51_FEC_PAD_CTRL)
+#define MX51_PAD_DI2_DISP_CLK__FEC_RDATA1		IOMUX_PAD(0x754, 0x34c, 2, 0x095c, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT0__DISP2_DAT0			IOMUX_PAD(0x75C, 0x354, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT0__FEC_RDATA3			IOMUX_PAD(0x75c, 0x354, 2, 0x0964, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT1__DISP2_DAT1			IOMUX_PAD(0x760, 0x358, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT1__FEC_RX_ER			IOMUX_PAD(0x760, 0x358, 2, 0x0970, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT2__DISP2_DAT2			IOMUX_PAD(0x764, 0x35C, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT3__DISP2_DAT3			IOMUX_PAD(0x768, 0x360, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT4__DISP2_DAT4			IOMUX_PAD(0x76C, 0x364, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT5__DISP2_DAT5			IOMUX_PAD(0x770, 0x368, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT6__DISP2_DAT6			IOMUX_PAD(0x774, 0x36C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT6__FEC_TDATA1			IOMUX_PAD(0x774, 0x36c, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT7__DISP2_DAT7			IOMUX_PAD(0x778, 0x370, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT7__FEC_TDATA2			IOMUX_PAD(0x778, 0x370, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT8__DISP2_DAT8			IOMUX_PAD(0x77C, 0x374, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT8__FEC_TDATA3			IOMUX_PAD(0x77c, 0x374, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT9__DISP2_DAT9			IOMUX_PAD(0x780, 0x378, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT9__FEC_TX_EN			IOMUX_PAD(0x780, 0x378, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT10__DISP2_DAT10		IOMUX_PAD(0x784, 0x37C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT10__FEC_COL			IOMUX_PAD(0x784, 0x37c, 2, 0x094c, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT11__DISP2_DAT11		IOMUX_PAD(0x788, 0x380, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT11__FEC_RX_CLK		IOMUX_PAD(0x788, 0x380, 2, 0x0968, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT12__DISP2_DAT12		IOMUX_PAD(0x78C, 0x384, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT12__FEC_RX_DV			IOMUX_PAD(0x78c, 0x384, 2, 0x096c, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT13__DISP2_DAT13		IOMUX_PAD(0x790, 0x388, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT13__FEC_TX_CLK		IOMUX_PAD(0x790, 0x388, 2, 0x0974, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT14__DISP2_DAT14		IOMUX_PAD(0x794, 0x38C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT14__FEC_RDATA0		IOMUX_PAD(0x794, 0x38c, 2, 0x0958, 1, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_DISP2_DAT15__DISP2_DAT15		IOMUX_PAD(0x798, 0x390, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT15__FEC_TDATA0		IOMUX_PAD(0x798, 0x390, 2, 0x0, 0, MX51_FEC_PAD_CTRL)
 #define MX51_PAD_SD1_CMD__SD1_CMD			IOMUX_PAD(0x79C, 0x394, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_SD1_CLK__SD1_CLK			IOMUX_PAD(0x7A0, 0x398, 0, 0x0, 0, NO_PAD_CTRL)
 #define MX51_PAD_SD1_DATA0__SD1_DATA0			IOMUX_PAD(0x7A4, 0x39C, 0, 0x0, 0, NO_PAD_CTRL)
-- 
1.7.4



From s.hauer at pengutronix.de  Fri Feb 25 09:55:32 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 25 Feb 2011 15:55:32 +0100
Subject: [PATCH 2/2] add eukrea_cpuimx51 board
In-Reply-To: <1298644788-31735-2-git-send-email-eric@eukrea.com>
References: <1298644788-31735-1-git-send-email-eric@eukrea.com>
	<1298644788-31735-2-git-send-email-eric@eukrea.com>
Message-ID: <20110225145532.GB29521@pengutronix.de>

Hi Eric,

I applied all patches except this one. Can you regenerate the defconfig
with make savedefconfig please?

Thanks
 Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From eric at eukrea.com  Fri Feb 25 09:57:10 2011
From: eric at eukrea.com (=?UTF-8?q?Eric=20B=C3=A9nard?=)
Date: Fri, 25 Feb 2011 15:57:10 +0100
Subject: [PATCH v2] add eukrea_cpuimx51 board
In-Reply-To: <20110225145532.GB29521@pengutronix.de>
References: <20110225145532.GB29521@pengutronix.de>
Message-ID: <1298645830-32213-1-git-send-email-eric@eukrea.com>

Signed-off-by: Eric B?nard <eric at eukrea.com>
---
v2 : use savedefconfig

 arch/arm/Makefile                                  |    1 +
 arch/arm/boards/eukrea_cpuimx51/Makefile           |    3 +
 arch/arm/boards/eukrea_cpuimx51/config.h           |   24 +++
 arch/arm/boards/eukrea_cpuimx51/env/bin/init_board |   20 ++
 arch/arm/boards/eukrea_cpuimx51/env/config         |   58 ++++++
 arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c  |  175 ++++++++++++++++
 .../arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox |    4 +
 arch/arm/boards/eukrea_cpuimx51/flash_header.c     |   84 ++++++++
 arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S    |  216 ++++++++++++++++++++
 arch/arm/configs/eukrea_cpuimx51_defconfig         |   45 ++++
 arch/arm/mach-imx/Kconfig                          |   10 +
 11 files changed, 640 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/Makefile
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/config.h
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/env/bin/init_board
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/env/config
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/flash_header.c
 create mode 100644 arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
 create mode 100644 arch/arm/configs/eukrea_cpuimx51_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 57a045f..091fa22 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -70,6 +70,7 @@ board-$(CONFIG_MACH_EDB9315A)			:= edb93xx
 board-$(CONFIG_MACH_EUKREA_CPUIMX25)		:= eukrea_cpuimx25
 board-$(CONFIG_MACH_EUKREA_CPUIMX27)		:= eukrea_cpuimx27
 board-$(CONFIG_MACH_EUKREA_CPUIMX35)		:= eukrea_cpuimx35
+board-$(CONFIG_MACH_EUKREA_CPUIMX51SD)		:= eukrea_cpuimx51
 board-$(CONFIG_MACH_FREESCALE_MX25_3STACK)	:= freescale-mx25-3-stack
 board-$(CONFIG_MACH_FREESCALE_MX35_3STACK)	:= freescale-mx35-3-stack
 board-$(CONFIG_MACH_IMX21ADS)			:= imx21ads
diff --git a/arch/arm/boards/eukrea_cpuimx51/Makefile b/arch/arm/boards/eukrea_cpuimx51/Makefile
new file mode 100644
index 0000000..0f506a3
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/Makefile
@@ -0,0 +1,3 @@
+obj-y += lowlevel_init.o
+obj-y += eukrea_cpuimx51.o
+obj-y += flash_header.o
diff --git a/arch/arm/boards/eukrea_cpuimx51/config.h b/arch/arm/boards/eukrea_cpuimx51/config.h
new file mode 100644
index 0000000..d62e146
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/config.h
@@ -0,0 +1,24 @@
+/**
+ * @file
+ * @brief Global defintions for the ARM i.MX51 based cpuimx51 board
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif	/* __CONFIG_H */
diff --git a/arch/arm/boards/eukrea_cpuimx51/env/bin/init_board b/arch/arm/boards/eukrea_cpuimx51/env/bin/init_board
new file mode 100644
index 0000000..173ecf9
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/env/bin/init_board
@@ -0,0 +1,20 @@
+#!/bin/sh
+
+if [ -f /env/logo.bmp ]; then
+	bmp /env/logo.bmp
+	fb0.enable=1
+	gpio_set_value 1 1
+elif [ -f /env/logo.bmp.lzo ]; then
+	unlzo /env/logo.bmp.lzo /logo.bmp
+	bmp /logo.bmp
+	fb0.enable=1
+	gpio_set_value 1 1
+fi
+
+if [ -z $eth0.ethaddr ]; then
+	while [ -z $eth0.ethaddr ]; do
+		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
+	done
+	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
+	saveenv
+fi
diff --git a/arch/arm/boards/eukrea_cpuimx51/env/config b/arch/arm/boards/eukrea_cpuimx51/env/config
new file mode 100644
index 0000000..51fcdde
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/env/config
@@ -0,0 +1,58 @@
+#!/bin/sh
+
+# otg port mode : can be 'host' or 'device'
+otg_mode="device"
+# video mode : can be 'CMO-QVGA' or any modefb mode
+# ex : 640x480M-16 at 60 800x600M-24 at 60 1024x768M-16 at 60
+video="CMO-QVGA"
+
+machine=eukrea-cpuimx51
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=none
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'net' or 'nand'
+kernel_loc=nand
+# can be either 'net', 'nand' or 'initrd'
+rootfs_loc=nand
+
+# rootfs
+rootfs_type=ubifs
+rootfsimage=$machine/rootfs.$rootfs_type
+
+# kernel
+kernelimage_type=uimage
+kernelimage=$machine/uImage-${machine}.bin
+kernelimage=uImage
+
+# barebox and it's env
+bareboximage=$machine/barebox-${machine}.bin
+bareboxenvimage=$machine/bareboxenv-${machine}.bin
+
+nfsroot="$eth0.serverip:/srv/nfs/$machine"
+
+autoboot_timeout=1
+
+if [ x$video = xCMO-QVGA ]; then
+        screen_type="tft"
+else
+        screen_type="dvi"
+fi
+
+bootargs="console=ttymxc0,115200 otg_mode=$otg_mode video=$video screen_type=$screen_type"
+
+nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)"
+rootfs_mtdblock_nand=3
+nand_device="mxc_nand"
+ubiroot="$machine-rootfs"
+device_type="nand"
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
new file mode 100644
index 0000000..0847bb1
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ * (c) 2011 Eukrea Electromatique, Eric B?nard <eric at eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <net.h>
+#include <init.h>
+#include <environment.h>
+#include <mach/imx-regs.h>
+#include <fec.h>
+#include <mach/gpio.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <nand.h>
+#include <spi/spi.h>
+#include <mfd/mc13892.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <mach/imx-nand.h>
+#include <mach/spi.h>
+#include <mach/generic.h>
+#include <mach/iomux-mx51.h>
+#include <mach/devices-imx51.h>
+
+static struct memory_platform_data ram_pdata = {
+	.name = "ram0",
+	.flags = DEVFS_RDWR,
+};
+
+static struct device_d sdram_dev = {
+	.id       = -1,
+	.name     = "mem",
+	.map_base = 0x90000000,
+	.size     = 256 * 1024 * 1024,
+	.platform_data = &ram_pdata,
+};
+
+static struct fec_platform_data fec_info = {
+	.xcv_type = MII100,
+};
+
+struct imx_nand_platform_data nand_info = {
+	.width		= 1,
+	.hw_ecc		= 1,
+	.flash_bbt	= 1,
+};
+
+static struct pad_desc eukrea_cpuimx51_pads[] = {
+	/* FEC */
+	MX51_PAD_DISP2_DAT1__FEC_RX_ER,
+	MX51_PAD_DISP2_DAT15__FEC_TDATA0,
+	MX51_PAD_DISP2_DAT6__FEC_TDATA1,
+	MX51_PAD_DISP2_DAT7__FEC_TDATA2,
+	MX51_PAD_DISP2_DAT8__FEC_TDATA3,
+	MX51_PAD_DISP2_DAT9__FEC_TX_EN,
+	MX51_PAD_DISP2_DAT10__FEC_COL,
+	MX51_PAD_DISP2_DAT11__FEC_RX_CLK,
+	MX51_PAD_DISP2_DAT12__FEC_RX_DV,
+	MX51_PAD_DISP2_DAT13__FEC_TX_CLK,
+	MX51_PAD_DI2_PIN4__FEC_CRS,
+	MX51_PAD_DI2_PIN2__FEC_MDC,
+	MX51_PAD_DI2_PIN3__FEC_MDIO,
+	MX51_PAD_DISP2_DAT14__FEC_RDATA0,
+	MX51_PAD_DI2_DISP_CLK__FEC_RDATA1,
+	MX51_PAD_DI_GP4__FEC_RDATA2,
+	MX51_PAD_DISP2_DAT0__FEC_RDATA3,
+	MX51_PAD_DI_GP3__FEC_TX_ER,
+	MX51_PAD_EIM_DTACK__GPIO2_31, /* LAN8700 reset pin */
+	/* NAND */
+	MX51_PAD_NANDF_D7__NANDF_D7,
+	MX51_PAD_NANDF_D6__NANDF_D6,
+	MX51_PAD_NANDF_D5__NANDF_D5,
+	MX51_PAD_NANDF_D4__NANDF_D4,
+	MX51_PAD_NANDF_D3__NANDF_D3,
+	MX51_PAD_NANDF_D2__NANDF_D2,
+	MX51_PAD_NANDF_D1__NANDF_D1,
+	MX51_PAD_NANDF_D0__NANDF_D0,
+	MX51_PAD_NANDF_RB0__NANDF_RB0,
+	MX51_PAD_NANDF_RB1__NANDF_RB1,
+	MX51_PAD_NANDF_CS0__NANDF_CS0,
+	MX51_PAD_NANDF_CS1__NANDF_CS1,
+	/* LCD BL */
+	MX51_PAD_DI1_D1_CS__GPIO3_4,
+};
+
+#define GPIO_LAN8700_RESET	(1 * 32 + 31)
+#define GPIO_LCD_BL		(2 * 32 + 4)
+
+#ifdef CONFIG_MMU
+static void eukrea_cpuimx51_mmu_init(void)
+{
+	mmu_init();
+
+	arm_create_section(0x90000000, 0x90000000, 256, PMD_SECT_DEF_CACHED);
+	arm_create_section(0xa0000000, 0x90000000, 256, PMD_SECT_DEF_UNCACHED);
+
+	setup_dma_coherent(0x10000000);
+
+#if TEXT_BASE & (0x100000 - 1)
+#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
+#else
+	arm_create_section(0x0,        TEXT_BASE,   1, PMD_SECT_DEF_UNCACHED);
+#endif
+
+	mmu_enable();
+}
+#else
+static void eukrea_cpuimx51_mmu_init(void)
+{
+}
+#endif
+
+static int eukrea_cpuimx51_devices_init(void)
+{
+	eukrea_cpuimx51_mmu_init();
+
+	register_device(&sdram_dev);
+	imx51_add_fec(&fec_info);
+#ifdef CONFIG_MCI_IMX_ESDHC
+	imx51_add_mmc0(NULL);
+#endif
+	imx51_add_nand(&nand_info);
+
+	devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
+	dev_add_bb_dev("self_raw", "self0");
+	devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
+	dev_add_bb_dev("env_raw", "env0");
+
+	gpio_direction_output(GPIO_LAN8700_RESET, 0);
+	gpio_set_value(GPIO_LAN8700_RESET, 1);
+	gpio_direction_output(GPIO_LCD_BL, 0);
+
+	armlinux_add_dram(&sdram_dev);
+	armlinux_set_bootparams((void *)0x90000100);
+	armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX51SD);
+
+	return 0;
+}
+
+device_initcall(eukrea_cpuimx51_devices_init);
+
+static int eukrea_cpuimx51_console_init(void)
+{
+	mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, ARRAY_SIZE(eukrea_cpuimx51_pads));
+
+	writel(0, 0x73fa8228);
+	writel(0, 0x73fa822c);
+	writel(0, 0x73fa8230);
+	writel(0, 0x73fa8234);
+
+	imx51_add_uart0();
+	return 0;
+}
+
+console_initcall(eukrea_cpuimx51_console_init);
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox
new file mode 100644
index 0000000..0f35e17
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.dox
@@ -0,0 +1,4 @@
+/** @page eukrea_cpuimx51 Eukrea's CPUIMX51
+
+
+*/
diff --git a/arch/arm/boards/eukrea_cpuimx51/flash_header.c b/arch/arm/boards/eukrea_cpuimx51/flash_header.c
new file mode 100644
index 0000000..f953b09
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/flash_header.c
@@ -0,0 +1,84 @@
+#include <common.h>
+#include <mach/imx-flash-header.h>
+
+extern unsigned long _stext;
+
+void __naked __flash_header_start go(void)
+{
+	__asm__ __volatile__("b exception_vectors\n");
+}
+
+struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
+	{ .ptr_type = 4, .addr = 0x73fa88a0, .val = 0x00000200, },
+	{ .ptr_type = 4, .addr = 0x73fa850c, .val = 0x000020c5, },
+	{ .ptr_type = 4, .addr = 0x73fa8510, .val = 0x000020c5, },
+	{ .ptr_type = 4, .addr = 0x73fa883c, .val = 0x00000002, },
+	{ .ptr_type = 4, .addr = 0x73fa8848, .val = 0x00000002, },
+	{ .ptr_type = 4, .addr = 0x73fa84b8, .val = 0x000000e7, },
+	{ .ptr_type = 4, .addr = 0x73fa84bc, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa84c0, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa84c4, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa84c8, .val = 0x00000045, },
+	{ .ptr_type = 4, .addr = 0x73fa8820, .val = 0x00000000, },
+	{ .ptr_type = 4, .addr = 0x73fa84a4, .val = 0x00000003, },
+	{ .ptr_type = 4, .addr = 0x73fa84a8, .val = 0x00000003, },
+	{ .ptr_type = 4, .addr = 0x73fa84ac, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84b0, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84b4, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84cc, .val = 0x000000e3, },
+	{ .ptr_type = 4, .addr = 0x73fa84d0, .val = 0x000000e2, },
+	{ .ptr_type = 4, .addr = 0x73fa882c, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x73fa88a4, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x73fa88ac, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x73fa88b8, .val = 0x00000004, },
+	{ .ptr_type = 4, .addr = 0x83fd9000, .val = 0x82a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9008, .val = 0x82a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9010, .val = 0x000ad0d0, },
+	{ .ptr_type = 4, .addr = 0x83fd9004, .val = 0x3f3584ab, },
+	{ .ptr_type = 4, .addr = 0x83fd900c, .val = 0x3f3584ab, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x04008008, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801a, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801b, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00448019, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x07328018, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x04008008, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008010, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008010, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x06328018, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x03808019, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00408019, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008000, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0400800c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801e, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801f, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0000801d, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0732801c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0400800c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008014, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008014, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0632801c, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0380801d, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x0040801d, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008004, },
+	{ .ptr_type = 4, .addr = 0x83fd9000, .val = 0xb2a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9008, .val = 0xb2a20000, },
+	{ .ptr_type = 4, .addr = 0x83fd9010, .val = 0x000ad6d0, },
+	{ .ptr_type = 4, .addr = 0x83fd9034, .val = 0x90000000, },
+	{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00000000, },
+};
+
+#define APP_DEST	0x90000000
+
+struct imx_flash_header __flash_header_section flash_header = {
+	.app_code_jump_vector	= APP_DEST + 0x1000,
+	.app_code_barker	= APP_CODE_BARKER,
+	.app_code_csf		= 0,
+	.dcd_ptr_ptr		= APP_DEST + 0x400 + offsetof(struct imx_flash_header, dcd),
+	.super_root_key		= 0,
+	.dcd			= APP_DEST + 0x400 + offsetof(struct imx_flash_header, dcd_barker),
+	.app_dest		= APP_DEST,
+	.dcd_barker		= DCD_BARKER,
+	.dcd_block_len		= sizeof (dcd_entry),
+};
+
+unsigned long __image_len_section barebox_len = 0x40000;
diff --git a/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S b/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
new file mode 100644
index 0000000..793104c
--- /dev/null
+++ b/arch/arm/boards/eukrea_cpuimx51/lowlevel_init.S
@@ -0,0 +1,216 @@
+/*
+ * This code is based on the ecos babbage startup code
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <mach/imx-regs.h>
+#include <mach/clock-imx51.h>
+
+#define ROM_SI_REV_OFFSET                   0x48
+
+.macro setup_pll pll, freq
+	ldr r2, =\pll
+	ldr r1, =0x00001232
+	str r1, [r2, #MX51_PLL_DP_CTL] /* Set DPLL ON (set UPEN bit): BRMO=1 */
+	mov r1, #0x2
+	str r1, [r2, #MX51_PLL_DP_CONFIG] /* Enable auto-restart AREN bit */
+
+	str r3, [r2, #MX51_PLL_DP_OP]
+	str r3, [r2, #MX51_PLL_DP_HFS_OP]
+
+	str r4, [r2, #MX51_PLL_DP_MFD]
+	str r4, [r2, #MX51_PLL_DP_HFS_MFD]
+
+	str r5, [r2, #MX51_PLL_DP_MFN]
+	str r5, [r2, #MX51_PLL_DP_HFS_MFN]
+
+	ldr r1, =0x00001232
+	str r1, [r2, #MX51_PLL_DP_CTL]
+1:	ldr r1, [r2, #MX51_PLL_DP_CTL]
+	ands r1, r1, #0x1
+	beq 1b
+.endm
+
+#define writel(val, reg) \
+	ldr		r0,	=reg;	\
+	ldr		r1,	=val;	\
+	str		r1,   [r0];
+
+#define IMX51_TO_2
+
+.globl board_init_lowlevel
+board_init_lowlevel:
+	mov     r10, lr
+
+	/* explicitly disable L2 cache */
+	mrc 15, 0, r0, c1, c0, 1
+	bic r0, r0, #0x2
+	mcr 15, 0, r0, c1, c0, 1
+
+	/* reconfigure L2 cache aux control reg */
+	mov r0, #0xC0               /* tag RAM */
+	add r0, r0, #0x4    /* data RAM */
+	orr r0, r0, #(1 << 24)    /* disable write allocate delay */
+	orr r0, r0, #(1 << 23)    /* disable write allocate combine */
+	orr r0, r0, #(1 << 22)    /* disable write allocate */
+
+	ldr r1, =MX51_IROM_BASE_ADDR
+	ldr r3, [r1, #ROM_SI_REV_OFFSET]
+	cmp r3, #0x10
+	orrls r0, r0, #(1 << 25)    /* disable write combine for TO 2 and lower revs */
+
+	mcr 15, 1, r0, c9, c0, 2
+
+	ldr r0, =MX51_CCM_BASE_ADDR
+
+	/* Gate of clocks to the peripherals first */
+	ldr r1, =0x3FFFFFFF
+	str r1, [r0, #MX51_CCM_CCGR0]
+	ldr r1, =0x0
+	str r1, [r0, #MX51_CCM_CCGR1]
+	str r1, [r0, #MX51_CCM_CCGR2]
+	str r1, [r0, #MX51_CCM_CCGR3]
+
+	ldr r1, =0x00030000
+	str r1, [r0, #MX51_CCM_CCGR4]
+	ldr r1, =0x00FFF030
+	str r1, [r0, #MX51_CCM_CCGR5]
+	ldr r1, =0x00000300
+	str r1, [r0, #MX51_CCM_CCGR6]
+
+	/* Disable IPU and HSC dividers */
+	mov r1, #0x60000
+	str r1, [r0, #MX51_CCM_CCDR]
+
+#ifdef IMX51_TO_2
+	/* Make sure to switch the DDR away from PLL 1 */
+	ldr r1, =0x19239145
+	str r1, [r0, #MX51_CCM_CBCDR]
+	/* make sure divider effective */
+1:	ldr r1, [r0, #MX51_CCM_CDHIPR]
+	cmp r1, #0x0
+	bne 1b
+#endif
+
+	/* Switch ARM to step clock */
+	mov r1, #0x4
+	str r1, [r0, #MX51_CCM_CCSR]
+
+	mov r3, #MX51_PLL_DP_OP_800
+	mov r4, #MX51_PLL_DP_MFD_800
+	mov r5, #MX51_PLL_DP_MFN_800
+	setup_pll MX51_PLL1_BASE_ADDR
+
+	mov r3, #MX51_PLL_DP_OP_665
+	mov r4, #MX51_PLL_DP_MFD_665
+	mov r5, #MX51_PLL_DP_MFN_665
+	setup_pll MX51_PLL3_BASE_ADDR
+
+	/* Switch peripheral to PLL 3 */
+	ldr r1, =0x000010C0
+	str r1, [r0, #MX51_CCM_CBCMR]
+	ldr r1, =0x13239145
+	str r1, [r0, #MX51_CCM_CBCDR]
+
+	mov r3, #MX51_PLL_DP_OP_665
+	mov r4, #MX51_PLL_DP_MFD_665
+	mov r5, #MX51_PLL_DP_MFN_665
+	setup_pll MX51_PLL2_BASE_ADDR
+
+	/* Switch peripheral to PLL2 */
+	ldr r1, =0x19239145
+	str r1, [r0, #MX51_CCM_CBCDR]
+	ldr r1, =0x000020C0
+	str r1, [r0, #MX51_CCM_CBCMR]
+
+	mov r3, #MX51_PLL_DP_OP_216
+	mov r4, #MX51_PLL_DP_MFD_216
+	mov r5, #MX51_PLL_DP_MFN_216
+	setup_pll MX51_PLL3_BASE_ADDR
+
+	/* Set the platform clock dividers */
+	ldr r2, =MX51_ARM_BASE_ADDR
+	ldr r1, =0x00000124
+	str r1, [r2, #0x14]
+
+	/* Run TO 3.0 at Full speed, for other TO's wait till we increase VDDGP */
+	ldr r1, =MX51_IROM_BASE_ADDR
+	ldr r3, [r1, #ROM_SI_REV_OFFSET]
+	cmp r3, #0x10
+	movls r1, #0x1
+	movhi r1, #0
+	str r1, [r0, #MX51_CCM_CACRR]
+
+	/* Switch ARM back to PLL 1 */
+	mov r1, #0
+	str r1, [r0,  #MX51_CCM_CCSR]
+
+        /* setup the rest */
+        /* Use lp_apm (24MHz) source for perclk */
+#ifdef IMX51_TO_2
+        ldr r1, =0x000020C2
+        str r1, [r0, #MX51_CCM_CBCMR]
+        // ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz
+        ldr r1, =0x59239100
+        str r1, [r0, #MX51_CCM_CBCDR]
+#else
+        ldr r1, =0x0000E3C2
+        str r1, [r0, #MX51_CCM_CBCMR]
+        // emi=ahb, all perclk dividers are 1 since using 24MHz
+        // DDR divider=6 to have 665/6=110MHz
+        ldr r1, =0x013B9100
+        str r1, [r0, #MX51_CCM_CBCDR]
+#endif
+
+        /* Restore the default values in the Gate registers */
+        ldr r1, =0xFFFFFFFF
+        str r1, [r0, #MX51_CCM_CCGR0]
+        str r1, [r0, #MX51_CCM_CCGR1]
+        str r1, [r0, #MX51_CCM_CCGR2]
+        str r1, [r0, #MX51_CCM_CCGR3]
+        str r1, [r0, #MX51_CCM_CCGR4]
+        str r1, [r0, #MX51_CCM_CCGR5]
+        str r1, [r0, #MX51_CCM_CCGR6]
+
+        /* Use PLL 2 for UART's, get 66.5MHz from it */
+        ldr r1, =0xA5A2A020
+        str r1, [r0, #MX51_CCM_CSCMR1]
+        ldr r1, =0x00C30321
+        str r1, [r0, #MX51_CCM_CSCDR1]
+
+        /* make sure divider effective */
+    1:  ldr r1, [r0, #MX51_CCM_CDHIPR]
+        cmp r1, #0x0
+        bne 1b
+
+	mov r1, #0x0
+	str r1, [r0, #MX51_CCM_CCDR]
+
+	writel(0x1, 0x73fa8074)
+	ldr	r0, =0x73f88000
+	ldr	r1, [r0]
+	orr	r1, #0x40
+	str	r1, [r0]
+
+	ldr	r0, =0x73f88004
+	ldr	r1, [r0]
+	orr	r1, #0x40
+	str	r1, [r0]
+
+	mov	pc, r10
+
diff --git a/arch/arm/configs/eukrea_cpuimx51_defconfig b/arch/arm/configs/eukrea_cpuimx51_defconfig
new file mode 100644
index 0000000..a9fca84
--- /dev/null
+++ b/arch/arm/configs/eukrea_cpuimx51_defconfig
@@ -0,0 +1,45 @@
+CONFIG_ARCH_IMX=y
+CONFIG_ARCH_IMX_INTERNAL_BOOT=y
+CONFIG_ARCH_IMX51=y
+CONFIG_MACH_EUKREA_CPUIMX51SD=y
+CONFIG_AEABI=y
+CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_MALLOC_SIZE=0x2000000
+CONFIG_LONGHELP=y
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_PARTITION=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
+CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/eukrea_cpuimx51/env"
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MTEST=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_BOOTM_ZLIB=y
+CONFIG_CMD_BOOTM_BZLIB=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_PARTITION=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_UNLZO=y
+CONFIG_NET=y
+CONFIG_NET_DHCP=y
+CONFIG_NET_PING=y
+CONFIG_NET_TFTP=y
+CONFIG_DRIVER_NET_FEC_IMX=y
+# CONFIG_SPI is not set
+CONFIG_MTD=y
+CONFIG_NAND=y
+CONFIG_NAND_IMX=y
+CONFIG_UBI=y
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b8ac89..4e678b3 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -5,6 +5,7 @@ config ARCH_TEXT_BASE
 	default 0x83f00000 if MACH_EUKREA_CPUIMX25
 	default 0xa0000000 if MACH_EUKREA_CPUIMX27
 	default 0x87f00000 if MACH_EUKREA_CPUIMX35
+	default 0x97f00000 if MACH_EUKREA_CPUIMX51SD
 	default 0x08f00000 if MACH_MX1ADS
 	default 0xc0000000 if MACH_IMX21ADS
 	default 0xa0000000 if MACH_IMX27ADS
@@ -24,6 +25,7 @@ config BOARDINFO
 	default "Eukrea CPUIMX25" if MACH_EUKREA_CPUIMX25
 	default "Eukrea CPUIMX27" if MACH_EUKREA_CPUIMX27
 	default "Eukrea CPUIMX35" if MACH_EUKREA_CPUIMX35
+	default "Eukrea CPUIMX51" if MACH_EUKREA_CPUIMX51SD
 	default "Freescale i.MX21 ADS" if MACH_IMX21ADS
 	default "Freescale i.MX27 ADS" if MACH_IMX27ADS
 	default "Freescale MX35 3Stack" if MACH_FREESCALE_MX35_3STACK
@@ -323,6 +325,14 @@ config MACH_FREESCALE_MX51_PDK
 	select HAVE_MMU
 	select MACH_HAS_LOWLEVEL_INIT
 
+config MACH_EUKREA_CPUIMX51SD
+	bool "EUKREA CPUIMX51"
+	select HAVE_MMU
+	select MACH_HAS_LOWLEVEL_INIT
+	help
+	  Say Y here if you are using Eukrea's CPUIMX51 equipped
+	  with a Freescale i.MX51 Processor
+
 endchoice
 
 endif
-- 
1.7.4



From eric at eukrea.com  Fri Feb 25 09:57:49 2011
From: eric at eukrea.com (Eric Benard)
Date: Fri, 25 Feb 2011 15:57:49 +0100
Subject: [PATCH 2/2] add eukrea_cpuimx51 board
In-Reply-To: <20110225145532.GB29521@pengutronix.de>
References: <1298644788-31735-1-git-send-email-eric@eukrea.com>
	<1298644788-31735-2-git-send-email-eric@eukrea.com>
	<20110225145532.GB29521@pengutronix.de>
Message-ID: <4D67C36D.6020500@eukrea.com>

Hi Sascha,

On 25/02/2011 15:55, Sascha Hauer wrote:
> I applied all patches except this one. Can you regenerate the defconfig
> with make savedefconfig please?
>
my mistake, updated patch follows.

Eric


From s.hauer at pengutronix.de  Fri Feb 25 10:06:57 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Fri, 25 Feb 2011 16:06:57 +0100
Subject: Install barebox on target
In-Reply-To: <4D677315.5090600@telemotive.de>
References: <4D665867.4010404@telemotive.de>
	<20110224160440.GQ7381@pengutronix.de>
	<4D677315.5090600@telemotive.de>
Message-ID: <20110225150657.GC29521@pengutronix.de>

On Fri, Feb 25, 2011 at 10:15:01AM +0100, Thomas Mayer wrote:
> Hi Sascha,
> 
> That's not quite correct. When you use the debug + personality board you
> can boot directly from a mmc-card which contains bootloader, kernel and
> rootfs without modifications. Only if you use the single personality
> board, you have to modify die board a little bit.

Ah, ok. I didn't know that.

> Thanks for your short introduction. I tried to run the barebox image
> with u-boot and it seems to work. But after I get the following output
> barebox stops and do nothing.

That's a bug in the support for multiple network devices. Please pull
the -next branch again, then it should work.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From F.Vanalme at TELEVIC.com  Fri Feb 25 10:25:42 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Fri, 25 Feb 2011 16:25:42 +0100
Subject: writing environment in NAND flash
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD5@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD1@SRV-VS06.TELEVIC.COM>
	<6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CD5@SRV-VS06.TELEVIC.COM>
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00CF8@SRV-VS06.TELEVIC.COM>

> -----Original Message-----
> From: Vanalme Filip
> Sent: vrijdag 25 februari 2011 15:14
> To: Vanalme Filip; barebox at lists.infradead.org
> Subject: RE: writing environment in NAND flash
> 
> > -----Original Message-----
> > From: barebox-bounces at lists.infradead.org [mailto:barebox-
> > bounces at lists.infradead.org] On Behalf Of Vanalme Filip
> > Sent: vrijdag 25 februari 2011 14:50
> > To: barebox at lists.infradead.org
> > Subject: writing environment in NAND flash
> >
> > I have problems to save my environment settings. Although I set e.g. the MAC
> > address and some other values and do the saveenv command, after reset, all
> > settings have disappeared.
> > In the logging on the console port, I detected this :
> > "wrong crc on env
> > no valid environment found on /dev/env0. Using default environment"
> >
> > That will be, of course, the cause why the settings disappear.
> > Further investigation with debugging enabled in nand_imx.c showed that
> Barebox
> > reads 4 pages when starting up (0x80..0x83). That looks OK, because the
> > environment's size is 6156 bytes. So, indeen 4 pages needed. However, when
> > saving the environment, I only see appear one page write, i.e. on page 0x80. Of
> > course, when reading back the four pages, the 2nd, 3rd and 4th page have all
> FF
> > because they have never been written (causing a wrong CRC). Any idea why I
> > only see 1 page write when saving the environment although the size is 6156
> > bytes ? Any hints where to look in the sources ?
> >
> > Thanks in advance !
> >
> >
> >
> > Filip
> >
> [Filip]  Sorry for sending this message twice to the mailing list....
> 
> I have found the cause of this problem.
> I have CONFIG_MTD_NAND_VERIFY_WRITE=y.
> So, after a write, the code performs a read to verify the written data. For i.MX27, this
> mean that the function imx_nand_very_buf() is called. Well, that function looks
> like this :
> 
> static int
> imx_nand_verify_buf (struct mtd_info *mtd, const u_char * buf, int len) {
>   return -EFAULT;
> }
> 
> Yep...verification always fails... !
> Must be a function that still is under development, no ? (although I would have
> expected a "TODO" somewhere in that function....).
> 
> Two things I can do : set the configuration flag to n or add code to this function to
> really verify the written data.

[Filip] 
I changed the code in nand_imx.c like this :

* This function is used by the upper layer to verify the data in NAND Flash
 * with the data in the \b buf.
 *
 * @param       mtd     MTD structure for the NAND Flash
 * @param       buf     data to be verified
 * @param       len     length of the data to be verified
 *
 * @return      -EFAULT if error else 0
 *
 */
static int
imx_nand_verify_buf(struct mtd_info *mtd, const u_char * buf, int len) {
  int i;
  struct nand_chip *chip = mtd->priv;
  struct imx_nand_host *host = chip->priv;

  for (i = 0; i < len; i++)
  {
    if (buf[i] != host->data_buf[i])
    {
      MTD_DEBUG(MTD_DEBUG_LEVEL0, "Verify failed on byte %d : 0x%0x <-> 0x%0x\n", i, buf[i], host->data_buf[i]);
      return -EFAULT;
    }
  }

  return 0;
}

It looks OK now. I can now save the environment.

Maybe someone can verify if this is correct. And maybe adjust the Barebox mainline sources like that ?

> 
> > _______________________________________________
> > barebox mailing list
> > barebox at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/barebox


From thomas.mayer at telemotive.de  Fri Feb 25 11:08:10 2011
From: thomas.mayer at telemotive.de (Thomas Mayer)
Date: Fri, 25 Feb 2011 17:08:10 +0100
Subject: Install barebox on target
In-Reply-To: <20110225150657.GC29521@pengutronix.de>
References: <4D665867.4010404@telemotive.de>
	<20110224160440.GQ7381@pengutronix.de>
	<4D677315.5090600@telemotive.de>
	<20110225150657.GC29521@pengutronix.de>
Message-ID: <4D67D3EA.9000106@telemotive.de>

Hi Sasha,

thanks, I will try that.
Today I got our real hardware. It consists of the freescale cpu board, a
custom baseboard with a different display.
With that I was able to start barebox completely. Network works fine,
but I can't access the nand memory, because barebox doesn't find it at
startup. I added all possible nand drivers to barebox, but it still
doesn't work.

Any idea?

--------------------------------------- u-boot output
-----------------------------------------
U-Boot 2009.08 (Jan 13 2010 -
06:24:35)                                                                                                

                                                                                                                                       

CPU:   Freescale i.MX35 at 532
MHz                                                                                                     

Board: MX35 3STACK 2.0
[RST]                                                                                                           

I2C:  
ready                                                                                                                           

DRAM:  128
MB                                                                                                                          

Flash: 64
MB                                                                                                                           

NAND:  Manufacturer      : Samsung
(0xec)                                                                                              

Device Code       :
0xd7                                                                                                               

Cell Technology   :
MLC                                                                                                                

Chip Size         : 4
GiB                                                                                                              

Pages per Block   :
128                                                                                                                

Page Geometry     :
4096+218                                                                                                           

ECC Strength      : 8
bits                                                                                                             

ECC Size          : 512
B                                                                                                              

Data Setup Time   : 20
ns                                                                                                              

Data Hold Time    : 10
ns                                                                                                              

Address Setup Time: 25
ns                                                                                                              

GPMI Sample Delay : 6
ns                                                                                                               

tREA              :
Unknown                                                                                                            

tRLOH             :
Unknown                                                                                                            

tRHOH             :
Unknown                                                                                                            

Description       :
K9LBG08U0D                                                                                                         

Bad block table found at page 524160, version
0x01                                                                                     

Bad block table found at page 524032, version
0x01                                                                                     

2048
MiB                                                                                                                               

In:   
serial                                                                                                                          

Out:  
serial                                                                                                                          

Err:  
serial                                                                                                                          

PMIC at 0x08:0x7 is
45d0                                                                                                                  

i.MX35 CPU board version
2.0                                                                                                           

Net:   FEC0
Hit any key to stop autoboot:  0



--------------------------------------- barebox output
------------------------------------------
barebox 2011.02.0 (Feb 25 2011 - 16:35:47)

Board: Freescale MX35 3Stack
No NAND device found!!!
cfi_probe: cfi_flash base: 0xa0000000 size: 0x04000000
mc13892-i2c at mc13892-i2c0: PMIC ID: 0x000045d0 [Rev: 2.0a]
smc911x: no smc911x found on 0xb6000000 (byte_test=0x00f000f0)
imx-ipu-fb at imx-ipu-fb0: i.MX Framebuffer driver
mc13892-i2c at mc13892-i2c0: revision: 0x45d0
i.MX35 PDK CPU board version 1.
Malloc space: 0x86f00000 -> 0x87f00000 (size 16 MB)
Stack space : 0x86ef8000 -> 0x86f00000 (size 32 kB)
Open /dev/env0 No such file or directory
no valid environment found on /dev/env0. Using default environment
running /env/bin/init...



regards
Thomas



Am 25.02.2011 16:06, schrieb Sascha Hauer:
> On Fri, Feb 25, 2011 at 10:15:01AM +0100, Thomas Mayer wrote:
>   
>> Hi Sascha,
>>
>> That's not quite correct. When you use the debug + personality board you
>> can boot directly from a mmc-card which contains bootloader, kernel and
>> rootfs without modifications. Only if you use the single personality
>> board, you have to modify die board a little bit.
>>     
> Ah, ok. I didn't know that.
>
>   
>> Thanks for your short introduction. I tried to run the barebox image
>> with u-boot and it seems to work. But after I get the following output
>> barebox stops and do nothing.
>>     
> That's a bug in the support for multiple network devices. Please pull
> the -next branch again, then it should work.
>
> Sascha
>
>
>   



From boaz.bd at wellsense-tech.com  Sun Feb 27 01:19:06 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Sun, 27 Feb 2011 08:19:06 +0200
Subject: Fallback environment in barebox
Message-ID: <39A4B204C321D34DA3490E3B119D5A6C68C006F893@SBS2008.wellsense.local>

Hi,

We want to implement a mechanism in barebox to use two environment
partitions.
i.e. when barebox boots it will go to the first by default and try to
use it. If for some reason it fails
it will boot with the second one.

What is the best way to implement this in barebox and did anyone do it
already?

Thanks,

Boaz.

From jbe at pengutronix.de  Sun Feb 27 04:50:48 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Sun, 27 Feb 2011 10:50:48 +0100
Subject: Fallback environment in barebox
In-Reply-To: <39A4B204C321D34DA3490E3B119D5A6C68C006F893@SBS2008.wellsense.local>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F893@SBS2008.wellsense.local>
Message-ID: <201102271050.48537.jbe@pengutronix.de>

Boaz Ben-David wrote:
> We want to implement a mechanism in barebox to use two environment
> partitions.
> i.e. when barebox boots it will go to the first by default and try to
> use it. If for some reason it fails
> it will boot with the second one.
>
> What is the best way to implement this in barebox and did anyone do it
> already?

AFAIR a mechanism like this is already present in barebox. It tries the first 
environment, checks its CRC and if it fails it tries the next, if one exists.
Just register env0, env1, .....

Regards,
Juergen

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From boaz.bd at wellsense-tech.com  Sun Feb 27 05:09:59 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Sun, 27 Feb 2011 12:09:59 +0200
Subject: Fallback environment in barebox
In-Reply-To: <201102271050.48537.jbe@pengutronix.de>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F893@SBS2008.wellsense.local>
	<201102271050.48537.jbe@pengutronix.de>
Message-ID: <39A4B204C321D34DA3490E3B119D5A6C68C006F894@SBS2008.wellsense.local>

Sounds great.

Is there any documentation on how to "register" environments?

Thanks,

Boaz.

On Sun, 2011-02-27 at 10:50 +0100, Juergen Beisert wrote:
> Boaz Ben-David wrote:
> > We want to implement a mechanism in barebox to use two environment
> > partitions.
> > i.e. when barebox boots it will go to the first by default and try to
> > use it. If for some reason it fails
> > it will boot with the second one.
> >
> > What is the best way to implement this in barebox and did anyone do it
> > already?
> 
> AFAIR a mechanism like this is already present in barebox. It tries the first 
> environment, checks its CRC and if it fails it tries the next, if one exists.
> Just register env0, env1, .....
> 
> Regards,
> Juergen
> 
> -- 
> Pengutronix e.K.                              | Juergen Beisert             |
> Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
> Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
> Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From baruch at tkos.co.il  Mon Feb 28 00:50:40 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Mon, 28 Feb 2011 07:50:40 +0200
Subject: Fallback environment in barebox
In-Reply-To: <39A4B204C321D34DA3490E3B119D5A6C68C006F894@SBS2008.wellsense.local>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F893@SBS2008.wellsense.local>
	<201102271050.48537.jbe@pengutronix.de>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F894@SBS2008.wellsense.local>
Message-ID: <20110228055040.GC2667@jasper.tkos.co.il>

Hi Boaz,

On Sun, Feb 27, 2011 at 12:09:59PM +0200, Boaz Ben-David wrote:
> Sounds great.
> 
> Is there any documentation on how to "register" environments?

What Juergen meant to say is "register partitions named env0, env1, ...". The 
barebox startup code then automatically picks the first valid environment 
partition.

To register partitions (with bad blocks awareness) use devfs_add_partition() 
and then dev_add_bb_dev(). grep for "env0" under arch/ for many examples.

baruch

> On Sun, 2011-02-27 at 10:50 +0100, Juergen Beisert wrote:
> > Boaz Ben-David wrote:
> > > We want to implement a mechanism in barebox to use two environment
> > > partitions.
> > > i.e. when barebox boots it will go to the first by default and try to
> > > use it. If for some reason it fails
> > > it will boot with the second one.
> > >
> > > What is the best way to implement this in barebox and did anyone do it
> > > already?
> > 
> > AFAIR a mechanism like this is already present in barebox. It tries the first 
> > environment, checks its CRC and if it fails it tries the next, if one exists.
> > Just register env0, env1, .....

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From s.hauer at pengutronix.de  Mon Feb 28 02:40:53 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 08:40:53 +0100
Subject: Install barebox on target
In-Reply-To: <4D67D3EA.9000106@telemotive.de>
References: <4D665867.4010404@telemotive.de>
	<20110224160440.GQ7381@pengutronix.de>
	<4D677315.5090600@telemotive.de>
	<20110225150657.GC29521@pengutronix.de>
	<4D67D3EA.9000106@telemotive.de>
Message-ID: <20110228074053.GF29521@pengutronix.de>

On Fri, Feb 25, 2011 at 05:08:10PM +0100, Thomas Mayer wrote:
> Hi Sasha,
> 
> thanks, I will try that.
> Today I got our real hardware. It consists of the freescale cpu board, a
> custom baseboard with a different display.
> With that I was able to start barebox completely. Network works fine,
> but I can't access the nand memory, because barebox doesn't find it at
> startup. I added all possible nand drivers to barebox, but it still
> doesn't work.
> 
> Any idea?
> 
> --------------------------------------- u-boot output
> -----------------------------------------
> U-Boot 2009.08 (Jan 13 2010 -
> 
> Page Geometry     :
> 4096+218

This will cause problems. I never had a nand with 4k block size and I
doubt it will work out of the box. I don't know if that's the reason
barebox does not find no nand device at all though.

Sasha

> 
> --------------------------------------- barebox output
> ------------------------------------------
> barebox 2011.02.0 (Feb 25 2011 - 16:35:47)
> 
> Board: Freescale MX35 3Stack
> No NAND device found!!!
> cfi_probe: cfi_flash base: 0xa0000000 size: 0x04000000
> mc13892-i2c at mc13892-i2c0: PMIC ID: 0x000045d0 [Rev: 2.0a]
> smc911x: no smc911x found on 0xb6000000 (byte_test=0x00f000f0)
> imx-ipu-fb at imx-ipu-fb0: i.MX Framebuffer driver
> mc13892-i2c at mc13892-i2c0: revision: 0x45d0
> i.MX35 PDK CPU board version 1.
> Malloc space: 0x86f00000 -> 0x87f00000 (size 16 MB)
> Stack space : 0x86ef8000 -> 0x86f00000 (size 32 kB)
> Open /dev/env0 No such file or directory
> no valid environment found on /dev/env0. Using default environment
> running /env/bin/init...
> 
> 
> 
> regards
> Thomas
> 
> 
> 
> Am 25.02.2011 16:06, schrieb Sascha Hauer:
> > On Fri, Feb 25, 2011 at 10:15:01AM +0100, Thomas Mayer wrote:
> >   
> >> Hi Sascha,
> >>
> >> That's not quite correct. When you use the debug + personality board you
> >> can boot directly from a mmc-card which contains bootloader, kernel and
> >> rootfs without modifications. Only if you use the single personality
> >> board, you have to modify die board a little bit.
> >>     
> > Ah, ok. I didn't know that.
> >
> >   
> >> Thanks for your short introduction. I tried to run the barebox image
> >> with u-boot and it seems to work. But after I get the following output
> >> barebox stops and do nothing.
> >>     
> > That's a bug in the support for multiple network devices. Please pull
> > the -next branch again, then it should work.
> >
> > Sascha
> >
> >
> >   
> 
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


From boaz.bd at wellsense-tech.com  Mon Feb 28 03:08:00 2011
From: boaz.bd at wellsense-tech.com (Boaz Ben-David)
Date: Mon, 28 Feb 2011 10:08:00 +0200
Subject: Fallback environment in barebox
In-Reply-To: <20110228055040.GC2667@jasper.tkos.co.il>
References: <39A4B204C321D34DA3490E3B119D5A6C68C006F893@SBS2008.wellsense.local>
	<201102271050.48537.jbe@pengutronix.de>
	<39A4B204C321D34DA3490E3B119D5A6C68C006F894@SBS2008.wellsense.local>
	<20110228055040.GC2667@jasper.tkos.co.il>
Message-ID: <39A4B204C321D34DA3490E3B119D5A6C68C006F898@SBS2008.wellsense.local>

Great, thanks!

Boaz.

On Mon, 2011-02-28 at 07:50 +0200, Baruch Siach wrote:
> Hi Boaz,
> 
> On Sun, Feb 27, 2011 at 12:09:59PM +0200, Boaz Ben-David wrote:
> > Sounds great.
> > 
> > Is there any documentation on how to "register" environments?
> 
> What Juergen meant to say is "register partitions named env0, env1, ...". The 
> barebox startup code then automatically picks the first valid environment 
> partition.
> 
> To register partitions (with bad blocks awareness) use devfs_add_partition() 
> and then dev_add_bb_dev(). grep for "env0" under arch/ for many examples.
> 
> baruch
> 
> > On Sun, 2011-02-27 at 10:50 +0100, Juergen Beisert wrote:
> > > Boaz Ben-David wrote:
> > > > We want to implement a mechanism in barebox to use two environment
> > > > partitions.
> > > > i.e. when barebox boots it will go to the first by default and try to
> > > > use it. If for some reason it fails
> > > > it will boot with the second one.
> > > >
> > > > What is the best way to implement this in barebox and did anyone do it
> > > > already?
> > > 
> > > AFAIR a mechanism like this is already present in barebox. It tries the first 
> > > environment, checks its CRC and if it fails it tries the next, if one exists.
> > > Just register env0, env1, .....
> 
> -- 
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From baruch at tkos.co.il  Mon Feb 28 03:09:23 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Mon, 28 Feb 2011 10:09:23 +0200
Subject: Install barebox on target
In-Reply-To: <20110228074053.GF29521@pengutronix.de>
References: <4D665867.4010404@telemotive.de>
	<20110224160440.GQ7381@pengutronix.de>
	<4D677315.5090600@telemotive.de>
	<20110225150657.GC29521@pengutronix.de>
	<4D67D3EA.9000106@telemotive.de>
	<20110228074053.GF29521@pengutronix.de>
Message-ID: <20110228080923.GF2667@jasper.tkos.co.il>

Hi Sascha, Thomas,

On Mon, Feb 28, 2011 at 08:40:53AM +0100, Sascha Hauer wrote:
> On Fri, Feb 25, 2011 at 05:08:10PM +0100, Thomas Mayer wrote:
> > thanks, I will try that.
> > Today I got our real hardware. It consists of the freescale cpu board, a
> > custom baseboard with a different display.
> > With that I was able to start barebox completely. Network works fine,
> > but I can't access the nand memory, because barebox doesn't find it at
> > startup. I added all possible nand drivers to barebox, but it still
> > doesn't work.
> > 
> > Any idea?
> > 
> > --------------------------------------- u-boot output
> > -----------------------------------------
> > U-Boot 2009.08 (Jan 13 2010 -
> > 
> > Page Geometry     :
> > 4096+218
> 
> This will cause problems. I never had a nand with 4k block size and I
> doubt it will work out of the box. I don't know if that's the reason
> barebox does not find no nand device at all though.

I'm also seeing problems with a 4k page size (+218 OOB) SLC NAND flash of 
Micron on i.MX25. Barebox does identify the flash chip, but can't read it 
correctly.  I'm investigating the issue. So far I've found that the OOB area 
is read as 0x00s instead of 0xffs, even for good blocks. This makes Barebox to 
mark the whole flash as bad blocks.

The Linux kernel, however, seems to work correctly with this flash when 
applying a small fix to use the correct(?) nand_ecclayout.

baruch

> > --------------------------------------- barebox output
> > ------------------------------------------
> > barebox 2011.02.0 (Feb 25 2011 - 16:35:47)
> > 
> > Board: Freescale MX35 3Stack
> > No NAND device found!!!
> > cfi_probe: cfi_flash base: 0xa0000000 size: 0x04000000
> > mc13892-i2c at mc13892-i2c0: PMIC ID: 0x000045d0 [Rev: 2.0a]
> > smc911x: no smc911x found on 0xb6000000 (byte_test=0x00f000f0)
> > imx-ipu-fb at imx-ipu-fb0: i.MX Framebuffer driver
> > mc13892-i2c at mc13892-i2c0: revision: 0x45d0
> > i.MX35 PDK CPU board version 1.
> > Malloc space: 0x86f00000 -> 0x87f00000 (size 16 MB)
> > Stack space : 0x86ef8000 -> 0x86f00000 (size 32 kB)
> > Open /dev/env0 No such file or directory
> > no valid environment found on /dev/env0. Using default environment
> > running /env/bin/init...
> > 
> > 
> > 
> > regards
> > Thomas
> > 
> > 
> > 
> > Am 25.02.2011 16:06, schrieb Sascha Hauer:
> > > On Fri, Feb 25, 2011 at 10:15:01AM +0100, Thomas Mayer wrote:
> > >   
> > >> Hi Sascha,
> > >>
> > >> That's not quite correct. When you use the debug + personality board you
> > >> can boot directly from a mmc-card which contains bootloader, kernel and
> > >> rootfs without modifications. Only if you use the single personality
> > >> board, you have to modify die board a little bit.
> > >>     
> > > Ah, ok. I didn't know that.
> > >
> > >   
> > >> Thanks for your short introduction. I tried to run the barebox image
> > >> with u-boot and it seems to work. But after I get the following output
> > >> barebox stops and do nothing.
> > >>     
> > > That's a bug in the support for multiple network devices. Please pull
> > > the -next branch again, then it should work.
> > >
> > > Sascha

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From baruch at tkos.co.il  Mon Feb 28 03:19:25 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Mon, 28 Feb 2011 10:19:25 +0200
Subject: Install barebox on target
In-Reply-To: <20110228080923.GF2667@jasper.tkos.co.il>
References: <4D665867.4010404@telemotive.de>
	<20110224160440.GQ7381@pengutronix.de>
	<4D677315.5090600@telemotive.de>
	<20110225150657.GC29521@pengutronix.de>
	<4D67D3EA.9000106@telemotive.de>
	<20110228074053.GF29521@pengutronix.de>
	<20110228080923.GF2667@jasper.tkos.co.il>
Message-ID: <20110228081925.GG2667@jasper.tkos.co.il>

Hi Sascha, Thomas,

On Mon, Feb 28, 2011 at 10:09:23AM +0200, Baruch Siach wrote:
> On Mon, Feb 28, 2011 at 08:40:53AM +0100, Sascha Hauer wrote:
> > On Fri, Feb 25, 2011 at 05:08:10PM +0100, Thomas Mayer wrote:
> > > thanks, I will try that.
> > > Today I got our real hardware. It consists of the freescale cpu board, a
> > > custom baseboard with a different display.
> > > With that I was able to start barebox completely. Network works fine,
> > > but I can't access the nand memory, because barebox doesn't find it at
> > > startup. I added all possible nand drivers to barebox, but it still
> > > doesn't work.
> > > 
> > > Any idea?
> > > 
> > > --------------------------------------- u-boot output
> > > -----------------------------------------
> > > U-Boot 2009.08 (Jan 13 2010 -
> > > 
> > > Page Geometry     :
> > > 4096+218
> > 
> > This will cause problems. I never had a nand with 4k block size and I
> > doubt it will work out of the box. I don't know if that's the reason
> > barebox does not find no nand device at all though.
> 
> I'm also seeing problems with a 4k page size (+218 OOB) SLC NAND flash of 
> Micron on i.MX25. Barebox does identify the flash chip, but can't read it 
> correctly.  I'm investigating the issue. So far I've found that the OOB area 
> is read as 0x00s instead of 0xffs, even for good blocks. This makes Barebox to 
> mark the whole flash as bad blocks.
> 
> The Linux kernel, however, seems to work correctly with this flash when 
> applying a small fix to use the correct(?) nand_ecclayout.

I should also add the booting from this NAND with Barebox works perfectly. I 
used the kernel to program Barebox into the flash.

baruch

> > > --------------------------------------- barebox output
> > > ------------------------------------------
> > > barebox 2011.02.0 (Feb 25 2011 - 16:35:47)
> > > 
> > > Board: Freescale MX35 3Stack
> > > No NAND device found!!!
> > > cfi_probe: cfi_flash base: 0xa0000000 size: 0x04000000
> > > mc13892-i2c at mc13892-i2c0: PMIC ID: 0x000045d0 [Rev: 2.0a]
> > > smc911x: no smc911x found on 0xb6000000 (byte_test=0x00f000f0)
> > > imx-ipu-fb at imx-ipu-fb0: i.MX Framebuffer driver
> > > mc13892-i2c at mc13892-i2c0: revision: 0x45d0
> > > i.MX35 PDK CPU board version 1.
> > > Malloc space: 0x86f00000 -> 0x87f00000 (size 16 MB)
> > > Stack space : 0x86ef8000 -> 0x86f00000 (size 32 kB)
> > > Open /dev/env0 No such file or directory
> > > no valid environment found on /dev/env0. Using default environment
> > > running /env/bin/init...
> > > 
> > > 
> > > 
> > > regards
> > > Thomas
> > > 
> > > 
> > > 
> > > Am 25.02.2011 16:06, schrieb Sascha Hauer:
> > > > On Fri, Feb 25, 2011 at 10:15:01AM +0100, Thomas Mayer wrote:
> > > >   
> > > >> Hi Sascha,
> > > >>
> > > >> That's not quite correct. When you use the debug + personality board you
> > > >> can boot directly from a mmc-card which contains bootloader, kernel and
> > > >> rootfs without modifications. Only if you use the single personality
> > > >> board, you have to modify die board a little bit.
> > > >>     
> > > > Ah, ok. I didn't know that.
> > > >
> > > >   
> > > >> Thanks for your short introduction. I tried to run the barebox image
> > > >> with u-boot and it seems to work. But after I get the following output
> > > >> barebox stops and do nothing.
> > > >>     
> > > > That's a bug in the support for multiple network devices. Please pull
> > > > the -next branch again, then it should work.
> > > >
> > > > Sascha

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From F.Vanalme at TELEVIC.com  Mon Feb 28 03:36:14 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Mon, 28 Feb 2011 09:36:14 +0100
Subject: partitions
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D51@SRV-VS06.TELEVIC.COM>

I'm not that familiar with partitions in Barebox. On my i.MX27 board, I now have :

barebox:/ devinfo
devices:
|----imx_serial0
|----cs0
|----ramfs0
|----devfs0
|----mem0 (defaultenv)
|----mem1 (mem)
|----imx_spi1
|----mc137830 (pmic)
|----mem2 (ram0)
|----imx_nand0
|----nand0 (nand0, nand_oob0, self_raw, env_raw, nand0.barebox, nand0.bareboxenv, nand0.kernel, nand0.root)
|----fec_imx0
|----miidev0 (phy0)
|----eth0

drivers:
imx_serial
     ramfs
     devfs
   fec_imx
    miidev
  imx_nand
 cfi_flash
   imx_spi
     imxfb
   mc13783
       mem
barebox:/

and :

barebox:/ ls -l /dev
cr-------- 4294967295 zero
crw-------       6125 defaultenv
crw------- 4294967295 mem
crw-------        256 pmic
crw-------  134217728 ram0
crw-------  268435456 nand0
cr--------    8388608 nand_oob0
crw-------         32 phy0
crw-------     262144 self_raw
crw-------     262144 self0
crw-------     131072 env_raw
crw-------     131072 env0
crw-------     262144 nand0.barebox
crw-------     131072 nand0.bareboxenv
crw-------    2097152 nand0.kernel
crw-------  265945088 nand0.root
barebox:/

I think this looks OK.
However, I expected this to work (I took this from descriptions on the Internet...) :

barebox:/ erase /dev/nand0.kernel.bb
stat /dev/nand0.kernel.bb: No such file or directory
barebox:/

and

barebox:/ tftp zImage /dev/nand0.kernel.bb
open: Read-only file system
barebox:/


Is there any documentation that handles/describes this ? (e.g. what's the extension .bb ?)


Filip




From baruch at tkos.co.il  Mon Feb 28 03:47:53 2011
From: baruch at tkos.co.il (Baruch Siach)
Date: Mon, 28 Feb 2011 10:47:53 +0200
Subject: partitions
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D51@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D51@SRV-VS06.TELEVIC.COM>
Message-ID: <20110228084753.GH2667@jasper.tkos.co.il>

HI Vanalme,

On Mon, Feb 28, 2011 at 09:36:14AM +0100, Vanalme Filip wrote:
> barebox:/ erase /dev/nand0.kernel.bb
> stat /dev/nand0.kernel.bb: No such file or directory
> barebox:/
> 
> and
> 
> barebox:/ tftp zImage /dev/nand0.kernel.bb
> open: Read-only file system
> barebox:/
> 
> 
> Is there any documentation that handles/describes this ? (e.g. what's the extension .bb ?)

The .bb extension means a bad block aware partition. Use the 'nand -a' command 
to create one from a raw NAND partition, e.g. 'nand -a /dev/nand0.kernel'.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From F.Vanalme at TELEVIC.com  Mon Feb 28 03:57:04 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Mon, 28 Feb 2011 09:57:04 +0100
Subject: partitions
In-Reply-To: <20110228084753.GH2667@jasper.tkos.co.il>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D51@SRV-VS06.TELEVIC.COM>
	<20110228084753.GH2667@jasper.tkos.co.il>
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D61@SRV-VS06.TELEVIC.COM>

> -----Original Message-----
> From: Baruch Siach [mailto:baruch at tkos.co.il]
> Sent: maandag 28 februari 2011 9:48
> To: Vanalme Filip
> Cc: barebox at lists.infradead.org
> Subject: Re: partitions
> 
> HI Vanalme,
> 
> On Mon, Feb 28, 2011 at 09:36:14AM +0100, Vanalme Filip wrote:
> > barebox:/ erase /dev/nand0.kernel.bb
> > stat /dev/nand0.kernel.bb: No such file or directory
> > barebox:/
> >
> > and
> >
> > barebox:/ tftp zImage /dev/nand0.kernel.bb
> > open: Read-only file system
> > barebox:/
> >
> >
> > Is there any documentation that handles/describes this ? (e.g. what's the
> extension .bb ?)
> 
> The .bb extension means a bad block aware partition. Use the 'nand -a' command
> to create one from a raw NAND partition, e.g. 'nand -a /dev/nand0.kernel'.
> 
> baruch

[Filip]  Thanks !


> 
> --
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -


From jbe at pengutronix.de  Mon Feb 28 03:57:57 2011
From: jbe at pengutronix.de (Juergen Beisert)
Date: Mon, 28 Feb 2011 09:57:57 +0100
Subject: partitions
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D51@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D51@SRV-VS06.TELEVIC.COM>
Message-ID: <201102280957.57164.jbe@pengutronix.de>

Vanalme Filip wrote:
> I'm not that familiar with partitions in Barebox. On my i.MX27 board, I now
> have :
>
> barebox:/ devinfo
>
> devices:
> |----imx_serial0
> |----cs0
> |----ramfs0
> |----devfs0
> |----mem0 (defaultenv)
> |----mem1 (mem)
> |----imx_spi1
> |----mc137830 (pmic)
> |----mem2 (ram0)
> |----imx_nand0
> |----nand0 (nand0, nand_oob0, self_raw, env_raw, nand0.barebox,
> | nand0.bareboxenv, nand0.kernel, nand0.root) ----fec_imx0
> |----miidev0 (phy0)
> |----eth0
>
> drivers:
> imx_serial
>      ramfs
>      devfs
>    fec_imx
>     miidev
>   imx_nand
>  cfi_flash
>    imx_spi
>      imxfb
>    mc13783
>        mem
> barebox:/
>
> and :
>
> barebox:/ ls -l /dev
> cr-------- 4294967295 zero
> crw-------       6125 defaultenv
> crw------- 4294967295 mem
> crw-------        256 pmic
> crw-------  134217728 ram0
> crw-------  268435456 nand0
> cr--------    8388608 nand_oob0
> crw-------         32 phy0
> crw-------     262144 self_raw
> crw-------     262144 self0
> crw-------     131072 env_raw
> crw-------     131072 env0
> crw-------     262144 nand0.barebox
> crw-------     131072 nand0.bareboxenv
> crw-------    2097152 nand0.kernel
> crw-------  265945088 nand0.root
> barebox:/
>
> I think this looks OK.
> However, I expected this to work (I took this from descriptions on the
> Internet...) :
>
> barebox:/ erase /dev/nand0.kernel.bb
> stat /dev/nand0.kernel.bb: No such file or directory
> barebox:/
>
> and
>
> barebox:/ tftp zImage /dev/nand0.kernel.bb
> open: Read-only file system
> barebox:/
>
>
> Is there any documentation that handles/describes this ? (e.g. what's the
> extension .bb ?)

'bb' means "Bad Block", and defines a layer that is bad block aware, and can 
handle it in a correct manner.

Add "CONFIG_GLOB=y" to make a script work, that add the *.bb names to all 
existing nand partitions.

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | Phone: +49-8766-939 228     |
Vertretung Sued/Muenchen, Germany             | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686              | http://www.pengutronix.de/  |


From s.hauer at pengutronix.de  Mon Feb 28 04:43:48 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:48 +0100
Subject: mmc: i.MX23/28 patches
Message-ID: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>

The following series cleans up the i.MX23/28 mmc driver.

Sascha Hauer (7):
      mci i.MX23/28: rename driver to mxs.c
      mci mxs: put only once used function inline
      mci mxs: give functions a uniq mxs_mci_ namespace
      mci mxs: rename mci_pdata to host
      mci mxs: make the mci_host a member of mxs_mci_host
      mci mxs: no need to call mxs_mci_setup_clock_speed in init
      ARM tx28stk5: limit mmc max frequency to 25MHz

 arch/arm/boards/chumby_falconwing/falconwing.c |    4 +-
 arch/arm/boards/karo-tx28/tx28-stk5.c          |    7 +-
 arch/arm/mach-mxs/include/mach/mci.h           |    2 +-
 drivers/mci/Kconfig                            |    2 +-
 drivers/mci/Makefile                           |    2 +-
 drivers/mci/{stm378x.c => mxs.c}               |  266 +++++++++++-------------
 6 files changed, 135 insertions(+), 148 deletions(-)
 rename drivers/mci/{stm378x.c => mxs.c} (71%)



From s.hauer at pengutronix.de  Mon Feb 28 04:43:50 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:50 +0100
Subject: [PATCH 2/7] mci mxs: put only once used function inline
In-Reply-To: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
References: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298886235-1769-3-git-send-email-s.hauer@pengutronix.de>

Also, rename mci_rename after the callback it implements: stm_mci_initialize.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mci/mxs.c |   27 ++++++++-------------------
 1 files changed, 8 insertions(+), 19 deletions(-)

diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c
index 94b0f4a..db789e7 100644
--- a/drivers/mci/mxs.c
+++ b/drivers/mci/mxs.c
@@ -595,13 +595,17 @@ static void stm_mci_reset(struct device_d *hw_dev)
 		;
 }
 
+/* ------------------------- MCI API -------------------------------------- */
+
 /**
- * Initialize the engine
- * @param hw_dev Host interface instance
+ * Keep the attached MMC/SD unit in a well know state
+ * @param mci_pdata MCI platform data
  * @param mci_dev MCI device instance
+ * @return 0 on success, negative value else
  */
-static int stm_mci_initialize(struct device_d *hw_dev, struct device_d *mci_dev)
+static int stm_mci_initialize(struct mci_host *mci_pdata, struct device_d *mci_dev)
 {
+	struct device_d *hw_dev = mci_pdata->hw_dev;
 	struct mci_host *host = GET_MCI_PDATA(mci_dev);
 	struct stm_mci_host *host_data = (struct stm_mci_host*)GET_HOST_DATA(hw_dev);
 
@@ -624,21 +628,6 @@ static int stm_mci_initialize(struct device_d *hw_dev, struct device_d *mci_dev)
 	return 0;
 }
 
-/* ------------------------- MCI API -------------------------------------- */
-
-/**
- * Keep the attached MMC/SD unit in a well know state
- * @param mci_pdata MCI platform data
- * @param mci_dev MCI device instance
- * @return 0 on success, negative value else
- */
-static int mci_reset(struct mci_host *mci_pdata, struct device_d *mci_dev)
-{
-	struct device_d *hw_dev = mci_pdata->hw_dev;
-
-	return stm_mci_initialize(hw_dev, mci_dev);
-}
-
 /**
  * Process one command to the MCI card
  * @param mci_pdata MCI platform data
@@ -733,7 +722,7 @@ static int stm_mci_probe(struct device_d *hw_dev)
 	host->hw_dev = hw_dev;
 	host->send_cmd = mci_request,
 	host->set_ios = mci_set_ios,
-	host->init = mci_reset,
+	host->init = stm_mci_initialize,
 
 	/* feed forward the platform specific values */
 	host->voltages = pd->voltages;
-- 
1.7.2.3



From s.hauer at pengutronix.de  Mon Feb 28 04:43:49 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:49 +0100
Subject: [PATCH 1/7] mci i.MX23/28: rename driver to mxs.c
In-Reply-To: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
References: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298886235-1769-2-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mci/Kconfig              |    2 +-
 drivers/mci/Makefile             |    2 +-
 drivers/mci/{stm378x.c => mxs.c} |    0
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename drivers/mci/{stm378x.c => mxs.c} (100%)

diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index 7d214ac..b11f267 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -27,7 +27,7 @@ config MCI_INFO
 
 comment "--- MCI host drivers ---"
 
-config MCI_STM378X
+config MCI_MXS
 	bool "i.MX23/i.MX28"
 	depends on ARCH_MXS
 	help
diff --git a/drivers/mci/Makefile b/drivers/mci/Makefile
index a10cb47..f175bba 100644
--- a/drivers/mci/Makefile
+++ b/drivers/mci/Makefile
@@ -1,5 +1,5 @@
 obj-$(CONFIG_MCI)	+= mci-core.o
-obj-$(CONFIG_MCI_STM378X) += stm378x.o
+obj-$(CONFIG_MCI_MXS) += mxs.o
 obj-$(CONFIG_MCI_S3C) += s3c.o
 obj-$(CONFIG_MCI_IMX) += imx.o
 obj-$(CONFIG_MCI_IMX_ESDHC) += imx-esdhc.o
diff --git a/drivers/mci/stm378x.c b/drivers/mci/mxs.c
similarity index 100%
rename from drivers/mci/stm378x.c
rename to drivers/mci/mxs.c
-- 
1.7.2.3



From s.hauer at pengutronix.de  Mon Feb 28 04:43:55 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:55 +0100
Subject: [PATCH 7/7] ARM tx28stk5: limit mmc max frequency to 25MHz
In-Reply-To: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
References: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298886235-1769-8-git-send-email-s.hauer@pengutronix.de>

Higher frequencies do not seem to work.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/karo-tx28/tx28-stk5.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/karo-tx28/tx28-stk5.c b/arch/arm/boards/karo-tx28/tx28-stk5.c
index a3f4a28..81cb80c 100644
--- a/arch/arm/boards/karo-tx28/tx28-stk5.c
+++ b/arch/arm/boards/karo-tx28/tx28-stk5.c
@@ -29,9 +29,10 @@
 #include <mach/fb.h>
 
 static struct mxs_mci_platform_data mci_pdata = {
-	.caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz,
+	.caps = MMC_MODE_4BIT,
 	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,	/* fixed to 3.3 V */
 	.f_min = 400 * 1000,
+	.f_max = 25000000,
 };
 
 static struct device_d mci_socket = {
-- 
1.7.2.3



From s.hauer at pengutronix.de  Mon Feb 28 04:43:54 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:54 +0100
Subject: [PATCH 6/7] mci mxs: no need to call mxs_mci_setup_clock_speed in init
In-Reply-To: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
References: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298886235-1769-7-git-send-email-s.hauer@pengutronix.de>

It will be called by set_ios anyway later. Also, do not
alter host->clock field, this is none of our business.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mci/mxs.c |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c
index 7f8f3f8..814eba3 100644
--- a/drivers/mci/mxs.c
+++ b/drivers/mci/mxs.c
@@ -615,7 +615,6 @@ static int mxs_mci_initialize(struct mci_host *host, struct device_d *mci_dev)
 	mxs_mci_reset(mxs_mci);
 
 	/* restore the last settings */
-	host->clock = mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, host->clock);
 	mxs_mci_setup_timeout(mxs_mci, 0xffff);
 	writel(SSP_CTRL0_IGNORE_CRC |
 		SSP_CTRL0_BUS_WIDTH(mxs_mci->bus_width),
@@ -678,9 +677,9 @@ static void mxs_mci_set_ios(struct mci_host *host, struct device_d *mci_dev,
 		break;
 	}
 
-	host->clock = mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, clock);
+	mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, clock);
 	pr_debug("IO settings: bus width=%d, frequency=%u Hz\n", host->bus_width,
-			host->clock);
+			mxs_mci->clock);
 }
 
 /* ----------------------------------------------------------------------- */
-- 
1.7.2.3



From s.hauer at pengutronix.de  Mon Feb 28 04:43:52 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:52 +0100
Subject: [PATCH 4/7] mci mxs: rename mci_pdata to host
In-Reply-To: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
References: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298886235-1769-5-git-send-email-s.hauer@pengutronix.de>

struct mci_host is named host in the rest of the driver, so
name it like this consistently.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mci/mxs.c |   14 ++++++--------
 1 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c
index af69357..bc177f5 100644
--- a/drivers/mci/mxs.c
+++ b/drivers/mci/mxs.c
@@ -603,10 +603,9 @@ static void mxs_mci_reset(struct device_d *hw_dev)
  * @param mci_dev MCI device instance
  * @return 0 on success, negative value else
  */
-static int mxs_mci_initialize(struct mci_host *mci_pdata, struct device_d *mci_dev)
+static int mxs_mci_initialize(struct mci_host *host, struct device_d *mci_dev)
 {
-	struct device_d *hw_dev = mci_pdata->hw_dev;
-	struct mci_host *host = GET_MCI_PDATA(mci_dev);
+	struct device_d *hw_dev = host->hw_dev;
 	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
 
 	/* enable the clock to this unit to be able to reset it */
@@ -635,10 +634,10 @@ static int mxs_mci_initialize(struct mci_host *mci_pdata, struct device_d *mci_d
  * @param data The data to handle in the command (can be NULL)
  * @return 0 on success, negative value else
  */
-static int mxs_mci_request(struct mci_host *mci_pdata, struct mci_cmd *cmd,
+static int mxs_mci_request(struct mci_host *host, struct mci_cmd *cmd,
 			struct mci_data *data)
 {
-	struct device_d *hw_dev = mci_pdata->hw_dev;
+	struct device_d *hw_dev = host->hw_dev;
 	int rc;
 
 	if ((cmd->resp_type == 0) || (data == NULL))
@@ -659,12 +658,11 @@ static int mxs_mci_request(struct mci_host *mci_pdata, struct mci_cmd *cmd,
  *
  * Drivers currently realized values are stored in MCI's platformdata
  */
-static void mxs_mci_set_ios(struct mci_host *mci_pdata, struct device_d *mci_dev,
+static void mxs_mci_set_ios(struct mci_host *host, struct device_d *mci_dev,
 			unsigned bus_width, unsigned clock)
 {
-	struct device_d *hw_dev = mci_pdata->hw_dev;
+	struct device_d *hw_dev = host->hw_dev;
 	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
-	struct mci_host *host = GET_MCI_PDATA(mci_dev);
 
 	switch (bus_width) {
 	case 8:
-- 
1.7.2.3



From s.hauer at pengutronix.de  Mon Feb 28 04:43:51 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:51 +0100
Subject: [PATCH 3/7] mci mxs: give functions a uniq mxs_mci_ namespace
In-Reply-To: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
References: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298886235-1769-4-git-send-email-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/boards/chumby_falconwing/falconwing.c |    4 +-
 arch/arm/boards/karo-tx28/tx28-stk5.c          |    4 +-
 arch/arm/mach-mxs/include/mach/mci.h           |    2 +-
 drivers/mci/mxs.c                              |  124 ++++++++++++------------
 4 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c
index d46431c..84aa837 100644
--- a/arch/arm/boards/chumby_falconwing/falconwing.c
+++ b/arch/arm/boards/chumby_falconwing/falconwing.c
@@ -46,13 +46,13 @@ static struct device_d sdram_dev = {
 	.platform_data = &ram_pdata,
 };
 
-static struct stm_mci_platform_data mci_pdata = {
+static struct mxs_mci_platform_data mci_pdata = {
 	.caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz,
 	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,	/* fixed to 3.3 V */
 };
 
 static struct device_d mci_dev = {
-	.name     = "stm_mci",
+	.name     = "mxs_mci",
 	.map_base = IMX_SSP1_BASE,
 	.platform_data = &mci_pdata,
 };
diff --git a/arch/arm/boards/karo-tx28/tx28-stk5.c b/arch/arm/boards/karo-tx28/tx28-stk5.c
index 9258442..a3f4a28 100644
--- a/arch/arm/boards/karo-tx28/tx28-stk5.c
+++ b/arch/arm/boards/karo-tx28/tx28-stk5.c
@@ -28,14 +28,14 @@
 #include <mach/mci.h>
 #include <mach/fb.h>
 
-static struct stm_mci_platform_data mci_pdata = {
+static struct mxs_mci_platform_data mci_pdata = {
 	.caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz,
 	.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,	/* fixed to 3.3 V */
 	.f_min = 400 * 1000,
 };
 
 static struct device_d mci_socket = {
-	.name = "stm_mci",
+	.name = "mxs_mci",
 	.map_base = IMX_SSP0_BASE,
 	.platform_data = &mci_pdata,
 };
diff --git a/arch/arm/mach-mxs/include/mach/mci.h b/arch/arm/mach-mxs/include/mach/mci.h
index b924908..1090c1a 100644
--- a/arch/arm/mach-mxs/include/mach/mci.h
+++ b/arch/arm/mach-mxs/include/mach/mci.h
@@ -18,7 +18,7 @@
 #ifndef __MACH_MMC_H
 #define __MACH_MMC_H
 
-struct stm_mci_platform_data {
+struct mxs_mci_platform_data {
 	unsigned caps;	/**< supported operating modes (MMC_MODE_*) */
 	unsigned voltages; /**< supported voltage range (MMC_VDD_*) */
 	unsigned f_min;	/**< min operating frequency in Hz (0 -> no limit) */
diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c
index db789e7..af69357 100644
--- a/drivers/mci/mxs.c
+++ b/drivers/mci/mxs.c
@@ -165,7 +165,7 @@
 # define HW_SSP_VERSION 0x130
 #endif
 
-struct stm_mci_host {
+struct mxs_mci_host {
 	unsigned	clock;	/* current clock speed in Hz ("0" if disabled) */
 	unsigned	index;
 #ifdef CONFIG_MCI_INFO
@@ -180,9 +180,9 @@ struct stm_mci_host {
  * @param hw_dev Host interface device instance
  * @return Unit's clock in [Hz]
  */
-static unsigned get_unit_clock(struct device_d *hw_dev)
+static unsigned mxs_mci_get_unit_clock(struct device_d *hw_dev)
 {
-	struct stm_mci_host *host_data = GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *host_data = GET_HOST_DATA(hw_dev);
 
 	return imx_get_sspclk(host_data->index);
 }
@@ -193,7 +193,7 @@ static unsigned get_unit_clock(struct device_d *hw_dev)
  * @param cmd Command description
  * @return Response bytes count, -EINVAL for unsupported response types
  */
-static int get_cards_response(struct device_d *hw_dev, struct mci_cmd *cmd)
+static int mxs_mci_get_cards_response(struct device_d *hw_dev, struct mci_cmd *cmd)
 {
 	switch (cmd->resp_type) {
 	case MMC_RSP_NONE:
@@ -222,7 +222,7 @@ static int get_cards_response(struct device_d *hw_dev, struct mci_cmd *cmd)
  *
  * Can also stop the clock to save power
  */
-static void finish_request(struct device_d *hw_dev)
+static void mxs_mci_finish_request(struct device_d *hw_dev)
 {
 	/* stop the engines (normaly already done) */
 	writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 8);
@@ -233,7 +233,7 @@ static void finish_request(struct device_d *hw_dev)
  * @param status HW_SSP_STATUS's content
  * @return 0 if no error, negative values else
  */
-static int get_cmd_error(unsigned status)
+static int mxs_mci_get_cmd_error(unsigned status)
 {
 	if (status & SSP_STATUS_ERROR)
 		pr_debug("Status Reg reports %08X\n", status);
@@ -260,7 +260,7 @@ static int get_cmd_error(unsigned status)
  * @param hw_dev Host interface device instance
  * @param to Timeout value in MCI card's bus clocks
  */
-static void stm_setup_timout(struct device_d *hw_dev, unsigned to)
+static void mxs_mci_setup_timeout(struct device_d *hw_dev, unsigned to)
 {
 	uint32_t reg;
 
@@ -280,7 +280,7 @@ static void stm_setup_timout(struct device_d *hw_dev, unsigned to)
  * may fail whith high clock speeds. If you receive -EIO errors you can try
  * again with reduced clock speeds.
  */
-static int read_data(struct device_d *hw_dev, void *buffer, unsigned length)
+static int mxs_mci_read_data(struct device_d *hw_dev, void *buffer, unsigned length)
 {
 	uint32_t *p = buffer;
 
@@ -318,7 +318,7 @@ static int read_data(struct device_d *hw_dev, void *buffer, unsigned length)
  * may fail with high clock speeds. If you receive -EIO errors you can try
  * again with reduced clock speeds.
  */
-static int write_data(struct device_d *hw_dev, const void *buffer, unsigned length)
+static int mxs_mci_write_data(struct device_d *hw_dev, const void *buffer, unsigned length)
 {
 	const uint32_t *p = buffer;
 
@@ -349,7 +349,7 @@ static int write_data(struct device_d *hw_dev, const void *buffer, unsigned leng
  * @param data Data transfer description (might be NULL)
  * @return 0 on success
  */
-static int transfer_data(struct device_d *hw_dev, struct mci_data *data)
+static int mxs_mci_transfer_data(struct device_d *hw_dev, struct mci_data *data)
 {
 	unsigned length;
 
@@ -363,7 +363,7 @@ static int transfer_data(struct device_d *hw_dev, struct mci_data *data)
 		 * But last time I tried it, it failed badly. Don't know why yet
 		 */
 		if (data->flags & MMC_DATA_WRITE) {
-			err = write_data(host, data->src, 16);
+			err = mxs_mci_write_data(host, data->src, 16);
 			data->src += 16;
 			length -= 16;
 		}
@@ -381,9 +381,9 @@ static int transfer_data(struct device_d *hw_dev, struct mci_data *data)
 
 	if (data != NULL) {
 		if (data->flags & MMC_DATA_READ)
-			return read_data(hw_dev, data->dest, length);
+			return mxs_mci_read_data(hw_dev, data->dest, length);
 		else
-			return write_data(hw_dev, data->src, length);
+			return mxs_mci_write_data(hw_dev, data->src, length);
 	}
 
 	return 0;
@@ -395,7 +395,7 @@ static int transfer_data(struct device_d *hw_dev, struct mci_data *data)
  * @param data_flags Data information (may be 0)
  * @return Corresponding setting for the SSP_CTRL0 register
  */
-static uint32_t prepare_transfer_setup(unsigned cmd_flags, unsigned data_flags)
+static uint32_t mxs_mci_prepare_transfer_setup(unsigned cmd_flags, unsigned data_flags)
 {
 	uint32_t reg = 0;
 
@@ -428,10 +428,10 @@ static uint32_t prepare_transfer_setup(unsigned cmd_flags, unsigned data_flags)
  * - "broadcast commands with response (BCR)"
  * - "addressed command (AC)" with response, but without data
  */
-static int stm_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
+static int mxs_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
 {
 	/* setup command and transfer parameters */
-	writel(prepare_transfer_setup(cmd->resp_type, 0) |
+	writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, 0) |
 		SSP_CTRL0_ENABLE, hw_dev->map_base + HW_SSP_CTRL0);
 
 	/* prepare the command, when no response is expected add a few trailing clocks */
@@ -442,7 +442,7 @@ static int stm_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
 	/* prepare command's arguments */
 	writel(cmd->cmdarg, hw_dev->map_base + HW_SSP_CMD1);
 
-	stm_setup_timout(hw_dev, 0xffff);
+	mxs_mci_setup_timeout(hw_dev, 0xffff);
 
 	/* start the transfer */
 	writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 4);
@@ -452,9 +452,9 @@ static int stm_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
 		;
 
 	if (cmd->resp_type & MMC_RSP_PRESENT)
-		get_cards_response(hw_dev, cmd);
+		mxs_mci_get_cards_response(hw_dev, cmd);
 
-	return get_cmd_error(readl(hw_dev->map_base + HW_SSP_STATUS));
+	return mxs_mci_get_cmd_error(readl(hw_dev->map_base + HW_SSP_STATUS));
 }
 
 /**
@@ -464,10 +464,10 @@ static int stm_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
  * @param data The data information (buffer, direction aso.) May be NULL
  * @return 0 on success
  */
-static int stm_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
+static int mxs_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
 			struct mci_data *data)
 {
-	struct stm_mci_host *host_data = (struct stm_mci_host*)GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
 	uint32_t xfer_cnt, log2blocksize, block_cnt;
 	int err;
 
@@ -482,7 +482,7 @@ static int stm_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
 
 	/* setup command and transfer parameters */
 #ifdef CONFIG_ARCH_IMX23
-	writel(prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
+	writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
 		SSP_CTRL0_BUS_WIDTH(host_data->bus_width) |
 		(xfer_cnt != 0 ? SSP_CTRL0_DATA_XFER : 0) | /* command plus data */
 		SSP_CTRL0_ENABLE |
@@ -497,7 +497,7 @@ static int stm_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
 		hw_dev->map_base + HW_SSP_CMD0);
 #endif
 #ifdef CONFIG_ARCH_IMX28
-	writel(prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
+	writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
 		SSP_CTRL0_BUS_WIDTH(host_data->bus_width) |
 		(xfer_cnt != 0 ? SSP_CTRL0_DATA_XFER : 0) | /* command plus data */
 		SSP_CTRL0_ENABLE,
@@ -516,9 +516,9 @@ static int stm_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
 	/* prepare command's arguments */
 	writel(cmd->cmdarg, hw_dev->map_base + HW_SSP_CMD1);
 
-	stm_setup_timout(hw_dev, 0xffff);
+	mxs_mci_setup_timeout(hw_dev, 0xffff);
 
-	err = transfer_data(hw_dev, data);
+	err = mxs_mci_transfer_data(hw_dev, data);
 	if (err != 0) {
 		pr_debug(" Transfering data failed\n");
 		return err;
@@ -528,7 +528,7 @@ static int stm_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
 	while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
 		;
 
-	get_cards_response(hw_dev, cmd);
+	mxs_mci_get_cards_response(hw_dev, cmd);
 
 	return 0;
 }
@@ -554,7 +554,7 @@ static int stm_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
  * @note Up to "SSP unit DIV" the outer world must care. This routine only
  * handles the "SSP DIV".
  */
-static unsigned setup_clock_speed(struct device_d *hw_dev, unsigned nc)
+static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
 {
 	unsigned ssp, div, rate, reg;
 
@@ -563,7 +563,7 @@ static unsigned setup_clock_speed(struct device_d *hw_dev, unsigned nc)
 		return 0;
 	}
 
-	ssp = get_unit_clock(hw_dev);
+	ssp = mxs_mci_get_unit_clock(hw_dev);
 
 	for (div = 2; div < 255; div += 2) {
 		rate = DIV_ROUND_CLOSEST(DIV_ROUND_CLOSEST(ssp, nc), div);
@@ -588,7 +588,7 @@ static unsigned setup_clock_speed(struct device_d *hw_dev, unsigned nc)
  *
  * This will reset everything in all registers of this unit! (FIXME)
  */
-static void stm_mci_reset(struct device_d *hw_dev)
+static void mxs_mci_reset(struct device_d *hw_dev)
 {
 	writel(SSP_CTRL0_SFTRST, hw_dev->map_base + HW_SSP_CTRL0 + 8);
 	while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_SFTRST)
@@ -603,21 +603,21 @@ static void stm_mci_reset(struct device_d *hw_dev)
  * @param mci_dev MCI device instance
  * @return 0 on success, negative value else
  */
-static int stm_mci_initialize(struct mci_host *mci_pdata, struct device_d *mci_dev)
+static int mxs_mci_initialize(struct mci_host *mci_pdata, struct device_d *mci_dev)
 {
 	struct device_d *hw_dev = mci_pdata->hw_dev;
 	struct mci_host *host = GET_MCI_PDATA(mci_dev);
-	struct stm_mci_host *host_data = (struct stm_mci_host*)GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
 
 	/* enable the clock to this unit to be able to reset it */
 	writel(SSP_CTRL0_CLKGATE, hw_dev->map_base + HW_SSP_CTRL0 + 8);
 
 	/* reset the unit */
-	stm_mci_reset(hw_dev);
+	mxs_mci_reset(hw_dev);
 
 	/* restore the last settings */
-	host->clock = host_data->clock = setup_clock_speed(hw_dev, host->clock);
-	stm_setup_timout(hw_dev, 0xffff);
+	host->clock = host_data->clock = mxs_mci_setup_clock_speed(hw_dev, host->clock);
+	mxs_mci_setup_timeout(hw_dev, 0xffff);
 	writel(SSP_CTRL0_IGNORE_CRC |
 		SSP_CTRL0_BUS_WIDTH(host_data->bus_width),
 		hw_dev->map_base + HW_SSP_CTRL0);
@@ -635,18 +635,18 @@ static int stm_mci_initialize(struct mci_host *mci_pdata, struct device_d *mci_d
  * @param data The data to handle in the command (can be NULL)
  * @return 0 on success, negative value else
  */
-static int mci_request(struct mci_host *mci_pdata, struct mci_cmd *cmd,
+static int mxs_mci_request(struct mci_host *mci_pdata, struct mci_cmd *cmd,
 			struct mci_data *data)
 {
 	struct device_d *hw_dev = mci_pdata->hw_dev;
 	int rc;
 
 	if ((cmd->resp_type == 0) || (data == NULL))
-		rc = stm_mci_std_cmds(hw_dev, cmd);
+		rc = mxs_mci_std_cmds(hw_dev, cmd);
 	else
-		rc = stm_mci_adtc(hw_dev, cmd, data);	/* with response and data */
+		rc = mxs_mci_adtc(hw_dev, cmd, data);	/* with response and data */
 
-	finish_request(hw_dev);	/* TODO */
+	mxs_mci_finish_request(hw_dev);	/* TODO */
 	return rc;
 }
 
@@ -659,11 +659,11 @@ static int mci_request(struct mci_host *mci_pdata, struct mci_cmd *cmd,
  *
  * Drivers currently realized values are stored in MCI's platformdata
  */
-static void mci_set_ios(struct mci_host *mci_pdata, struct device_d *mci_dev,
+static void mxs_mci_set_ios(struct mci_host *mci_pdata, struct device_d *mci_dev,
 			unsigned bus_width, unsigned clock)
 {
 	struct device_d *hw_dev = mci_pdata->hw_dev;
-	struct stm_mci_host *host_data = (struct stm_mci_host*)GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
 	struct mci_host *host = GET_MCI_PDATA(mci_dev);
 
 	switch (bus_width) {
@@ -681,7 +681,7 @@ static void mci_set_ios(struct mci_host *mci_pdata, struct device_d *mci_dev,
 		break;
 	}
 
-	host->clock = host_data->clock = setup_clock_speed(hw_dev, clock);
+	host->clock = host_data->clock = mxs_mci_setup_clock_speed(hw_dev, clock);
 	pr_debug("IO settings: bus width=%d, frequency=%u Hz\n", host->bus_width,
 			host->clock);
 }
@@ -691,9 +691,9 @@ static void mci_set_ios(struct mci_host *mci_pdata, struct device_d *mci_dev,
 #ifdef CONFIG_MCI_INFO
 const unsigned char bus_width[3] = { 1, 4, 8 };
 
-static void stm_info(struct device_d *hw_dev)
+static void mxs_mci_info(struct device_d *hw_dev)
 {
-	struct stm_mci_host *host_data = GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *host_data = GET_HOST_DATA(hw_dev);
 
 	printf(" Interface\n");
 	printf("  Min. bus clock: %u Hz\n", host_data->f_min);
@@ -704,10 +704,10 @@ static void stm_info(struct device_d *hw_dev)
 }
 #endif
 
-static int stm_mci_probe(struct device_d *hw_dev)
+static int mxs_mci_probe(struct device_d *hw_dev)
 {
-	struct stm_mci_platform_data *pd = hw_dev->platform_data;
-	struct stm_mci_host *host_data;
+	struct mxs_mci_platform_data *pd = hw_dev->platform_data;
+	struct mxs_mci_host *host_data;
 	struct mci_host *host;
 
 	if (hw_dev->platform_data == NULL) {
@@ -715,14 +715,14 @@ static int stm_mci_probe(struct device_d *hw_dev)
 		return -EINVAL;
 	}
 
-	host = xzalloc(sizeof(struct stm_mci_host) + sizeof(struct mci_host));
-	host_data = (struct stm_mci_host*)&host[1];
+	host = xzalloc(sizeof(struct mxs_mci_host) + sizeof(struct mci_host));
+	host_data = (struct mxs_mci_host*)&host[1];
 
 	hw_dev->priv = host_data;
 	host->hw_dev = hw_dev;
-	host->send_cmd = mci_request,
-	host->set_ios = mci_set_ios,
-	host->init = stm_mci_initialize,
+	host->send_cmd = mxs_mci_request,
+	host->set_ios = mxs_mci_set_ios,
+	host->init = mxs_mci_initialize,
 
 	/* feed forward the platform specific values */
 	host->voltages = pd->voltages;
@@ -752,20 +752,20 @@ static int stm_mci_probe(struct device_d *hw_dev)
 	}
 #endif
 	if (pd->f_min == 0) {
-		host->f_min = get_unit_clock(hw_dev) / 254 / 256;
+		host->f_min = mxs_mci_get_unit_clock(hw_dev) / 254 / 256;
 		pr_debug("Min. frequency is %u Hz\n", host->f_min);
 	} else {
 		host->f_min = pd->f_min;
 		pr_debug("Min. frequency is %u Hz, could be %u Hz\n",
-			host->f_min, get_unit_clock(hw_dev) / 254 / 256);
+			host->f_min, mxs_mci_get_unit_clock(hw_dev) / 254 / 256);
 	}
 	if (pd->f_max == 0) {
-		host->f_max = get_unit_clock(hw_dev) / 2 / 1;
+		host->f_max = mxs_mci_get_unit_clock(hw_dev) / 2 / 1;
 		pr_debug("Max. frequency is %u Hz\n", host->f_max);
 	} else {
 		host->f_max =  pd->f_max;
 		pr_debug("Max. frequency is %u Hz, could be %u Hz\n",
-			host->f_max, get_unit_clock(hw_dev) / 2 / 1);
+			host->f_max, mxs_mci_get_unit_clock(hw_dev) / 2 / 1);
 	}
 
 #ifdef CONFIG_MCI_INFO
@@ -776,18 +776,18 @@ static int stm_mci_probe(struct device_d *hw_dev)
 	return mci_register(host);
 }
 
-static struct driver_d stm_mci_driver = {
-        .name  = "stm_mci",
-        .probe = stm_mci_probe,
+static struct driver_d mxs_mci_driver = {
+        .name  = "mxs_mci",
+        .probe = mxs_mci_probe,
 #ifdef CONFIG_MCI_INFO
-	.info = stm_info,
+	.info = mxs_mci_info,
 #endif
 };
 
-static int stm_mci_init_driver(void)
+static int mxs_mci_init_driver(void)
 {
-        register_driver(&stm_mci_driver);
+        register_driver(&mxs_mci_driver);
         return 0;
 }
 
-device_initcall(stm_mci_init_driver);
+device_initcall(mxs_mci_init_driver);
-- 
1.7.2.3



From s.hauer at pengutronix.de  Mon Feb 28 04:43:53 2011
From: s.hauer at pengutronix.de (Sascha Hauer)
Date: Mon, 28 Feb 2011 10:43:53 +0100
Subject: [PATCH 5/7] mci mxs: make the mci_host a member of mxs_mci_host
In-Reply-To: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
References: <1298886235-1769-1-git-send-email-s.hauer@pengutronix.de>
Message-ID: <1298886235-1769-6-git-send-email-s.hauer@pengutronix.de>

This allows for more type safety. passing a struct device_d
internally in the driver is not a good idea. Also, this
patch adds a void __iomem *regs to mxs_mci_host. dev->map_base
should not be used for register accesses.

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mci/mxs.c |  196 ++++++++++++++++++++++++++--------------------------
 1 files changed, 98 insertions(+), 98 deletions(-)

diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c
index bc177f5..7f8f3f8 100644
--- a/drivers/mci/mxs.c
+++ b/drivers/mci/mxs.c
@@ -166,6 +166,8 @@
 #endif
 
 struct mxs_mci_host {
+	struct mci_host	host;
+	void __iomem	*regs;
 	unsigned	clock;	/* current clock speed in Hz ("0" if disabled) */
 	unsigned	index;
 #ifdef CONFIG_MCI_INFO
@@ -175,16 +177,16 @@ struct mxs_mci_host {
 	int		bus_width:2; /* 0 = 1 bit, 1 = 4 bit, 2 = 8 bit */
 };
 
+#define to_mxs_mci(mxs) container_of(mxs, struct mxs_mci_host, host)
+
 /**
  * Get the SSP clock rate
  * @param hw_dev Host interface device instance
  * @return Unit's clock in [Hz]
  */
-static unsigned mxs_mci_get_unit_clock(struct device_d *hw_dev)
+static unsigned mxs_mci_get_unit_clock(struct mxs_mci_host *mxs_mci)
 {
-	struct mxs_mci_host *host_data = GET_HOST_DATA(hw_dev);
-
-	return imx_get_sspclk(host_data->index);
+	return imx_get_sspclk(mxs_mci->index);
 }
 
 /**
@@ -193,7 +195,7 @@ static unsigned mxs_mci_get_unit_clock(struct device_d *hw_dev)
  * @param cmd Command description
  * @return Response bytes count, -EINVAL for unsupported response types
  */
-static int mxs_mci_get_cards_response(struct device_d *hw_dev, struct mci_cmd *cmd)
+static int mxs_mci_get_cards_response(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd)
 {
 	switch (cmd->resp_type) {
 	case MMC_RSP_NONE:
@@ -202,14 +204,14 @@ static int mxs_mci_get_cards_response(struct device_d *hw_dev, struct mci_cmd *c
 	case MMC_RSP_R1:
 	case MMC_RSP_R1b:
 	case MMC_RSP_R3:
-		cmd->response[0] = readl(hw_dev->map_base + HW_SSP_SDRESP0);
+		cmd->response[0] = readl(mxs_mci->regs + HW_SSP_SDRESP0);
 		return 1;
 
 	case MMC_RSP_R2:
-		cmd->response[3] = readl(hw_dev->map_base + HW_SSP_SDRESP0);
-		cmd->response[2] = readl(hw_dev->map_base + HW_SSP_SDRESP1);
-		cmd->response[1] = readl(hw_dev->map_base + HW_SSP_SDRESP2);
-		cmd->response[0] = readl(hw_dev->map_base + HW_SSP_SDRESP3);
+		cmd->response[3] = readl(mxs_mci->regs + HW_SSP_SDRESP0);
+		cmd->response[2] = readl(mxs_mci->regs + HW_SSP_SDRESP1);
+		cmd->response[1] = readl(mxs_mci->regs + HW_SSP_SDRESP2);
+		cmd->response[0] = readl(mxs_mci->regs + HW_SSP_SDRESP3);
 		return 4;
 	}
 
@@ -222,10 +224,10 @@ static int mxs_mci_get_cards_response(struct device_d *hw_dev, struct mci_cmd *c
  *
  * Can also stop the clock to save power
  */
-static void mxs_mci_finish_request(struct device_d *hw_dev)
+static void mxs_mci_finish_request(struct mxs_mci_host *mxs_mci)
 {
 	/* stop the engines (normaly already done) */
-	writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 8);
+	writel(SSP_CTRL0_RUN, mxs_mci->regs + HW_SSP_CTRL0 + 8);
 }
 
 /**
@@ -260,13 +262,13 @@ static int mxs_mci_get_cmd_error(unsigned status)
  * @param hw_dev Host interface device instance
  * @param to Timeout value in MCI card's bus clocks
  */
-static void mxs_mci_setup_timeout(struct device_d *hw_dev, unsigned to)
+static void mxs_mci_setup_timeout(struct mxs_mci_host *mxs_mci, unsigned to)
 {
 	uint32_t reg;
 
-	reg = readl(hw_dev->map_base + HW_SSP_TIMING) & ~SSP_TIMING_TIMEOUT_MASK;
+	reg = readl(mxs_mci->regs + HW_SSP_TIMING) & ~SSP_TIMING_TIMEOUT_MASK;
 	reg |= SSP_TIMING_TIMEOUT(to);
-	writel(reg, hw_dev->map_base + HW_SSP_TIMING);
+	writel(reg, mxs_mci->regs + HW_SSP_TIMING);
 }
 
 /**
@@ -280,7 +282,7 @@ static void mxs_mci_setup_timeout(struct device_d *hw_dev, unsigned to)
  * may fail whith high clock speeds. If you receive -EIO errors you can try
  * again with reduced clock speeds.
  */
-static int mxs_mci_read_data(struct device_d *hw_dev, void *buffer, unsigned length)
+static int mxs_mci_read_data(struct mxs_mci_host *mxs_mci, void *buffer, unsigned length)
 {
 	uint32_t *p = buffer;
 
@@ -291,10 +293,10 @@ static int mxs_mci_read_data(struct device_d *hw_dev, void *buffer, unsigned len
 	}
 
 	while ((length != 0) &&
-		((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
+		((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
 		/* TODO sort out FIFO overflows and emit -EOI for this case */
-		if ((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_FIFO_EMPTY) == 0) {
-			*p = readl(hw_dev->map_base + HW_SSP_DATA);
+		if ((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_FIFO_EMPTY) == 0) {
+			*p = readl(mxs_mci->regs + HW_SSP_DATA);
 			p++;
 			length -= 4;
 		}
@@ -318,7 +320,7 @@ static int mxs_mci_read_data(struct device_d *hw_dev, void *buffer, unsigned len
  * may fail with high clock speeds. If you receive -EIO errors you can try
  * again with reduced clock speeds.
  */
-static int mxs_mci_write_data(struct device_d *hw_dev, const void *buffer, unsigned length)
+static int mxs_mci_write_data(struct mxs_mci_host *mxs_mci, const void *buffer, unsigned length)
 {
 	const uint32_t *p = buffer;
 
@@ -329,10 +331,10 @@ static int mxs_mci_write_data(struct device_d *hw_dev, const void *buffer, unsig
 	}
 
 	while ((length != 0) &&
-		((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
+		((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
 		/* TODO sort out FIFO overflows and emit -EOI for this case */
-		if ((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_FIFO_FULL) == 0) {
-			writel(*p, hw_dev->map_base + HW_SSP_DATA);
+		if ((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_FIFO_FULL) == 0) {
+			writel(*p, mxs_mci->regs + HW_SSP_DATA);
 			p++;
 			length -= 4;
 		}
@@ -349,7 +351,7 @@ static int mxs_mci_write_data(struct device_d *hw_dev, const void *buffer, unsig
  * @param data Data transfer description (might be NULL)
  * @return 0 on success
  */
-static int mxs_mci_transfer_data(struct device_d *hw_dev, struct mci_data *data)
+static int mxs_mci_transfer_data(struct mxs_mci_host *mxs_mci, struct mci_data *data)
 {
 	unsigned length;
 
@@ -377,13 +379,13 @@ static int mxs_mci_transfer_data(struct device_d *hw_dev, struct mci_data *data)
 	 *
 	 * Start the transaction right now
 	 */
-	writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 4);
+	writel(SSP_CTRL0_RUN, mxs_mci->regs + HW_SSP_CTRL0 + 4);
 
 	if (data != NULL) {
 		if (data->flags & MMC_DATA_READ)
-			return mxs_mci_read_data(hw_dev, data->dest, length);
+			return mxs_mci_read_data(mxs_mci, data->dest, length);
 		else
-			return mxs_mci_write_data(hw_dev, data->src, length);
+			return mxs_mci_write_data(mxs_mci, data->src, length);
 	}
 
 	return 0;
@@ -428,33 +430,33 @@ static uint32_t mxs_mci_prepare_transfer_setup(unsigned cmd_flags, unsigned data
  * - "broadcast commands with response (BCR)"
  * - "addressed command (AC)" with response, but without data
  */
-static int mxs_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
+static int mxs_mci_std_cmds(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd)
 {
 	/* setup command and transfer parameters */
 	writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, 0) |
-		SSP_CTRL0_ENABLE, hw_dev->map_base + HW_SSP_CTRL0);
+		SSP_CTRL0_ENABLE, mxs_mci->regs + HW_SSP_CTRL0);
 
 	/* prepare the command, when no response is expected add a few trailing clocks */
 	writel(SSP_CMD0_CMD(cmd->cmdidx) |
 		(cmd->resp_type & MMC_RSP_PRESENT ? 0 : SSP_CMD0_APPEND_8CYC),
-		hw_dev->map_base + HW_SSP_CMD0);
+		mxs_mci->regs + HW_SSP_CMD0);
 
 	/* prepare command's arguments */
-	writel(cmd->cmdarg, hw_dev->map_base + HW_SSP_CMD1);
+	writel(cmd->cmdarg, mxs_mci->regs + HW_SSP_CMD1);
 
-	mxs_mci_setup_timeout(hw_dev, 0xffff);
+	mxs_mci_setup_timeout(mxs_mci, 0xffff);
 
 	/* start the transfer */
-	writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 4);
+	writel(SSP_CTRL0_RUN, mxs_mci->regs + HW_SSP_CTRL0 + 4);
 
 	/* wait until finished */
-	while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
+	while (readl(mxs_mci->regs + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
 		;
 
 	if (cmd->resp_type & MMC_RSP_PRESENT)
-		mxs_mci_get_cards_response(hw_dev, cmd);
+		mxs_mci_get_cards_response(mxs_mci, cmd);
 
-	return mxs_mci_get_cmd_error(readl(hw_dev->map_base + HW_SSP_STATUS));
+	return mxs_mci_get_cmd_error(readl(mxs_mci->regs + HW_SSP_STATUS));
 }
 
 /**
@@ -464,10 +466,9 @@ static int mxs_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
  * @param data The data information (buffer, direction aso.) May be NULL
  * @return 0 on success
  */
-static int mxs_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
+static int mxs_mci_adtc(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd,
 			struct mci_data *data)
 {
-	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
 	uint32_t xfer_cnt, log2blocksize, block_cnt;
 	int err;
 
@@ -483,52 +484,52 @@ static int mxs_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
 	/* setup command and transfer parameters */
 #ifdef CONFIG_ARCH_IMX23
 	writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
-		SSP_CTRL0_BUS_WIDTH(host_data->bus_width) |
+		SSP_CTRL0_BUS_WIDTH(mxs_mci->bus_width) |
 		(xfer_cnt != 0 ? SSP_CTRL0_DATA_XFER : 0) | /* command plus data */
 		SSP_CTRL0_ENABLE |
 		SSP_CTRL0_XFER_COUNT(xfer_cnt), /* byte count to be transfered */
-		hw_dev->map_base + HW_SSP_CTRL0);
+		mxs_mci->regs + HW_SSP_CTRL0);
 
 	/* prepare the command and the transfered data count */
 	writel(SSP_CMD0_CMD(cmd->cmdidx) |
 		SSP_CMD0_BLOCK_SIZE(log2blocksize) |
 		SSP_CMD0_BLOCK_COUNT(block_cnt) |
 		(cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION ? SSP_CMD0_APPEND_8CYC : 0),
-		hw_dev->map_base + HW_SSP_CMD0);
+		mxs_mci->regs + HW_SSP_CMD0);
 #endif
 #ifdef CONFIG_ARCH_IMX28
 	writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
-		SSP_CTRL0_BUS_WIDTH(host_data->bus_width) |
+		SSP_CTRL0_BUS_WIDTH(mxs_mci->bus_width) |
 		(xfer_cnt != 0 ? SSP_CTRL0_DATA_XFER : 0) | /* command plus data */
 		SSP_CTRL0_ENABLE,
-		hw_dev->map_base + HW_SSP_CTRL0);
-	writel(xfer_cnt, hw_dev->map_base + HW_SSP_XFER_COUNT);
+		mxs_mci->regs + HW_SSP_CTRL0);
+	writel(xfer_cnt, mxs_mci->regs + HW_SSP_XFER_COUNT);
 
 	/* prepare the command and the transfered data count */
 	writel(SSP_CMD0_CMD(cmd->cmdidx) |
 		(cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION ? SSP_CMD0_APPEND_8CYC : 0),
-		hw_dev->map_base + HW_SSP_CMD0);
+		mxs_mci->regs + HW_SSP_CMD0);
 	writel(SSP_BLOCK_SIZE(log2blocksize) |
 		SSP_BLOCK_COUNT(block_cnt),
-		hw_dev->map_base + HW_SSP_BLOCK_SIZE);
+		mxs_mci->regs + HW_SSP_BLOCK_SIZE);
 #endif
 
 	/* prepare command's arguments */
-	writel(cmd->cmdarg, hw_dev->map_base + HW_SSP_CMD1);
+	writel(cmd->cmdarg, mxs_mci->regs + HW_SSP_CMD1);
 
-	mxs_mci_setup_timeout(hw_dev, 0xffff);
+	mxs_mci_setup_timeout(mxs_mci, 0xffff);
 
-	err = mxs_mci_transfer_data(hw_dev, data);
+	err = mxs_mci_transfer_data(mxs_mci, data);
 	if (err != 0) {
 		pr_debug(" Transfering data failed\n");
 		return err;
 	}
 
 	/* wait until finished */
-	while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
+	while (readl(mxs_mci->regs + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
 		;
 
-	mxs_mci_get_cards_response(hw_dev, cmd);
+	mxs_mci_get_cards_response(mxs_mci, cmd);
 
 	return 0;
 }
@@ -554,7 +555,7 @@ static int mxs_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
  * @note Up to "SSP unit DIV" the outer world must care. This routine only
  * handles the "SSP DIV".
  */
-static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
+static unsigned mxs_mci_setup_clock_speed(struct mxs_mci_host *mxs_mci, unsigned nc)
 {
 	unsigned ssp, div, rate, reg;
 
@@ -563,7 +564,7 @@ static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
 		return 0;
 	}
 
-	ssp = mxs_mci_get_unit_clock(hw_dev);
+	ssp = mxs_mci_get_unit_clock(mxs_mci);
 
 	for (div = 2; div < 255; div += 2) {
 		rate = DIV_ROUND_CLOSEST(DIV_ROUND_CLOSEST(ssp, nc), div);
@@ -575,9 +576,9 @@ static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
 		return 0;
 	}
 
-	reg = readl(hw_dev->map_base + HW_SSP_TIMING) & SSP_TIMING_TIMEOUT_MASK;
+	reg = readl(mxs_mci->regs + HW_SSP_TIMING) & SSP_TIMING_TIMEOUT_MASK;
 	reg |= SSP_TIMING_CLOCK_DIVIDE(div) | SSP_TIMING_CLOCK_RATE(rate - 1);
-	writel(reg, hw_dev->map_base + HW_SSP_TIMING);
+	writel(reg, mxs_mci->regs + HW_SSP_TIMING);
 
 	return ssp / div / rate;
 }
@@ -588,10 +589,10 @@ static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
  *
  * This will reset everything in all registers of this unit! (FIXME)
  */
-static void mxs_mci_reset(struct device_d *hw_dev)
+static void mxs_mci_reset(struct mxs_mci_host *mxs_mci)
 {
-	writel(SSP_CTRL0_SFTRST, hw_dev->map_base + HW_SSP_CTRL0 + 8);
-	while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_SFTRST)
+	writel(SSP_CTRL0_SFTRST, mxs_mci->regs + HW_SSP_CTRL0 + 8);
+	while (readl(mxs_mci->regs + HW_SSP_CTRL0) & SSP_CTRL0_SFTRST)
 		;
 }
 
@@ -605,24 +606,23 @@ static void mxs_mci_reset(struct device_d *hw_dev)
  */
 static int mxs_mci_initialize(struct mci_host *host, struct device_d *mci_dev)
 {
-	struct device_d *hw_dev = host->hw_dev;
-	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *mxs_mci = to_mxs_mci(host);
 
 	/* enable the clock to this unit to be able to reset it */
-	writel(SSP_CTRL0_CLKGATE, hw_dev->map_base + HW_SSP_CTRL0 + 8);
+	writel(SSP_CTRL0_CLKGATE, mxs_mci->regs + HW_SSP_CTRL0 + 8);
 
 	/* reset the unit */
-	mxs_mci_reset(hw_dev);
+	mxs_mci_reset(mxs_mci);
 
 	/* restore the last settings */
-	host->clock = host_data->clock = mxs_mci_setup_clock_speed(hw_dev, host->clock);
-	mxs_mci_setup_timeout(hw_dev, 0xffff);
+	host->clock = mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, host->clock);
+	mxs_mci_setup_timeout(mxs_mci, 0xffff);
 	writel(SSP_CTRL0_IGNORE_CRC |
-		SSP_CTRL0_BUS_WIDTH(host_data->bus_width),
-		hw_dev->map_base + HW_SSP_CTRL0);
+		SSP_CTRL0_BUS_WIDTH(mxs_mci->bus_width),
+		mxs_mci->regs + HW_SSP_CTRL0);
 	writel(SSP_CTRL1_POLARITY |
 		SSP_CTRL1_SSP_MODE(3) |
-		SSP_CTRL1_WORD_LENGTH(7), hw_dev->map_base + HW_SSP_CTRL1);
+		SSP_CTRL1_WORD_LENGTH(7), mxs_mci->regs + HW_SSP_CTRL1);
 
 	return 0;
 }
@@ -637,15 +637,15 @@ static int mxs_mci_initialize(struct mci_host *host, struct device_d *mci_dev)
 static int mxs_mci_request(struct mci_host *host, struct mci_cmd *cmd,
 			struct mci_data *data)
 {
-	struct device_d *hw_dev = host->hw_dev;
+	struct mxs_mci_host *mxs_mci = to_mxs_mci(host);
 	int rc;
 
 	if ((cmd->resp_type == 0) || (data == NULL))
-		rc = mxs_mci_std_cmds(hw_dev, cmd);
+		rc = mxs_mci_std_cmds(mxs_mci, cmd);
 	else
-		rc = mxs_mci_adtc(hw_dev, cmd, data);	/* with response and data */
+		rc = mxs_mci_adtc(mxs_mci, cmd, data);	/* with response and data */
 
-	mxs_mci_finish_request(hw_dev);	/* TODO */
+	mxs_mci_finish_request(mxs_mci);	/* TODO */
 	return rc;
 }
 
@@ -661,25 +661,24 @@ static int mxs_mci_request(struct mci_host *host, struct mci_cmd *cmd,
 static void mxs_mci_set_ios(struct mci_host *host, struct device_d *mci_dev,
 			unsigned bus_width, unsigned clock)
 {
-	struct device_d *hw_dev = host->hw_dev;
-	struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *mxs_mci = to_mxs_mci(host);
 
 	switch (bus_width) {
 	case 8:
-		host_data->bus_width = 2;
+		mxs_mci->bus_width = 2;
 		host->bus_width = 8;	/* 8 bit is possible */
 		break;
 	case 4:
-		host_data->bus_width = 1;
+		mxs_mci->bus_width = 1;
 		host->bus_width = 4;	/* 4 bit is possible */
 		break;
 	default:
-		host_data->bus_width = 0;
+		mxs_mci->bus_width = 0;
 		host->bus_width = 1;	/* 1 bit is possible */
 		break;
 	}
 
-	host->clock = host_data->clock = mxs_mci_setup_clock_speed(hw_dev, clock);
+	host->clock = mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, clock);
 	pr_debug("IO settings: bus width=%d, frequency=%u Hz\n", host->bus_width,
 			host->clock);
 }
@@ -691,13 +690,13 @@ const unsigned char bus_width[3] = { 1, 4, 8 };
 
 static void mxs_mci_info(struct device_d *hw_dev)
 {
-	struct mxs_mci_host *host_data = GET_HOST_DATA(hw_dev);
+	struct mxs_mci_host *mxs_mci = GET_HOST_DATA(hw_dev);
 
 	printf(" Interface\n");
-	printf("  Min. bus clock: %u Hz\n", host_data->f_min);
-	printf("  Max. bus clock: %u Hz\n", host_data->f_max);
-	printf("  Current bus clock: %u Hz\n", host_data->clock);
-	printf("  Bus width: %u bit\n", bus_width[host_data->bus_width]);
+	printf("  Min. bus clock: %u Hz\n", mxs_mci->f_min);
+	printf("  Max. bus clock: %u Hz\n", mxs_mci->f_max);
+	printf("  Current bus clock: %u Hz\n", mxs_mci->clock);
+	printf("  Bus width: %u bit\n", bus_width[mxs_mci->bus_width]);
 	printf("\n");
 }
 #endif
@@ -705,7 +704,7 @@ static void mxs_mci_info(struct device_d *hw_dev)
 static int mxs_mci_probe(struct device_d *hw_dev)
 {
 	struct mxs_mci_platform_data *pd = hw_dev->platform_data;
-	struct mxs_mci_host *host_data;
+	struct mxs_mci_host *mxs_mci;
 	struct mci_host *host;
 
 	if (hw_dev->platform_data == NULL) {
@@ -713,62 +712,63 @@ static int mxs_mci_probe(struct device_d *hw_dev)
 		return -EINVAL;
 	}
 
-	host = xzalloc(sizeof(struct mxs_mci_host) + sizeof(struct mci_host));
-	host_data = (struct mxs_mci_host*)&host[1];
+	mxs_mci = xzalloc(sizeof(*mxs_mci));
+	host = &mxs_mci->host;
 
-	hw_dev->priv = host_data;
+	hw_dev->priv = mxs_mci;
 	host->hw_dev = hw_dev;
 	host->send_cmd = mxs_mci_request,
 	host->set_ios = mxs_mci_set_ios,
 	host->init = mxs_mci_initialize,
+	mxs_mci->regs = (void *)hw_dev->map_base;
 
 	/* feed forward the platform specific values */
 	host->voltages = pd->voltages;
 	host->host_caps = pd->caps;
 
 #ifdef CONFIG_ARCH_IMX23
-	host_data->index = 0;	/* there is only one clock for all */
+	mxs_mci->index = 0;	/* there is only one clock for all */
 #endif
 #ifdef CONFIG_ARCH_IMX28
 	/* one dedicated clock per unit */
 	switch (hw_dev->map_base) {
 	case IMX_SSP0_BASE:
-		host_data->index = 0;
+		mxs_mci->index = 0;
 		break;
 	case IMX_SSP1_BASE:
-		host_data->index = 1;
+		mxs_mci->index = 1;
 		break;
 	case IMX_SSP2_BASE:
-		host_data->index = 2;
+		mxs_mci->index = 2;
 		break;
 	case IMX_SSP3_BASE:
-		host_data->index = 3;
+		mxs_mci->index = 3;
 		break;
 	default:
-		pr_debug("Unknown SSP unit at address 0x%08x\n", hw_dev->map_base);
+		pr_debug("Unknown SSP unit at address 0x%08x\n", mxs_mci->regs);
 		return 0;
 	}
 #endif
 	if (pd->f_min == 0) {
-		host->f_min = mxs_mci_get_unit_clock(hw_dev) / 254 / 256;
+		host->f_min = mxs_mci_get_unit_clock(mxs_mci) / 254 / 256;
 		pr_debug("Min. frequency is %u Hz\n", host->f_min);
 	} else {
 		host->f_min = pd->f_min;
 		pr_debug("Min. frequency is %u Hz, could be %u Hz\n",
-			host->f_min, mxs_mci_get_unit_clock(hw_dev) / 254 / 256);
+			host->f_min, mxs_mci_get_unit_clock(mxs_mci) / 254 / 256);
 	}
 	if (pd->f_max == 0) {
-		host->f_max = mxs_mci_get_unit_clock(hw_dev) / 2 / 1;
+		host->f_max = mxs_mci_get_unit_clock(mxs_mci) / 2 / 1;
 		pr_debug("Max. frequency is %u Hz\n", host->f_max);
 	} else {
 		host->f_max =  pd->f_max;
 		pr_debug("Max. frequency is %u Hz, could be %u Hz\n",
-			host->f_max, mxs_mci_get_unit_clock(hw_dev) / 2 / 1);
+			host->f_max, mxs_mci_get_unit_clock(mxs_mci) / 2 / 1);
 	}
 
 #ifdef CONFIG_MCI_INFO
-	host_data->f_min = host->f_min;
-	host_data->f_max = host->f_max;
+	mxs_mci->f_min = host->f_min;
+	mxs_mci->f_max = host->f_max;
 #endif
 
 	return mci_register(host);
-- 
1.7.2.3



From F.Vanalme at TELEVIC.com  Mon Feb 28 10:05:01 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Mon, 28 Feb 2011 16:05:01 +0100
Subject: partitions
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D61@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D51@SRV-VS06.TELEVIC.COM>
	<20110228084753.GH2667@jasper.tkos.co.il>
	<6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00D61@SRV-VS06.TELEVIC.COM>
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00DC1@SRV-VS06.TELEVIC.COM>

> -----Original Message-----
> From: barebox-bounces at lists.infradead.org [mailto:barebox-
> bounces at lists.infradead.org] On Behalf Of Vanalme Filip
> Sent: maandag 28 februari 2011 9:57
> To: Baruch Siach
> Cc: barebox at lists.infradead.org
> Subject: RE: partitions
> 
> > -----Original Message-----
> > From: Baruch Siach [mailto:baruch at tkos.co.il]
> > Sent: maandag 28 februari 2011 9:48
> > To: Vanalme Filip
> > Cc: barebox at lists.infradead.org
> > Subject: Re: partitions
> >
> > HI Vanalme,
> >
> > On Mon, Feb 28, 2011 at 09:36:14AM +0100, Vanalme Filip wrote:
> > > barebox:/ erase /dev/nand0.kernel.bb
> > > stat /dev/nand0.kernel.bb: No such file or directory
> > > barebox:/
> > >
> > > and
> > >
> > > barebox:/ tftp zImage /dev/nand0.kernel.bb
> > > open: Read-only file system
> > > barebox:/
> > >
> > >
> > > Is there any documentation that handles/describes this ? (e.g. what's the
> > extension .bb ?)
> >
> > The .bb extension means a bad block aware partition. Use the 'nand -a'
> command
> > to create one from a raw NAND partition, e.g. 'nand -a /dev/nand0.kernel'.
> >
> > baruch
> 
> [Filip]  Thanks !
> 

[Filip]  Shouldn't I have automatically /dev/mtdblock* devices, e.g. /dev/mtdblock7 for rootfs nand partition ?
> 
> >
> > --
> >                                                      ~. .~   Tk Open Systems
> > =}------------------------------------------------ooO--U--Ooo------------{=
> >    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
> 
> _______________________________________________
> barebox mailing list
> barebox at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox


From F.Vanalme at TELEVIC.com  Mon Feb 28 11:03:37 2011
From: F.Vanalme at TELEVIC.com (Vanalme Filip)
Date: Mon, 28 Feb 2011 17:03:37 +0100
Subject: scripts
Message-ID: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00DD7@SRV-VS06.TELEVIC.COM>

I'm currently studying some Barebox scripts (i.e. init, boot) and I have noticed something strange with scripts :

barebox:/env/bin echo $bootfile
zImage
barebox:/env/bin echo $eth0.serverip
10.0.48.80
barebox:/env/bin cat test
#!/bin/sh

echo --$eth0.serverip--
echo --$bootfile--
barebox:/env/bin ./test
--10.0.48.80--
----
barebox:/env/bin

When I do an echo of the two environment variables from the command prompt, I can see their values. However, when both commands are entered in a simple script, only the serverip address appears. (I created the test script with "edit" from within Barebox). Am I doing something wrong ?


Filip



From mkl at pengutronix.de  Mon Feb 28 11:09:43 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Mon, 28 Feb 2011 17:09:43 +0100
Subject: scripts
In-Reply-To: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00DD7@SRV-VS06.TELEVIC.COM>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00DD7@SRV-VS06.TELEVIC.COM>
Message-ID: <4D6BC8C7.9090309@pengutronix.de>

On 02/28/2011 05:03 PM, Vanalme Filip wrote:
> I'm currently studying some Barebox scripts (i.e. init, boot) and I have noticed something strange with scripts :
> 
> barebox:/env/bin echo $bootfile
> zImage
> barebox:/env/bin echo $eth0.serverip
> 10.0.48.80
> barebox:/env/bin cat test
> #!/bin/sh
> 
> echo --$eth0.serverip--
> echo --$bootfile--

try:

echo --${bootfile}--

> barebox:/env/bin ./test
> --10.0.48.80--
> ----
> barebox:/env/bin
> 
> When I do an echo of the two environment variables from the command prompt, I can see their values. However, when both commands are entered in a simple script, only the serverip address appears. (I created the test script with "edit" from within Barebox). Am I doing something wrong ?

cheers, Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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From mkl at pengutronix.de  Mon Feb 28 11:12:11 2011
From: mkl at pengutronix.de (Marc Kleine-Budde)
Date: Mon, 28 Feb 2011 17:12:11 +0100
Subject: scripts
In-Reply-To: <4D6BC8C7.9090309@pengutronix.de>
References: <6EE7D1502C48E44E92DCADF9DD3E0DB9017FF3B00DD7@SRV-VS06.TELEVIC.COM>
	<4D6BC8C7.9090309@pengutronix.de>
Message-ID: <4D6BC95B.5030505@pengutronix.de>

On 02/28/2011 05:09 PM, Marc Kleine-Budde wrote:
> On 02/28/2011 05:03 PM, Vanalme Filip wrote:
>> I'm currently studying some Barebox scripts (i.e. init, boot) and I have noticed something strange with scripts :
>>
>> barebox:/env/bin echo $bootfile
>> zImage
>> barebox:/env/bin echo $eth0.serverip
>> 10.0.48.80
>> barebox:/env/bin cat test
>> #!/bin/sh
>>
>> echo --$eth0.serverip--
>> echo --$bootfile--
> 
> try:
> 
> echo --${bootfile}--

If that doesn't make a difference, try to "source" the config file in
your script, e.g.:

source /env/config

cheers, Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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From ThomasMayer2 at web.de  Wed Feb 23 09:16:17 2011
From: ThomasMayer2 at web.de (Thomas Mayer)
Date: Wed, 23 Feb 2011 15:16:17 +0100 (CET)
Subject: Install barebox to target
Message-ID: <1378082792.6704544.1298470577960.JavaMail.fmail@mwmweb055>

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