[PATCHv2 2/2] ARM pcm043: change RAM timings
Teresa Gámez
t.gamez at phytec.de
Mon Aug 22 09:51:05 EDT 2011
Update RAM timing for new sdrams (IS43DR16320B).
RAM timings are reworked with extended row cycle delay.
Timings where also tested with older sdrams (MT47H32M16).
Signed-off-by: Teresa Gámez <t.gamez at phytec.de>
---
arch/arm/boards/pcm043/lowlevel.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/boards/pcm043/lowlevel.c b/arch/arm/boards/pcm043/lowlevel.c
index eff96f9..bbe586b 100644
--- a/arch/arm/boards/pcm043/lowlevel.c
+++ b/arch/arm/boards/pcm043/lowlevel.c
@@ -146,7 +146,7 @@ void __bare_init __naked board_init_lowlevel(void)
writel(0x00000304, ESDMISC); /* was 0x00000004 */
/* set timing paramters */
- writel(0x00255417, ESDCFG0);
+ writel(0x0025541F, ESDCFG0);
/* select Precharge-All mode */
writel(0x92220000, ESDCTL0);
/* Precharge-All */
--
1.7.0.4
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