ath11k swiotlb buffer is full
Tim Harvey
tharvey at gateworks.com
Tue Nov 19 12:16:00 PST 2024
Greetings,
I've got an ath11k card that is failing to init on an IMX8MM system
with 4GB of DRAM:
[ 7.551582] ath11k_pci 0000:01:00.0: BAR 0 [mem
0x18000000-0x181fffff 64bit]: assigned
[ 7.551713] ath11k_pci 0000:01:00.0: enabling device (0000 -> 0002)
[ 7.552401] ath11k_pci 0000:01:00.0: MSI vectors: 16
[ 7.552440] ath11k_pci 0000:01:00.0: qcn9074 hw1.0
[ 7.887186] mhi mhi0: Loaded FW: ath11k/QCN9074/hw1.0/amss.bin,
sha256: 5ee1b7b204541b5f99984f21d694ececaec08fbce1b520ffe6fe740b02a4afd7
[ 8.435964] ath11k_pci 0000:01:00.0: chip_id 0x0 chip_family 0x0
board_id 0xff soc_id 0xffffffff
[ 8.435991] ath11k_pci 0000:01:00.0: fw_version 0x270206d0
fw_build_timestamp 2022-08-04 12:48 fw_build_id
WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
[ 8.441700] ath11k_pci 0000:01:00.0: Loaded FW:
ath11k/QCN9074/hw1.0/board-2.bin, sha256:
dbf0ca14aa1229eccd48f26f1026901b9718b143bd30b51b8ea67c84ba6207f1
[ 9.753764] ath11k_pci 0000:01:00.0: Loaded FW:
ath11k/QCN9074/hw1.0/m3.bin, sha256:
b6d957f335073a15a8de809398e1506f0200a08747eaf7189c843cf519ffc1de
[ 9.789791] ath11k_pci 0000:01:00.0: swiotlb buffer is full (sz:
1048583 bytes), total 32768 (slots), used 2528 (slots)
[ 9.789853] ath11k_pci 0000:01:00.0: failed to set up tcl_comp ring (0) :-12
[ 9.790238] ath11k_pci 0000:01:00.0: failed to init DP: -12
root at noble-venice:~# cat /proc/cmdline
console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200
root=PARTUUID=5cdde84f-01 rootwait net.ifnames=0 cma=196M
The IMX8MM's DRAM base is at 1GB so anything above 3GB hits the 32bit
address boundary. If I pass in a mem=3096M the device registers just
fine.
I found this to be the case with modern kernels however I found
differing behavior with older kernels:
- 6.6 and 6.1 the device registers with 4GB DRAM but crashes on client connect
- 5.15 devices registers with 4GB DRAM and appears to work just fine
Could anyone explain what is going on here? Obviously there have been
changes at some point to start using swiotlb which I believe was all
about avoiding 32bit DMA limitations but I'm not clear how I should be
configuring this for IMX8MM with 4GB DRAM. Maybe my kernel IOMMU
configuration is incorrect somehow?
I'm also unclear why there was no apparent problem with older kernels
such as 5.15.
Best Regards,
Tim
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