[PATCH] ath11k: use cache line aligned buffers for dbring

[Kalle Valo]

Rameshkumar Sundaram <quic_ramess at quicinc.com> wrote:

> The DMA buffers of dbring which is used for spectral/cfr
> starts at certain offset from original kmalloc() returned buffer.
> This is not cache line aligned.
> And also driver tries to access the data that is immediately before
> this offset address (i.e. buff->paddr) after doing dma map.
> This will cause cache line sharing issues and data corruption,
> if CPU happen to write back cache after HW has dma'ed the data.
> 
> Fix this by mapping a cache line aligned buffer to dma.
> 
> Tested on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> 
> Signed-off-by: Rameshkumar Sundaram <quic_ramess at quicinc.com>
> Signed-off-by: Kalle Valo <kvalo at codeaurora.org>

Patch applied to ath-next branch of ath.git, thanks.

bd77f6b1d710 ath11k: use cache line aligned buffers for dbring

-- 
https://patchwork.kernel.org/project/linux-wireless/patch/1635831693-15962-1-git-send-email-quic_ramess@quicinc.com/

https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches