Does the reg_addr/reg_value reading work?

Sebastian Gottschall s.gottschall at dd-wrt.com
Mon Jun 8 14:23:09 PDT 2015


Am 08.06.2015 um 22:02 schrieb Ben Greear:
> On 06/08/2015 12:45 PM, Ben Greear wrote:
>> On 06/08/2015 09:46 AM, Sebastian Gottschall wrote:
>>> Am 08.06.2015 um 18:11 schrieb Ben Greear:
>>>> I am not getting expected values when I try to read registers
>>>> through the ath10k reg_addr/reg_value API.
>>>>
>>>> For instance, I tried reading a particular register 0x80e0
>>>> (as defined in the firmware), and I get a zero value.  With a different
>>>> API that I wrote to dump some specific registers over the WMI API,
>>>> I get the expected value.
>>>>
>>>> # echo 0x80e0 > /debug/ieee80211/wiphy0/ath10k/reg_addr
>>>> # cat /debug/ieee80211/wiphy0/ath10k/reg_value
>>>> 0x000080e0:0x00000000
>>>> # cat /debug/ieee80211/wiphy0/ath10k/fw_regs
>>>>
>>>>      ath10k Target Register Dump
>>>>                =================
>>>>
>>>>              MAC-FILTER-ADDR-L32 0xd7ffffff
>>>> ...
>>>>
>>>> Is there some trick I am missing?
>>> 0x20000 offset makes the voodoo. you will find this offset within your firmware source too. take a look at the preconfigured register tables. these contain
>>> already the ack,slot etc. settings.
>>> but with a special macro surrounding it which defines that offset
>>>
>>> echo 0x2080e0 > /debug/ieee80211/wiphy0/ath10k/reg_addr
>> This crashes my kernel....I instrumented the place that crashed in ath10k/pci.h:
>>
>> [  100.676013] ath10k-pci-read32: ar ffff88020279ae20  ar_pci ffff88020279df08  offset: 0x2080e0
>> [  100.676016]   ar_pci->mem: 0xffffc90019c80000
>> [  100.676031] BUG: unable to handle kernel paging request at ffffc90019e880e0
>> [  100.681752] IP: [<ffffffff81364ad4>] ioread32+0x9/0x2f
>>
>> Have you tried this on a 10.1.467 firmware?
>>
>> And, what kernel?  I'm trying 4.0.4+
> I was using the wrong address value..it should be 0x280e0.  Maybe the driver should still keep us from
> crashing the whole kernel (while holding locks!), but at least it works when I put in
> the right value.
now that you say it. i see it too. but playing direct register writes 
can always lead to problematic scenarios. its a debug register. from my 
oppinion, a debug register should allow
whatever is possible. even crashing something. its like using /dev/kmem
>
> Thanks,
> Ben
>
>




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